1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
34 /**************************************************************************
38 **************************************************************************/
40 #define EFX_DRIVER_VERSION "3.2"
43 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
44 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
46 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
47 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
50 /**************************************************************************
54 **************************************************************************/
56 #define EFX_MAX_CHANNELS 32U
57 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
58 #define EFX_EXTRA_CHANNEL_IOV 0
59 #define EFX_EXTRA_CHANNEL_PTP 1
60 #define EFX_MAX_EXTRA_CHANNELS 2U
62 /* Checksum generation is a per-queue option in hardware, so each
63 * queue visible to the networking core is backed by two hardware TX
65 #define EFX_MAX_TX_TC 2
66 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
67 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
68 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
69 #define EFX_TXQ_TYPES 4
70 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
72 /* Maximum possible MTU the driver supports */
73 #define EFX_MAX_MTU (9 * 1024)
75 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
76 * and should be a multiple of the cache line size.
78 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
80 /* If possible, we should ensure cache line alignment at start and end
81 * of every buffer. Otherwise, we just need to ensure 4-byte
82 * alignment of the network header.
85 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
87 #define EFX_RX_BUF_ALIGNMENT 4
90 /* Forward declare Precision Time Protocol (PTP) support structure. */
93 struct efx_self_tests
;
96 * struct efx_buffer - A general-purpose DMA buffer
97 * @addr: host base address of the buffer
98 * @dma_addr: DMA base address of the buffer
99 * @len: Buffer length, in bytes
101 * The NIC uses these buffers for its interrupt status registers and
111 * struct efx_special_buffer - DMA buffer entered into buffer table
112 * @buf: Standard &struct efx_buffer
113 * @index: Buffer index within controller;s buffer table
114 * @entries: Number of buffer table entries
116 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
117 * Event and descriptor rings are addressed via one or more buffer
118 * table entries (and so can be physically non-contiguous, although we
119 * currently do not take advantage of that). On Falcon and Siena we
120 * have to take care of allocating and initialising the entries
121 * ourselves. On later hardware this is managed by the firmware and
122 * @index and @entries are left as 0.
124 struct efx_special_buffer
{
125 struct efx_buffer buf
;
127 unsigned int entries
;
131 * struct efx_tx_buffer - buffer state for a TX descriptor
132 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
133 * freed when descriptor completes
134 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
135 * freed when descriptor completes.
136 * @dma_addr: DMA address of the fragment.
137 * @flags: Flags for allocation and DMA mapping type
138 * @len: Length of this fragment.
139 * This field is zero when the queue slot is empty.
140 * @unmap_len: Length of this fragment to unmap
142 struct efx_tx_buffer
{
144 const struct sk_buff
*skb
;
148 unsigned short flags
;
150 unsigned short unmap_len
;
152 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
153 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
154 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
155 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
158 * struct efx_tx_queue - An Efx TX queue
160 * This is a ring buffer of TX fragments.
161 * Since the TX completion path always executes on the same
162 * CPU and the xmit path can operate on different CPUs,
163 * performance is increased by ensuring that the completion
164 * path and the xmit path operate on different cache lines.
165 * This is particularly important if the xmit path is always
166 * executing on one CPU which is different from the completion
167 * path. There is also a cache line for members which are
168 * read but not written on the fast path.
170 * @efx: The associated Efx NIC
171 * @queue: DMA queue number
172 * @channel: The associated channel
173 * @core_txq: The networking core TX queue structure
174 * @buffer: The software buffer ring
175 * @tsoh_page: Array of pages of TSO header buffers
176 * @txd: The hardware descriptor ring
177 * @ptr_mask: The size of the ring minus 1.
178 * @initialised: Has hardware queue been initialised?
179 * @read_count: Current read pointer.
180 * This is the number of buffers that have been removed from both rings.
181 * @old_write_count: The value of @write_count when last checked.
182 * This is here for performance reasons. The xmit path will
183 * only get the up-to-date value of @write_count if this
184 * variable indicates that the queue is empty. This is to
185 * avoid cache-line ping-pong between the xmit path and the
187 * @insert_count: Current insert pointer
188 * This is the number of buffers that have been added to the
190 * @write_count: Current write pointer
191 * This is the number of buffers that have been added to the
193 * @old_read_count: The value of read_count when last checked.
194 * This is here for performance reasons. The xmit path will
195 * only get the up-to-date value of read_count if this
196 * variable indicates that the queue is full. This is to
197 * avoid cache-line ping-pong between the xmit path and the
199 * @tso_bursts: Number of times TSO xmit invoked by kernel
200 * @tso_long_headers: Number of packets with headers too long for standard
202 * @tso_packets: Number of packets via the TSO xmit path
203 * @pushes: Number of times the TX push feature has been used
204 * @empty_read_count: If the completion path has seen the queue as empty
205 * and the transmission path has not yet checked this, the value of
206 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
208 struct efx_tx_queue
{
209 /* Members which don't change on the fast path */
210 struct efx_nic
*efx ____cacheline_aligned_in_smp
;
212 struct efx_channel
*channel
;
213 struct netdev_queue
*core_txq
;
214 struct efx_tx_buffer
*buffer
;
215 struct efx_buffer
*tsoh_page
;
216 struct efx_special_buffer txd
;
217 unsigned int ptr_mask
;
220 /* Members used mainly on the completion path */
221 unsigned int read_count ____cacheline_aligned_in_smp
;
222 unsigned int old_write_count
;
224 /* Members used only on the xmit path */
225 unsigned int insert_count ____cacheline_aligned_in_smp
;
226 unsigned int write_count
;
227 unsigned int old_read_count
;
228 unsigned int tso_bursts
;
229 unsigned int tso_long_headers
;
230 unsigned int tso_packets
;
233 /* Members shared between paths and sometimes updated */
234 unsigned int empty_read_count ____cacheline_aligned_in_smp
;
235 #define EFX_EMPTY_COUNT_VALID 0x80000000
236 atomic_t flush_outstanding
;
240 * struct efx_rx_buffer - An Efx RX data buffer
241 * @dma_addr: DMA base address of the buffer
242 * @page: The associated page buffer.
243 * Will be %NULL if the buffer slot is currently free.
244 * @page_offset: If pending: offset in @page of DMA base address.
245 * If completed: offset in @page of Ethernet header.
246 * @len: If pending: length for DMA descriptor.
247 * If completed: received length, excluding hash prefix.
248 * @flags: Flags for buffer and packet state. These are only set on the
249 * first buffer of a scattered packet.
251 struct efx_rx_buffer
{
258 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
259 #define EFX_RX_PKT_CSUMMED 0x0002
260 #define EFX_RX_PKT_DISCARD 0x0004
261 #define EFX_RX_PKT_TCP 0x0040
264 * struct efx_rx_page_state - Page-based rx buffer state
266 * Inserted at the start of every page allocated for receive buffers.
267 * Used to facilitate sharing dma mappings between recycled rx buffers
268 * and those passed up to the kernel.
270 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
271 * When refcnt falls to zero, the page is unmapped for dma
272 * @dma_addr: The dma address of this page.
274 struct efx_rx_page_state
{
278 unsigned int __pad
[0] ____cacheline_aligned
;
282 * struct efx_rx_queue - An Efx RX queue
283 * @efx: The associated Efx NIC
284 * @core_index: Index of network core RX queue. Will be >= 0 iff this
285 * is associated with a real RX queue.
286 * @buffer: The software buffer ring
287 * @rxd: The hardware descriptor ring
288 * @ptr_mask: The size of the ring minus 1.
289 * @refill_enabled: Enable refill whenever fill level is low
290 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
291 * @rxq_flush_pending.
292 * @added_count: Number of buffers added to the receive queue.
293 * @notified_count: Number of buffers given to NIC (<= @added_count).
294 * @removed_count: Number of buffers removed from the receive queue.
295 * @scatter_n: Number of buffers used by current packet
296 * @page_ring: The ring to store DMA mapped pages for reuse.
297 * @page_add: Counter to calculate the write pointer for the recycle ring.
298 * @page_remove: Counter to calculate the read pointer for the recycle ring.
299 * @page_recycle_count: The number of pages that have been recycled.
300 * @page_recycle_failed: The number of pages that couldn't be recycled because
301 * the kernel still held a reference to them.
302 * @page_recycle_full: The number of pages that were released because the
303 * recycle ring was full.
304 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
305 * @max_fill: RX descriptor maximum fill level (<= ring size)
306 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
308 * @min_fill: RX descriptor minimum non-zero fill level.
309 * This records the minimum fill level observed when a ring
310 * refill was triggered.
311 * @recycle_count: RX buffer recycle counter.
312 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
314 struct efx_rx_queue
{
317 struct efx_rx_buffer
*buffer
;
318 struct efx_special_buffer rxd
;
319 unsigned int ptr_mask
;
323 unsigned int added_count
;
324 unsigned int notified_count
;
325 unsigned int removed_count
;
326 unsigned int scatter_n
;
327 struct page
**page_ring
;
328 unsigned int page_add
;
329 unsigned int page_remove
;
330 unsigned int page_recycle_count
;
331 unsigned int page_recycle_failed
;
332 unsigned int page_recycle_full
;
333 unsigned int page_ptr_mask
;
334 unsigned int max_fill
;
335 unsigned int fast_fill_trigger
;
336 unsigned int min_fill
;
337 unsigned int min_overfill
;
338 unsigned int recycle_count
;
339 struct timer_list slow_fill
;
340 unsigned int slow_fill_count
;
343 enum efx_rx_alloc_method
{
344 RX_ALLOC_METHOD_AUTO
= 0,
345 RX_ALLOC_METHOD_SKB
= 1,
346 RX_ALLOC_METHOD_PAGE
= 2,
350 * struct efx_channel - An Efx channel
352 * A channel comprises an event queue, at least one TX queue, at least
353 * one RX queue, and an associated tasklet for processing the event
356 * @efx: Associated Efx NIC
357 * @channel: Channel instance number
358 * @type: Channel type definition
359 * @enabled: Channel enabled indicator
360 * @irq: IRQ number (MSI and MSI-X only)
361 * @irq_moderation: IRQ moderation value (in hardware ticks)
362 * @napi_dev: Net device used with NAPI
363 * @napi_str: NAPI control structure
364 * @eventq: Event queue buffer
365 * @eventq_mask: Event queue pointer mask
366 * @eventq_read_ptr: Event queue read pointer
367 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
368 * @irq_count: Number of IRQs since last adaptive moderation decision
369 * @irq_mod_score: IRQ moderation score
370 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
371 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
372 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
373 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
374 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
375 * @n_rx_overlength: Count of RX_OVERLENGTH errors
376 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
377 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
378 * lack of descriptors
379 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
380 * __efx_rx_packet(), or zero if there is none
381 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
382 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
383 * @rx_queue: RX queue for this channel
384 * @tx_queue: TX queues for this channel
389 const struct efx_channel_type
*type
;
392 unsigned int irq_moderation
;
393 struct net_device
*napi_dev
;
394 struct napi_struct napi_str
;
395 struct efx_special_buffer eventq
;
396 unsigned int eventq_mask
;
397 unsigned int eventq_read_ptr
;
400 unsigned int irq_count
;
401 unsigned int irq_mod_score
;
402 #ifdef CONFIG_RFS_ACCEL
403 unsigned int rfs_filters_added
;
406 unsigned n_rx_tobe_disc
;
407 unsigned n_rx_ip_hdr_chksum_err
;
408 unsigned n_rx_tcp_udp_chksum_err
;
409 unsigned n_rx_mcast_mismatch
;
410 unsigned n_rx_frm_trunc
;
411 unsigned n_rx_overlength
;
412 unsigned n_skbuff_leaks
;
413 unsigned int n_rx_nodesc_trunc
;
415 unsigned int rx_pkt_n_frags
;
416 unsigned int rx_pkt_index
;
418 struct efx_rx_queue rx_queue
;
419 struct efx_tx_queue tx_queue
[EFX_TXQ_TYPES
];
423 * struct efx_msi_context - Context for each MSI
424 * @efx: The associated NIC
425 * @index: Index of the channel/IRQ
426 * @name: Name of the channel/IRQ
428 * Unlike &struct efx_channel, this is never reallocated and is always
429 * safe for the IRQ handler to access.
431 struct efx_msi_context
{
434 char name
[IFNAMSIZ
+ 6];
438 * struct efx_channel_type - distinguishes traffic and extra channels
439 * @handle_no_channel: Handle failure to allocate an extra channel
440 * @pre_probe: Set up extra state prior to initialisation
441 * @post_remove: Tear down extra state after finalisation, if allocated.
442 * May be called on channels that have not been probed.
443 * @get_name: Generate the channel's name (used for its IRQ handler)
444 * @copy: Copy the channel state prior to reallocation. May be %NULL if
445 * reallocation is not supported.
446 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
447 * @keep_eventq: Flag for whether event queue should be kept initialised
448 * while the device is stopped
450 struct efx_channel_type
{
451 void (*handle_no_channel
)(struct efx_nic
*);
452 int (*pre_probe
)(struct efx_channel
*);
453 void (*post_remove
)(struct efx_channel
*);
454 void (*get_name
)(struct efx_channel
*, char *buf
, size_t len
);
455 struct efx_channel
*(*copy
)(const struct efx_channel
*);
456 bool (*receive_skb
)(struct efx_channel
*, struct sk_buff
*);
466 #define STRING_TABLE_LOOKUP(val, member) \
467 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
469 extern const char *const efx_loopback_mode_names
[];
470 extern const unsigned int efx_loopback_mode_max
;
471 #define LOOPBACK_MODE(efx) \
472 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
474 extern const char *const efx_reset_type_names
[];
475 extern const unsigned int efx_reset_type_max
;
476 #define RESET_TYPE(type) \
477 STRING_TABLE_LOOKUP(type, efx_reset_type)
480 /* Be careful if altering to correct macro below */
481 EFX_INT_MODE_MSIX
= 0,
482 EFX_INT_MODE_MSI
= 1,
483 EFX_INT_MODE_LEGACY
= 2,
484 EFX_INT_MODE_MAX
/* Insert any new items before this */
486 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
489 STATE_UNINIT
= 0, /* device being probed/removed or is frozen */
490 STATE_READY
= 1, /* hardware ready and netdev registered */
491 STATE_DISABLED
= 2, /* device disabled due to hardware errors */
492 STATE_RECOVERY
= 3, /* device recovering from PCI error */
496 * Alignment of the skb->head which wraps a page-allocated RX buffer
498 * The skb allocated to wrap an rx_buffer can have this alignment. Since
499 * the data is memcpy'd from the rx_buf, it does not need to be equal to
502 #define EFX_PAGE_SKB_ALIGN 2
504 /* Forward declaration */
507 /* Pseudo bit-mask flow control field */
508 #define EFX_FC_RX FLOW_CTRL_RX
509 #define EFX_FC_TX FLOW_CTRL_TX
510 #define EFX_FC_AUTO 4
513 * struct efx_link_state - Current state of the link
515 * @fd: Link is full-duplex
516 * @fc: Actual flow control flags
517 * @speed: Link speed (Mbps)
519 struct efx_link_state
{
526 static inline bool efx_link_state_equal(const struct efx_link_state
*left
,
527 const struct efx_link_state
*right
)
529 return left
->up
== right
->up
&& left
->fd
== right
->fd
&&
530 left
->fc
== right
->fc
&& left
->speed
== right
->speed
;
534 * struct efx_phy_operations - Efx PHY operations table
535 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
536 * efx->loopback_modes.
537 * @init: Initialise PHY
538 * @fini: Shut down PHY
539 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
540 * @poll: Update @link_state and report whether it changed.
541 * Serialised by the mac_lock.
542 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
543 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
544 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
545 * (only needed where AN bit is set in mmds)
546 * @test_alive: Test that PHY is 'alive' (online)
547 * @test_name: Get the name of a PHY-specific test/result
548 * @run_tests: Run tests and record results as appropriate (offline).
549 * Flags are the ethtool tests flags.
551 struct efx_phy_operations
{
552 int (*probe
) (struct efx_nic
*efx
);
553 int (*init
) (struct efx_nic
*efx
);
554 void (*fini
) (struct efx_nic
*efx
);
555 void (*remove
) (struct efx_nic
*efx
);
556 int (*reconfigure
) (struct efx_nic
*efx
);
557 bool (*poll
) (struct efx_nic
*efx
);
558 void (*get_settings
) (struct efx_nic
*efx
,
559 struct ethtool_cmd
*ecmd
);
560 int (*set_settings
) (struct efx_nic
*efx
,
561 struct ethtool_cmd
*ecmd
);
562 void (*set_npage_adv
) (struct efx_nic
*efx
, u32
);
563 int (*test_alive
) (struct efx_nic
*efx
);
564 const char *(*test_name
) (struct efx_nic
*efx
, unsigned int index
);
565 int (*run_tests
) (struct efx_nic
*efx
, int *results
, unsigned flags
);
566 int (*get_module_eeprom
) (struct efx_nic
*efx
,
567 struct ethtool_eeprom
*ee
,
569 int (*get_module_info
) (struct efx_nic
*efx
,
570 struct ethtool_modinfo
*modinfo
);
574 * enum efx_phy_mode - PHY operating mode flags
575 * @PHY_MODE_NORMAL: on and should pass traffic
576 * @PHY_MODE_TX_DISABLED: on with TX disabled
577 * @PHY_MODE_LOW_POWER: set to low power through MDIO
578 * @PHY_MODE_OFF: switched off through external control
579 * @PHY_MODE_SPECIAL: on but will not pass traffic
583 PHY_MODE_TX_DISABLED
= 1,
584 PHY_MODE_LOW_POWER
= 2,
586 PHY_MODE_SPECIAL
= 8,
589 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode
)
591 return !!(mode
& ~PHY_MODE_TX_DISABLED
);
595 * Efx extended statistics
597 * Not all statistics are provided by all supported MACs. The purpose
598 * is this structure is to contain the raw statistics provided by each
601 struct efx_mac_stats
{
619 u64 tx_15xx_to_jumbo
;
622 u64 tx_single_collision
;
623 u64 tx_multiple_collision
;
624 u64 tx_excessive_collision
;
626 u64 tx_late_collision
;
627 u64 tx_excessive_deferred
;
629 u64 tx_mac_src_error
;
649 u64 rx_15xx_to_jumbo
;
652 u64 rx_bad_64_to_15xx
;
653 u64 rx_bad_15xx_to_jumbo
;
657 u64 rx_false_carrier
;
661 u64 rx_internal_error
;
665 /* Number of bits used in a multicast filter hash address */
666 #define EFX_MCAST_HASH_BITS 8
668 /* Number of (single-bit) entries in a multicast filter hash */
669 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
671 /* An Efx multicast filter hash */
672 union efx_multicast_hash
{
673 u8 byte
[EFX_MCAST_HASH_ENTRIES
/ 8];
674 efx_oword_t oword
[EFX_MCAST_HASH_ENTRIES
/ sizeof(efx_oword_t
) / 8];
677 struct efx_filter_state
;
682 * struct efx_nic - an Efx NIC
683 * @name: Device name (net device name or bus id before net device registered)
684 * @pci_dev: The PCI device
685 * @type: Controller type attributes
686 * @legacy_irq: IRQ number
687 * @workqueue: Workqueue for port reconfigures and the HW monitor.
688 * Work items do not hold and must not acquire RTNL.
689 * @workqueue_name: Name of workqueue
690 * @reset_work: Scheduled reset workitem
691 * @membase_phys: Memory BAR value as physical address
692 * @membase: Memory BAR value
693 * @interrupt_mode: Interrupt mode
694 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
695 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
696 * @irq_rx_moderation: IRQ moderation time for RX event queues
697 * @msg_enable: Log message enable flags
698 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
699 * @reset_pending: Bitmask for pending resets
700 * @tx_queue: TX DMA queues
701 * @rx_queue: RX DMA queues
703 * @msi_context: Context for each MSI
704 * @extra_channel_types: Types of extra (non-traffic) channels that
705 * should be allocated for this NIC
706 * @rxq_entries: Size of receive queues requested by user.
707 * @txq_entries: Size of transmit queues requested by user.
708 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
709 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
710 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
711 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
712 * @sram_lim_qw: Qword address limit of SRAM
713 * @next_buffer_table: First available buffer table id
714 * @n_channels: Number of channels in use
715 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
716 * @n_tx_channels: Number of channels used for TX
717 * @rx_dma_len: Current maximum RX DMA length
718 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
719 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
720 * for use in sk_buff::truesize
721 * @rx_hash_key: Toeplitz hash key for RSS
722 * @rx_indir_table: Indirection table for RSS
723 * @rx_scatter: Scatter mode enabled for receives
724 * @int_error_count: Number of internal errors seen recently
725 * @int_error_expire: Time at which error count will be expired
726 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
727 * acknowledge but do nothing else.
728 * @irq_status: Interrupt status buffer
729 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
730 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
731 * @selftest_work: Work item for asynchronous self-test
732 * @mtd_list: List of MTDs attached to the NIC
733 * @nic_data: Hardware dependent state
734 * @mcdi: Management-Controller-to-Driver Interface state
735 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
736 * efx_monitor() and efx_reconfigure_port()
737 * @port_enabled: Port enabled indicator.
738 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
739 * efx_mac_work() with kernel interfaces. Safe to read under any
740 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
741 * be held to modify it.
742 * @port_initialized: Port initialized?
743 * @net_dev: Operating system network device. Consider holding the rtnl lock
744 * @stats_buffer: DMA buffer for statistics
745 * @phy_type: PHY type
746 * @phy_op: PHY interface
747 * @phy_data: PHY private data (including PHY-specific stats)
748 * @mdio: PHY MDIO interface
749 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
750 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
751 * @link_advertising: Autonegotiation advertising flags
752 * @link_state: Current state of the link
753 * @n_link_state_changes: Number of times the link has changed state
754 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
755 * @multicast_hash: Multicast hash table
756 * @wanted_fc: Wanted flow control flags
757 * @fc_disable: When non-zero flow control is disabled. Typically used to
758 * ensure that network back pressure doesn't delay dma queue flushes.
759 * Serialised by the rtnl lock.
760 * @mac_work: Work item for changing MAC promiscuity and multicast hash
761 * @loopback_mode: Loopback status
762 * @loopback_modes: Supported loopback mode bitmask
763 * @loopback_selftest: Offline self-test private state
764 * @drain_pending: Count of RX and TX queues that haven't been flushed and drained.
765 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
766 * Decremented when the efx_flush_rx_queue() is called.
767 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
768 * completed (either success or failure). Not used when MCDI is used to
769 * flush receive queues.
770 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
771 * @vf: Array of &struct efx_vf objects.
772 * @vf_count: Number of VFs intended to be enabled.
773 * @vf_init_count: Number of VFs that have been fully initialised.
774 * @vi_scale: log2 number of vnics per VF.
775 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
776 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
777 * @local_addr_list: List of local addresses. Protected by %local_lock.
778 * @local_page_list: List of DMA addressable pages used to broadcast
779 * %local_addr_list. Protected by %local_lock.
780 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
781 * @peer_work: Work item to broadcast peer addresses to VMs.
782 * @ptp_data: PTP state data
783 * @monitor_work: Hardware monitor workitem
784 * @biu_lock: BIU (bus interface unit) lock
785 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
786 * field is used by efx_test_interrupts() to verify that an
787 * interrupt has occurred.
788 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
789 * @mac_stats: MAC statistics. These include all statistics the MACs
790 * can provide. Generic code converts these into a standard
791 * &struct net_device_stats.
792 * @stats_lock: Statistics update lock. Serialises statistics fetches
793 * and access to @mac_stats.
795 * This is stored in the private area of the &struct net_device.
798 /* The following fields should be written very rarely */
801 struct pci_dev
*pci_dev
;
802 unsigned int port_num
;
803 const struct efx_nic_type
*type
;
805 bool eeh_disabled_legacy_irq
;
806 struct workqueue_struct
*workqueue
;
807 char workqueue_name
[16];
808 struct work_struct reset_work
;
809 resource_size_t membase_phys
;
810 void __iomem
*membase
;
812 enum efx_int_mode interrupt_mode
;
813 unsigned int timer_quantum_ns
;
814 bool irq_rx_adaptive
;
815 unsigned int irq_rx_moderation
;
818 enum nic_state state
;
819 unsigned long reset_pending
;
821 struct efx_channel
*channel
[EFX_MAX_CHANNELS
];
822 struct efx_msi_context msi_context
[EFX_MAX_CHANNELS
];
823 const struct efx_channel_type
*
824 extra_channel_type
[EFX_MAX_EXTRA_CHANNELS
];
826 unsigned rxq_entries
;
827 unsigned txq_entries
;
828 unsigned int txq_stop_thresh
;
829 unsigned int txq_wake_thresh
;
833 unsigned sram_lim_qw
;
834 unsigned next_buffer_table
;
836 unsigned n_rx_channels
;
838 unsigned tx_channel_offset
;
839 unsigned n_tx_channels
;
840 unsigned int rx_dma_len
;
841 unsigned int rx_buffer_order
;
842 unsigned int rx_buffer_truesize
;
843 unsigned int rx_page_buf_step
;
844 unsigned int rx_bufs_per_page
;
845 unsigned int rx_pages_per_batch
;
847 u32 rx_indir_table
[128];
850 unsigned int_error_count
;
851 unsigned long int_error_expire
;
853 bool irq_soft_enabled
;
854 struct efx_buffer irq_status
;
855 unsigned irq_zero_count
;
857 struct delayed_work selftest_work
;
859 #ifdef CONFIG_SFC_MTD
860 struct list_head mtd_list
;
864 struct efx_mcdi_data
*mcdi
;
866 struct mutex mac_lock
;
867 struct work_struct mac_work
;
870 bool port_initialized
;
871 struct net_device
*net_dev
;
873 struct efx_buffer stats_buffer
;
875 unsigned int phy_type
;
876 const struct efx_phy_operations
*phy_op
;
878 struct mdio_if_info mdio
;
879 unsigned int mdio_bus
;
880 enum efx_phy_mode phy_mode
;
882 u32 link_advertising
;
883 struct efx_link_state link_state
;
884 unsigned int n_link_state_changes
;
887 union efx_multicast_hash multicast_hash
;
892 enum efx_loopback_mode loopback_mode
;
895 void *loopback_selftest
;
897 struct efx_filter_state
*filter_state
;
899 atomic_t drain_pending
;
900 atomic_t rxq_flush_pending
;
901 atomic_t rxq_flush_outstanding
;
902 wait_queue_head_t flush_wq
;
904 #ifdef CONFIG_SFC_SRIOV
905 struct efx_channel
*vfdi_channel
;
908 unsigned vf_init_count
;
910 unsigned vf_buftbl_base
;
911 struct efx_buffer vfdi_status
;
912 struct list_head local_addr_list
;
913 struct list_head local_page_list
;
914 struct mutex local_lock
;
915 struct work_struct peer_work
;
918 struct efx_ptp_data
*ptp_data
;
920 /* The following fields may be written more often */
922 struct delayed_work monitor_work ____cacheline_aligned_in_smp
;
925 unsigned n_rx_nodesc_drop_cnt
;
926 struct efx_mac_stats mac_stats
;
927 spinlock_t stats_lock
;
930 static inline int efx_dev_registered(struct efx_nic
*efx
)
932 return efx
->net_dev
->reg_state
== NETREG_REGISTERED
;
935 static inline unsigned int efx_port_num(struct efx_nic
*efx
)
937 return efx
->port_num
;
941 * struct efx_nic_type - Efx device type definition
942 * @probe: Probe the controller
943 * @remove: Free resources allocated by probe()
944 * @init: Initialise the controller
945 * @dimension_resources: Dimension controller resources (buffer table,
946 * and VIs once the available interrupt resources are clear)
947 * @fini: Shut down the controller
948 * @monitor: Periodic function for polling link state and hardware monitor
949 * @map_reset_reason: Map ethtool reset reason to a reset method
950 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
951 * @reset: Reset the controller hardware and possibly the PHY. This will
952 * be called while the controller is uninitialised.
953 * @probe_port: Probe the MAC and PHY
954 * @remove_port: Free resources allocated by probe_port()
955 * @handle_global_event: Handle a "global" event (may be %NULL)
956 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
957 * @prepare_flush: Prepare the hardware for flushing the DMA queues
958 * (for Falcon architecture)
959 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
961 * @update_stats: Update statistics not provided by event handling
962 * @start_stats: Start the regular fetching of statistics
963 * @stop_stats: Stop the regular fetching of statistics
964 * @set_id_led: Set state of identifying LED or revert to automatic function
965 * @push_irq_moderation: Apply interrupt moderation value
966 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
967 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
968 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
969 * to the hardware. Serialised by the mac_lock.
970 * @check_mac_fault: Check MAC fault state. True if fault present.
971 * @get_wol: Get WoL configuration from driver state
972 * @set_wol: Push WoL configuration to the NIC
973 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
974 * @test_chip: Test registers. Should use efx_nic_test_registers(), and is
975 * expected to reset the NIC.
976 * @test_nvram: Test validity of NVRAM contents
977 * @mcdi_request: Send an MCDI request with the given header and SDU.
978 * The SDU length may be any value from 0 up to the protocol-
979 * defined maximum, but its buffer will be padded to a multiple
981 * @mcdi_poll_response: Test whether an MCDI response is available.
982 * @mcdi_read_response: Read the MCDI response PDU. The offset will
983 * be a multiple of 4. The length may not be, but the buffer
984 * will be padded so it is safe to round up.
985 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
986 * return an appropriate error code for aborting any current
987 * request; otherwise return 0.
988 * @revision: Hardware architecture revision
989 * @mem_map_size: Memory BAR mapped size
990 * @txd_ptr_tbl_base: TX descriptor ring base address
991 * @rxd_ptr_tbl_base: RX descriptor ring base address
992 * @buf_tbl_base: Buffer table base address
993 * @evq_ptr_tbl_base: Event queue pointer table base address
994 * @evq_rptr_tbl_base: Event queue read-pointer table base address
995 * @max_dma_mask: Maximum possible DMA mask
996 * @rx_buffer_hash_size: Size of hash at start of RX packet
997 * @rx_buffer_padding: Size of padding at end of RX packet
998 * @can_rx_scatter: NIC is able to scatter packet to multiple buffers
999 * @max_interrupt_mode: Highest capability interrupt mode supported
1000 * from &enum efx_init_mode.
1001 * @phys_addr_channels: Number of channels with physically addressed
1003 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1004 * @offload_features: net_device feature flags for protocol offload
1005 * features implemented in hardware
1007 struct efx_nic_type
{
1008 int (*probe
)(struct efx_nic
*efx
);
1009 void (*remove
)(struct efx_nic
*efx
);
1010 int (*init
)(struct efx_nic
*efx
);
1011 void (*dimension_resources
)(struct efx_nic
*efx
);
1012 void (*fini
)(struct efx_nic
*efx
);
1013 void (*monitor
)(struct efx_nic
*efx
);
1014 enum reset_type (*map_reset_reason
)(enum reset_type reason
);
1015 int (*map_reset_flags
)(u32
*flags
);
1016 int (*reset
)(struct efx_nic
*efx
, enum reset_type method
);
1017 int (*probe_port
)(struct efx_nic
*efx
);
1018 void (*remove_port
)(struct efx_nic
*efx
);
1019 bool (*handle_global_event
)(struct efx_channel
*channel
, efx_qword_t
*);
1020 int (*fini_dmaq
)(struct efx_nic
*efx
);
1021 void (*prepare_flush
)(struct efx_nic
*efx
);
1022 void (*finish_flush
)(struct efx_nic
*efx
);
1023 void (*update_stats
)(struct efx_nic
*efx
);
1024 void (*start_stats
)(struct efx_nic
*efx
);
1025 void (*stop_stats
)(struct efx_nic
*efx
);
1026 void (*set_id_led
)(struct efx_nic
*efx
, enum efx_led_mode mode
);
1027 void (*push_irq_moderation
)(struct efx_channel
*channel
);
1028 int (*reconfigure_port
)(struct efx_nic
*efx
);
1029 void (*prepare_enable_fc_tx
)(struct efx_nic
*efx
);
1030 int (*reconfigure_mac
)(struct efx_nic
*efx
);
1031 bool (*check_mac_fault
)(struct efx_nic
*efx
);
1032 void (*get_wol
)(struct efx_nic
*efx
, struct ethtool_wolinfo
*wol
);
1033 int (*set_wol
)(struct efx_nic
*efx
, u32 type
);
1034 void (*resume_wol
)(struct efx_nic
*efx
);
1035 int (*test_chip
)(struct efx_nic
*efx
, struct efx_self_tests
*tests
);
1036 int (*test_nvram
)(struct efx_nic
*efx
);
1037 void (*mcdi_request
)(struct efx_nic
*efx
,
1038 const efx_dword_t
*hdr
, size_t hdr_len
,
1039 const efx_dword_t
*sdu
, size_t sdu_len
);
1040 bool (*mcdi_poll_response
)(struct efx_nic
*efx
);
1041 void (*mcdi_read_response
)(struct efx_nic
*efx
, efx_dword_t
*pdu
,
1042 size_t pdu_offset
, size_t pdu_len
);
1043 int (*mcdi_poll_reboot
)(struct efx_nic
*efx
);
1046 unsigned int mem_map_size
;
1047 unsigned int txd_ptr_tbl_base
;
1048 unsigned int rxd_ptr_tbl_base
;
1049 unsigned int buf_tbl_base
;
1050 unsigned int evq_ptr_tbl_base
;
1051 unsigned int evq_rptr_tbl_base
;
1053 unsigned int rx_buffer_hash_size
;
1054 unsigned int rx_buffer_padding
;
1055 bool can_rx_scatter
;
1056 unsigned int max_interrupt_mode
;
1057 unsigned int phys_addr_channels
;
1058 unsigned int timer_period_max
;
1059 netdev_features_t offload_features
;
1062 /**************************************************************************
1064 * Prototypes and inline functions
1066 *************************************************************************/
1068 static inline struct efx_channel
*
1069 efx_get_channel(struct efx_nic
*efx
, unsigned index
)
1071 EFX_BUG_ON_PARANOID(index
>= efx
->n_channels
);
1072 return efx
->channel
[index
];
1075 /* Iterate over all used channels */
1076 #define efx_for_each_channel(_channel, _efx) \
1077 for (_channel = (_efx)->channel[0]; \
1079 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1080 (_efx)->channel[_channel->channel + 1] : NULL)
1082 /* Iterate over all used channels in reverse */
1083 #define efx_for_each_channel_rev(_channel, _efx) \
1084 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1086 _channel = _channel->channel ? \
1087 (_efx)->channel[_channel->channel - 1] : NULL)
1089 static inline struct efx_tx_queue
*
1090 efx_get_tx_queue(struct efx_nic
*efx
, unsigned index
, unsigned type
)
1092 EFX_BUG_ON_PARANOID(index
>= efx
->n_tx_channels
||
1093 type
>= EFX_TXQ_TYPES
);
1094 return &efx
->channel
[efx
->tx_channel_offset
+ index
]->tx_queue
[type
];
1097 static inline bool efx_channel_has_tx_queues(struct efx_channel
*channel
)
1099 return channel
->channel
- channel
->efx
->tx_channel_offset
<
1100 channel
->efx
->n_tx_channels
;
1103 static inline struct efx_tx_queue
*
1104 efx_channel_get_tx_queue(struct efx_channel
*channel
, unsigned type
)
1106 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel
) ||
1107 type
>= EFX_TXQ_TYPES
);
1108 return &channel
->tx_queue
[type
];
1111 static inline bool efx_tx_queue_used(struct efx_tx_queue
*tx_queue
)
1113 return !(tx_queue
->efx
->net_dev
->num_tc
< 2 &&
1114 tx_queue
->queue
& EFX_TXQ_TYPE_HIGHPRI
);
1117 /* Iterate over all TX queues belonging to a channel */
1118 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1119 if (!efx_channel_has_tx_queues(_channel)) \
1122 for (_tx_queue = (_channel)->tx_queue; \
1123 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1124 efx_tx_queue_used(_tx_queue); \
1127 /* Iterate over all possible TX queues belonging to a channel */
1128 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1129 if (!efx_channel_has_tx_queues(_channel)) \
1132 for (_tx_queue = (_channel)->tx_queue; \
1133 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1136 static inline bool efx_channel_has_rx_queue(struct efx_channel
*channel
)
1138 return channel
->rx_queue
.core_index
>= 0;
1141 static inline struct efx_rx_queue
*
1142 efx_channel_get_rx_queue(struct efx_channel
*channel
)
1144 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel
));
1145 return &channel
->rx_queue
;
1148 /* Iterate over all RX queues belonging to a channel */
1149 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1150 if (!efx_channel_has_rx_queue(_channel)) \
1153 for (_rx_queue = &(_channel)->rx_queue; \
1157 static inline struct efx_channel
*
1158 efx_rx_queue_channel(struct efx_rx_queue
*rx_queue
)
1160 return container_of(rx_queue
, struct efx_channel
, rx_queue
);
1163 static inline int efx_rx_queue_index(struct efx_rx_queue
*rx_queue
)
1165 return efx_rx_queue_channel(rx_queue
)->channel
;
1168 /* Returns a pointer to the specified receive buffer in the RX
1171 static inline struct efx_rx_buffer
*efx_rx_buffer(struct efx_rx_queue
*rx_queue
,
1174 return &rx_queue
->buffer
[index
];
1179 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1181 * This calculates the maximum frame length that will be used for a
1182 * given MTU. The frame length will be equal to the MTU plus a
1183 * constant amount of header space and padding. This is the quantity
1184 * that the net driver will program into the MAC as the maximum frame
1187 * The 10G MAC requires 8-byte alignment on the frame
1188 * length, so we round up to the nearest 8.
1190 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1191 * XGMII cycle). If the frame length reaches the maximum value in the
1192 * same cycle, the XMAC can miss the IPG altogether. We work around
1193 * this by adding a further 16 bytes.
1195 #define EFX_MAX_FRAME_LEN(mtu) \
1196 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1198 static inline bool efx_xmit_with_hwtstamp(struct sk_buff
*skb
)
1200 return skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
;
1202 static inline void efx_xmit_hwtstamp_pending(struct sk_buff
*skb
)
1204 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
1207 #endif /* EFX_NET_DRIVER_H */