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sfc: Use proper macros to declare and access MCDI arrays
[deliverable/linux.git] / drivers / net / ethernet / sfc / ptp.c
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2011 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10 /* Theory of operation:
11 *
12 * PTP support is assisted by firmware running on the MC, which provides
13 * the hardware timestamping capabilities. Both transmitted and received
14 * PTP event packets are queued onto internal queues for subsequent processing;
15 * this is because the MC operations are relatively long and would block
16 * block NAPI/interrupt operation.
17 *
18 * Receive event processing:
19 * The event contains the packet's UUID and sequence number, together
20 * with the hardware timestamp. The PTP receive packet queue is searched
21 * for this UUID/sequence number and, if found, put on a pending queue.
22 * Packets not matching are delivered without timestamps (MCDI events will
23 * always arrive after the actual packet).
24 * It is important for the operation of the PTP protocol that the ordering
25 * of packets between the event and general port is maintained.
26 *
27 * Work queue processing:
28 * If work waiting, synchronise host/hardware time
29 *
30 * Transmit: send packet through MC, which returns the transmission time
31 * that is converted to an appropriate timestamp.
32 *
33 * Receive: the packet's reception time is converted to an appropriate
34 * timestamp.
35 */
36 #include <linux/ip.h>
37 #include <linux/udp.h>
38 #include <linux/time.h>
39 #include <linux/ktime.h>
40 #include <linux/module.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/pps_kernel.h>
43 #include <linux/ptp_clock_kernel.h>
44 #include "net_driver.h"
45 #include "efx.h"
46 #include "mcdi.h"
47 #include "mcdi_pcol.h"
48 #include "io.h"
49 #include "regs.h"
50 #include "nic.h"
51
52 /* Maximum number of events expected to make up a PTP event */
53 #define MAX_EVENT_FRAGS 3
54
55 /* Maximum delay, ms, to begin synchronisation */
56 #define MAX_SYNCHRONISE_WAIT_MS 2
57
58 /* How long, at most, to spend synchronising */
59 #define SYNCHRONISE_PERIOD_NS 250000
60
61 /* How often to update the shared memory time */
62 #define SYNCHRONISATION_GRANULARITY_NS 200
63
64 /* Minimum permitted length of a (corrected) synchronisation time */
65 #define MIN_SYNCHRONISATION_NS 120
66
67 /* Maximum permitted length of a (corrected) synchronisation time */
68 #define MAX_SYNCHRONISATION_NS 1000
69
70 /* How many (MC) receive events that can be queued */
71 #define MAX_RECEIVE_EVENTS 8
72
73 /* Length of (modified) moving average. */
74 #define AVERAGE_LENGTH 16
75
76 /* How long an unmatched event or packet can be held */
77 #define PKT_EVENT_LIFETIME_MS 10
78
79 /* Offsets into PTP packet for identification. These offsets are from the
80 * start of the IP header, not the MAC header. Note that neither PTP V1 nor
81 * PTP V2 permit the use of IPV4 options.
82 */
83 #define PTP_DPORT_OFFSET 22
84
85 #define PTP_V1_VERSION_LENGTH 2
86 #define PTP_V1_VERSION_OFFSET 28
87
88 #define PTP_V1_UUID_LENGTH 6
89 #define PTP_V1_UUID_OFFSET 50
90
91 #define PTP_V1_SEQUENCE_LENGTH 2
92 #define PTP_V1_SEQUENCE_OFFSET 58
93
94 /* The minimum length of a PTP V1 packet for offsets, etc. to be valid:
95 * includes IP header.
96 */
97 #define PTP_V1_MIN_LENGTH 64
98
99 #define PTP_V2_VERSION_LENGTH 1
100 #define PTP_V2_VERSION_OFFSET 29
101
102 #define PTP_V2_UUID_LENGTH 8
103 #define PTP_V2_UUID_OFFSET 48
104
105 /* Although PTP V2 UUIDs are comprised a ClockIdentity (8) and PortNumber (2),
106 * the MC only captures the last six bytes of the clock identity. These values
107 * reflect those, not the ones used in the standard. The standard permits
108 * mapping of V1 UUIDs to V2 UUIDs with these same values.
109 */
110 #define PTP_V2_MC_UUID_LENGTH 6
111 #define PTP_V2_MC_UUID_OFFSET 50
112
113 #define PTP_V2_SEQUENCE_LENGTH 2
114 #define PTP_V2_SEQUENCE_OFFSET 58
115
116 /* The minimum length of a PTP V2 packet for offsets, etc. to be valid:
117 * includes IP header.
118 */
119 #define PTP_V2_MIN_LENGTH 63
120
121 #define PTP_MIN_LENGTH 63
122
123 #define PTP_ADDRESS 0xe0000181 /* 224.0.1.129 */
124 #define PTP_EVENT_PORT 319
125 #define PTP_GENERAL_PORT 320
126
127 /* Annoyingly the format of the version numbers are different between
128 * versions 1 and 2 so it isn't possible to simply look for 1 or 2.
129 */
130 #define PTP_VERSION_V1 1
131
132 #define PTP_VERSION_V2 2
133 #define PTP_VERSION_V2_MASK 0x0f
134
135 enum ptp_packet_state {
136 PTP_PACKET_STATE_UNMATCHED = 0,
137 PTP_PACKET_STATE_MATCHED,
138 PTP_PACKET_STATE_TIMED_OUT,
139 PTP_PACKET_STATE_MATCH_UNWANTED
140 };
141
142 /* NIC synchronised with single word of time only comprising
143 * partial seconds and full nanoseconds: 10^9 ~ 2^30 so 2 bits for seconds.
144 */
145 #define MC_NANOSECOND_BITS 30
146 #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1)
147 #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1)
148
149 /* Maximum parts-per-billion adjustment that is acceptable */
150 #define MAX_PPB 1000000
151
152 /* Number of bits required to hold the above */
153 #define MAX_PPB_BITS 20
154
155 /* Number of extra bits allowed when calculating fractional ns.
156 * EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS + MAX_PPB_BITS should
157 * be less than 63.
158 */
159 #define PPB_EXTRA_BITS 2
160
161 /* Precalculate scale word to avoid long long division at runtime */
162 #define PPB_SCALE_WORD ((1LL << (PPB_EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS +\
163 MAX_PPB_BITS)) / 1000000000LL)
164
165 #define PTP_SYNC_ATTEMPTS 4
166
167 /**
168 * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area.
169 * @words: UUID and (partial) sequence number
170 * @expiry: Time after which the packet should be delivered irrespective of
171 * event arrival.
172 * @state: The state of the packet - whether it is ready for processing or
173 * whether that is of no interest.
174 */
175 struct efx_ptp_match {
176 u32 words[DIV_ROUND_UP(PTP_V1_UUID_LENGTH, 4)];
177 unsigned long expiry;
178 enum ptp_packet_state state;
179 };
180
181 /**
182 * struct efx_ptp_event_rx - A PTP receive event (from MC)
183 * @seq0: First part of (PTP) UUID
184 * @seq1: Second part of (PTP) UUID and sequence number
185 * @hwtimestamp: Event timestamp
186 */
187 struct efx_ptp_event_rx {
188 struct list_head link;
189 u32 seq0;
190 u32 seq1;
191 ktime_t hwtimestamp;
192 unsigned long expiry;
193 };
194
195 /**
196 * struct efx_ptp_timeset - Synchronisation between host and MC
197 * @host_start: Host time immediately before hardware timestamp taken
198 * @seconds: Hardware timestamp, seconds
199 * @nanoseconds: Hardware timestamp, nanoseconds
200 * @host_end: Host time immediately after hardware timestamp taken
201 * @waitns: Number of nanoseconds between hardware timestamp being read and
202 * host end time being seen
203 * @window: Difference of host_end and host_start
204 * @valid: Whether this timeset is valid
205 */
206 struct efx_ptp_timeset {
207 u32 host_start;
208 u32 seconds;
209 u32 nanoseconds;
210 u32 host_end;
211 u32 waitns;
212 u32 window; /* Derived: end - start, allowing for wrap */
213 };
214
215 /**
216 * struct efx_ptp_data - Precision Time Protocol (PTP) state
217 * @channel: The PTP channel
218 * @rxq: Receive queue (awaiting timestamps)
219 * @txq: Transmit queue
220 * @evt_list: List of MC receive events awaiting packets
221 * @evt_free_list: List of free events
222 * @evt_lock: Lock for manipulating evt_list and evt_free_list
223 * @rx_evts: Instantiated events (on evt_list and evt_free_list)
224 * @workwq: Work queue for processing pending PTP operations
225 * @work: Work task
226 * @reset_required: A serious error has occurred and the PTP task needs to be
227 * reset (disable, enable).
228 * @rxfilter_event: Receive filter when operating
229 * @rxfilter_general: Receive filter when operating
230 * @config: Current timestamp configuration
231 * @enabled: PTP operation enabled
232 * @mode: Mode in which PTP operating (PTP version)
233 * @evt_frags: Partly assembled PTP events
234 * @evt_frag_idx: Current fragment number
235 * @evt_code: Last event code
236 * @start: Address at which MC indicates ready for synchronisation
237 * @host_time_pps: Host time at last PPS
238 * @last_sync_ns: Last number of nanoseconds between readings when synchronising
239 * @base_sync_ns: Number of nanoseconds for last synchronisation.
240 * @base_sync_valid: Whether base_sync_time is valid.
241 * @current_adjfreq: Current ppb adjustment.
242 * @phc_clock: Pointer to registered phc device
243 * @phc_clock_info: Registration structure for phc device
244 * @pps_work: pps work task for handling pps events
245 * @pps_workwq: pps work queue
246 * @nic_ts_enabled: Flag indicating if NIC generated TS events are handled
247 * @txbuf: Buffer for use when transmitting (PTP) packets to MC (avoids
248 * allocations in main data path).
249 * @debug_ptp_dir: PTP debugfs directory
250 * @missed_rx_sync: Number of packets received without syncrhonisation.
251 * @good_syncs: Number of successful synchronisations.
252 * @no_time_syncs: Number of synchronisations with no good times.
253 * @bad_sync_durations: Number of synchronisations with bad durations.
254 * @bad_syncs: Number of failed synchronisations.
255 * @last_sync_time: Number of nanoseconds for last synchronisation.
256 * @sync_timeouts: Number of synchronisation timeouts
257 * @fast_syncs: Number of synchronisations requiring short delay
258 * @min_sync_delta: Minimum time between event and synchronisation
259 * @max_sync_delta: Maximum time between event and synchronisation
260 * @average_sync_delta: Average time between event and synchronisation.
261 * Modified moving average.
262 * @last_sync_delta: Last time between event and synchronisation
263 * @mc_stats: Context value for MC statistics
264 * @timeset: Last set of synchronisation statistics.
265 */
266 struct efx_ptp_data {
267 struct efx_channel *channel;
268 struct sk_buff_head rxq;
269 struct sk_buff_head txq;
270 struct list_head evt_list;
271 struct list_head evt_free_list;
272 spinlock_t evt_lock;
273 struct efx_ptp_event_rx rx_evts[MAX_RECEIVE_EVENTS];
274 struct workqueue_struct *workwq;
275 struct work_struct work;
276 bool reset_required;
277 u32 rxfilter_event;
278 u32 rxfilter_general;
279 bool rxfilter_installed;
280 struct hwtstamp_config config;
281 bool enabled;
282 unsigned int mode;
283 efx_qword_t evt_frags[MAX_EVENT_FRAGS];
284 int evt_frag_idx;
285 int evt_code;
286 struct efx_buffer start;
287 struct pps_event_time host_time_pps;
288 unsigned last_sync_ns;
289 unsigned base_sync_ns;
290 bool base_sync_valid;
291 s64 current_adjfreq;
292 struct ptp_clock *phc_clock;
293 struct ptp_clock_info phc_clock_info;
294 struct work_struct pps_work;
295 struct workqueue_struct *pps_workwq;
296 bool nic_ts_enabled;
297 MCDI_DECLARE_BUF(txbuf, MC_CMD_PTP_IN_TRANSMIT_LENMAX);
298 struct efx_ptp_timeset
299 timeset[MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM];
300 };
301
302 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta);
303 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta);
304 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts);
305 static int efx_phc_settime(struct ptp_clock_info *ptp,
306 const struct timespec *e_ts);
307 static int efx_phc_enable(struct ptp_clock_info *ptp,
308 struct ptp_clock_request *request, int on);
309
310 /* Enable MCDI PTP support. */
311 static int efx_ptp_enable(struct efx_nic *efx)
312 {
313 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ENABLE_LEN);
314
315 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ENABLE);
316 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_QUEUE,
317 efx->ptp_data->channel->channel);
318 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_MODE, efx->ptp_data->mode);
319
320 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
321 NULL, 0, NULL);
322 }
323
324 /* Disable MCDI PTP support.
325 *
326 * Note that this function should never rely on the presence of ptp_data -
327 * may be called before that exists.
328 */
329 static int efx_ptp_disable(struct efx_nic *efx)
330 {
331 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_DISABLE_LEN);
332
333 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_DISABLE);
334 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
335 NULL, 0, NULL);
336 }
337
338 static void efx_ptp_deliver_rx_queue(struct sk_buff_head *q)
339 {
340 struct sk_buff *skb;
341
342 while ((skb = skb_dequeue(q))) {
343 local_bh_disable();
344 netif_receive_skb(skb);
345 local_bh_enable();
346 }
347 }
348
349 static void efx_ptp_handle_no_channel(struct efx_nic *efx)
350 {
351 netif_err(efx, drv, efx->net_dev,
352 "ERROR: PTP requires MSI-X and 1 additional interrupt"
353 "vector. PTP disabled\n");
354 }
355
356 /* Repeatedly send the host time to the MC which will capture the hardware
357 * time.
358 */
359 static void efx_ptp_send_times(struct efx_nic *efx,
360 struct pps_event_time *last_time)
361 {
362 struct pps_event_time now;
363 struct timespec limit;
364 struct efx_ptp_data *ptp = efx->ptp_data;
365 struct timespec start;
366 int *mc_running = ptp->start.addr;
367
368 pps_get_ts(&now);
369 start = now.ts_real;
370 limit = now.ts_real;
371 timespec_add_ns(&limit, SYNCHRONISE_PERIOD_NS);
372
373 /* Write host time for specified period or until MC is done */
374 while ((timespec_compare(&now.ts_real, &limit) < 0) &&
375 ACCESS_ONCE(*mc_running)) {
376 struct timespec update_time;
377 unsigned int host_time;
378
379 /* Don't update continuously to avoid saturating the PCIe bus */
380 update_time = now.ts_real;
381 timespec_add_ns(&update_time, SYNCHRONISATION_GRANULARITY_NS);
382 do {
383 pps_get_ts(&now);
384 } while ((timespec_compare(&now.ts_real, &update_time) < 0) &&
385 ACCESS_ONCE(*mc_running));
386
387 /* Synchronise NIC with single word of time only */
388 host_time = (now.ts_real.tv_sec << MC_NANOSECOND_BITS |
389 now.ts_real.tv_nsec);
390 /* Update host time in NIC memory */
391 _efx_writed(efx, cpu_to_le32(host_time),
392 FR_CZ_MC_TREG_SMEM + MC_SMEM_P0_PTP_TIME_OFST);
393 }
394 *last_time = now;
395 }
396
397 /* Read a timeset from the MC's results and partial process. */
398 static void efx_ptp_read_timeset(MCDI_DECLARE_STRUCT_PTR(data),
399 struct efx_ptp_timeset *timeset)
400 {
401 unsigned start_ns, end_ns;
402
403 timeset->host_start = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTSTART);
404 timeset->seconds = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_SECONDS);
405 timeset->nanoseconds = MCDI_DWORD(data,
406 PTP_OUT_SYNCHRONIZE_NANOSECONDS);
407 timeset->host_end = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTEND),
408 timeset->waitns = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_WAITNS);
409
410 /* Ignore seconds */
411 start_ns = timeset->host_start & MC_NANOSECOND_MASK;
412 end_ns = timeset->host_end & MC_NANOSECOND_MASK;
413 /* Allow for rollover */
414 if (end_ns < start_ns)
415 end_ns += NSEC_PER_SEC;
416 /* Determine duration of operation */
417 timeset->window = end_ns - start_ns;
418 }
419
420 /* Process times received from MC.
421 *
422 * Extract times from returned results, and establish the minimum value
423 * seen. The minimum value represents the "best" possible time and events
424 * too much greater than this are rejected - the machine is, perhaps, too
425 * busy. A number of readings are taken so that, hopefully, at least one good
426 * synchronisation will be seen in the results.
427 */
428 static int
429 efx_ptp_process_times(struct efx_nic *efx, MCDI_DECLARE_STRUCT_PTR(synch_buf),
430 size_t response_length,
431 const struct pps_event_time *last_time)
432 {
433 unsigned number_readings =
434 MCDI_VAR_ARRAY_LEN(response_length,
435 PTP_OUT_SYNCHRONIZE_TIMESET);
436 unsigned i;
437 unsigned total;
438 unsigned ngood = 0;
439 unsigned last_good = 0;
440 struct efx_ptp_data *ptp = efx->ptp_data;
441 u32 last_sec;
442 u32 start_sec;
443 struct timespec delta;
444
445 if (number_readings == 0)
446 return -EAGAIN;
447
448 /* Read the set of results and increment stats for any results that
449 * appera to be erroneous.
450 */
451 for (i = 0; i < number_readings; i++) {
452 efx_ptp_read_timeset(
453 MCDI_ARRAY_STRUCT_PTR(synch_buf,
454 PTP_OUT_SYNCHRONIZE_TIMESET, i),
455 &ptp->timeset[i]);
456 }
457
458 /* Find the last good host-MC synchronization result. The MC times
459 * when it finishes reading the host time so the corrected window time
460 * should be fairly constant for a given platform.
461 */
462 total = 0;
463 for (i = 0; i < number_readings; i++)
464 if (ptp->timeset[i].window > ptp->timeset[i].waitns) {
465 unsigned win;
466
467 win = ptp->timeset[i].window - ptp->timeset[i].waitns;
468 if (win >= MIN_SYNCHRONISATION_NS &&
469 win < MAX_SYNCHRONISATION_NS) {
470 total += ptp->timeset[i].window;
471 ngood++;
472 last_good = i;
473 }
474 }
475
476 if (ngood == 0) {
477 netif_warn(efx, drv, efx->net_dev,
478 "PTP no suitable synchronisations %dns\n",
479 ptp->base_sync_ns);
480 return -EAGAIN;
481 }
482
483 /* Average minimum this synchronisation */
484 ptp->last_sync_ns = DIV_ROUND_UP(total, ngood);
485 if (!ptp->base_sync_valid || (ptp->last_sync_ns < ptp->base_sync_ns)) {
486 ptp->base_sync_valid = true;
487 ptp->base_sync_ns = ptp->last_sync_ns;
488 }
489
490 /* Calculate delay from actual PPS to last_time */
491 delta.tv_nsec =
492 ptp->timeset[last_good].nanoseconds +
493 last_time->ts_real.tv_nsec -
494 (ptp->timeset[last_good].host_start & MC_NANOSECOND_MASK);
495
496 /* It is possible that the seconds rolled over between taking
497 * the start reading and the last value written by the host. The
498 * timescales are such that a gap of more than one second is never
499 * expected.
500 */
501 start_sec = ptp->timeset[last_good].host_start >> MC_NANOSECOND_BITS;
502 last_sec = last_time->ts_real.tv_sec & MC_SECOND_MASK;
503 if (start_sec != last_sec) {
504 if (((start_sec + 1) & MC_SECOND_MASK) != last_sec) {
505 netif_warn(efx, hw, efx->net_dev,
506 "PTP bad synchronisation seconds\n");
507 return -EAGAIN;
508 } else {
509 delta.tv_sec = 1;
510 }
511 } else {
512 delta.tv_sec = 0;
513 }
514
515 ptp->host_time_pps = *last_time;
516 pps_sub_ts(&ptp->host_time_pps, delta);
517
518 return 0;
519 }
520
521 /* Synchronize times between the host and the MC */
522 static int efx_ptp_synchronize(struct efx_nic *efx, unsigned int num_readings)
523 {
524 struct efx_ptp_data *ptp = efx->ptp_data;
525 MCDI_DECLARE_BUF(synch_buf, MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX);
526 size_t response_length;
527 int rc;
528 unsigned long timeout;
529 struct pps_event_time last_time = {};
530 unsigned int loops = 0;
531 int *start = ptp->start.addr;
532
533 MCDI_SET_DWORD(synch_buf, PTP_IN_OP, MC_CMD_PTP_OP_SYNCHRONIZE);
534 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_NUMTIMESETS,
535 num_readings);
536 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR_LO,
537 (u32)ptp->start.dma_addr);
538 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR_HI,
539 (u32)((u64)ptp->start.dma_addr >> 32));
540
541 /* Clear flag that signals MC ready */
542 ACCESS_ONCE(*start) = 0;
543 efx_mcdi_rpc_start(efx, MC_CMD_PTP, synch_buf,
544 MC_CMD_PTP_IN_SYNCHRONIZE_LEN);
545
546 /* Wait for start from MCDI (or timeout) */
547 timeout = jiffies + msecs_to_jiffies(MAX_SYNCHRONISE_WAIT_MS);
548 while (!ACCESS_ONCE(*start) && (time_before(jiffies, timeout))) {
549 udelay(20); /* Usually start MCDI execution quickly */
550 loops++;
551 }
552
553 if (ACCESS_ONCE(*start))
554 efx_ptp_send_times(efx, &last_time);
555
556 /* Collect results */
557 rc = efx_mcdi_rpc_finish(efx, MC_CMD_PTP,
558 MC_CMD_PTP_IN_SYNCHRONIZE_LEN,
559 synch_buf, sizeof(synch_buf),
560 &response_length);
561 if (rc == 0)
562 rc = efx_ptp_process_times(efx, synch_buf, response_length,
563 &last_time);
564
565 return rc;
566 }
567
568 /* Transmit a PTP packet, via the MCDI interface, to the wire. */
569 static int efx_ptp_xmit_skb(struct efx_nic *efx, struct sk_buff *skb)
570 {
571 struct efx_ptp_data *ptp_data = efx->ptp_data;
572 struct skb_shared_hwtstamps timestamps;
573 int rc = -EIO;
574 /* MCDI driver requires word aligned lengths */
575 size_t len = ALIGN(MC_CMD_PTP_IN_TRANSMIT_LEN(skb->len), 4);
576 MCDI_DECLARE_BUF(txtime, MC_CMD_PTP_OUT_TRANSMIT_LEN);
577
578 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_OP, MC_CMD_PTP_OP_TRANSMIT);
579 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_TRANSMIT_LENGTH, skb->len);
580 if (skb_shinfo(skb)->nr_frags != 0) {
581 rc = skb_linearize(skb);
582 if (rc != 0)
583 goto fail;
584 }
585
586 if (skb->ip_summed == CHECKSUM_PARTIAL) {
587 rc = skb_checksum_help(skb);
588 if (rc != 0)
589 goto fail;
590 }
591 skb_copy_from_linear_data(skb,
592 MCDI_PTR(ptp_data->txbuf,
593 PTP_IN_TRANSMIT_PACKET),
594 len);
595 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, ptp_data->txbuf, len, txtime,
596 sizeof(txtime), &len);
597 if (rc != 0)
598 goto fail;
599
600 memset(&timestamps, 0, sizeof(timestamps));
601 timestamps.hwtstamp = ktime_set(
602 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_SECONDS),
603 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_NANOSECONDS));
604
605 skb_tstamp_tx(skb, &timestamps);
606
607 rc = 0;
608
609 fail:
610 dev_kfree_skb(skb);
611
612 return rc;
613 }
614
615 static void efx_ptp_drop_time_expired_events(struct efx_nic *efx)
616 {
617 struct efx_ptp_data *ptp = efx->ptp_data;
618 struct list_head *cursor;
619 struct list_head *next;
620
621 /* Drop time-expired events */
622 spin_lock_bh(&ptp->evt_lock);
623 if (!list_empty(&ptp->evt_list)) {
624 list_for_each_safe(cursor, next, &ptp->evt_list) {
625 struct efx_ptp_event_rx *evt;
626
627 evt = list_entry(cursor, struct efx_ptp_event_rx,
628 link);
629 if (time_after(jiffies, evt->expiry)) {
630 list_move(&evt->link, &ptp->evt_free_list);
631 netif_warn(efx, hw, efx->net_dev,
632 "PTP rx event dropped\n");
633 }
634 }
635 }
636 spin_unlock_bh(&ptp->evt_lock);
637 }
638
639 static enum ptp_packet_state efx_ptp_match_rx(struct efx_nic *efx,
640 struct sk_buff *skb)
641 {
642 struct efx_ptp_data *ptp = efx->ptp_data;
643 bool evts_waiting;
644 struct list_head *cursor;
645 struct list_head *next;
646 struct efx_ptp_match *match;
647 enum ptp_packet_state rc = PTP_PACKET_STATE_UNMATCHED;
648
649 spin_lock_bh(&ptp->evt_lock);
650 evts_waiting = !list_empty(&ptp->evt_list);
651 spin_unlock_bh(&ptp->evt_lock);
652
653 if (!evts_waiting)
654 return PTP_PACKET_STATE_UNMATCHED;
655
656 match = (struct efx_ptp_match *)skb->cb;
657 /* Look for a matching timestamp in the event queue */
658 spin_lock_bh(&ptp->evt_lock);
659 list_for_each_safe(cursor, next, &ptp->evt_list) {
660 struct efx_ptp_event_rx *evt;
661
662 evt = list_entry(cursor, struct efx_ptp_event_rx, link);
663 if ((evt->seq0 == match->words[0]) &&
664 (evt->seq1 == match->words[1])) {
665 struct skb_shared_hwtstamps *timestamps;
666
667 /* Match - add in hardware timestamp */
668 timestamps = skb_hwtstamps(skb);
669 timestamps->hwtstamp = evt->hwtimestamp;
670
671 match->state = PTP_PACKET_STATE_MATCHED;
672 rc = PTP_PACKET_STATE_MATCHED;
673 list_move(&evt->link, &ptp->evt_free_list);
674 break;
675 }
676 }
677 spin_unlock_bh(&ptp->evt_lock);
678
679 return rc;
680 }
681
682 /* Process any queued receive events and corresponding packets
683 *
684 * q is returned with all the packets that are ready for delivery.
685 * true is returned if at least one of those packets requires
686 * synchronisation.
687 */
688 static bool efx_ptp_process_events(struct efx_nic *efx, struct sk_buff_head *q)
689 {
690 struct efx_ptp_data *ptp = efx->ptp_data;
691 bool rc = false;
692 struct sk_buff *skb;
693
694 while ((skb = skb_dequeue(&ptp->rxq))) {
695 struct efx_ptp_match *match;
696
697 match = (struct efx_ptp_match *)skb->cb;
698 if (match->state == PTP_PACKET_STATE_MATCH_UNWANTED) {
699 __skb_queue_tail(q, skb);
700 } else if (efx_ptp_match_rx(efx, skb) ==
701 PTP_PACKET_STATE_MATCHED) {
702 rc = true;
703 __skb_queue_tail(q, skb);
704 } else if (time_after(jiffies, match->expiry)) {
705 match->state = PTP_PACKET_STATE_TIMED_OUT;
706 netif_warn(efx, rx_err, efx->net_dev,
707 "PTP packet - no timestamp seen\n");
708 __skb_queue_tail(q, skb);
709 } else {
710 /* Replace unprocessed entry and stop */
711 skb_queue_head(&ptp->rxq, skb);
712 break;
713 }
714 }
715
716 return rc;
717 }
718
719 /* Complete processing of a received packet */
720 static inline void efx_ptp_process_rx(struct efx_nic *efx, struct sk_buff *skb)
721 {
722 local_bh_disable();
723 netif_receive_skb(skb);
724 local_bh_enable();
725 }
726
727 static int efx_ptp_start(struct efx_nic *efx)
728 {
729 struct efx_ptp_data *ptp = efx->ptp_data;
730 struct efx_filter_spec rxfilter;
731 int rc;
732
733 ptp->reset_required = false;
734
735 /* Must filter on both event and general ports to ensure
736 * that there is no packet re-ordering.
737 */
738 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0,
739 efx_rx_queue_index(
740 efx_channel_get_rx_queue(ptp->channel)));
741 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP,
742 htonl(PTP_ADDRESS),
743 htons(PTP_EVENT_PORT));
744 if (rc != 0)
745 return rc;
746
747 rc = efx_filter_insert_filter(efx, &rxfilter, true);
748 if (rc < 0)
749 return rc;
750 ptp->rxfilter_event = rc;
751
752 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0,
753 efx_rx_queue_index(
754 efx_channel_get_rx_queue(ptp->channel)));
755 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP,
756 htonl(PTP_ADDRESS),
757 htons(PTP_GENERAL_PORT));
758 if (rc != 0)
759 goto fail;
760
761 rc = efx_filter_insert_filter(efx, &rxfilter, true);
762 if (rc < 0)
763 goto fail;
764 ptp->rxfilter_general = rc;
765
766 rc = efx_ptp_enable(efx);
767 if (rc != 0)
768 goto fail2;
769
770 ptp->evt_frag_idx = 0;
771 ptp->current_adjfreq = 0;
772 ptp->rxfilter_installed = true;
773
774 return 0;
775
776 fail2:
777 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
778 ptp->rxfilter_general);
779 fail:
780 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
781 ptp->rxfilter_event);
782
783 return rc;
784 }
785
786 static int efx_ptp_stop(struct efx_nic *efx)
787 {
788 struct efx_ptp_data *ptp = efx->ptp_data;
789 int rc = efx_ptp_disable(efx);
790 struct list_head *cursor;
791 struct list_head *next;
792
793 if (ptp->rxfilter_installed) {
794 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
795 ptp->rxfilter_general);
796 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
797 ptp->rxfilter_event);
798 ptp->rxfilter_installed = false;
799 }
800
801 /* Make sure RX packets are really delivered */
802 efx_ptp_deliver_rx_queue(&efx->ptp_data->rxq);
803 skb_queue_purge(&efx->ptp_data->txq);
804
805 /* Drop any pending receive events */
806 spin_lock_bh(&efx->ptp_data->evt_lock);
807 list_for_each_safe(cursor, next, &efx->ptp_data->evt_list) {
808 list_move(cursor, &efx->ptp_data->evt_free_list);
809 }
810 spin_unlock_bh(&efx->ptp_data->evt_lock);
811
812 return rc;
813 }
814
815 static void efx_ptp_pps_worker(struct work_struct *work)
816 {
817 struct efx_ptp_data *ptp =
818 container_of(work, struct efx_ptp_data, pps_work);
819 struct efx_nic *efx = ptp->channel->efx;
820 struct ptp_clock_event ptp_evt;
821
822 if (efx_ptp_synchronize(efx, PTP_SYNC_ATTEMPTS))
823 return;
824
825 ptp_evt.type = PTP_CLOCK_PPSUSR;
826 ptp_evt.pps_times = ptp->host_time_pps;
827 ptp_clock_event(ptp->phc_clock, &ptp_evt);
828 }
829
830 /* Process any pending transmissions and timestamp any received packets.
831 */
832 static void efx_ptp_worker(struct work_struct *work)
833 {
834 struct efx_ptp_data *ptp_data =
835 container_of(work, struct efx_ptp_data, work);
836 struct efx_nic *efx = ptp_data->channel->efx;
837 struct sk_buff *skb;
838 struct sk_buff_head tempq;
839
840 if (ptp_data->reset_required) {
841 efx_ptp_stop(efx);
842 efx_ptp_start(efx);
843 return;
844 }
845
846 efx_ptp_drop_time_expired_events(efx);
847
848 __skb_queue_head_init(&tempq);
849 if (efx_ptp_process_events(efx, &tempq) ||
850 !skb_queue_empty(&ptp_data->txq)) {
851
852 while ((skb = skb_dequeue(&ptp_data->txq)))
853 efx_ptp_xmit_skb(efx, skb);
854 }
855
856 while ((skb = __skb_dequeue(&tempq)))
857 efx_ptp_process_rx(efx, skb);
858 }
859
860 /* Initialise PTP channel and state.
861 *
862 * Setting core_index to zero causes the queue to be initialised and doesn't
863 * overlap with 'rxq0' because ptp.c doesn't use skb_record_rx_queue.
864 */
865 static int efx_ptp_probe_channel(struct efx_channel *channel)
866 {
867 struct efx_nic *efx = channel->efx;
868 struct efx_ptp_data *ptp;
869 int rc = 0;
870 unsigned int pos;
871
872 channel->irq_moderation = 0;
873 channel->rx_queue.core_index = 0;
874
875 ptp = kzalloc(sizeof(struct efx_ptp_data), GFP_KERNEL);
876 efx->ptp_data = ptp;
877 if (!efx->ptp_data)
878 return -ENOMEM;
879
880 rc = efx_nic_alloc_buffer(efx, &ptp->start, sizeof(int));
881 if (rc != 0)
882 goto fail1;
883
884 ptp->channel = channel;
885 skb_queue_head_init(&ptp->rxq);
886 skb_queue_head_init(&ptp->txq);
887 ptp->workwq = create_singlethread_workqueue("sfc_ptp");
888 if (!ptp->workwq) {
889 rc = -ENOMEM;
890 goto fail2;
891 }
892
893 INIT_WORK(&ptp->work, efx_ptp_worker);
894 ptp->config.flags = 0;
895 ptp->config.tx_type = HWTSTAMP_TX_OFF;
896 ptp->config.rx_filter = HWTSTAMP_FILTER_NONE;
897 INIT_LIST_HEAD(&ptp->evt_list);
898 INIT_LIST_HEAD(&ptp->evt_free_list);
899 spin_lock_init(&ptp->evt_lock);
900 for (pos = 0; pos < MAX_RECEIVE_EVENTS; pos++)
901 list_add(&ptp->rx_evts[pos].link, &ptp->evt_free_list);
902
903 ptp->phc_clock_info.owner = THIS_MODULE;
904 snprintf(ptp->phc_clock_info.name,
905 sizeof(ptp->phc_clock_info.name),
906 "%pm", efx->net_dev->perm_addr);
907 ptp->phc_clock_info.max_adj = MAX_PPB;
908 ptp->phc_clock_info.n_alarm = 0;
909 ptp->phc_clock_info.n_ext_ts = 0;
910 ptp->phc_clock_info.n_per_out = 0;
911 ptp->phc_clock_info.pps = 1;
912 ptp->phc_clock_info.adjfreq = efx_phc_adjfreq;
913 ptp->phc_clock_info.adjtime = efx_phc_adjtime;
914 ptp->phc_clock_info.gettime = efx_phc_gettime;
915 ptp->phc_clock_info.settime = efx_phc_settime;
916 ptp->phc_clock_info.enable = efx_phc_enable;
917
918 ptp->phc_clock = ptp_clock_register(&ptp->phc_clock_info,
919 &efx->pci_dev->dev);
920 if (IS_ERR(ptp->phc_clock)) {
921 rc = PTR_ERR(ptp->phc_clock);
922 goto fail3;
923 }
924
925 INIT_WORK(&ptp->pps_work, efx_ptp_pps_worker);
926 ptp->pps_workwq = create_singlethread_workqueue("sfc_pps");
927 if (!ptp->pps_workwq) {
928 rc = -ENOMEM;
929 goto fail4;
930 }
931 ptp->nic_ts_enabled = false;
932
933 return 0;
934 fail4:
935 ptp_clock_unregister(efx->ptp_data->phc_clock);
936
937 fail3:
938 destroy_workqueue(efx->ptp_data->workwq);
939
940 fail2:
941 efx_nic_free_buffer(efx, &ptp->start);
942
943 fail1:
944 kfree(efx->ptp_data);
945 efx->ptp_data = NULL;
946
947 return rc;
948 }
949
950 static void efx_ptp_remove_channel(struct efx_channel *channel)
951 {
952 struct efx_nic *efx = channel->efx;
953
954 if (!efx->ptp_data)
955 return;
956
957 (void)efx_ptp_disable(channel->efx);
958
959 cancel_work_sync(&efx->ptp_data->work);
960 cancel_work_sync(&efx->ptp_data->pps_work);
961
962 skb_queue_purge(&efx->ptp_data->rxq);
963 skb_queue_purge(&efx->ptp_data->txq);
964
965 ptp_clock_unregister(efx->ptp_data->phc_clock);
966
967 destroy_workqueue(efx->ptp_data->workwq);
968 destroy_workqueue(efx->ptp_data->pps_workwq);
969
970 efx_nic_free_buffer(efx, &efx->ptp_data->start);
971 kfree(efx->ptp_data);
972 }
973
974 static void efx_ptp_get_channel_name(struct efx_channel *channel,
975 char *buf, size_t len)
976 {
977 snprintf(buf, len, "%s-ptp", channel->efx->name);
978 }
979
980 /* Determine whether this packet should be processed by the PTP module
981 * or transmitted conventionally.
982 */
983 bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)
984 {
985 return efx->ptp_data &&
986 efx->ptp_data->enabled &&
987 skb->len >= PTP_MIN_LENGTH &&
988 skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM &&
989 likely(skb->protocol == htons(ETH_P_IP)) &&
990 ip_hdr(skb)->protocol == IPPROTO_UDP &&
991 udp_hdr(skb)->dest == htons(PTP_EVENT_PORT);
992 }
993
994 /* Receive a PTP packet. Packets are queued until the arrival of
995 * the receive timestamp from the MC - this will probably occur after the
996 * packet arrival because of the processing in the MC.
997 */
998 static bool efx_ptp_rx(struct efx_channel *channel, struct sk_buff *skb)
999 {
1000 struct efx_nic *efx = channel->efx;
1001 struct efx_ptp_data *ptp = efx->ptp_data;
1002 struct efx_ptp_match *match = (struct efx_ptp_match *)skb->cb;
1003 u8 *match_data_012, *match_data_345;
1004 unsigned int version;
1005
1006 match->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS);
1007
1008 /* Correct version? */
1009 if (ptp->mode == MC_CMD_PTP_MODE_V1) {
1010 if (!pskb_may_pull(skb, PTP_V1_MIN_LENGTH)) {
1011 return false;
1012 }
1013 version = ntohs(*(__be16 *)&skb->data[PTP_V1_VERSION_OFFSET]);
1014 if (version != PTP_VERSION_V1) {
1015 return false;
1016 }
1017
1018 /* PTP V1 uses all six bytes of the UUID to match the packet
1019 * to the timestamp
1020 */
1021 match_data_012 = skb->data + PTP_V1_UUID_OFFSET;
1022 match_data_345 = skb->data + PTP_V1_UUID_OFFSET + 3;
1023 } else {
1024 if (!pskb_may_pull(skb, PTP_V2_MIN_LENGTH)) {
1025 return false;
1026 }
1027 version = skb->data[PTP_V2_VERSION_OFFSET];
1028 if ((version & PTP_VERSION_V2_MASK) != PTP_VERSION_V2) {
1029 return false;
1030 }
1031
1032 /* The original V2 implementation uses bytes 2-7 of
1033 * the UUID to match the packet to the timestamp. This
1034 * discards two of the bytes of the MAC address used
1035 * to create the UUID (SF bug 33070). The PTP V2
1036 * enhanced mode fixes this issue and uses bytes 0-2
1037 * and byte 5-7 of the UUID.
1038 */
1039 match_data_345 = skb->data + PTP_V2_UUID_OFFSET + 5;
1040 if (ptp->mode == MC_CMD_PTP_MODE_V2) {
1041 match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 2;
1042 } else {
1043 match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 0;
1044 BUG_ON(ptp->mode != MC_CMD_PTP_MODE_V2_ENHANCED);
1045 }
1046 }
1047
1048 /* Does this packet require timestamping? */
1049 if (ntohs(*(__be16 *)&skb->data[PTP_DPORT_OFFSET]) == PTP_EVENT_PORT) {
1050 struct skb_shared_hwtstamps *timestamps;
1051
1052 match->state = PTP_PACKET_STATE_UNMATCHED;
1053
1054 /* Clear all timestamps held: filled in later */
1055 timestamps = skb_hwtstamps(skb);
1056 memset(timestamps, 0, sizeof(*timestamps));
1057
1058 /* We expect the sequence number to be in the same position in
1059 * the packet for PTP V1 and V2
1060 */
1061 BUILD_BUG_ON(PTP_V1_SEQUENCE_OFFSET != PTP_V2_SEQUENCE_OFFSET);
1062 BUILD_BUG_ON(PTP_V1_SEQUENCE_LENGTH != PTP_V2_SEQUENCE_LENGTH);
1063
1064 /* Extract UUID/Sequence information */
1065 match->words[0] = (match_data_012[0] |
1066 (match_data_012[1] << 8) |
1067 (match_data_012[2] << 16) |
1068 (match_data_345[0] << 24));
1069 match->words[1] = (match_data_345[1] |
1070 (match_data_345[2] << 8) |
1071 (skb->data[PTP_V1_SEQUENCE_OFFSET +
1072 PTP_V1_SEQUENCE_LENGTH - 1] <<
1073 16));
1074 } else {
1075 match->state = PTP_PACKET_STATE_MATCH_UNWANTED;
1076 }
1077
1078 skb_queue_tail(&ptp->rxq, skb);
1079 queue_work(ptp->workwq, &ptp->work);
1080
1081 return true;
1082 }
1083
1084 /* Transmit a PTP packet. This has to be transmitted by the MC
1085 * itself, through an MCDI call. MCDI calls aren't permitted
1086 * in the transmit path so defer the actual transmission to a suitable worker.
1087 */
1088 int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)
1089 {
1090 struct efx_ptp_data *ptp = efx->ptp_data;
1091
1092 skb_queue_tail(&ptp->txq, skb);
1093
1094 if ((udp_hdr(skb)->dest == htons(PTP_EVENT_PORT)) &&
1095 (skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM))
1096 efx_xmit_hwtstamp_pending(skb);
1097 queue_work(ptp->workwq, &ptp->work);
1098
1099 return NETDEV_TX_OK;
1100 }
1101
1102 static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,
1103 unsigned int new_mode)
1104 {
1105 if ((enable_wanted != efx->ptp_data->enabled) ||
1106 (enable_wanted && (efx->ptp_data->mode != new_mode))) {
1107 int rc;
1108
1109 if (enable_wanted) {
1110 /* Change of mode requires disable */
1111 if (efx->ptp_data->enabled &&
1112 (efx->ptp_data->mode != new_mode)) {
1113 efx->ptp_data->enabled = false;
1114 rc = efx_ptp_stop(efx);
1115 if (rc != 0)
1116 return rc;
1117 }
1118
1119 /* Set new operating mode and establish
1120 * baseline synchronisation, which must
1121 * succeed.
1122 */
1123 efx->ptp_data->mode = new_mode;
1124 rc = efx_ptp_start(efx);
1125 if (rc == 0) {
1126 rc = efx_ptp_synchronize(efx,
1127 PTP_SYNC_ATTEMPTS * 2);
1128 if (rc != 0)
1129 efx_ptp_stop(efx);
1130 }
1131 } else {
1132 rc = efx_ptp_stop(efx);
1133 }
1134
1135 if (rc != 0)
1136 return rc;
1137
1138 efx->ptp_data->enabled = enable_wanted;
1139 }
1140
1141 return 0;
1142 }
1143
1144 static int efx_ptp_ts_init(struct efx_nic *efx, struct hwtstamp_config *init)
1145 {
1146 bool enable_wanted = false;
1147 unsigned int new_mode;
1148 int rc;
1149
1150 if (init->flags)
1151 return -EINVAL;
1152
1153 if ((init->tx_type != HWTSTAMP_TX_OFF) &&
1154 (init->tx_type != HWTSTAMP_TX_ON))
1155 return -ERANGE;
1156
1157 new_mode = efx->ptp_data->mode;
1158 /* Determine whether any PTP HW operations are required */
1159 switch (init->rx_filter) {
1160 case HWTSTAMP_FILTER_NONE:
1161 break;
1162 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1163 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1164 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1165 init->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
1166 new_mode = MC_CMD_PTP_MODE_V1;
1167 enable_wanted = true;
1168 break;
1169 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1170 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1171 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1172 /* Although these three are accepted only IPV4 packets will be
1173 * timestamped
1174 */
1175 init->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
1176 new_mode = MC_CMD_PTP_MODE_V2_ENHANCED;
1177 enable_wanted = true;
1178 break;
1179 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1180 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1181 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1182 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1183 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1184 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1185 /* Non-IP + IPv6 timestamping not supported */
1186 return -ERANGE;
1187 break;
1188 default:
1189 return -ERANGE;
1190 }
1191
1192 if (init->tx_type != HWTSTAMP_TX_OFF)
1193 enable_wanted = true;
1194
1195 /* Old versions of the firmware do not support the improved
1196 * UUID filtering option (SF bug 33070). If the firmware does
1197 * not accept the enhanced mode, fall back to the standard PTP
1198 * v2 UUID filtering.
1199 */
1200 rc = efx_ptp_change_mode(efx, enable_wanted, new_mode);
1201 if ((rc != 0) && (new_mode == MC_CMD_PTP_MODE_V2_ENHANCED))
1202 rc = efx_ptp_change_mode(efx, enable_wanted, MC_CMD_PTP_MODE_V2);
1203 if (rc != 0)
1204 return rc;
1205
1206 efx->ptp_data->config = *init;
1207
1208 return 0;
1209 }
1210
1211 void efx_ptp_get_ts_info(struct efx_nic *efx, struct ethtool_ts_info *ts_info)
1212 {
1213 struct efx_ptp_data *ptp = efx->ptp_data;
1214
1215 if (!ptp)
1216 return;
1217
1218 ts_info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
1219 SOF_TIMESTAMPING_RX_HARDWARE |
1220 SOF_TIMESTAMPING_RAW_HARDWARE);
1221 ts_info->phc_index = ptp_clock_index(ptp->phc_clock);
1222 ts_info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON;
1223 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE |
1224 1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT |
1225 1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC |
1226 1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ |
1227 1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT |
1228 1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC |
1229 1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1230 }
1231
1232 int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd)
1233 {
1234 struct hwtstamp_config config;
1235 int rc;
1236
1237 /* Not a PTP enabled port */
1238 if (!efx->ptp_data)
1239 return -EOPNOTSUPP;
1240
1241 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1242 return -EFAULT;
1243
1244 rc = efx_ptp_ts_init(efx, &config);
1245 if (rc != 0)
1246 return rc;
1247
1248 return copy_to_user(ifr->ifr_data, &config, sizeof(config))
1249 ? -EFAULT : 0;
1250 }
1251
1252 static void ptp_event_failure(struct efx_nic *efx, int expected_frag_len)
1253 {
1254 struct efx_ptp_data *ptp = efx->ptp_data;
1255
1256 netif_err(efx, hw, efx->net_dev,
1257 "PTP unexpected event length: got %d expected %d\n",
1258 ptp->evt_frag_idx, expected_frag_len);
1259 ptp->reset_required = true;
1260 queue_work(ptp->workwq, &ptp->work);
1261 }
1262
1263 /* Process a completed receive event. Put it on the event queue and
1264 * start worker thread. This is required because event and their
1265 * correspoding packets may come in either order.
1266 */
1267 static void ptp_event_rx(struct efx_nic *efx, struct efx_ptp_data *ptp)
1268 {
1269 struct efx_ptp_event_rx *evt = NULL;
1270
1271 if (ptp->evt_frag_idx != 3) {
1272 ptp_event_failure(efx, 3);
1273 return;
1274 }
1275
1276 spin_lock_bh(&ptp->evt_lock);
1277 if (!list_empty(&ptp->evt_free_list)) {
1278 evt = list_first_entry(&ptp->evt_free_list,
1279 struct efx_ptp_event_rx, link);
1280 list_del(&evt->link);
1281
1282 evt->seq0 = EFX_QWORD_FIELD(ptp->evt_frags[2], MCDI_EVENT_DATA);
1283 evt->seq1 = (EFX_QWORD_FIELD(ptp->evt_frags[2],
1284 MCDI_EVENT_SRC) |
1285 (EFX_QWORD_FIELD(ptp->evt_frags[1],
1286 MCDI_EVENT_SRC) << 8) |
1287 (EFX_QWORD_FIELD(ptp->evt_frags[0],
1288 MCDI_EVENT_SRC) << 16));
1289 evt->hwtimestamp = ktime_set(
1290 EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA),
1291 EFX_QWORD_FIELD(ptp->evt_frags[1], MCDI_EVENT_DATA));
1292 evt->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS);
1293 list_add_tail(&evt->link, &ptp->evt_list);
1294
1295 queue_work(ptp->workwq, &ptp->work);
1296 } else {
1297 netif_err(efx, rx_err, efx->net_dev, "No free PTP event");
1298 }
1299 spin_unlock_bh(&ptp->evt_lock);
1300 }
1301
1302 static void ptp_event_fault(struct efx_nic *efx, struct efx_ptp_data *ptp)
1303 {
1304 int code = EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA);
1305 if (ptp->evt_frag_idx != 1) {
1306 ptp_event_failure(efx, 1);
1307 return;
1308 }
1309
1310 netif_err(efx, hw, efx->net_dev, "PTP error %d\n", code);
1311 }
1312
1313 static void ptp_event_pps(struct efx_nic *efx, struct efx_ptp_data *ptp)
1314 {
1315 if (ptp->nic_ts_enabled)
1316 queue_work(ptp->pps_workwq, &ptp->pps_work);
1317 }
1318
1319 void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev)
1320 {
1321 struct efx_ptp_data *ptp = efx->ptp_data;
1322 int code = EFX_QWORD_FIELD(*ev, MCDI_EVENT_CODE);
1323
1324 if (!ptp->enabled)
1325 return;
1326
1327 if (ptp->evt_frag_idx == 0) {
1328 ptp->evt_code = code;
1329 } else if (ptp->evt_code != code) {
1330 netif_err(efx, hw, efx->net_dev,
1331 "PTP out of sequence event %d\n", code);
1332 ptp->evt_frag_idx = 0;
1333 }
1334
1335 ptp->evt_frags[ptp->evt_frag_idx++] = *ev;
1336 if (!MCDI_EVENT_FIELD(*ev, CONT)) {
1337 /* Process resulting event */
1338 switch (code) {
1339 case MCDI_EVENT_CODE_PTP_RX:
1340 ptp_event_rx(efx, ptp);
1341 break;
1342 case MCDI_EVENT_CODE_PTP_FAULT:
1343 ptp_event_fault(efx, ptp);
1344 break;
1345 case MCDI_EVENT_CODE_PTP_PPS:
1346 ptp_event_pps(efx, ptp);
1347 break;
1348 default:
1349 netif_err(efx, hw, efx->net_dev,
1350 "PTP unknown event %d\n", code);
1351 break;
1352 }
1353 ptp->evt_frag_idx = 0;
1354 } else if (MAX_EVENT_FRAGS == ptp->evt_frag_idx) {
1355 netif_err(efx, hw, efx->net_dev,
1356 "PTP too many event fragments\n");
1357 ptp->evt_frag_idx = 0;
1358 }
1359 }
1360
1361 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
1362 {
1363 struct efx_ptp_data *ptp_data = container_of(ptp,
1364 struct efx_ptp_data,
1365 phc_clock_info);
1366 struct efx_nic *efx = ptp_data->channel->efx;
1367 MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN);
1368 s64 adjustment_ns;
1369 int rc;
1370
1371 if (delta > MAX_PPB)
1372 delta = MAX_PPB;
1373 else if (delta < -MAX_PPB)
1374 delta = -MAX_PPB;
1375
1376 /* Convert ppb to fixed point ns. */
1377 adjustment_ns = (((s64)delta * PPB_SCALE_WORD) >>
1378 (PPB_EXTRA_BITS + MAX_PPB_BITS));
1379
1380 MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
1381 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_FREQ_LO, (u32)adjustment_ns);
1382 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_FREQ_HI,
1383 (u32)(adjustment_ns >> 32));
1384 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_SECONDS, 0);
1385 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_NANOSECONDS, 0);
1386 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inadj, sizeof(inadj),
1387 NULL, 0, NULL);
1388 if (rc != 0)
1389 return rc;
1390
1391 ptp_data->current_adjfreq = delta;
1392 return 0;
1393 }
1394
1395 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
1396 {
1397 struct efx_ptp_data *ptp_data = container_of(ptp,
1398 struct efx_ptp_data,
1399 phc_clock_info);
1400 struct efx_nic *efx = ptp_data->channel->efx;
1401 struct timespec delta_ts = ns_to_timespec(delta);
1402 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ADJUST_LEN);
1403
1404 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
1405 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_FREQ_LO, 0);
1406 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_FREQ_HI, 0);
1407 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec);
1408 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec);
1409 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
1410 NULL, 0, NULL);
1411 }
1412
1413 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
1414 {
1415 struct efx_ptp_data *ptp_data = container_of(ptp,
1416 struct efx_ptp_data,
1417 phc_clock_info);
1418 struct efx_nic *efx = ptp_data->channel->efx;
1419 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_READ_NIC_TIME_LEN);
1420 MCDI_DECLARE_BUF(outbuf, MC_CMD_PTP_OUT_READ_NIC_TIME_LEN);
1421 int rc;
1422
1423 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_READ_NIC_TIME);
1424
1425 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
1426 outbuf, sizeof(outbuf), NULL);
1427 if (rc != 0)
1428 return rc;
1429
1430 ts->tv_sec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_SECONDS);
1431 ts->tv_nsec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_NANOSECONDS);
1432 return 0;
1433 }
1434
1435 static int efx_phc_settime(struct ptp_clock_info *ptp,
1436 const struct timespec *e_ts)
1437 {
1438 /* Get the current NIC time, efx_phc_gettime.
1439 * Subtract from the desired time to get the offset
1440 * call efx_phc_adjtime with the offset
1441 */
1442 int rc;
1443 struct timespec time_now;
1444 struct timespec delta;
1445
1446 rc = efx_phc_gettime(ptp, &time_now);
1447 if (rc != 0)
1448 return rc;
1449
1450 delta = timespec_sub(*e_ts, time_now);
1451
1452 rc = efx_phc_adjtime(ptp, timespec_to_ns(&delta));
1453 if (rc != 0)
1454 return rc;
1455
1456 return 0;
1457 }
1458
1459 static int efx_phc_enable(struct ptp_clock_info *ptp,
1460 struct ptp_clock_request *request,
1461 int enable)
1462 {
1463 struct efx_ptp_data *ptp_data = container_of(ptp,
1464 struct efx_ptp_data,
1465 phc_clock_info);
1466 if (request->type != PTP_CLK_REQ_PPS)
1467 return -EOPNOTSUPP;
1468
1469 ptp_data->nic_ts_enabled = !!enable;
1470 return 0;
1471 }
1472
1473 static const struct efx_channel_type efx_ptp_channel_type = {
1474 .handle_no_channel = efx_ptp_handle_no_channel,
1475 .pre_probe = efx_ptp_probe_channel,
1476 .post_remove = efx_ptp_remove_channel,
1477 .get_name = efx_ptp_get_channel_name,
1478 /* no copy operation; there is no need to reallocate this channel */
1479 .receive_skb = efx_ptp_rx,
1480 .keep_eventq = false,
1481 };
1482
1483 void efx_ptp_probe(struct efx_nic *efx)
1484 {
1485 /* Check whether PTP is implemented on this NIC. The DISABLE
1486 * operation will succeed if and only if it is implemented.
1487 */
1488 if (efx_ptp_disable(efx) == 0)
1489 efx->extra_channel_type[EFX_EXTRA_CHANNEL_PTP] =
1490 &efx_ptp_channel_type;
1491 }
Linux kernel - Deliverables
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