1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/crc32.h>
35 #include <linux/clk.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
62 #include <linux/acpi.h>
63 #include <linux/pm_runtime.h>
64 #include <linux/property.h>
68 #define SMSC_CHIPNAME "smsc911x"
69 #define SMSC_MDIONAME "smsc911x-mdio"
70 #define SMSC_DRV_VERSION "2008-10-21"
72 MODULE_LICENSE("GPL");
73 MODULE_VERSION(SMSC_DRV_VERSION
);
74 MODULE_ALIAS("platform:smsc911x");
77 static int debug
= 16;
82 module_param(debug
, int, 0);
83 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
88 u32 (*reg_read
)(struct smsc911x_data
*pdata
, u32 reg
);
89 void (*reg_write
)(struct smsc911x_data
*pdata
, u32 reg
, u32 val
);
90 void (*rx_readfifo
)(struct smsc911x_data
*pdata
,
91 unsigned int *buf
, unsigned int wordcount
);
92 void (*tx_writefifo
)(struct smsc911x_data
*pdata
,
93 unsigned int *buf
, unsigned int wordcount
);
96 #define SMSC911X_NUM_SUPPLIES 2
98 struct smsc911x_data
{
103 /* used to decide which workarounds apply */
104 unsigned int generation
;
106 /* device configuration (copied from platform_data during probe) */
107 struct smsc911x_platform_config config
;
109 /* This needs to be acquired before calling any of below:
110 * smsc911x_mac_read(), smsc911x_mac_write()
114 /* spinlock to ensure register accesses are serialised */
117 struct mii_bus
*mii_bus
;
118 unsigned int using_extphy
;
123 unsigned int gpio_setting
;
124 unsigned int gpio_orig_setting
;
125 struct net_device
*dev
;
126 struct napi_struct napi
;
128 unsigned int software_irq_signal
;
130 #ifdef USE_PHY_WORK_AROUND
131 #define MIN_PACKET_SIZE (64)
132 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
133 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
134 unsigned int resetcount
;
137 /* Members for Multicast filter workaround */
138 unsigned int multicast_update_pending
;
139 unsigned int set_bits_mask
;
140 unsigned int clear_bits_mask
;
144 /* register access functions */
145 const struct smsc911x_ops
*ops
;
148 struct regulator_bulk_data supplies
[SMSC911X_NUM_SUPPLIES
];
154 /* Easy access to information */
155 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
157 static inline u32
__smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
159 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
160 return readl(pdata
->ioaddr
+ reg
);
162 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
)
163 return ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
164 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
171 __smsc911x_reg_read_shift(struct smsc911x_data
*pdata
, u32 reg
)
173 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
174 return readl(pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
176 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
)
177 return (readw(pdata
->ioaddr
+
178 __smsc_shift(pdata
, reg
)) & 0xFFFF) |
179 ((readw(pdata
->ioaddr
+
180 __smsc_shift(pdata
, reg
+ 2)) & 0xFFFF) << 16);
186 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
191 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
192 data
= pdata
->ops
->reg_read(pdata
, reg
);
193 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
198 static inline void __smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
201 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
202 writel(val
, pdata
->ioaddr
+ reg
);
206 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
207 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
208 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
216 __smsc911x_reg_write_shift(struct smsc911x_data
*pdata
, u32 reg
, u32 val
)
218 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
219 writel(val
, pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
223 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
225 pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
226 writew((val
>> 16) & 0xFFFF,
227 pdata
->ioaddr
+ __smsc_shift(pdata
, reg
+ 2));
234 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
239 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
240 pdata
->ops
->reg_write(pdata
, reg
, val
);
241 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
244 /* Writes a packet to the TX_DATA_FIFO */
246 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
247 unsigned int wordcount
)
251 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
253 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
255 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
,
260 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
261 iowrite32_rep(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
265 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
267 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
273 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
276 /* Writes a packet to the TX_DATA_FIFO - shifted version */
278 smsc911x_tx_writefifo_shift(struct smsc911x_data
*pdata
, unsigned int *buf
,
279 unsigned int wordcount
)
283 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
285 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
287 __smsc911x_reg_write_shift(pdata
, TX_DATA_FIFO
,
292 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
293 iowrite32_rep(pdata
->ioaddr
+ __smsc_shift(pdata
,
294 TX_DATA_FIFO
), buf
, wordcount
);
298 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
300 __smsc911x_reg_write_shift(pdata
,
301 TX_DATA_FIFO
, *buf
++);
307 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
310 /* Reads a packet out of the RX_DATA_FIFO */
312 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
313 unsigned int wordcount
)
317 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
319 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
321 *buf
++ = swab32(__smsc911x_reg_read(pdata
,
326 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
327 ioread32_rep(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
331 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
333 *buf
++ = __smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
339 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
342 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
344 smsc911x_rx_readfifo_shift(struct smsc911x_data
*pdata
, unsigned int *buf
,
345 unsigned int wordcount
)
349 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
351 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
353 *buf
++ = swab32(__smsc911x_reg_read_shift(pdata
,
358 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
359 ioread32_rep(pdata
->ioaddr
+ __smsc_shift(pdata
,
360 RX_DATA_FIFO
), buf
, wordcount
);
364 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
366 *buf
++ = __smsc911x_reg_read_shift(pdata
,
373 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
377 * enable regulator and clock resources.
379 static int smsc911x_enable_resources(struct platform_device
*pdev
)
381 struct net_device
*ndev
= platform_get_drvdata(pdev
);
382 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
385 ret
= regulator_bulk_enable(ARRAY_SIZE(pdata
->supplies
),
388 netdev_err(ndev
, "failed to enable regulators %d\n",
391 if (!IS_ERR(pdata
->clk
)) {
392 ret
= clk_prepare_enable(pdata
->clk
);
394 netdev_err(ndev
, "failed to enable clock %d\n", ret
);
401 * disable resources, currently just regulators.
403 static int smsc911x_disable_resources(struct platform_device
*pdev
)
405 struct net_device
*ndev
= platform_get_drvdata(pdev
);
406 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
409 ret
= regulator_bulk_disable(ARRAY_SIZE(pdata
->supplies
),
412 if (!IS_ERR(pdata
->clk
))
413 clk_disable_unprepare(pdata
->clk
);
419 * Request resources, currently just regulators.
421 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
422 * these are not always-on we need to request regulators to be turned on
423 * before we can try to access the device registers.
425 static int smsc911x_request_resources(struct platform_device
*pdev
)
427 struct net_device
*ndev
= platform_get_drvdata(pdev
);
428 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
431 /* Request regulators */
432 pdata
->supplies
[0].supply
= "vdd33a";
433 pdata
->supplies
[1].supply
= "vddvario";
434 ret
= regulator_bulk_get(&pdev
->dev
,
435 ARRAY_SIZE(pdata
->supplies
),
438 netdev_err(ndev
, "couldn't get regulators %d\n",
442 pdata
->clk
= clk_get(&pdev
->dev
, NULL
);
443 if (IS_ERR(pdata
->clk
))
444 dev_dbg(&pdev
->dev
, "couldn't get clock %li\n",
445 PTR_ERR(pdata
->clk
));
451 * Free resources, currently just regulators.
454 static void smsc911x_free_resources(struct platform_device
*pdev
)
456 struct net_device
*ndev
= platform_get_drvdata(pdev
);
457 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
459 /* Free regulators */
460 regulator_bulk_free(ARRAY_SIZE(pdata
->supplies
),
464 if (!IS_ERR(pdata
->clk
)) {
470 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
471 * and smsc911x_mac_write, so assumes mac_lock is held */
472 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
477 SMSC_ASSERT_MAC_LOCK(pdata
);
479 for (i
= 0; i
< 40; i
++) {
480 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
481 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
484 SMSC_WARN(pdata
, hw
, "Timed out waiting for MAC not BUSY. "
485 "MAC_CSR_CMD: 0x%08X", val
);
489 /* Fetches a MAC register value. Assumes mac_lock is acquired */
490 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
494 SMSC_ASSERT_MAC_LOCK(pdata
);
496 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
497 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
498 SMSC_WARN(pdata
, hw
, "MAC busy at entry");
502 /* Send the MAC cmd */
503 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
504 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
506 /* Workaround for hardware read-after-write restriction */
507 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
509 /* Wait for the read to complete */
510 if (likely(smsc911x_mac_complete(pdata
) == 0))
511 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
513 SMSC_WARN(pdata
, hw
, "MAC busy after read");
517 /* Set a mac register, mac_lock must be acquired before calling */
518 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
519 unsigned int offset
, u32 val
)
523 SMSC_ASSERT_MAC_LOCK(pdata
);
525 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
526 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
528 "smsc911x_mac_write failed, MAC busy at entry");
532 /* Send data to write */
533 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
535 /* Write the actual data */
536 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
537 MAC_CSR_CMD_CSR_BUSY_
));
539 /* Workaround for hardware read-after-write restriction */
540 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
542 /* Wait for the write to complete */
543 if (likely(smsc911x_mac_complete(pdata
) == 0))
546 SMSC_WARN(pdata
, hw
, "smsc911x_mac_write failed, MAC busy after write");
549 /* Get a phy register */
550 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
552 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
557 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
559 /* Confirm MII not busy */
560 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
561 SMSC_WARN(pdata
, hw
, "MII is busy in smsc911x_mii_read???");
566 /* Set the address, index & direction (read from PHY) */
567 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
568 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
570 /* Wait for read to complete w/ timeout */
571 for (i
= 0; i
< 100; i
++)
572 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
573 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
577 SMSC_WARN(pdata
, hw
, "Timed out waiting for MII read to finish");
581 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
585 /* Set a phy register */
586 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
589 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
594 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
596 /* Confirm MII not busy */
597 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
598 SMSC_WARN(pdata
, hw
, "MII is busy in smsc911x_mii_write???");
603 /* Put the data to write in the MAC */
604 smsc911x_mac_write(pdata
, MII_DATA
, val
);
606 /* Set the address, index & direction (write to PHY) */
607 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
609 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
611 /* Wait for write to complete w/ timeout */
612 for (i
= 0; i
< 100; i
++)
613 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
618 SMSC_WARN(pdata
, hw
, "Timed out waiting for MII write to finish");
622 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
626 /* Switch to external phy. Assumes tx and rx are stopped. */
627 static void smsc911x_phy_enable_external(struct smsc911x_data
*pdata
)
629 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
631 /* Disable phy clocks to the MAC */
632 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
633 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
634 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
635 udelay(10); /* Enough time for clocks to stop */
637 /* Switch to external phy */
638 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
639 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
641 /* Enable phy clocks to the MAC */
642 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
643 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
644 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
645 udelay(10); /* Enough time for clocks to restart */
647 hwcfg
|= HW_CFG_SMI_SEL_
;
648 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
651 /* Autodetects and enables external phy if present on supported chips.
652 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
653 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
654 static void smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
656 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
658 if (pdata
->config
.flags
& SMSC911X_FORCE_INTERNAL_PHY
) {
659 SMSC_TRACE(pdata
, hw
, "Forcing internal PHY");
660 pdata
->using_extphy
= 0;
661 } else if (pdata
->config
.flags
& SMSC911X_FORCE_EXTERNAL_PHY
) {
662 SMSC_TRACE(pdata
, hw
, "Forcing external PHY");
663 smsc911x_phy_enable_external(pdata
);
664 pdata
->using_extphy
= 1;
665 } else if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
666 SMSC_TRACE(pdata
, hw
,
667 "HW_CFG EXT_PHY_DET set, using external PHY");
668 smsc911x_phy_enable_external(pdata
);
669 pdata
->using_extphy
= 1;
671 SMSC_TRACE(pdata
, hw
,
672 "HW_CFG EXT_PHY_DET clear, using internal PHY");
673 pdata
->using_extphy
= 0;
677 /* Fetches a tx status out of the status fifo */
678 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
680 unsigned int result
=
681 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
684 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
689 /* Fetches the next rx status */
690 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
692 unsigned int result
=
693 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
696 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
701 #ifdef USE_PHY_WORK_AROUND
702 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
709 for (tries
= 0; tries
< 10; tries
++) {
710 unsigned int txcmd_a
;
711 unsigned int txcmd_b
;
713 unsigned int pktlength
;
716 /* Zero-out rx packet memory */
717 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
719 /* Write tx packet to 118 */
720 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
721 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
722 txcmd_a
|= MIN_PACKET_SIZE
;
724 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
726 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
727 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
729 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
730 wrsz
= MIN_PACKET_SIZE
+ 3;
731 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
734 pdata
->ops
->tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
736 /* Wait till transmit is done */
740 status
= smsc911x_tx_get_txstatus(pdata
);
741 } while ((i
--) && (!status
));
745 "Failed to transmit during loopback test");
748 if (status
& TX_STS_ES_
) {
750 "Transmit encountered errors during loopback test");
754 /* Wait till receive is done */
758 status
= smsc911x_rx_get_rxstatus(pdata
);
759 } while ((i
--) && (!status
));
763 "Failed to receive during loopback test");
766 if (status
& RX_STS_ES_
) {
768 "Receive encountered errors during loopback test");
772 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
773 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
774 rdsz
= pktlength
+ 3;
775 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
778 pdata
->ops
->rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
780 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
781 SMSC_WARN(pdata
, hw
, "Unexpected packet size "
782 "during loop back test, size=%d, will retry",
787 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
788 if (pdata
->loopback_tx_pkt
[j
]
789 != pdata
->loopback_rx_pkt
[j
]) {
795 SMSC_TRACE(pdata
, hw
, "Successfully verified "
799 SMSC_WARN(pdata
, hw
, "Data mismatch "
800 "during loop back test, will retry");
808 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
811 unsigned int i
= 100000;
813 temp
= smsc911x_reg_read(pdata
, PMT_CTRL
);
814 smsc911x_reg_write(pdata
, PMT_CTRL
, temp
| PMT_CTRL_PHY_RST_
);
817 temp
= smsc911x_reg_read(pdata
, PMT_CTRL
);
818 } while ((i
--) && (temp
& PMT_CTRL_PHY_RST_
));
820 if (unlikely(temp
& PMT_CTRL_PHY_RST_
)) {
821 SMSC_WARN(pdata
, hw
, "PHY reset failed to complete");
824 /* Extra delay required because the phy may not be completed with
825 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
826 * enough delay but using 1ms here to be safe */
832 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
834 struct smsc911x_data
*pdata
= netdev_priv(dev
);
835 struct phy_device
*phy_dev
= dev
->phydev
;
840 /* Initialise tx packet using broadcast destination address */
841 eth_broadcast_addr(pdata
->loopback_tx_pkt
);
843 /* Use incrementing source address */
844 for (i
= 6; i
< 12; i
++)
845 pdata
->loopback_tx_pkt
[i
] = (char)i
;
847 /* Set length type field */
848 pdata
->loopback_tx_pkt
[12] = 0x00;
849 pdata
->loopback_tx_pkt
[13] = 0x00;
851 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
852 pdata
->loopback_tx_pkt
[i
] = (char)i
;
854 val
= smsc911x_reg_read(pdata
, HW_CFG
);
855 val
&= HW_CFG_TX_FIF_SZ_
;
857 smsc911x_reg_write(pdata
, HW_CFG
, val
);
859 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
860 smsc911x_reg_write(pdata
, RX_CFG
,
861 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
863 for (i
= 0; i
< 10; i
++) {
864 /* Set PHY to 10/FD, no ANEG, and loopback mode */
865 smsc911x_mii_write(phy_dev
->mdio
.bus
, phy_dev
->mdio
.addr
,
866 MII_BMCR
, BMCR_LOOPBACK
| BMCR_FULLDPLX
);
868 /* Enable MAC tx/rx, FD */
869 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
870 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
871 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
872 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
874 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
881 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
882 smsc911x_mac_write(pdata
, MAC_CR
, 0);
883 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
885 smsc911x_phy_reset(pdata
);
889 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
890 smsc911x_mac_write(pdata
, MAC_CR
, 0);
891 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
893 /* Cancel PHY loopback mode */
894 smsc911x_mii_write(phy_dev
->mdio
.bus
, phy_dev
->mdio
.addr
, MII_BMCR
, 0);
896 smsc911x_reg_write(pdata
, TX_CFG
, 0);
897 smsc911x_reg_write(pdata
, RX_CFG
, 0);
901 #endif /* USE_PHY_WORK_AROUND */
903 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
905 struct net_device
*ndev
= pdata
->dev
;
906 struct phy_device
*phy_dev
= ndev
->phydev
;
907 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
911 if (phy_dev
->duplex
== DUPLEX_FULL
) {
912 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
913 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
914 u8 cap
= mii_resolve_flowctrl_fdx(lcladv
, rmtadv
);
916 if (cap
& FLOW_CTRL_RX
)
921 if (cap
& FLOW_CTRL_TX
)
926 SMSC_TRACE(pdata
, hw
, "rx pause %s, tx pause %s",
927 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
928 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
930 SMSC_TRACE(pdata
, hw
, "half duplex");
935 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
936 smsc911x_mac_write(pdata
, FLOW
, flow
);
937 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
939 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
942 /* Update link mode if anything has changed. Called periodically when the
943 * PHY is in polling mode, even if nothing has changed. */
944 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
946 struct smsc911x_data
*pdata
= netdev_priv(dev
);
947 struct phy_device
*phy_dev
= dev
->phydev
;
951 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
953 SMSC_TRACE(pdata
, hw
, "duplex state has changed");
955 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
956 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
957 if (phy_dev
->duplex
) {
958 SMSC_TRACE(pdata
, hw
,
959 "configuring for full duplex mode");
960 mac_cr
|= MAC_CR_FDPX_
;
962 SMSC_TRACE(pdata
, hw
,
963 "configuring for half duplex mode");
964 mac_cr
&= ~MAC_CR_FDPX_
;
966 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
967 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
969 smsc911x_phy_update_flowcontrol(pdata
);
970 pdata
->last_duplex
= phy_dev
->duplex
;
973 carrier
= netif_carrier_ok(dev
);
974 if (carrier
!= pdata
->last_carrier
) {
975 SMSC_TRACE(pdata
, hw
, "carrier state has changed");
977 SMSC_TRACE(pdata
, hw
, "configuring for carrier OK");
978 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
979 (!pdata
->using_extphy
)) {
980 /* Restore original GPIO configuration */
981 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
982 smsc911x_reg_write(pdata
, GPIO_CFG
,
983 pdata
->gpio_setting
);
986 SMSC_TRACE(pdata
, hw
, "configuring for no carrier");
987 /* Check global setting that LED1
988 * usage is 10/100 indicator */
989 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
991 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
) &&
992 (!pdata
->using_extphy
)) {
993 /* Force 10/100 LED off, after saving
994 * original GPIO configuration */
995 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
997 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
998 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
1000 | GPIO_CFG_GPIOD0_
);
1001 smsc911x_reg_write(pdata
, GPIO_CFG
,
1002 pdata
->gpio_setting
);
1005 pdata
->last_carrier
= carrier
;
1009 static int smsc911x_mii_probe(struct net_device
*dev
)
1011 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1012 struct phy_device
*phydev
= NULL
;
1015 /* find the first phy */
1016 phydev
= phy_find_first(pdata
->mii_bus
);
1018 netdev_err(dev
, "no PHY found\n");
1022 SMSC_TRACE(pdata
, probe
, "PHY: addr %d, phy_id 0x%08X",
1023 phydev
->mdio
.addr
, phydev
->phy_id
);
1025 ret
= phy_connect_direct(dev
, phydev
, &smsc911x_phy_adjust_link
,
1026 pdata
->config
.phy_interface
);
1029 netdev_err(dev
, "Could not attach to PHY\n");
1033 phy_attached_info(phydev
);
1035 /* mask with MAC supported features */
1036 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
1037 SUPPORTED_Asym_Pause
);
1038 phydev
->advertising
= phydev
->supported
;
1040 pdata
->last_duplex
= -1;
1041 pdata
->last_carrier
= -1;
1043 #ifdef USE_PHY_WORK_AROUND
1044 if (smsc911x_phy_loopbacktest(dev
) < 0) {
1045 SMSC_WARN(pdata
, hw
, "Failed Loop Back Test");
1046 phy_disconnect(phydev
);
1049 SMSC_TRACE(pdata
, hw
, "Passed Loop Back Test");
1050 #endif /* USE_PHY_WORK_AROUND */
1052 SMSC_TRACE(pdata
, hw
, "phy initialised successfully");
1056 static int smsc911x_mii_init(struct platform_device
*pdev
,
1057 struct net_device
*dev
)
1059 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1062 pdata
->mii_bus
= mdiobus_alloc();
1063 if (!pdata
->mii_bus
) {
1068 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
1069 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s-%x",
1070 pdev
->name
, pdev
->id
);
1071 pdata
->mii_bus
->priv
= pdata
;
1072 pdata
->mii_bus
->read
= smsc911x_mii_read
;
1073 pdata
->mii_bus
->write
= smsc911x_mii_write
;
1075 pdata
->mii_bus
->parent
= &pdev
->dev
;
1077 switch (pdata
->idrev
& 0xFFFF0000) {
1082 /* External PHY supported, try to autodetect */
1083 smsc911x_phy_initialise_external(pdata
);
1086 SMSC_TRACE(pdata
, hw
, "External PHY is not supported, "
1087 "using internal PHY");
1088 pdata
->using_extphy
= 0;
1092 if (!pdata
->using_extphy
) {
1093 /* Mask all PHYs except ID 1 (internal) */
1094 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
1097 if (mdiobus_register(pdata
->mii_bus
)) {
1098 SMSC_WARN(pdata
, probe
, "Error registering mii bus");
1099 goto err_out_free_bus_2
;
1102 if (smsc911x_mii_probe(dev
) < 0) {
1103 SMSC_WARN(pdata
, probe
, "Error registering mii bus");
1104 goto err_out_unregister_bus_3
;
1109 err_out_unregister_bus_3
:
1110 mdiobus_unregister(pdata
->mii_bus
);
1112 mdiobus_free(pdata
->mii_bus
);
1117 /* Gets the number of tx statuses in the fifo */
1118 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
1120 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
1121 & TX_FIFO_INF_TSUSED_
) >> 16;
1124 /* Reads tx statuses and increments counters where necessary */
1125 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
1127 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1128 unsigned int tx_stat
;
1130 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
1131 if (unlikely(tx_stat
& 0x80000000)) {
1132 /* In this driver the packet tag is used as the packet
1133 * length. Since a packet length can never reach the
1134 * size of 0x8000, this bit is reserved. It is worth
1135 * noting that the "reserved bit" in the warning above
1136 * does not reference a hardware defined reserved bit
1137 * but rather a driver defined one.
1139 SMSC_WARN(pdata
, hw
, "Packet tag reserved bit is high");
1141 if (unlikely(tx_stat
& TX_STS_ES_
)) {
1142 dev
->stats
.tx_errors
++;
1144 dev
->stats
.tx_packets
++;
1145 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
1147 if (unlikely(tx_stat
& TX_STS_EXCESS_COL_
)) {
1148 dev
->stats
.collisions
+= 16;
1149 dev
->stats
.tx_aborted_errors
+= 1;
1151 dev
->stats
.collisions
+=
1152 ((tx_stat
>> 3) & 0xF);
1154 if (unlikely(tx_stat
& TX_STS_LOST_CARRIER_
))
1155 dev
->stats
.tx_carrier_errors
+= 1;
1156 if (unlikely(tx_stat
& TX_STS_LATE_COL_
)) {
1157 dev
->stats
.collisions
++;
1158 dev
->stats
.tx_aborted_errors
++;
1164 /* Increments the Rx error counters */
1166 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
1170 if (unlikely(rxstat
& RX_STS_ES_
)) {
1171 dev
->stats
.rx_errors
++;
1172 if (unlikely(rxstat
& RX_STS_CRC_ERR_
)) {
1173 dev
->stats
.rx_crc_errors
++;
1177 if (likely(!crc_err
)) {
1178 if (unlikely((rxstat
& RX_STS_FRAME_TYPE_
) &&
1179 (rxstat
& RX_STS_LENGTH_ERR_
)))
1180 dev
->stats
.rx_length_errors
++;
1181 if (rxstat
& RX_STS_MCAST_
)
1182 dev
->stats
.multicast
++;
1186 /* Quickly dumps bad packets */
1188 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktwords
)
1190 if (likely(pktwords
>= 4)) {
1191 unsigned int timeout
= 500;
1193 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
1196 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
1197 } while ((val
& RX_DP_CTRL_RX_FFWD_
) && --timeout
);
1199 if (unlikely(timeout
== 0))
1200 SMSC_WARN(pdata
, hw
, "Timed out waiting for "
1201 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
1205 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
1209 /* NAPI poll function */
1210 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
1212 struct smsc911x_data
*pdata
=
1213 container_of(napi
, struct smsc911x_data
, napi
);
1214 struct net_device
*dev
= pdata
->dev
;
1217 while (npackets
< budget
) {
1218 unsigned int pktlength
;
1219 unsigned int pktwords
;
1220 struct sk_buff
*skb
;
1221 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
1225 /* We processed all packets available. Tell NAPI it can
1226 * stop polling then re-enable rx interrupts */
1227 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
1228 napi_complete(napi
);
1229 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1230 temp
|= INT_EN_RSFL_EN_
;
1231 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1235 /* Count packet for NAPI scheduling, even if it has an error.
1236 * Error packets still require cycles to discard */
1239 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
1240 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1241 smsc911x_rx_counterrors(dev
, rxstat
);
1243 if (unlikely(rxstat
& RX_STS_ES_
)) {
1244 SMSC_WARN(pdata
, rx_err
,
1245 "Discarding packet with error bit set");
1246 /* Packet has an error, discard it and continue with
1248 smsc911x_rx_fastforward(pdata
, pktwords
);
1249 dev
->stats
.rx_dropped
++;
1253 skb
= netdev_alloc_skb(dev
, pktwords
<< 2);
1254 if (unlikely(!skb
)) {
1255 SMSC_WARN(pdata
, rx_err
,
1256 "Unable to allocate skb for rx packet");
1257 /* Drop the packet and stop this polling iteration */
1258 smsc911x_rx_fastforward(pdata
, pktwords
);
1259 dev
->stats
.rx_dropped
++;
1263 pdata
->ops
->rx_readfifo(pdata
,
1264 (unsigned int *)skb
->data
, pktwords
);
1266 /* Align IP on 16B boundary */
1267 skb_reserve(skb
, NET_IP_ALIGN
);
1268 skb_put(skb
, pktlength
- 4);
1269 skb
->protocol
= eth_type_trans(skb
, dev
);
1270 skb_checksum_none_assert(skb
);
1271 netif_receive_skb(skb
);
1273 /* Update counters */
1274 dev
->stats
.rx_packets
++;
1275 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1278 /* Return total received packets */
1282 /* Returns hash bit number for given MAC address
1284 * 01 00 5E 00 00 01 -> returns bit number 31 */
1285 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1287 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1290 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1292 /* Performs the multicast & mac_cr update. This is called when
1293 * safe on the current hardware, and with the mac_lock held */
1294 unsigned int mac_cr
;
1296 SMSC_ASSERT_MAC_LOCK(pdata
);
1298 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1299 mac_cr
|= pdata
->set_bits_mask
;
1300 mac_cr
&= ~(pdata
->clear_bits_mask
);
1301 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1302 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1303 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1304 SMSC_TRACE(pdata
, hw
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1305 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1308 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1310 unsigned int mac_cr
;
1312 /* This function is only called for older LAN911x devices
1313 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1314 * be modified during Rx - newer devices immediately update the
1317 * This is called from interrupt context */
1319 spin_lock(&pdata
->mac_lock
);
1321 /* Check Rx has stopped */
1322 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1323 SMSC_WARN(pdata
, drv
, "Rx not stopped");
1325 /* Perform the update - safe to do now Rx has stopped */
1326 smsc911x_rx_multicast_update(pdata
);
1329 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1330 mac_cr
|= MAC_CR_RXEN_
;
1331 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1333 pdata
->multicast_update_pending
= 0;
1335 spin_unlock(&pdata
->mac_lock
);
1338 static int smsc911x_phy_general_power_up(struct smsc911x_data
*pdata
)
1340 struct net_device
*ndev
= pdata
->dev
;
1341 struct phy_device
*phy_dev
= ndev
->phydev
;
1347 /* If the internal PHY is in General Power-Down mode, all, except the
1348 * management interface, is powered-down and stays in that condition as
1349 * long as Phy register bit 0.11 is HIGH.
1351 * In that case, clear the bit 0.11, so the PHY powers up and we can
1352 * access to the phy registers.
1354 rc
= phy_read(phy_dev
, MII_BMCR
);
1356 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1360 /* If the PHY general power-down bit is not set is not necessary to
1361 * disable the general power down-mode.
1363 if (rc
& BMCR_PDOWN
) {
1364 rc
= phy_write(phy_dev
, MII_BMCR
, rc
& ~BMCR_PDOWN
);
1366 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1370 usleep_range(1000, 1500);
1376 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data
*pdata
)
1378 struct net_device
*ndev
= pdata
->dev
;
1379 struct phy_device
*phy_dev
= ndev
->phydev
;
1385 rc
= phy_read(phy_dev
, MII_LAN83C185_CTRL_STATUS
);
1388 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1392 /* Only disable if energy detect mode is already enabled */
1393 if (rc
& MII_LAN83C185_EDPWRDOWN
) {
1394 /* Disable energy detect mode for this SMSC Transceivers */
1395 rc
= phy_write(phy_dev
, MII_LAN83C185_CTRL_STATUS
,
1396 rc
& (~MII_LAN83C185_EDPWRDOWN
));
1399 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1402 /* Allow PHY to wakeup */
1409 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data
*pdata
)
1411 struct net_device
*ndev
= pdata
->dev
;
1412 struct phy_device
*phy_dev
= ndev
->phydev
;
1418 rc
= phy_read(phy_dev
, MII_LAN83C185_CTRL_STATUS
);
1421 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1425 /* Only enable if energy detect mode is already disabled */
1426 if (!(rc
& MII_LAN83C185_EDPWRDOWN
)) {
1427 /* Enable energy detect mode for this SMSC Transceivers */
1428 rc
= phy_write(phy_dev
, MII_LAN83C185_CTRL_STATUS
,
1429 rc
| MII_LAN83C185_EDPWRDOWN
);
1432 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1439 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1441 unsigned int timeout
;
1446 * Make sure to power-up the PHY chip before doing a reset, otherwise
1449 ret
= smsc911x_phy_general_power_up(pdata
);
1451 SMSC_WARN(pdata
, drv
, "Failed to power-up the PHY chip");
1456 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1457 * are initialized in a Energy Detect Power-Down mode that prevents
1458 * the MAC chip to be software reseted. So we have to wakeup the PHY
1461 if (pdata
->generation
== 4) {
1462 ret
= smsc911x_phy_disable_energy_detect(pdata
);
1465 SMSC_WARN(pdata
, drv
, "Failed to wakeup the PHY chip");
1470 /* Reset the LAN911x */
1471 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1475 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1476 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1478 if (unlikely(temp
& HW_CFG_SRST_
)) {
1479 SMSC_WARN(pdata
, drv
, "Failed to complete reset");
1483 if (pdata
->generation
== 4) {
1484 ret
= smsc911x_phy_enable_energy_detect(pdata
);
1487 SMSC_WARN(pdata
, drv
, "Failed to wakeup the PHY chip");
1495 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1497 smsc911x_set_hw_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1499 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1500 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1501 (dev_addr
[1] << 8) | dev_addr
[0];
1503 SMSC_ASSERT_MAC_LOCK(pdata
);
1505 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1506 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1509 static void smsc911x_disable_irq_chip(struct net_device
*dev
)
1511 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1513 smsc911x_reg_write(pdata
, INT_EN
, 0);
1514 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1517 static int smsc911x_open(struct net_device
*dev
)
1519 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1520 unsigned int timeout
;
1522 unsigned int intcfg
;
1524 /* if the phy is not yet registered, retry later*/
1526 SMSC_WARN(pdata
, hw
, "phy_dev is NULL");
1530 /* Reset the LAN911x */
1531 if (smsc911x_soft_reset(pdata
)) {
1532 SMSC_WARN(pdata
, hw
, "soft reset failed");
1536 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1537 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1539 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1540 spin_lock_irq(&pdata
->mac_lock
);
1541 smsc911x_mac_write(pdata
, VLAN1
, ETH_P_8021Q
);
1542 spin_unlock_irq(&pdata
->mac_lock
);
1544 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1546 while ((smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) &&
1551 if (unlikely(timeout
== 0))
1552 SMSC_WARN(pdata
, ifup
,
1553 "Timed out waiting for EEPROM busy bit to clear");
1555 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1557 /* The soft reset above cleared the device's MAC address,
1558 * restore it from local copy (set in probe) */
1559 spin_lock_irq(&pdata
->mac_lock
);
1560 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1561 spin_unlock_irq(&pdata
->mac_lock
);
1563 /* Initialise irqs, but leave all sources disabled */
1564 smsc911x_disable_irq_chip(dev
);
1566 /* Set interrupt deassertion to 100uS */
1567 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1569 if (pdata
->config
.irq_polarity
) {
1570 SMSC_TRACE(pdata
, ifup
, "irq polarity: active high");
1571 intcfg
|= INT_CFG_IRQ_POL_
;
1573 SMSC_TRACE(pdata
, ifup
, "irq polarity: active low");
1576 if (pdata
->config
.irq_type
) {
1577 SMSC_TRACE(pdata
, ifup
, "irq type: push-pull");
1578 intcfg
|= INT_CFG_IRQ_TYPE_
;
1580 SMSC_TRACE(pdata
, ifup
, "irq type: open drain");
1583 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1585 SMSC_TRACE(pdata
, ifup
, "Testing irq handler using IRQ %d", dev
->irq
);
1586 pdata
->software_irq_signal
= 0;
1589 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1590 temp
|= INT_EN_SW_INT_EN_
;
1591 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1595 if (pdata
->software_irq_signal
)
1600 if (!pdata
->software_irq_signal
) {
1601 netdev_warn(dev
, "ISR failed signaling test (IRQ %d)\n",
1605 SMSC_TRACE(pdata
, ifup
, "IRQ handler passed test using IRQ %d",
1608 netdev_info(dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1609 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1611 /* Reset the last known duplex and carrier */
1612 pdata
->last_duplex
= -1;
1613 pdata
->last_carrier
= -1;
1615 /* Bring the PHY up */
1616 phy_start(dev
->phydev
);
1618 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1619 /* Preserve TX FIFO size and external PHY configuration */
1620 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1622 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1624 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1625 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1626 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1627 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1629 /* set RX Data offset to 2 bytes for alignment */
1630 smsc911x_reg_write(pdata
, RX_CFG
, (NET_IP_ALIGN
<< 8));
1632 /* enable NAPI polling before enabling RX interrupts */
1633 napi_enable(&pdata
->napi
);
1635 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1636 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
| INT_EN_RXSTOP_INT_EN_
);
1637 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1639 spin_lock_irq(&pdata
->mac_lock
);
1640 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1641 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1642 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1643 spin_unlock_irq(&pdata
->mac_lock
);
1645 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1647 netif_start_queue(dev
);
1651 /* Entry point for stopping the interface */
1652 static int smsc911x_stop(struct net_device
*dev
)
1654 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1657 /* Disable all device interrupts */
1658 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1659 temp
&= ~INT_CFG_IRQ_EN_
;
1660 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1662 /* Stop Tx and Rx polling */
1663 netif_stop_queue(dev
);
1664 napi_disable(&pdata
->napi
);
1666 /* At this point all Rx and Tx activity is stopped */
1667 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1668 smsc911x_tx_update_txcounters(dev
);
1670 /* Bring the PHY down */
1672 phy_stop(dev
->phydev
);
1674 SMSC_TRACE(pdata
, ifdown
, "Interface stopped");
1678 /* Entry point for transmitting a packet */
1679 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1681 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1682 unsigned int freespace
;
1683 unsigned int tx_cmd_a
;
1684 unsigned int tx_cmd_b
;
1689 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1691 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1692 SMSC_WARN(pdata
, tx_err
,
1693 "Tx data fifo low, space available: %d", freespace
);
1695 /* Word alignment adjustment */
1696 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1697 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1698 tx_cmd_a
|= (unsigned int)skb
->len
;
1700 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1701 tx_cmd_b
|= (unsigned int)skb
->len
;
1703 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1704 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1706 bufp
= (ulong
)skb
->data
& (~0x3);
1707 wrsz
= (u32
)skb
->len
+ 3;
1708 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1711 pdata
->ops
->tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1712 freespace
-= (skb
->len
+ 32);
1713 skb_tx_timestamp(skb
);
1714 dev_consume_skb_any(skb
);
1716 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1717 smsc911x_tx_update_txcounters(dev
);
1719 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1720 netif_stop_queue(dev
);
1721 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1724 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1727 return NETDEV_TX_OK
;
1730 /* Entry point for getting status counters */
1731 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1733 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1734 smsc911x_tx_update_txcounters(dev
);
1735 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1739 /* Entry point for setting addressing modes */
1740 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1742 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1743 unsigned long flags
;
1745 if (dev
->flags
& IFF_PROMISC
) {
1746 /* Enabling promiscuous mode */
1747 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1748 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1751 } else if (dev
->flags
& IFF_ALLMULTI
) {
1752 /* Enabling all multicast mode */
1753 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1754 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1757 } else if (!netdev_mc_empty(dev
)) {
1758 /* Enabling specific multicast addresses */
1759 unsigned int hash_high
= 0;
1760 unsigned int hash_low
= 0;
1761 struct netdev_hw_addr
*ha
;
1763 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1764 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1766 netdev_for_each_mc_addr(ha
, dev
) {
1767 unsigned int bitnum
= smsc911x_hash(ha
->addr
);
1768 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1776 pdata
->hashhi
= hash_high
;
1777 pdata
->hashlo
= hash_low
;
1779 /* Enabling local MAC address only */
1780 pdata
->set_bits_mask
= 0;
1781 pdata
->clear_bits_mask
=
1782 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1787 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1789 if (pdata
->generation
<= 1) {
1790 /* Older hardware revision - cannot change these flags while
1792 if (!pdata
->multicast_update_pending
) {
1794 SMSC_TRACE(pdata
, hw
, "scheduling mcast update");
1795 pdata
->multicast_update_pending
= 1;
1797 /* Request the hardware to stop, then perform the
1798 * update when we get an RX_STOP interrupt */
1799 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1800 temp
&= ~(MAC_CR_RXEN_
);
1801 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1803 /* There is another update pending, this should now
1804 * use the newer values */
1807 /* Newer hardware revision - can write immediately */
1808 smsc911x_rx_multicast_update(pdata
);
1811 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1814 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1816 struct net_device
*dev
= dev_id
;
1817 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1818 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1819 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1820 int serviced
= IRQ_NONE
;
1823 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1824 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1825 temp
&= (~INT_EN_SW_INT_EN_
);
1826 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1827 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1828 pdata
->software_irq_signal
= 1;
1830 serviced
= IRQ_HANDLED
;
1833 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1834 /* Called when there is a multicast update scheduled and
1835 * it is now safe to complete the update */
1836 SMSC_TRACE(pdata
, intr
, "RX Stop interrupt");
1837 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1838 if (pdata
->multicast_update_pending
)
1839 smsc911x_rx_multicast_update_workaround(pdata
);
1840 serviced
= IRQ_HANDLED
;
1843 if (intsts
& inten
& INT_STS_TDFA_
) {
1844 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1845 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1846 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1847 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1848 netif_wake_queue(dev
);
1849 serviced
= IRQ_HANDLED
;
1852 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1853 SMSC_TRACE(pdata
, intr
, "RX Error interrupt");
1854 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1855 serviced
= IRQ_HANDLED
;
1858 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1859 if (likely(napi_schedule_prep(&pdata
->napi
))) {
1860 /* Disable Rx interrupts */
1861 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1862 temp
&= (~INT_EN_RSFL_EN_
);
1863 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1864 /* Schedule a NAPI poll */
1865 __napi_schedule(&pdata
->napi
);
1867 SMSC_WARN(pdata
, rx_err
, "napi_schedule_prep failed");
1869 serviced
= IRQ_HANDLED
;
1875 #ifdef CONFIG_NET_POLL_CONTROLLER
1876 static void smsc911x_poll_controller(struct net_device
*dev
)
1878 disable_irq(dev
->irq
);
1879 smsc911x_irqhandler(0, dev
);
1880 enable_irq(dev
->irq
);
1882 #endif /* CONFIG_NET_POLL_CONTROLLER */
1884 static int smsc911x_set_mac_address(struct net_device
*dev
, void *p
)
1886 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1887 struct sockaddr
*addr
= p
;
1889 /* On older hardware revisions we cannot change the mac address
1890 * registers while receiving data. Newer devices can safely change
1891 * this at any time. */
1892 if (pdata
->generation
<= 1 && netif_running(dev
))
1895 if (!is_valid_ether_addr(addr
->sa_data
))
1896 return -EADDRNOTAVAIL
;
1898 memcpy(dev
->dev_addr
, addr
->sa_data
, ETH_ALEN
);
1900 spin_lock_irq(&pdata
->mac_lock
);
1901 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1902 spin_unlock_irq(&pdata
->mac_lock
);
1904 netdev_info(dev
, "MAC Address: %pM\n", dev
->dev_addr
);
1909 /* Standard ioctls for mii-tool */
1910 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1912 if (!netif_running(dev
) || !dev
->phydev
)
1915 return phy_mii_ioctl(dev
->phydev
, ifr
, cmd
);
1918 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1919 struct ethtool_drvinfo
*info
)
1921 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1922 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1923 strlcpy(info
->bus_info
, dev_name(dev
->dev
.parent
),
1924 sizeof(info
->bus_info
));
1927 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1929 return phy_start_aneg(dev
->phydev
);
1932 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1934 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1935 return pdata
->msg_enable
;
1938 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1940 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1941 pdata
->msg_enable
= level
;
1944 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1946 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1951 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1954 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1955 struct phy_device
*phy_dev
= dev
->phydev
;
1956 unsigned long flags
;
1961 regs
->version
= pdata
->idrev
;
1962 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1963 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1965 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1966 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1967 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1968 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1971 for (i
= 0; i
<= 31; i
++)
1972 data
[j
++] = smsc911x_mii_read(phy_dev
->mdio
.bus
,
1973 phy_dev
->mdio
.addr
, i
);
1976 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1978 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1979 temp
&= ~GPIO_CFG_EEPR_EN_
;
1980 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
1984 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
1989 SMSC_TRACE(pdata
, drv
, "op 0x%08x", op
);
1990 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
1991 SMSC_WARN(pdata
, drv
, "Busy at start");
1995 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
1996 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
2000 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
2001 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (--timeout
));
2004 SMSC_TRACE(pdata
, drv
, "TIMED OUT");
2008 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
2009 SMSC_TRACE(pdata
, drv
, "Error occurred during eeprom operation");
2016 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
2017 u8 address
, u8
*data
)
2019 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
2022 SMSC_TRACE(pdata
, drv
, "address 0x%x", address
);
2023 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2026 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
2031 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
2032 u8 address
, u8 data
)
2034 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
2038 SMSC_TRACE(pdata
, drv
, "address 0x%x, data 0x%x", address
, data
);
2039 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2042 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
2043 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
2045 /* Workaround for hardware read-after-write restriction */
2046 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2048 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2054 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
2056 return SMSC911X_EEPROM_SIZE
;
2059 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
2060 struct ethtool_eeprom
*eeprom
, u8
*data
)
2062 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2063 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
2067 smsc911x_eeprom_enable_access(pdata
);
2069 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
2070 for (i
= 0; i
< len
; i
++) {
2071 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
2078 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
2083 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
2084 struct ethtool_eeprom
*eeprom
, u8
*data
)
2087 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2089 smsc911x_eeprom_enable_access(pdata
);
2090 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
2091 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
2092 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
2094 /* Single byte write, according to man page */
2100 static const struct ethtool_ops smsc911x_ethtool_ops
= {
2101 .get_link
= ethtool_op_get_link
,
2102 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
2103 .nway_reset
= smsc911x_ethtool_nwayreset
,
2104 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
2105 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
2106 .get_regs_len
= smsc911x_ethtool_getregslen
,
2107 .get_regs
= smsc911x_ethtool_getregs
,
2108 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
2109 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
2110 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
2111 .get_ts_info
= ethtool_op_get_ts_info
,
2112 .get_link_ksettings
= phy_ethtool_get_link_ksettings
,
2113 .set_link_ksettings
= phy_ethtool_set_link_ksettings
,
2116 static const struct net_device_ops smsc911x_netdev_ops
= {
2117 .ndo_open
= smsc911x_open
,
2118 .ndo_stop
= smsc911x_stop
,
2119 .ndo_start_xmit
= smsc911x_hard_start_xmit
,
2120 .ndo_get_stats
= smsc911x_get_stats
,
2121 .ndo_set_rx_mode
= smsc911x_set_multicast_list
,
2122 .ndo_do_ioctl
= smsc911x_do_ioctl
,
2123 .ndo_change_mtu
= eth_change_mtu
,
2124 .ndo_validate_addr
= eth_validate_addr
,
2125 .ndo_set_mac_address
= smsc911x_set_mac_address
,
2126 #ifdef CONFIG_NET_POLL_CONTROLLER
2127 .ndo_poll_controller
= smsc911x_poll_controller
,
2131 /* copies the current mac address from hardware to dev->dev_addr */
2132 static void smsc911x_read_mac_address(struct net_device
*dev
)
2134 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2135 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
2136 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
2138 dev
->dev_addr
[0] = (u8
)(mac_low32
);
2139 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
2140 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
2141 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
2142 dev
->dev_addr
[4] = (u8
)(mac_high16
);
2143 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
2146 /* Initializing private device structures, only called from probe */
2147 static int smsc911x_init(struct net_device
*dev
)
2149 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2150 unsigned int byte_test
, mask
;
2151 unsigned int to
= 100;
2153 SMSC_TRACE(pdata
, probe
, "Driver Parameters:");
2154 SMSC_TRACE(pdata
, probe
, "LAN base: 0x%08lX",
2155 (unsigned long)pdata
->ioaddr
);
2156 SMSC_TRACE(pdata
, probe
, "IRQ: %d", dev
->irq
);
2157 SMSC_TRACE(pdata
, probe
, "PHY will be autodetected.");
2159 spin_lock_init(&pdata
->dev_lock
);
2160 spin_lock_init(&pdata
->mac_lock
);
2162 if (pdata
->ioaddr
== NULL
) {
2163 SMSC_WARN(pdata
, probe
, "pdata->ioaddr: 0x00000000");
2168 * poll the READY bit in PMT_CTRL. Any other access to the device is
2169 * forbidden while this bit isn't set. Try for 100ms
2171 * Note that this test is done before the WORD_SWAP register is
2172 * programmed. So in some configurations the READY bit is at 16 before
2173 * WORD_SWAP is written to. This issue is worked around by waiting
2174 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2176 * SMSC has confirmed that checking bit 16 (marked as reserved in
2177 * the datasheet) is fine since these bits "will either never be set
2178 * or can only go high after READY does (so also indicate the device
2182 mask
= PMT_CTRL_READY_
| swahw32(PMT_CTRL_READY_
);
2183 while (!(smsc911x_reg_read(pdata
, PMT_CTRL
) & mask
) && --to
)
2187 netdev_err(dev
, "Device not READY in 100ms aborting\n");
2191 /* Check byte ordering */
2192 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2193 SMSC_TRACE(pdata
, probe
, "BYTE_TEST: 0x%08X", byte_test
);
2194 if (byte_test
== 0x43218765) {
2195 SMSC_TRACE(pdata
, probe
, "BYTE_TEST looks swapped, "
2196 "applying WORD_SWAP");
2197 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
2199 /* 1 dummy read of BYTE_TEST is needed after a write to
2200 * WORD_SWAP before its contents are valid */
2201 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2203 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2206 if (byte_test
!= 0x87654321) {
2207 SMSC_WARN(pdata
, drv
, "BYTE_TEST: 0x%08X", byte_test
);
2208 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
2209 SMSC_WARN(pdata
, probe
,
2210 "top 16 bits equal to bottom 16 bits");
2211 SMSC_TRACE(pdata
, probe
,
2212 "This may mean the chip is set "
2213 "for 32 bit while the bus is reading 16 bit");
2218 /* Default generation to zero (all workarounds apply) */
2219 pdata
->generation
= 0;
2221 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
2222 switch (pdata
->idrev
& 0xFFFF0000) {
2228 /* LAN911[5678] family */
2229 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
2236 /* LAN921[5678] family */
2237 pdata
->generation
= 3;
2244 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2245 pdata
->generation
= 4;
2249 SMSC_WARN(pdata
, probe
, "LAN911x not identified, idrev: 0x%08X",
2254 SMSC_TRACE(pdata
, probe
,
2255 "LAN911x identified, idrev: 0x%08X, generation: %d",
2256 pdata
->idrev
, pdata
->generation
);
2258 if (pdata
->generation
== 0)
2259 SMSC_WARN(pdata
, probe
,
2260 "This driver is not intended for this chip revision");
2262 /* workaround for platforms without an eeprom, where the mac address
2263 * is stored elsewhere and set by the bootloader. This saves the
2264 * mac address before resetting the device */
2265 if (pdata
->config
.flags
& SMSC911X_SAVE_MAC_ADDRESS
) {
2266 spin_lock_irq(&pdata
->mac_lock
);
2267 smsc911x_read_mac_address(dev
);
2268 spin_unlock_irq(&pdata
->mac_lock
);
2271 /* Reset the LAN911x */
2272 if (smsc911x_phy_reset(pdata
) || smsc911x_soft_reset(pdata
))
2275 dev
->flags
|= IFF_MULTICAST
;
2276 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
2277 dev
->netdev_ops
= &smsc911x_netdev_ops
;
2278 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
2283 static int smsc911x_drv_remove(struct platform_device
*pdev
)
2285 struct net_device
*dev
;
2286 struct smsc911x_data
*pdata
;
2287 struct resource
*res
;
2289 dev
= platform_get_drvdata(pdev
);
2291 pdata
= netdev_priv(dev
);
2293 BUG_ON(!pdata
->ioaddr
);
2294 BUG_ON(!dev
->phydev
);
2296 SMSC_TRACE(pdata
, ifdown
, "Stopping driver");
2298 phy_disconnect(dev
->phydev
);
2299 mdiobus_unregister(pdata
->mii_bus
);
2300 mdiobus_free(pdata
->mii_bus
);
2302 unregister_netdev(dev
);
2303 free_irq(dev
->irq
, dev
);
2304 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
2307 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2309 release_mem_region(res
->start
, resource_size(res
));
2311 iounmap(pdata
->ioaddr
);
2313 (void)smsc911x_disable_resources(pdev
);
2314 smsc911x_free_resources(pdev
);
2318 pm_runtime_put(&pdev
->dev
);
2319 pm_runtime_disable(&pdev
->dev
);
2324 /* standard register acces */
2325 static const struct smsc911x_ops standard_smsc911x_ops
= {
2326 .reg_read
= __smsc911x_reg_read
,
2327 .reg_write
= __smsc911x_reg_write
,
2328 .rx_readfifo
= smsc911x_rx_readfifo
,
2329 .tx_writefifo
= smsc911x_tx_writefifo
,
2332 /* shifted register access */
2333 static const struct smsc911x_ops shifted_smsc911x_ops
= {
2334 .reg_read
= __smsc911x_reg_read_shift
,
2335 .reg_write
= __smsc911x_reg_write_shift
,
2336 .rx_readfifo
= smsc911x_rx_readfifo_shift
,
2337 .tx_writefifo
= smsc911x_tx_writefifo_shift
,
2340 static int smsc911x_probe_config(struct smsc911x_platform_config
*config
,
2347 phy_interface
= device_get_phy_mode(dev
);
2348 if (phy_interface
< 0)
2349 phy_interface
= PHY_INTERFACE_MODE_NA
;
2350 config
->phy_interface
= phy_interface
;
2352 device_get_mac_address(dev
, config
->mac
, ETH_ALEN
);
2354 err
= device_property_read_u32(dev
, "reg-io-width", &width
);
2357 if (!err
&& width
== 4)
2358 config
->flags
|= SMSC911X_USE_32BIT
;
2360 config
->flags
|= SMSC911X_USE_16BIT
;
2362 device_property_read_u32(dev
, "reg-shift", &config
->shift
);
2364 if (device_property_present(dev
, "smsc,irq-active-high"))
2365 config
->irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
;
2367 if (device_property_present(dev
, "smsc,irq-push-pull"))
2368 config
->irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
;
2370 if (device_property_present(dev
, "smsc,force-internal-phy"))
2371 config
->flags
|= SMSC911X_FORCE_INTERNAL_PHY
;
2373 if (device_property_present(dev
, "smsc,force-external-phy"))
2374 config
->flags
|= SMSC911X_FORCE_EXTERNAL_PHY
;
2376 if (device_property_present(dev
, "smsc,save-mac-address"))
2377 config
->flags
|= SMSC911X_SAVE_MAC_ADDRESS
;
2382 static int smsc911x_drv_probe(struct platform_device
*pdev
)
2384 struct net_device
*dev
;
2385 struct smsc911x_data
*pdata
;
2386 struct smsc911x_platform_config
*config
= dev_get_platdata(&pdev
->dev
);
2387 struct resource
*res
;
2388 unsigned int intcfg
= 0;
2389 int res_size
, irq
, irq_flags
;
2392 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
2395 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2397 pr_warn("Could not allocate resource\n");
2401 res_size
= resource_size(res
);
2403 irq
= platform_get_irq(pdev
, 0);
2404 if (irq
== -EPROBE_DEFER
) {
2405 retval
= -EPROBE_DEFER
;
2407 } else if (irq
<= 0) {
2408 pr_warn("Could not allocate irq resource\n");
2413 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
2418 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
2421 goto out_release_io_1
;
2424 SET_NETDEV_DEV(dev
, &pdev
->dev
);
2426 pdata
= netdev_priv(dev
);
2428 irq_flags
= irq_get_trigger_type(irq
);
2429 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
2432 pdata
->msg_enable
= ((1 << debug
) - 1);
2434 platform_set_drvdata(pdev
, dev
);
2436 retval
= smsc911x_request_resources(pdev
);
2438 goto out_request_resources_fail
;
2440 retval
= smsc911x_enable_resources(pdev
);
2442 goto out_enable_resources_fail
;
2444 if (pdata
->ioaddr
== NULL
) {
2445 SMSC_WARN(pdata
, probe
, "Error smsc911x base address invalid");
2447 goto out_disable_resources
;
2450 retval
= smsc911x_probe_config(&pdata
->config
, &pdev
->dev
);
2451 if (retval
&& config
) {
2452 /* copy config parameters across to pdata */
2453 memcpy(&pdata
->config
, config
, sizeof(pdata
->config
));
2458 SMSC_WARN(pdata
, probe
, "Error smsc911x config not found");
2459 goto out_disable_resources
;
2462 /* assume standard, non-shifted, access to HW registers */
2463 pdata
->ops
= &standard_smsc911x_ops
;
2464 /* apply the right access if shifting is needed */
2465 if (pdata
->config
.shift
)
2466 pdata
->ops
= &shifted_smsc911x_ops
;
2468 pm_runtime_enable(&pdev
->dev
);
2469 pm_runtime_get_sync(&pdev
->dev
);
2471 retval
= smsc911x_init(dev
);
2473 goto out_disable_resources
;
2475 /* configure irq polarity and type before connecting isr */
2476 if (pdata
->config
.irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
2477 intcfg
|= INT_CFG_IRQ_POL_
;
2479 if (pdata
->config
.irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
2480 intcfg
|= INT_CFG_IRQ_TYPE_
;
2482 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
2484 /* Ensure interrupts are globally disabled before connecting ISR */
2485 smsc911x_disable_irq_chip(dev
);
2487 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
,
2488 irq_flags
| IRQF_SHARED
, dev
->name
, dev
);
2490 SMSC_WARN(pdata
, probe
,
2491 "Unable to claim requested irq: %d", dev
->irq
);
2492 goto out_disable_resources
;
2495 netif_carrier_off(dev
);
2497 retval
= register_netdev(dev
);
2499 SMSC_WARN(pdata
, probe
, "Error %i registering device", retval
);
2502 SMSC_TRACE(pdata
, probe
,
2503 "Network interface: \"%s\"", dev
->name
);
2506 retval
= smsc911x_mii_init(pdev
, dev
);
2508 SMSC_WARN(pdata
, probe
, "Error %i initialising mii", retval
);
2509 goto out_unregister_netdev_5
;
2512 spin_lock_irq(&pdata
->mac_lock
);
2514 /* Check if mac address has been specified when bringing interface up */
2515 if (is_valid_ether_addr(dev
->dev_addr
)) {
2516 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2517 SMSC_TRACE(pdata
, probe
,
2518 "MAC Address is specified by configuration");
2519 } else if (is_valid_ether_addr(pdata
->config
.mac
)) {
2520 memcpy(dev
->dev_addr
, pdata
->config
.mac
, ETH_ALEN
);
2521 SMSC_TRACE(pdata
, probe
,
2522 "MAC Address specified by platform data");
2524 /* Try reading mac address from device. if EEPROM is present
2525 * it will already have been set */
2528 if (is_valid_ether_addr(dev
->dev_addr
)) {
2529 /* eeprom values are valid so use them */
2530 SMSC_TRACE(pdata
, probe
,
2531 "Mac Address is read from LAN911x EEPROM");
2533 /* eeprom values are invalid, generate random MAC */
2534 eth_hw_addr_random(dev
);
2535 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2536 SMSC_TRACE(pdata
, probe
,
2537 "MAC Address is set to eth_random_addr");
2541 spin_unlock_irq(&pdata
->mac_lock
);
2543 netdev_info(dev
, "MAC Address: %pM\n", dev
->dev_addr
);
2547 out_unregister_netdev_5
:
2548 unregister_netdev(dev
);
2550 free_irq(dev
->irq
, dev
);
2551 out_disable_resources
:
2552 pm_runtime_put(&pdev
->dev
);
2553 pm_runtime_disable(&pdev
->dev
);
2554 (void)smsc911x_disable_resources(pdev
);
2555 out_enable_resources_fail
:
2556 smsc911x_free_resources(pdev
);
2557 out_request_resources_fail
:
2558 iounmap(pdata
->ioaddr
);
2561 release_mem_region(res
->start
, resource_size(res
));
2567 /* This implementation assumes the devices remains powered on its VDDVARIO
2568 * pins during suspend. */
2570 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2572 static int smsc911x_suspend(struct device
*dev
)
2574 struct net_device
*ndev
= dev_get_drvdata(dev
);
2575 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2577 /* enable wake on LAN, energy detection and the external PME
2579 smsc911x_reg_write(pdata
, PMT_CTRL
,
2580 PMT_CTRL_PM_MODE_D1_
| PMT_CTRL_WOL_EN_
|
2581 PMT_CTRL_ED_EN_
| PMT_CTRL_PME_EN_
);
2586 static int smsc911x_resume(struct device
*dev
)
2588 struct net_device
*ndev
= dev_get_drvdata(dev
);
2589 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2590 unsigned int to
= 100;
2592 /* Note 3.11 from the datasheet:
2593 * "When the LAN9220 is in a power saving state, a write of any
2594 * data to the BYTE_TEST register will wake-up the device."
2596 smsc911x_reg_write(pdata
, BYTE_TEST
, 0);
2598 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2599 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2601 while (!(smsc911x_reg_read(pdata
, PMT_CTRL
) & PMT_CTRL_READY_
) && --to
)
2604 return (to
== 0) ? -EIO
: 0;
2607 static const struct dev_pm_ops smsc911x_pm_ops
= {
2608 .suspend
= smsc911x_suspend
,
2609 .resume
= smsc911x_resume
,
2612 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2615 #define SMSC911X_PM_OPS NULL
2619 static const struct of_device_id smsc911x_dt_ids
[] = {
2620 { .compatible
= "smsc,lan9115", },
2623 MODULE_DEVICE_TABLE(of
, smsc911x_dt_ids
);
2626 static const struct acpi_device_id smsc911x_acpi_match
[] = {
2630 MODULE_DEVICE_TABLE(acpi
, smsc911x_acpi_match
);
2632 static struct platform_driver smsc911x_driver
= {
2633 .probe
= smsc911x_drv_probe
,
2634 .remove
= smsc911x_drv_remove
,
2636 .name
= SMSC_CHIPNAME
,
2637 .pm
= SMSC911X_PM_OPS
,
2638 .of_match_table
= of_match_ptr(smsc911x_dt_ids
),
2639 .acpi_match_table
= ACPI_PTR(smsc911x_acpi_match
),
2643 /* Entry point for loading the module */
2644 static int __init
smsc911x_init_module(void)
2647 return platform_driver_register(&smsc911x_driver
);
2650 /* entry point for unloading the module */
2651 static void __exit
smsc911x_cleanup_module(void)
2653 platform_driver_unregister(&smsc911x_driver
);
2656 module_init(smsc911x_init_module
);
2657 module_exit(smsc911x_cleanup_module
);