1 /*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
5 Copyright(C) 2007-2011 STMicroelectronics Ltd
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
25 Documentation available at:
26 http://www.stlinux.com
28 https://bugzilla.stlinux.com/
29 *******************************************************************************/
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/slab.h>
48 #include <linux/prefetch.h>
49 #ifdef CONFIG_STMMAC_DEBUG_FS
50 #include <linux/debugfs.h>
51 #include <linux/seq_file.h>
55 #define STMMAC_RESOURCE_NAME "stmmaceth"
58 /*#define STMMAC_DEBUG*/
60 #define DBG(nlevel, klevel, fmt, args...) \
61 ((void)(netif_msg_##nlevel(priv) && \
62 printk(KERN_##klevel fmt, ## args)))
64 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
67 #undef STMMAC_RX_DEBUG
68 /*#define STMMAC_RX_DEBUG*/
69 #ifdef STMMAC_RX_DEBUG
70 #define RX_DBG(fmt, args...) printk(fmt, ## args)
72 #define RX_DBG(fmt, args...) do { } while (0)
75 #undef STMMAC_XMIT_DEBUG
76 /*#define STMMAC_XMIT_DEBUG*/
77 #ifdef STMMAC_TX_DEBUG
78 #define TX_DBG(fmt, args...) printk(fmt, ## args)
80 #define TX_DBG(fmt, args...) do { } while (0)
83 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
84 #define JUMBO_LEN 9000
86 /* Module parameters */
87 #define TX_TIMEO 5000 /* default 5 seconds */
88 static int watchdog
= TX_TIMEO
;
89 module_param(watchdog
, int, S_IRUGO
| S_IWUSR
);
90 MODULE_PARM_DESC(watchdog
, "Transmit timeout in milliseconds");
92 static int debug
= -1; /* -1: default, 0: no output, 16: all */
93 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
94 MODULE_PARM_DESC(debug
, "Message Level (0: no output, 16: all)");
96 static int phyaddr
= -1;
97 module_param(phyaddr
, int, S_IRUGO
);
98 MODULE_PARM_DESC(phyaddr
, "Physical device address");
100 #define DMA_TX_SIZE 256
101 static int dma_txsize
= DMA_TX_SIZE
;
102 module_param(dma_txsize
, int, S_IRUGO
| S_IWUSR
);
103 MODULE_PARM_DESC(dma_txsize
, "Number of descriptors in the TX list");
105 #define DMA_RX_SIZE 256
106 static int dma_rxsize
= DMA_RX_SIZE
;
107 module_param(dma_rxsize
, int, S_IRUGO
| S_IWUSR
);
108 MODULE_PARM_DESC(dma_rxsize
, "Number of descriptors in the RX list");
110 static int flow_ctrl
= FLOW_OFF
;
111 module_param(flow_ctrl
, int, S_IRUGO
| S_IWUSR
);
112 MODULE_PARM_DESC(flow_ctrl
, "Flow control ability [on/off]");
114 static int pause
= PAUSE_TIME
;
115 module_param(pause
, int, S_IRUGO
| S_IWUSR
);
116 MODULE_PARM_DESC(pause
, "Flow Control Pause Time");
118 #define TC_DEFAULT 64
119 static int tc
= TC_DEFAULT
;
120 module_param(tc
, int, S_IRUGO
| S_IWUSR
);
121 MODULE_PARM_DESC(tc
, "DMA threshold control value");
123 /* Pay attention to tune this parameter; take care of both
124 * hardware capability and network stabitily/performance impact.
125 * Many tests showed that ~4ms latency seems to be good enough. */
126 #ifdef CONFIG_STMMAC_TIMER
127 #define DEFAULT_PERIODIC_RATE 256
128 static int tmrate
= DEFAULT_PERIODIC_RATE
;
129 module_param(tmrate
, int, S_IRUGO
| S_IWUSR
);
130 MODULE_PARM_DESC(tmrate
, "External timer freq. (default: 256Hz)");
133 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
134 static int buf_sz
= DMA_BUFFER_SIZE
;
135 module_param(buf_sz
, int, S_IRUGO
| S_IWUSR
);
136 MODULE_PARM_DESC(buf_sz
, "DMA buffer size");
138 static const u32 default_msg_level
= (NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
139 NETIF_MSG_LINK
| NETIF_MSG_IFUP
|
140 NETIF_MSG_IFDOWN
| NETIF_MSG_TIMER
);
142 static irqreturn_t
stmmac_interrupt(int irq
, void *dev_id
);
145 * stmmac_verify_args - verify the driver parameters.
146 * Description: it verifies if some wrong parameter is passed to the driver.
147 * Note that wrong parameters are replaced with the default values.
149 static void stmmac_verify_args(void)
151 if (unlikely(watchdog
< 0))
153 if (unlikely(dma_rxsize
< 0))
154 dma_rxsize
= DMA_RX_SIZE
;
155 if (unlikely(dma_txsize
< 0))
156 dma_txsize
= DMA_TX_SIZE
;
157 if (unlikely((buf_sz
< DMA_BUFFER_SIZE
) || (buf_sz
> BUF_SIZE_16KiB
)))
158 buf_sz
= DMA_BUFFER_SIZE
;
159 if (unlikely(flow_ctrl
> 1))
160 flow_ctrl
= FLOW_AUTO
;
161 else if (likely(flow_ctrl
< 0))
162 flow_ctrl
= FLOW_OFF
;
163 if (unlikely((pause
< 0) || (pause
> 0xffff)))
167 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
168 static void print_pkt(unsigned char *buf
, int len
)
171 pr_info("len = %d byte, buf addr: 0x%p", len
, buf
);
172 for (j
= 0; j
< len
; j
++) {
174 pr_info("\n %03x:", j
);
175 pr_info(" %02x", buf
[j
]);
181 /* minimum number of free TX descriptors required to wake up TX process */
182 #define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
184 static inline u32
stmmac_tx_avail(struct stmmac_priv
*priv
)
186 return priv
->dirty_tx
+ priv
->dma_tx_size
- priv
->cur_tx
- 1;
189 /* On some ST platforms, some HW system configuraton registers have to be
190 * set according to the link speed negotiated.
192 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv
*priv
)
194 struct phy_device
*phydev
= priv
->phydev
;
196 if (likely(priv
->plat
->fix_mac_speed
))
197 priv
->plat
->fix_mac_speed(priv
->plat
->bsp_priv
,
203 * @dev: net device structure
204 * Description: it adjusts the link parameters.
206 static void stmmac_adjust_link(struct net_device
*dev
)
208 struct stmmac_priv
*priv
= netdev_priv(dev
);
209 struct phy_device
*phydev
= priv
->phydev
;
212 unsigned int fc
= priv
->flow_ctrl
, pause_time
= priv
->pause
;
217 DBG(probe
, DEBUG
, "stmmac_adjust_link: called. address %d link %d\n",
218 phydev
->addr
, phydev
->link
);
220 spin_lock_irqsave(&priv
->lock
, flags
);
222 u32 ctrl
= readl(priv
->ioaddr
+ MAC_CTRL_REG
);
224 /* Now we make sure that we can be in full duplex mode.
225 * If not, we operate in half-duplex mode. */
226 if (phydev
->duplex
!= priv
->oldduplex
) {
228 if (!(phydev
->duplex
))
229 ctrl
&= ~priv
->hw
->link
.duplex
;
231 ctrl
|= priv
->hw
->link
.duplex
;
232 priv
->oldduplex
= phydev
->duplex
;
234 /* Flow Control operation */
236 priv
->hw
->mac
->flow_ctrl(priv
->ioaddr
, phydev
->duplex
,
239 if (phydev
->speed
!= priv
->speed
) {
241 switch (phydev
->speed
) {
243 if (likely(priv
->plat
->has_gmac
))
244 ctrl
&= ~priv
->hw
->link
.port
;
245 stmmac_hw_fix_mac_speed(priv
);
249 if (priv
->plat
->has_gmac
) {
250 ctrl
|= priv
->hw
->link
.port
;
251 if (phydev
->speed
== SPEED_100
) {
252 ctrl
|= priv
->hw
->link
.speed
;
254 ctrl
&= ~(priv
->hw
->link
.speed
);
257 ctrl
&= ~priv
->hw
->link
.port
;
259 stmmac_hw_fix_mac_speed(priv
);
262 if (netif_msg_link(priv
))
263 pr_warning("%s: Speed (%d) is not 10"
264 " or 100!\n", dev
->name
, phydev
->speed
);
268 priv
->speed
= phydev
->speed
;
271 writel(ctrl
, priv
->ioaddr
+ MAC_CTRL_REG
);
273 if (!priv
->oldlink
) {
277 } else if (priv
->oldlink
) {
281 priv
->oldduplex
= -1;
284 if (new_state
&& netif_msg_link(priv
))
285 phy_print_status(phydev
);
287 spin_unlock_irqrestore(&priv
->lock
, flags
);
289 DBG(probe
, DEBUG
, "stmmac_adjust_link: exiting\n");
293 * stmmac_init_phy - PHY initialization
294 * @dev: net device structure
295 * Description: it initializes the driver's PHY state, and attaches the PHY
300 static int stmmac_init_phy(struct net_device
*dev
)
302 struct stmmac_priv
*priv
= netdev_priv(dev
);
303 struct phy_device
*phydev
;
304 char phy_id
[MII_BUS_ID_SIZE
+ 3];
305 char bus_id
[MII_BUS_ID_SIZE
];
306 int interface
= priv
->plat
->interface
;
309 priv
->oldduplex
= -1;
311 snprintf(bus_id
, MII_BUS_ID_SIZE
, "%x", priv
->plat
->bus_id
);
312 snprintf(phy_id
, MII_BUS_ID_SIZE
+ 3, PHY_ID_FMT
, bus_id
,
313 priv
->plat
->phy_addr
);
314 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id
);
316 phydev
= phy_connect(dev
, phy_id
, &stmmac_adjust_link
, 0, interface
);
318 if (IS_ERR(phydev
)) {
319 pr_err("%s: Could not attach to PHY\n", dev
->name
);
320 return PTR_ERR(phydev
);
323 /* Stop Advertising 1000BASE Capability if interface is not GMII */
324 if ((interface
) && ((interface
== PHY_INTERFACE_MODE_MII
) ||
325 (interface
== PHY_INTERFACE_MODE_RMII
))) {
326 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
327 SUPPORTED_Asym_Pause
);
328 priv
->phydev
->advertising
= priv
->phydev
->supported
;
332 * Broken HW is sometimes missing the pull-up resistor on the
333 * MDIO line, which results in reads to non-existent devices returning
334 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
336 * Note: phydev->phy_id is the result of reading the UID PHY registers.
338 if (phydev
->phy_id
== 0) {
339 phy_disconnect(phydev
);
342 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
343 " Link = %d\n", dev
->name
, phydev
->phy_id
, phydev
->link
);
345 priv
->phydev
= phydev
;
350 static inline void stmmac_enable_mac(void __iomem
*ioaddr
)
352 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
354 value
|= MAC_RNABLE_RX
| MAC_ENABLE_TX
;
355 writel(value
, ioaddr
+ MAC_CTRL_REG
);
358 static inline void stmmac_disable_mac(void __iomem
*ioaddr
)
360 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
362 value
&= ~(MAC_ENABLE_TX
| MAC_RNABLE_RX
);
363 writel(value
, ioaddr
+ MAC_CTRL_REG
);
368 * @p: pointer to the ring.
369 * @size: size of the ring.
370 * Description: display all the descriptors within the ring.
372 static void display_ring(struct dma_desc
*p
, int size
)
380 for (i
= 0; i
< size
; i
++) {
381 struct tmp_s
*x
= (struct tmp_s
*)(p
+ i
);
382 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
383 i
, (unsigned int)virt_to_phys(&p
[i
]),
384 (unsigned int)(x
->a
), (unsigned int)((x
->a
) >> 32),
390 static int stmmac_set_bfsize(int mtu
, int bufsize
)
394 if (mtu
>= BUF_SIZE_4KiB
)
396 else if (mtu
>= BUF_SIZE_2KiB
)
398 else if (mtu
>= DMA_BUFFER_SIZE
)
401 ret
= DMA_BUFFER_SIZE
;
407 * init_dma_desc_rings - init the RX/TX descriptor rings
408 * @dev: net device structure
409 * Description: this function initializes the DMA RX/TX descriptors
410 * and allocates the socket buffers. It suppors the chained and ring
413 static void init_dma_desc_rings(struct net_device
*dev
)
416 struct stmmac_priv
*priv
= netdev_priv(dev
);
418 unsigned int txsize
= priv
->dma_tx_size
;
419 unsigned int rxsize
= priv
->dma_rx_size
;
422 int des3_as_data_buf
= 0;
424 /* Set the max buffer size according to the DESC mode
425 * and the MTU. Note that RING mode allows 16KiB bsize. */
426 bfsize
= priv
->hw
->ring
->set_16kib_bfsize(dev
->mtu
);
428 if (bfsize
== BUF_SIZE_16KiB
)
429 des3_as_data_buf
= 1;
431 bfsize
= stmmac_set_bfsize(dev
->mtu
, priv
->dma_buf_sz
);
433 #ifdef CONFIG_STMMAC_TIMER
434 /* Disable interrupts on completion for the reception if timer is on */
435 if (likely(priv
->tm
->enable
))
439 DBG(probe
, INFO
, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
440 txsize
, rxsize
, bfsize
);
442 priv
->rx_skbuff_dma
= kmalloc(rxsize
* sizeof(dma_addr_t
), GFP_KERNEL
);
444 kmalloc(sizeof(struct sk_buff
*) * rxsize
, GFP_KERNEL
);
446 (struct dma_desc
*)dma_alloc_coherent(priv
->device
,
448 sizeof(struct dma_desc
),
451 priv
->tx_skbuff
= kmalloc(sizeof(struct sk_buff
*) * txsize
,
454 (struct dma_desc
*)dma_alloc_coherent(priv
->device
,
456 sizeof(struct dma_desc
),
460 if ((priv
->dma_rx
== NULL
) || (priv
->dma_tx
== NULL
)) {
461 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__
);
465 DBG(probe
, INFO
, "stmmac (%s) DMA desc: virt addr (Rx %p, "
466 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
467 dev
->name
, priv
->dma_rx
, priv
->dma_tx
,
468 (unsigned int)priv
->dma_rx_phy
, (unsigned int)priv
->dma_tx_phy
);
470 /* RX INITIALIZATION */
471 DBG(probe
, INFO
, "stmmac: SKB addresses:\n"
472 "skb\t\tskb data\tdma data\n");
474 for (i
= 0; i
< rxsize
; i
++) {
475 struct dma_desc
*p
= priv
->dma_rx
+ i
;
477 skb
= netdev_alloc_skb_ip_align(dev
, bfsize
);
478 if (unlikely(skb
== NULL
)) {
479 pr_err("%s: Rx init fails; skb is NULL\n", __func__
);
482 priv
->rx_skbuff
[i
] = skb
;
483 priv
->rx_skbuff_dma
[i
] = dma_map_single(priv
->device
, skb
->data
,
484 bfsize
, DMA_FROM_DEVICE
);
486 p
->des2
= priv
->rx_skbuff_dma
[i
];
488 priv
->hw
->ring
->init_desc3(des3_as_data_buf
, p
);
490 DBG(probe
, INFO
, "[%p]\t[%p]\t[%x]\n", priv
->rx_skbuff
[i
],
491 priv
->rx_skbuff
[i
]->data
, priv
->rx_skbuff_dma
[i
]);
494 priv
->dirty_rx
= (unsigned int)(i
- rxsize
);
495 priv
->dma_buf_sz
= bfsize
;
498 /* TX INITIALIZATION */
499 for (i
= 0; i
< txsize
; i
++) {
500 priv
->tx_skbuff
[i
] = NULL
;
501 priv
->dma_tx
[i
].des2
= 0;
504 /* In case of Chained mode this sets the des3 to the next
505 * element in the chain */
506 priv
->hw
->ring
->init_dma_chain(priv
->dma_rx
, priv
->dma_rx_phy
, rxsize
);
507 priv
->hw
->ring
->init_dma_chain(priv
->dma_tx
, priv
->dma_tx_phy
, txsize
);
512 /* Clear the Rx/Tx descriptors */
513 priv
->hw
->desc
->init_rx_desc(priv
->dma_rx
, rxsize
, dis_ic
);
514 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, txsize
);
516 if (netif_msg_hw(priv
)) {
517 pr_info("RX descriptor ring:\n");
518 display_ring(priv
->dma_rx
, rxsize
);
519 pr_info("TX descriptor ring:\n");
520 display_ring(priv
->dma_tx
, txsize
);
524 static void dma_free_rx_skbufs(struct stmmac_priv
*priv
)
528 for (i
= 0; i
< priv
->dma_rx_size
; i
++) {
529 if (priv
->rx_skbuff
[i
]) {
530 dma_unmap_single(priv
->device
, priv
->rx_skbuff_dma
[i
],
531 priv
->dma_buf_sz
, DMA_FROM_DEVICE
);
532 dev_kfree_skb_any(priv
->rx_skbuff
[i
]);
534 priv
->rx_skbuff
[i
] = NULL
;
538 static void dma_free_tx_skbufs(struct stmmac_priv
*priv
)
542 for (i
= 0; i
< priv
->dma_tx_size
; i
++) {
543 if (priv
->tx_skbuff
[i
] != NULL
) {
544 struct dma_desc
*p
= priv
->dma_tx
+ i
;
546 dma_unmap_single(priv
->device
, p
->des2
,
547 priv
->hw
->desc
->get_tx_len(p
),
549 dev_kfree_skb_any(priv
->tx_skbuff
[i
]);
550 priv
->tx_skbuff
[i
] = NULL
;
555 static void free_dma_desc_resources(struct stmmac_priv
*priv
)
557 /* Release the DMA TX/RX socket buffers */
558 dma_free_rx_skbufs(priv
);
559 dma_free_tx_skbufs(priv
);
561 /* Free the region of consistent memory previously allocated for
563 dma_free_coherent(priv
->device
,
564 priv
->dma_tx_size
* sizeof(struct dma_desc
),
565 priv
->dma_tx
, priv
->dma_tx_phy
);
566 dma_free_coherent(priv
->device
,
567 priv
->dma_rx_size
* sizeof(struct dma_desc
),
568 priv
->dma_rx
, priv
->dma_rx_phy
);
569 kfree(priv
->rx_skbuff_dma
);
570 kfree(priv
->rx_skbuff
);
571 kfree(priv
->tx_skbuff
);
575 * stmmac_dma_operation_mode - HW DMA operation mode
576 * @priv : pointer to the private device structure.
577 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
578 * or Store-And-Forward capability.
580 static void stmmac_dma_operation_mode(struct stmmac_priv
*priv
)
582 if (likely(priv
->plat
->force_sf_dma_mode
||
583 ((priv
->plat
->tx_coe
) && (!priv
->no_csum_insertion
)))) {
585 * In case of GMAC, SF mode can be enabled
586 * to perform the TX COE in HW. This depends on:
587 * 1) TX COE if actually supported
588 * 2) There is no bugged Jumbo frame support
589 * that needs to not insert csum in the TDES.
591 priv
->hw
->dma
->dma_mode(priv
->ioaddr
,
592 SF_DMA_MODE
, SF_DMA_MODE
);
595 priv
->hw
->dma
->dma_mode(priv
->ioaddr
, tc
, SF_DMA_MODE
);
600 * @priv: private driver structure
601 * Description: it reclaims resources after transmission completes.
603 static void stmmac_tx(struct stmmac_priv
*priv
)
605 unsigned int txsize
= priv
->dma_tx_size
;
607 spin_lock(&priv
->tx_lock
);
609 while (priv
->dirty_tx
!= priv
->cur_tx
) {
611 unsigned int entry
= priv
->dirty_tx
% txsize
;
612 struct sk_buff
*skb
= priv
->tx_skbuff
[entry
];
613 struct dma_desc
*p
= priv
->dma_tx
+ entry
;
615 /* Check if the descriptor is owned by the DMA. */
616 if (priv
->hw
->desc
->get_tx_owner(p
))
619 /* Verify tx error by looking at the last segment */
620 last
= priv
->hw
->desc
->get_tx_ls(p
);
623 priv
->hw
->desc
->tx_status(&priv
->dev
->stats
,
626 if (likely(tx_error
== 0)) {
627 priv
->dev
->stats
.tx_packets
++;
628 priv
->xstats
.tx_pkt_n
++;
630 priv
->dev
->stats
.tx_errors
++;
632 TX_DBG("%s: curr %d, dirty %d\n", __func__
,
633 priv
->cur_tx
, priv
->dirty_tx
);
636 dma_unmap_single(priv
->device
, p
->des2
,
637 priv
->hw
->desc
->get_tx_len(p
),
639 priv
->hw
->ring
->clean_desc3(p
);
641 if (likely(skb
!= NULL
)) {
643 * If there's room in the queue (limit it to size)
644 * we add this skb back into the pool,
645 * if it's the right size.
647 if ((skb_queue_len(&priv
->rx_recycle
) <
648 priv
->dma_rx_size
) &&
649 skb_recycle_check(skb
, priv
->dma_buf_sz
))
650 __skb_queue_head(&priv
->rx_recycle
, skb
);
654 priv
->tx_skbuff
[entry
] = NULL
;
657 priv
->hw
->desc
->release_tx_desc(p
);
659 entry
= (++priv
->dirty_tx
) % txsize
;
661 if (unlikely(netif_queue_stopped(priv
->dev
) &&
662 stmmac_tx_avail(priv
) > STMMAC_TX_THRESH(priv
))) {
663 netif_tx_lock(priv
->dev
);
664 if (netif_queue_stopped(priv
->dev
) &&
665 stmmac_tx_avail(priv
) > STMMAC_TX_THRESH(priv
)) {
666 TX_DBG("%s: restart transmit\n", __func__
);
667 netif_wake_queue(priv
->dev
);
669 netif_tx_unlock(priv
->dev
);
671 spin_unlock(&priv
->tx_lock
);
674 static inline void stmmac_enable_irq(struct stmmac_priv
*priv
)
676 #ifdef CONFIG_STMMAC_TIMER
677 if (likely(priv
->tm
->enable
))
678 priv
->tm
->timer_start(tmrate
);
681 priv
->hw
->dma
->enable_dma_irq(priv
->ioaddr
);
684 static inline void stmmac_disable_irq(struct stmmac_priv
*priv
)
686 #ifdef CONFIG_STMMAC_TIMER
687 if (likely(priv
->tm
->enable
))
688 priv
->tm
->timer_stop();
691 priv
->hw
->dma
->disable_dma_irq(priv
->ioaddr
);
694 static int stmmac_has_work(struct stmmac_priv
*priv
)
696 unsigned int has_work
= 0;
697 int rxret
, tx_work
= 0;
699 rxret
= priv
->hw
->desc
->get_rx_owner(priv
->dma_rx
+
700 (priv
->cur_rx
% priv
->dma_rx_size
));
702 if (priv
->dirty_tx
!= priv
->cur_tx
)
705 if (likely(!rxret
|| tx_work
))
711 static inline void _stmmac_schedule(struct stmmac_priv
*priv
)
713 if (likely(stmmac_has_work(priv
))) {
714 stmmac_disable_irq(priv
);
715 napi_schedule(&priv
->napi
);
719 #ifdef CONFIG_STMMAC_TIMER
720 void stmmac_schedule(struct net_device
*dev
)
722 struct stmmac_priv
*priv
= netdev_priv(dev
);
724 priv
->xstats
.sched_timer_n
++;
726 _stmmac_schedule(priv
);
729 static void stmmac_no_timer_started(unsigned int x
)
733 static void stmmac_no_timer_stopped(void)
740 * @priv: pointer to the private device structure
741 * Description: it cleans the descriptors and restarts the transmission
744 static void stmmac_tx_err(struct stmmac_priv
*priv
)
746 netif_stop_queue(priv
->dev
);
748 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
749 dma_free_tx_skbufs(priv
);
750 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, priv
->dma_tx_size
);
753 priv
->hw
->dma
->start_tx(priv
->ioaddr
);
755 priv
->dev
->stats
.tx_errors
++;
756 netif_wake_queue(priv
->dev
);
760 static void stmmac_dma_interrupt(struct stmmac_priv
*priv
)
764 status
= priv
->hw
->dma
->dma_interrupt(priv
->ioaddr
, &priv
->xstats
);
765 if (likely(status
== handle_tx_rx
))
766 _stmmac_schedule(priv
);
768 else if (unlikely(status
== tx_hard_error_bump_tc
)) {
769 /* Try to bump up the dma threshold on this failure */
770 if (unlikely(tc
!= SF_DMA_MODE
) && (tc
<= 256)) {
772 priv
->hw
->dma
->dma_mode(priv
->ioaddr
, tc
, SF_DMA_MODE
);
773 priv
->xstats
.threshold
= tc
;
775 } else if (unlikely(status
== tx_hard_error
))
779 static void stmmac_mmc_setup(struct stmmac_priv
*priv
)
781 unsigned int mode
= MMC_CNTRL_RESET_ON_READ
| MMC_CNTRL_COUNTER_RESET
|
782 MMC_CNTRL_PRESET
| MMC_CNTRL_FULL_HALF_PRESET
;
784 /* Do not manage MMC IRQ (FIXME) */
785 dwmac_mmc_intr_all_mask(priv
->ioaddr
);
786 dwmac_mmc_ctrl(priv
->ioaddr
, mode
);
787 memset(&priv
->mmc
, 0, sizeof(struct stmmac_counters
));
790 static u32
stmmac_get_synopsys_id(struct stmmac_priv
*priv
)
792 u32 hwid
= priv
->hw
->synopsys_uid
;
794 /* Only check valid Synopsys Id because old MAC chips
795 * have no HW registers where get the ID */
797 u32 uid
= ((hwid
& 0x0000ff00) >> 8);
798 u32 synid
= (hwid
& 0x000000ff);
800 pr_info("STMMAC - user ID: 0x%x, Synopsys ID: 0x%x\n",
808 /* New GMAC chips support a new register to indicate the
809 * presence of the optional feature/functions.
811 static int stmmac_get_hw_features(struct stmmac_priv
*priv
)
813 u32 hw_cap
= priv
->hw
->dma
->get_hw_feature(priv
->ioaddr
);
815 if (likely(hw_cap
)) {
816 priv
->dma_cap
.mbps_10_100
= (hw_cap
& DMA_HW_FEAT_MIISEL
);
817 priv
->dma_cap
.mbps_1000
= (hw_cap
& DMA_HW_FEAT_GMIISEL
) >> 1;
818 priv
->dma_cap
.half_duplex
= (hw_cap
& DMA_HW_FEAT_HDSEL
) >> 2;
819 priv
->dma_cap
.hash_filter
= (hw_cap
& DMA_HW_FEAT_HASHSEL
) >> 4;
820 priv
->dma_cap
.multi_addr
=
821 (hw_cap
& DMA_HW_FEAT_ADDMACADRSEL
) >> 5;
822 priv
->dma_cap
.pcs
= (hw_cap
& DMA_HW_FEAT_PCSSEL
) >> 6;
823 priv
->dma_cap
.sma_mdio
= (hw_cap
& DMA_HW_FEAT_SMASEL
) >> 8;
824 priv
->dma_cap
.pmt_remote_wake_up
=
825 (hw_cap
& DMA_HW_FEAT_RWKSEL
) >> 9;
826 priv
->dma_cap
.pmt_magic_frame
=
827 (hw_cap
& DMA_HW_FEAT_MGKSEL
) >> 10;
829 priv
->dma_cap
.rmon
= (hw_cap
& DMA_HW_FEAT_MMCSEL
) >> 11;
831 priv
->dma_cap
.time_stamp
=
832 (hw_cap
& DMA_HW_FEAT_TSVER1SEL
) >> 12;
834 priv
->dma_cap
.atime_stamp
=
835 (hw_cap
& DMA_HW_FEAT_TSVER2SEL
) >> 13;
836 /* 802.3az - Energy-Efficient Ethernet (EEE) */
837 priv
->dma_cap
.eee
= (hw_cap
& DMA_HW_FEAT_EEESEL
) >> 14;
838 priv
->dma_cap
.av
= (hw_cap
& DMA_HW_FEAT_AVSEL
) >> 15;
840 priv
->dma_cap
.tx_coe
= (hw_cap
& DMA_HW_FEAT_TXCOESEL
) >> 16;
841 priv
->dma_cap
.rx_coe_type1
=
842 (hw_cap
& DMA_HW_FEAT_RXTYP1COE
) >> 17;
843 priv
->dma_cap
.rx_coe_type2
=
844 (hw_cap
& DMA_HW_FEAT_RXTYP2COE
) >> 18;
845 priv
->dma_cap
.rxfifo_over_2048
=
846 (hw_cap
& DMA_HW_FEAT_RXFIFOSIZE
) >> 19;
847 /* TX and RX number of channels */
848 priv
->dma_cap
.number_rx_channel
=
849 (hw_cap
& DMA_HW_FEAT_RXCHCNT
) >> 20;
850 priv
->dma_cap
.number_tx_channel
=
851 (hw_cap
& DMA_HW_FEAT_TXCHCNT
) >> 22;
852 /* Alternate (enhanced) DESC mode*/
853 priv
->dma_cap
.enh_desc
=
854 (hw_cap
& DMA_HW_FEAT_ENHDESSEL
) >> 24;
857 pr_debug("\tNo HW DMA feature register supported");
863 * stmmac_open - open entry point of the driver
864 * @dev : pointer to the device structure.
866 * This function is the open entry point of the driver.
868 * 0 on success and an appropriate (-)ve integer as defined in errno.h
871 static int stmmac_open(struct net_device
*dev
)
873 struct stmmac_priv
*priv
= netdev_priv(dev
);
876 /* Check that the MAC address is valid. If its not, refuse
877 * to bring the device up. The user must specify an
878 * address using the following linux command:
879 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
880 if (!is_valid_ether_addr(dev
->dev_addr
)) {
881 random_ether_addr(dev
->dev_addr
);
882 pr_warning("%s: generated random MAC address %pM\n", dev
->name
,
886 stmmac_verify_args();
888 #ifdef CONFIG_STMMAC_TIMER
889 priv
->tm
= kzalloc(sizeof(struct stmmac_timer
*), GFP_KERNEL
);
890 if (unlikely(priv
->tm
== NULL
)) {
891 pr_err("%s: ERROR: timer memory alloc failed\n", __func__
);
894 priv
->tm
->freq
= tmrate
;
896 /* Test if the external timer can be actually used.
897 * In case of failure continue without timer. */
898 if (unlikely((stmmac_open_ext_timer(dev
, priv
->tm
)) < 0)) {
899 pr_warning("stmmaceth: cannot attach the external timer.\n");
901 priv
->tm
->timer_start
= stmmac_no_timer_started
;
902 priv
->tm
->timer_stop
= stmmac_no_timer_stopped
;
904 priv
->tm
->enable
= 1;
906 ret
= stmmac_init_phy(dev
);
908 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__
, ret
);
912 /* Create and initialize the TX/RX descriptors chains. */
913 priv
->dma_tx_size
= STMMAC_ALIGN(dma_txsize
);
914 priv
->dma_rx_size
= STMMAC_ALIGN(dma_rxsize
);
915 priv
->dma_buf_sz
= STMMAC_ALIGN(buf_sz
);
916 init_dma_desc_rings(dev
);
918 /* DMA initialization and SW reset */
919 ret
= priv
->hw
->dma
->init(priv
->ioaddr
, priv
->plat
->pbl
,
920 priv
->dma_tx_phy
, priv
->dma_rx_phy
);
922 pr_err("%s: DMA initialization failed\n", __func__
);
926 /* Copy the MAC addr into the HW */
927 priv
->hw
->mac
->set_umac_addr(priv
->ioaddr
, dev
->dev_addr
, 0);
928 /* If required, perform hw setup of the bus. */
929 if (priv
->plat
->bus_setup
)
930 priv
->plat
->bus_setup(priv
->ioaddr
);
931 /* Initialize the MAC Core */
932 priv
->hw
->mac
->core_init(priv
->ioaddr
);
934 stmmac_get_synopsys_id(priv
);
936 stmmac_get_hw_features(priv
);
939 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
940 if (priv
->plat
->tx_coe
)
941 pr_info("\tTX Checksum insertion supported\n");
942 netdev_update_features(dev
);
944 /* Request the IRQ lines */
945 ret
= request_irq(dev
->irq
, stmmac_interrupt
,
946 IRQF_SHARED
, dev
->name
, dev
);
947 if (unlikely(ret
< 0)) {
948 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
949 __func__
, dev
->irq
, ret
);
953 /* Enable the MAC Rx/Tx */
954 stmmac_enable_mac(priv
->ioaddr
);
956 /* Set the HW DMA mode and the COE */
957 stmmac_dma_operation_mode(priv
);
959 /* Extra statistics */
960 memset(&priv
->xstats
, 0, sizeof(struct stmmac_extra_stats
));
961 priv
->xstats
.threshold
= tc
;
963 if (priv
->dma_cap
.rmon
)
964 stmmac_mmc_setup(priv
);
966 /* Start the ball rolling... */
967 DBG(probe
, DEBUG
, "%s: DMA RX/TX processes started...\n", dev
->name
);
968 priv
->hw
->dma
->start_tx(priv
->ioaddr
);
969 priv
->hw
->dma
->start_rx(priv
->ioaddr
);
971 #ifdef CONFIG_STMMAC_TIMER
972 priv
->tm
->timer_start(tmrate
);
974 /* Dump DMA/MAC registers */
975 if (netif_msg_hw(priv
)) {
976 priv
->hw
->mac
->dump_regs(priv
->ioaddr
);
977 priv
->hw
->dma
->dump_regs(priv
->ioaddr
);
981 phy_start(priv
->phydev
);
983 napi_enable(&priv
->napi
);
984 skb_queue_head_init(&priv
->rx_recycle
);
985 netif_start_queue(dev
);
990 #ifdef CONFIG_STMMAC_TIMER
994 phy_disconnect(priv
->phydev
);
1000 * stmmac_release - close entry point of the driver
1001 * @dev : device pointer.
1003 * This is the stop entry point of the driver.
1005 static int stmmac_release(struct net_device
*dev
)
1007 struct stmmac_priv
*priv
= netdev_priv(dev
);
1009 /* Stop and disconnect the PHY */
1011 phy_stop(priv
->phydev
);
1012 phy_disconnect(priv
->phydev
);
1013 priv
->phydev
= NULL
;
1016 netif_stop_queue(dev
);
1018 #ifdef CONFIG_STMMAC_TIMER
1019 /* Stop and release the timer */
1020 stmmac_close_ext_timer();
1021 if (priv
->tm
!= NULL
)
1024 napi_disable(&priv
->napi
);
1025 skb_queue_purge(&priv
->rx_recycle
);
1027 /* Free the IRQ lines */
1028 free_irq(dev
->irq
, dev
);
1030 /* Stop TX/RX DMA and clear the descriptors */
1031 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
1032 priv
->hw
->dma
->stop_rx(priv
->ioaddr
);
1034 /* Release and free the Rx/Tx resources */
1035 free_dma_desc_resources(priv
);
1037 /* Disable the MAC Rx/Tx */
1038 stmmac_disable_mac(priv
->ioaddr
);
1040 netif_carrier_off(dev
);
1047 * @skb : the socket buffer
1048 * @dev : device pointer
1049 * Description : Tx entry point of the driver.
1051 static netdev_tx_t
stmmac_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1053 struct stmmac_priv
*priv
= netdev_priv(dev
);
1054 unsigned int txsize
= priv
->dma_tx_size
;
1056 int i
, csum_insertion
= 0;
1057 int nfrags
= skb_shinfo(skb
)->nr_frags
;
1058 struct dma_desc
*desc
, *first
;
1059 unsigned int nopaged_len
= skb_headlen(skb
);
1061 if (unlikely(stmmac_tx_avail(priv
) < nfrags
+ 1)) {
1062 if (!netif_queue_stopped(dev
)) {
1063 netif_stop_queue(dev
);
1064 /* This is a hard error, log it. */
1065 pr_err("%s: BUG! Tx Ring full when queue awake\n",
1068 return NETDEV_TX_BUSY
;
1071 spin_lock(&priv
->tx_lock
);
1073 entry
= priv
->cur_tx
% txsize
;
1075 #ifdef STMMAC_XMIT_DEBUG
1076 if ((skb
->len
> ETH_FRAME_LEN
) || nfrags
)
1077 pr_info("stmmac xmit:\n"
1078 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1079 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1080 skb
, skb
->len
, nopaged_len
, nfrags
, skb
->ip_summed
,
1081 !skb_is_gso(skb
) ? "isn't" : "is");
1084 csum_insertion
= (skb
->ip_summed
== CHECKSUM_PARTIAL
);
1086 desc
= priv
->dma_tx
+ entry
;
1089 #ifdef STMMAC_XMIT_DEBUG
1090 if ((nfrags
> 0) || (skb
->len
> ETH_FRAME_LEN
))
1091 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1092 "\t\tn_frags: %d, ip_summed: %d\n",
1093 skb
->len
, nopaged_len
, nfrags
, skb
->ip_summed
);
1095 priv
->tx_skbuff
[entry
] = skb
;
1097 if (priv
->hw
->ring
->is_jumbo_frm(skb
->len
, priv
->plat
->enh_desc
)) {
1098 entry
= priv
->hw
->ring
->jumbo_frm(priv
, skb
, csum_insertion
);
1099 desc
= priv
->dma_tx
+ entry
;
1101 desc
->des2
= dma_map_single(priv
->device
, skb
->data
,
1102 nopaged_len
, DMA_TO_DEVICE
);
1103 priv
->hw
->desc
->prepare_tx_desc(desc
, 1, nopaged_len
,
1107 for (i
= 0; i
< nfrags
; i
++) {
1108 const skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1109 int len
= skb_frag_size(frag
);
1111 entry
= (++priv
->cur_tx
) % txsize
;
1112 desc
= priv
->dma_tx
+ entry
;
1114 TX_DBG("\t[entry %d] segment len: %d\n", entry
, len
);
1115 desc
->des2
= skb_frag_dma_map(priv
->device
, frag
, 0, len
,
1117 priv
->tx_skbuff
[entry
] = NULL
;
1118 priv
->hw
->desc
->prepare_tx_desc(desc
, 0, len
, csum_insertion
);
1120 priv
->hw
->desc
->set_tx_owner(desc
);
1123 /* Interrupt on completition only for the latest segment */
1124 priv
->hw
->desc
->close_tx_desc(desc
);
1126 #ifdef CONFIG_STMMAC_TIMER
1127 /* Clean IC while using timer */
1128 if (likely(priv
->tm
->enable
))
1129 priv
->hw
->desc
->clear_tx_ic(desc
);
1134 /* To avoid raise condition */
1135 priv
->hw
->desc
->set_tx_owner(first
);
1139 #ifdef STMMAC_XMIT_DEBUG
1140 if (netif_msg_pktdata(priv
)) {
1141 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1142 "first=%p, nfrags=%d\n",
1143 (priv
->cur_tx
% txsize
), (priv
->dirty_tx
% txsize
),
1144 entry
, first
, nfrags
);
1145 display_ring(priv
->dma_tx
, txsize
);
1146 pr_info(">>> frame to be transmitted: ");
1147 print_pkt(skb
->data
, skb
->len
);
1150 if (unlikely(stmmac_tx_avail(priv
) <= (MAX_SKB_FRAGS
+ 1))) {
1151 TX_DBG("%s: stop transmitted packets\n", __func__
);
1152 netif_stop_queue(dev
);
1155 dev
->stats
.tx_bytes
+= skb
->len
;
1157 skb_tx_timestamp(skb
);
1159 priv
->hw
->dma
->enable_dma_transmission(priv
->ioaddr
);
1161 spin_unlock(&priv
->tx_lock
);
1163 return NETDEV_TX_OK
;
1166 static inline void stmmac_rx_refill(struct stmmac_priv
*priv
)
1168 unsigned int rxsize
= priv
->dma_rx_size
;
1169 int bfsize
= priv
->dma_buf_sz
;
1170 struct dma_desc
*p
= priv
->dma_rx
;
1172 for (; priv
->cur_rx
- priv
->dirty_rx
> 0; priv
->dirty_rx
++) {
1173 unsigned int entry
= priv
->dirty_rx
% rxsize
;
1174 if (likely(priv
->rx_skbuff
[entry
] == NULL
)) {
1175 struct sk_buff
*skb
;
1177 skb
= __skb_dequeue(&priv
->rx_recycle
);
1179 skb
= netdev_alloc_skb_ip_align(priv
->dev
,
1182 if (unlikely(skb
== NULL
))
1185 priv
->rx_skbuff
[entry
] = skb
;
1186 priv
->rx_skbuff_dma
[entry
] =
1187 dma_map_single(priv
->device
, skb
->data
, bfsize
,
1190 (p
+ entry
)->des2
= priv
->rx_skbuff_dma
[entry
];
1192 if (unlikely(priv
->plat
->has_gmac
))
1193 priv
->hw
->ring
->refill_desc3(bfsize
, p
+ entry
);
1195 RX_DBG(KERN_INFO
"\trefill entry #%d\n", entry
);
1198 priv
->hw
->desc
->set_rx_owner(p
+ entry
);
1202 static int stmmac_rx(struct stmmac_priv
*priv
, int limit
)
1204 unsigned int rxsize
= priv
->dma_rx_size
;
1205 unsigned int entry
= priv
->cur_rx
% rxsize
;
1206 unsigned int next_entry
;
1207 unsigned int count
= 0;
1208 struct dma_desc
*p
= priv
->dma_rx
+ entry
;
1209 struct dma_desc
*p_next
;
1211 #ifdef STMMAC_RX_DEBUG
1212 if (netif_msg_hw(priv
)) {
1213 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1214 display_ring(priv
->dma_rx
, rxsize
);
1218 while (!priv
->hw
->desc
->get_rx_owner(p
)) {
1226 next_entry
= (++priv
->cur_rx
) % rxsize
;
1227 p_next
= priv
->dma_rx
+ next_entry
;
1230 /* read the status of the incoming frame */
1231 status
= (priv
->hw
->desc
->rx_status(&priv
->dev
->stats
,
1233 if (unlikely(status
== discard_frame
))
1234 priv
->dev
->stats
.rx_errors
++;
1236 struct sk_buff
*skb
;
1239 frame_len
= priv
->hw
->desc
->get_rx_frame_len(p
);
1240 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1241 * Type frames (LLC/LLC-SNAP) */
1242 if (unlikely(status
!= llc_snap
))
1243 frame_len
-= ETH_FCS_LEN
;
1244 #ifdef STMMAC_RX_DEBUG
1245 if (frame_len
> ETH_FRAME_LEN
)
1246 pr_debug("\tRX frame size %d, COE status: %d\n",
1249 if (netif_msg_hw(priv
))
1250 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1253 skb
= priv
->rx_skbuff
[entry
];
1254 if (unlikely(!skb
)) {
1255 pr_err("%s: Inconsistent Rx descriptor chain\n",
1257 priv
->dev
->stats
.rx_dropped
++;
1260 prefetch(skb
->data
- NET_IP_ALIGN
);
1261 priv
->rx_skbuff
[entry
] = NULL
;
1263 skb_put(skb
, frame_len
);
1264 dma_unmap_single(priv
->device
,
1265 priv
->rx_skbuff_dma
[entry
],
1266 priv
->dma_buf_sz
, DMA_FROM_DEVICE
);
1267 #ifdef STMMAC_RX_DEBUG
1268 if (netif_msg_pktdata(priv
)) {
1269 pr_info(" frame received (%dbytes)", frame_len
);
1270 print_pkt(skb
->data
, frame_len
);
1273 skb
->protocol
= eth_type_trans(skb
, priv
->dev
);
1275 if (unlikely(status
== csum_none
)) {
1276 /* always for the old mac 10/100 */
1277 skb_checksum_none_assert(skb
);
1278 netif_receive_skb(skb
);
1280 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1281 napi_gro_receive(&priv
->napi
, skb
);
1284 priv
->dev
->stats
.rx_packets
++;
1285 priv
->dev
->stats
.rx_bytes
+= frame_len
;
1288 p
= p_next
; /* use prefetched values */
1291 stmmac_rx_refill(priv
);
1293 priv
->xstats
.rx_pkt_n
+= count
;
1299 * stmmac_poll - stmmac poll method (NAPI)
1300 * @napi : pointer to the napi structure.
1301 * @budget : maximum number of packets that the current CPU can receive from
1304 * This function implements the the reception process.
1305 * Also it runs the TX completion thread
1307 static int stmmac_poll(struct napi_struct
*napi
, int budget
)
1309 struct stmmac_priv
*priv
= container_of(napi
, struct stmmac_priv
, napi
);
1312 priv
->xstats
.poll_n
++;
1314 work_done
= stmmac_rx(priv
, budget
);
1316 if (work_done
< budget
) {
1317 napi_complete(napi
);
1318 stmmac_enable_irq(priv
);
1325 * @dev : Pointer to net device structure
1326 * Description: this function is called when a packet transmission fails to
1327 * complete within a reasonable tmrate. The driver will mark the error in the
1328 * netdev structure and arrange for the device to be reset to a sane state
1329 * in order to transmit a new packet.
1331 static void stmmac_tx_timeout(struct net_device
*dev
)
1333 struct stmmac_priv
*priv
= netdev_priv(dev
);
1335 /* Clear Tx resources and restart transmitting again */
1336 stmmac_tx_err(priv
);
1339 /* Configuration changes (passed on by ifconfig) */
1340 static int stmmac_config(struct net_device
*dev
, struct ifmap
*map
)
1342 if (dev
->flags
& IFF_UP
) /* can't act on a running interface */
1345 /* Don't allow changing the I/O address */
1346 if (map
->base_addr
!= dev
->base_addr
) {
1347 pr_warning("%s: can't change I/O address\n", dev
->name
);
1351 /* Don't allow changing the IRQ */
1352 if (map
->irq
!= dev
->irq
) {
1353 pr_warning("%s: can't change IRQ number %d\n",
1354 dev
->name
, dev
->irq
);
1358 /* ignore other fields */
1363 * stmmac_set_rx_mode - entry point for multicast addressing
1364 * @dev : pointer to the device structure
1366 * This function is a driver entry point which gets called by the kernel
1367 * whenever multicast addresses must be enabled/disabled.
1371 static void stmmac_set_rx_mode(struct net_device
*dev
)
1373 struct stmmac_priv
*priv
= netdev_priv(dev
);
1375 spin_lock(&priv
->lock
);
1376 priv
->hw
->mac
->set_filter(dev
);
1377 spin_unlock(&priv
->lock
);
1381 * stmmac_change_mtu - entry point to change MTU size for the device.
1382 * @dev : device pointer.
1383 * @new_mtu : the new MTU size for the device.
1384 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1385 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1386 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1388 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1391 static int stmmac_change_mtu(struct net_device
*dev
, int new_mtu
)
1393 struct stmmac_priv
*priv
= netdev_priv(dev
);
1396 if (netif_running(dev
)) {
1397 pr_err("%s: must be stopped to change its MTU\n", dev
->name
);
1401 if (priv
->plat
->enh_desc
)
1402 max_mtu
= JUMBO_LEN
;
1404 max_mtu
= BUF_SIZE_4KiB
;
1406 if ((new_mtu
< 46) || (new_mtu
> max_mtu
)) {
1407 pr_err("%s: invalid MTU, max MTU is: %d\n", dev
->name
, max_mtu
);
1412 netdev_update_features(dev
);
1417 static u32
stmmac_fix_features(struct net_device
*dev
, u32 features
)
1419 struct stmmac_priv
*priv
= netdev_priv(dev
);
1422 features
&= ~NETIF_F_RXCSUM
;
1423 if (!priv
->plat
->tx_coe
)
1424 features
&= ~NETIF_F_ALL_CSUM
;
1426 /* Some GMAC devices have a bugged Jumbo frame support that
1427 * needs to have the Tx COE disabled for oversized frames
1428 * (due to limited buffer sizes). In this case we disable
1429 * the TX csum insertionin the TDES and not use SF. */
1430 if (priv
->plat
->bugged_jumbo
&& (dev
->mtu
> ETH_DATA_LEN
))
1431 features
&= ~NETIF_F_ALL_CSUM
;
1436 static irqreturn_t
stmmac_interrupt(int irq
, void *dev_id
)
1438 struct net_device
*dev
= (struct net_device
*)dev_id
;
1439 struct stmmac_priv
*priv
= netdev_priv(dev
);
1441 if (unlikely(!dev
)) {
1442 pr_err("%s: invalid dev pointer\n", __func__
);
1446 if (priv
->plat
->has_gmac
)
1447 /* To handle GMAC own interrupts */
1448 priv
->hw
->mac
->host_irq_status((void __iomem
*) dev
->base_addr
);
1450 stmmac_dma_interrupt(priv
);
1455 #ifdef CONFIG_NET_POLL_CONTROLLER
1456 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1457 * to allow network I/O with interrupts disabled. */
1458 static void stmmac_poll_controller(struct net_device
*dev
)
1460 disable_irq(dev
->irq
);
1461 stmmac_interrupt(dev
->irq
, dev
);
1462 enable_irq(dev
->irq
);
1467 * stmmac_ioctl - Entry point for the Ioctl
1468 * @dev: Device pointer.
1469 * @rq: An IOCTL specefic structure, that can contain a pointer to
1470 * a proprietary structure used to pass information to the driver.
1471 * @cmd: IOCTL command
1473 * Currently there are no special functionality supported in IOCTL, just the
1474 * phy_mii_ioctl(...) can be invoked.
1476 static int stmmac_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1478 struct stmmac_priv
*priv
= netdev_priv(dev
);
1481 if (!netif_running(dev
))
1487 spin_lock(&priv
->lock
);
1488 ret
= phy_mii_ioctl(priv
->phydev
, rq
, cmd
);
1489 spin_unlock(&priv
->lock
);
1494 #ifdef CONFIG_STMMAC_DEBUG_FS
1495 static struct dentry
*stmmac_fs_dir
;
1496 static struct dentry
*stmmac_rings_status
;
1497 static struct dentry
*stmmac_dma_cap
;
1499 static int stmmac_sysfs_ring_read(struct seq_file
*seq
, void *v
)
1507 struct net_device
*dev
= seq
->private;
1508 struct stmmac_priv
*priv
= netdev_priv(dev
);
1510 seq_printf(seq
, "=======================\n");
1511 seq_printf(seq
, " RX descriptor ring\n");
1512 seq_printf(seq
, "=======================\n");
1514 for (i
= 0; i
< priv
->dma_rx_size
; i
++) {
1515 struct tmp_s
*x
= (struct tmp_s
*)(priv
->dma_rx
+ i
);
1516 seq_printf(seq
, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1517 i
, (unsigned int)(x
->a
),
1518 (unsigned int)((x
->a
) >> 32), x
->b
, x
->c
);
1519 seq_printf(seq
, "\n");
1522 seq_printf(seq
, "\n");
1523 seq_printf(seq
, "=======================\n");
1524 seq_printf(seq
, " TX descriptor ring\n");
1525 seq_printf(seq
, "=======================\n");
1527 for (i
= 0; i
< priv
->dma_tx_size
; i
++) {
1528 struct tmp_s
*x
= (struct tmp_s
*)(priv
->dma_tx
+ i
);
1529 seq_printf(seq
, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1530 i
, (unsigned int)(x
->a
),
1531 (unsigned int)((x
->a
) >> 32), x
->b
, x
->c
);
1532 seq_printf(seq
, "\n");
1538 static int stmmac_sysfs_ring_open(struct inode
*inode
, struct file
*file
)
1540 return single_open(file
, stmmac_sysfs_ring_read
, inode
->i_private
);
1543 static const struct file_operations stmmac_rings_status_fops
= {
1544 .owner
= THIS_MODULE
,
1545 .open
= stmmac_sysfs_ring_open
,
1547 .llseek
= seq_lseek
,
1548 .release
= seq_release
,
1551 static int stmmac_sysfs_dma_cap_read(struct seq_file
*seq
, void *v
)
1553 struct net_device
*dev
= seq
->private;
1554 struct stmmac_priv
*priv
= netdev_priv(dev
);
1556 if (!stmmac_get_hw_features(priv
)) {
1557 seq_printf(seq
, "DMA HW features not supported\n");
1561 seq_printf(seq
, "==============================\n");
1562 seq_printf(seq
, "\tDMA HW features\n");
1563 seq_printf(seq
, "==============================\n");
1565 seq_printf(seq
, "\t10/100 Mbps %s\n",
1566 (priv
->dma_cap
.mbps_10_100
) ? "Y" : "N");
1567 seq_printf(seq
, "\t1000 Mbps %s\n",
1568 (priv
->dma_cap
.mbps_1000
) ? "Y" : "N");
1569 seq_printf(seq
, "\tHalf duple %s\n",
1570 (priv
->dma_cap
.half_duplex
) ? "Y" : "N");
1571 seq_printf(seq
, "\tHash Filter: %s\n",
1572 (priv
->dma_cap
.hash_filter
) ? "Y" : "N");
1573 seq_printf(seq
, "\tMultiple MAC address registers: %s\n",
1574 (priv
->dma_cap
.multi_addr
) ? "Y" : "N");
1575 seq_printf(seq
, "\tPCS (TBI/SGMII/RTBI PHY interfatces): %s\n",
1576 (priv
->dma_cap
.pcs
) ? "Y" : "N");
1577 seq_printf(seq
, "\tSMA (MDIO) Interface: %s\n",
1578 (priv
->dma_cap
.sma_mdio
) ? "Y" : "N");
1579 seq_printf(seq
, "\tPMT Remote wake up: %s\n",
1580 (priv
->dma_cap
.pmt_remote_wake_up
) ? "Y" : "N");
1581 seq_printf(seq
, "\tPMT Magic Frame: %s\n",
1582 (priv
->dma_cap
.pmt_magic_frame
) ? "Y" : "N");
1583 seq_printf(seq
, "\tRMON module: %s\n",
1584 (priv
->dma_cap
.rmon
) ? "Y" : "N");
1585 seq_printf(seq
, "\tIEEE 1588-2002 Time Stamp: %s\n",
1586 (priv
->dma_cap
.time_stamp
) ? "Y" : "N");
1587 seq_printf(seq
, "\tIEEE 1588-2008 Advanced Time Stamp:%s\n",
1588 (priv
->dma_cap
.atime_stamp
) ? "Y" : "N");
1589 seq_printf(seq
, "\t802.3az - Energy-Efficient Ethernet (EEE) %s\n",
1590 (priv
->dma_cap
.eee
) ? "Y" : "N");
1591 seq_printf(seq
, "\tAV features: %s\n", (priv
->dma_cap
.av
) ? "Y" : "N");
1592 seq_printf(seq
, "\tChecksum Offload in TX: %s\n",
1593 (priv
->dma_cap
.tx_coe
) ? "Y" : "N");
1594 seq_printf(seq
, "\tIP Checksum Offload (type1) in RX: %s\n",
1595 (priv
->dma_cap
.rx_coe_type1
) ? "Y" : "N");
1596 seq_printf(seq
, "\tIP Checksum Offload (type2) in RX: %s\n",
1597 (priv
->dma_cap
.rx_coe_type2
) ? "Y" : "N");
1598 seq_printf(seq
, "\tRXFIFO > 2048bytes: %s\n",
1599 (priv
->dma_cap
.rxfifo_over_2048
) ? "Y" : "N");
1600 seq_printf(seq
, "\tNumber of Additional RX channel: %d\n",
1601 priv
->dma_cap
.number_rx_channel
);
1602 seq_printf(seq
, "\tNumber of Additional TX channel: %d\n",
1603 priv
->dma_cap
.number_tx_channel
);
1604 seq_printf(seq
, "\tEnhanced descriptors: %s\n",
1605 (priv
->dma_cap
.enh_desc
) ? "Y" : "N");
1610 static int stmmac_sysfs_dma_cap_open(struct inode
*inode
, struct file
*file
)
1612 return single_open(file
, stmmac_sysfs_dma_cap_read
, inode
->i_private
);
1615 static const struct file_operations stmmac_dma_cap_fops
= {
1616 .owner
= THIS_MODULE
,
1617 .open
= stmmac_sysfs_dma_cap_open
,
1619 .llseek
= seq_lseek
,
1620 .release
= seq_release
,
1623 static int stmmac_init_fs(struct net_device
*dev
)
1625 /* Create debugfs entries */
1626 stmmac_fs_dir
= debugfs_create_dir(STMMAC_RESOURCE_NAME
, NULL
);
1628 if (!stmmac_fs_dir
|| IS_ERR(stmmac_fs_dir
)) {
1629 pr_err("ERROR %s, debugfs create directory failed\n",
1630 STMMAC_RESOURCE_NAME
);
1635 /* Entry to report DMA RX/TX rings */
1636 stmmac_rings_status
= debugfs_create_file("descriptors_status",
1637 S_IRUGO
, stmmac_fs_dir
, dev
,
1638 &stmmac_rings_status_fops
);
1640 if (!stmmac_rings_status
|| IS_ERR(stmmac_rings_status
)) {
1641 pr_info("ERROR creating stmmac ring debugfs file\n");
1642 debugfs_remove(stmmac_fs_dir
);
1647 /* Entry to report the DMA HW features */
1648 stmmac_dma_cap
= debugfs_create_file("dma_cap", S_IRUGO
, stmmac_fs_dir
,
1649 dev
, &stmmac_dma_cap_fops
);
1651 if (!stmmac_dma_cap
|| IS_ERR(stmmac_dma_cap
)) {
1652 pr_info("ERROR creating stmmac MMC debugfs file\n");
1653 debugfs_remove(stmmac_rings_status
);
1654 debugfs_remove(stmmac_fs_dir
);
1662 static void stmmac_exit_fs(void)
1664 debugfs_remove(stmmac_rings_status
);
1665 debugfs_remove(stmmac_dma_cap
);
1666 debugfs_remove(stmmac_fs_dir
);
1668 #endif /* CONFIG_STMMAC_DEBUG_FS */
1670 static const struct net_device_ops stmmac_netdev_ops
= {
1671 .ndo_open
= stmmac_open
,
1672 .ndo_start_xmit
= stmmac_xmit
,
1673 .ndo_stop
= stmmac_release
,
1674 .ndo_change_mtu
= stmmac_change_mtu
,
1675 .ndo_fix_features
= stmmac_fix_features
,
1676 .ndo_set_rx_mode
= stmmac_set_rx_mode
,
1677 .ndo_tx_timeout
= stmmac_tx_timeout
,
1678 .ndo_do_ioctl
= stmmac_ioctl
,
1679 .ndo_set_config
= stmmac_config
,
1680 #ifdef CONFIG_NET_POLL_CONTROLLER
1681 .ndo_poll_controller
= stmmac_poll_controller
,
1683 .ndo_set_mac_address
= eth_mac_addr
,
1687 * stmmac_probe - Initialization of the adapter .
1688 * @dev : device pointer
1689 * Description: The function initializes the network device structure for
1690 * the STMMAC driver. It also calls the low level routines
1691 * in order to init the HW (i.e. the DMA engine)
1693 static int stmmac_probe(struct net_device
*dev
)
1696 struct stmmac_priv
*priv
= netdev_priv(dev
);
1700 dev
->netdev_ops
= &stmmac_netdev_ops
;
1701 stmmac_set_ethtool_ops(dev
);
1703 dev
->hw_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
1704 dev
->features
|= dev
->hw_features
| NETIF_F_HIGHDMA
;
1705 dev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1706 #ifdef STMMAC_VLAN_TAG_USED
1707 /* Both mac100 and gmac support receive VLAN tag detection */
1708 dev
->features
|= NETIF_F_HW_VLAN_RX
;
1710 priv
->msg_enable
= netif_msg_init(debug
, default_msg_level
);
1713 priv
->flow_ctrl
= FLOW_AUTO
; /* RX/TX pause on */
1715 priv
->pause
= pause
;
1716 netif_napi_add(dev
, &priv
->napi
, stmmac_poll
, 64);
1718 /* Get the MAC address */
1719 priv
->hw
->mac
->get_umac_addr((void __iomem
*) dev
->base_addr
,
1722 if (!is_valid_ether_addr(dev
->dev_addr
))
1723 pr_warning("\tno valid MAC address;"
1724 "please, use ifconfig or nwhwconfig!\n");
1726 spin_lock_init(&priv
->lock
);
1727 spin_lock_init(&priv
->tx_lock
);
1729 ret
= register_netdev(dev
);
1731 pr_err("%s: ERROR %i registering the device\n",
1736 DBG(probe
, DEBUG
, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1737 dev
->name
, (dev
->features
& NETIF_F_SG
) ? "on" : "off",
1738 (dev
->features
& NETIF_F_IP_CSUM
) ? "on" : "off");
1744 * stmmac_mac_device_setup
1745 * @dev : device pointer
1746 * Description: select and initialise the mac device (mac100 or Gmac).
1748 static int stmmac_mac_device_setup(struct net_device
*dev
)
1750 struct stmmac_priv
*priv
= netdev_priv(dev
);
1752 struct mac_device_info
*device
;
1754 if (priv
->plat
->has_gmac
) {
1755 dev
->priv_flags
|= IFF_UNICAST_FLT
;
1756 device
= dwmac1000_setup(priv
->ioaddr
);
1758 device
= dwmac100_setup(priv
->ioaddr
);
1764 if (priv
->plat
->enh_desc
) {
1765 device
->desc
= &enh_desc_ops
;
1766 pr_info("\tEnhanced descriptor structure\n");
1768 device
->desc
= &ndesc_ops
;
1771 priv
->hw
->ring
= &ring_mode_ops
;
1773 if (device_can_wakeup(priv
->device
)) {
1774 priv
->wolopts
= WAKE_MAGIC
; /* Magic Frame as default */
1775 enable_irq_wake(priv
->wol_irq
);
1783 * @pdev: platform device pointer
1784 * Description: the driver is initialized through platform_device.
1786 static int stmmac_dvr_probe(struct platform_device
*pdev
)
1789 struct resource
*res
;
1790 void __iomem
*addr
= NULL
;
1791 struct net_device
*ndev
= NULL
;
1792 struct stmmac_priv
*priv
= NULL
;
1793 struct plat_stmmacenet_data
*plat_dat
;
1795 pr_info("STMMAC driver:\n\tplatform registration... ");
1796 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1799 pr_info("\tdone!\n");
1801 if (!request_mem_region(res
->start
, resource_size(res
),
1803 pr_err("%s: ERROR: memory allocation failed"
1804 "cannot get the I/O addr 0x%x\n",
1805 __func__
, (unsigned int)res
->start
);
1809 addr
= ioremap(res
->start
, resource_size(res
));
1811 pr_err("%s: ERROR: memory mapping failed\n", __func__
);
1813 goto out_release_region
;
1816 ndev
= alloc_etherdev(sizeof(struct stmmac_priv
));
1818 pr_err("%s: ERROR: allocating the device\n", __func__
);
1823 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1825 /* Get the MAC information */
1826 ndev
->irq
= platform_get_irq_byname(pdev
, "macirq");
1827 if (ndev
->irq
== -ENXIO
) {
1828 pr_err("%s: ERROR: MAC IRQ configuration "
1829 "information not found\n", __func__
);
1834 priv
= netdev_priv(ndev
);
1835 priv
->device
= &(pdev
->dev
);
1837 plat_dat
= pdev
->dev
.platform_data
;
1839 priv
->plat
= plat_dat
;
1841 priv
->ioaddr
= addr
;
1843 /* PMT module is not integrated in all the MAC devices. */
1844 if (plat_dat
->pmt
) {
1845 pr_info("\tPMT module supported\n");
1846 device_set_wakeup_capable(&pdev
->dev
, 1);
1849 * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
1850 * The external wake up irq can be passed through the platform code
1851 * named as "eth_wake_irq"
1853 * In case the wake up interrupt is not passed from the platform
1854 * so the driver will continue to use the mac irq (ndev->irq)
1856 priv
->wol_irq
= platform_get_irq_byname(pdev
, "eth_wake_irq");
1857 if (priv
->wol_irq
== -ENXIO
)
1858 priv
->wol_irq
= ndev
->irq
;
1861 platform_set_drvdata(pdev
, ndev
);
1863 /* Set the I/O base addr */
1864 ndev
->base_addr
= (unsigned long)addr
;
1866 /* Custom initialisation */
1867 if (priv
->plat
->init
) {
1868 ret
= priv
->plat
->init(pdev
);
1873 /* MAC HW revice detection */
1874 ret
= stmmac_mac_device_setup(ndev
);
1878 /* Network Device Registration */
1879 ret
= stmmac_probe(ndev
);
1883 /* Override with kernel parameters if supplied XXX CRS XXX
1884 * this needs to have multiple instances */
1885 if ((phyaddr
>= 0) && (phyaddr
<= 31))
1886 priv
->plat
->phy_addr
= phyaddr
;
1888 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1889 "\tIO base addr: 0x%p)\n", ndev
->name
, pdev
->name
,
1890 pdev
->id
, ndev
->irq
, addr
);
1892 /* MDIO bus Registration */
1893 pr_debug("\tMDIO bus (id: %d)...", priv
->plat
->bus_id
);
1894 ret
= stmmac_mdio_register(ndev
);
1896 goto out_unregister
;
1897 pr_debug("registered!\n");
1899 #ifdef CONFIG_STMMAC_DEBUG_FS
1900 ret
= stmmac_init_fs(ndev
);
1902 pr_warning("\tFailed debugFS registration");
1908 unregister_netdev(ndev
);
1910 if (priv
->plat
->exit
)
1911 priv
->plat
->exit(pdev
);
1914 platform_set_drvdata(pdev
, NULL
);
1918 release_mem_region(res
->start
, resource_size(res
));
1925 * @pdev: platform device pointer
1926 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1927 * changes the link status, releases the DMA descriptor rings,
1928 * unregisters the MDIO bus and unmaps the allocated memory.
1930 static int stmmac_dvr_remove(struct platform_device
*pdev
)
1932 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1933 struct stmmac_priv
*priv
= netdev_priv(ndev
);
1934 struct resource
*res
;
1936 pr_info("%s:\n\tremoving driver", __func__
);
1938 priv
->hw
->dma
->stop_rx(priv
->ioaddr
);
1939 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
1941 stmmac_disable_mac(priv
->ioaddr
);
1943 netif_carrier_off(ndev
);
1945 stmmac_mdio_unregister(ndev
);
1947 if (priv
->plat
->exit
)
1948 priv
->plat
->exit(pdev
);
1950 platform_set_drvdata(pdev
, NULL
);
1951 unregister_netdev(ndev
);
1953 iounmap((void *)priv
->ioaddr
);
1954 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1955 release_mem_region(res
->start
, resource_size(res
));
1957 #ifdef CONFIG_STMMAC_DEBUG_FS
1967 static int stmmac_suspend(struct device
*dev
)
1969 struct net_device
*ndev
= dev_get_drvdata(dev
);
1970 struct stmmac_priv
*priv
= netdev_priv(ndev
);
1973 if (!ndev
|| !netif_running(ndev
))
1976 spin_lock(&priv
->lock
);
1978 netif_device_detach(ndev
);
1979 netif_stop_queue(ndev
);
1981 phy_stop(priv
->phydev
);
1983 #ifdef CONFIG_STMMAC_TIMER
1984 priv
->tm
->timer_stop();
1985 if (likely(priv
->tm
->enable
))
1988 napi_disable(&priv
->napi
);
1990 /* Stop TX/RX DMA */
1991 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
1992 priv
->hw
->dma
->stop_rx(priv
->ioaddr
);
1993 /* Clear the Rx/Tx descriptors */
1994 priv
->hw
->desc
->init_rx_desc(priv
->dma_rx
, priv
->dma_rx_size
,
1996 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, priv
->dma_tx_size
);
1998 /* Enable Power down mode by programming the PMT regs */
1999 if (device_may_wakeup(priv
->device
))
2000 priv
->hw
->mac
->pmt(priv
->ioaddr
, priv
->wolopts
);
2002 stmmac_disable_mac(priv
->ioaddr
);
2004 spin_unlock(&priv
->lock
);
2008 static int stmmac_resume(struct device
*dev
)
2010 struct net_device
*ndev
= dev_get_drvdata(dev
);
2011 struct stmmac_priv
*priv
= netdev_priv(ndev
);
2013 if (!netif_running(ndev
))
2016 spin_lock(&priv
->lock
);
2018 /* Power Down bit, into the PM register, is cleared
2019 * automatically as soon as a magic packet or a Wake-up frame
2020 * is received. Anyway, it's better to manually clear
2021 * this bit because it can generate problems while resuming
2022 * from another devices (e.g. serial console). */
2023 if (device_may_wakeup(priv
->device
))
2024 priv
->hw
->mac
->pmt(priv
->ioaddr
, 0);
2026 netif_device_attach(ndev
);
2028 /* Enable the MAC and DMA */
2029 stmmac_enable_mac(priv
->ioaddr
);
2030 priv
->hw
->dma
->start_tx(priv
->ioaddr
);
2031 priv
->hw
->dma
->start_rx(priv
->ioaddr
);
2033 #ifdef CONFIG_STMMAC_TIMER
2034 if (likely(priv
->tm
->enable
))
2035 priv
->tm
->timer_start(tmrate
);
2037 napi_enable(&priv
->napi
);
2040 phy_start(priv
->phydev
);
2042 netif_start_queue(ndev
);
2044 spin_unlock(&priv
->lock
);
2048 static int stmmac_freeze(struct device
*dev
)
2050 struct net_device
*ndev
= dev_get_drvdata(dev
);
2052 if (!ndev
|| !netif_running(ndev
))
2055 return stmmac_release(ndev
);
2058 static int stmmac_restore(struct device
*dev
)
2060 struct net_device
*ndev
= dev_get_drvdata(dev
);
2062 if (!ndev
|| !netif_running(ndev
))
2065 return stmmac_open(ndev
);
2068 static const struct dev_pm_ops stmmac_pm_ops
= {
2069 .suspend
= stmmac_suspend
,
2070 .resume
= stmmac_resume
,
2071 .freeze
= stmmac_freeze
,
2072 .thaw
= stmmac_restore
,
2073 .restore
= stmmac_restore
,
2076 static const struct dev_pm_ops stmmac_pm_ops
;
2077 #endif /* CONFIG_PM */
2079 static struct platform_driver stmmac_driver
= {
2080 .probe
= stmmac_dvr_probe
,
2081 .remove
= stmmac_dvr_remove
,
2083 .name
= STMMAC_RESOURCE_NAME
,
2084 .owner
= THIS_MODULE
,
2085 .pm
= &stmmac_pm_ops
,
2090 * stmmac_init_module - Entry point for the driver
2091 * Description: This function is the entry point for the driver.
2093 static int __init
stmmac_init_module(void)
2097 ret
= platform_driver_register(&stmmac_driver
);
2102 * stmmac_cleanup_module - Cleanup routine for the driver
2103 * Description: This function is the cleanup routine for the driver.
2105 static void __exit
stmmac_cleanup_module(void)
2107 platform_driver_unregister(&stmmac_driver
);
2111 static int __init
stmmac_cmdline_opt(char *str
)
2117 while ((opt
= strsep(&str
, ",")) != NULL
) {
2118 if (!strncmp(opt
, "debug:", 6)) {
2119 if (strict_strtoul(opt
+ 6, 0, (unsigned long *)&debug
))
2121 } else if (!strncmp(opt
, "phyaddr:", 8)) {
2122 if (strict_strtoul(opt
+ 8, 0,
2123 (unsigned long *)&phyaddr
))
2125 } else if (!strncmp(opt
, "dma_txsize:", 11)) {
2126 if (strict_strtoul(opt
+ 11, 0,
2127 (unsigned long *)&dma_txsize
))
2129 } else if (!strncmp(opt
, "dma_rxsize:", 11)) {
2130 if (strict_strtoul(opt
+ 11, 0,
2131 (unsigned long *)&dma_rxsize
))
2133 } else if (!strncmp(opt
, "buf_sz:", 7)) {
2134 if (strict_strtoul(opt
+ 7, 0,
2135 (unsigned long *)&buf_sz
))
2137 } else if (!strncmp(opt
, "tc:", 3)) {
2138 if (strict_strtoul(opt
+ 3, 0, (unsigned long *)&tc
))
2140 } else if (!strncmp(opt
, "watchdog:", 9)) {
2141 if (strict_strtoul(opt
+ 9, 0,
2142 (unsigned long *)&watchdog
))
2144 } else if (!strncmp(opt
, "flow_ctrl:", 10)) {
2145 if (strict_strtoul(opt
+ 10, 0,
2146 (unsigned long *)&flow_ctrl
))
2148 } else if (!strncmp(opt
, "pause:", 6)) {
2149 if (strict_strtoul(opt
+ 6, 0, (unsigned long *)&pause
))
2151 #ifdef CONFIG_STMMAC_TIMER
2152 } else if (!strncmp(opt
, "tmrate:", 7)) {
2153 if (strict_strtoul(opt
+ 7, 0,
2154 (unsigned long *)&tmrate
))
2162 pr_err("%s: ERROR broken module parameter conversion", __func__
);
2166 __setup("stmmaceth=", stmmac_cmdline_opt
);
2169 module_init(stmmac_init_module
);
2170 module_exit(stmmac_cleanup_module
);
2172 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2173 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2174 MODULE_LICENSE("GPL");