cpsw: rename register banks to match the reference manual
[deliverable/linux.git] / drivers / net / ethernet / ti / cpsw.c
1 /*
2 * Texas Instruments Ethernet Switch Driver
3 *
4 * Copyright (C) 2012 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/io.h>
18 #include <linux/clk.h>
19 #include <linux/timer.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/irqreturn.h>
23 #include <linux/interrupt.h>
24 #include <linux/if_ether.h>
25 #include <linux/etherdevice.h>
26 #include <linux/netdevice.h>
27 #include <linux/phy.h>
28 #include <linux/workqueue.h>
29 #include <linux/delay.h>
30 #include <linux/pm_runtime.h>
31 #include <linux/of.h>
32 #include <linux/of_net.h>
33 #include <linux/of_device.h>
34
35 #include <linux/platform_data/cpsw.h>
36
37 #include "cpsw_ale.h"
38 #include "davinci_cpdma.h"
39
40 #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \
41 NETIF_MSG_DRV | NETIF_MSG_LINK | \
42 NETIF_MSG_IFUP | NETIF_MSG_INTR | \
43 NETIF_MSG_PROBE | NETIF_MSG_TIMER | \
44 NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \
45 NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \
46 NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \
47 NETIF_MSG_RX_STATUS)
48
49 #define cpsw_info(priv, type, format, ...) \
50 do { \
51 if (netif_msg_##type(priv) && net_ratelimit()) \
52 dev_info(priv->dev, format, ## __VA_ARGS__); \
53 } while (0)
54
55 #define cpsw_err(priv, type, format, ...) \
56 do { \
57 if (netif_msg_##type(priv) && net_ratelimit()) \
58 dev_err(priv->dev, format, ## __VA_ARGS__); \
59 } while (0)
60
61 #define cpsw_dbg(priv, type, format, ...) \
62 do { \
63 if (netif_msg_##type(priv) && net_ratelimit()) \
64 dev_dbg(priv->dev, format, ## __VA_ARGS__); \
65 } while (0)
66
67 #define cpsw_notice(priv, type, format, ...) \
68 do { \
69 if (netif_msg_##type(priv) && net_ratelimit()) \
70 dev_notice(priv->dev, format, ## __VA_ARGS__); \
71 } while (0)
72
73 #define ALE_ALL_PORTS 0x7
74
75 #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7)
76 #define CPSW_MINOR_VERSION(reg) (reg & 0xff)
77 #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f)
78
79 #define CPDMA_RXTHRESH 0x0c0
80 #define CPDMA_RXFREE 0x0e0
81 #define CPDMA_TXHDP 0x00
82 #define CPDMA_RXHDP 0x20
83 #define CPDMA_TXCP 0x40
84 #define CPDMA_RXCP 0x60
85
86 #define cpsw_dma_regs(base, offset) \
87 (void __iomem *)((base) + (offset))
88 #define cpsw_dma_rxthresh(base, offset) \
89 (void __iomem *)((base) + (offset) + CPDMA_RXTHRESH)
90 #define cpsw_dma_rxfree(base, offset) \
91 (void __iomem *)((base) + (offset) + CPDMA_RXFREE)
92 #define cpsw_dma_txhdp(base, offset) \
93 (void __iomem *)((base) + (offset) + CPDMA_TXHDP)
94 #define cpsw_dma_rxhdp(base, offset) \
95 (void __iomem *)((base) + (offset) + CPDMA_RXHDP)
96 #define cpsw_dma_txcp(base, offset) \
97 (void __iomem *)((base) + (offset) + CPDMA_TXCP)
98 #define cpsw_dma_rxcp(base, offset) \
99 (void __iomem *)((base) + (offset) + CPDMA_RXCP)
100
101 #define CPSW_POLL_WEIGHT 64
102 #define CPSW_MIN_PACKET_SIZE 60
103 #define CPSW_MAX_PACKET_SIZE (1500 + 14 + 4 + 4)
104
105 #define RX_PRIORITY_MAPPING 0x76543210
106 #define TX_PRIORITY_MAPPING 0x33221100
107 #define CPDMA_TX_PRIORITY_MAP 0x76543210
108
109 #define cpsw_enable_irq(priv) \
110 do { \
111 u32 i; \
112 for (i = 0; i < priv->num_irqs; i++) \
113 enable_irq(priv->irqs_table[i]); \
114 } while (0);
115 #define cpsw_disable_irq(priv) \
116 do { \
117 u32 i; \
118 for (i = 0; i < priv->num_irqs; i++) \
119 disable_irq_nosync(priv->irqs_table[i]); \
120 } while (0);
121
122 static int debug_level;
123 module_param(debug_level, int, 0);
124 MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
125
126 static int ale_ageout = 10;
127 module_param(ale_ageout, int, 0);
128 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
129
130 static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
131 module_param(rx_packet_max, int, 0);
132 MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
133
134 struct cpsw_wr_regs {
135 u32 id_ver;
136 u32 soft_reset;
137 u32 control;
138 u32 int_control;
139 u32 rx_thresh_en;
140 u32 rx_en;
141 u32 tx_en;
142 u32 misc_en;
143 };
144
145 struct cpsw_ss_regs {
146 u32 id_ver;
147 u32 control;
148 u32 soft_reset;
149 u32 stat_port_en;
150 u32 ptype;
151 };
152
153 struct cpsw_slave_regs {
154 u32 max_blks;
155 u32 blk_cnt;
156 u32 flow_thresh;
157 u32 port_vlan;
158 u32 tx_pri_map;
159 u32 ts_ctl;
160 u32 ts_seq_ltype;
161 u32 ts_vlan;
162 u32 sa_lo;
163 u32 sa_hi;
164 };
165
166 struct cpsw_host_regs {
167 u32 max_blks;
168 u32 blk_cnt;
169 u32 flow_thresh;
170 u32 port_vlan;
171 u32 tx_pri_map;
172 u32 cpdma_tx_pri_map;
173 u32 cpdma_rx_chan_map;
174 };
175
176 struct cpsw_sliver_regs {
177 u32 id_ver;
178 u32 mac_control;
179 u32 mac_status;
180 u32 soft_reset;
181 u32 rx_maxlen;
182 u32 __reserved_0;
183 u32 rx_pause;
184 u32 tx_pause;
185 u32 __reserved_1;
186 u32 rx_pri_map;
187 };
188
189 struct cpsw_slave {
190 struct cpsw_slave_regs __iomem *regs;
191 struct cpsw_sliver_regs __iomem *sliver;
192 int slave_num;
193 u32 mac_control;
194 struct cpsw_slave_data *data;
195 struct phy_device *phy;
196 };
197
198 struct cpsw_priv {
199 spinlock_t lock;
200 struct platform_device *pdev;
201 struct net_device *ndev;
202 struct resource *cpsw_res;
203 struct resource *cpsw_ss_res;
204 struct napi_struct napi;
205 struct device *dev;
206 struct cpsw_platform_data data;
207 struct cpsw_ss_regs __iomem *regs;
208 struct cpsw_wr_regs __iomem *wr_regs;
209 struct cpsw_host_regs __iomem *host_port_regs;
210 u32 msg_enable;
211 struct net_device_stats stats;
212 int rx_packet_max;
213 int host_port;
214 struct clk *clk;
215 u8 mac_addr[ETH_ALEN];
216 struct cpsw_slave *slaves;
217 struct cpdma_ctlr *dma;
218 struct cpdma_chan *txch, *rxch;
219 struct cpsw_ale *ale;
220 /* snapshot of IRQ numbers */
221 u32 irqs_table[4];
222 u32 num_irqs;
223 };
224
225 #define napi_to_priv(napi) container_of(napi, struct cpsw_priv, napi)
226 #define for_each_slave(priv, func, arg...) \
227 do { \
228 int idx; \
229 for (idx = 0; idx < (priv)->data.slaves; idx++) \
230 (func)((priv)->slaves + idx, ##arg); \
231 } while (0)
232
233 static void cpsw_ndo_set_rx_mode(struct net_device *ndev)
234 {
235 struct cpsw_priv *priv = netdev_priv(ndev);
236
237 if (ndev->flags & IFF_PROMISC) {
238 /* Enable promiscuous mode */
239 dev_err(priv->dev, "Ignoring Promiscuous mode\n");
240 return;
241 }
242
243 /* Clear all mcast from ALE */
244 cpsw_ale_flush_multicast(priv->ale, ALE_ALL_PORTS << priv->host_port);
245
246 if (!netdev_mc_empty(ndev)) {
247 struct netdev_hw_addr *ha;
248
249 /* program multicast address list into ALE register */
250 netdev_for_each_mc_addr(ha, ndev) {
251 cpsw_ale_add_mcast(priv->ale, (u8 *)ha->addr,
252 ALE_ALL_PORTS << priv->host_port, 0, 0);
253 }
254 }
255 }
256
257 static void cpsw_intr_enable(struct cpsw_priv *priv)
258 {
259 __raw_writel(0xFF, &priv->wr_regs->tx_en);
260 __raw_writel(0xFF, &priv->wr_regs->rx_en);
261
262 cpdma_ctlr_int_ctrl(priv->dma, true);
263 return;
264 }
265
266 static void cpsw_intr_disable(struct cpsw_priv *priv)
267 {
268 __raw_writel(0, &priv->wr_regs->tx_en);
269 __raw_writel(0, &priv->wr_regs->rx_en);
270
271 cpdma_ctlr_int_ctrl(priv->dma, false);
272 return;
273 }
274
275 void cpsw_tx_handler(void *token, int len, int status)
276 {
277 struct sk_buff *skb = token;
278 struct net_device *ndev = skb->dev;
279 struct cpsw_priv *priv = netdev_priv(ndev);
280
281 if (unlikely(netif_queue_stopped(ndev)))
282 netif_start_queue(ndev);
283 priv->stats.tx_packets++;
284 priv->stats.tx_bytes += len;
285 dev_kfree_skb_any(skb);
286 }
287
288 void cpsw_rx_handler(void *token, int len, int status)
289 {
290 struct sk_buff *skb = token;
291 struct net_device *ndev = skb->dev;
292 struct cpsw_priv *priv = netdev_priv(ndev);
293 int ret = 0;
294
295 /* free and bail if we are shutting down */
296 if (unlikely(!netif_running(ndev)) ||
297 unlikely(!netif_carrier_ok(ndev))) {
298 dev_kfree_skb_any(skb);
299 return;
300 }
301 if (likely(status >= 0)) {
302 skb_put(skb, len);
303 skb->protocol = eth_type_trans(skb, ndev);
304 netif_receive_skb(skb);
305 priv->stats.rx_bytes += len;
306 priv->stats.rx_packets++;
307 skb = NULL;
308 }
309
310 if (unlikely(!netif_running(ndev))) {
311 if (skb)
312 dev_kfree_skb_any(skb);
313 return;
314 }
315
316 if (likely(!skb)) {
317 skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max);
318 if (WARN_ON(!skb))
319 return;
320
321 ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
322 skb_tailroom(skb), GFP_KERNEL);
323 }
324 WARN_ON(ret < 0);
325 }
326
327 static irqreturn_t cpsw_interrupt(int irq, void *dev_id)
328 {
329 struct cpsw_priv *priv = dev_id;
330
331 if (likely(netif_running(priv->ndev))) {
332 cpsw_intr_disable(priv);
333 cpsw_disable_irq(priv);
334 napi_schedule(&priv->napi);
335 }
336 return IRQ_HANDLED;
337 }
338
339 static inline int cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)
340 {
341 if (priv->host_port == 0)
342 return slave_num + 1;
343 else
344 return slave_num;
345 }
346
347 static int cpsw_poll(struct napi_struct *napi, int budget)
348 {
349 struct cpsw_priv *priv = napi_to_priv(napi);
350 int num_tx, num_rx;
351
352 num_tx = cpdma_chan_process(priv->txch, 128);
353 num_rx = cpdma_chan_process(priv->rxch, budget);
354
355 if (num_rx || num_tx)
356 cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n",
357 num_rx, num_tx);
358
359 if (num_rx < budget) {
360 napi_complete(napi);
361 cpsw_intr_enable(priv);
362 cpdma_ctlr_eoi(priv->dma);
363 cpsw_enable_irq(priv);
364 }
365
366 return num_rx;
367 }
368
369 static inline void soft_reset(const char *module, void __iomem *reg)
370 {
371 unsigned long timeout = jiffies + HZ;
372
373 __raw_writel(1, reg);
374 do {
375 cpu_relax();
376 } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies));
377
378 WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module);
379 }
380
381 #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \
382 ((mac)[2] << 16) | ((mac)[3] << 24))
383 #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8))
384
385 static void cpsw_set_slave_mac(struct cpsw_slave *slave,
386 struct cpsw_priv *priv)
387 {
388 __raw_writel(mac_hi(priv->mac_addr), &slave->regs->sa_hi);
389 __raw_writel(mac_lo(priv->mac_addr), &slave->regs->sa_lo);
390 }
391
392 static void _cpsw_adjust_link(struct cpsw_slave *slave,
393 struct cpsw_priv *priv, bool *link)
394 {
395 struct phy_device *phy = slave->phy;
396 u32 mac_control = 0;
397 u32 slave_port;
398
399 if (!phy)
400 return;
401
402 slave_port = cpsw_get_slave_port(priv, slave->slave_num);
403
404 if (phy->link) {
405 mac_control = priv->data.mac_control;
406
407 /* enable forwarding */
408 cpsw_ale_control_set(priv->ale, slave_port,
409 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
410
411 if (phy->speed == 1000)
412 mac_control |= BIT(7); /* GIGABITEN */
413 if (phy->duplex)
414 mac_control |= BIT(0); /* FULLDUPLEXEN */
415
416 /* set speed_in input in case RMII mode is used in 100Mbps */
417 if (phy->speed == 100)
418 mac_control |= BIT(15);
419
420 *link = true;
421 } else {
422 mac_control = 0;
423 /* disable forwarding */
424 cpsw_ale_control_set(priv->ale, slave_port,
425 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
426 }
427
428 if (mac_control != slave->mac_control) {
429 phy_print_status(phy);
430 __raw_writel(mac_control, &slave->sliver->mac_control);
431 }
432
433 slave->mac_control = mac_control;
434 }
435
436 static void cpsw_adjust_link(struct net_device *ndev)
437 {
438 struct cpsw_priv *priv = netdev_priv(ndev);
439 bool link = false;
440
441 for_each_slave(priv, _cpsw_adjust_link, priv, &link);
442
443 if (link) {
444 netif_carrier_on(ndev);
445 if (netif_running(ndev))
446 netif_wake_queue(ndev);
447 } else {
448 netif_carrier_off(ndev);
449 netif_stop_queue(ndev);
450 }
451 }
452
453 static inline int __show_stat(char *buf, int maxlen, const char *name, u32 val)
454 {
455 static char *leader = "........................................";
456
457 if (!val)
458 return 0;
459 else
460 return snprintf(buf, maxlen, "%s %s %10d\n", name,
461 leader + strlen(name), val);
462 }
463
464 static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
465 {
466 char name[32];
467 u32 slave_port;
468
469 sprintf(name, "slave-%d", slave->slave_num);
470
471 soft_reset(name, &slave->sliver->soft_reset);
472
473 /* setup priority mapping */
474 __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map);
475 __raw_writel(TX_PRIORITY_MAPPING, &slave->regs->tx_pri_map);
476
477 /* setup max packet size, and mac address */
478 __raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen);
479 cpsw_set_slave_mac(slave, priv);
480
481 slave->mac_control = 0; /* no link yet */
482
483 slave_port = cpsw_get_slave_port(priv, slave->slave_num);
484
485 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
486 1 << slave_port, 0, ALE_MCAST_FWD_2);
487
488 slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
489 &cpsw_adjust_link, 0, slave->data->phy_if);
490 if (IS_ERR(slave->phy)) {
491 dev_err(priv->dev, "phy %s not found on slave %d\n",
492 slave->data->phy_id, slave->slave_num);
493 slave->phy = NULL;
494 } else {
495 dev_info(priv->dev, "phy found : id is : 0x%x\n",
496 slave->phy->phy_id);
497 phy_start(slave->phy);
498 }
499 }
500
501 static void cpsw_init_host_port(struct cpsw_priv *priv)
502 {
503 /* soft reset the controller and initialize ale */
504 soft_reset("cpsw", &priv->regs->soft_reset);
505 cpsw_ale_start(priv->ale);
506
507 /* switch to vlan unaware mode */
508 cpsw_ale_control_set(priv->ale, 0, ALE_VLAN_AWARE, 0);
509
510 /* setup host port priority mapping */
511 __raw_writel(CPDMA_TX_PRIORITY_MAP,
512 &priv->host_port_regs->cpdma_tx_pri_map);
513 __raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map);
514
515 cpsw_ale_control_set(priv->ale, priv->host_port,
516 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
517
518 cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port, 0);
519 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
520 1 << priv->host_port, 0, ALE_MCAST_FWD_2);
521 }
522
523 static int cpsw_ndo_open(struct net_device *ndev)
524 {
525 struct cpsw_priv *priv = netdev_priv(ndev);
526 int i, ret;
527 u32 reg;
528
529 cpsw_intr_disable(priv);
530 netif_carrier_off(ndev);
531
532 pm_runtime_get_sync(&priv->pdev->dev);
533
534 reg = __raw_readl(&priv->regs->id_ver);
535
536 dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
537 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
538 CPSW_RTL_VERSION(reg));
539
540 /* initialize host and slave ports */
541 cpsw_init_host_port(priv);
542 for_each_slave(priv, cpsw_slave_open, priv);
543
544 /* setup tx dma to fixed prio and zero offset */
545 cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1);
546 cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0);
547
548 /* disable priority elevation and enable statistics on all ports */
549 __raw_writel(0, &priv->regs->ptype);
550
551 /* enable statistics collection only on the host port */
552 __raw_writel(0x7, &priv->regs->stat_port_en);
553
554 if (WARN_ON(!priv->data.rx_descs))
555 priv->data.rx_descs = 128;
556
557 for (i = 0; i < priv->data.rx_descs; i++) {
558 struct sk_buff *skb;
559
560 ret = -ENOMEM;
561 skb = netdev_alloc_skb_ip_align(priv->ndev,
562 priv->rx_packet_max);
563 if (!skb)
564 break;
565 ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
566 skb_tailroom(skb), GFP_KERNEL);
567 if (WARN_ON(ret < 0))
568 break;
569 }
570 /* continue even if we didn't manage to submit all receive descs */
571 cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i);
572
573 cpdma_ctlr_start(priv->dma);
574 cpsw_intr_enable(priv);
575 napi_enable(&priv->napi);
576 cpdma_ctlr_eoi(priv->dma);
577
578 return 0;
579 }
580
581 static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv)
582 {
583 if (!slave->phy)
584 return;
585 phy_stop(slave->phy);
586 phy_disconnect(slave->phy);
587 slave->phy = NULL;
588 }
589
590 static int cpsw_ndo_stop(struct net_device *ndev)
591 {
592 struct cpsw_priv *priv = netdev_priv(ndev);
593
594 cpsw_info(priv, ifdown, "shutting down cpsw device\n");
595 cpsw_intr_disable(priv);
596 cpdma_ctlr_int_ctrl(priv->dma, false);
597 cpdma_ctlr_stop(priv->dma);
598 netif_stop_queue(priv->ndev);
599 napi_disable(&priv->napi);
600 netif_carrier_off(priv->ndev);
601 cpsw_ale_stop(priv->ale);
602 for_each_slave(priv, cpsw_slave_stop, priv);
603 pm_runtime_put_sync(&priv->pdev->dev);
604 return 0;
605 }
606
607 static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
608 struct net_device *ndev)
609 {
610 struct cpsw_priv *priv = netdev_priv(ndev);
611 int ret;
612
613 ndev->trans_start = jiffies;
614
615 if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) {
616 cpsw_err(priv, tx_err, "packet pad failed\n");
617 priv->stats.tx_dropped++;
618 return NETDEV_TX_OK;
619 }
620
621 ret = cpdma_chan_submit(priv->txch, skb, skb->data,
622 skb->len, GFP_KERNEL);
623 if (unlikely(ret != 0)) {
624 cpsw_err(priv, tx_err, "desc submit failed\n");
625 goto fail;
626 }
627
628 return NETDEV_TX_OK;
629 fail:
630 priv->stats.tx_dropped++;
631 netif_stop_queue(ndev);
632 return NETDEV_TX_BUSY;
633 }
634
635 static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags)
636 {
637 /*
638 * The switch cannot operate in promiscuous mode without substantial
639 * headache. For promiscuous mode to work, we would need to put the
640 * ALE in bypass mode and route all traffic to the host port.
641 * Subsequently, the host will need to operate as a "bridge", learn,
642 * and flood as needed. For now, we simply complain here and
643 * do nothing about it :-)
644 */
645 if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC))
646 dev_err(&ndev->dev, "promiscuity ignored!\n");
647
648 /*
649 * The switch cannot filter multicast traffic unless it is configured
650 * in "VLAN Aware" mode. Unfortunately, VLAN awareness requires a
651 * whole bunch of additional logic that this driver does not implement
652 * at present.
653 */
654 if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI))
655 dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n");
656 }
657
658 static void cpsw_ndo_tx_timeout(struct net_device *ndev)
659 {
660 struct cpsw_priv *priv = netdev_priv(ndev);
661
662 cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n");
663 priv->stats.tx_errors++;
664 cpsw_intr_disable(priv);
665 cpdma_ctlr_int_ctrl(priv->dma, false);
666 cpdma_chan_stop(priv->txch);
667 cpdma_chan_start(priv->txch);
668 cpdma_ctlr_int_ctrl(priv->dma, true);
669 cpsw_intr_enable(priv);
670 cpdma_ctlr_eoi(priv->dma);
671 }
672
673 static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev)
674 {
675 struct cpsw_priv *priv = netdev_priv(ndev);
676 return &priv->stats;
677 }
678
679 #ifdef CONFIG_NET_POLL_CONTROLLER
680 static void cpsw_ndo_poll_controller(struct net_device *ndev)
681 {
682 struct cpsw_priv *priv = netdev_priv(ndev);
683
684 cpsw_intr_disable(priv);
685 cpdma_ctlr_int_ctrl(priv->dma, false);
686 cpsw_interrupt(ndev->irq, priv);
687 cpdma_ctlr_int_ctrl(priv->dma, true);
688 cpsw_intr_enable(priv);
689 cpdma_ctlr_eoi(priv->dma);
690 }
691 #endif
692
693 static const struct net_device_ops cpsw_netdev_ops = {
694 .ndo_open = cpsw_ndo_open,
695 .ndo_stop = cpsw_ndo_stop,
696 .ndo_start_xmit = cpsw_ndo_start_xmit,
697 .ndo_change_rx_flags = cpsw_ndo_change_rx_flags,
698 .ndo_validate_addr = eth_validate_addr,
699 .ndo_change_mtu = eth_change_mtu,
700 .ndo_tx_timeout = cpsw_ndo_tx_timeout,
701 .ndo_get_stats = cpsw_ndo_get_stats,
702 .ndo_set_rx_mode = cpsw_ndo_set_rx_mode,
703 #ifdef CONFIG_NET_POLL_CONTROLLER
704 .ndo_poll_controller = cpsw_ndo_poll_controller,
705 #endif
706 };
707
708 static void cpsw_get_drvinfo(struct net_device *ndev,
709 struct ethtool_drvinfo *info)
710 {
711 struct cpsw_priv *priv = netdev_priv(ndev);
712 strcpy(info->driver, "TI CPSW Driver v1.0");
713 strcpy(info->version, "1.0");
714 strcpy(info->bus_info, priv->pdev->name);
715 }
716
717 static u32 cpsw_get_msglevel(struct net_device *ndev)
718 {
719 struct cpsw_priv *priv = netdev_priv(ndev);
720 return priv->msg_enable;
721 }
722
723 static void cpsw_set_msglevel(struct net_device *ndev, u32 value)
724 {
725 struct cpsw_priv *priv = netdev_priv(ndev);
726 priv->msg_enable = value;
727 }
728
729 static const struct ethtool_ops cpsw_ethtool_ops = {
730 .get_drvinfo = cpsw_get_drvinfo,
731 .get_msglevel = cpsw_get_msglevel,
732 .set_msglevel = cpsw_set_msglevel,
733 .get_link = ethtool_op_get_link,
734 };
735
736 static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
737 {
738 void __iomem *regs = priv->regs;
739 int slave_num = slave->slave_num;
740 struct cpsw_slave_data *data = priv->data.slave_data + slave_num;
741
742 slave->data = data;
743 slave->regs = regs + data->slave_reg_ofs;
744 slave->sliver = regs + data->sliver_reg_ofs;
745 }
746
747 static int cpsw_probe_dt(struct cpsw_platform_data *data,
748 struct platform_device *pdev)
749 {
750 struct device_node *node = pdev->dev.of_node;
751 struct device_node *slave_node;
752 int i = 0, ret;
753 u32 prop;
754
755 if (!node)
756 return -EINVAL;
757
758 if (of_property_read_u32(node, "slaves", &prop)) {
759 pr_err("Missing slaves property in the DT.\n");
760 return -EINVAL;
761 }
762 data->slaves = prop;
763
764 data->slave_data = kzalloc(sizeof(struct cpsw_slave_data) *
765 data->slaves, GFP_KERNEL);
766 if (!data->slave_data) {
767 pr_err("Could not allocate slave memory.\n");
768 return -EINVAL;
769 }
770
771 data->no_bd_ram = of_property_read_bool(node, "no_bd_ram");
772
773 if (of_property_read_u32(node, "cpdma_channels", &prop)) {
774 pr_err("Missing cpdma_channels property in the DT.\n");
775 ret = -EINVAL;
776 goto error_ret;
777 }
778 data->channels = prop;
779
780 if (of_property_read_u32(node, "host_port_no", &prop)) {
781 pr_err("Missing host_port_no property in the DT.\n");
782 ret = -EINVAL;
783 goto error_ret;
784 }
785 data->host_port_num = prop;
786
787 if (of_property_read_u32(node, "cpdma_reg_ofs", &prop)) {
788 pr_err("Missing cpdma_reg_ofs property in the DT.\n");
789 ret = -EINVAL;
790 goto error_ret;
791 }
792 data->cpdma_reg_ofs = prop;
793
794 if (of_property_read_u32(node, "cpdma_sram_ofs", &prop)) {
795 pr_err("Missing cpdma_sram_ofs property in the DT.\n");
796 ret = -EINVAL;
797 goto error_ret;
798 }
799 data->cpdma_sram_ofs = prop;
800
801 if (of_property_read_u32(node, "ale_reg_ofs", &prop)) {
802 pr_err("Missing ale_reg_ofs property in the DT.\n");
803 ret = -EINVAL;
804 goto error_ret;
805 }
806 data->ale_reg_ofs = prop;
807
808 if (of_property_read_u32(node, "ale_entries", &prop)) {
809 pr_err("Missing ale_entries property in the DT.\n");
810 ret = -EINVAL;
811 goto error_ret;
812 }
813 data->ale_entries = prop;
814
815 if (of_property_read_u32(node, "host_port_reg_ofs", &prop)) {
816 pr_err("Missing host_port_reg_ofs property in the DT.\n");
817 ret = -EINVAL;
818 goto error_ret;
819 }
820 data->host_port_reg_ofs = prop;
821
822 if (of_property_read_u32(node, "hw_stats_reg_ofs", &prop)) {
823 pr_err("Missing hw_stats_reg_ofs property in the DT.\n");
824 ret = -EINVAL;
825 goto error_ret;
826 }
827 data->hw_stats_reg_ofs = prop;
828
829 if (of_property_read_u32(node, "bd_ram_ofs", &prop)) {
830 pr_err("Missing bd_ram_ofs property in the DT.\n");
831 ret = -EINVAL;
832 goto error_ret;
833 }
834 data->bd_ram_ofs = prop;
835
836 if (of_property_read_u32(node, "bd_ram_size", &prop)) {
837 pr_err("Missing bd_ram_size property in the DT.\n");
838 ret = -EINVAL;
839 goto error_ret;
840 }
841 data->bd_ram_size = prop;
842
843 if (of_property_read_u32(node, "rx_descs", &prop)) {
844 pr_err("Missing rx_descs property in the DT.\n");
845 ret = -EINVAL;
846 goto error_ret;
847 }
848 data->rx_descs = prop;
849
850 if (of_property_read_u32(node, "mac_control", &prop)) {
851 pr_err("Missing mac_control property in the DT.\n");
852 ret = -EINVAL;
853 goto error_ret;
854 }
855 data->mac_control = prop;
856
857 for_each_child_of_node(node, slave_node) {
858 struct cpsw_slave_data *slave_data = data->slave_data + i;
859 const char *phy_id = NULL;
860 const void *mac_addr = NULL;
861
862 if (of_property_read_string(slave_node, "phy_id", &phy_id)) {
863 pr_err("Missing slave[%d] phy_id property\n", i);
864 ret = -EINVAL;
865 goto error_ret;
866 }
867 slave_data->phy_id = phy_id;
868
869 if (of_property_read_u32(slave_node, "slave_reg_ofs", &prop)) {
870 pr_err("Missing slave[%d] slave_reg_ofs property\n", i);
871 ret = -EINVAL;
872 goto error_ret;
873 }
874 slave_data->slave_reg_ofs = prop;
875
876 if (of_property_read_u32(slave_node, "sliver_reg_ofs",
877 &prop)) {
878 pr_err("Missing slave[%d] sliver_reg_ofs property\n",
879 i);
880 ret = -EINVAL;
881 goto error_ret;
882 }
883 slave_data->sliver_reg_ofs = prop;
884
885 mac_addr = of_get_mac_address(slave_node);
886 if (mac_addr)
887 memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN);
888
889 i++;
890 }
891
892 return 0;
893
894 error_ret:
895 kfree(data->slave_data);
896 return ret;
897 }
898
899 static int __devinit cpsw_probe(struct platform_device *pdev)
900 {
901 struct cpsw_platform_data *data = pdev->dev.platform_data;
902 struct net_device *ndev;
903 struct cpsw_priv *priv;
904 struct cpdma_params dma_params;
905 struct cpsw_ale_params ale_params;
906 void __iomem *regs;
907 struct resource *res;
908 int ret = 0, i, k = 0;
909
910 ndev = alloc_etherdev(sizeof(struct cpsw_priv));
911 if (!ndev) {
912 pr_err("error allocating net_device\n");
913 return -ENOMEM;
914 }
915
916 platform_set_drvdata(pdev, ndev);
917 priv = netdev_priv(ndev);
918 spin_lock_init(&priv->lock);
919 priv->pdev = pdev;
920 priv->ndev = ndev;
921 priv->dev = &ndev->dev;
922 priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
923 priv->rx_packet_max = max(rx_packet_max, 128);
924
925 if (cpsw_probe_dt(&priv->data, pdev)) {
926 pr_err("cpsw: platform data missing\n");
927 ret = -ENODEV;
928 goto clean_ndev_ret;
929 }
930 data = &priv->data;
931
932 if (is_valid_ether_addr(data->slave_data[0].mac_addr)) {
933 memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN);
934 pr_info("Detected MACID = %pM", priv->mac_addr);
935 } else {
936 eth_random_addr(priv->mac_addr);
937 pr_info("Random MACID = %pM", priv->mac_addr);
938 }
939
940 memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
941
942 priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves,
943 GFP_KERNEL);
944 if (!priv->slaves) {
945 ret = -EBUSY;
946 goto clean_ndev_ret;
947 }
948 for (i = 0; i < data->slaves; i++)
949 priv->slaves[i].slave_num = i;
950
951 pm_runtime_enable(&pdev->dev);
952 priv->clk = clk_get(&pdev->dev, "fck");
953 if (IS_ERR(priv->clk)) {
954 dev_err(&pdev->dev, "fck is not found\n");
955 ret = -ENODEV;
956 goto clean_slave_ret;
957 }
958
959 priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
960 if (!priv->cpsw_res) {
961 dev_err(priv->dev, "error getting i/o resource\n");
962 ret = -ENOENT;
963 goto clean_clk_ret;
964 }
965
966 if (!request_mem_region(priv->cpsw_res->start,
967 resource_size(priv->cpsw_res), ndev->name)) {
968 dev_err(priv->dev, "failed request i/o region\n");
969 ret = -ENXIO;
970 goto clean_clk_ret;
971 }
972
973 regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res));
974 if (!regs) {
975 dev_err(priv->dev, "unable to map i/o region\n");
976 goto clean_cpsw_iores_ret;
977 }
978 priv->regs = regs;
979 priv->host_port = data->host_port_num;
980 priv->host_port_regs = regs + data->host_port_reg_ofs;
981
982 priv->cpsw_ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
983 if (!priv->cpsw_ss_res) {
984 dev_err(priv->dev, "error getting i/o resource\n");
985 ret = -ENOENT;
986 goto clean_clk_ret;
987 }
988
989 if (!request_mem_region(priv->cpsw_ss_res->start,
990 resource_size(priv->cpsw_ss_res), ndev->name)) {
991 dev_err(priv->dev, "failed request i/o region\n");
992 ret = -ENXIO;
993 goto clean_clk_ret;
994 }
995
996 regs = ioremap(priv->cpsw_ss_res->start,
997 resource_size(priv->cpsw_ss_res));
998 if (!regs) {
999 dev_err(priv->dev, "unable to map i/o region\n");
1000 goto clean_cpsw_ss_iores_ret;
1001 }
1002 priv->wr_regs = regs;
1003
1004 for_each_slave(priv, cpsw_slave_init, priv);
1005
1006 memset(&dma_params, 0, sizeof(dma_params));
1007 dma_params.dev = &pdev->dev;
1008 dma_params.dmaregs = cpsw_dma_regs((u32)priv->regs,
1009 data->cpdma_reg_ofs);
1010 dma_params.rxthresh = cpsw_dma_rxthresh((u32)priv->regs,
1011 data->cpdma_reg_ofs);
1012 dma_params.rxfree = cpsw_dma_rxfree((u32)priv->regs,
1013 data->cpdma_reg_ofs);
1014 dma_params.txhdp = cpsw_dma_txhdp((u32)priv->regs,
1015 data->cpdma_sram_ofs);
1016 dma_params.rxhdp = cpsw_dma_rxhdp((u32)priv->regs,
1017 data->cpdma_sram_ofs);
1018 dma_params.txcp = cpsw_dma_txcp((u32)priv->regs,
1019 data->cpdma_sram_ofs);
1020 dma_params.rxcp = cpsw_dma_rxcp((u32)priv->regs,
1021 data->cpdma_sram_ofs);
1022
1023 dma_params.num_chan = data->channels;
1024 dma_params.has_soft_reset = true;
1025 dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE;
1026 dma_params.desc_mem_size = data->bd_ram_size;
1027 dma_params.desc_align = 16;
1028 dma_params.has_ext_regs = true;
1029 dma_params.desc_mem_phys = data->no_bd_ram ? 0 :
1030 (u32 __force)priv->cpsw_res->start + data->bd_ram_ofs;
1031 dma_params.desc_hw_addr = data->hw_ram_addr ?
1032 data->hw_ram_addr : dma_params.desc_mem_phys ;
1033
1034 priv->dma = cpdma_ctlr_create(&dma_params);
1035 if (!priv->dma) {
1036 dev_err(priv->dev, "error initializing dma\n");
1037 ret = -ENOMEM;
1038 goto clean_iomap_ret;
1039 }
1040
1041 priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0),
1042 cpsw_tx_handler);
1043 priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0),
1044 cpsw_rx_handler);
1045
1046 if (WARN_ON(!priv->txch || !priv->rxch)) {
1047 dev_err(priv->dev, "error initializing dma channels\n");
1048 ret = -ENOMEM;
1049 goto clean_dma_ret;
1050 }
1051
1052 memset(&ale_params, 0, sizeof(ale_params));
1053 ale_params.dev = &ndev->dev;
1054 ale_params.ale_regs = (void *)((u32)priv->regs) +
1055 ((u32)data->ale_reg_ofs);
1056 ale_params.ale_ageout = ale_ageout;
1057 ale_params.ale_entries = data->ale_entries;
1058 ale_params.ale_ports = data->slaves;
1059
1060 priv->ale = cpsw_ale_create(&ale_params);
1061 if (!priv->ale) {
1062 dev_err(priv->dev, "error initializing ale engine\n");
1063 ret = -ENODEV;
1064 goto clean_dma_ret;
1065 }
1066
1067 ndev->irq = platform_get_irq(pdev, 0);
1068 if (ndev->irq < 0) {
1069 dev_err(priv->dev, "error getting irq resource\n");
1070 ret = -ENOENT;
1071 goto clean_ale_ret;
1072 }
1073
1074 while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) {
1075 for (i = res->start; i <= res->end; i++) {
1076 if (request_irq(i, cpsw_interrupt, IRQF_DISABLED,
1077 dev_name(&pdev->dev), priv)) {
1078 dev_err(priv->dev, "error attaching irq\n");
1079 goto clean_ale_ret;
1080 }
1081 priv->irqs_table[k] = i;
1082 priv->num_irqs = k;
1083 }
1084 k++;
1085 }
1086
1087 ndev->flags |= IFF_ALLMULTI; /* see cpsw_ndo_change_rx_flags() */
1088
1089 ndev->netdev_ops = &cpsw_netdev_ops;
1090 SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops);
1091 netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT);
1092
1093 /* register the network device */
1094 SET_NETDEV_DEV(ndev, &pdev->dev);
1095 ret = register_netdev(ndev);
1096 if (ret) {
1097 dev_err(priv->dev, "error registering net device\n");
1098 ret = -ENODEV;
1099 goto clean_irq_ret;
1100 }
1101
1102 cpsw_notice(priv, probe, "initialized device (regs %x, irq %d)\n",
1103 priv->cpsw_res->start, ndev->irq);
1104
1105 return 0;
1106
1107 clean_irq_ret:
1108 free_irq(ndev->irq, priv);
1109 clean_ale_ret:
1110 cpsw_ale_destroy(priv->ale);
1111 clean_dma_ret:
1112 cpdma_chan_destroy(priv->txch);
1113 cpdma_chan_destroy(priv->rxch);
1114 cpdma_ctlr_destroy(priv->dma);
1115 clean_iomap_ret:
1116 iounmap(priv->regs);
1117 clean_cpsw_ss_iores_ret:
1118 release_mem_region(priv->cpsw_ss_res->start,
1119 resource_size(priv->cpsw_ss_res));
1120 clean_cpsw_iores_ret:
1121 release_mem_region(priv->cpsw_res->start,
1122 resource_size(priv->cpsw_res));
1123 clean_clk_ret:
1124 clk_put(priv->clk);
1125 clean_slave_ret:
1126 pm_runtime_disable(&pdev->dev);
1127 kfree(priv->slaves);
1128 clean_ndev_ret:
1129 free_netdev(ndev);
1130 return ret;
1131 }
1132
1133 static int __devexit cpsw_remove(struct platform_device *pdev)
1134 {
1135 struct net_device *ndev = platform_get_drvdata(pdev);
1136 struct cpsw_priv *priv = netdev_priv(ndev);
1137
1138 pr_info("removing device");
1139 platform_set_drvdata(pdev, NULL);
1140
1141 free_irq(ndev->irq, priv);
1142 cpsw_ale_destroy(priv->ale);
1143 cpdma_chan_destroy(priv->txch);
1144 cpdma_chan_destroy(priv->rxch);
1145 cpdma_ctlr_destroy(priv->dma);
1146 iounmap(priv->regs);
1147 release_mem_region(priv->cpsw_res->start,
1148 resource_size(priv->cpsw_res));
1149 release_mem_region(priv->cpsw_ss_res->start,
1150 resource_size(priv->cpsw_ss_res));
1151 pm_runtime_disable(&pdev->dev);
1152 clk_put(priv->clk);
1153 kfree(priv->slaves);
1154 free_netdev(ndev);
1155
1156 return 0;
1157 }
1158
1159 static int cpsw_suspend(struct device *dev)
1160 {
1161 struct platform_device *pdev = to_platform_device(dev);
1162 struct net_device *ndev = platform_get_drvdata(pdev);
1163
1164 if (netif_running(ndev))
1165 cpsw_ndo_stop(ndev);
1166 pm_runtime_put_sync(&pdev->dev);
1167
1168 return 0;
1169 }
1170
1171 static int cpsw_resume(struct device *dev)
1172 {
1173 struct platform_device *pdev = to_platform_device(dev);
1174 struct net_device *ndev = platform_get_drvdata(pdev);
1175
1176 pm_runtime_get_sync(&pdev->dev);
1177 if (netif_running(ndev))
1178 cpsw_ndo_open(ndev);
1179 return 0;
1180 }
1181
1182 static const struct dev_pm_ops cpsw_pm_ops = {
1183 .suspend = cpsw_suspend,
1184 .resume = cpsw_resume,
1185 };
1186
1187 static const struct of_device_id cpsw_of_mtable[] = {
1188 { .compatible = "ti,cpsw", },
1189 { /* sentinel */ },
1190 };
1191
1192 static struct platform_driver cpsw_driver = {
1193 .driver = {
1194 .name = "cpsw",
1195 .owner = THIS_MODULE,
1196 .pm = &cpsw_pm_ops,
1197 .of_match_table = of_match_ptr(cpsw_of_mtable),
1198 },
1199 .probe = cpsw_probe,
1200 .remove = __devexit_p(cpsw_remove),
1201 };
1202
1203 static int __init cpsw_init(void)
1204 {
1205 return platform_driver_register(&cpsw_driver);
1206 }
1207 late_initcall(cpsw_init);
1208
1209 static void __exit cpsw_exit(void)
1210 {
1211 platform_driver_unregister(&cpsw_driver);
1212 }
1213 module_exit(cpsw_exit);
1214
1215 MODULE_LICENSE("GPL");
1216 MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>");
1217 MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
1218 MODULE_DESCRIPTION("TI CPSW Ethernet driver");
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