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cpsw: remember the silicon version
[deliverable/linux.git] / drivers / net / ethernet / ti / cpsw.c
1 /*
2 * Texas Instruments Ethernet Switch Driver
3 *
4 * Copyright (C) 2012 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/io.h>
18 #include <linux/clk.h>
19 #include <linux/timer.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/irqreturn.h>
23 #include <linux/interrupt.h>
24 #include <linux/if_ether.h>
25 #include <linux/etherdevice.h>
26 #include <linux/netdevice.h>
27 #include <linux/phy.h>
28 #include <linux/workqueue.h>
29 #include <linux/delay.h>
30 #include <linux/pm_runtime.h>
31 #include <linux/of.h>
32 #include <linux/of_net.h>
33 #include <linux/of_device.h>
34
35 #include <linux/platform_data/cpsw.h>
36
37 #include "cpsw_ale.h"
38 #include "davinci_cpdma.h"
39
40 #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \
41 NETIF_MSG_DRV | NETIF_MSG_LINK | \
42 NETIF_MSG_IFUP | NETIF_MSG_INTR | \
43 NETIF_MSG_PROBE | NETIF_MSG_TIMER | \
44 NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \
45 NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \
46 NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \
47 NETIF_MSG_RX_STATUS)
48
49 #define cpsw_info(priv, type, format, ...) \
50 do { \
51 if (netif_msg_##type(priv) && net_ratelimit()) \
52 dev_info(priv->dev, format, ## __VA_ARGS__); \
53 } while (0)
54
55 #define cpsw_err(priv, type, format, ...) \
56 do { \
57 if (netif_msg_##type(priv) && net_ratelimit()) \
58 dev_err(priv->dev, format, ## __VA_ARGS__); \
59 } while (0)
60
61 #define cpsw_dbg(priv, type, format, ...) \
62 do { \
63 if (netif_msg_##type(priv) && net_ratelimit()) \
64 dev_dbg(priv->dev, format, ## __VA_ARGS__); \
65 } while (0)
66
67 #define cpsw_notice(priv, type, format, ...) \
68 do { \
69 if (netif_msg_##type(priv) && net_ratelimit()) \
70 dev_notice(priv->dev, format, ## __VA_ARGS__); \
71 } while (0)
72
73 #define ALE_ALL_PORTS 0x7
74
75 #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7)
76 #define CPSW_MINOR_VERSION(reg) (reg & 0xff)
77 #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f)
78
79 #define CPSW_VERSION_1 0x19010a
80 #define CPSW_VERSION_2 0x19010c
81 #define CPDMA_RXTHRESH 0x0c0
82 #define CPDMA_RXFREE 0x0e0
83 #define CPDMA_TXHDP 0x00
84 #define CPDMA_RXHDP 0x20
85 #define CPDMA_TXCP 0x40
86 #define CPDMA_RXCP 0x60
87
88 #define cpsw_dma_regs(base, offset) \
89 (void __iomem *)((base) + (offset))
90 #define cpsw_dma_rxthresh(base, offset) \
91 (void __iomem *)((base) + (offset) + CPDMA_RXTHRESH)
92 #define cpsw_dma_rxfree(base, offset) \
93 (void __iomem *)((base) + (offset) + CPDMA_RXFREE)
94 #define cpsw_dma_txhdp(base, offset) \
95 (void __iomem *)((base) + (offset) + CPDMA_TXHDP)
96 #define cpsw_dma_rxhdp(base, offset) \
97 (void __iomem *)((base) + (offset) + CPDMA_RXHDP)
98 #define cpsw_dma_txcp(base, offset) \
99 (void __iomem *)((base) + (offset) + CPDMA_TXCP)
100 #define cpsw_dma_rxcp(base, offset) \
101 (void __iomem *)((base) + (offset) + CPDMA_RXCP)
102
103 #define CPSW_POLL_WEIGHT 64
104 #define CPSW_MIN_PACKET_SIZE 60
105 #define CPSW_MAX_PACKET_SIZE (1500 + 14 + 4 + 4)
106
107 #define RX_PRIORITY_MAPPING 0x76543210
108 #define TX_PRIORITY_MAPPING 0x33221100
109 #define CPDMA_TX_PRIORITY_MAP 0x76543210
110
111 #define cpsw_enable_irq(priv) \
112 do { \
113 u32 i; \
114 for (i = 0; i < priv->num_irqs; i++) \
115 enable_irq(priv->irqs_table[i]); \
116 } while (0);
117 #define cpsw_disable_irq(priv) \
118 do { \
119 u32 i; \
120 for (i = 0; i < priv->num_irqs; i++) \
121 disable_irq_nosync(priv->irqs_table[i]); \
122 } while (0);
123
124 static int debug_level;
125 module_param(debug_level, int, 0);
126 MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
127
128 static int ale_ageout = 10;
129 module_param(ale_ageout, int, 0);
130 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
131
132 static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
133 module_param(rx_packet_max, int, 0);
134 MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
135
136 struct cpsw_wr_regs {
137 u32 id_ver;
138 u32 soft_reset;
139 u32 control;
140 u32 int_control;
141 u32 rx_thresh_en;
142 u32 rx_en;
143 u32 tx_en;
144 u32 misc_en;
145 };
146
147 struct cpsw_ss_regs {
148 u32 id_ver;
149 u32 control;
150 u32 soft_reset;
151 u32 stat_port_en;
152 u32 ptype;
153 u32 soft_idle;
154 u32 thru_rate;
155 u32 gap_thresh;
156 u32 tx_start_wds;
157 u32 flow_control;
158 u32 vlan_ltype;
159 u32 ts_ltype;
160 u32 dlr_ltype;
161 };
162
163 struct cpsw_slave_regs {
164 u32 max_blks;
165 u32 blk_cnt;
166 u32 flow_thresh;
167 u32 port_vlan;
168 u32 tx_pri_map;
169 u32 ts_ctl;
170 u32 ts_seq_ltype;
171 u32 ts_vlan;
172 u32 sa_lo;
173 u32 sa_hi;
174 };
175
176 struct cpsw_host_regs {
177 u32 max_blks;
178 u32 blk_cnt;
179 u32 flow_thresh;
180 u32 port_vlan;
181 u32 tx_pri_map;
182 u32 cpdma_tx_pri_map;
183 u32 cpdma_rx_chan_map;
184 };
185
186 struct cpsw_sliver_regs {
187 u32 id_ver;
188 u32 mac_control;
189 u32 mac_status;
190 u32 soft_reset;
191 u32 rx_maxlen;
192 u32 __reserved_0;
193 u32 rx_pause;
194 u32 tx_pause;
195 u32 __reserved_1;
196 u32 rx_pri_map;
197 };
198
199 struct cpsw_slave {
200 struct cpsw_slave_regs __iomem *regs;
201 struct cpsw_sliver_regs __iomem *sliver;
202 int slave_num;
203 u32 mac_control;
204 struct cpsw_slave_data *data;
205 struct phy_device *phy;
206 };
207
208 struct cpsw_priv {
209 spinlock_t lock;
210 struct platform_device *pdev;
211 struct net_device *ndev;
212 struct resource *cpsw_res;
213 struct resource *cpsw_ss_res;
214 struct napi_struct napi;
215 struct device *dev;
216 struct cpsw_platform_data data;
217 struct cpsw_ss_regs __iomem *regs;
218 struct cpsw_wr_regs __iomem *wr_regs;
219 struct cpsw_host_regs __iomem *host_port_regs;
220 u32 msg_enable;
221 u32 version;
222 struct net_device_stats stats;
223 int rx_packet_max;
224 int host_port;
225 struct clk *clk;
226 u8 mac_addr[ETH_ALEN];
227 struct cpsw_slave *slaves;
228 struct cpdma_ctlr *dma;
229 struct cpdma_chan *txch, *rxch;
230 struct cpsw_ale *ale;
231 /* snapshot of IRQ numbers */
232 u32 irqs_table[4];
233 u32 num_irqs;
234 };
235
236 #define napi_to_priv(napi) container_of(napi, struct cpsw_priv, napi)
237 #define for_each_slave(priv, func, arg...) \
238 do { \
239 int idx; \
240 for (idx = 0; idx < (priv)->data.slaves; idx++) \
241 (func)((priv)->slaves + idx, ##arg); \
242 } while (0)
243
244 static void cpsw_ndo_set_rx_mode(struct net_device *ndev)
245 {
246 struct cpsw_priv *priv = netdev_priv(ndev);
247
248 if (ndev->flags & IFF_PROMISC) {
249 /* Enable promiscuous mode */
250 dev_err(priv->dev, "Ignoring Promiscuous mode\n");
251 return;
252 }
253
254 /* Clear all mcast from ALE */
255 cpsw_ale_flush_multicast(priv->ale, ALE_ALL_PORTS << priv->host_port);
256
257 if (!netdev_mc_empty(ndev)) {
258 struct netdev_hw_addr *ha;
259
260 /* program multicast address list into ALE register */
261 netdev_for_each_mc_addr(ha, ndev) {
262 cpsw_ale_add_mcast(priv->ale, (u8 *)ha->addr,
263 ALE_ALL_PORTS << priv->host_port, 0, 0);
264 }
265 }
266 }
267
268 static void cpsw_intr_enable(struct cpsw_priv *priv)
269 {
270 __raw_writel(0xFF, &priv->wr_regs->tx_en);
271 __raw_writel(0xFF, &priv->wr_regs->rx_en);
272
273 cpdma_ctlr_int_ctrl(priv->dma, true);
274 return;
275 }
276
277 static void cpsw_intr_disable(struct cpsw_priv *priv)
278 {
279 __raw_writel(0, &priv->wr_regs->tx_en);
280 __raw_writel(0, &priv->wr_regs->rx_en);
281
282 cpdma_ctlr_int_ctrl(priv->dma, false);
283 return;
284 }
285
286 void cpsw_tx_handler(void *token, int len, int status)
287 {
288 struct sk_buff *skb = token;
289 struct net_device *ndev = skb->dev;
290 struct cpsw_priv *priv = netdev_priv(ndev);
291
292 if (unlikely(netif_queue_stopped(ndev)))
293 netif_start_queue(ndev);
294 priv->stats.tx_packets++;
295 priv->stats.tx_bytes += len;
296 dev_kfree_skb_any(skb);
297 }
298
299 void cpsw_rx_handler(void *token, int len, int status)
300 {
301 struct sk_buff *skb = token;
302 struct net_device *ndev = skb->dev;
303 struct cpsw_priv *priv = netdev_priv(ndev);
304 int ret = 0;
305
306 /* free and bail if we are shutting down */
307 if (unlikely(!netif_running(ndev)) ||
308 unlikely(!netif_carrier_ok(ndev))) {
309 dev_kfree_skb_any(skb);
310 return;
311 }
312 if (likely(status >= 0)) {
313 skb_put(skb, len);
314 skb->protocol = eth_type_trans(skb, ndev);
315 netif_receive_skb(skb);
316 priv->stats.rx_bytes += len;
317 priv->stats.rx_packets++;
318 skb = NULL;
319 }
320
321 if (unlikely(!netif_running(ndev))) {
322 if (skb)
323 dev_kfree_skb_any(skb);
324 return;
325 }
326
327 if (likely(!skb)) {
328 skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max);
329 if (WARN_ON(!skb))
330 return;
331
332 ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
333 skb_tailroom(skb), GFP_KERNEL);
334 }
335 WARN_ON(ret < 0);
336 }
337
338 static irqreturn_t cpsw_interrupt(int irq, void *dev_id)
339 {
340 struct cpsw_priv *priv = dev_id;
341
342 if (likely(netif_running(priv->ndev))) {
343 cpsw_intr_disable(priv);
344 cpsw_disable_irq(priv);
345 napi_schedule(&priv->napi);
346 }
347 return IRQ_HANDLED;
348 }
349
350 static inline int cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)
351 {
352 if (priv->host_port == 0)
353 return slave_num + 1;
354 else
355 return slave_num;
356 }
357
358 static int cpsw_poll(struct napi_struct *napi, int budget)
359 {
360 struct cpsw_priv *priv = napi_to_priv(napi);
361 int num_tx, num_rx;
362
363 num_tx = cpdma_chan_process(priv->txch, 128);
364 num_rx = cpdma_chan_process(priv->rxch, budget);
365
366 if (num_rx || num_tx)
367 cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n",
368 num_rx, num_tx);
369
370 if (num_rx < budget) {
371 napi_complete(napi);
372 cpsw_intr_enable(priv);
373 cpdma_ctlr_eoi(priv->dma);
374 cpsw_enable_irq(priv);
375 }
376
377 return num_rx;
378 }
379
380 static inline void soft_reset(const char *module, void __iomem *reg)
381 {
382 unsigned long timeout = jiffies + HZ;
383
384 __raw_writel(1, reg);
385 do {
386 cpu_relax();
387 } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies));
388
389 WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module);
390 }
391
392 #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \
393 ((mac)[2] << 16) | ((mac)[3] << 24))
394 #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8))
395
396 static void cpsw_set_slave_mac(struct cpsw_slave *slave,
397 struct cpsw_priv *priv)
398 {
399 __raw_writel(mac_hi(priv->mac_addr), &slave->regs->sa_hi);
400 __raw_writel(mac_lo(priv->mac_addr), &slave->regs->sa_lo);
401 }
402
403 static void _cpsw_adjust_link(struct cpsw_slave *slave,
404 struct cpsw_priv *priv, bool *link)
405 {
406 struct phy_device *phy = slave->phy;
407 u32 mac_control = 0;
408 u32 slave_port;
409
410 if (!phy)
411 return;
412
413 slave_port = cpsw_get_slave_port(priv, slave->slave_num);
414
415 if (phy->link) {
416 mac_control = priv->data.mac_control;
417
418 /* enable forwarding */
419 cpsw_ale_control_set(priv->ale, slave_port,
420 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
421
422 if (phy->speed == 1000)
423 mac_control |= BIT(7); /* GIGABITEN */
424 if (phy->duplex)
425 mac_control |= BIT(0); /* FULLDUPLEXEN */
426
427 /* set speed_in input in case RMII mode is used in 100Mbps */
428 if (phy->speed == 100)
429 mac_control |= BIT(15);
430
431 *link = true;
432 } else {
433 mac_control = 0;
434 /* disable forwarding */
435 cpsw_ale_control_set(priv->ale, slave_port,
436 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
437 }
438
439 if (mac_control != slave->mac_control) {
440 phy_print_status(phy);
441 __raw_writel(mac_control, &slave->sliver->mac_control);
442 }
443
444 slave->mac_control = mac_control;
445 }
446
447 static void cpsw_adjust_link(struct net_device *ndev)
448 {
449 struct cpsw_priv *priv = netdev_priv(ndev);
450 bool link = false;
451
452 for_each_slave(priv, _cpsw_adjust_link, priv, &link);
453
454 if (link) {
455 netif_carrier_on(ndev);
456 if (netif_running(ndev))
457 netif_wake_queue(ndev);
458 } else {
459 netif_carrier_off(ndev);
460 netif_stop_queue(ndev);
461 }
462 }
463
464 static inline int __show_stat(char *buf, int maxlen, const char *name, u32 val)
465 {
466 static char *leader = "........................................";
467
468 if (!val)
469 return 0;
470 else
471 return snprintf(buf, maxlen, "%s %s %10d\n", name,
472 leader + strlen(name), val);
473 }
474
475 static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
476 {
477 char name[32];
478 u32 slave_port;
479
480 sprintf(name, "slave-%d", slave->slave_num);
481
482 soft_reset(name, &slave->sliver->soft_reset);
483
484 /* setup priority mapping */
485 __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map);
486 __raw_writel(TX_PRIORITY_MAPPING, &slave->regs->tx_pri_map);
487
488 /* setup max packet size, and mac address */
489 __raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen);
490 cpsw_set_slave_mac(slave, priv);
491
492 slave->mac_control = 0; /* no link yet */
493
494 slave_port = cpsw_get_slave_port(priv, slave->slave_num);
495
496 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
497 1 << slave_port, 0, ALE_MCAST_FWD_2);
498
499 slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
500 &cpsw_adjust_link, 0, slave->data->phy_if);
501 if (IS_ERR(slave->phy)) {
502 dev_err(priv->dev, "phy %s not found on slave %d\n",
503 slave->data->phy_id, slave->slave_num);
504 slave->phy = NULL;
505 } else {
506 dev_info(priv->dev, "phy found : id is : 0x%x\n",
507 slave->phy->phy_id);
508 phy_start(slave->phy);
509 }
510 }
511
512 static void cpsw_init_host_port(struct cpsw_priv *priv)
513 {
514 /* soft reset the controller and initialize ale */
515 soft_reset("cpsw", &priv->regs->soft_reset);
516 cpsw_ale_start(priv->ale);
517
518 /* switch to vlan unaware mode */
519 cpsw_ale_control_set(priv->ale, 0, ALE_VLAN_AWARE, 0);
520
521 /* setup host port priority mapping */
522 __raw_writel(CPDMA_TX_PRIORITY_MAP,
523 &priv->host_port_regs->cpdma_tx_pri_map);
524 __raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map);
525
526 cpsw_ale_control_set(priv->ale, priv->host_port,
527 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
528
529 cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port, 0);
530 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
531 1 << priv->host_port, 0, ALE_MCAST_FWD_2);
532 }
533
534 static int cpsw_ndo_open(struct net_device *ndev)
535 {
536 struct cpsw_priv *priv = netdev_priv(ndev);
537 int i, ret;
538 u32 reg;
539
540 cpsw_intr_disable(priv);
541 netif_carrier_off(ndev);
542
543 pm_runtime_get_sync(&priv->pdev->dev);
544
545 reg = __raw_readl(&priv->regs->id_ver);
546 priv->version = reg;
547
548 dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
549 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
550 CPSW_RTL_VERSION(reg));
551
552 /* initialize host and slave ports */
553 cpsw_init_host_port(priv);
554 for_each_slave(priv, cpsw_slave_open, priv);
555
556 /* setup tx dma to fixed prio and zero offset */
557 cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1);
558 cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0);
559
560 /* disable priority elevation and enable statistics on all ports */
561 __raw_writel(0, &priv->regs->ptype);
562
563 /* enable statistics collection only on the host port */
564 __raw_writel(0x7, &priv->regs->stat_port_en);
565
566 if (WARN_ON(!priv->data.rx_descs))
567 priv->data.rx_descs = 128;
568
569 for (i = 0; i < priv->data.rx_descs; i++) {
570 struct sk_buff *skb;
571
572 ret = -ENOMEM;
573 skb = netdev_alloc_skb_ip_align(priv->ndev,
574 priv->rx_packet_max);
575 if (!skb)
576 break;
577 ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
578 skb_tailroom(skb), GFP_KERNEL);
579 if (WARN_ON(ret < 0))
580 break;
581 }
582 /* continue even if we didn't manage to submit all receive descs */
583 cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i);
584
585 cpdma_ctlr_start(priv->dma);
586 cpsw_intr_enable(priv);
587 napi_enable(&priv->napi);
588 cpdma_ctlr_eoi(priv->dma);
589
590 return 0;
591 }
592
593 static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv)
594 {
595 if (!slave->phy)
596 return;
597 phy_stop(slave->phy);
598 phy_disconnect(slave->phy);
599 slave->phy = NULL;
600 }
601
602 static int cpsw_ndo_stop(struct net_device *ndev)
603 {
604 struct cpsw_priv *priv = netdev_priv(ndev);
605
606 cpsw_info(priv, ifdown, "shutting down cpsw device\n");
607 cpsw_intr_disable(priv);
608 cpdma_ctlr_int_ctrl(priv->dma, false);
609 cpdma_ctlr_stop(priv->dma);
610 netif_stop_queue(priv->ndev);
611 napi_disable(&priv->napi);
612 netif_carrier_off(priv->ndev);
613 cpsw_ale_stop(priv->ale);
614 for_each_slave(priv, cpsw_slave_stop, priv);
615 pm_runtime_put_sync(&priv->pdev->dev);
616 return 0;
617 }
618
619 static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
620 struct net_device *ndev)
621 {
622 struct cpsw_priv *priv = netdev_priv(ndev);
623 int ret;
624
625 ndev->trans_start = jiffies;
626
627 if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) {
628 cpsw_err(priv, tx_err, "packet pad failed\n");
629 priv->stats.tx_dropped++;
630 return NETDEV_TX_OK;
631 }
632
633 ret = cpdma_chan_submit(priv->txch, skb, skb->data,
634 skb->len, GFP_KERNEL);
635 if (unlikely(ret != 0)) {
636 cpsw_err(priv, tx_err, "desc submit failed\n");
637 goto fail;
638 }
639
640 return NETDEV_TX_OK;
641 fail:
642 priv->stats.tx_dropped++;
643 netif_stop_queue(ndev);
644 return NETDEV_TX_BUSY;
645 }
646
647 static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags)
648 {
649 /*
650 * The switch cannot operate in promiscuous mode without substantial
651 * headache. For promiscuous mode to work, we would need to put the
652 * ALE in bypass mode and route all traffic to the host port.
653 * Subsequently, the host will need to operate as a "bridge", learn,
654 * and flood as needed. For now, we simply complain here and
655 * do nothing about it :-)
656 */
657 if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC))
658 dev_err(&ndev->dev, "promiscuity ignored!\n");
659
660 /*
661 * The switch cannot filter multicast traffic unless it is configured
662 * in "VLAN Aware" mode. Unfortunately, VLAN awareness requires a
663 * whole bunch of additional logic that this driver does not implement
664 * at present.
665 */
666 if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI))
667 dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n");
668 }
669
670 static void cpsw_ndo_tx_timeout(struct net_device *ndev)
671 {
672 struct cpsw_priv *priv = netdev_priv(ndev);
673
674 cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n");
675 priv->stats.tx_errors++;
676 cpsw_intr_disable(priv);
677 cpdma_ctlr_int_ctrl(priv->dma, false);
678 cpdma_chan_stop(priv->txch);
679 cpdma_chan_start(priv->txch);
680 cpdma_ctlr_int_ctrl(priv->dma, true);
681 cpsw_intr_enable(priv);
682 cpdma_ctlr_eoi(priv->dma);
683 }
684
685 static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev)
686 {
687 struct cpsw_priv *priv = netdev_priv(ndev);
688 return &priv->stats;
689 }
690
691 #ifdef CONFIG_NET_POLL_CONTROLLER
692 static void cpsw_ndo_poll_controller(struct net_device *ndev)
693 {
694 struct cpsw_priv *priv = netdev_priv(ndev);
695
696 cpsw_intr_disable(priv);
697 cpdma_ctlr_int_ctrl(priv->dma, false);
698 cpsw_interrupt(ndev->irq, priv);
699 cpdma_ctlr_int_ctrl(priv->dma, true);
700 cpsw_intr_enable(priv);
701 cpdma_ctlr_eoi(priv->dma);
702 }
703 #endif
704
705 static const struct net_device_ops cpsw_netdev_ops = {
706 .ndo_open = cpsw_ndo_open,
707 .ndo_stop = cpsw_ndo_stop,
708 .ndo_start_xmit = cpsw_ndo_start_xmit,
709 .ndo_change_rx_flags = cpsw_ndo_change_rx_flags,
710 .ndo_validate_addr = eth_validate_addr,
711 .ndo_change_mtu = eth_change_mtu,
712 .ndo_tx_timeout = cpsw_ndo_tx_timeout,
713 .ndo_get_stats = cpsw_ndo_get_stats,
714 .ndo_set_rx_mode = cpsw_ndo_set_rx_mode,
715 #ifdef CONFIG_NET_POLL_CONTROLLER
716 .ndo_poll_controller = cpsw_ndo_poll_controller,
717 #endif
718 };
719
720 static void cpsw_get_drvinfo(struct net_device *ndev,
721 struct ethtool_drvinfo *info)
722 {
723 struct cpsw_priv *priv = netdev_priv(ndev);
724 strcpy(info->driver, "TI CPSW Driver v1.0");
725 strcpy(info->version, "1.0");
726 strcpy(info->bus_info, priv->pdev->name);
727 }
728
729 static u32 cpsw_get_msglevel(struct net_device *ndev)
730 {
731 struct cpsw_priv *priv = netdev_priv(ndev);
732 return priv->msg_enable;
733 }
734
735 static void cpsw_set_msglevel(struct net_device *ndev, u32 value)
736 {
737 struct cpsw_priv *priv = netdev_priv(ndev);
738 priv->msg_enable = value;
739 }
740
741 static const struct ethtool_ops cpsw_ethtool_ops = {
742 .get_drvinfo = cpsw_get_drvinfo,
743 .get_msglevel = cpsw_get_msglevel,
744 .set_msglevel = cpsw_set_msglevel,
745 .get_link = ethtool_op_get_link,
746 };
747
748 static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
749 {
750 void __iomem *regs = priv->regs;
751 int slave_num = slave->slave_num;
752 struct cpsw_slave_data *data = priv->data.slave_data + slave_num;
753
754 slave->data = data;
755 slave->regs = regs + data->slave_reg_ofs;
756 slave->sliver = regs + data->sliver_reg_ofs;
757 }
758
759 static int cpsw_probe_dt(struct cpsw_platform_data *data,
760 struct platform_device *pdev)
761 {
762 struct device_node *node = pdev->dev.of_node;
763 struct device_node *slave_node;
764 int i = 0, ret;
765 u32 prop;
766
767 if (!node)
768 return -EINVAL;
769
770 if (of_property_read_u32(node, "slaves", &prop)) {
771 pr_err("Missing slaves property in the DT.\n");
772 return -EINVAL;
773 }
774 data->slaves = prop;
775
776 data->slave_data = kzalloc(sizeof(struct cpsw_slave_data) *
777 data->slaves, GFP_KERNEL);
778 if (!data->slave_data) {
779 pr_err("Could not allocate slave memory.\n");
780 return -EINVAL;
781 }
782
783 data->no_bd_ram = of_property_read_bool(node, "no_bd_ram");
784
785 if (of_property_read_u32(node, "cpdma_channels", &prop)) {
786 pr_err("Missing cpdma_channels property in the DT.\n");
787 ret = -EINVAL;
788 goto error_ret;
789 }
790 data->channels = prop;
791
792 if (of_property_read_u32(node, "host_port_no", &prop)) {
793 pr_err("Missing host_port_no property in the DT.\n");
794 ret = -EINVAL;
795 goto error_ret;
796 }
797 data->host_port_num = prop;
798
799 if (of_property_read_u32(node, "cpdma_reg_ofs", &prop)) {
800 pr_err("Missing cpdma_reg_ofs property in the DT.\n");
801 ret = -EINVAL;
802 goto error_ret;
803 }
804 data->cpdma_reg_ofs = prop;
805
806 if (of_property_read_u32(node, "cpdma_sram_ofs", &prop)) {
807 pr_err("Missing cpdma_sram_ofs property in the DT.\n");
808 ret = -EINVAL;
809 goto error_ret;
810 }
811 data->cpdma_sram_ofs = prop;
812
813 if (of_property_read_u32(node, "ale_reg_ofs", &prop)) {
814 pr_err("Missing ale_reg_ofs property in the DT.\n");
815 ret = -EINVAL;
816 goto error_ret;
817 }
818 data->ale_reg_ofs = prop;
819
820 if (of_property_read_u32(node, "ale_entries", &prop)) {
821 pr_err("Missing ale_entries property in the DT.\n");
822 ret = -EINVAL;
823 goto error_ret;
824 }
825 data->ale_entries = prop;
826
827 if (of_property_read_u32(node, "host_port_reg_ofs", &prop)) {
828 pr_err("Missing host_port_reg_ofs property in the DT.\n");
829 ret = -EINVAL;
830 goto error_ret;
831 }
832 data->host_port_reg_ofs = prop;
833
834 if (of_property_read_u32(node, "hw_stats_reg_ofs", &prop)) {
835 pr_err("Missing hw_stats_reg_ofs property in the DT.\n");
836 ret = -EINVAL;
837 goto error_ret;
838 }
839 data->hw_stats_reg_ofs = prop;
840
841 if (of_property_read_u32(node, "bd_ram_ofs", &prop)) {
842 pr_err("Missing bd_ram_ofs property in the DT.\n");
843 ret = -EINVAL;
844 goto error_ret;
845 }
846 data->bd_ram_ofs = prop;
847
848 if (of_property_read_u32(node, "bd_ram_size", &prop)) {
849 pr_err("Missing bd_ram_size property in the DT.\n");
850 ret = -EINVAL;
851 goto error_ret;
852 }
853 data->bd_ram_size = prop;
854
855 if (of_property_read_u32(node, "rx_descs", &prop)) {
856 pr_err("Missing rx_descs property in the DT.\n");
857 ret = -EINVAL;
858 goto error_ret;
859 }
860 data->rx_descs = prop;
861
862 if (of_property_read_u32(node, "mac_control", &prop)) {
863 pr_err("Missing mac_control property in the DT.\n");
864 ret = -EINVAL;
865 goto error_ret;
866 }
867 data->mac_control = prop;
868
869 for_each_child_of_node(node, slave_node) {
870 struct cpsw_slave_data *slave_data = data->slave_data + i;
871 const char *phy_id = NULL;
872 const void *mac_addr = NULL;
873
874 if (of_property_read_string(slave_node, "phy_id", &phy_id)) {
875 pr_err("Missing slave[%d] phy_id property\n", i);
876 ret = -EINVAL;
877 goto error_ret;
878 }
879 slave_data->phy_id = phy_id;
880
881 if (of_property_read_u32(slave_node, "slave_reg_ofs", &prop)) {
882 pr_err("Missing slave[%d] slave_reg_ofs property\n", i);
883 ret = -EINVAL;
884 goto error_ret;
885 }
886 slave_data->slave_reg_ofs = prop;
887
888 if (of_property_read_u32(slave_node, "sliver_reg_ofs",
889 &prop)) {
890 pr_err("Missing slave[%d] sliver_reg_ofs property\n",
891 i);
892 ret = -EINVAL;
893 goto error_ret;
894 }
895 slave_data->sliver_reg_ofs = prop;
896
897 mac_addr = of_get_mac_address(slave_node);
898 if (mac_addr)
899 memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN);
900
901 i++;
902 }
903
904 return 0;
905
906 error_ret:
907 kfree(data->slave_data);
908 return ret;
909 }
910
911 static int __devinit cpsw_probe(struct platform_device *pdev)
912 {
913 struct cpsw_platform_data *data = pdev->dev.platform_data;
914 struct net_device *ndev;
915 struct cpsw_priv *priv;
916 struct cpdma_params dma_params;
917 struct cpsw_ale_params ale_params;
918 void __iomem *regs;
919 struct resource *res;
920 int ret = 0, i, k = 0;
921
922 ndev = alloc_etherdev(sizeof(struct cpsw_priv));
923 if (!ndev) {
924 pr_err("error allocating net_device\n");
925 return -ENOMEM;
926 }
927
928 platform_set_drvdata(pdev, ndev);
929 priv = netdev_priv(ndev);
930 spin_lock_init(&priv->lock);
931 priv->pdev = pdev;
932 priv->ndev = ndev;
933 priv->dev = &ndev->dev;
934 priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
935 priv->rx_packet_max = max(rx_packet_max, 128);
936
937 if (cpsw_probe_dt(&priv->data, pdev)) {
938 pr_err("cpsw: platform data missing\n");
939 ret = -ENODEV;
940 goto clean_ndev_ret;
941 }
942 data = &priv->data;
943
944 if (is_valid_ether_addr(data->slave_data[0].mac_addr)) {
945 memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN);
946 pr_info("Detected MACID = %pM", priv->mac_addr);
947 } else {
948 eth_random_addr(priv->mac_addr);
949 pr_info("Random MACID = %pM", priv->mac_addr);
950 }
951
952 memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
953
954 priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves,
955 GFP_KERNEL);
956 if (!priv->slaves) {
957 ret = -EBUSY;
958 goto clean_ndev_ret;
959 }
960 for (i = 0; i < data->slaves; i++)
961 priv->slaves[i].slave_num = i;
962
963 pm_runtime_enable(&pdev->dev);
964 priv->clk = clk_get(&pdev->dev, "fck");
965 if (IS_ERR(priv->clk)) {
966 dev_err(&pdev->dev, "fck is not found\n");
967 ret = -ENODEV;
968 goto clean_slave_ret;
969 }
970
971 priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
972 if (!priv->cpsw_res) {
973 dev_err(priv->dev, "error getting i/o resource\n");
974 ret = -ENOENT;
975 goto clean_clk_ret;
976 }
977
978 if (!request_mem_region(priv->cpsw_res->start,
979 resource_size(priv->cpsw_res), ndev->name)) {
980 dev_err(priv->dev, "failed request i/o region\n");
981 ret = -ENXIO;
982 goto clean_clk_ret;
983 }
984
985 regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res));
986 if (!regs) {
987 dev_err(priv->dev, "unable to map i/o region\n");
988 goto clean_cpsw_iores_ret;
989 }
990 priv->regs = regs;
991 priv->host_port = data->host_port_num;
992 priv->host_port_regs = regs + data->host_port_reg_ofs;
993
994 priv->cpsw_ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
995 if (!priv->cpsw_ss_res) {
996 dev_err(priv->dev, "error getting i/o resource\n");
997 ret = -ENOENT;
998 goto clean_clk_ret;
999 }
1000
1001 if (!request_mem_region(priv->cpsw_ss_res->start,
1002 resource_size(priv->cpsw_ss_res), ndev->name)) {
1003 dev_err(priv->dev, "failed request i/o region\n");
1004 ret = -ENXIO;
1005 goto clean_clk_ret;
1006 }
1007
1008 regs = ioremap(priv->cpsw_ss_res->start,
1009 resource_size(priv->cpsw_ss_res));
1010 if (!regs) {
1011 dev_err(priv->dev, "unable to map i/o region\n");
1012 goto clean_cpsw_ss_iores_ret;
1013 }
1014 priv->wr_regs = regs;
1015
1016 for_each_slave(priv, cpsw_slave_init, priv);
1017
1018 memset(&dma_params, 0, sizeof(dma_params));
1019 dma_params.dev = &pdev->dev;
1020 dma_params.dmaregs = cpsw_dma_regs((u32)priv->regs,
1021 data->cpdma_reg_ofs);
1022 dma_params.rxthresh = cpsw_dma_rxthresh((u32)priv->regs,
1023 data->cpdma_reg_ofs);
1024 dma_params.rxfree = cpsw_dma_rxfree((u32)priv->regs,
1025 data->cpdma_reg_ofs);
1026 dma_params.txhdp = cpsw_dma_txhdp((u32)priv->regs,
1027 data->cpdma_sram_ofs);
1028 dma_params.rxhdp = cpsw_dma_rxhdp((u32)priv->regs,
1029 data->cpdma_sram_ofs);
1030 dma_params.txcp = cpsw_dma_txcp((u32)priv->regs,
1031 data->cpdma_sram_ofs);
1032 dma_params.rxcp = cpsw_dma_rxcp((u32)priv->regs,
1033 data->cpdma_sram_ofs);
1034
1035 dma_params.num_chan = data->channels;
1036 dma_params.has_soft_reset = true;
1037 dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE;
1038 dma_params.desc_mem_size = data->bd_ram_size;
1039 dma_params.desc_align = 16;
1040 dma_params.has_ext_regs = true;
1041 dma_params.desc_mem_phys = data->no_bd_ram ? 0 :
1042 (u32 __force)priv->cpsw_res->start + data->bd_ram_ofs;
1043 dma_params.desc_hw_addr = data->hw_ram_addr ?
1044 data->hw_ram_addr : dma_params.desc_mem_phys ;
1045
1046 priv->dma = cpdma_ctlr_create(&dma_params);
1047 if (!priv->dma) {
1048 dev_err(priv->dev, "error initializing dma\n");
1049 ret = -ENOMEM;
1050 goto clean_iomap_ret;
1051 }
1052
1053 priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0),
1054 cpsw_tx_handler);
1055 priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0),
1056 cpsw_rx_handler);
1057
1058 if (WARN_ON(!priv->txch || !priv->rxch)) {
1059 dev_err(priv->dev, "error initializing dma channels\n");
1060 ret = -ENOMEM;
1061 goto clean_dma_ret;
1062 }
1063
1064 memset(&ale_params, 0, sizeof(ale_params));
1065 ale_params.dev = &ndev->dev;
1066 ale_params.ale_regs = (void *)((u32)priv->regs) +
1067 ((u32)data->ale_reg_ofs);
1068 ale_params.ale_ageout = ale_ageout;
1069 ale_params.ale_entries = data->ale_entries;
1070 ale_params.ale_ports = data->slaves;
1071
1072 priv->ale = cpsw_ale_create(&ale_params);
1073 if (!priv->ale) {
1074 dev_err(priv->dev, "error initializing ale engine\n");
1075 ret = -ENODEV;
1076 goto clean_dma_ret;
1077 }
1078
1079 ndev->irq = platform_get_irq(pdev, 0);
1080 if (ndev->irq < 0) {
1081 dev_err(priv->dev, "error getting irq resource\n");
1082 ret = -ENOENT;
1083 goto clean_ale_ret;
1084 }
1085
1086 while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) {
1087 for (i = res->start; i <= res->end; i++) {
1088 if (request_irq(i, cpsw_interrupt, IRQF_DISABLED,
1089 dev_name(&pdev->dev), priv)) {
1090 dev_err(priv->dev, "error attaching irq\n");
1091 goto clean_ale_ret;
1092 }
1093 priv->irqs_table[k] = i;
1094 priv->num_irqs = k;
1095 }
1096 k++;
1097 }
1098
1099 ndev->flags |= IFF_ALLMULTI; /* see cpsw_ndo_change_rx_flags() */
1100
1101 ndev->netdev_ops = &cpsw_netdev_ops;
1102 SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops);
1103 netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT);
1104
1105 /* register the network device */
1106 SET_NETDEV_DEV(ndev, &pdev->dev);
1107 ret = register_netdev(ndev);
1108 if (ret) {
1109 dev_err(priv->dev, "error registering net device\n");
1110 ret = -ENODEV;
1111 goto clean_irq_ret;
1112 }
1113
1114 cpsw_notice(priv, probe, "initialized device (regs %x, irq %d)\n",
1115 priv->cpsw_res->start, ndev->irq);
1116
1117 return 0;
1118
1119 clean_irq_ret:
1120 free_irq(ndev->irq, priv);
1121 clean_ale_ret:
1122 cpsw_ale_destroy(priv->ale);
1123 clean_dma_ret:
1124 cpdma_chan_destroy(priv->txch);
1125 cpdma_chan_destroy(priv->rxch);
1126 cpdma_ctlr_destroy(priv->dma);
1127 clean_iomap_ret:
1128 iounmap(priv->regs);
1129 clean_cpsw_ss_iores_ret:
1130 release_mem_region(priv->cpsw_ss_res->start,
1131 resource_size(priv->cpsw_ss_res));
1132 clean_cpsw_iores_ret:
1133 release_mem_region(priv->cpsw_res->start,
1134 resource_size(priv->cpsw_res));
1135 clean_clk_ret:
1136 clk_put(priv->clk);
1137 clean_slave_ret:
1138 pm_runtime_disable(&pdev->dev);
1139 kfree(priv->slaves);
1140 clean_ndev_ret:
1141 free_netdev(ndev);
1142 return ret;
1143 }
1144
1145 static int __devexit cpsw_remove(struct platform_device *pdev)
1146 {
1147 struct net_device *ndev = platform_get_drvdata(pdev);
1148 struct cpsw_priv *priv = netdev_priv(ndev);
1149
1150 pr_info("removing device");
1151 platform_set_drvdata(pdev, NULL);
1152
1153 free_irq(ndev->irq, priv);
1154 cpsw_ale_destroy(priv->ale);
1155 cpdma_chan_destroy(priv->txch);
1156 cpdma_chan_destroy(priv->rxch);
1157 cpdma_ctlr_destroy(priv->dma);
1158 iounmap(priv->regs);
1159 release_mem_region(priv->cpsw_res->start,
1160 resource_size(priv->cpsw_res));
1161 release_mem_region(priv->cpsw_ss_res->start,
1162 resource_size(priv->cpsw_ss_res));
1163 pm_runtime_disable(&pdev->dev);
1164 clk_put(priv->clk);
1165 kfree(priv->slaves);
1166 free_netdev(ndev);
1167
1168 return 0;
1169 }
1170
1171 static int cpsw_suspend(struct device *dev)
1172 {
1173 struct platform_device *pdev = to_platform_device(dev);
1174 struct net_device *ndev = platform_get_drvdata(pdev);
1175
1176 if (netif_running(ndev))
1177 cpsw_ndo_stop(ndev);
1178 pm_runtime_put_sync(&pdev->dev);
1179
1180 return 0;
1181 }
1182
1183 static int cpsw_resume(struct device *dev)
1184 {
1185 struct platform_device *pdev = to_platform_device(dev);
1186 struct net_device *ndev = platform_get_drvdata(pdev);
1187
1188 pm_runtime_get_sync(&pdev->dev);
1189 if (netif_running(ndev))
1190 cpsw_ndo_open(ndev);
1191 return 0;
1192 }
1193
1194 static const struct dev_pm_ops cpsw_pm_ops = {
1195 .suspend = cpsw_suspend,
1196 .resume = cpsw_resume,
1197 };
1198
1199 static const struct of_device_id cpsw_of_mtable[] = {
1200 { .compatible = "ti,cpsw", },
1201 { /* sentinel */ },
1202 };
1203
1204 static struct platform_driver cpsw_driver = {
1205 .driver = {
1206 .name = "cpsw",
1207 .owner = THIS_MODULE,
1208 .pm = &cpsw_pm_ops,
1209 .of_match_table = of_match_ptr(cpsw_of_mtable),
1210 },
1211 .probe = cpsw_probe,
1212 .remove = __devexit_p(cpsw_remove),
1213 };
1214
1215 static int __init cpsw_init(void)
1216 {
1217 return platform_driver_register(&cpsw_driver);
1218 }
1219 late_initcall(cpsw_init);
1220
1221 static void __exit cpsw_exit(void)
1222 {
1223 platform_driver_unregister(&cpsw_driver);
1224 }
1225 module_exit(cpsw_exit);
1226
1227 MODULE_LICENSE("GPL");
1228 MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>");
1229 MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
1230 MODULE_DESCRIPTION("TI CPSW Ethernet driver");
Linux kernel - Deliverables
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