2 * Texas Instruments 3-Port Ethernet Switch Address Lookup Engine
4 * Copyright (C) 2012 Texas Instruments
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/seq_file.h>
18 #include <linux/slab.h>
19 #include <linux/err.h>
21 #include <linux/stat.h>
22 #include <linux/sysfs.h>
23 #include <linux/etherdevice.h>
27 #define BITMASK(bits) (BIT(bits) - 1)
29 #define ALE_VERSION_MAJOR(rev) ((rev >> 8) & 0xff)
30 #define ALE_VERSION_MINOR(rev) (rev & 0xff)
33 #define ALE_IDVER 0x00
34 #define ALE_CONTROL 0x08
35 #define ALE_PRESCALE 0x10
36 #define ALE_UNKNOWNVLAN 0x18
37 #define ALE_TABLE_CONTROL 0x20
38 #define ALE_TABLE 0x34
39 #define ALE_PORTCTL 0x40
41 #define ALE_TABLE_WRITE BIT(31)
43 #define ALE_TYPE_FREE 0
44 #define ALE_TYPE_ADDR 1
45 #define ALE_TYPE_VLAN 2
46 #define ALE_TYPE_VLAN_ADDR 3
48 #define ALE_UCAST_PERSISTANT 0
49 #define ALE_UCAST_UNTOUCHED 1
50 #define ALE_UCAST_OUI 2
51 #define ALE_UCAST_TOUCHED 3
53 static inline int cpsw_ale_get_field(u32
*ale_entry
, u32 start
, u32 bits
)
59 idx
= 2 - idx
; /* flip */
60 return (ale_entry
[idx
] >> start
) & BITMASK(bits
);
63 static inline void cpsw_ale_set_field(u32
*ale_entry
, u32 start
, u32 bits
,
68 value
&= BITMASK(bits
);
71 idx
= 2 - idx
; /* flip */
72 ale_entry
[idx
] &= ~(BITMASK(bits
) << start
);
73 ale_entry
[idx
] |= (value
<< start
);
76 #define DEFINE_ALE_FIELD(name, start, bits) \
77 static inline int cpsw_ale_get_##name(u32 *ale_entry) \
79 return cpsw_ale_get_field(ale_entry, start, bits); \
81 static inline void cpsw_ale_set_##name(u32 *ale_entry, u32 value) \
83 cpsw_ale_set_field(ale_entry, start, bits, value); \
86 DEFINE_ALE_FIELD(entry_type
, 60, 2)
87 DEFINE_ALE_FIELD(vlan_id
, 48, 12)
88 DEFINE_ALE_FIELD(mcast_state
, 62, 2)
89 DEFINE_ALE_FIELD(port_mask
, 66, 3)
90 DEFINE_ALE_FIELD(super
, 65, 1)
91 DEFINE_ALE_FIELD(ucast_type
, 62, 2)
92 DEFINE_ALE_FIELD(port_num
, 66, 2)
93 DEFINE_ALE_FIELD(blocked
, 65, 1)
94 DEFINE_ALE_FIELD(secure
, 64, 1)
95 DEFINE_ALE_FIELD(vlan_untag_force
, 24, 3)
96 DEFINE_ALE_FIELD(vlan_reg_mcast
, 16, 3)
97 DEFINE_ALE_FIELD(vlan_unreg_mcast
, 8, 3)
98 DEFINE_ALE_FIELD(vlan_member_list
, 0, 3)
99 DEFINE_ALE_FIELD(mcast
, 40, 1)
101 /* The MAC address field in the ALE entry cannot be macroized as above */
102 static inline void cpsw_ale_get_addr(u32
*ale_entry
, u8
*addr
)
106 for (i
= 0; i
< 6; i
++)
107 addr
[i
] = cpsw_ale_get_field(ale_entry
, 40 - 8*i
, 8);
110 static inline void cpsw_ale_set_addr(u32
*ale_entry
, u8
*addr
)
114 for (i
= 0; i
< 6; i
++)
115 cpsw_ale_set_field(ale_entry
, 40 - 8*i
, 8, addr
[i
]);
118 static int cpsw_ale_read(struct cpsw_ale
*ale
, int idx
, u32
*ale_entry
)
122 WARN_ON(idx
> ale
->params
.ale_entries
);
124 __raw_writel(idx
, ale
->params
.ale_regs
+ ALE_TABLE_CONTROL
);
126 for (i
= 0; i
< ALE_ENTRY_WORDS
; i
++)
127 ale_entry
[i
] = __raw_readl(ale
->params
.ale_regs
+
133 static int cpsw_ale_write(struct cpsw_ale
*ale
, int idx
, u32
*ale_entry
)
137 WARN_ON(idx
> ale
->params
.ale_entries
);
139 for (i
= 0; i
< ALE_ENTRY_WORDS
; i
++)
140 __raw_writel(ale_entry
[i
], ale
->params
.ale_regs
+
143 __raw_writel(idx
| ALE_TABLE_WRITE
, ale
->params
.ale_regs
+
149 int cpsw_ale_match_addr(struct cpsw_ale
*ale
, u8
*addr
, u16 vid
)
151 u32 ale_entry
[ALE_ENTRY_WORDS
];
154 for (idx
= 0; idx
< ale
->params
.ale_entries
; idx
++) {
157 cpsw_ale_read(ale
, idx
, ale_entry
);
158 type
= cpsw_ale_get_entry_type(ale_entry
);
159 if (type
!= ALE_TYPE_ADDR
&& type
!= ALE_TYPE_VLAN_ADDR
)
161 if (cpsw_ale_get_vlan_id(ale_entry
) != vid
)
163 cpsw_ale_get_addr(ale_entry
, entry_addr
);
164 if (ether_addr_equal(entry_addr
, addr
))
170 int cpsw_ale_match_vlan(struct cpsw_ale
*ale
, u16 vid
)
172 u32 ale_entry
[ALE_ENTRY_WORDS
];
175 for (idx
= 0; idx
< ale
->params
.ale_entries
; idx
++) {
176 cpsw_ale_read(ale
, idx
, ale_entry
);
177 type
= cpsw_ale_get_entry_type(ale_entry
);
178 if (type
!= ALE_TYPE_VLAN
)
180 if (cpsw_ale_get_vlan_id(ale_entry
) == vid
)
186 static int cpsw_ale_match_free(struct cpsw_ale
*ale
)
188 u32 ale_entry
[ALE_ENTRY_WORDS
];
191 for (idx
= 0; idx
< ale
->params
.ale_entries
; idx
++) {
192 cpsw_ale_read(ale
, idx
, ale_entry
);
193 type
= cpsw_ale_get_entry_type(ale_entry
);
194 if (type
== ALE_TYPE_FREE
)
200 static int cpsw_ale_find_ageable(struct cpsw_ale
*ale
)
202 u32 ale_entry
[ALE_ENTRY_WORDS
];
205 for (idx
= 0; idx
< ale
->params
.ale_entries
; idx
++) {
206 cpsw_ale_read(ale
, idx
, ale_entry
);
207 type
= cpsw_ale_get_entry_type(ale_entry
);
208 if (type
!= ALE_TYPE_ADDR
&& type
!= ALE_TYPE_VLAN_ADDR
)
210 if (cpsw_ale_get_mcast(ale_entry
))
212 type
= cpsw_ale_get_ucast_type(ale_entry
);
213 if (type
!= ALE_UCAST_PERSISTANT
&&
214 type
!= ALE_UCAST_OUI
)
220 static void cpsw_ale_flush_mcast(struct cpsw_ale
*ale
, u32
*ale_entry
,
225 mask
= cpsw_ale_get_port_mask(ale_entry
);
226 if ((mask
& port_mask
) == 0)
227 return; /* ports dont intersect, not interested */
230 /* free if only remaining port is host port */
232 cpsw_ale_set_port_mask(ale_entry
, mask
);
234 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_FREE
);
237 int cpsw_ale_flush_multicast(struct cpsw_ale
*ale
, int port_mask
)
239 u32 ale_entry
[ALE_ENTRY_WORDS
];
242 for (idx
= 0; idx
< ale
->params
.ale_entries
; idx
++) {
243 cpsw_ale_read(ale
, idx
, ale_entry
);
244 ret
= cpsw_ale_get_entry_type(ale_entry
);
245 if (ret
!= ALE_TYPE_ADDR
&& ret
!= ALE_TYPE_VLAN_ADDR
)
248 if (cpsw_ale_get_mcast(ale_entry
)) {
251 cpsw_ale_get_addr(ale_entry
, addr
);
252 if (!is_broadcast_ether_addr(addr
))
253 cpsw_ale_flush_mcast(ale
, ale_entry
, port_mask
);
256 cpsw_ale_write(ale
, idx
, ale_entry
);
261 static void cpsw_ale_flush_ucast(struct cpsw_ale
*ale
, u32
*ale_entry
,
266 port
= cpsw_ale_get_port_num(ale_entry
);
267 if ((BIT(port
) & port_mask
) == 0)
268 return; /* ports dont intersect, not interested */
269 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_FREE
);
272 int cpsw_ale_flush(struct cpsw_ale
*ale
, int port_mask
)
274 u32 ale_entry
[ALE_ENTRY_WORDS
];
277 for (idx
= 0; idx
< ale
->params
.ale_entries
; idx
++) {
278 cpsw_ale_read(ale
, idx
, ale_entry
);
279 ret
= cpsw_ale_get_entry_type(ale_entry
);
280 if (ret
!= ALE_TYPE_ADDR
&& ret
!= ALE_TYPE_VLAN_ADDR
)
283 if (cpsw_ale_get_mcast(ale_entry
))
284 cpsw_ale_flush_mcast(ale
, ale_entry
, port_mask
);
286 cpsw_ale_flush_ucast(ale
, ale_entry
, port_mask
);
288 cpsw_ale_write(ale
, idx
, ale_entry
);
293 static inline void cpsw_ale_set_vlan_entry_type(u32
*ale_entry
,
296 if (flags
& ALE_VLAN
) {
297 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_VLAN_ADDR
);
298 cpsw_ale_set_vlan_id(ale_entry
, vid
);
300 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_ADDR
);
304 int cpsw_ale_add_ucast(struct cpsw_ale
*ale
, u8
*addr
, int port
,
307 u32 ale_entry
[ALE_ENTRY_WORDS
] = {0, 0, 0};
310 cpsw_ale_set_vlan_entry_type(ale_entry
, flags
, vid
);
312 cpsw_ale_set_addr(ale_entry
, addr
);
313 cpsw_ale_set_ucast_type(ale_entry
, ALE_UCAST_PERSISTANT
);
314 cpsw_ale_set_secure(ale_entry
, (flags
& ALE_SECURE
) ? 1 : 0);
315 cpsw_ale_set_blocked(ale_entry
, (flags
& ALE_BLOCKED
) ? 1 : 0);
316 cpsw_ale_set_port_num(ale_entry
, port
);
318 idx
= cpsw_ale_match_addr(ale
, addr
, (flags
& ALE_VLAN
) ? vid
: 0);
320 idx
= cpsw_ale_match_free(ale
);
322 idx
= cpsw_ale_find_ageable(ale
);
326 cpsw_ale_write(ale
, idx
, ale_entry
);
330 int cpsw_ale_del_ucast(struct cpsw_ale
*ale
, u8
*addr
, int port
,
333 u32 ale_entry
[ALE_ENTRY_WORDS
] = {0, 0, 0};
336 idx
= cpsw_ale_match_addr(ale
, addr
, (flags
& ALE_VLAN
) ? vid
: 0);
340 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_FREE
);
341 cpsw_ale_write(ale
, idx
, ale_entry
);
345 int cpsw_ale_add_mcast(struct cpsw_ale
*ale
, u8
*addr
, int port_mask
,
346 int flags
, u16 vid
, int mcast_state
)
348 u32 ale_entry
[ALE_ENTRY_WORDS
] = {0, 0, 0};
351 idx
= cpsw_ale_match_addr(ale
, addr
, (flags
& ALE_VLAN
) ? vid
: 0);
353 cpsw_ale_read(ale
, idx
, ale_entry
);
355 cpsw_ale_set_vlan_entry_type(ale_entry
, flags
, vid
);
357 cpsw_ale_set_addr(ale_entry
, addr
);
358 cpsw_ale_set_super(ale_entry
, (flags
& ALE_BLOCKED
) ? 1 : 0);
359 cpsw_ale_set_mcast_state(ale_entry
, mcast_state
);
361 mask
= cpsw_ale_get_port_mask(ale_entry
);
363 cpsw_ale_set_port_mask(ale_entry
, port_mask
);
366 idx
= cpsw_ale_match_free(ale
);
368 idx
= cpsw_ale_find_ageable(ale
);
372 cpsw_ale_write(ale
, idx
, ale_entry
);
376 int cpsw_ale_del_mcast(struct cpsw_ale
*ale
, u8
*addr
, int port_mask
,
379 u32 ale_entry
[ALE_ENTRY_WORDS
] = {0, 0, 0};
382 idx
= cpsw_ale_match_addr(ale
, addr
, (flags
& ALE_VLAN
) ? vid
: 0);
386 cpsw_ale_read(ale
, idx
, ale_entry
);
389 cpsw_ale_set_port_mask(ale_entry
, port_mask
);
391 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_FREE
);
393 cpsw_ale_write(ale
, idx
, ale_entry
);
397 int cpsw_ale_add_vlan(struct cpsw_ale
*ale
, u16 vid
, int port
, int untag
,
398 int reg_mcast
, int unreg_mcast
)
400 u32 ale_entry
[ALE_ENTRY_WORDS
] = {0, 0, 0};
403 idx
= cpsw_ale_match_vlan(ale
, vid
);
405 cpsw_ale_read(ale
, idx
, ale_entry
);
407 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_VLAN
);
408 cpsw_ale_set_vlan_id(ale_entry
, vid
);
410 cpsw_ale_set_vlan_untag_force(ale_entry
, untag
);
411 cpsw_ale_set_vlan_reg_mcast(ale_entry
, reg_mcast
);
412 cpsw_ale_set_vlan_unreg_mcast(ale_entry
, unreg_mcast
);
413 cpsw_ale_set_vlan_member_list(ale_entry
, port
);
416 idx
= cpsw_ale_match_free(ale
);
418 idx
= cpsw_ale_find_ageable(ale
);
422 cpsw_ale_write(ale
, idx
, ale_entry
);
426 int cpsw_ale_del_vlan(struct cpsw_ale
*ale
, u16 vid
, int port_mask
)
428 u32 ale_entry
[ALE_ENTRY_WORDS
] = {0, 0, 0};
431 idx
= cpsw_ale_match_vlan(ale
, vid
);
435 cpsw_ale_read(ale
, idx
, ale_entry
);
438 cpsw_ale_set_vlan_member_list(ale_entry
, port_mask
);
440 cpsw_ale_set_entry_type(ale_entry
, ALE_TYPE_FREE
);
442 cpsw_ale_write(ale
, idx
, ale_entry
);
446 void cpsw_ale_set_allmulti(struct cpsw_ale
*ale
, int allmulti
)
448 u32 ale_entry
[ALE_ENTRY_WORDS
];
452 /* Only bother doing the work if the setting is actually changing */
453 if (ale
->allmulti
== allmulti
)
456 /* Remember the new setting to check against next time */
457 ale
->allmulti
= allmulti
;
459 for (idx
= 0; idx
< ale
->params
.ale_entries
; idx
++) {
460 cpsw_ale_read(ale
, idx
, ale_entry
);
461 type
= cpsw_ale_get_entry_type(ale_entry
);
462 if (type
!= ALE_TYPE_VLAN
)
465 unreg_mcast
= cpsw_ale_get_vlan_unreg_mcast(ale_entry
);
470 cpsw_ale_set_vlan_unreg_mcast(ale_entry
, unreg_mcast
);
471 cpsw_ale_write(ale
, idx
, ale_entry
);
475 struct ale_control_info
{
477 int offset
, port_offset
;
478 int shift
, port_shift
;
482 static const struct ale_control_info ale_controls
[ALE_NUM_CONTROLS
] = {
485 .offset
= ALE_CONTROL
,
493 .offset
= ALE_CONTROL
,
501 .offset
= ALE_CONTROL
,
507 [ALE_P0_UNI_FLOOD
] = {
508 .name
= "port0_unicast_flood",
509 .offset
= ALE_CONTROL
,
515 [ALE_VLAN_NOLEARN
] = {
516 .name
= "vlan_nolearn",
517 .offset
= ALE_CONTROL
,
523 [ALE_NO_PORT_VLAN
] = {
524 .name
= "no_port_vlan",
525 .offset
= ALE_CONTROL
,
533 .offset
= ALE_CONTROL
,
541 .offset
= ALE_CONTROL
,
547 [ALE_RATE_LIMIT_TX
] = {
548 .name
= "rate_limit_tx",
549 .offset
= ALE_CONTROL
,
556 .name
= "vlan_aware",
557 .offset
= ALE_CONTROL
,
563 [ALE_AUTH_ENABLE
] = {
564 .name
= "auth_enable",
565 .offset
= ALE_CONTROL
,
572 .name
= "rate_limit",
573 .offset
= ALE_CONTROL
,
580 .name
= "port_state",
581 .offset
= ALE_PORTCTL
,
587 [ALE_PORT_DROP_UNTAGGED
] = {
588 .name
= "drop_untagged",
589 .offset
= ALE_PORTCTL
,
595 [ALE_PORT_DROP_UNKNOWN_VLAN
] = {
596 .name
= "drop_unknown",
597 .offset
= ALE_PORTCTL
,
603 [ALE_PORT_NOLEARN
] = {
605 .offset
= ALE_PORTCTL
,
611 [ALE_PORT_NO_SA_UPDATE
] = {
612 .name
= "no_source_update",
613 .offset
= ALE_PORTCTL
,
619 [ALE_PORT_MCAST_LIMIT
] = {
620 .name
= "mcast_limit",
621 .offset
= ALE_PORTCTL
,
627 [ALE_PORT_BCAST_LIMIT
] = {
628 .name
= "bcast_limit",
629 .offset
= ALE_PORTCTL
,
635 [ALE_PORT_UNKNOWN_VLAN_MEMBER
] = {
636 .name
= "unknown_vlan_member",
637 .offset
= ALE_UNKNOWNVLAN
,
643 [ALE_PORT_UNKNOWN_MCAST_FLOOD
] = {
644 .name
= "unknown_mcast_flood",
645 .offset
= ALE_UNKNOWNVLAN
,
651 [ALE_PORT_UNKNOWN_REG_MCAST_FLOOD
] = {
652 .name
= "unknown_reg_flood",
653 .offset
= ALE_UNKNOWNVLAN
,
659 [ALE_PORT_UNTAGGED_EGRESS
] = {
660 .name
= "untagged_egress",
661 .offset
= ALE_UNKNOWNVLAN
,
669 int cpsw_ale_control_set(struct cpsw_ale
*ale
, int port
, int control
,
672 const struct ale_control_info
*info
;
676 if (control
< 0 || control
>= ARRAY_SIZE(ale_controls
))
679 info
= &ale_controls
[control
];
680 if (info
->port_offset
== 0 && info
->port_shift
== 0)
681 port
= 0; /* global, port is a dont care */
683 if (port
< 0 || port
> ale
->params
.ale_ports
)
686 mask
= BITMASK(info
->bits
);
690 offset
= info
->offset
+ (port
* info
->port_offset
);
691 shift
= info
->shift
+ (port
* info
->port_shift
);
693 tmp
= __raw_readl(ale
->params
.ale_regs
+ offset
);
694 tmp
= (tmp
& ~(mask
<< shift
)) | (value
<< shift
);
695 __raw_writel(tmp
, ale
->params
.ale_regs
+ offset
);
700 int cpsw_ale_control_get(struct cpsw_ale
*ale
, int port
, int control
)
702 const struct ale_control_info
*info
;
706 if (control
< 0 || control
>= ARRAY_SIZE(ale_controls
))
709 info
= &ale_controls
[control
];
710 if (info
->port_offset
== 0 && info
->port_shift
== 0)
711 port
= 0; /* global, port is a dont care */
713 if (port
< 0 || port
> ale
->params
.ale_ports
)
716 offset
= info
->offset
+ (port
* info
->port_offset
);
717 shift
= info
->shift
+ (port
* info
->port_shift
);
719 tmp
= __raw_readl(ale
->params
.ale_regs
+ offset
) >> shift
;
720 return tmp
& BITMASK(info
->bits
);
723 static void cpsw_ale_timer(unsigned long arg
)
725 struct cpsw_ale
*ale
= (struct cpsw_ale
*)arg
;
727 cpsw_ale_control_set(ale
, 0, ALE_AGEOUT
, 1);
730 ale
->timer
.expires
= jiffies
+ ale
->ageout
;
731 add_timer(&ale
->timer
);
735 int cpsw_ale_set_ageout(struct cpsw_ale
*ale
, int ageout
)
737 del_timer_sync(&ale
->timer
);
738 ale
->ageout
= ageout
* HZ
;
740 ale
->timer
.expires
= jiffies
+ ale
->ageout
;
741 add_timer(&ale
->timer
);
746 void cpsw_ale_start(struct cpsw_ale
*ale
)
750 rev
= __raw_readl(ale
->params
.ale_regs
+ ALE_IDVER
);
751 dev_dbg(ale
->params
.dev
, "initialized cpsw ale revision %d.%d\n",
752 ALE_VERSION_MAJOR(rev
), ALE_VERSION_MINOR(rev
));
753 cpsw_ale_control_set(ale
, 0, ALE_ENABLE
, 1);
754 cpsw_ale_control_set(ale
, 0, ALE_CLEAR
, 1);
756 init_timer(&ale
->timer
);
757 ale
->timer
.data
= (unsigned long)ale
;
758 ale
->timer
.function
= cpsw_ale_timer
;
760 ale
->timer
.expires
= jiffies
+ ale
->ageout
;
761 add_timer(&ale
->timer
);
765 void cpsw_ale_stop(struct cpsw_ale
*ale
)
767 del_timer_sync(&ale
->timer
);
770 struct cpsw_ale
*cpsw_ale_create(struct cpsw_ale_params
*params
)
772 struct cpsw_ale
*ale
;
774 ale
= kzalloc(sizeof(*ale
), GFP_KERNEL
);
778 ale
->params
= *params
;
779 ale
->ageout
= ale
->params
.ale_ageout
* HZ
;
784 int cpsw_ale_destroy(struct cpsw_ale
*ale
)
788 cpsw_ale_control_set(ale
, 0, ALE_ENABLE
, 0);
793 void cpsw_ale_dump(struct cpsw_ale
*ale
, u32
*data
)
797 for (i
= 0; i
< ale
->params
.ale_entries
; i
++) {
798 cpsw_ale_read(ale
, i
, data
);
799 data
+= ALE_ENTRY_WORDS
;