2 * Xilinx Axi Ethernet device driver
4 * Copyright (c) 2008 Nissin Systems Co., Ltd., Yoshio Kashiwagi
5 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
6 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
7 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
8 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
11 * This is a driver for the Xilinx Axi Ethernet which is used in the Virtex6
15 * - Add Axi Fifo support.
16 * - Factor out Axi DMA code into separate driver.
17 * - Test and fix basic multicast filtering.
18 * - Add support for extended multicast filtering.
19 * - Test basic VLAN support.
20 * - Add support for extended VLAN support.
23 #include <linux/delay.h>
24 #include <linux/etherdevice.h>
25 #include <linux/module.h>
26 #include <linux/netdevice.h>
27 #include <linux/of_mdio.h>
28 #include <linux/of_platform.h>
29 #include <linux/of_irq.h>
30 #include <linux/of_address.h>
31 #include <linux/skbuff.h>
32 #include <linux/spinlock.h>
33 #include <linux/phy.h>
34 #include <linux/mii.h>
35 #include <linux/ethtool.h>
37 #include "xilinx_axienet.h"
39 /* Descriptors defines for Tx and Rx DMA - 2^n for the best performance */
43 /* Must be shorter than length of ethtool_drvinfo.driver field to fit */
44 #define DRIVER_NAME "xaxienet"
45 #define DRIVER_DESCRIPTION "Xilinx Axi Ethernet driver"
46 #define DRIVER_VERSION "1.00a"
48 #define AXIENET_REGS_N 32
50 /* Match table for of_platform binding */
51 static const struct of_device_id axienet_of_match
[] = {
52 { .compatible
= "xlnx,axi-ethernet-1.00.a", },
53 { .compatible
= "xlnx,axi-ethernet-1.01.a", },
54 { .compatible
= "xlnx,axi-ethernet-2.01.a", },
58 MODULE_DEVICE_TABLE(of
, axienet_of_match
);
60 /* Option table for setting up Axi Ethernet hardware options */
61 static struct axienet_option axienet_options
[] = {
62 /* Turn on jumbo packet support for both Rx and Tx */
64 .opt
= XAE_OPTION_JUMBO
,
66 .m_or
= XAE_TC_JUM_MASK
,
68 .opt
= XAE_OPTION_JUMBO
,
69 .reg
= XAE_RCW1_OFFSET
,
70 .m_or
= XAE_RCW1_JUM_MASK
,
71 }, { /* Turn on VLAN packet support for both Rx and Tx */
72 .opt
= XAE_OPTION_VLAN
,
74 .m_or
= XAE_TC_VLAN_MASK
,
76 .opt
= XAE_OPTION_VLAN
,
77 .reg
= XAE_RCW1_OFFSET
,
78 .m_or
= XAE_RCW1_VLAN_MASK
,
79 }, { /* Turn on FCS stripping on receive packets */
80 .opt
= XAE_OPTION_FCS_STRIP
,
81 .reg
= XAE_RCW1_OFFSET
,
82 .m_or
= XAE_RCW1_FCS_MASK
,
83 }, { /* Turn on FCS insertion on transmit packets */
84 .opt
= XAE_OPTION_FCS_INSERT
,
86 .m_or
= XAE_TC_FCS_MASK
,
87 }, { /* Turn off length/type field checking on receive packets */
88 .opt
= XAE_OPTION_LENTYPE_ERR
,
89 .reg
= XAE_RCW1_OFFSET
,
90 .m_or
= XAE_RCW1_LT_DIS_MASK
,
91 }, { /* Turn on Rx flow control */
92 .opt
= XAE_OPTION_FLOW_CONTROL
,
93 .reg
= XAE_FCC_OFFSET
,
94 .m_or
= XAE_FCC_FCRX_MASK
,
95 }, { /* Turn on Tx flow control */
96 .opt
= XAE_OPTION_FLOW_CONTROL
,
97 .reg
= XAE_FCC_OFFSET
,
98 .m_or
= XAE_FCC_FCTX_MASK
,
99 }, { /* Turn on promiscuous frame filtering */
100 .opt
= XAE_OPTION_PROMISC
,
101 .reg
= XAE_FMI_OFFSET
,
102 .m_or
= XAE_FMI_PM_MASK
,
103 }, { /* Enable transmitter */
104 .opt
= XAE_OPTION_TXEN
,
105 .reg
= XAE_TC_OFFSET
,
106 .m_or
= XAE_TC_TX_MASK
,
107 }, { /* Enable receiver */
108 .opt
= XAE_OPTION_RXEN
,
109 .reg
= XAE_RCW1_OFFSET
,
110 .m_or
= XAE_RCW1_RX_MASK
,
116 * axienet_dma_in32 - Memory mapped Axi DMA register read
117 * @lp: Pointer to axienet local structure
118 * @reg: Address offset from the base address of the Axi DMA core
120 * returns: The contents of the Axi DMA register
122 * This function returns the contents of the corresponding Axi DMA register.
124 static inline u32
axienet_dma_in32(struct axienet_local
*lp
, off_t reg
)
126 return in_be32(lp
->dma_regs
+ reg
);
130 * axienet_dma_out32 - Memory mapped Axi DMA register write.
131 * @lp: Pointer to axienet local structure
132 * @reg: Address offset from the base address of the Axi DMA core
133 * @value: Value to be written into the Axi DMA register
135 * This function writes the desired value into the corresponding Axi DMA
138 static inline void axienet_dma_out32(struct axienet_local
*lp
,
139 off_t reg
, u32 value
)
141 out_be32((lp
->dma_regs
+ reg
), value
);
145 * axienet_dma_bd_release - Release buffer descriptor rings
146 * @ndev: Pointer to the net_device structure
148 * This function is used to release the descriptors allocated in
149 * axienet_dma_bd_init. axienet_dma_bd_release is called when Axi Ethernet
150 * driver stop api is called.
152 static void axienet_dma_bd_release(struct net_device
*ndev
)
155 struct axienet_local
*lp
= netdev_priv(ndev
);
157 for (i
= 0; i
< RX_BD_NUM
; i
++) {
158 dma_unmap_single(ndev
->dev
.parent
, lp
->rx_bd_v
[i
].phys
,
159 lp
->max_frm_size
, DMA_FROM_DEVICE
);
160 dev_kfree_skb((struct sk_buff
*)
161 (lp
->rx_bd_v
[i
].sw_id_offset
));
165 dma_free_coherent(ndev
->dev
.parent
,
166 sizeof(*lp
->rx_bd_v
) * RX_BD_NUM
,
171 dma_free_coherent(ndev
->dev
.parent
,
172 sizeof(*lp
->tx_bd_v
) * TX_BD_NUM
,
179 * axienet_dma_bd_init - Setup buffer descriptor rings for Axi DMA
180 * @ndev: Pointer to the net_device structure
182 * returns: 0, on success
183 * -ENOMEM, on failure
185 * This function is called to initialize the Rx and Tx DMA descriptor
186 * rings. This initializes the descriptors with required default values
187 * and is called when Axi Ethernet driver reset is called.
189 static int axienet_dma_bd_init(struct net_device
*ndev
)
194 struct axienet_local
*lp
= netdev_priv(ndev
);
196 /* Reset the indexes which are used for accessing the BDs */
201 /* Allocate the Tx and Rx buffer descriptors. */
202 lp
->tx_bd_v
= dma_zalloc_coherent(ndev
->dev
.parent
,
203 sizeof(*lp
->tx_bd_v
) * TX_BD_NUM
,
204 &lp
->tx_bd_p
, GFP_KERNEL
);
208 lp
->rx_bd_v
= dma_zalloc_coherent(ndev
->dev
.parent
,
209 sizeof(*lp
->rx_bd_v
) * RX_BD_NUM
,
210 &lp
->rx_bd_p
, GFP_KERNEL
);
214 for (i
= 0; i
< TX_BD_NUM
; i
++) {
215 lp
->tx_bd_v
[i
].next
= lp
->tx_bd_p
+
216 sizeof(*lp
->tx_bd_v
) *
217 ((i
+ 1) % TX_BD_NUM
);
220 for (i
= 0; i
< RX_BD_NUM
; i
++) {
221 lp
->rx_bd_v
[i
].next
= lp
->rx_bd_p
+
222 sizeof(*lp
->rx_bd_v
) *
223 ((i
+ 1) % RX_BD_NUM
);
225 skb
= netdev_alloc_skb_ip_align(ndev
, lp
->max_frm_size
);
229 lp
->rx_bd_v
[i
].sw_id_offset
= (u32
) skb
;
230 lp
->rx_bd_v
[i
].phys
= dma_map_single(ndev
->dev
.parent
,
234 lp
->rx_bd_v
[i
].cntrl
= lp
->max_frm_size
;
237 /* Start updating the Rx channel control register */
238 cr
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
239 /* Update the interrupt coalesce count */
240 cr
= ((cr
& ~XAXIDMA_COALESCE_MASK
) |
241 ((lp
->coalesce_count_rx
) << XAXIDMA_COALESCE_SHIFT
));
242 /* Update the delay timer count */
243 cr
= ((cr
& ~XAXIDMA_DELAY_MASK
) |
244 (XAXIDMA_DFT_RX_WAITBOUND
<< XAXIDMA_DELAY_SHIFT
));
245 /* Enable coalesce, delay timer and error interrupts */
246 cr
|= XAXIDMA_IRQ_ALL_MASK
;
247 /* Write to the Rx channel control register */
248 axienet_dma_out32(lp
, XAXIDMA_RX_CR_OFFSET
, cr
);
250 /* Start updating the Tx channel control register */
251 cr
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
252 /* Update the interrupt coalesce count */
253 cr
= (((cr
& ~XAXIDMA_COALESCE_MASK
)) |
254 ((lp
->coalesce_count_tx
) << XAXIDMA_COALESCE_SHIFT
));
255 /* Update the delay timer count */
256 cr
= (((cr
& ~XAXIDMA_DELAY_MASK
)) |
257 (XAXIDMA_DFT_TX_WAITBOUND
<< XAXIDMA_DELAY_SHIFT
));
258 /* Enable coalesce, delay timer and error interrupts */
259 cr
|= XAXIDMA_IRQ_ALL_MASK
;
260 /* Write to the Tx channel control register */
261 axienet_dma_out32(lp
, XAXIDMA_TX_CR_OFFSET
, cr
);
263 /* Populate the tail pointer and bring the Rx Axi DMA engine out of
264 * halted state. This will make the Rx side ready for reception.
266 axienet_dma_out32(lp
, XAXIDMA_RX_CDESC_OFFSET
, lp
->rx_bd_p
);
267 cr
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
268 axienet_dma_out32(lp
, XAXIDMA_RX_CR_OFFSET
,
269 cr
| XAXIDMA_CR_RUNSTOP_MASK
);
270 axienet_dma_out32(lp
, XAXIDMA_RX_TDESC_OFFSET
, lp
->rx_bd_p
+
271 (sizeof(*lp
->rx_bd_v
) * (RX_BD_NUM
- 1)));
273 /* Write to the RS (Run-stop) bit in the Tx channel control register.
274 * Tx channel is now ready to run. But only after we write to the
275 * tail pointer register that the Tx channel will start transmitting.
277 axienet_dma_out32(lp
, XAXIDMA_TX_CDESC_OFFSET
, lp
->tx_bd_p
);
278 cr
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
279 axienet_dma_out32(lp
, XAXIDMA_TX_CR_OFFSET
,
280 cr
| XAXIDMA_CR_RUNSTOP_MASK
);
284 axienet_dma_bd_release(ndev
);
289 * axienet_set_mac_address - Write the MAC address
290 * @ndev: Pointer to the net_device structure
291 * @address: 6 byte Address to be written as MAC address
293 * This function is called to initialize the MAC address of the Axi Ethernet
294 * core. It writes to the UAW0 and UAW1 registers of the core.
296 static void axienet_set_mac_address(struct net_device
*ndev
, void *address
)
298 struct axienet_local
*lp
= netdev_priv(ndev
);
301 memcpy(ndev
->dev_addr
, address
, ETH_ALEN
);
302 if (!is_valid_ether_addr(ndev
->dev_addr
))
303 eth_random_addr(ndev
->dev_addr
);
305 /* Set up unicast MAC address filter set its mac address */
306 axienet_iow(lp
, XAE_UAW0_OFFSET
,
307 (ndev
->dev_addr
[0]) |
308 (ndev
->dev_addr
[1] << 8) |
309 (ndev
->dev_addr
[2] << 16) |
310 (ndev
->dev_addr
[3] << 24));
311 axienet_iow(lp
, XAE_UAW1_OFFSET
,
312 (((axienet_ior(lp
, XAE_UAW1_OFFSET
)) &
313 ~XAE_UAW1_UNICASTADDR_MASK
) |
315 (ndev
->dev_addr
[5] << 8))));
319 * netdev_set_mac_address - Write the MAC address (from outside the driver)
320 * @ndev: Pointer to the net_device structure
321 * @p: 6 byte Address to be written as MAC address
323 * returns: 0 for all conditions. Presently, there is no failure case.
325 * This function is called to initialize the MAC address of the Axi Ethernet
326 * core. It calls the core specific axienet_set_mac_address. This is the
327 * function that goes into net_device_ops structure entry ndo_set_mac_address.
329 static int netdev_set_mac_address(struct net_device
*ndev
, void *p
)
331 struct sockaddr
*addr
= p
;
332 axienet_set_mac_address(ndev
, addr
->sa_data
);
337 * axienet_set_multicast_list - Prepare the multicast table
338 * @ndev: Pointer to the net_device structure
340 * This function is called to initialize the multicast table during
341 * initialization. The Axi Ethernet basic multicast support has a four-entry
342 * multicast table which is initialized here. Additionally this function
343 * goes into the net_device_ops structure entry ndo_set_multicast_list. This
344 * means whenever the multicast table entries need to be updated this
345 * function gets called.
347 static void axienet_set_multicast_list(struct net_device
*ndev
)
350 u32 reg
, af0reg
, af1reg
;
351 struct axienet_local
*lp
= netdev_priv(ndev
);
353 if (ndev
->flags
& (IFF_ALLMULTI
| IFF_PROMISC
) ||
354 netdev_mc_count(ndev
) > XAE_MULTICAST_CAM_TABLE_NUM
) {
355 /* We must make the kernel realize we had to move into
356 * promiscuous mode. If it was a promiscuous mode request
357 * the flag is already set. If not we set it.
359 ndev
->flags
|= IFF_PROMISC
;
360 reg
= axienet_ior(lp
, XAE_FMI_OFFSET
);
361 reg
|= XAE_FMI_PM_MASK
;
362 axienet_iow(lp
, XAE_FMI_OFFSET
, reg
);
363 dev_info(&ndev
->dev
, "Promiscuous mode enabled.\n");
364 } else if (!netdev_mc_empty(ndev
)) {
365 struct netdev_hw_addr
*ha
;
368 netdev_for_each_mc_addr(ha
, ndev
) {
369 if (i
>= XAE_MULTICAST_CAM_TABLE_NUM
)
372 af0reg
= (ha
->addr
[0]);
373 af0reg
|= (ha
->addr
[1] << 8);
374 af0reg
|= (ha
->addr
[2] << 16);
375 af0reg
|= (ha
->addr
[3] << 24);
377 af1reg
= (ha
->addr
[4]);
378 af1reg
|= (ha
->addr
[5] << 8);
380 reg
= axienet_ior(lp
, XAE_FMI_OFFSET
) & 0xFFFFFF00;
383 axienet_iow(lp
, XAE_FMI_OFFSET
, reg
);
384 axienet_iow(lp
, XAE_AF0_OFFSET
, af0reg
);
385 axienet_iow(lp
, XAE_AF1_OFFSET
, af1reg
);
389 reg
= axienet_ior(lp
, XAE_FMI_OFFSET
);
390 reg
&= ~XAE_FMI_PM_MASK
;
392 axienet_iow(lp
, XAE_FMI_OFFSET
, reg
);
394 for (i
= 0; i
< XAE_MULTICAST_CAM_TABLE_NUM
; i
++) {
395 reg
= axienet_ior(lp
, XAE_FMI_OFFSET
) & 0xFFFFFF00;
398 axienet_iow(lp
, XAE_FMI_OFFSET
, reg
);
399 axienet_iow(lp
, XAE_AF0_OFFSET
, 0);
400 axienet_iow(lp
, XAE_AF1_OFFSET
, 0);
403 dev_info(&ndev
->dev
, "Promiscuous mode disabled.\n");
408 * axienet_setoptions - Set an Axi Ethernet option
409 * @ndev: Pointer to the net_device structure
410 * @options: Option to be enabled/disabled
412 * The Axi Ethernet core has multiple features which can be selectively turned
413 * on or off. The typical options could be jumbo frame option, basic VLAN
414 * option, promiscuous mode option etc. This function is used to set or clear
415 * these options in the Axi Ethernet hardware. This is done through
416 * axienet_option structure .
418 static void axienet_setoptions(struct net_device
*ndev
, u32 options
)
421 struct axienet_local
*lp
= netdev_priv(ndev
);
422 struct axienet_option
*tp
= &axienet_options
[0];
425 reg
= ((axienet_ior(lp
, tp
->reg
)) & ~(tp
->m_or
));
426 if (options
& tp
->opt
)
428 axienet_iow(lp
, tp
->reg
, reg
);
432 lp
->options
|= options
;
435 static void __axienet_device_reset(struct axienet_local
*lp
,
436 struct device
*dev
, off_t offset
)
439 /* Reset Axi DMA. This would reset Axi Ethernet core as well. The reset
440 * process of Axi DMA takes a while to complete as all pending
441 * commands/transfers will be flushed or completed during this
444 axienet_dma_out32(lp
, offset
, XAXIDMA_CR_RESET_MASK
);
445 timeout
= DELAY_OF_ONE_MILLISEC
;
446 while (axienet_dma_in32(lp
, offset
) & XAXIDMA_CR_RESET_MASK
) {
448 if (--timeout
== 0) {
449 netdev_err(lp
->ndev
, "%s: DMA reset timeout!\n",
457 * axienet_device_reset - Reset and initialize the Axi Ethernet hardware.
458 * @ndev: Pointer to the net_device structure
460 * This function is called to reset and initialize the Axi Ethernet core. This
461 * is typically called during initialization. It does a reset of the Axi DMA
462 * Rx/Tx channels and initializes the Axi DMA BDs. Since Axi DMA reset lines
463 * areconnected to Axi Ethernet reset lines, this in turn resets the Axi
464 * Ethernet core. No separate hardware reset is done for the Axi Ethernet
467 static void axienet_device_reset(struct net_device
*ndev
)
470 struct axienet_local
*lp
= netdev_priv(ndev
);
472 __axienet_device_reset(lp
, &ndev
->dev
, XAXIDMA_TX_CR_OFFSET
);
473 __axienet_device_reset(lp
, &ndev
->dev
, XAXIDMA_RX_CR_OFFSET
);
475 lp
->max_frm_size
= XAE_MAX_VLAN_FRAME_SIZE
;
476 lp
->options
|= XAE_OPTION_VLAN
;
477 lp
->options
&= (~XAE_OPTION_JUMBO
);
479 if ((ndev
->mtu
> XAE_MTU
) &&
480 (ndev
->mtu
<= XAE_JUMBO_MTU
)) {
481 lp
->max_frm_size
= ndev
->mtu
+ VLAN_ETH_HLEN
+
484 if (lp
->max_frm_size
<= lp
->rxmem
)
485 lp
->options
|= XAE_OPTION_JUMBO
;
488 if (axienet_dma_bd_init(ndev
)) {
489 netdev_err(ndev
, "%s: descriptor allocation failed\n",
493 axienet_status
= axienet_ior(lp
, XAE_RCW1_OFFSET
);
494 axienet_status
&= ~XAE_RCW1_RX_MASK
;
495 axienet_iow(lp
, XAE_RCW1_OFFSET
, axienet_status
);
497 axienet_status
= axienet_ior(lp
, XAE_IP_OFFSET
);
498 if (axienet_status
& XAE_INT_RXRJECT_MASK
)
499 axienet_iow(lp
, XAE_IS_OFFSET
, XAE_INT_RXRJECT_MASK
);
501 axienet_iow(lp
, XAE_FCC_OFFSET
, XAE_FCC_FCRX_MASK
);
503 /* Sync default options with HW but leave receiver and
504 * transmitter disabled.
506 axienet_setoptions(ndev
, lp
->options
&
507 ~(XAE_OPTION_TXEN
| XAE_OPTION_RXEN
));
508 axienet_set_mac_address(ndev
, NULL
);
509 axienet_set_multicast_list(ndev
);
510 axienet_setoptions(ndev
, lp
->options
);
512 ndev
->trans_start
= jiffies
;
516 * axienet_adjust_link - Adjust the PHY link speed/duplex.
517 * @ndev: Pointer to the net_device structure
519 * This function is called to change the speed and duplex setting after
520 * auto negotiation is done by the PHY. This is the function that gets
521 * registered with the PHY interface through the "of_phy_connect" call.
523 static void axienet_adjust_link(struct net_device
*ndev
)
528 struct axienet_local
*lp
= netdev_priv(ndev
);
529 struct phy_device
*phy
= lp
->phy_dev
;
531 link_state
= phy
->speed
| (phy
->duplex
<< 1) | phy
->link
;
532 if (lp
->last_link
!= link_state
) {
533 if ((phy
->speed
== SPEED_10
) || (phy
->speed
== SPEED_100
)) {
534 if (lp
->phy_type
== XAE_PHY_TYPE_1000BASE_X
)
537 if ((phy
->speed
== SPEED_1000
) &&
538 (lp
->phy_type
== XAE_PHY_TYPE_MII
))
543 emmc_reg
= axienet_ior(lp
, XAE_EMMC_OFFSET
);
544 emmc_reg
&= ~XAE_EMMC_LINKSPEED_MASK
;
546 switch (phy
->speed
) {
548 emmc_reg
|= XAE_EMMC_LINKSPD_1000
;
551 emmc_reg
|= XAE_EMMC_LINKSPD_100
;
554 emmc_reg
|= XAE_EMMC_LINKSPD_10
;
557 dev_err(&ndev
->dev
, "Speed other than 10, 100 "
558 "or 1Gbps is not supported\n");
562 axienet_iow(lp
, XAE_EMMC_OFFSET
, emmc_reg
);
563 lp
->last_link
= link_state
;
564 phy_print_status(phy
);
567 "Error setting Axi Ethernet mac speed\n");
573 * axienet_start_xmit_done - Invoked once a transmit is completed by the
574 * Axi DMA Tx channel.
575 * @ndev: Pointer to the net_device structure
577 * This function is invoked from the Axi DMA Tx isr to notify the completion
578 * of transmit operation. It clears fields in the corresponding Tx BDs and
579 * unmaps the corresponding buffer so that CPU can regain ownership of the
580 * buffer. It finally invokes "netif_wake_queue" to restart transmission if
583 static void axienet_start_xmit_done(struct net_device
*ndev
)
587 struct axienet_local
*lp
= netdev_priv(ndev
);
588 struct axidma_bd
*cur_p
;
589 unsigned int status
= 0;
591 cur_p
= &lp
->tx_bd_v
[lp
->tx_bd_ci
];
592 status
= cur_p
->status
;
593 while (status
& XAXIDMA_BD_STS_COMPLETE_MASK
) {
594 dma_unmap_single(ndev
->dev
.parent
, cur_p
->phys
,
595 (cur_p
->cntrl
& XAXIDMA_BD_CTRL_LENGTH_MASK
),
598 dev_kfree_skb_irq((struct sk_buff
*)cur_p
->app4
);
606 size
+= status
& XAXIDMA_BD_STS_ACTUAL_LEN_MASK
;
610 lp
->tx_bd_ci
%= TX_BD_NUM
;
611 cur_p
= &lp
->tx_bd_v
[lp
->tx_bd_ci
];
612 status
= cur_p
->status
;
615 ndev
->stats
.tx_packets
+= packets
;
616 ndev
->stats
.tx_bytes
+= size
;
617 netif_wake_queue(ndev
);
621 * axienet_check_tx_bd_space - Checks if a BD/group of BDs are currently busy
622 * @lp: Pointer to the axienet_local structure
623 * @num_frag: The number of BDs to check for
625 * returns: 0, on success
626 * NETDEV_TX_BUSY, if any of the descriptors are not free
628 * This function is invoked before BDs are allocated and transmission starts.
629 * This function returns 0 if a BD or group of BDs can be allocated for
630 * transmission. If the BD or any of the BDs are not free the function
631 * returns a busy status. This is invoked from axienet_start_xmit.
633 static inline int axienet_check_tx_bd_space(struct axienet_local
*lp
,
636 struct axidma_bd
*cur_p
;
637 cur_p
= &lp
->tx_bd_v
[(lp
->tx_bd_tail
+ num_frag
) % TX_BD_NUM
];
638 if (cur_p
->status
& XAXIDMA_BD_STS_ALL_MASK
)
639 return NETDEV_TX_BUSY
;
644 * axienet_start_xmit - Starts the transmission.
645 * @skb: sk_buff pointer that contains data to be Txed.
646 * @ndev: Pointer to net_device structure.
648 * returns: NETDEV_TX_OK, on success
649 * NETDEV_TX_BUSY, if any of the descriptors are not free
651 * This function is invoked from upper layers to initiate transmission. The
652 * function uses the next available free BDs and populates their fields to
653 * start the transmission. Additionally if checksum offloading is supported,
654 * it populates AXI Stream Control fields with appropriate values.
656 static int axienet_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
)
664 struct axienet_local
*lp
= netdev_priv(ndev
);
665 struct axidma_bd
*cur_p
;
667 num_frag
= skb_shinfo(skb
)->nr_frags
;
668 cur_p
= &lp
->tx_bd_v
[lp
->tx_bd_tail
];
670 if (axienet_check_tx_bd_space(lp
, num_frag
)) {
671 if (!netif_queue_stopped(ndev
))
672 netif_stop_queue(ndev
);
673 return NETDEV_TX_BUSY
;
676 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
677 if (lp
->features
& XAE_FEATURE_FULL_TX_CSUM
) {
678 /* Tx Full Checksum Offload Enabled */
680 } else if (lp
->features
& XAE_FEATURE_PARTIAL_RX_CSUM
) {
681 csum_start_off
= skb_transport_offset(skb
);
682 csum_index_off
= csum_start_off
+ skb
->csum_offset
;
683 /* Tx Partial Checksum Offload Enabled */
685 cur_p
->app1
= (csum_start_off
<< 16) | csum_index_off
;
687 } else if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
688 cur_p
->app0
|= 2; /* Tx Full Checksum Offload Enabled */
691 cur_p
->cntrl
= skb_headlen(skb
) | XAXIDMA_BD_CTRL_TXSOF_MASK
;
692 cur_p
->phys
= dma_map_single(ndev
->dev
.parent
, skb
->data
,
693 skb_headlen(skb
), DMA_TO_DEVICE
);
695 for (ii
= 0; ii
< num_frag
; ii
++) {
697 lp
->tx_bd_tail
%= TX_BD_NUM
;
698 cur_p
= &lp
->tx_bd_v
[lp
->tx_bd_tail
];
699 frag
= &skb_shinfo(skb
)->frags
[ii
];
700 cur_p
->phys
= dma_map_single(ndev
->dev
.parent
,
701 skb_frag_address(frag
),
704 cur_p
->cntrl
= skb_frag_size(frag
);
707 cur_p
->cntrl
|= XAXIDMA_BD_CTRL_TXEOF_MASK
;
708 cur_p
->app4
= (unsigned long)skb
;
710 tail_p
= lp
->tx_bd_p
+ sizeof(*lp
->tx_bd_v
) * lp
->tx_bd_tail
;
711 /* Start the transfer */
712 axienet_dma_out32(lp
, XAXIDMA_TX_TDESC_OFFSET
, tail_p
);
714 lp
->tx_bd_tail
%= TX_BD_NUM
;
720 * axienet_recv - Is called from Axi DMA Rx Isr to complete the received
722 * @ndev: Pointer to net_device structure.
724 * This function is invoked from the Axi DMA Rx isr to process the Rx BDs. It
725 * does minimal processing and invokes "netif_rx" to complete further
728 static void axienet_recv(struct net_device
*ndev
)
734 dma_addr_t tail_p
= 0;
735 struct axienet_local
*lp
= netdev_priv(ndev
);
736 struct sk_buff
*skb
, *new_skb
;
737 struct axidma_bd
*cur_p
;
739 cur_p
= &lp
->rx_bd_v
[lp
->rx_bd_ci
];
741 while ((cur_p
->status
& XAXIDMA_BD_STS_COMPLETE_MASK
)) {
742 tail_p
= lp
->rx_bd_p
+ sizeof(*lp
->rx_bd_v
) * lp
->rx_bd_ci
;
743 skb
= (struct sk_buff
*) (cur_p
->sw_id_offset
);
744 length
= cur_p
->app4
& 0x0000FFFF;
746 dma_unmap_single(ndev
->dev
.parent
, cur_p
->phys
,
750 skb_put(skb
, length
);
751 skb
->protocol
= eth_type_trans(skb
, ndev
);
752 /*skb_checksum_none_assert(skb);*/
753 skb
->ip_summed
= CHECKSUM_NONE
;
755 /* if we're doing Rx csum offload, set it up */
756 if (lp
->features
& XAE_FEATURE_FULL_RX_CSUM
) {
757 csumstatus
= (cur_p
->app2
&
758 XAE_FULL_CSUM_STATUS_MASK
) >> 3;
759 if ((csumstatus
== XAE_IP_TCP_CSUM_VALIDATED
) ||
760 (csumstatus
== XAE_IP_UDP_CSUM_VALIDATED
)) {
761 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
763 } else if ((lp
->features
& XAE_FEATURE_PARTIAL_RX_CSUM
) != 0 &&
764 skb
->protocol
== htons(ETH_P_IP
) &&
766 skb
->csum
= be32_to_cpu(cur_p
->app3
& 0xFFFF);
767 skb
->ip_summed
= CHECKSUM_COMPLETE
;
775 new_skb
= netdev_alloc_skb_ip_align(ndev
, lp
->max_frm_size
);
779 cur_p
->phys
= dma_map_single(ndev
->dev
.parent
, new_skb
->data
,
782 cur_p
->cntrl
= lp
->max_frm_size
;
784 cur_p
->sw_id_offset
= (u32
) new_skb
;
787 lp
->rx_bd_ci
%= RX_BD_NUM
;
788 cur_p
= &lp
->rx_bd_v
[lp
->rx_bd_ci
];
791 ndev
->stats
.rx_packets
+= packets
;
792 ndev
->stats
.rx_bytes
+= size
;
795 axienet_dma_out32(lp
, XAXIDMA_RX_TDESC_OFFSET
, tail_p
);
799 * axienet_tx_irq - Tx Done Isr.
801 * @_ndev: net_device pointer
803 * returns: IRQ_HANDLED for all cases.
805 * This is the Axi DMA Tx done Isr. It invokes "axienet_start_xmit_done"
806 * to complete the BD processing.
808 static irqreturn_t
axienet_tx_irq(int irq
, void *_ndev
)
812 struct net_device
*ndev
= _ndev
;
813 struct axienet_local
*lp
= netdev_priv(ndev
);
815 status
= axienet_dma_in32(lp
, XAXIDMA_TX_SR_OFFSET
);
816 if (status
& (XAXIDMA_IRQ_IOC_MASK
| XAXIDMA_IRQ_DELAY_MASK
)) {
817 axienet_dma_out32(lp
, XAXIDMA_TX_SR_OFFSET
, status
);
818 axienet_start_xmit_done(lp
->ndev
);
821 if (!(status
& XAXIDMA_IRQ_ALL_MASK
))
822 dev_err(&ndev
->dev
, "No interrupts asserted in Tx path");
823 if (status
& XAXIDMA_IRQ_ERROR_MASK
) {
824 dev_err(&ndev
->dev
, "DMA Tx error 0x%x\n", status
);
825 dev_err(&ndev
->dev
, "Current BD is at: 0x%x\n",
826 (lp
->tx_bd_v
[lp
->tx_bd_ci
]).phys
);
828 cr
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
829 /* Disable coalesce, delay timer and error interrupts */
830 cr
&= (~XAXIDMA_IRQ_ALL_MASK
);
831 /* Write to the Tx channel control register */
832 axienet_dma_out32(lp
, XAXIDMA_TX_CR_OFFSET
, cr
);
834 cr
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
835 /* Disable coalesce, delay timer and error interrupts */
836 cr
&= (~XAXIDMA_IRQ_ALL_MASK
);
837 /* Write to the Rx channel control register */
838 axienet_dma_out32(lp
, XAXIDMA_RX_CR_OFFSET
, cr
);
840 tasklet_schedule(&lp
->dma_err_tasklet
);
841 axienet_dma_out32(lp
, XAXIDMA_TX_SR_OFFSET
, status
);
848 * axienet_rx_irq - Rx Isr.
850 * @_ndev: net_device pointer
852 * returns: IRQ_HANDLED for all cases.
854 * This is the Axi DMA Rx Isr. It invokes "axienet_recv" to complete the BD
857 static irqreturn_t
axienet_rx_irq(int irq
, void *_ndev
)
861 struct net_device
*ndev
= _ndev
;
862 struct axienet_local
*lp
= netdev_priv(ndev
);
864 status
= axienet_dma_in32(lp
, XAXIDMA_RX_SR_OFFSET
);
865 if (status
& (XAXIDMA_IRQ_IOC_MASK
| XAXIDMA_IRQ_DELAY_MASK
)) {
866 axienet_dma_out32(lp
, XAXIDMA_RX_SR_OFFSET
, status
);
867 axienet_recv(lp
->ndev
);
870 if (!(status
& XAXIDMA_IRQ_ALL_MASK
))
871 dev_err(&ndev
->dev
, "No interrupts asserted in Rx path");
872 if (status
& XAXIDMA_IRQ_ERROR_MASK
) {
873 dev_err(&ndev
->dev
, "DMA Rx error 0x%x\n", status
);
874 dev_err(&ndev
->dev
, "Current BD is at: 0x%x\n",
875 (lp
->rx_bd_v
[lp
->rx_bd_ci
]).phys
);
877 cr
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
878 /* Disable coalesce, delay timer and error interrupts */
879 cr
&= (~XAXIDMA_IRQ_ALL_MASK
);
880 /* Finally write to the Tx channel control register */
881 axienet_dma_out32(lp
, XAXIDMA_TX_CR_OFFSET
, cr
);
883 cr
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
884 /* Disable coalesce, delay timer and error interrupts */
885 cr
&= (~XAXIDMA_IRQ_ALL_MASK
);
886 /* write to the Rx channel control register */
887 axienet_dma_out32(lp
, XAXIDMA_RX_CR_OFFSET
, cr
);
889 tasklet_schedule(&lp
->dma_err_tasklet
);
890 axienet_dma_out32(lp
, XAXIDMA_RX_SR_OFFSET
, status
);
896 static void axienet_dma_err_handler(unsigned long data
);
899 * axienet_open - Driver open routine.
900 * @ndev: Pointer to net_device structure
902 * returns: 0, on success.
903 * -ENODEV, if PHY cannot be connected to
904 * non-zero error value on failure
906 * This is the driver open routine. It calls phy_start to start the PHY device.
907 * It also allocates interrupt service routines, enables the interrupt lines
908 * and ISR handling. Axi Ethernet core is reset through Axi DMA core. Buffer
909 * descriptors are initialized.
911 static int axienet_open(struct net_device
*ndev
)
914 struct axienet_local
*lp
= netdev_priv(ndev
);
916 dev_dbg(&ndev
->dev
, "axienet_open()\n");
918 mdio_mcreg
= axienet_ior(lp
, XAE_MDIO_MC_OFFSET
);
919 ret
= axienet_mdio_wait_until_ready(lp
);
922 /* Disable the MDIO interface till Axi Ethernet Reset is completed.
923 * When we do an Axi Ethernet reset, it resets the complete core
924 * including the MDIO. If MDIO is not disabled when the reset
925 * process is started, MDIO will be broken afterwards.
927 axienet_iow(lp
, XAE_MDIO_MC_OFFSET
,
928 (mdio_mcreg
& (~XAE_MDIO_MC_MDIOEN_MASK
)));
929 axienet_device_reset(ndev
);
930 /* Enable the MDIO */
931 axienet_iow(lp
, XAE_MDIO_MC_OFFSET
, mdio_mcreg
);
932 ret
= axienet_mdio_wait_until_ready(lp
);
937 if (lp
->phy_type
== XAE_PHY_TYPE_GMII
) {
938 lp
->phy_dev
= of_phy_connect(lp
->ndev
, lp
->phy_node
,
939 axienet_adjust_link
, 0,
940 PHY_INTERFACE_MODE_GMII
);
941 } else if (lp
->phy_type
== XAE_PHY_TYPE_RGMII_2_0
) {
942 lp
->phy_dev
= of_phy_connect(lp
->ndev
, lp
->phy_node
,
943 axienet_adjust_link
, 0,
944 PHY_INTERFACE_MODE_RGMII_ID
);
948 dev_err(lp
->dev
, "of_phy_connect() failed\n");
950 phy_start(lp
->phy_dev
);
953 /* Enable tasklets for Axi DMA error handling */
954 tasklet_init(&lp
->dma_err_tasklet
, axienet_dma_err_handler
,
957 /* Enable interrupts for Axi DMA Tx */
958 ret
= request_irq(lp
->tx_irq
, axienet_tx_irq
, 0, ndev
->name
, ndev
);
961 /* Enable interrupts for Axi DMA Rx */
962 ret
= request_irq(lp
->rx_irq
, axienet_rx_irq
, 0, ndev
->name
, ndev
);
969 free_irq(lp
->tx_irq
, ndev
);
972 phy_disconnect(lp
->phy_dev
);
974 tasklet_kill(&lp
->dma_err_tasklet
);
975 dev_err(lp
->dev
, "request_irq() failed\n");
980 * axienet_stop - Driver stop routine.
981 * @ndev: Pointer to net_device structure
983 * returns: 0, on success.
985 * This is the driver stop routine. It calls phy_disconnect to stop the PHY
986 * device. It also removes the interrupt handlers and disables the interrupts.
987 * The Axi DMA Tx/Rx BDs are released.
989 static int axienet_stop(struct net_device
*ndev
)
992 struct axienet_local
*lp
= netdev_priv(ndev
);
994 dev_dbg(&ndev
->dev
, "axienet_close()\n");
996 cr
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
997 axienet_dma_out32(lp
, XAXIDMA_RX_CR_OFFSET
,
998 cr
& (~XAXIDMA_CR_RUNSTOP_MASK
));
999 cr
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
1000 axienet_dma_out32(lp
, XAXIDMA_TX_CR_OFFSET
,
1001 cr
& (~XAXIDMA_CR_RUNSTOP_MASK
));
1002 axienet_setoptions(ndev
, lp
->options
&
1003 ~(XAE_OPTION_TXEN
| XAE_OPTION_RXEN
));
1005 tasklet_kill(&lp
->dma_err_tasklet
);
1007 free_irq(lp
->tx_irq
, ndev
);
1008 free_irq(lp
->rx_irq
, ndev
);
1011 phy_disconnect(lp
->phy_dev
);
1014 axienet_dma_bd_release(ndev
);
1019 * axienet_change_mtu - Driver change mtu routine.
1020 * @ndev: Pointer to net_device structure
1021 * @new_mtu: New mtu value to be applied
1023 * returns: Always returns 0 (success).
1025 * This is the change mtu driver routine. It checks if the Axi Ethernet
1026 * hardware supports jumbo frames before changing the mtu. This can be
1027 * called only when the device is not up.
1029 static int axienet_change_mtu(struct net_device
*ndev
, int new_mtu
)
1031 struct axienet_local
*lp
= netdev_priv(ndev
);
1033 if (netif_running(ndev
))
1036 if ((new_mtu
+ VLAN_ETH_HLEN
+
1037 XAE_TRL_SIZE
) > lp
->rxmem
)
1040 if ((new_mtu
> XAE_JUMBO_MTU
) || (new_mtu
< 64))
1043 ndev
->mtu
= new_mtu
;
1048 #ifdef CONFIG_NET_POLL_CONTROLLER
1050 * axienet_poll_controller - Axi Ethernet poll mechanism.
1051 * @ndev: Pointer to net_device structure
1053 * This implements Rx/Tx ISR poll mechanisms. The interrupts are disabled prior
1054 * to polling the ISRs and are enabled back after the polling is done.
1056 static void axienet_poll_controller(struct net_device
*ndev
)
1058 struct axienet_local
*lp
= netdev_priv(ndev
);
1059 disable_irq(lp
->tx_irq
);
1060 disable_irq(lp
->rx_irq
);
1061 axienet_rx_irq(lp
->tx_irq
, ndev
);
1062 axienet_tx_irq(lp
->rx_irq
, ndev
);
1063 enable_irq(lp
->tx_irq
);
1064 enable_irq(lp
->rx_irq
);
1068 static const struct net_device_ops axienet_netdev_ops
= {
1069 .ndo_open
= axienet_open
,
1070 .ndo_stop
= axienet_stop
,
1071 .ndo_start_xmit
= axienet_start_xmit
,
1072 .ndo_change_mtu
= axienet_change_mtu
,
1073 .ndo_set_mac_address
= netdev_set_mac_address
,
1074 .ndo_validate_addr
= eth_validate_addr
,
1075 .ndo_set_rx_mode
= axienet_set_multicast_list
,
1076 #ifdef CONFIG_NET_POLL_CONTROLLER
1077 .ndo_poll_controller
= axienet_poll_controller
,
1082 * axienet_ethtools_get_settings - Get Axi Ethernet settings related to PHY.
1083 * @ndev: Pointer to net_device structure
1084 * @ecmd: Pointer to ethtool_cmd structure
1086 * This implements ethtool command for getting PHY settings. If PHY could
1087 * not be found, the function returns -ENODEV. This function calls the
1088 * relevant PHY ethtool API to get the PHY settings.
1089 * Issue "ethtool ethX" under linux prompt to execute this function.
1091 static int axienet_ethtools_get_settings(struct net_device
*ndev
,
1092 struct ethtool_cmd
*ecmd
)
1094 struct axienet_local
*lp
= netdev_priv(ndev
);
1095 struct phy_device
*phydev
= lp
->phy_dev
;
1098 return phy_ethtool_gset(phydev
, ecmd
);
1102 * axienet_ethtools_set_settings - Set PHY settings as passed in the argument.
1103 * @ndev: Pointer to net_device structure
1104 * @ecmd: Pointer to ethtool_cmd structure
1106 * This implements ethtool command for setting various PHY settings. If PHY
1107 * could not be found, the function returns -ENODEV. This function calls the
1108 * relevant PHY ethtool API to set the PHY.
1109 * Issue e.g. "ethtool -s ethX speed 1000" under linux prompt to execute this
1112 static int axienet_ethtools_set_settings(struct net_device
*ndev
,
1113 struct ethtool_cmd
*ecmd
)
1115 struct axienet_local
*lp
= netdev_priv(ndev
);
1116 struct phy_device
*phydev
= lp
->phy_dev
;
1119 return phy_ethtool_sset(phydev
, ecmd
);
1123 * axienet_ethtools_get_drvinfo - Get various Axi Ethernet driver information.
1124 * @ndev: Pointer to net_device structure
1125 * @ed: Pointer to ethtool_drvinfo structure
1127 * This implements ethtool command for getting the driver information.
1128 * Issue "ethtool -i ethX" under linux prompt to execute this function.
1130 static void axienet_ethtools_get_drvinfo(struct net_device
*ndev
,
1131 struct ethtool_drvinfo
*ed
)
1133 strlcpy(ed
->driver
, DRIVER_NAME
, sizeof(ed
->driver
));
1134 strlcpy(ed
->version
, DRIVER_VERSION
, sizeof(ed
->version
));
1135 ed
->regdump_len
= sizeof(u32
) * AXIENET_REGS_N
;
1139 * axienet_ethtools_get_regs_len - Get the total regs length present in the
1141 * @ndev: Pointer to net_device structure
1143 * This implements ethtool command for getting the total register length
1146 static int axienet_ethtools_get_regs_len(struct net_device
*ndev
)
1148 return sizeof(u32
) * AXIENET_REGS_N
;
1152 * axienet_ethtools_get_regs - Dump the contents of all registers present
1153 * in AxiEthernet core.
1154 * @ndev: Pointer to net_device structure
1155 * @regs: Pointer to ethtool_regs structure
1156 * @ret: Void pointer used to return the contents of the registers.
1158 * This implements ethtool command for getting the Axi Ethernet register dump.
1159 * Issue "ethtool -d ethX" to execute this function.
1161 static void axienet_ethtools_get_regs(struct net_device
*ndev
,
1162 struct ethtool_regs
*regs
, void *ret
)
1164 u32
*data
= (u32
*) ret
;
1165 size_t len
= sizeof(u32
) * AXIENET_REGS_N
;
1166 struct axienet_local
*lp
= netdev_priv(ndev
);
1171 memset(data
, 0, len
);
1172 data
[0] = axienet_ior(lp
, XAE_RAF_OFFSET
);
1173 data
[1] = axienet_ior(lp
, XAE_TPF_OFFSET
);
1174 data
[2] = axienet_ior(lp
, XAE_IFGP_OFFSET
);
1175 data
[3] = axienet_ior(lp
, XAE_IS_OFFSET
);
1176 data
[4] = axienet_ior(lp
, XAE_IP_OFFSET
);
1177 data
[5] = axienet_ior(lp
, XAE_IE_OFFSET
);
1178 data
[6] = axienet_ior(lp
, XAE_TTAG_OFFSET
);
1179 data
[7] = axienet_ior(lp
, XAE_RTAG_OFFSET
);
1180 data
[8] = axienet_ior(lp
, XAE_UAWL_OFFSET
);
1181 data
[9] = axienet_ior(lp
, XAE_UAWU_OFFSET
);
1182 data
[10] = axienet_ior(lp
, XAE_TPID0_OFFSET
);
1183 data
[11] = axienet_ior(lp
, XAE_TPID1_OFFSET
);
1184 data
[12] = axienet_ior(lp
, XAE_PPST_OFFSET
);
1185 data
[13] = axienet_ior(lp
, XAE_RCW0_OFFSET
);
1186 data
[14] = axienet_ior(lp
, XAE_RCW1_OFFSET
);
1187 data
[15] = axienet_ior(lp
, XAE_TC_OFFSET
);
1188 data
[16] = axienet_ior(lp
, XAE_FCC_OFFSET
);
1189 data
[17] = axienet_ior(lp
, XAE_EMMC_OFFSET
);
1190 data
[18] = axienet_ior(lp
, XAE_PHYC_OFFSET
);
1191 data
[19] = axienet_ior(lp
, XAE_MDIO_MC_OFFSET
);
1192 data
[20] = axienet_ior(lp
, XAE_MDIO_MCR_OFFSET
);
1193 data
[21] = axienet_ior(lp
, XAE_MDIO_MWD_OFFSET
);
1194 data
[22] = axienet_ior(lp
, XAE_MDIO_MRD_OFFSET
);
1195 data
[23] = axienet_ior(lp
, XAE_MDIO_MIS_OFFSET
);
1196 data
[24] = axienet_ior(lp
, XAE_MDIO_MIP_OFFSET
);
1197 data
[25] = axienet_ior(lp
, XAE_MDIO_MIE_OFFSET
);
1198 data
[26] = axienet_ior(lp
, XAE_MDIO_MIC_OFFSET
);
1199 data
[27] = axienet_ior(lp
, XAE_UAW0_OFFSET
);
1200 data
[28] = axienet_ior(lp
, XAE_UAW1_OFFSET
);
1201 data
[29] = axienet_ior(lp
, XAE_FMI_OFFSET
);
1202 data
[30] = axienet_ior(lp
, XAE_AF0_OFFSET
);
1203 data
[31] = axienet_ior(lp
, XAE_AF1_OFFSET
);
1207 * axienet_ethtools_get_pauseparam - Get the pause parameter setting for
1209 * @ndev: Pointer to net_device structure
1210 * @epauseparm: Pointer to ethtool_pauseparam structure.
1212 * This implements ethtool command for getting axi ethernet pause frame
1213 * setting. Issue "ethtool -a ethX" to execute this function.
1216 axienet_ethtools_get_pauseparam(struct net_device
*ndev
,
1217 struct ethtool_pauseparam
*epauseparm
)
1220 struct axienet_local
*lp
= netdev_priv(ndev
);
1221 epauseparm
->autoneg
= 0;
1222 regval
= axienet_ior(lp
, XAE_FCC_OFFSET
);
1223 epauseparm
->tx_pause
= regval
& XAE_FCC_FCTX_MASK
;
1224 epauseparm
->rx_pause
= regval
& XAE_FCC_FCRX_MASK
;
1228 * axienet_ethtools_set_pauseparam - Set device pause parameter(flow control)
1230 * @ndev: Pointer to net_device structure
1231 * @epauseparam:Pointer to ethtool_pauseparam structure
1233 * This implements ethtool command for enabling flow control on Rx and Tx
1234 * paths. Issue "ethtool -A ethX tx on|off" under linux prompt to execute this
1238 axienet_ethtools_set_pauseparam(struct net_device
*ndev
,
1239 struct ethtool_pauseparam
*epauseparm
)
1242 struct axienet_local
*lp
= netdev_priv(ndev
);
1244 if (netif_running(ndev
)) {
1246 "Please stop netif before applying configuration\n");
1250 regval
= axienet_ior(lp
, XAE_FCC_OFFSET
);
1251 if (epauseparm
->tx_pause
)
1252 regval
|= XAE_FCC_FCTX_MASK
;
1254 regval
&= ~XAE_FCC_FCTX_MASK
;
1255 if (epauseparm
->rx_pause
)
1256 regval
|= XAE_FCC_FCRX_MASK
;
1258 regval
&= ~XAE_FCC_FCRX_MASK
;
1259 axienet_iow(lp
, XAE_FCC_OFFSET
, regval
);
1265 * axienet_ethtools_get_coalesce - Get DMA interrupt coalescing count.
1266 * @ndev: Pointer to net_device structure
1267 * @ecoalesce: Pointer to ethtool_coalesce structure
1269 * This implements ethtool command for getting the DMA interrupt coalescing
1270 * count on Tx and Rx paths. Issue "ethtool -c ethX" under linux prompt to
1271 * execute this function.
1273 static int axienet_ethtools_get_coalesce(struct net_device
*ndev
,
1274 struct ethtool_coalesce
*ecoalesce
)
1277 struct axienet_local
*lp
= netdev_priv(ndev
);
1278 regval
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
1279 ecoalesce
->rx_max_coalesced_frames
= (regval
& XAXIDMA_COALESCE_MASK
)
1280 >> XAXIDMA_COALESCE_SHIFT
;
1281 regval
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
1282 ecoalesce
->tx_max_coalesced_frames
= (regval
& XAXIDMA_COALESCE_MASK
)
1283 >> XAXIDMA_COALESCE_SHIFT
;
1288 * axienet_ethtools_set_coalesce - Set DMA interrupt coalescing count.
1289 * @ndev: Pointer to net_device structure
1290 * @ecoalesce: Pointer to ethtool_coalesce structure
1292 * This implements ethtool command for setting the DMA interrupt coalescing
1293 * count on Tx and Rx paths. Issue "ethtool -C ethX rx-frames 5" under linux
1294 * prompt to execute this function.
1296 static int axienet_ethtools_set_coalesce(struct net_device
*ndev
,
1297 struct ethtool_coalesce
*ecoalesce
)
1299 struct axienet_local
*lp
= netdev_priv(ndev
);
1301 if (netif_running(ndev
)) {
1303 "Please stop netif before applying configuration\n");
1307 if ((ecoalesce
->rx_coalesce_usecs
) ||
1308 (ecoalesce
->rx_coalesce_usecs_irq
) ||
1309 (ecoalesce
->rx_max_coalesced_frames_irq
) ||
1310 (ecoalesce
->tx_coalesce_usecs
) ||
1311 (ecoalesce
->tx_coalesce_usecs_irq
) ||
1312 (ecoalesce
->tx_max_coalesced_frames_irq
) ||
1313 (ecoalesce
->stats_block_coalesce_usecs
) ||
1314 (ecoalesce
->use_adaptive_rx_coalesce
) ||
1315 (ecoalesce
->use_adaptive_tx_coalesce
) ||
1316 (ecoalesce
->pkt_rate_low
) ||
1317 (ecoalesce
->rx_coalesce_usecs_low
) ||
1318 (ecoalesce
->rx_max_coalesced_frames_low
) ||
1319 (ecoalesce
->tx_coalesce_usecs_low
) ||
1320 (ecoalesce
->tx_max_coalesced_frames_low
) ||
1321 (ecoalesce
->pkt_rate_high
) ||
1322 (ecoalesce
->rx_coalesce_usecs_high
) ||
1323 (ecoalesce
->rx_max_coalesced_frames_high
) ||
1324 (ecoalesce
->tx_coalesce_usecs_high
) ||
1325 (ecoalesce
->tx_max_coalesced_frames_high
) ||
1326 (ecoalesce
->rate_sample_interval
))
1328 if (ecoalesce
->rx_max_coalesced_frames
)
1329 lp
->coalesce_count_rx
= ecoalesce
->rx_max_coalesced_frames
;
1330 if (ecoalesce
->tx_max_coalesced_frames
)
1331 lp
->coalesce_count_tx
= ecoalesce
->tx_max_coalesced_frames
;
1336 static struct ethtool_ops axienet_ethtool_ops
= {
1337 .get_settings
= axienet_ethtools_get_settings
,
1338 .set_settings
= axienet_ethtools_set_settings
,
1339 .get_drvinfo
= axienet_ethtools_get_drvinfo
,
1340 .get_regs_len
= axienet_ethtools_get_regs_len
,
1341 .get_regs
= axienet_ethtools_get_regs
,
1342 .get_link
= ethtool_op_get_link
,
1343 .get_pauseparam
= axienet_ethtools_get_pauseparam
,
1344 .set_pauseparam
= axienet_ethtools_set_pauseparam
,
1345 .get_coalesce
= axienet_ethtools_get_coalesce
,
1346 .set_coalesce
= axienet_ethtools_set_coalesce
,
1350 * axienet_dma_err_handler - Tasklet handler for Axi DMA Error
1351 * @data: Data passed
1353 * Resets the Axi DMA and Axi Ethernet devices, and reconfigures the
1356 static void axienet_dma_err_handler(unsigned long data
)
1361 struct axienet_local
*lp
= (struct axienet_local
*) data
;
1362 struct net_device
*ndev
= lp
->ndev
;
1363 struct axidma_bd
*cur_p
;
1365 axienet_setoptions(ndev
, lp
->options
&
1366 ~(XAE_OPTION_TXEN
| XAE_OPTION_RXEN
));
1367 mdio_mcreg
= axienet_ior(lp
, XAE_MDIO_MC_OFFSET
);
1368 axienet_mdio_wait_until_ready(lp
);
1369 /* Disable the MDIO interface till Axi Ethernet Reset is completed.
1370 * When we do an Axi Ethernet reset, it resets the complete core
1371 * including the MDIO. So if MDIO is not disabled when the reset
1372 * process is started, MDIO will be broken afterwards.
1374 axienet_iow(lp
, XAE_MDIO_MC_OFFSET
, (mdio_mcreg
&
1375 ~XAE_MDIO_MC_MDIOEN_MASK
));
1377 __axienet_device_reset(lp
, &ndev
->dev
, XAXIDMA_TX_CR_OFFSET
);
1378 __axienet_device_reset(lp
, &ndev
->dev
, XAXIDMA_RX_CR_OFFSET
);
1380 axienet_iow(lp
, XAE_MDIO_MC_OFFSET
, mdio_mcreg
);
1381 axienet_mdio_wait_until_ready(lp
);
1383 for (i
= 0; i
< TX_BD_NUM
; i
++) {
1384 cur_p
= &lp
->tx_bd_v
[i
];
1386 dma_unmap_single(ndev
->dev
.parent
, cur_p
->phys
,
1388 XAXIDMA_BD_CTRL_LENGTH_MASK
),
1391 dev_kfree_skb_irq((struct sk_buff
*) cur_p
->app4
);
1400 cur_p
->sw_id_offset
= 0;
1403 for (i
= 0; i
< RX_BD_NUM
; i
++) {
1404 cur_p
= &lp
->rx_bd_v
[i
];
1417 /* Start updating the Rx channel control register */
1418 cr
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
1419 /* Update the interrupt coalesce count */
1420 cr
= ((cr
& ~XAXIDMA_COALESCE_MASK
) |
1421 (XAXIDMA_DFT_RX_THRESHOLD
<< XAXIDMA_COALESCE_SHIFT
));
1422 /* Update the delay timer count */
1423 cr
= ((cr
& ~XAXIDMA_DELAY_MASK
) |
1424 (XAXIDMA_DFT_RX_WAITBOUND
<< XAXIDMA_DELAY_SHIFT
));
1425 /* Enable coalesce, delay timer and error interrupts */
1426 cr
|= XAXIDMA_IRQ_ALL_MASK
;
1427 /* Finally write to the Rx channel control register */
1428 axienet_dma_out32(lp
, XAXIDMA_RX_CR_OFFSET
, cr
);
1430 /* Start updating the Tx channel control register */
1431 cr
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
1432 /* Update the interrupt coalesce count */
1433 cr
= (((cr
& ~XAXIDMA_COALESCE_MASK
)) |
1434 (XAXIDMA_DFT_TX_THRESHOLD
<< XAXIDMA_COALESCE_SHIFT
));
1435 /* Update the delay timer count */
1436 cr
= (((cr
& ~XAXIDMA_DELAY_MASK
)) |
1437 (XAXIDMA_DFT_TX_WAITBOUND
<< XAXIDMA_DELAY_SHIFT
));
1438 /* Enable coalesce, delay timer and error interrupts */
1439 cr
|= XAXIDMA_IRQ_ALL_MASK
;
1440 /* Finally write to the Tx channel control register */
1441 axienet_dma_out32(lp
, XAXIDMA_TX_CR_OFFSET
, cr
);
1443 /* Populate the tail pointer and bring the Rx Axi DMA engine out of
1444 * halted state. This will make the Rx side ready for reception.
1446 axienet_dma_out32(lp
, XAXIDMA_RX_CDESC_OFFSET
, lp
->rx_bd_p
);
1447 cr
= axienet_dma_in32(lp
, XAXIDMA_RX_CR_OFFSET
);
1448 axienet_dma_out32(lp
, XAXIDMA_RX_CR_OFFSET
,
1449 cr
| XAXIDMA_CR_RUNSTOP_MASK
);
1450 axienet_dma_out32(lp
, XAXIDMA_RX_TDESC_OFFSET
, lp
->rx_bd_p
+
1451 (sizeof(*lp
->rx_bd_v
) * (RX_BD_NUM
- 1)));
1453 /* Write to the RS (Run-stop) bit in the Tx channel control register.
1454 * Tx channel is now ready to run. But only after we write to the
1455 * tail pointer register that the Tx channel will start transmitting
1457 axienet_dma_out32(lp
, XAXIDMA_TX_CDESC_OFFSET
, lp
->tx_bd_p
);
1458 cr
= axienet_dma_in32(lp
, XAXIDMA_TX_CR_OFFSET
);
1459 axienet_dma_out32(lp
, XAXIDMA_TX_CR_OFFSET
,
1460 cr
| XAXIDMA_CR_RUNSTOP_MASK
);
1462 axienet_status
= axienet_ior(lp
, XAE_RCW1_OFFSET
);
1463 axienet_status
&= ~XAE_RCW1_RX_MASK
;
1464 axienet_iow(lp
, XAE_RCW1_OFFSET
, axienet_status
);
1466 axienet_status
= axienet_ior(lp
, XAE_IP_OFFSET
);
1467 if (axienet_status
& XAE_INT_RXRJECT_MASK
)
1468 axienet_iow(lp
, XAE_IS_OFFSET
, XAE_INT_RXRJECT_MASK
);
1469 axienet_iow(lp
, XAE_FCC_OFFSET
, XAE_FCC_FCRX_MASK
);
1471 /* Sync default options with HW but leave receiver and
1472 * transmitter disabled.
1474 axienet_setoptions(ndev
, lp
->options
&
1475 ~(XAE_OPTION_TXEN
| XAE_OPTION_RXEN
));
1476 axienet_set_mac_address(ndev
, NULL
);
1477 axienet_set_multicast_list(ndev
);
1478 axienet_setoptions(ndev
, lp
->options
);
1482 * axienet_probe - Axi Ethernet probe function.
1483 * @pdev: Pointer to platform device structure.
1484 * @match: Pointer to device id structure
1486 * returns: 0, on success
1487 * Non-zero error value on failure.
1489 * This is the probe routine for Axi Ethernet driver. This is called before
1490 * any other driver routines are invoked. It allocates and sets up the Ethernet
1491 * device. Parses through device tree and populates fields of
1492 * axienet_local. It registers the Ethernet device.
1494 static int axienet_probe(struct platform_device
*pdev
)
1497 struct device_node
*np
;
1498 struct axienet_local
*lp
;
1499 struct net_device
*ndev
;
1501 struct resource
*ethres
, dmares
;
1504 ndev
= alloc_etherdev(sizeof(*lp
));
1508 platform_set_drvdata(pdev
, ndev
);
1510 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1511 ndev
->flags
&= ~IFF_MULTICAST
; /* clear multicast */
1512 ndev
->features
= NETIF_F_SG
;
1513 ndev
->netdev_ops
= &axienet_netdev_ops
;
1514 ndev
->ethtool_ops
= &axienet_ethtool_ops
;
1516 lp
= netdev_priv(ndev
);
1518 lp
->dev
= &pdev
->dev
;
1519 lp
->options
= XAE_OPTION_DEFAULTS
;
1520 /* Map device registers */
1521 ethres
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1522 lp
->regs
= devm_ioremap_resource(&pdev
->dev
, ethres
);
1524 dev_err(&pdev
->dev
, "could not map Axi Ethernet regs.\n");
1529 /* Setup checksum offload, but default to off if not specified */
1532 ret
= of_property_read_u32(pdev
->dev
.of_node
, "xlnx,txcsum", &value
);
1536 lp
->csum_offload_on_tx_path
=
1537 XAE_FEATURE_PARTIAL_TX_CSUM
;
1538 lp
->features
|= XAE_FEATURE_PARTIAL_TX_CSUM
;
1539 /* Can checksum TCP/UDP over IPv4. */
1540 ndev
->features
|= NETIF_F_IP_CSUM
;
1543 lp
->csum_offload_on_tx_path
=
1544 XAE_FEATURE_FULL_TX_CSUM
;
1545 lp
->features
|= XAE_FEATURE_FULL_TX_CSUM
;
1546 /* Can checksum TCP/UDP over IPv4. */
1547 ndev
->features
|= NETIF_F_IP_CSUM
;
1550 lp
->csum_offload_on_tx_path
= XAE_NO_CSUM_OFFLOAD
;
1553 ret
= of_property_read_u32(pdev
->dev
.of_node
, "xlnx,rxcsum", &value
);
1557 lp
->csum_offload_on_rx_path
=
1558 XAE_FEATURE_PARTIAL_RX_CSUM
;
1559 lp
->features
|= XAE_FEATURE_PARTIAL_RX_CSUM
;
1562 lp
->csum_offload_on_rx_path
=
1563 XAE_FEATURE_FULL_RX_CSUM
;
1564 lp
->features
|= XAE_FEATURE_FULL_RX_CSUM
;
1567 lp
->csum_offload_on_rx_path
= XAE_NO_CSUM_OFFLOAD
;
1570 /* For supporting jumbo frames, the Axi Ethernet hardware must have
1571 * a larger Rx/Tx Memory. Typically, the size must be large so that
1572 * we can enable jumbo option and start supporting jumbo frames.
1573 * Here we check for memory allocated for Rx/Tx in the hardware from
1574 * the device-tree and accordingly set flags.
1576 of_property_read_u32(pdev
->dev
.of_node
, "xlnx,rxmem", &lp
->rxmem
);
1577 of_property_read_u32(pdev
->dev
.of_node
, "xlnx,phy-type", &lp
->phy_type
);
1579 /* Find the DMA node, map the DMA registers, and decode the DMA IRQs */
1580 np
= of_parse_phandle(pdev
->dev
.of_node
, "axistream-connected", 0);
1582 dev_err(&pdev
->dev
, "could not find DMA node\n");
1586 ret
= of_address_to_resource(np
, 0, &dmares
);
1588 dev_err(&pdev
->dev
, "unable to get DMA resource\n");
1591 lp
->dma_regs
= devm_ioremap_resource(&pdev
->dev
, &dmares
);
1592 if (!lp
->dma_regs
) {
1593 dev_err(&pdev
->dev
, "could not map DMA regs\n");
1597 lp
->rx_irq
= irq_of_parse_and_map(np
, 1);
1598 lp
->tx_irq
= irq_of_parse_and_map(np
, 0);
1600 if ((lp
->rx_irq
<= 0) || (lp
->tx_irq
<= 0)) {
1601 dev_err(&pdev
->dev
, "could not determine irqs\n");
1606 /* Retrieve the MAC address */
1607 ret
= of_property_read_u8_array(pdev
->dev
.of_node
,
1608 "local-mac-address", mac_addr
, 6);
1610 dev_err(&pdev
->dev
, "could not find MAC address\n");
1613 axienet_set_mac_address(ndev
, (void *)mac_addr
);
1615 lp
->coalesce_count_rx
= XAXIDMA_DFT_RX_THRESHOLD
;
1616 lp
->coalesce_count_tx
= XAXIDMA_DFT_TX_THRESHOLD
;
1618 lp
->phy_node
= of_parse_phandle(pdev
->dev
.of_node
, "phy-handle", 0);
1620 ret
= axienet_mdio_setup(lp
, pdev
->dev
.of_node
);
1622 dev_warn(&pdev
->dev
, "error registering MDIO bus\n");
1625 ret
= register_netdev(lp
->ndev
);
1627 dev_err(lp
->dev
, "register_netdev() error (%i)\n", ret
);
1639 static int axienet_remove(struct platform_device
*pdev
)
1641 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1642 struct axienet_local
*lp
= netdev_priv(ndev
);
1644 axienet_mdio_teardown(lp
);
1645 unregister_netdev(ndev
);
1647 of_node_put(lp
->phy_node
);
1648 lp
->phy_node
= NULL
;
1655 static struct platform_driver axienet_driver
= {
1656 .probe
= axienet_probe
,
1657 .remove
= axienet_remove
,
1659 .name
= "xilinx_axienet",
1660 .of_match_table
= axienet_of_match
,
1664 module_platform_driver(axienet_driver
);
1666 MODULE_DESCRIPTION("Xilinx Axi Ethernet driver");
1667 MODULE_AUTHOR("Xilinx");
1668 MODULE_LICENSE("GPL");