net: convert print_mac to %pM
[deliverable/linux.git] / drivers / net / hamachi.c
1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
5
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
20
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 [link no longer provides useful info -jgarzik]
24 or
25 http://www.parl.clemson.edu/~keithu/hamachi.html
26
27 */
28
29 #define DRV_NAME "hamachi"
30 #define DRV_VERSION "2.1"
31 #define DRV_RELDATE "Sept 11, 2006"
32
33
34 /* A few user-configurable values. */
35
36 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
37 #define final_version
38 #define hamachi_debug debug
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
40 static int max_interrupt_work = 40;
41 static int mtu;
42 /* Default values selected by testing on a dual processor PIII-450 */
43 /* These six interrupt control parameters may be set directly when loading the
44 * module, or through the rx_params and tx_params variables
45 */
46 static int max_rx_latency = 0x11;
47 static int max_rx_gap = 0x05;
48 static int min_rx_pkt = 0x18;
49 static int max_tx_latency = 0x00;
50 static int max_tx_gap = 0x00;
51 static int min_tx_pkt = 0x30;
52
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
56 */
57 static int rx_copybreak;
58
59 /* An override for the hardware detection of bus width.
60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
61 Add 2 to disable parity detection.
62 */
63 static int force32;
64
65
66 /* Used to pass the media type, etc.
67 These exist for driver interoperability.
68 No media types are currently defined.
69 - The lower 4 bits are reserved for the media type.
70 - The next three bits may be set to one of the following:
71 0x00000000 : Autodetect PCI bus
72 0x00000010 : Force 32 bit PCI bus
73 0x00000020 : Disable parity detection
74 0x00000040 : Force 64 bit PCI bus
75 Default is autodetect
76 - The next bit can be used to force half-duplex. This is a bad
77 idea since no known implementations implement half-duplex, and,
78 in general, half-duplex for gigabit ethernet is a bad idea.
79 0x00000080 : Force half-duplex
80 Default is full-duplex.
81 - In the original driver, the ninth bit could be used to force
82 full-duplex. Maintain that for compatibility
83 0x00000200 : Force full-duplex
84 */
85 #define MAX_UNITS 8 /* More are supported, limit only on options */
86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
89 * interruput management. Parameters will be loaded as specified into
90 * the TxIntControl and RxIntControl registers.
91 *
92 * The registers are arranged as follows:
93 * 23 - 16 15 - 8 7 - 0
94 * _________________________________
95 * | min_pkt | max_gap | max_latency |
96 * ---------------------------------
97 * min_pkt : The minimum number of packets processed between
98 * interrupts.
99 * max_gap : The maximum inter-packet gap in units of 8.192 us
100 * max_latency : The absolute time between interrupts in units of 8.192 us
101 *
102 */
103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
105
106 /* Operational parameters that are set at compile time. */
107
108 /* Keep the ring sizes a power of two for compile efficiency.
109 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
110 Making the Tx ring too large decreases the effectiveness of channel
111 bonding and packet priority.
112 There are no ill effects from too-large receive rings, except for
113 excessive memory usage */
114 /* Empirically it appears that the Tx ring needs to be a little bigger
115 for these Gbit adapters or you get into an overrun condition really
116 easily. Also, things appear to work a bit better in back-to-back
117 configurations if the Rx ring is 8 times the size of the Tx ring
118 */
119 #define TX_RING_SIZE 64
120 #define RX_RING_SIZE 512
121 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
122 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
123
124 /*
125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
127 */
128
129 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
130 /* #define ADDRLEN 64 */
131
132 /*
133 * RX_CHECKSUM turns on card-generated receive checksum generation for
134 * TCP and UDP packets. Otherwise the upper layers do the calculation.
135 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
136 * easy mechanism by which to tell the TCP/UDP stack that it need not
137 * generate checksums for this device. But if somebody can find a way
138 * to get that to work, most of the card work is in here already.
139 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
140 */
141 #undef TX_CHECKSUM
142 #define RX_CHECKSUM
143
144 /* Operational parameters that usually are not changed. */
145 /* Time in jiffies before concluding the transmitter is hung. */
146 #define TX_TIMEOUT (5*HZ)
147
148 #include <linux/module.h>
149 #include <linux/kernel.h>
150 #include <linux/string.h>
151 #include <linux/timer.h>
152 #include <linux/time.h>
153 #include <linux/errno.h>
154 #include <linux/ioport.h>
155 #include <linux/slab.h>
156 #include <linux/interrupt.h>
157 #include <linux/pci.h>
158 #include <linux/init.h>
159 #include <linux/ethtool.h>
160 #include <linux/mii.h>
161 #include <linux/netdevice.h>
162 #include <linux/etherdevice.h>
163 #include <linux/skbuff.h>
164 #include <linux/ip.h>
165 #include <linux/delay.h>
166 #include <linux/bitops.h>
167
168 #include <asm/uaccess.h>
169 #include <asm/processor.h> /* Processor type for cache alignment. */
170 #include <asm/io.h>
171 #include <asm/unaligned.h>
172 #include <asm/cache.h>
173
174 static char version[] __devinitdata =
175 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
176 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
177 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
178
179
180 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
181 we need it for hardware checksumming support. FYI... some of
182 the definitions in <netinet/ip.h> conflict/duplicate those in
183 other linux headers causing many compiler warnings.
184 */
185 #ifndef IP_MF
186 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
187 #endif
188
189 /* Define IP_OFFSET to be IPOPT_OFFSET */
190 #ifndef IP_OFFSET
191 #ifdef IPOPT_OFFSET
192 #define IP_OFFSET IPOPT_OFFSET
193 #else
194 #define IP_OFFSET 2
195 #endif
196 #endif
197
198 #define RUN_AT(x) (jiffies + (x))
199
200 #ifndef ADDRLEN
201 #define ADDRLEN 32
202 #endif
203
204 /* Condensed bus+endian portability operations. */
205 #if ADDRLEN == 64
206 #define cpu_to_leXX(addr) cpu_to_le64(addr)
207 #define leXX_to_cpu(addr) le64_to_cpu(addr)
208 #else
209 #define cpu_to_leXX(addr) cpu_to_le32(addr)
210 #define leXX_to_cpu(addr) le32_to_cpu(addr)
211 #endif
212
213
214 /*
215 Theory of Operation
216
217 I. Board Compatibility
218
219 This device driver is designed for the Packet Engines "Hamachi"
220 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
221 66Mhz PCI card.
222
223 II. Board-specific settings
224
225 No jumpers exist on the board. The chip supports software correction of
226 various motherboard wiring errors, however this driver does not support
227 that feature.
228
229 III. Driver operation
230
231 IIIa. Ring buffers
232
233 The Hamachi uses a typical descriptor based bus-master architecture.
234 The descriptor list is similar to that used by the Digital Tulip.
235 This driver uses two statically allocated fixed-size descriptor lists
236 formed into rings by a branch from the final descriptor to the beginning of
237 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
238
239 This driver uses a zero-copy receive and transmit scheme similar my other
240 network drivers.
241 The driver allocates full frame size skbuffs for the Rx ring buffers at
242 open() time and passes the skb->data field to the Hamachi as receive data
243 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
244 a fresh skbuff is allocated and the frame is copied to the new skbuff.
245 When the incoming frame is larger, the skbuff is passed directly up the
246 protocol stack and replaced by a newly allocated skbuff.
247
248 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
249 using a full-sized skbuff for small frames vs. the copying costs of larger
250 frames. Gigabit cards are typically used on generously configured machines
251 and the underfilled buffers have negligible impact compared to the benefit of
252 a single allocation size, so the default value of zero results in never
253 copying packets.
254
255 IIIb/c. Transmit/Receive Structure
256
257 The Rx and Tx descriptor structure are straight-forward, with no historical
258 baggage that must be explained. Unlike the awkward DBDMA structure, there
259 are no unused fields or option bits that had only one allowable setting.
260
261 Two details should be noted about the descriptors: The chip supports both 32
262 bit and 64 bit address structures, and the length field is overwritten on
263 the receive descriptors. The descriptor length is set in the control word
264 for each channel. The development driver uses 32 bit addresses only, however
265 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
266
267 IIId. Synchronization
268
269 This driver is very similar to my other network drivers.
270 The driver runs as two independent, single-threaded flows of control. One
271 is the send-packet routine, which enforces single-threaded use by the
272 dev->tbusy flag. The other thread is the interrupt handler, which is single
273 threaded by the hardware and other software.
274
275 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
276 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
277 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
278 the 'hmp->tx_full' flag.
279
280 The interrupt handler has exclusive control over the Rx ring and records stats
281 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
282 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
283 clears both the tx_full and tbusy flags.
284
285 IV. Notes
286
287 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
288
289 IVb. References
290
291 Hamachi Engineering Design Specification, 5/15/97
292 (Note: This version was marked "Confidential".)
293
294 IVc. Errata
295
296 None noted.
297
298 V. Recent Changes
299
300 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
301 to help avoid some stall conditions -- this needs further research.
302
303 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
304 the Tx ring and is called from hamachi_start_xmit (this used to be
305 called from hamachi_interrupt but it tends to delay execution of the
306 interrupt handler and thus reduce bandwidth by reducing the latency
307 between hamachi_rx()'s). Notably, some modification has been made so
308 that the cleaning loop checks only to make sure that the DescOwn bit
309 isn't set in the status flag since the card is not required
310 to set the entire flag to zero after processing.
311
312 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
313 checked before attempting to add a buffer to the ring. If the ring is full
314 an attempt is made to free any dirty buffers and thus find space for
315 the new buffer or the function returns non-zero which should case the
316 scheduler to reschedule the buffer later.
317
318 01/15/1999 EPK Some adjustments were made to the chip initialization.
319 End-to-end flow control should now be fully active and the interrupt
320 algorithm vars have been changed. These could probably use further tuning.
321
322 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
323 set the rx and tx latencies for the Hamachi interrupts. If you're having
324 problems with network stalls, try setting these to higher values.
325 Valid values are 0x00 through 0xff.
326
327 01/15/1999 EPK In general, the overall bandwidth has increased and
328 latencies are better (sometimes by a factor of 2). Stalls are rare at
329 this point, however there still appears to be a bug somewhere between the
330 hardware and driver. TCP checksum errors under load also appear to be
331 eliminated at this point.
332
333 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
334 Rx and Tx rings. This appears to have been affecting whether a particular
335 peer-to-peer connection would hang under high load. I believe the Rx
336 rings was typically getting set correctly, but the Tx ring wasn't getting
337 the DescEndRing bit set during initialization. ??? Does this mean the
338 hamachi card is using the DescEndRing in processing even if a particular
339 slot isn't in use -- hypothetically, the card might be searching the
340 entire Tx ring for slots with the DescOwn bit set and then processing
341 them. If the DescEndRing bit isn't set, then it might just wander off
342 through memory until it hits a chunk of data with that bit set
343 and then looping back.
344
345 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
346 problem (TxCmd and RxCmd need only to be set when idle or stopped.
347
348 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
349 (Michel Mueller pointed out the ``permanently busy'' potential
350 problem here).
351
352 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
353
354 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
355 incorrectly defined and corrected (as per Michel Mueller).
356
357 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
358 were available before reseting the tbusy and tx_full flags
359 (as per Michel Mueller).
360
361 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
362
363 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
364 32 bit.
365
366 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
367 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
368 re-structuring I would like to do.
369
370 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
371 parameters on a dual P3-450 setup yielded the new default interrupt
372 mitigation parameters. Tx should interrupt VERY infrequently due to
373 Eric's scheme. Rx should be more often...
374
375 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
376 nicely with non-linux machines.
377
378 03/13/2000 KDU Experimented with some of the configuration values:
379
380 -It seems that enabling PCI performance commands for descriptors
381 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
382 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
383 leave them that way until I hear further feedback.
384
385 -Increasing the PCI_LATENCY_TIMER to 130
386 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
387 degrade performance. Leaving default at 64 pending further information.
388
389 03/14/2000 KDU Further tuning:
390
391 -adjusted boguscnt in hamachi_rx() to depend on interrupt
392 mitigation parameters chosen.
393
394 -Selected a set of interrupt parameters based on some extensive testing.
395 These may change with more testing.
396
397 TO DO:
398
399 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
400 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
401 that case.
402
403 -fix the reset procedure. It doesn't quite work.
404 */
405
406 /* A few values that may be tweaked. */
407 /* Size of each temporary Rx buffer, calculated as:
408 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
409 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
410 * 2 more because we use skb_reserve.
411 */
412 #define PKT_BUF_SZ 1538
413
414 /* For now, this is going to be set to the maximum size of an ethernet
415 * packet. Eventually, we may want to make it a variable that is
416 * related to the MTU
417 */
418 #define MAX_FRAME_SIZE 1518
419
420 /* The rest of these values should never change. */
421
422 static void hamachi_timer(unsigned long data);
423
424 enum capability_flags {CanHaveMII=1, };
425 static const struct chip_info {
426 u16 vendor_id, device_id, device_id_mask, pad;
427 const char *name;
428 void (*media_timer)(unsigned long data);
429 int flags;
430 } chip_tbl[] = {
431 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
432 {0,},
433 };
434
435 /* Offsets to the Hamachi registers. Various sizes. */
436 enum hamachi_offsets {
437 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
438 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
439 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
440 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
441 TxChecksum=0x074, RxChecksum=0x076,
442 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
443 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
444 EventStatus=0x08C,
445 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
446 /* See enum MII_offsets below. */
447 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
448 AddrMode=0x0D0, StationAddr=0x0D2,
449 /* Gigabit AutoNegotiation. */
450 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
451 ANLinkPartnerAbility=0x0EA,
452 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
453 FIFOcfg=0x0F8,
454 };
455
456 /* Offsets to the MII-mode registers. */
457 enum MII_offsets {
458 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
459 MII_Status=0xAE,
460 };
461
462 /* Bits in the interrupt status/mask registers. */
463 enum intr_status_bits {
464 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
465 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
466 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
467
468 /* The Hamachi Rx and Tx buffer descriptors. */
469 struct hamachi_desc {
470 __le32 status_n_length;
471 #if ADDRLEN == 64
472 u32 pad;
473 __le64 addr;
474 #else
475 __le32 addr;
476 #endif
477 };
478
479 /* Bits in hamachi_desc.status_n_length */
480 enum desc_status_bits {
481 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
482 DescIntr=0x10000000,
483 };
484
485 #define PRIV_ALIGN 15 /* Required alignment mask */
486 #define MII_CNT 4
487 struct hamachi_private {
488 /* Descriptor rings first for alignment. Tx requires a second descriptor
489 for status. */
490 struct hamachi_desc *rx_ring;
491 struct hamachi_desc *tx_ring;
492 struct sk_buff* rx_skbuff[RX_RING_SIZE];
493 struct sk_buff* tx_skbuff[TX_RING_SIZE];
494 dma_addr_t tx_ring_dma;
495 dma_addr_t rx_ring_dma;
496 struct net_device_stats stats;
497 struct timer_list timer; /* Media selection timer. */
498 /* Frequently used and paired value: keep adjacent for cache effect. */
499 spinlock_t lock;
500 int chip_id;
501 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
502 unsigned int cur_tx, dirty_tx;
503 unsigned int rx_buf_sz; /* Based on MTU+slack. */
504 unsigned int tx_full:1; /* The Tx queue is full. */
505 unsigned int duplex_lock:1;
506 unsigned int default_port:4; /* Last dev->if_port value. */
507 /* MII transceiver section. */
508 int mii_cnt; /* MII device addresses. */
509 struct mii_if_info mii_if; /* MII lib hooks/info */
510 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
511 u32 rx_int_var, tx_int_var; /* interrupt control variables */
512 u32 option; /* Hold on to a copy of the options */
513 struct pci_dev *pci_dev;
514 void __iomem *base;
515 };
516
517 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
518 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
519 MODULE_LICENSE("GPL");
520
521 module_param(max_interrupt_work, int, 0);
522 module_param(mtu, int, 0);
523 module_param(debug, int, 0);
524 module_param(min_rx_pkt, int, 0);
525 module_param(max_rx_gap, int, 0);
526 module_param(max_rx_latency, int, 0);
527 module_param(min_tx_pkt, int, 0);
528 module_param(max_tx_gap, int, 0);
529 module_param(max_tx_latency, int, 0);
530 module_param(rx_copybreak, int, 0);
531 module_param_array(rx_params, int, NULL, 0);
532 module_param_array(tx_params, int, NULL, 0);
533 module_param_array(options, int, NULL, 0);
534 module_param_array(full_duplex, int, NULL, 0);
535 module_param(force32, int, 0);
536 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
537 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
538 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
539 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
540 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
541 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
542 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
543 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
544 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
545 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
546 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
547 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
548 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
549 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
550 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
551
552 static int read_eeprom(void __iomem *ioaddr, int location);
553 static int mdio_read(struct net_device *dev, int phy_id, int location);
554 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
555 static int hamachi_open(struct net_device *dev);
556 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
557 static void hamachi_timer(unsigned long data);
558 static void hamachi_tx_timeout(struct net_device *dev);
559 static void hamachi_init_ring(struct net_device *dev);
560 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
561 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
562 static int hamachi_rx(struct net_device *dev);
563 static inline int hamachi_tx(struct net_device *dev);
564 static void hamachi_error(struct net_device *dev, int intr_status);
565 static int hamachi_close(struct net_device *dev);
566 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
567 static void set_rx_mode(struct net_device *dev);
568 static const struct ethtool_ops ethtool_ops;
569 static const struct ethtool_ops ethtool_ops_no_mii;
570
571 static int __devinit hamachi_init_one (struct pci_dev *pdev,
572 const struct pci_device_id *ent)
573 {
574 struct hamachi_private *hmp;
575 int option, i, rx_int_var, tx_int_var, boguscnt;
576 int chip_id = ent->driver_data;
577 int irq;
578 void __iomem *ioaddr;
579 unsigned long base;
580 static int card_idx;
581 struct net_device *dev;
582 void *ring_space;
583 dma_addr_t ring_dma;
584 int ret = -ENOMEM;
585
586 /* when built into the kernel, we only print version if device is found */
587 #ifndef MODULE
588 static int printed_version;
589 if (!printed_version++)
590 printk(version);
591 #endif
592
593 if (pci_enable_device(pdev)) {
594 ret = -EIO;
595 goto err_out;
596 }
597
598 base = pci_resource_start(pdev, 0);
599 #ifdef __alpha__ /* Really "64 bit addrs" */
600 base |= (pci_resource_start(pdev, 1) << 32);
601 #endif
602
603 pci_set_master(pdev);
604
605 i = pci_request_regions(pdev, DRV_NAME);
606 if (i)
607 return i;
608
609 irq = pdev->irq;
610 ioaddr = ioremap(base, 0x400);
611 if (!ioaddr)
612 goto err_out_release;
613
614 dev = alloc_etherdev(sizeof(struct hamachi_private));
615 if (!dev)
616 goto err_out_iounmap;
617
618 SET_NETDEV_DEV(dev, &pdev->dev);
619
620 #ifdef TX_CHECKSUM
621 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
622 dev->hard_header_len += 8; /* for cksum tag */
623 #endif
624
625 for (i = 0; i < 6; i++)
626 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
627 : readb(ioaddr + StationAddr + i);
628
629 #if ! defined(final_version)
630 if (hamachi_debug > 4)
631 for (i = 0; i < 0x10; i++)
632 printk("%2.2x%s",
633 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
634 #endif
635
636 hmp = netdev_priv(dev);
637 spin_lock_init(&hmp->lock);
638
639 hmp->mii_if.dev = dev;
640 hmp->mii_if.mdio_read = mdio_read;
641 hmp->mii_if.mdio_write = mdio_write;
642 hmp->mii_if.phy_id_mask = 0x1f;
643 hmp->mii_if.reg_num_mask = 0x1f;
644
645 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
646 if (!ring_space)
647 goto err_out_cleardev;
648 hmp->tx_ring = (struct hamachi_desc *)ring_space;
649 hmp->tx_ring_dma = ring_dma;
650
651 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
652 if (!ring_space)
653 goto err_out_unmap_tx;
654 hmp->rx_ring = (struct hamachi_desc *)ring_space;
655 hmp->rx_ring_dma = ring_dma;
656
657 /* Check for options being passed in */
658 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
659 if (dev->mem_start)
660 option = dev->mem_start;
661
662 /* If the bus size is misidentified, do the following. */
663 force32 = force32 ? force32 :
664 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
665 if (force32)
666 writeb(force32, ioaddr + VirtualJumpers);
667
668 /* Hmmm, do we really need to reset the chip???. */
669 writeb(0x01, ioaddr + ChipReset);
670
671 /* After a reset, the clock speed measurement of the PCI bus will not
672 * be valid for a moment. Wait for a little while until it is. If
673 * it takes more than 10ms, forget it.
674 */
675 udelay(10);
676 i = readb(ioaddr + PCIClkMeas);
677 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
678 udelay(10);
679 i = readb(ioaddr + PCIClkMeas);
680 }
681
682 hmp->base = ioaddr;
683 dev->base_addr = (unsigned long)ioaddr;
684 dev->irq = irq;
685 pci_set_drvdata(pdev, dev);
686
687 hmp->chip_id = chip_id;
688 hmp->pci_dev = pdev;
689
690 /* The lower four bits are the media type. */
691 if (option > 0) {
692 hmp->option = option;
693 if (option & 0x200)
694 hmp->mii_if.full_duplex = 1;
695 else if (option & 0x080)
696 hmp->mii_if.full_duplex = 0;
697 hmp->default_port = option & 15;
698 if (hmp->default_port)
699 hmp->mii_if.force_media = 1;
700 }
701 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
702 hmp->mii_if.full_duplex = 1;
703
704 /* lock the duplex mode if someone specified a value */
705 if (hmp->mii_if.full_duplex || (option & 0x080))
706 hmp->duplex_lock = 1;
707
708 /* Set interrupt tuning parameters */
709 max_rx_latency = max_rx_latency & 0x00ff;
710 max_rx_gap = max_rx_gap & 0x00ff;
711 min_rx_pkt = min_rx_pkt & 0x00ff;
712 max_tx_latency = max_tx_latency & 0x00ff;
713 max_tx_gap = max_tx_gap & 0x00ff;
714 min_tx_pkt = min_tx_pkt & 0x00ff;
715
716 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
717 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
718 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
719 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
720 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
721 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
722
723
724 /* The Hamachi-specific entries in the device structure. */
725 dev->open = &hamachi_open;
726 dev->hard_start_xmit = &hamachi_start_xmit;
727 dev->stop = &hamachi_close;
728 dev->get_stats = &hamachi_get_stats;
729 dev->set_multicast_list = &set_rx_mode;
730 dev->do_ioctl = &netdev_ioctl;
731 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
732 SET_ETHTOOL_OPS(dev, &ethtool_ops);
733 else
734 SET_ETHTOOL_OPS(dev, &ethtool_ops_no_mii);
735 dev->tx_timeout = &hamachi_tx_timeout;
736 dev->watchdog_timeo = TX_TIMEOUT;
737 if (mtu)
738 dev->mtu = mtu;
739
740 i = register_netdev(dev);
741 if (i) {
742 ret = i;
743 goto err_out_unmap_rx;
744 }
745
746 printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
747 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
748 ioaddr, dev->dev_addr, irq);
749 i = readb(ioaddr + PCIClkMeas);
750 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
751 "%2.2x, LPA %4.4x.\n",
752 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
753 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
754 readw(ioaddr + ANLinkPartnerAbility));
755
756 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
757 int phy, phy_idx = 0;
758 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
759 int mii_status = mdio_read(dev, phy, MII_BMSR);
760 if (mii_status != 0xffff &&
761 mii_status != 0x0000) {
762 hmp->phys[phy_idx++] = phy;
763 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
764 printk(KERN_INFO "%s: MII PHY found at address %d, status "
765 "0x%4.4x advertising %4.4x.\n",
766 dev->name, phy, mii_status, hmp->mii_if.advertising);
767 }
768 }
769 hmp->mii_cnt = phy_idx;
770 if (hmp->mii_cnt > 0)
771 hmp->mii_if.phy_id = hmp->phys[0];
772 else
773 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
774 }
775 /* Configure gigabit autonegotiation. */
776 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
777 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
778 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
779
780 card_idx++;
781 return 0;
782
783 err_out_unmap_rx:
784 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
785 hmp->rx_ring_dma);
786 err_out_unmap_tx:
787 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
788 hmp->tx_ring_dma);
789 err_out_cleardev:
790 free_netdev (dev);
791 err_out_iounmap:
792 iounmap(ioaddr);
793 err_out_release:
794 pci_release_regions(pdev);
795 err_out:
796 return ret;
797 }
798
799 static int __devinit read_eeprom(void __iomem *ioaddr, int location)
800 {
801 int bogus_cnt = 1000;
802
803 /* We should check busy first - per docs -KDU */
804 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
805 writew(location, ioaddr + EEAddr);
806 writeb(0x02, ioaddr + EECmdStatus);
807 bogus_cnt = 1000;
808 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
809 if (hamachi_debug > 5)
810 printk(" EEPROM status is %2.2x after %d ticks.\n",
811 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
812 return readb(ioaddr + EEData);
813 }
814
815 /* MII Managemen Data I/O accesses.
816 These routines assume the MDIO controller is idle, and do not exit until
817 the command is finished. */
818
819 static int mdio_read(struct net_device *dev, int phy_id, int location)
820 {
821 struct hamachi_private *hmp = netdev_priv(dev);
822 void __iomem *ioaddr = hmp->base;
823 int i;
824
825 /* We should check busy first - per docs -KDU */
826 for (i = 10000; i >= 0; i--)
827 if ((readw(ioaddr + MII_Status) & 1) == 0)
828 break;
829 writew((phy_id<<8) + location, ioaddr + MII_Addr);
830 writew(0x0001, ioaddr + MII_Cmd);
831 for (i = 10000; i >= 0; i--)
832 if ((readw(ioaddr + MII_Status) & 1) == 0)
833 break;
834 return readw(ioaddr + MII_Rd_Data);
835 }
836
837 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
838 {
839 struct hamachi_private *hmp = netdev_priv(dev);
840 void __iomem *ioaddr = hmp->base;
841 int i;
842
843 /* We should check busy first - per docs -KDU */
844 for (i = 10000; i >= 0; i--)
845 if ((readw(ioaddr + MII_Status) & 1) == 0)
846 break;
847 writew((phy_id<<8) + location, ioaddr + MII_Addr);
848 writew(value, ioaddr + MII_Wr_Data);
849
850 /* Wait for the command to finish. */
851 for (i = 10000; i >= 0; i--)
852 if ((readw(ioaddr + MII_Status) & 1) == 0)
853 break;
854 return;
855 }
856
857
858 static int hamachi_open(struct net_device *dev)
859 {
860 struct hamachi_private *hmp = netdev_priv(dev);
861 void __iomem *ioaddr = hmp->base;
862 int i;
863 u32 rx_int_var, tx_int_var;
864 u16 fifo_info;
865
866 i = request_irq(dev->irq, &hamachi_interrupt, IRQF_SHARED, dev->name, dev);
867 if (i)
868 return i;
869
870 if (hamachi_debug > 1)
871 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
872 dev->name, dev->irq);
873
874 hamachi_init_ring(dev);
875
876 #if ADDRLEN == 64
877 /* writellll anyone ? */
878 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
879 writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
880 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
881 writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
882 #else
883 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
884 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
885 #endif
886
887 /* TODO: It would make sense to organize this as words since the card
888 * documentation does. -KDU
889 */
890 for (i = 0; i < 6; i++)
891 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
892
893 /* Initialize other registers: with so many this eventually this will
894 converted to an offset/value list. */
895
896 /* Configure the FIFO */
897 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
898 switch (fifo_info){
899 case 0 :
900 /* No FIFO */
901 writew(0x0000, ioaddr + FIFOcfg);
902 break;
903 case 1 :
904 /* Configure the FIFO for 512K external, 16K used for Tx. */
905 writew(0x0028, ioaddr + FIFOcfg);
906 break;
907 case 2 :
908 /* Configure the FIFO for 1024 external, 32K used for Tx. */
909 writew(0x004C, ioaddr + FIFOcfg);
910 break;
911 case 3 :
912 /* Configure the FIFO for 2048 external, 32K used for Tx. */
913 writew(0x006C, ioaddr + FIFOcfg);
914 break;
915 default :
916 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
917 dev->name);
918 /* Default to no FIFO */
919 writew(0x0000, ioaddr + FIFOcfg);
920 break;
921 }
922
923 if (dev->if_port == 0)
924 dev->if_port = hmp->default_port;
925
926
927 /* Setting the Rx mode will start the Rx process. */
928 /* If someone didn't choose a duplex, default to full-duplex */
929 if (hmp->duplex_lock != 1)
930 hmp->mii_if.full_duplex = 1;
931
932 /* always 1, takes no more time to do it */
933 writew(0x0001, ioaddr + RxChecksum);
934 #ifdef TX_CHECKSUM
935 writew(0x0001, ioaddr + TxChecksum);
936 #else
937 writew(0x0000, ioaddr + TxChecksum);
938 #endif
939 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
940 writew(0x215F, ioaddr + MACCnfg);
941 writew(0x000C, ioaddr + FrameGap0);
942 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
943 writew(0x1018, ioaddr + FrameGap1);
944 /* Why do we enable receives/transmits here? -KDU */
945 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
946 /* Enable automatic generation of flow control frames, period 0xffff. */
947 writel(0x0030FFFF, ioaddr + FlowCtrl);
948 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
949
950 /* Enable legacy links. */
951 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
952 /* Initial Link LED to blinking red. */
953 writeb(0x03, ioaddr + LEDCtrl);
954
955 /* Configure interrupt mitigation. This has a great effect on
956 performance, so systems tuning should start here!. */
957
958 rx_int_var = hmp->rx_int_var;
959 tx_int_var = hmp->tx_int_var;
960
961 if (hamachi_debug > 1) {
962 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
963 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
964 (tx_int_var & 0x00ff0000) >> 16);
965 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
966 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
967 (rx_int_var & 0x00ff0000) >> 16);
968 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
969 }
970
971 writel(tx_int_var, ioaddr + TxIntrCtrl);
972 writel(rx_int_var, ioaddr + RxIntrCtrl);
973
974 set_rx_mode(dev);
975
976 netif_start_queue(dev);
977
978 /* Enable interrupts by setting the interrupt mask. */
979 writel(0x80878787, ioaddr + InterruptEnable);
980 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
981
982 /* Configure and start the DMA channels. */
983 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
984 #if ADDRLEN == 64
985 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
986 writew(0x005D, ioaddr + TxDMACtrl);
987 #else
988 writew(0x001D, ioaddr + RxDMACtrl);
989 writew(0x001D, ioaddr + TxDMACtrl);
990 #endif
991 writew(0x0001, ioaddr + RxCmd);
992
993 if (hamachi_debug > 2) {
994 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
995 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
996 }
997 /* Set the timer to check for link beat. */
998 init_timer(&hmp->timer);
999 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1000 hmp->timer.data = (unsigned long)dev;
1001 hmp->timer.function = &hamachi_timer; /* timer handler */
1002 add_timer(&hmp->timer);
1003
1004 return 0;
1005 }
1006
1007 static inline int hamachi_tx(struct net_device *dev)
1008 {
1009 struct hamachi_private *hmp = netdev_priv(dev);
1010
1011 /* Update the dirty pointer until we find an entry that is
1012 still owned by the card */
1013 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1014 int entry = hmp->dirty_tx % TX_RING_SIZE;
1015 struct sk_buff *skb;
1016
1017 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1018 break;
1019 /* Free the original skb. */
1020 skb = hmp->tx_skbuff[entry];
1021 if (skb) {
1022 pci_unmap_single(hmp->pci_dev,
1023 leXX_to_cpu(hmp->tx_ring[entry].addr),
1024 skb->len, PCI_DMA_TODEVICE);
1025 dev_kfree_skb(skb);
1026 hmp->tx_skbuff[entry] = NULL;
1027 }
1028 hmp->tx_ring[entry].status_n_length = 0;
1029 if (entry >= TX_RING_SIZE-1)
1030 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1031 cpu_to_le32(DescEndRing);
1032 hmp->stats.tx_packets++;
1033 }
1034
1035 return 0;
1036 }
1037
1038 static void hamachi_timer(unsigned long data)
1039 {
1040 struct net_device *dev = (struct net_device *)data;
1041 struct hamachi_private *hmp = netdev_priv(dev);
1042 void __iomem *ioaddr = hmp->base;
1043 int next_tick = 10*HZ;
1044
1045 if (hamachi_debug > 2) {
1046 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1047 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1048 readw(ioaddr + ANLinkPartnerAbility));
1049 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1050 "%4.4x %4.4x %4.4x.\n", dev->name,
1051 readw(ioaddr + 0x0e0),
1052 readw(ioaddr + 0x0e2),
1053 readw(ioaddr + 0x0e4),
1054 readw(ioaddr + 0x0e6),
1055 readw(ioaddr + 0x0e8),
1056 readw(ioaddr + 0x0eA));
1057 }
1058 /* We could do something here... nah. */
1059 hmp->timer.expires = RUN_AT(next_tick);
1060 add_timer(&hmp->timer);
1061 }
1062
1063 static void hamachi_tx_timeout(struct net_device *dev)
1064 {
1065 int i;
1066 struct hamachi_private *hmp = netdev_priv(dev);
1067 void __iomem *ioaddr = hmp->base;
1068
1069 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1070 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1071
1072 {
1073 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1074 for (i = 0; i < RX_RING_SIZE; i++)
1075 printk(" %8.8x", le32_to_cpu(hmp->rx_ring[i].status_n_length));
1076 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1077 for (i = 0; i < TX_RING_SIZE; i++)
1078 printk(" %4.4x", le32_to_cpu(hmp->tx_ring[i].status_n_length));
1079 printk("\n");
1080 }
1081
1082 /* Reinit the hardware and make sure the Rx and Tx processes
1083 are up and running.
1084 */
1085 dev->if_port = 0;
1086 /* The right way to do Reset. -KDU
1087 * -Clear OWN bit in all Rx/Tx descriptors
1088 * -Wait 50 uS for channels to go idle
1089 * -Turn off MAC receiver
1090 * -Issue Reset
1091 */
1092
1093 for (i = 0; i < RX_RING_SIZE; i++)
1094 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1095
1096 /* Presume that all packets in the Tx queue are gone if we have to
1097 * re-init the hardware.
1098 */
1099 for (i = 0; i < TX_RING_SIZE; i++){
1100 struct sk_buff *skb;
1101
1102 if (i >= TX_RING_SIZE - 1)
1103 hmp->tx_ring[i].status_n_length =
1104 cpu_to_le32(DescEndRing) |
1105 (hmp->tx_ring[i].status_n_length &
1106 cpu_to_le32(0x0000ffff));
1107 else
1108 hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1109 skb = hmp->tx_skbuff[i];
1110 if (skb){
1111 pci_unmap_single(hmp->pci_dev, leXX_to_cpu(hmp->tx_ring[i].addr),
1112 skb->len, PCI_DMA_TODEVICE);
1113 dev_kfree_skb(skb);
1114 hmp->tx_skbuff[i] = NULL;
1115 }
1116 }
1117
1118 udelay(60); /* Sleep 60 us just for safety sake */
1119 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1120
1121 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1122
1123 hmp->tx_full = 0;
1124 hmp->cur_rx = hmp->cur_tx = 0;
1125 hmp->dirty_rx = hmp->dirty_tx = 0;
1126 /* Rx packets are also presumed lost; however, we need to make sure a
1127 * ring of buffers is in tact. -KDU
1128 */
1129 for (i = 0; i < RX_RING_SIZE; i++){
1130 struct sk_buff *skb = hmp->rx_skbuff[i];
1131
1132 if (skb){
1133 pci_unmap_single(hmp->pci_dev,
1134 leXX_to_cpu(hmp->rx_ring[i].addr),
1135 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1136 dev_kfree_skb(skb);
1137 hmp->rx_skbuff[i] = NULL;
1138 }
1139 }
1140 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1141 for (i = 0; i < RX_RING_SIZE; i++) {
1142 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz);
1143 hmp->rx_skbuff[i] = skb;
1144 if (skb == NULL)
1145 break;
1146
1147 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1148 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1149 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1150 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1151 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1152 }
1153 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1154 /* Mark the last entry as wrapping the ring. */
1155 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1156
1157 /* Trigger an immediate transmit demand. */
1158 dev->trans_start = jiffies;
1159 hmp->stats.tx_errors++;
1160
1161 /* Restart the chip's Tx/Rx processes . */
1162 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1163 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1164 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1165
1166 netif_wake_queue(dev);
1167 }
1168
1169
1170 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1171 static void hamachi_init_ring(struct net_device *dev)
1172 {
1173 struct hamachi_private *hmp = netdev_priv(dev);
1174 int i;
1175
1176 hmp->tx_full = 0;
1177 hmp->cur_rx = hmp->cur_tx = 0;
1178 hmp->dirty_rx = hmp->dirty_tx = 0;
1179
1180 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1181 * card needs room to do 8 byte alignment, +2 so we can reserve
1182 * the first 2 bytes, and +16 gets room for the status word from the
1183 * card. -KDU
1184 */
1185 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1186 (((dev->mtu+26+7) & ~7) + 2 + 16));
1187
1188 /* Initialize all Rx descriptors. */
1189 for (i = 0; i < RX_RING_SIZE; i++) {
1190 hmp->rx_ring[i].status_n_length = 0;
1191 hmp->rx_skbuff[i] = NULL;
1192 }
1193 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1194 for (i = 0; i < RX_RING_SIZE; i++) {
1195 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1196 hmp->rx_skbuff[i] = skb;
1197 if (skb == NULL)
1198 break;
1199 skb->dev = dev; /* Mark as being used by this device. */
1200 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1201 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1202 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1203 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1204 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1205 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1206 }
1207 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1208 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1209
1210 for (i = 0; i < TX_RING_SIZE; i++) {
1211 hmp->tx_skbuff[i] = NULL;
1212 hmp->tx_ring[i].status_n_length = 0;
1213 }
1214 /* Mark the last entry of the ring */
1215 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1216
1217 return;
1218 }
1219
1220
1221 #ifdef TX_CHECKSUM
1222 #define csum_add(it, val) \
1223 do { \
1224 it += (u16) (val); \
1225 if (it & 0xffff0000) { \
1226 it &= 0xffff; \
1227 ++it; \
1228 } \
1229 } while (0)
1230 /* printk("add %04x --> %04x\n", val, it); \ */
1231
1232 /* uh->len already network format, do not swap */
1233 #define pseudo_csum_udp(sum,ih,uh) do { \
1234 sum = 0; \
1235 csum_add(sum, (ih)->saddr >> 16); \
1236 csum_add(sum, (ih)->saddr & 0xffff); \
1237 csum_add(sum, (ih)->daddr >> 16); \
1238 csum_add(sum, (ih)->daddr & 0xffff); \
1239 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1240 csum_add(sum, (uh)->len); \
1241 } while (0)
1242
1243 /* swap len */
1244 #define pseudo_csum_tcp(sum,ih,len) do { \
1245 sum = 0; \
1246 csum_add(sum, (ih)->saddr >> 16); \
1247 csum_add(sum, (ih)->saddr & 0xffff); \
1248 csum_add(sum, (ih)->daddr >> 16); \
1249 csum_add(sum, (ih)->daddr & 0xffff); \
1250 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1251 csum_add(sum, htons(len)); \
1252 } while (0)
1253 #endif
1254
1255 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1256 {
1257 struct hamachi_private *hmp = netdev_priv(dev);
1258 unsigned entry;
1259 u16 status;
1260
1261 /* Ok, now make sure that the queue has space before trying to
1262 add another skbuff. if we return non-zero the scheduler
1263 should interpret this as a queue full and requeue the buffer
1264 for later.
1265 */
1266 if (hmp->tx_full) {
1267 /* We should NEVER reach this point -KDU */
1268 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1269
1270 /* Wake the potentially-idle transmit channel. */
1271 /* If we don't need to read status, DON'T -KDU */
1272 status=readw(hmp->base + TxStatus);
1273 if( !(status & 0x0001) || (status & 0x0002))
1274 writew(0x0001, hmp->base + TxCmd);
1275 return 1;
1276 }
1277
1278 /* Caution: the write order is important here, set the field
1279 with the "ownership" bits last. */
1280
1281 /* Calculate the next Tx descriptor entry. */
1282 entry = hmp->cur_tx % TX_RING_SIZE;
1283
1284 hmp->tx_skbuff[entry] = skb;
1285
1286 #ifdef TX_CHECKSUM
1287 {
1288 /* tack on checksum tag */
1289 u32 tagval = 0;
1290 struct ethhdr *eh = (struct ethhdr *)skb->data;
1291 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1292 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1293 if (ih->protocol == IPPROTO_UDP) {
1294 struct udphdr *uh
1295 = (struct udphdr *)((char *)ih + ih->ihl*4);
1296 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1297 u32 pseudo;
1298 pseudo_csum_udp(pseudo, ih, uh);
1299 pseudo = htons(pseudo);
1300 printk("udp cksum was %04x, sending pseudo %04x\n",
1301 uh->check, pseudo);
1302 uh->check = 0; /* zero out uh->check before card calc */
1303 /*
1304 * start at 14 (skip ethhdr), store at offset (uh->check),
1305 * use pseudo value given.
1306 */
1307 tagval = (14 << 24) | (offset << 16) | pseudo;
1308 } else if (ih->protocol == IPPROTO_TCP) {
1309 printk("tcp, no auto cksum\n");
1310 }
1311 }
1312 *(u32 *)skb_push(skb, 8) = tagval;
1313 }
1314 #endif
1315
1316 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1317 skb->data, skb->len, PCI_DMA_TODEVICE));
1318
1319 /* Hmmmm, could probably put a DescIntr on these, but the way
1320 the driver is currently coded makes Tx interrupts unnecessary
1321 since the clearing of the Tx ring is handled by the start_xmit
1322 routine. This organization helps mitigate the interrupts a
1323 bit and probably renders the max_tx_latency param useless.
1324
1325 Update: Putting a DescIntr bit on all of the descriptors and
1326 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1327 */
1328 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1329 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1330 DescEndPacket | DescEndRing | DescIntr | skb->len);
1331 else
1332 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1333 DescEndPacket | DescIntr | skb->len);
1334 hmp->cur_tx++;
1335
1336 /* Non-x86 Todo: explicitly flush cache lines here. */
1337
1338 /* Wake the potentially-idle transmit channel. */
1339 /* If we don't need to read status, DON'T -KDU */
1340 status=readw(hmp->base + TxStatus);
1341 if( !(status & 0x0001) || (status & 0x0002))
1342 writew(0x0001, hmp->base + TxCmd);
1343
1344 /* Immediately before returning, let's clear as many entries as we can. */
1345 hamachi_tx(dev);
1346
1347 /* We should kick the bottom half here, since we are not accepting
1348 * interrupts with every packet. i.e. realize that Gigabit ethernet
1349 * can transmit faster than ordinary machines can load packets;
1350 * hence, any packet that got put off because we were in the transmit
1351 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1352 */
1353 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1354 netif_wake_queue(dev); /* Typical path */
1355 else {
1356 hmp->tx_full = 1;
1357 netif_stop_queue(dev);
1358 }
1359 dev->trans_start = jiffies;
1360
1361 if (hamachi_debug > 4) {
1362 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1363 dev->name, hmp->cur_tx, entry);
1364 }
1365 return 0;
1366 }
1367
1368 /* The interrupt handler does all of the Rx thread work and cleans up
1369 after the Tx thread. */
1370 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1371 {
1372 struct net_device *dev = dev_instance;
1373 struct hamachi_private *hmp = netdev_priv(dev);
1374 void __iomem *ioaddr = hmp->base;
1375 long boguscnt = max_interrupt_work;
1376 int handled = 0;
1377
1378 #ifndef final_version /* Can never occur. */
1379 if (dev == NULL) {
1380 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1381 return IRQ_NONE;
1382 }
1383 #endif
1384
1385 spin_lock(&hmp->lock);
1386
1387 do {
1388 u32 intr_status = readl(ioaddr + InterruptClear);
1389
1390 if (hamachi_debug > 4)
1391 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1392 dev->name, intr_status);
1393
1394 if (intr_status == 0)
1395 break;
1396
1397 handled = 1;
1398
1399 if (intr_status & IntrRxDone)
1400 hamachi_rx(dev);
1401
1402 if (intr_status & IntrTxDone){
1403 /* This code should RARELY need to execute. After all, this is
1404 * a gigabit link, it should consume packets as fast as we put
1405 * them in AND we clear the Tx ring in hamachi_start_xmit().
1406 */
1407 if (hmp->tx_full){
1408 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1409 int entry = hmp->dirty_tx % TX_RING_SIZE;
1410 struct sk_buff *skb;
1411
1412 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1413 break;
1414 skb = hmp->tx_skbuff[entry];
1415 /* Free the original skb. */
1416 if (skb){
1417 pci_unmap_single(hmp->pci_dev,
1418 leXX_to_cpu(hmp->tx_ring[entry].addr),
1419 skb->len,
1420 PCI_DMA_TODEVICE);
1421 dev_kfree_skb_irq(skb);
1422 hmp->tx_skbuff[entry] = NULL;
1423 }
1424 hmp->tx_ring[entry].status_n_length = 0;
1425 if (entry >= TX_RING_SIZE-1)
1426 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1427 cpu_to_le32(DescEndRing);
1428 hmp->stats.tx_packets++;
1429 }
1430 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1431 /* The ring is no longer full */
1432 hmp->tx_full = 0;
1433 netif_wake_queue(dev);
1434 }
1435 } else {
1436 netif_wake_queue(dev);
1437 }
1438 }
1439
1440
1441 /* Abnormal error summary/uncommon events handlers. */
1442 if (intr_status &
1443 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1444 LinkChange | NegotiationChange | StatsMax))
1445 hamachi_error(dev, intr_status);
1446
1447 if (--boguscnt < 0) {
1448 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1449 dev->name, intr_status);
1450 break;
1451 }
1452 } while (1);
1453
1454 if (hamachi_debug > 3)
1455 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1456 dev->name, readl(ioaddr + IntrStatus));
1457
1458 #ifndef final_version
1459 /* Code that should never be run! Perhaps remove after testing.. */
1460 {
1461 static int stopit = 10;
1462 if (dev->start == 0 && --stopit < 0) {
1463 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1464 dev->name);
1465 free_irq(irq, dev);
1466 }
1467 }
1468 #endif
1469
1470 spin_unlock(&hmp->lock);
1471 return IRQ_RETVAL(handled);
1472 }
1473
1474 /* This routine is logically part of the interrupt handler, but separated
1475 for clarity and better register allocation. */
1476 static int hamachi_rx(struct net_device *dev)
1477 {
1478 struct hamachi_private *hmp = netdev_priv(dev);
1479 int entry = hmp->cur_rx % RX_RING_SIZE;
1480 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1481
1482 if (hamachi_debug > 4) {
1483 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1484 entry, hmp->rx_ring[entry].status_n_length);
1485 }
1486
1487 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1488 while (1) {
1489 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1490 u32 desc_status = le32_to_cpu(desc->status_n_length);
1491 u16 data_size = desc_status; /* Implicit truncate */
1492 u8 *buf_addr;
1493 s32 frame_status;
1494
1495 if (desc_status & DescOwn)
1496 break;
1497 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1498 leXX_to_cpu(desc->addr),
1499 hmp->rx_buf_sz,
1500 PCI_DMA_FROMDEVICE);
1501 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1502 frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1503 if (hamachi_debug > 4)
1504 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1505 frame_status);
1506 if (--boguscnt < 0)
1507 break;
1508 if ( ! (desc_status & DescEndPacket)) {
1509 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1510 "multiple buffers, entry %#x length %d status %4.4x!\n",
1511 dev->name, hmp->cur_rx, data_size, desc_status);
1512 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1513 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1514 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1515 dev->name,
1516 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1517 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1518 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1519 hmp->stats.rx_length_errors++;
1520 } /* else Omit for prototype errata??? */
1521 if (frame_status & 0x00380000) {
1522 /* There was an error. */
1523 if (hamachi_debug > 2)
1524 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1525 frame_status);
1526 hmp->stats.rx_errors++;
1527 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1528 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1529 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1530 if (frame_status < 0) hmp->stats.rx_dropped++;
1531 } else {
1532 struct sk_buff *skb;
1533 /* Omit CRC */
1534 u16 pkt_len = (frame_status & 0x07ff) - 4;
1535 #ifdef RX_CHECKSUM
1536 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1537 #endif
1538
1539
1540 #ifndef final_version
1541 if (hamachi_debug > 4)
1542 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1543 " of %d, bogus_cnt %d.\n",
1544 pkt_len, data_size, boguscnt);
1545 if (hamachi_debug > 5)
1546 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1547 dev->name,
1548 *(s32*)&(buf_addr[data_size - 20]),
1549 *(s32*)&(buf_addr[data_size - 16]),
1550 *(s32*)&(buf_addr[data_size - 12]),
1551 *(s32*)&(buf_addr[data_size - 8]),
1552 *(s32*)&(buf_addr[data_size - 4]));
1553 #endif
1554 /* Check if the packet is long enough to accept without copying
1555 to a minimally-sized skbuff. */
1556 if (pkt_len < rx_copybreak
1557 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1558 #ifdef RX_CHECKSUM
1559 printk(KERN_ERR "%s: rx_copybreak non-zero "
1560 "not good with RX_CHECKSUM\n", dev->name);
1561 #endif
1562 skb_reserve(skb, 2); /* 16 byte align the IP header */
1563 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1564 leXX_to_cpu(hmp->rx_ring[entry].addr),
1565 hmp->rx_buf_sz,
1566 PCI_DMA_FROMDEVICE);
1567 /* Call copy + cksum if available. */
1568 #if 1 || USE_IP_COPYSUM
1569 skb_copy_to_linear_data(skb,
1570 hmp->rx_skbuff[entry]->data, pkt_len);
1571 skb_put(skb, pkt_len);
1572 #else
1573 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1574 + entry*sizeof(*desc), pkt_len);
1575 #endif
1576 pci_dma_sync_single_for_device(hmp->pci_dev,
1577 leXX_to_cpu(hmp->rx_ring[entry].addr),
1578 hmp->rx_buf_sz,
1579 PCI_DMA_FROMDEVICE);
1580 } else {
1581 pci_unmap_single(hmp->pci_dev,
1582 leXX_to_cpu(hmp->rx_ring[entry].addr),
1583 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1584 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1585 hmp->rx_skbuff[entry] = NULL;
1586 }
1587 skb->protocol = eth_type_trans(skb, dev);
1588
1589
1590 #ifdef RX_CHECKSUM
1591 /* TCP or UDP on ipv4, DIX encoding */
1592 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1593 struct iphdr *ih = (struct iphdr *) skb->data;
1594 /* Check that IP packet is at least 46 bytes, otherwise,
1595 * there may be pad bytes included in the hardware checksum.
1596 * This wouldn't happen if everyone padded with 0.
1597 */
1598 if (ntohs(ih->tot_len) >= 46){
1599 /* don't worry about frags */
1600 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1601 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1602 u32 *p = (u32 *) &buf_addr[data_size - 20];
1603 register u32 crc, p_r, p_r1;
1604
1605 if (inv & 4) {
1606 inv &= ~4;
1607 --p;
1608 }
1609 p_r = *p;
1610 p_r1 = *(p-1);
1611 switch (inv) {
1612 case 0:
1613 crc = (p_r & 0xffff) + (p_r >> 16);
1614 break;
1615 case 1:
1616 crc = (p_r >> 16) + (p_r & 0xffff)
1617 + (p_r1 >> 16 & 0xff00);
1618 break;
1619 case 2:
1620 crc = p_r + (p_r1 >> 16);
1621 break;
1622 case 3:
1623 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1624 break;
1625 default: /*NOTREACHED*/ crc = 0;
1626 }
1627 if (crc & 0xffff0000) {
1628 crc &= 0xffff;
1629 ++crc;
1630 }
1631 /* tcp/udp will add in pseudo */
1632 skb->csum = ntohs(pfck & 0xffff);
1633 if (skb->csum > crc)
1634 skb->csum -= crc;
1635 else
1636 skb->csum += (~crc & 0xffff);
1637 /*
1638 * could do the pseudo myself and return
1639 * CHECKSUM_UNNECESSARY
1640 */
1641 skb->ip_summed = CHECKSUM_COMPLETE;
1642 }
1643 }
1644 }
1645 #endif /* RX_CHECKSUM */
1646
1647 netif_rx(skb);
1648 dev->last_rx = jiffies;
1649 hmp->stats.rx_packets++;
1650 }
1651 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1652 }
1653
1654 /* Refill the Rx ring buffers. */
1655 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1656 struct hamachi_desc *desc;
1657
1658 entry = hmp->dirty_rx % RX_RING_SIZE;
1659 desc = &(hmp->rx_ring[entry]);
1660 if (hmp->rx_skbuff[entry] == NULL) {
1661 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1662
1663 hmp->rx_skbuff[entry] = skb;
1664 if (skb == NULL)
1665 break; /* Better luck next round. */
1666 skb->dev = dev; /* Mark as being used by this device. */
1667 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1668 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1669 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1670 }
1671 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1672 if (entry >= RX_RING_SIZE-1)
1673 desc->status_n_length |= cpu_to_le32(DescOwn |
1674 DescEndPacket | DescEndRing | DescIntr);
1675 else
1676 desc->status_n_length |= cpu_to_le32(DescOwn |
1677 DescEndPacket | DescIntr);
1678 }
1679
1680 /* Restart Rx engine if stopped. */
1681 /* If we don't need to check status, don't. -KDU */
1682 if (readw(hmp->base + RxStatus) & 0x0002)
1683 writew(0x0001, hmp->base + RxCmd);
1684
1685 return 0;
1686 }
1687
1688 /* This is more properly named "uncommon interrupt events", as it covers more
1689 than just errors. */
1690 static void hamachi_error(struct net_device *dev, int intr_status)
1691 {
1692 struct hamachi_private *hmp = netdev_priv(dev);
1693 void __iomem *ioaddr = hmp->base;
1694
1695 if (intr_status & (LinkChange|NegotiationChange)) {
1696 if (hamachi_debug > 1)
1697 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1698 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1699 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1700 readw(ioaddr + ANLinkPartnerAbility),
1701 readl(ioaddr + IntrStatus));
1702 if (readw(ioaddr + ANStatus) & 0x20)
1703 writeb(0x01, ioaddr + LEDCtrl);
1704 else
1705 writeb(0x03, ioaddr + LEDCtrl);
1706 }
1707 if (intr_status & StatsMax) {
1708 hamachi_get_stats(dev);
1709 /* Read the overflow bits to clear. */
1710 readl(ioaddr + 0x370);
1711 readl(ioaddr + 0x3F0);
1712 }
1713 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1714 && hamachi_debug)
1715 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1716 dev->name, intr_status);
1717 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1718 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1719 hmp->stats.tx_fifo_errors++;
1720 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1721 hmp->stats.rx_fifo_errors++;
1722 }
1723
1724 static int hamachi_close(struct net_device *dev)
1725 {
1726 struct hamachi_private *hmp = netdev_priv(dev);
1727 void __iomem *ioaddr = hmp->base;
1728 struct sk_buff *skb;
1729 int i;
1730
1731 netif_stop_queue(dev);
1732
1733 if (hamachi_debug > 1) {
1734 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1735 dev->name, readw(ioaddr + TxStatus),
1736 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1737 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1738 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1739 }
1740
1741 /* Disable interrupts by clearing the interrupt mask. */
1742 writel(0x0000, ioaddr + InterruptEnable);
1743
1744 /* Stop the chip's Tx and Rx processes. */
1745 writel(2, ioaddr + RxCmd);
1746 writew(2, ioaddr + TxCmd);
1747
1748 #ifdef __i386__
1749 if (hamachi_debug > 2) {
1750 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1751 (int)hmp->tx_ring_dma);
1752 for (i = 0; i < TX_RING_SIZE; i++)
1753 printk(" %c #%d desc. %8.8x %8.8x.\n",
1754 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1755 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1756 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1757 (int)hmp->rx_ring_dma);
1758 for (i = 0; i < RX_RING_SIZE; i++) {
1759 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1760 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1761 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1762 if (hamachi_debug > 6) {
1763 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1764 u16 *addr = (u16 *)
1765 hmp->rx_skbuff[i]->data;
1766 int j;
1767
1768 for (j = 0; j < 0x50; j++)
1769 printk(" %4.4x", addr[j]);
1770 printk("\n");
1771 }
1772 }
1773 }
1774 }
1775 #endif /* __i386__ debugging only */
1776
1777 free_irq(dev->irq, dev);
1778
1779 del_timer_sync(&hmp->timer);
1780
1781 /* Free all the skbuffs in the Rx queue. */
1782 for (i = 0; i < RX_RING_SIZE; i++) {
1783 skb = hmp->rx_skbuff[i];
1784 hmp->rx_ring[i].status_n_length = 0;
1785 if (skb) {
1786 pci_unmap_single(hmp->pci_dev,
1787 leXX_to_cpu(hmp->rx_ring[i].addr),
1788 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1789 dev_kfree_skb(skb);
1790 hmp->rx_skbuff[i] = NULL;
1791 }
1792 hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1793 }
1794 for (i = 0; i < TX_RING_SIZE; i++) {
1795 skb = hmp->tx_skbuff[i];
1796 if (skb) {
1797 pci_unmap_single(hmp->pci_dev,
1798 leXX_to_cpu(hmp->tx_ring[i].addr),
1799 skb->len, PCI_DMA_TODEVICE);
1800 dev_kfree_skb(skb);
1801 hmp->tx_skbuff[i] = NULL;
1802 }
1803 }
1804
1805 writeb(0x00, ioaddr + LEDCtrl);
1806
1807 return 0;
1808 }
1809
1810 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1811 {
1812 struct hamachi_private *hmp = netdev_priv(dev);
1813 void __iomem *ioaddr = hmp->base;
1814
1815 /* We should lock this segment of code for SMP eventually, although
1816 the vulnerability window is very small and statistics are
1817 non-critical. */
1818 /* Ok, what goes here? This appears to be stuck at 21 packets
1819 according to ifconfig. It does get incremented in hamachi_tx(),
1820 so I think I'll comment it out here and see if better things
1821 happen.
1822 */
1823 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1824
1825 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1826 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1827 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1828
1829 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1830 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1831 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1832 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1833 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1834
1835 return &hmp->stats;
1836 }
1837
1838 static void set_rx_mode(struct net_device *dev)
1839 {
1840 struct hamachi_private *hmp = netdev_priv(dev);
1841 void __iomem *ioaddr = hmp->base;
1842
1843 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1844 writew(0x000F, ioaddr + AddrMode);
1845 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1846 /* Too many to match, or accept all multicasts. */
1847 writew(0x000B, ioaddr + AddrMode);
1848 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1849 struct dev_mc_list *mclist;
1850 int i;
1851 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1852 i++, mclist = mclist->next) {
1853 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1854 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1855 ioaddr + 0x104 + i*8);
1856 }
1857 /* Clear remaining entries. */
1858 for (; i < 64; i++)
1859 writel(0, ioaddr + 0x104 + i*8);
1860 writew(0x0003, ioaddr + AddrMode);
1861 } else { /* Normal, unicast/broadcast-only mode. */
1862 writew(0x0001, ioaddr + AddrMode);
1863 }
1864 }
1865
1866 static int check_if_running(struct net_device *dev)
1867 {
1868 if (!netif_running(dev))
1869 return -EINVAL;
1870 return 0;
1871 }
1872
1873 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1874 {
1875 struct hamachi_private *np = netdev_priv(dev);
1876 strcpy(info->driver, DRV_NAME);
1877 strcpy(info->version, DRV_VERSION);
1878 strcpy(info->bus_info, pci_name(np->pci_dev));
1879 }
1880
1881 static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1882 {
1883 struct hamachi_private *np = netdev_priv(dev);
1884 spin_lock_irq(&np->lock);
1885 mii_ethtool_gset(&np->mii_if, ecmd);
1886 spin_unlock_irq(&np->lock);
1887 return 0;
1888 }
1889
1890 static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1891 {
1892 struct hamachi_private *np = netdev_priv(dev);
1893 int res;
1894 spin_lock_irq(&np->lock);
1895 res = mii_ethtool_sset(&np->mii_if, ecmd);
1896 spin_unlock_irq(&np->lock);
1897 return res;
1898 }
1899
1900 static int hamachi_nway_reset(struct net_device *dev)
1901 {
1902 struct hamachi_private *np = netdev_priv(dev);
1903 return mii_nway_restart(&np->mii_if);
1904 }
1905
1906 static u32 hamachi_get_link(struct net_device *dev)
1907 {
1908 struct hamachi_private *np = netdev_priv(dev);
1909 return mii_link_ok(&np->mii_if);
1910 }
1911
1912 static const struct ethtool_ops ethtool_ops = {
1913 .begin = check_if_running,
1914 .get_drvinfo = hamachi_get_drvinfo,
1915 .get_settings = hamachi_get_settings,
1916 .set_settings = hamachi_set_settings,
1917 .nway_reset = hamachi_nway_reset,
1918 .get_link = hamachi_get_link,
1919 };
1920
1921 static const struct ethtool_ops ethtool_ops_no_mii = {
1922 .begin = check_if_running,
1923 .get_drvinfo = hamachi_get_drvinfo,
1924 };
1925
1926 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1927 {
1928 struct hamachi_private *np = netdev_priv(dev);
1929 struct mii_ioctl_data *data = if_mii(rq);
1930 int rc;
1931
1932 if (!netif_running(dev))
1933 return -EINVAL;
1934
1935 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1936 u32 *d = (u32 *)&rq->ifr_ifru;
1937 /* Should add this check here or an ordinary user can do nasty
1938 * things. -KDU
1939 *
1940 * TODO: Shut down the Rx and Tx engines while doing this.
1941 */
1942 if (!capable(CAP_NET_ADMIN))
1943 return -EPERM;
1944 writel(d[0], np->base + TxIntrCtrl);
1945 writel(d[1], np->base + RxIntrCtrl);
1946 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1947 (u32) readl(np->base + TxIntrCtrl),
1948 (u32) readl(np->base + RxIntrCtrl));
1949 rc = 0;
1950 }
1951
1952 else {
1953 spin_lock_irq(&np->lock);
1954 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1955 spin_unlock_irq(&np->lock);
1956 }
1957
1958 return rc;
1959 }
1960
1961
1962 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1963 {
1964 struct net_device *dev = pci_get_drvdata(pdev);
1965
1966 if (dev) {
1967 struct hamachi_private *hmp = netdev_priv(dev);
1968
1969 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1970 hmp->rx_ring_dma);
1971 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1972 hmp->tx_ring_dma);
1973 unregister_netdev(dev);
1974 iounmap(hmp->base);
1975 free_netdev(dev);
1976 pci_release_regions(pdev);
1977 pci_set_drvdata(pdev, NULL);
1978 }
1979 }
1980
1981 static struct pci_device_id hamachi_pci_tbl[] = {
1982 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1983 { 0, }
1984 };
1985 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1986
1987 static struct pci_driver hamachi_driver = {
1988 .name = DRV_NAME,
1989 .id_table = hamachi_pci_tbl,
1990 .probe = hamachi_init_one,
1991 .remove = __devexit_p(hamachi_remove_one),
1992 };
1993
1994 static int __init hamachi_init (void)
1995 {
1996 /* when a module, this is printed whether or not devices are found in probe */
1997 #ifdef MODULE
1998 printk(version);
1999 #endif
2000 return pci_register_driver(&hamachi_driver);
2001 }
2002
2003 static void __exit hamachi_exit (void)
2004 {
2005 pci_unregister_driver(&hamachi_driver);
2006 }
2007
2008
2009 module_init(hamachi_init);
2010 module_exit(hamachi_exit);
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