2 * AT86RF230/RF231 driver
4 * Copyright (C) 2009-2012 Siemens AG
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 * Alexander Aring <aar@pengutronix.de>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/gpio.h>
25 #include <linux/delay.h>
26 #include <linux/spinlock.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/at86rf230.h>
29 #include <linux/regmap.h>
30 #include <linux/skbuff.h>
31 #include <linux/of_gpio.h>
32 #include <linux/ieee802154.h>
34 #include <net/mac802154.h>
35 #include <net/cfg802154.h>
37 struct at86rf230_local
;
38 /* at86rf2xx chip depend data.
39 * All timings are in us.
41 struct at86rf2xx_chip_data
{
49 /* short interframe spacing time */
51 /* long interframe spacing time */
53 /* completion timeout for tx in msecs */
57 int (*set_channel
)(struct at86rf230_local
*, u8
, u8
);
58 int (*get_desense_steps
)(struct at86rf230_local
*, s32
);
61 #define AT86RF2XX_MAX_BUF (127 + 3)
63 struct at86rf230_state_change
{
64 struct at86rf230_local
*lp
;
66 struct spi_message msg
;
67 struct spi_transfer trx
;
68 u8 buf
[AT86RF2XX_MAX_BUF
];
70 void (*complete
)(void *context
);
77 struct at86rf230_local
{
78 struct spi_device
*spi
;
80 struct ieee802154_hw
*hw
;
81 struct at86rf2xx_chip_data
*data
;
82 struct regmap
*regmap
;
84 struct completion state_complete
;
85 struct at86rf230_state_change state
;
87 struct at86rf230_state_change irq
;
92 /* spinlock for is_tx protection */
94 struct sk_buff
*tx_skb
;
95 struct at86rf230_state_change tx
;
98 #define RG_TRX_STATUS (0x01)
99 #define SR_TRX_STATUS 0x01, 0x1f, 0
100 #define SR_RESERVED_01_3 0x01, 0x20, 5
101 #define SR_CCA_STATUS 0x01, 0x40, 6
102 #define SR_CCA_DONE 0x01, 0x80, 7
103 #define RG_TRX_STATE (0x02)
104 #define SR_TRX_CMD 0x02, 0x1f, 0
105 #define SR_TRAC_STATUS 0x02, 0xe0, 5
106 #define RG_TRX_CTRL_0 (0x03)
107 #define SR_CLKM_CTRL 0x03, 0x07, 0
108 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3
109 #define SR_PAD_IO_CLKM 0x03, 0x30, 4
110 #define SR_PAD_IO 0x03, 0xc0, 6
111 #define RG_TRX_CTRL_1 (0x04)
112 #define SR_IRQ_POLARITY 0x04, 0x01, 0
113 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1
114 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2
115 #define SR_RX_BL_CTRL 0x04, 0x10, 4
116 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
117 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
118 #define SR_PA_EXT_EN 0x04, 0x80, 7
119 #define RG_PHY_TX_PWR (0x05)
120 #define SR_TX_PWR 0x05, 0x0f, 0
121 #define SR_PA_LT 0x05, 0x30, 4
122 #define SR_PA_BUF_LT 0x05, 0xc0, 6
123 #define RG_PHY_RSSI (0x06)
124 #define SR_RSSI 0x06, 0x1f, 0
125 #define SR_RND_VALUE 0x06, 0x60, 5
126 #define SR_RX_CRC_VALID 0x06, 0x80, 7
127 #define RG_PHY_ED_LEVEL (0x07)
128 #define SR_ED_LEVEL 0x07, 0xff, 0
129 #define RG_PHY_CC_CCA (0x08)
130 #define SR_CHANNEL 0x08, 0x1f, 0
131 #define SR_CCA_MODE 0x08, 0x60, 5
132 #define SR_CCA_REQUEST 0x08, 0x80, 7
133 #define RG_CCA_THRES (0x09)
134 #define SR_CCA_ED_THRES 0x09, 0x0f, 0
135 #define SR_RESERVED_09_1 0x09, 0xf0, 4
136 #define RG_RX_CTRL (0x0a)
137 #define SR_PDT_THRES 0x0a, 0x0f, 0
138 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4
139 #define RG_SFD_VALUE (0x0b)
140 #define SR_SFD_VALUE 0x0b, 0xff, 0
141 #define RG_TRX_CTRL_2 (0x0c)
142 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
143 #define SR_SUB_MODE 0x0c, 0x04, 2
144 #define SR_BPSK_QPSK 0x0c, 0x08, 3
145 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
146 #define SR_RESERVED_0c_5 0x0c, 0x60, 5
147 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7
148 #define RG_ANT_DIV (0x0d)
149 #define SR_ANT_CTRL 0x0d, 0x03, 0
150 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
151 #define SR_ANT_DIV_EN 0x0d, 0x08, 3
152 #define SR_RESERVED_0d_2 0x0d, 0x70, 4
153 #define SR_ANT_SEL 0x0d, 0x80, 7
154 #define RG_IRQ_MASK (0x0e)
155 #define SR_IRQ_MASK 0x0e, 0xff, 0
156 #define RG_IRQ_STATUS (0x0f)
157 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
158 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
159 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2
160 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
161 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
162 #define SR_IRQ_5_AMI 0x0f, 0x20, 5
163 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
164 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
165 #define RG_VREG_CTRL (0x10)
166 #define SR_RESERVED_10_6 0x10, 0x03, 0
167 #define SR_DVDD_OK 0x10, 0x04, 2
168 #define SR_DVREG_EXT 0x10, 0x08, 3
169 #define SR_RESERVED_10_3 0x10, 0x30, 4
170 #define SR_AVDD_OK 0x10, 0x40, 6
171 #define SR_AVREG_EXT 0x10, 0x80, 7
172 #define RG_BATMON (0x11)
173 #define SR_BATMON_VTH 0x11, 0x0f, 0
174 #define SR_BATMON_HR 0x11, 0x10, 4
175 #define SR_BATMON_OK 0x11, 0x20, 5
176 #define SR_RESERVED_11_1 0x11, 0xc0, 6
177 #define RG_XOSC_CTRL (0x12)
178 #define SR_XTAL_TRIM 0x12, 0x0f, 0
179 #define SR_XTAL_MODE 0x12, 0xf0, 4
180 #define RG_RX_SYN (0x15)
181 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
182 #define SR_RESERVED_15_2 0x15, 0x70, 4
183 #define SR_RX_PDT_DIS 0x15, 0x80, 7
184 #define RG_XAH_CTRL_1 (0x17)
185 #define SR_RESERVED_17_8 0x17, 0x01, 0
186 #define SR_AACK_PROM_MODE 0x17, 0x02, 1
187 #define SR_AACK_ACK_TIME 0x17, 0x04, 2
188 #define SR_RESERVED_17_5 0x17, 0x08, 3
189 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
190 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
191 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6
192 #define SR_RESERVED_17_1 0x17, 0x80, 7
193 #define RG_FTN_CTRL (0x18)
194 #define SR_RESERVED_18_2 0x18, 0x7f, 0
195 #define SR_FTN_START 0x18, 0x80, 7
196 #define RG_PLL_CF (0x1a)
197 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0
198 #define SR_PLL_CF_START 0x1a, 0x80, 7
199 #define RG_PLL_DCU (0x1b)
200 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0
201 #define SR_RESERVED_1b_2 0x1b, 0x40, 6
202 #define SR_PLL_DCU_START 0x1b, 0x80, 7
203 #define RG_PART_NUM (0x1c)
204 #define SR_PART_NUM 0x1c, 0xff, 0
205 #define RG_VERSION_NUM (0x1d)
206 #define SR_VERSION_NUM 0x1d, 0xff, 0
207 #define RG_MAN_ID_0 (0x1e)
208 #define SR_MAN_ID_0 0x1e, 0xff, 0
209 #define RG_MAN_ID_1 (0x1f)
210 #define SR_MAN_ID_1 0x1f, 0xff, 0
211 #define RG_SHORT_ADDR_0 (0x20)
212 #define SR_SHORT_ADDR_0 0x20, 0xff, 0
213 #define RG_SHORT_ADDR_1 (0x21)
214 #define SR_SHORT_ADDR_1 0x21, 0xff, 0
215 #define RG_PAN_ID_0 (0x22)
216 #define SR_PAN_ID_0 0x22, 0xff, 0
217 #define RG_PAN_ID_1 (0x23)
218 #define SR_PAN_ID_1 0x23, 0xff, 0
219 #define RG_IEEE_ADDR_0 (0x24)
220 #define SR_IEEE_ADDR_0 0x24, 0xff, 0
221 #define RG_IEEE_ADDR_1 (0x25)
222 #define SR_IEEE_ADDR_1 0x25, 0xff, 0
223 #define RG_IEEE_ADDR_2 (0x26)
224 #define SR_IEEE_ADDR_2 0x26, 0xff, 0
225 #define RG_IEEE_ADDR_3 (0x27)
226 #define SR_IEEE_ADDR_3 0x27, 0xff, 0
227 #define RG_IEEE_ADDR_4 (0x28)
228 #define SR_IEEE_ADDR_4 0x28, 0xff, 0
229 #define RG_IEEE_ADDR_5 (0x29)
230 #define SR_IEEE_ADDR_5 0x29, 0xff, 0
231 #define RG_IEEE_ADDR_6 (0x2a)
232 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0
233 #define RG_IEEE_ADDR_7 (0x2b)
234 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0
235 #define RG_XAH_CTRL_0 (0x2c)
236 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
237 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
238 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
239 #define RG_CSMA_SEED_0 (0x2d)
240 #define SR_CSMA_SEED_0 0x2d, 0xff, 0
241 #define RG_CSMA_SEED_1 (0x2e)
242 #define SR_CSMA_SEED_1 0x2e, 0x07, 0
243 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
244 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4
245 #define SR_AACK_SET_PD 0x2e, 0x20, 5
246 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
247 #define RG_CSMA_BE (0x2f)
248 #define SR_MIN_BE 0x2f, 0x0f, 0
249 #define SR_MAX_BE 0x2f, 0xf0, 4
252 #define CMD_REG_MASK 0x3f
253 #define CMD_WRITE 0x40
256 #define IRQ_BAT_LOW (1 << 7)
257 #define IRQ_TRX_UR (1 << 6)
258 #define IRQ_AMI (1 << 5)
259 #define IRQ_CCA_ED (1 << 4)
260 #define IRQ_TRX_END (1 << 3)
261 #define IRQ_RX_START (1 << 2)
262 #define IRQ_PLL_UNL (1 << 1)
263 #define IRQ_PLL_LOCK (1 << 0)
265 #define IRQ_ACTIVE_HIGH 0
266 #define IRQ_ACTIVE_LOW 1
268 #define STATE_P_ON 0x00 /* BUSY */
269 #define STATE_BUSY_RX 0x01
270 #define STATE_BUSY_TX 0x02
271 #define STATE_FORCE_TRX_OFF 0x03
272 #define STATE_FORCE_TX_ON 0x04 /* IDLE */
273 /* 0x05 */ /* INVALID_PARAMETER */
274 #define STATE_RX_ON 0x06
275 /* 0x07 */ /* SUCCESS */
276 #define STATE_TRX_OFF 0x08
277 #define STATE_TX_ON 0x09
278 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
279 #define STATE_SLEEP 0x0F
280 #define STATE_PREP_DEEP_SLEEP 0x10
281 #define STATE_BUSY_RX_AACK 0x11
282 #define STATE_BUSY_TX_ARET 0x12
283 #define STATE_RX_AACK_ON 0x16
284 #define STATE_TX_ARET_ON 0x19
285 #define STATE_RX_ON_NOCLK 0x1C
286 #define STATE_RX_AACK_ON_NOCLK 0x1D
287 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
288 #define STATE_TRANSITION_IN_PROGRESS 0x1F
290 #define AT86RF2XX_NUMREGS 0x3F
293 at86rf230_async_state_change(struct at86rf230_local
*lp
,
294 struct at86rf230_state_change
*ctx
,
295 const u8 state
, void (*complete
)(void *context
),
296 const bool irq_enable
);
299 __at86rf230_write(struct at86rf230_local
*lp
,
300 unsigned int addr
, unsigned int data
)
302 return regmap_write(lp
->regmap
, addr
, data
);
306 __at86rf230_read(struct at86rf230_local
*lp
,
307 unsigned int addr
, unsigned int *data
)
309 return regmap_read(lp
->regmap
, addr
, data
);
313 at86rf230_read_subreg(struct at86rf230_local
*lp
,
314 unsigned int addr
, unsigned int mask
,
315 unsigned int shift
, unsigned int *data
)
319 rc
= __at86rf230_read(lp
, addr
, data
);
321 *data
= (*data
& mask
) >> shift
;
327 at86rf230_write_subreg(struct at86rf230_local
*lp
,
328 unsigned int addr
, unsigned int mask
,
329 unsigned int shift
, unsigned int data
)
331 return regmap_update_bits(lp
->regmap
, addr
, mask
, data
<< shift
);
335 at86rf230_reg_writeable(struct device
*dev
, unsigned int reg
)
342 case RG_PHY_ED_LEVEL
:
358 case RG_SHORT_ADDR_0
:
359 case RG_SHORT_ADDR_1
:
381 at86rf230_reg_readable(struct device
*dev
, unsigned int reg
)
385 /* all writeable are also readable */
386 rc
= at86rf230_reg_writeable(dev
, reg
);
406 at86rf230_reg_volatile(struct device
*dev
, unsigned int reg
)
408 /* can be changed during runtime */
413 case RG_PHY_ED_LEVEL
:
423 at86rf230_reg_precious(struct device
*dev
, unsigned int reg
)
425 /* don't clear irq line on read */
434 static struct regmap_config at86rf230_regmap_spi_config
= {
437 .write_flag_mask
= CMD_REG
| CMD_WRITE
,
438 .read_flag_mask
= CMD_REG
,
439 .cache_type
= REGCACHE_RBTREE
,
440 .max_register
= AT86RF2XX_NUMREGS
,
441 .writeable_reg
= at86rf230_reg_writeable
,
442 .readable_reg
= at86rf230_reg_readable
,
443 .volatile_reg
= at86rf230_reg_volatile
,
444 .precious_reg
= at86rf230_reg_precious
,
448 at86rf230_async_error_recover(void *context
)
450 struct at86rf230_state_change
*ctx
= context
;
451 struct at86rf230_local
*lp
= ctx
->lp
;
453 at86rf230_async_state_change(lp
, ctx
, STATE_RX_AACK_ON
, NULL
, false);
454 ieee802154_wake_queue(lp
->hw
);
458 at86rf230_async_error(struct at86rf230_local
*lp
,
459 struct at86rf230_state_change
*ctx
, int rc
)
461 dev_err(&lp
->spi
->dev
, "spi_async error %d\n", rc
);
463 at86rf230_async_state_change(lp
, ctx
, STATE_FORCE_TRX_OFF
,
464 at86rf230_async_error_recover
, false);
467 /* Generic function to get some register value in async mode */
469 at86rf230_async_read_reg(struct at86rf230_local
*lp
, const u8 reg
,
470 struct at86rf230_state_change
*ctx
,
471 void (*complete
)(void *context
),
472 const bool irq_enable
)
476 u8
*tx_buf
= ctx
->buf
;
478 tx_buf
[0] = (reg
& CMD_REG_MASK
) | CMD_REG
;
480 ctx
->msg
.complete
= complete
;
481 ctx
->irq_enable
= irq_enable
;
482 rc
= spi_async(lp
->spi
, &ctx
->msg
);
485 enable_irq(lp
->spi
->irq
);
487 at86rf230_async_error(lp
, ctx
, rc
);
492 at86rf230_async_state_assert(void *context
)
494 struct at86rf230_state_change
*ctx
= context
;
495 struct at86rf230_local
*lp
= ctx
->lp
;
496 const u8
*buf
= ctx
->buf
;
497 const u8 trx_state
= buf
[1] & 0x1f;
499 /* Assert state change */
500 if (trx_state
!= ctx
->to_state
) {
501 /* Special handling if transceiver state is in
502 * STATE_BUSY_RX_AACK and a SHR was detected.
504 if (trx_state
== STATE_BUSY_RX_AACK
) {
505 /* Undocumented race condition. If we send a state
506 * change to STATE_RX_AACK_ON the transceiver could
507 * change his state automatically to STATE_BUSY_RX_AACK
508 * if a SHR was detected. This is not an error, but we
511 if (ctx
->to_state
== STATE_RX_AACK_ON
)
514 /* If we change to STATE_TX_ON without forcing and
515 * transceiver state is STATE_BUSY_RX_AACK, we wait
516 * 'tFrame + tPAck' receiving time. In this time the
517 * PDU should be received. If the transceiver is still
518 * in STATE_BUSY_RX_AACK, we run a force state change
519 * to STATE_TX_ON. This is a timeout handling, if the
520 * transceiver stucks in STATE_BUSY_RX_AACK.
522 if (ctx
->to_state
== STATE_TX_ON
) {
523 at86rf230_async_state_change(lp
, ctx
,
532 dev_warn(&lp
->spi
->dev
, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
533 ctx
->from_state
, ctx
->to_state
, trx_state
);
538 ctx
->complete(context
);
541 /* Do state change timing delay. */
543 at86rf230_async_state_delay(void *context
)
545 struct at86rf230_state_change
*ctx
= context
;
546 struct at86rf230_local
*lp
= ctx
->lp
;
547 struct at86rf2xx_chip_data
*c
= lp
->data
;
550 /* The force state changes are will show as normal states in the
551 * state status subregister. We change the to_state to the
552 * corresponding one and remember if it was a force change, this
553 * differs if we do a state change from STATE_BUSY_RX_AACK.
555 switch (ctx
->to_state
) {
556 case STATE_FORCE_TX_ON
:
557 ctx
->to_state
= STATE_TX_ON
;
560 case STATE_FORCE_TRX_OFF
:
561 ctx
->to_state
= STATE_TRX_OFF
;
568 switch (ctx
->from_state
) {
570 switch (ctx
->to_state
) {
571 case STATE_RX_AACK_ON
:
572 usleep_range(c
->t_off_to_aack
, c
->t_off_to_aack
+ 10);
575 usleep_range(c
->t_off_to_tx_on
,
576 c
->t_off_to_tx_on
+ 10);
582 case STATE_BUSY_RX_AACK
:
583 switch (ctx
->to_state
) {
585 /* Wait for worst case receiving time if we
586 * didn't make a force change from BUSY_RX_AACK
590 usleep_range(c
->t_frame
+ c
->t_p_ack
,
591 c
->t_frame
+ c
->t_p_ack
+ 1000);
599 /* Default value, means RESET state */
601 switch (ctx
->to_state
) {
603 usleep_range(c
->t_reset_to_off
, c
->t_reset_to_off
+ 10);
613 /* Default delay is 1us in the most cases */
617 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
618 at86rf230_async_state_assert
,
623 at86rf230_async_state_change_start(void *context
)
625 struct at86rf230_state_change
*ctx
= context
;
626 struct at86rf230_local
*lp
= ctx
->lp
;
628 const u8 trx_state
= buf
[1] & 0x1f;
631 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
632 if (trx_state
== STATE_TRANSITION_IN_PROGRESS
) {
634 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
635 at86rf230_async_state_change_start
,
640 /* Check if we already are in the state which we change in */
641 if (trx_state
== ctx
->to_state
) {
643 ctx
->complete(context
);
647 /* Set current state to the context of state change */
648 ctx
->from_state
= trx_state
;
650 /* Going into the next step for a state change which do a timing
653 buf
[0] = (RG_TRX_STATE
& CMD_REG_MASK
) | CMD_REG
| CMD_WRITE
;
654 buf
[1] = ctx
->to_state
;
656 ctx
->msg
.complete
= at86rf230_async_state_delay
;
657 rc
= spi_async(lp
->spi
, &ctx
->msg
);
660 enable_irq(lp
->spi
->irq
);
662 at86rf230_async_error(lp
, &lp
->state
, rc
);
667 at86rf230_async_state_change(struct at86rf230_local
*lp
,
668 struct at86rf230_state_change
*ctx
,
669 const u8 state
, void (*complete
)(void *context
),
670 const bool irq_enable
)
672 /* Initialization for the state change context */
673 ctx
->to_state
= state
;
674 ctx
->complete
= complete
;
675 ctx
->irq_enable
= irq_enable
;
676 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
677 at86rf230_async_state_change_start
,
682 at86rf230_sync_state_change_complete(void *context
)
684 struct at86rf230_state_change
*ctx
= context
;
685 struct at86rf230_local
*lp
= ctx
->lp
;
687 complete(&lp
->state_complete
);
690 /* This function do a sync framework above the async state change.
691 * Some callbacks of the IEEE 802.15.4 driver interface need to be
692 * handled synchronously.
695 at86rf230_sync_state_change(struct at86rf230_local
*lp
, unsigned int state
)
699 at86rf230_async_state_change(lp
, &lp
->state
, state
,
700 at86rf230_sync_state_change_complete
,
703 rc
= wait_for_completion_timeout(&lp
->state_complete
,
704 msecs_to_jiffies(100));
706 at86rf230_async_error(lp
, &lp
->state
, -ETIMEDOUT
);
714 at86rf230_tx_complete(void *context
)
716 struct at86rf230_state_change
*ctx
= context
;
717 struct at86rf230_local
*lp
= ctx
->lp
;
718 struct sk_buff
*skb
= lp
->tx_skb
;
720 enable_irq(lp
->spi
->irq
);
722 if (lp
->max_frame_retries
<= 0) {
723 /* Interfame spacing time, which is phy depend.
725 * Move this handling in MAC 802.15.4 layer.
726 * This is currently a workaround to avoid fragmenation issues.
729 udelay(lp
->data
->t_lifs
);
731 udelay(lp
->data
->t_sifs
);
734 ieee802154_xmit_complete(lp
->hw
, skb
);
738 at86rf230_tx_on(void *context
)
740 struct at86rf230_state_change
*ctx
= context
;
741 struct at86rf230_local
*lp
= ctx
->lp
;
743 at86rf230_async_state_change(lp
, &lp
->irq
, STATE_RX_AACK_ON
,
744 at86rf230_tx_complete
, true);
748 at86rf230_tx_trac_error(void *context
)
750 struct at86rf230_state_change
*ctx
= context
;
751 struct at86rf230_local
*lp
= ctx
->lp
;
753 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ON
,
754 at86rf230_tx_on
, true);
758 at86rf230_tx_trac_check(void *context
)
760 struct at86rf230_state_change
*ctx
= context
;
761 struct at86rf230_local
*lp
= ctx
->lp
;
762 const u8
*buf
= ctx
->buf
;
763 const u8 trac
= (buf
[1] & 0xe0) >> 5;
765 /* If trac status is different than zero we need to do a state change
766 * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver
770 at86rf230_async_state_change(lp
, ctx
, STATE_FORCE_TRX_OFF
,
771 at86rf230_tx_trac_error
, true);
775 at86rf230_tx_on(context
);
780 at86rf230_tx_trac_status(void *context
)
782 struct at86rf230_state_change
*ctx
= context
;
783 struct at86rf230_local
*lp
= ctx
->lp
;
785 at86rf230_async_read_reg(lp
, RG_TRX_STATE
, ctx
,
786 at86rf230_tx_trac_check
, true);
790 at86rf230_rx(struct at86rf230_local
*lp
,
791 const u8
*data
, const u8 len
, const u8 lqi
)
794 u8 rx_local_buf
[AT86RF2XX_MAX_BUF
];
796 memcpy(rx_local_buf
, data
, len
);
797 enable_irq(lp
->spi
->irq
);
799 skb
= dev_alloc_skb(IEEE802154_MTU
);
801 dev_vdbg(&lp
->spi
->dev
, "failed to allocate sk_buff\n");
805 memcpy(skb_put(skb
, len
), rx_local_buf
, len
);
806 ieee802154_rx_irqsafe(lp
->hw
, skb
, lqi
);
810 at86rf230_rx_read_frame_complete(void *context
)
812 struct at86rf230_state_change
*ctx
= context
;
813 struct at86rf230_local
*lp
= ctx
->lp
;
814 const u8
*buf
= lp
->irq
.buf
;
817 if (!ieee802154_is_valid_psdu_len(len
)) {
818 dev_vdbg(&lp
->spi
->dev
, "corrupted frame received\n");
819 len
= IEEE802154_MTU
;
822 at86rf230_rx(lp
, buf
+ 2, len
, buf
[2 + len
]);
826 at86rf230_rx_read_frame(struct at86rf230_local
*lp
)
830 u8
*buf
= lp
->irq
.buf
;
833 lp
->irq
.trx
.len
= AT86RF2XX_MAX_BUF
;
834 lp
->irq
.msg
.complete
= at86rf230_rx_read_frame_complete
;
835 rc
= spi_async(lp
->spi
, &lp
->irq
.msg
);
837 enable_irq(lp
->spi
->irq
);
838 at86rf230_async_error(lp
, &lp
->irq
, rc
);
843 at86rf230_rx_trac_check(void *context
)
845 struct at86rf230_state_change
*ctx
= context
;
846 struct at86rf230_local
*lp
= ctx
->lp
;
848 /* Possible check on trac status here. This could be useful to make
849 * some stats why receive is failed. Not used at the moment, but it's
850 * maybe timing relevant. Datasheet doesn't say anything about this.
851 * The programming guide say do it so.
854 at86rf230_rx_read_frame(lp
);
858 at86rf230_irq_trx_end(struct at86rf230_local
*lp
)
860 spin_lock(&lp
->lock
);
863 spin_unlock(&lp
->lock
);
866 at86rf230_async_state_change(lp
, &lp
->irq
,
868 at86rf230_tx_trac_status
,
871 at86rf230_async_state_change(lp
, &lp
->irq
,
873 at86rf230_tx_complete
,
876 spin_unlock(&lp
->lock
);
877 at86rf230_async_read_reg(lp
, RG_TRX_STATE
, &lp
->irq
,
878 at86rf230_rx_trac_check
, true);
883 at86rf230_irq_status(void *context
)
885 struct at86rf230_state_change
*ctx
= context
;
886 struct at86rf230_local
*lp
= ctx
->lp
;
887 const u8
*buf
= lp
->irq
.buf
;
888 const u8 irq
= buf
[1];
890 if (irq
& IRQ_TRX_END
) {
891 at86rf230_irq_trx_end(lp
);
893 enable_irq(lp
->spi
->irq
);
894 dev_err(&lp
->spi
->dev
, "not supported irq %02x received\n",
899 static irqreturn_t
at86rf230_isr(int irq
, void *data
)
901 struct at86rf230_local
*lp
= data
;
902 struct at86rf230_state_change
*ctx
= &lp
->irq
;
906 disable_irq_nosync(irq
);
908 buf
[0] = (RG_IRQ_STATUS
& CMD_REG_MASK
) | CMD_REG
;
910 ctx
->msg
.complete
= at86rf230_irq_status
;
911 rc
= spi_async(lp
->spi
, &ctx
->msg
);
914 at86rf230_async_error(lp
, ctx
, rc
);
922 at86rf230_write_frame_complete(void *context
)
924 struct at86rf230_state_change
*ctx
= context
;
925 struct at86rf230_local
*lp
= ctx
->lp
;
929 buf
[0] = (RG_TRX_STATE
& CMD_REG_MASK
) | CMD_REG
| CMD_WRITE
;
930 buf
[1] = STATE_BUSY_TX
;
932 ctx
->msg
.complete
= NULL
;
933 rc
= spi_async(lp
->spi
, &ctx
->msg
);
935 at86rf230_async_error(lp
, ctx
, rc
);
939 at86rf230_write_frame(void *context
)
941 struct at86rf230_state_change
*ctx
= context
;
942 struct at86rf230_local
*lp
= ctx
->lp
;
943 struct sk_buff
*skb
= lp
->tx_skb
;
944 u8
*buf
= lp
->tx
.buf
;
947 spin_lock(&lp
->lock
);
949 spin_unlock(&lp
->lock
);
951 buf
[0] = CMD_FB
| CMD_WRITE
;
952 buf
[1] = skb
->len
+ 2;
953 memcpy(buf
+ 2, skb
->data
, skb
->len
);
954 lp
->tx
.trx
.len
= skb
->len
+ 2;
955 lp
->tx
.msg
.complete
= at86rf230_write_frame_complete
;
956 rc
= spi_async(lp
->spi
, &lp
->tx
.msg
);
958 at86rf230_async_error(lp
, ctx
, rc
);
962 at86rf230_xmit_tx_on(void *context
)
964 struct at86rf230_state_change
*ctx
= context
;
965 struct at86rf230_local
*lp
= ctx
->lp
;
967 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ARET_ON
,
968 at86rf230_write_frame
, false);
972 at86rf230_xmit(struct ieee802154_hw
*hw
, struct sk_buff
*skb
)
974 struct at86rf230_local
*lp
= hw
->priv
;
975 struct at86rf230_state_change
*ctx
= &lp
->tx
;
977 void (*tx_complete
)(void *context
) = at86rf230_write_frame
;
981 /* In ARET mode we need to go into STATE_TX_ARET_ON after we
982 * are in STATE_TX_ON. The pfad differs here, so we change
983 * the complete handler.
986 tx_complete
= at86rf230_xmit_tx_on
;
988 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ON
, tx_complete
, false);
994 at86rf230_ed(struct ieee802154_hw
*hw
, u8
*level
)
1002 at86rf230_start(struct ieee802154_hw
*hw
)
1004 return at86rf230_sync_state_change(hw
->priv
, STATE_RX_AACK_ON
);
1008 at86rf230_stop(struct ieee802154_hw
*hw
)
1010 at86rf230_sync_state_change(hw
->priv
, STATE_FORCE_TRX_OFF
);
1014 at86rf23x_set_channel(struct at86rf230_local
*lp
, u8 page
, u8 channel
)
1016 return at86rf230_write_subreg(lp
, SR_CHANNEL
, channel
);
1020 at86rf212_set_channel(struct at86rf230_local
*lp
, u8 page
, u8 channel
)
1025 rc
= at86rf230_write_subreg(lp
, SR_SUB_MODE
, 0);
1027 rc
= at86rf230_write_subreg(lp
, SR_SUB_MODE
, 1);
1032 rc
= at86rf230_write_subreg(lp
, SR_BPSK_QPSK
, 0);
1033 lp
->data
->rssi_base_val
= -100;
1035 rc
= at86rf230_write_subreg(lp
, SR_BPSK_QPSK
, 1);
1036 lp
->data
->rssi_base_val
= -98;
1041 return at86rf230_write_subreg(lp
, SR_CHANNEL
, channel
);
1045 at86rf230_channel(struct ieee802154_hw
*hw
, u8 page
, u8 channel
)
1047 struct at86rf230_local
*lp
= hw
->priv
;
1050 rc
= lp
->data
->set_channel(lp
, page
, channel
);
1052 usleep_range(lp
->data
->t_channel_switch
,
1053 lp
->data
->t_channel_switch
+ 10);
1058 at86rf230_set_hw_addr_filt(struct ieee802154_hw
*hw
,
1059 struct ieee802154_hw_addr_filt
*filt
,
1060 unsigned long changed
)
1062 struct at86rf230_local
*lp
= hw
->priv
;
1064 if (changed
& IEEE802154_AFILT_SADDR_CHANGED
) {
1065 u16 addr
= le16_to_cpu(filt
->short_addr
);
1067 dev_vdbg(&lp
->spi
->dev
,
1068 "at86rf230_set_hw_addr_filt called for saddr\n");
1069 __at86rf230_write(lp
, RG_SHORT_ADDR_0
, addr
);
1070 __at86rf230_write(lp
, RG_SHORT_ADDR_1
, addr
>> 8);
1073 if (changed
& IEEE802154_AFILT_PANID_CHANGED
) {
1074 u16 pan
= le16_to_cpu(filt
->pan_id
);
1076 dev_vdbg(&lp
->spi
->dev
,
1077 "at86rf230_set_hw_addr_filt called for pan id\n");
1078 __at86rf230_write(lp
, RG_PAN_ID_0
, pan
);
1079 __at86rf230_write(lp
, RG_PAN_ID_1
, pan
>> 8);
1082 if (changed
& IEEE802154_AFILT_IEEEADDR_CHANGED
) {
1085 memcpy(addr
, &filt
->ieee_addr
, 8);
1086 dev_vdbg(&lp
->spi
->dev
,
1087 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1088 for (i
= 0; i
< 8; i
++)
1089 __at86rf230_write(lp
, RG_IEEE_ADDR_0
+ i
, addr
[i
]);
1092 if (changed
& IEEE802154_AFILT_PANC_CHANGED
) {
1093 dev_vdbg(&lp
->spi
->dev
,
1094 "at86rf230_set_hw_addr_filt called for panc change\n");
1095 if (filt
->pan_coord
)
1096 at86rf230_write_subreg(lp
, SR_AACK_I_AM_COORD
, 1);
1098 at86rf230_write_subreg(lp
, SR_AACK_I_AM_COORD
, 0);
1105 at86rf230_set_txpower(struct ieee802154_hw
*hw
, int db
)
1107 struct at86rf230_local
*lp
= hw
->priv
;
1109 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1110 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1112 * thus, supported values for db range from -26 to 5, for 31dB of
1113 * reduction to 0dB of reduction.
1115 if (db
> 5 || db
< -26)
1120 return __at86rf230_write(lp
, RG_PHY_TX_PWR
, 0x60 | db
);
1124 at86rf230_set_lbt(struct ieee802154_hw
*hw
, bool on
)
1126 struct at86rf230_local
*lp
= hw
->priv
;
1128 return at86rf230_write_subreg(lp
, SR_CSMA_LBT_MODE
, on
);
1132 at86rf230_set_cca_mode(struct ieee802154_hw
*hw
, u8 mode
)
1134 struct at86rf230_local
*lp
= hw
->priv
;
1136 return at86rf230_write_subreg(lp
, SR_CCA_MODE
, mode
);
1140 at86rf212_get_desens_steps(struct at86rf230_local
*lp
, s32 level
)
1142 return (level
- lp
->data
->rssi_base_val
) * 100 / 207;
1146 at86rf23x_get_desens_steps(struct at86rf230_local
*lp
, s32 level
)
1148 return (level
- lp
->data
->rssi_base_val
) / 2;
1152 at86rf230_set_cca_ed_level(struct ieee802154_hw
*hw
, s32 level
)
1154 struct at86rf230_local
*lp
= hw
->priv
;
1156 if (level
< lp
->data
->rssi_base_val
|| level
> 30)
1159 return at86rf230_write_subreg(lp
, SR_CCA_ED_THRES
,
1160 lp
->data
->get_desense_steps(lp
, level
));
1164 at86rf230_set_csma_params(struct ieee802154_hw
*hw
, u8 min_be
, u8 max_be
,
1167 struct at86rf230_local
*lp
= hw
->priv
;
1170 rc
= at86rf230_write_subreg(lp
, SR_MIN_BE
, min_be
);
1174 rc
= at86rf230_write_subreg(lp
, SR_MAX_BE
, max_be
);
1178 return at86rf230_write_subreg(lp
, SR_MAX_CSMA_RETRIES
, retries
);
1182 at86rf230_set_frame_retries(struct ieee802154_hw
*hw
, s8 retries
)
1184 struct at86rf230_local
*lp
= hw
->priv
;
1187 lp
->tx_aret
= retries
>= 0;
1188 lp
->max_frame_retries
= retries
;
1191 rc
= at86rf230_write_subreg(lp
, SR_MAX_FRAME_RETRIES
, retries
);
1197 at86rf230_set_promiscuous_mode(struct ieee802154_hw
*hw
, const bool on
)
1199 struct at86rf230_local
*lp
= hw
->priv
;
1203 rc
= at86rf230_write_subreg(lp
, SR_AACK_DIS_ACK
, 1);
1207 rc
= at86rf230_write_subreg(lp
, SR_AACK_PROM_MODE
, 1);
1211 rc
= at86rf230_write_subreg(lp
, SR_AACK_PROM_MODE
, 0);
1215 rc
= at86rf230_write_subreg(lp
, SR_AACK_DIS_ACK
, 0);
1223 static const struct ieee802154_ops at86rf230_ops
= {
1224 .owner
= THIS_MODULE
,
1225 .xmit_async
= at86rf230_xmit
,
1227 .set_channel
= at86rf230_channel
,
1228 .start
= at86rf230_start
,
1229 .stop
= at86rf230_stop
,
1230 .set_hw_addr_filt
= at86rf230_set_hw_addr_filt
,
1231 .set_txpower
= at86rf230_set_txpower
,
1232 .set_lbt
= at86rf230_set_lbt
,
1233 .set_cca_mode
= at86rf230_set_cca_mode
,
1234 .set_cca_ed_level
= at86rf230_set_cca_ed_level
,
1235 .set_csma_params
= at86rf230_set_csma_params
,
1236 .set_frame_retries
= at86rf230_set_frame_retries
,
1237 .set_promiscuous_mode
= at86rf230_set_promiscuous_mode
,
1240 static struct at86rf2xx_chip_data at86rf233_data
= {
1241 .t_sleep_cycle
= 330,
1242 .t_channel_switch
= 11,
1243 .t_reset_to_off
= 26,
1244 .t_off_to_aack
= 80,
1245 .t_off_to_tx_on
= 80,
1250 .t_tx_timeout
= 2000,
1251 .rssi_base_val
= -91,
1252 .set_channel
= at86rf23x_set_channel
,
1253 .get_desense_steps
= at86rf23x_get_desens_steps
1256 static struct at86rf2xx_chip_data at86rf231_data
= {
1257 .t_sleep_cycle
= 330,
1258 .t_channel_switch
= 24,
1259 .t_reset_to_off
= 37,
1260 .t_off_to_aack
= 110,
1261 .t_off_to_tx_on
= 110,
1266 .t_tx_timeout
= 2000,
1267 .rssi_base_val
= -91,
1268 .set_channel
= at86rf23x_set_channel
,
1269 .get_desense_steps
= at86rf23x_get_desens_steps
1272 static struct at86rf2xx_chip_data at86rf212_data
= {
1273 .t_sleep_cycle
= 330,
1274 .t_channel_switch
= 11,
1275 .t_reset_to_off
= 26,
1276 .t_off_to_aack
= 200,
1277 .t_off_to_tx_on
= 200,
1282 .t_tx_timeout
= 2000,
1283 .rssi_base_val
= -100,
1284 .set_channel
= at86rf212_set_channel
,
1285 .get_desense_steps
= at86rf212_get_desens_steps
1288 static int at86rf230_hw_init(struct at86rf230_local
*lp
)
1290 int rc
, irq_type
, irq_pol
= IRQ_ACTIVE_HIGH
;
1294 rc
= at86rf230_sync_state_change(lp
, STATE_FORCE_TRX_OFF
);
1298 irq_type
= irq_get_trigger_type(lp
->spi
->irq
);
1299 if (irq_type
== IRQ_TYPE_EDGE_FALLING
)
1300 irq_pol
= IRQ_ACTIVE_LOW
;
1302 rc
= at86rf230_write_subreg(lp
, SR_IRQ_POLARITY
, irq_pol
);
1306 rc
= at86rf230_write_subreg(lp
, SR_RX_SAFE_MODE
, 1);
1310 rc
= at86rf230_write_subreg(lp
, SR_IRQ_MASK
, IRQ_TRX_END
);
1314 get_random_bytes(csma_seed
, ARRAY_SIZE(csma_seed
));
1315 rc
= at86rf230_write_subreg(lp
, SR_CSMA_SEED_0
, csma_seed
[0]);
1318 rc
= at86rf230_write_subreg(lp
, SR_CSMA_SEED_1
, csma_seed
[1]);
1322 /* CLKM changes are applied immediately */
1323 rc
= at86rf230_write_subreg(lp
, SR_CLKM_SHA_SEL
, 0x00);
1328 rc
= at86rf230_write_subreg(lp
, SR_CLKM_CTRL
, 0x00);
1331 /* Wait the next SLEEP cycle */
1332 usleep_range(lp
->data
->t_sleep_cycle
,
1333 lp
->data
->t_sleep_cycle
+ 100);
1335 rc
= at86rf230_read_subreg(lp
, SR_DVDD_OK
, &dvdd
);
1339 dev_err(&lp
->spi
->dev
, "DVDD error\n");
1343 /* Force setting slotted operation bit to 0. Sometimes the atben
1344 * sets this bit and I don't know why. We set this always force
1345 * to zero while probing.
1347 return at86rf230_write_subreg(lp
, SR_SLOTTED_OPERATION
, 0);
1350 static struct at86rf230_platform_data
*
1351 at86rf230_get_pdata(struct spi_device
*spi
)
1353 struct at86rf230_platform_data
*pdata
;
1355 if (!IS_ENABLED(CONFIG_OF
) || !spi
->dev
.of_node
)
1356 return spi
->dev
.platform_data
;
1358 pdata
= devm_kzalloc(&spi
->dev
, sizeof(*pdata
), GFP_KERNEL
);
1362 pdata
->rstn
= of_get_named_gpio(spi
->dev
.of_node
, "reset-gpio", 0);
1363 pdata
->slp_tr
= of_get_named_gpio(spi
->dev
.of_node
, "sleep-gpio", 0);
1365 spi
->dev
.platform_data
= pdata
;
1371 at86rf230_detect_device(struct at86rf230_local
*lp
)
1373 unsigned int part
, version
, val
;
1378 rc
= __at86rf230_read(lp
, RG_MAN_ID_0
, &val
);
1383 rc
= __at86rf230_read(lp
, RG_MAN_ID_1
, &val
);
1386 man_id
|= (val
<< 8);
1388 rc
= __at86rf230_read(lp
, RG_PART_NUM
, &part
);
1392 rc
= __at86rf230_read(lp
, RG_PART_NUM
, &version
);
1396 if (man_id
!= 0x001f) {
1397 dev_err(&lp
->spi
->dev
, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1398 man_id
>> 8, man_id
& 0xFF);
1402 lp
->hw
->extra_tx_headroom
= 0;
1403 lp
->hw
->flags
= IEEE802154_HW_TX_OMIT_CKSUM
| IEEE802154_HW_AACK
|
1404 IEEE802154_HW_TXPOWER
| IEEE802154_HW_ARET
|
1405 IEEE802154_HW_AFILT
| IEEE802154_HW_PROMISCUOUS
;
1414 lp
->data
= &at86rf231_data
;
1415 lp
->hw
->phy
->channels_supported
[0] = 0x7FFF800;
1416 lp
->hw
->phy
->current_channel
= 11;
1421 lp
->data
= &at86rf212_data
;
1422 lp
->hw
->flags
|= IEEE802154_HW_LBT
;
1423 lp
->hw
->phy
->channels_supported
[0] = 0x00007FF;
1424 lp
->hw
->phy
->channels_supported
[2] = 0x00007FF;
1425 lp
->hw
->phy
->current_channel
= 5;
1432 lp
->data
= &at86rf233_data
;
1433 lp
->hw
->phy
->channels_supported
[0] = 0x7FFF800;
1434 lp
->hw
->phy
->current_channel
= 13;
1442 dev_info(&lp
->spi
->dev
, "Detected %s chip version %d\n", chip
, version
);
1448 at86rf230_setup_spi_messages(struct at86rf230_local
*lp
)
1451 spi_message_init(&lp
->state
.msg
);
1452 lp
->state
.msg
.context
= &lp
->state
;
1453 lp
->state
.trx
.tx_buf
= lp
->state
.buf
;
1454 lp
->state
.trx
.rx_buf
= lp
->state
.buf
;
1455 spi_message_add_tail(&lp
->state
.trx
, &lp
->state
.msg
);
1458 spi_message_init(&lp
->irq
.msg
);
1459 lp
->irq
.msg
.context
= &lp
->irq
;
1460 lp
->irq
.trx
.tx_buf
= lp
->irq
.buf
;
1461 lp
->irq
.trx
.rx_buf
= lp
->irq
.buf
;
1462 spi_message_add_tail(&lp
->irq
.trx
, &lp
->irq
.msg
);
1465 spi_message_init(&lp
->tx
.msg
);
1466 lp
->tx
.msg
.context
= &lp
->tx
;
1467 lp
->tx
.trx
.tx_buf
= lp
->tx
.buf
;
1468 lp
->tx
.trx
.rx_buf
= lp
->tx
.buf
;
1469 spi_message_add_tail(&lp
->tx
.trx
, &lp
->tx
.msg
);
1472 static int at86rf230_probe(struct spi_device
*spi
)
1474 struct at86rf230_platform_data
*pdata
;
1475 struct ieee802154_hw
*hw
;
1476 struct at86rf230_local
*lp
;
1477 unsigned int status
;
1481 dev_err(&spi
->dev
, "no IRQ specified\n");
1485 pdata
= at86rf230_get_pdata(spi
);
1487 dev_err(&spi
->dev
, "no platform_data\n");
1491 if (gpio_is_valid(pdata
->rstn
)) {
1492 rc
= devm_gpio_request_one(&spi
->dev
, pdata
->rstn
,
1493 GPIOF_OUT_INIT_HIGH
, "rstn");
1498 if (gpio_is_valid(pdata
->slp_tr
)) {
1499 rc
= devm_gpio_request_one(&spi
->dev
, pdata
->slp_tr
,
1500 GPIOF_OUT_INIT_LOW
, "slp_tr");
1506 if (gpio_is_valid(pdata
->rstn
)) {
1508 gpio_set_value(pdata
->rstn
, 0);
1510 gpio_set_value(pdata
->rstn
, 1);
1511 usleep_range(120, 240);
1514 hw
= ieee802154_alloc_hw(sizeof(*lp
), &at86rf230_ops
);
1521 hw
->parent
= &spi
->dev
;
1522 hw
->vif_data_size
= sizeof(*lp
);
1523 ieee802154_random_extended_addr(&hw
->phy
->perm_extended_addr
);
1525 lp
->regmap
= devm_regmap_init_spi(spi
, &at86rf230_regmap_spi_config
);
1526 if (IS_ERR(lp
->regmap
)) {
1527 rc
= PTR_ERR(lp
->regmap
);
1528 dev_err(&spi
->dev
, "Failed to allocate register map: %d\n",
1533 at86rf230_setup_spi_messages(lp
);
1535 rc
= at86rf230_detect_device(lp
);
1539 spin_lock_init(&lp
->lock
);
1540 init_completion(&lp
->state_complete
);
1542 spi_set_drvdata(spi
, lp
);
1544 rc
= at86rf230_hw_init(lp
);
1548 /* Read irq status register to reset irq line */
1549 rc
= at86rf230_read_subreg(lp
, RG_IRQ_STATUS
, 0xff, 0, &status
);
1553 irq_type
= irq_get_trigger_type(spi
->irq
);
1555 irq_type
= IRQF_TRIGGER_RISING
;
1557 rc
= devm_request_irq(&spi
->dev
, spi
->irq
, at86rf230_isr
,
1558 IRQF_SHARED
| irq_type
, dev_name(&spi
->dev
), lp
);
1562 rc
= ieee802154_register_hw(lp
->hw
);
1569 ieee802154_free_hw(lp
->hw
);
1574 static int at86rf230_remove(struct spi_device
*spi
)
1576 struct at86rf230_local
*lp
= spi_get_drvdata(spi
);
1578 /* mask all at86rf230 irq's */
1579 at86rf230_write_subreg(lp
, SR_IRQ_MASK
, 0);
1580 ieee802154_unregister_hw(lp
->hw
);
1581 ieee802154_free_hw(lp
->hw
);
1582 dev_dbg(&spi
->dev
, "unregistered at86rf230\n");
1587 static const struct of_device_id at86rf230_of_match
[] = {
1588 { .compatible
= "atmel,at86rf230", },
1589 { .compatible
= "atmel,at86rf231", },
1590 { .compatible
= "atmel,at86rf233", },
1591 { .compatible
= "atmel,at86rf212", },
1594 MODULE_DEVICE_TABLE(of
, at86rf230_of_match
);
1596 static const struct spi_device_id at86rf230_device_id
[] = {
1597 { .name
= "at86rf230", },
1598 { .name
= "at86rf231", },
1599 { .name
= "at86rf233", },
1600 { .name
= "at86rf212", },
1603 MODULE_DEVICE_TABLE(spi
, at86rf230_device_id
);
1605 static struct spi_driver at86rf230_driver
= {
1606 .id_table
= at86rf230_device_id
,
1608 .of_match_table
= of_match_ptr(at86rf230_of_match
),
1609 .name
= "at86rf230",
1610 .owner
= THIS_MODULE
,
1612 .probe
= at86rf230_probe
,
1613 .remove
= at86rf230_remove
,
1616 module_spi_driver(at86rf230_driver
);
1618 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1619 MODULE_LICENSE("GPL v2");