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[deliverable/linux.git] / drivers / net / ieee802154 / at86rf230.c
1 /*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Written by:
20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
22 */
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/interrupt.h>
26 #include <linux/gpio.h>
27 #include <linux/delay.h>
28 #include <linux/mutex.h>
29 #include <linux/workqueue.h>
30 #include <linux/spinlock.h>
31 #include <linux/spi/spi.h>
32 #include <linux/spi/at86rf230.h>
33 #include <linux/skbuff.h>
34
35 #include <net/mac802154.h>
36 #include <net/wpan-phy.h>
37
38 struct at86rf230_local {
39 struct spi_device *spi;
40
41 u8 part;
42 u8 vers;
43
44 u8 buf[2];
45 struct mutex bmux;
46
47 struct work_struct irqwork;
48 struct completion tx_complete;
49
50 struct ieee802154_dev *dev;
51
52 spinlock_t lock;
53 bool irq_busy;
54 bool is_tx;
55 bool tx_aret;
56
57 int rssi_base_val;
58 };
59
60 static bool is_rf212(struct at86rf230_local *local)
61 {
62 return local->part == 7;
63 }
64
65 #define RG_TRX_STATUS (0x01)
66 #define SR_TRX_STATUS 0x01, 0x1f, 0
67 #define SR_RESERVED_01_3 0x01, 0x20, 5
68 #define SR_CCA_STATUS 0x01, 0x40, 6
69 #define SR_CCA_DONE 0x01, 0x80, 7
70 #define RG_TRX_STATE (0x02)
71 #define SR_TRX_CMD 0x02, 0x1f, 0
72 #define SR_TRAC_STATUS 0x02, 0xe0, 5
73 #define RG_TRX_CTRL_0 (0x03)
74 #define SR_CLKM_CTRL 0x03, 0x07, 0
75 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3
76 #define SR_PAD_IO_CLKM 0x03, 0x30, 4
77 #define SR_PAD_IO 0x03, 0xc0, 6
78 #define RG_TRX_CTRL_1 (0x04)
79 #define SR_IRQ_POLARITY 0x04, 0x01, 0
80 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1
81 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2
82 #define SR_RX_BL_CTRL 0x04, 0x10, 4
83 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
84 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
85 #define SR_PA_EXT_EN 0x04, 0x80, 7
86 #define RG_PHY_TX_PWR (0x05)
87 #define SR_TX_PWR 0x05, 0x0f, 0
88 #define SR_PA_LT 0x05, 0x30, 4
89 #define SR_PA_BUF_LT 0x05, 0xc0, 6
90 #define RG_PHY_RSSI (0x06)
91 #define SR_RSSI 0x06, 0x1f, 0
92 #define SR_RND_VALUE 0x06, 0x60, 5
93 #define SR_RX_CRC_VALID 0x06, 0x80, 7
94 #define RG_PHY_ED_LEVEL (0x07)
95 #define SR_ED_LEVEL 0x07, 0xff, 0
96 #define RG_PHY_CC_CCA (0x08)
97 #define SR_CHANNEL 0x08, 0x1f, 0
98 #define SR_CCA_MODE 0x08, 0x60, 5
99 #define SR_CCA_REQUEST 0x08, 0x80, 7
100 #define RG_CCA_THRES (0x09)
101 #define SR_CCA_ED_THRES 0x09, 0x0f, 0
102 #define SR_RESERVED_09_1 0x09, 0xf0, 4
103 #define RG_RX_CTRL (0x0a)
104 #define SR_PDT_THRES 0x0a, 0x0f, 0
105 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4
106 #define RG_SFD_VALUE (0x0b)
107 #define SR_SFD_VALUE 0x0b, 0xff, 0
108 #define RG_TRX_CTRL_2 (0x0c)
109 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
110 #define SR_SUB_MODE 0x0c, 0x04, 2
111 #define SR_BPSK_QPSK 0x0c, 0x08, 3
112 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
113 #define SR_RESERVED_0c_5 0x0c, 0x60, 5
114 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7
115 #define RG_ANT_DIV (0x0d)
116 #define SR_ANT_CTRL 0x0d, 0x03, 0
117 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
118 #define SR_ANT_DIV_EN 0x0d, 0x08, 3
119 #define SR_RESERVED_0d_2 0x0d, 0x70, 4
120 #define SR_ANT_SEL 0x0d, 0x80, 7
121 #define RG_IRQ_MASK (0x0e)
122 #define SR_IRQ_MASK 0x0e, 0xff, 0
123 #define RG_IRQ_STATUS (0x0f)
124 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
125 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
126 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2
127 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
128 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
129 #define SR_IRQ_5_AMI 0x0f, 0x20, 5
130 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
131 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
132 #define RG_VREG_CTRL (0x10)
133 #define SR_RESERVED_10_6 0x10, 0x03, 0
134 #define SR_DVDD_OK 0x10, 0x04, 2
135 #define SR_DVREG_EXT 0x10, 0x08, 3
136 #define SR_RESERVED_10_3 0x10, 0x30, 4
137 #define SR_AVDD_OK 0x10, 0x40, 6
138 #define SR_AVREG_EXT 0x10, 0x80, 7
139 #define RG_BATMON (0x11)
140 #define SR_BATMON_VTH 0x11, 0x0f, 0
141 #define SR_BATMON_HR 0x11, 0x10, 4
142 #define SR_BATMON_OK 0x11, 0x20, 5
143 #define SR_RESERVED_11_1 0x11, 0xc0, 6
144 #define RG_XOSC_CTRL (0x12)
145 #define SR_XTAL_TRIM 0x12, 0x0f, 0
146 #define SR_XTAL_MODE 0x12, 0xf0, 4
147 #define RG_RX_SYN (0x15)
148 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
149 #define SR_RESERVED_15_2 0x15, 0x70, 4
150 #define SR_RX_PDT_DIS 0x15, 0x80, 7
151 #define RG_XAH_CTRL_1 (0x17)
152 #define SR_RESERVED_17_8 0x17, 0x01, 0
153 #define SR_AACK_PROM_MODE 0x17, 0x02, 1
154 #define SR_AACK_ACK_TIME 0x17, 0x04, 2
155 #define SR_RESERVED_17_5 0x17, 0x08, 3
156 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
157 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
158 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6
159 #define SR_RESERVED_17_1 0x17, 0x80, 7
160 #define RG_FTN_CTRL (0x18)
161 #define SR_RESERVED_18_2 0x18, 0x7f, 0
162 #define SR_FTN_START 0x18, 0x80, 7
163 #define RG_PLL_CF (0x1a)
164 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0
165 #define SR_PLL_CF_START 0x1a, 0x80, 7
166 #define RG_PLL_DCU (0x1b)
167 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0
168 #define SR_RESERVED_1b_2 0x1b, 0x40, 6
169 #define SR_PLL_DCU_START 0x1b, 0x80, 7
170 #define RG_PART_NUM (0x1c)
171 #define SR_PART_NUM 0x1c, 0xff, 0
172 #define RG_VERSION_NUM (0x1d)
173 #define SR_VERSION_NUM 0x1d, 0xff, 0
174 #define RG_MAN_ID_0 (0x1e)
175 #define SR_MAN_ID_0 0x1e, 0xff, 0
176 #define RG_MAN_ID_1 (0x1f)
177 #define SR_MAN_ID_1 0x1f, 0xff, 0
178 #define RG_SHORT_ADDR_0 (0x20)
179 #define SR_SHORT_ADDR_0 0x20, 0xff, 0
180 #define RG_SHORT_ADDR_1 (0x21)
181 #define SR_SHORT_ADDR_1 0x21, 0xff, 0
182 #define RG_PAN_ID_0 (0x22)
183 #define SR_PAN_ID_0 0x22, 0xff, 0
184 #define RG_PAN_ID_1 (0x23)
185 #define SR_PAN_ID_1 0x23, 0xff, 0
186 #define RG_IEEE_ADDR_0 (0x24)
187 #define SR_IEEE_ADDR_0 0x24, 0xff, 0
188 #define RG_IEEE_ADDR_1 (0x25)
189 #define SR_IEEE_ADDR_1 0x25, 0xff, 0
190 #define RG_IEEE_ADDR_2 (0x26)
191 #define SR_IEEE_ADDR_2 0x26, 0xff, 0
192 #define RG_IEEE_ADDR_3 (0x27)
193 #define SR_IEEE_ADDR_3 0x27, 0xff, 0
194 #define RG_IEEE_ADDR_4 (0x28)
195 #define SR_IEEE_ADDR_4 0x28, 0xff, 0
196 #define RG_IEEE_ADDR_5 (0x29)
197 #define SR_IEEE_ADDR_5 0x29, 0xff, 0
198 #define RG_IEEE_ADDR_6 (0x2a)
199 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0
200 #define RG_IEEE_ADDR_7 (0x2b)
201 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0
202 #define RG_XAH_CTRL_0 (0x2c)
203 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
204 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
205 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
206 #define RG_CSMA_SEED_0 (0x2d)
207 #define SR_CSMA_SEED_0 0x2d, 0xff, 0
208 #define RG_CSMA_SEED_1 (0x2e)
209 #define SR_CSMA_SEED_1 0x2e, 0x07, 0
210 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
211 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4
212 #define SR_AACK_SET_PD 0x2e, 0x20, 5
213 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
214 #define RG_CSMA_BE (0x2f)
215 #define SR_MIN_BE 0x2f, 0x0f, 0
216 #define SR_MAX_BE 0x2f, 0xf0, 4
217
218 #define CMD_REG 0x80
219 #define CMD_REG_MASK 0x3f
220 #define CMD_WRITE 0x40
221 #define CMD_FB 0x20
222
223 #define IRQ_BAT_LOW (1 << 7)
224 #define IRQ_TRX_UR (1 << 6)
225 #define IRQ_AMI (1 << 5)
226 #define IRQ_CCA_ED (1 << 4)
227 #define IRQ_TRX_END (1 << 3)
228 #define IRQ_RX_START (1 << 2)
229 #define IRQ_PLL_UNL (1 << 1)
230 #define IRQ_PLL_LOCK (1 << 0)
231
232 #define IRQ_ACTIVE_HIGH 0
233 #define IRQ_ACTIVE_LOW 1
234
235 #define STATE_P_ON 0x00 /* BUSY */
236 #define STATE_BUSY_RX 0x01
237 #define STATE_BUSY_TX 0x02
238 #define STATE_FORCE_TRX_OFF 0x03
239 #define STATE_FORCE_TX_ON 0x04 /* IDLE */
240 /* 0x05 */ /* INVALID_PARAMETER */
241 #define STATE_RX_ON 0x06
242 /* 0x07 */ /* SUCCESS */
243 #define STATE_TRX_OFF 0x08
244 #define STATE_TX_ON 0x09
245 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
246 #define STATE_SLEEP 0x0F
247 #define STATE_PREP_DEEP_SLEEP 0x10
248 #define STATE_BUSY_RX_AACK 0x11
249 #define STATE_BUSY_TX_ARET 0x12
250 #define STATE_RX_AACK_ON 0x16
251 #define STATE_TX_ARET_ON 0x19
252 #define STATE_RX_ON_NOCLK 0x1C
253 #define STATE_RX_AACK_ON_NOCLK 0x1D
254 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
255 #define STATE_TRANSITION_IN_PROGRESS 0x1F
256
257 static int
258 __at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
259 u8 *version)
260 {
261 u8 data[4];
262 u8 *buf = kmalloc(2, GFP_KERNEL);
263 int status;
264 struct spi_message msg;
265 struct spi_transfer xfer = {
266 .len = 2,
267 .tx_buf = buf,
268 .rx_buf = buf,
269 };
270 u8 reg;
271
272 if (!buf)
273 return -ENOMEM;
274
275 for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
276 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
277 buf[1] = 0xff;
278 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
279 spi_message_init(&msg);
280 spi_message_add_tail(&xfer, &msg);
281
282 status = spi_sync(spi, &msg);
283 dev_vdbg(&spi->dev, "status = %d\n", status);
284 if (msg.status)
285 status = msg.status;
286
287 dev_vdbg(&spi->dev, "status = %d\n", status);
288 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
289 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
290
291 if (status == 0)
292 data[reg - RG_PART_NUM] = buf[1];
293 else
294 break;
295 }
296
297 if (status == 0) {
298 *part = data[0];
299 *version = data[1];
300 *man_id = (data[3] << 8) | data[2];
301 }
302
303 kfree(buf);
304
305 return status;
306 }
307
308 static int
309 __at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
310 {
311 u8 *buf = lp->buf;
312 int status;
313 struct spi_message msg;
314 struct spi_transfer xfer = {
315 .len = 2,
316 .tx_buf = buf,
317 };
318
319 buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
320 buf[1] = data;
321 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
322 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
323 spi_message_init(&msg);
324 spi_message_add_tail(&xfer, &msg);
325
326 status = spi_sync(lp->spi, &msg);
327 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
328 if (msg.status)
329 status = msg.status;
330
331 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
332 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
333 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
334
335 return status;
336 }
337
338 static int
339 __at86rf230_read_subreg(struct at86rf230_local *lp,
340 u8 addr, u8 mask, int shift, u8 *data)
341 {
342 u8 *buf = lp->buf;
343 int status;
344 struct spi_message msg;
345 struct spi_transfer xfer = {
346 .len = 2,
347 .tx_buf = buf,
348 .rx_buf = buf,
349 };
350
351 buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
352 buf[1] = 0xff;
353 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
354 spi_message_init(&msg);
355 spi_message_add_tail(&xfer, &msg);
356
357 status = spi_sync(lp->spi, &msg);
358 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
359 if (msg.status)
360 status = msg.status;
361
362 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
363 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
364 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
365
366 if (status == 0)
367 *data = buf[1];
368
369 return status;
370 }
371
372 static int
373 at86rf230_read_subreg(struct at86rf230_local *lp,
374 u8 addr, u8 mask, int shift, u8 *data)
375 {
376 int status;
377
378 mutex_lock(&lp->bmux);
379 status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
380 mutex_unlock(&lp->bmux);
381
382 return status;
383 }
384
385 static int
386 at86rf230_write_subreg(struct at86rf230_local *lp,
387 u8 addr, u8 mask, int shift, u8 data)
388 {
389 int status;
390 u8 val;
391
392 mutex_lock(&lp->bmux);
393 status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
394 if (status)
395 goto out;
396
397 val &= ~mask;
398 val |= (data << shift) & mask;
399
400 status = __at86rf230_write(lp, addr, val);
401 out:
402 mutex_unlock(&lp->bmux);
403
404 return status;
405 }
406
407 static int
408 at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
409 {
410 u8 *buf = lp->buf;
411 int status;
412 struct spi_message msg;
413 struct spi_transfer xfer_head = {
414 .len = 2,
415 .tx_buf = buf,
416
417 };
418 struct spi_transfer xfer_buf = {
419 .len = len,
420 .tx_buf = data,
421 };
422
423 mutex_lock(&lp->bmux);
424 buf[0] = CMD_WRITE | CMD_FB;
425 buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
426
427 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
428 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
429
430 spi_message_init(&msg);
431 spi_message_add_tail(&xfer_head, &msg);
432 spi_message_add_tail(&xfer_buf, &msg);
433
434 status = spi_sync(lp->spi, &msg);
435 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
436 if (msg.status)
437 status = msg.status;
438
439 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
440 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
441 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
442
443 mutex_unlock(&lp->bmux);
444 return status;
445 }
446
447 static int
448 at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
449 {
450 u8 *buf = lp->buf;
451 int status;
452 struct spi_message msg;
453 struct spi_transfer xfer_head = {
454 .len = 2,
455 .tx_buf = buf,
456 .rx_buf = buf,
457 };
458 struct spi_transfer xfer_head1 = {
459 .len = 2,
460 .tx_buf = buf,
461 .rx_buf = buf,
462 };
463 struct spi_transfer xfer_buf = {
464 .len = 0,
465 .rx_buf = data,
466 };
467
468 mutex_lock(&lp->bmux);
469
470 buf[0] = CMD_FB;
471 buf[1] = 0x00;
472
473 spi_message_init(&msg);
474 spi_message_add_tail(&xfer_head, &msg);
475
476 status = spi_sync(lp->spi, &msg);
477 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
478
479 xfer_buf.len = *(buf + 1) + 1;
480 *len = buf[1];
481
482 buf[0] = CMD_FB;
483 buf[1] = 0x00;
484
485 spi_message_init(&msg);
486 spi_message_add_tail(&xfer_head1, &msg);
487 spi_message_add_tail(&xfer_buf, &msg);
488
489 status = spi_sync(lp->spi, &msg);
490
491 if (msg.status)
492 status = msg.status;
493
494 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
495 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
496 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
497
498 if (status) {
499 if (lqi && (*len > lp->buf[1]))
500 *lqi = data[lp->buf[1]];
501 }
502 mutex_unlock(&lp->bmux);
503
504 return status;
505 }
506
507 static int
508 at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
509 {
510 might_sleep();
511 BUG_ON(!level);
512 *level = 0xbe;
513 return 0;
514 }
515
516 static int
517 at86rf230_state(struct ieee802154_dev *dev, int state)
518 {
519 struct at86rf230_local *lp = dev->priv;
520 int rc;
521 u8 val;
522 u8 desired_status;
523
524 might_sleep();
525
526 if (state == STATE_FORCE_TX_ON)
527 desired_status = STATE_TX_ON;
528 else if (state == STATE_FORCE_TRX_OFF)
529 desired_status = STATE_TRX_OFF;
530 else
531 desired_status = state;
532
533 do {
534 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
535 if (rc)
536 goto err;
537 } while (val == STATE_TRANSITION_IN_PROGRESS);
538
539 if (val == desired_status)
540 return 0;
541
542 /* state is equal to phy states */
543 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
544 if (rc)
545 goto err;
546
547 do {
548 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
549 if (rc)
550 goto err;
551 } while (val == STATE_TRANSITION_IN_PROGRESS);
552
553
554 if (val == desired_status ||
555 (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
556 (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
557 return 0;
558
559 pr_err("unexpected state change: %d, asked for %d\n", val, state);
560 return -EBUSY;
561
562 err:
563 pr_err("error: %d\n", rc);
564 return rc;
565 }
566
567 static int
568 at86rf230_start(struct ieee802154_dev *dev)
569 {
570 struct at86rf230_local *lp = dev->priv;
571 u8 rc;
572
573 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
574 if (rc)
575 return rc;
576
577 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
578 if (rc)
579 return rc;
580
581 return at86rf230_state(dev, STATE_RX_AACK_ON);
582 }
583
584 static void
585 at86rf230_stop(struct ieee802154_dev *dev)
586 {
587 at86rf230_state(dev, STATE_FORCE_TRX_OFF);
588 }
589
590 static int
591 at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
592 {
593 lp->rssi_base_val = -91;
594
595 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
596 }
597
598 static int
599 at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
600 {
601 int rc;
602
603 if (channel == 0)
604 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
605 else
606 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
607 if (rc < 0)
608 return rc;
609
610 if (page == 0) {
611 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
612 lp->rssi_base_val = -100;
613 } else {
614 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
615 lp->rssi_base_val = -98;
616 }
617 if (rc < 0)
618 return rc;
619
620 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
621 }
622
623 static int
624 at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
625 {
626 struct at86rf230_local *lp = dev->priv;
627 int rc;
628
629 might_sleep();
630
631 if (page < 0 || page > 31 ||
632 !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
633 WARN_ON(1);
634 return -EINVAL;
635 }
636
637 if (is_rf212(lp))
638 rc = at86rf212_set_channel(lp, page, channel);
639 else
640 rc = at86rf230_set_channel(lp, page, channel);
641 if (rc < 0)
642 return rc;
643
644 msleep(1); /* Wait for PLL */
645 dev->phy->current_channel = channel;
646 dev->phy->current_page = page;
647
648 return 0;
649 }
650
651 static int
652 at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
653 {
654 struct at86rf230_local *lp = dev->priv;
655 int rc;
656 unsigned long flags;
657
658 spin_lock(&lp->lock);
659 if (lp->irq_busy) {
660 spin_unlock(&lp->lock);
661 return -EBUSY;
662 }
663 spin_unlock(&lp->lock);
664
665 might_sleep();
666
667 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
668 if (rc)
669 goto err;
670
671 spin_lock_irqsave(&lp->lock, flags);
672 lp->is_tx = 1;
673 reinit_completion(&lp->tx_complete);
674 spin_unlock_irqrestore(&lp->lock, flags);
675
676 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
677 if (rc)
678 goto err_rx;
679
680 if (lp->tx_aret) {
681 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
682 if (rc)
683 goto err_rx;
684 }
685
686 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
687 if (rc)
688 goto err_rx;
689
690 rc = wait_for_completion_interruptible(&lp->tx_complete);
691 if (rc < 0)
692 goto err_rx;
693
694 rc = at86rf230_start(dev);
695
696 return rc;
697
698 err_rx:
699 at86rf230_start(dev);
700 err:
701 pr_err("error: %d\n", rc);
702
703 spin_lock_irqsave(&lp->lock, flags);
704 lp->is_tx = 0;
705 spin_unlock_irqrestore(&lp->lock, flags);
706
707 return rc;
708 }
709
710 static int at86rf230_rx(struct at86rf230_local *lp)
711 {
712 u8 len = 128, lqi = 0;
713 struct sk_buff *skb;
714
715 skb = alloc_skb(len, GFP_KERNEL);
716
717 if (!skb)
718 return -ENOMEM;
719
720 if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
721 goto err;
722
723 if (len < 2)
724 goto err;
725
726 skb_trim(skb, len - 2); /* We do not put CRC into the frame */
727
728 ieee802154_rx_irqsafe(lp->dev, skb, lqi);
729
730 dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
731
732 return 0;
733 err:
734 pr_debug("received frame is too small\n");
735
736 kfree_skb(skb);
737 return -EINVAL;
738 }
739
740 static int
741 at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
742 struct ieee802154_hw_addr_filt *filt,
743 unsigned long changed)
744 {
745 struct at86rf230_local *lp = dev->priv;
746
747 if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
748 dev_vdbg(&lp->spi->dev,
749 "at86rf230_set_hw_addr_filt called for saddr\n");
750 __at86rf230_write(lp, RG_SHORT_ADDR_0, filt->short_addr);
751 __at86rf230_write(lp, RG_SHORT_ADDR_1, filt->short_addr >> 8);
752 }
753
754 if (changed & IEEE802515_AFILT_PANID_CHANGED) {
755 dev_vdbg(&lp->spi->dev,
756 "at86rf230_set_hw_addr_filt called for pan id\n");
757 __at86rf230_write(lp, RG_PAN_ID_0, filt->pan_id);
758 __at86rf230_write(lp, RG_PAN_ID_1, filt->pan_id >> 8);
759 }
760
761 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
762 dev_vdbg(&lp->spi->dev,
763 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
764 at86rf230_write_subreg(lp, SR_IEEE_ADDR_0, filt->ieee_addr[7]);
765 at86rf230_write_subreg(lp, SR_IEEE_ADDR_1, filt->ieee_addr[6]);
766 at86rf230_write_subreg(lp, SR_IEEE_ADDR_2, filt->ieee_addr[5]);
767 at86rf230_write_subreg(lp, SR_IEEE_ADDR_3, filt->ieee_addr[4]);
768 at86rf230_write_subreg(lp, SR_IEEE_ADDR_4, filt->ieee_addr[3]);
769 at86rf230_write_subreg(lp, SR_IEEE_ADDR_5, filt->ieee_addr[2]);
770 at86rf230_write_subreg(lp, SR_IEEE_ADDR_6, filt->ieee_addr[1]);
771 at86rf230_write_subreg(lp, SR_IEEE_ADDR_7, filt->ieee_addr[0]);
772 }
773
774 if (changed & IEEE802515_AFILT_PANC_CHANGED) {
775 dev_vdbg(&lp->spi->dev,
776 "at86rf230_set_hw_addr_filt called for panc change\n");
777 if (filt->pan_coord)
778 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
779 else
780 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
781 }
782
783 return 0;
784 }
785
786 static int
787 at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
788 {
789 struct at86rf230_local *lp = dev->priv;
790
791 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
792 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
793 * 0dB.
794 * thus, supported values for db range from -26 to 5, for 31dB of
795 * reduction to 0dB of reduction.
796 */
797 if (db > 5 || db < -26)
798 return -EINVAL;
799
800 db = -(db - 5);
801
802 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
803 }
804
805 static int
806 at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
807 {
808 struct at86rf230_local *lp = dev->priv;
809
810 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
811 }
812
813 static int
814 at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
815 {
816 struct at86rf230_local *lp = dev->priv;
817
818 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
819 }
820
821 static int
822 at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
823 {
824 struct at86rf230_local *lp = dev->priv;
825 int desens_steps;
826
827 if (level < lp->rssi_base_val || level > 30)
828 return -EINVAL;
829
830 desens_steps = (level - lp->rssi_base_val) * 100 / 207;
831
832 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
833 }
834
835 static int
836 at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
837 u8 retries)
838 {
839 struct at86rf230_local *lp = dev->priv;
840 int rc;
841
842 if (min_be > max_be || max_be > 8 || retries > 5)
843 return -EINVAL;
844
845 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
846 if (rc)
847 return rc;
848
849 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
850 if (rc)
851 return rc;
852
853 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, max_be);
854 }
855
856 static int
857 at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
858 {
859 struct at86rf230_local *lp = dev->priv;
860 int rc = 0;
861
862 if (retries < -1 || retries > 15)
863 return -EINVAL;
864
865 lp->tx_aret = retries >= 0;
866
867 if (retries >= 0)
868 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
869
870 return rc;
871 }
872
873 static struct ieee802154_ops at86rf230_ops = {
874 .owner = THIS_MODULE,
875 .xmit = at86rf230_xmit,
876 .ed = at86rf230_ed,
877 .set_channel = at86rf230_channel,
878 .start = at86rf230_start,
879 .stop = at86rf230_stop,
880 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
881 };
882
883 static struct ieee802154_ops at86rf212_ops = {
884 .owner = THIS_MODULE,
885 .xmit = at86rf230_xmit,
886 .ed = at86rf230_ed,
887 .set_channel = at86rf230_channel,
888 .start = at86rf230_start,
889 .stop = at86rf230_stop,
890 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
891 .set_txpower = at86rf212_set_txpower,
892 .set_lbt = at86rf212_set_lbt,
893 .set_cca_mode = at86rf212_set_cca_mode,
894 .set_cca_ed_level = at86rf212_set_cca_ed_level,
895 .set_csma_params = at86rf212_set_csma_params,
896 .set_frame_retries = at86rf212_set_frame_retries,
897 };
898
899 static void at86rf230_irqwork(struct work_struct *work)
900 {
901 struct at86rf230_local *lp =
902 container_of(work, struct at86rf230_local, irqwork);
903 u8 status = 0, val;
904 int rc;
905 unsigned long flags;
906
907 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
908 status |= val;
909
910 status &= ~IRQ_PLL_LOCK; /* ignore */
911 status &= ~IRQ_RX_START; /* ignore */
912 status &= ~IRQ_AMI; /* ignore */
913 status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
914
915 if (status & IRQ_TRX_END) {
916 spin_lock_irqsave(&lp->lock, flags);
917 status &= ~IRQ_TRX_END;
918 if (lp->is_tx) {
919 lp->is_tx = 0;
920 spin_unlock_irqrestore(&lp->lock, flags);
921 complete(&lp->tx_complete);
922 } else {
923 spin_unlock_irqrestore(&lp->lock, flags);
924 at86rf230_rx(lp);
925 }
926 }
927
928 spin_lock_irqsave(&lp->lock, flags);
929 lp->irq_busy = 0;
930 spin_unlock_irqrestore(&lp->lock, flags);
931 }
932
933 static void at86rf230_irqwork_level(struct work_struct *work)
934 {
935 struct at86rf230_local *lp =
936 container_of(work, struct at86rf230_local, irqwork);
937
938 at86rf230_irqwork(work);
939
940 enable_irq(lp->spi->irq);
941 }
942
943 static irqreturn_t at86rf230_isr(int irq, void *data)
944 {
945 struct at86rf230_local *lp = data;
946
947 spin_lock(&lp->lock);
948 lp->irq_busy = 1;
949 spin_unlock(&lp->lock);
950
951 schedule_work(&lp->irqwork);
952
953 return IRQ_HANDLED;
954 }
955
956 static irqreturn_t at86rf230_isr_level(int irq, void *data)
957 {
958 disable_irq_nosync(irq);
959
960 return at86rf230_isr(irq, data);
961 }
962
963 static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
964 {
965 return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
966 }
967
968 static int at86rf230_hw_init(struct at86rf230_local *lp)
969 {
970 struct at86rf230_platform_data *pdata = lp->spi->dev.platform_data;
971 int rc, irq_pol;
972 u8 status;
973 u8 csma_seed[2];
974
975 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
976 if (rc)
977 return rc;
978
979 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
980 if (rc)
981 return rc;
982
983 /* configure irq polarity, defaults to high active */
984 if (pdata->irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
985 irq_pol = IRQ_ACTIVE_LOW;
986 else
987 irq_pol = IRQ_ACTIVE_HIGH;
988
989 rc = at86rf230_irq_polarity(lp, irq_pol);
990 if (rc)
991 return rc;
992
993 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
994 if (rc)
995 return rc;
996
997 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
998 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
999 if (rc)
1000 return rc;
1001 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1002 if (rc)
1003 return rc;
1004
1005 /* CLKM changes are applied immediately */
1006 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1007 if (rc)
1008 return rc;
1009
1010 /* Turn CLKM Off */
1011 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1012 if (rc)
1013 return rc;
1014 /* Wait the next SLEEP cycle */
1015 msleep(100);
1016
1017 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1018 if (rc)
1019 return rc;
1020 if (!status) {
1021 dev_err(&lp->spi->dev, "DVDD error\n");
1022 return -EINVAL;
1023 }
1024
1025 rc = at86rf230_read_subreg(lp, SR_AVDD_OK, &status);
1026 if (rc)
1027 return rc;
1028 if (!status) {
1029 dev_err(&lp->spi->dev, "AVDD error\n");
1030 return -EINVAL;
1031 }
1032
1033 return 0;
1034 }
1035
1036 static int at86rf230_probe(struct spi_device *spi)
1037 {
1038 struct at86rf230_platform_data *pdata;
1039 struct ieee802154_dev *dev;
1040 struct at86rf230_local *lp;
1041 u16 man_id = 0;
1042 u8 part = 0, version = 0, status;
1043 irq_handler_t irq_handler;
1044 work_func_t irq_worker;
1045 int rc;
1046 const char *chip;
1047 struct ieee802154_ops *ops = NULL;
1048
1049 if (!spi->irq) {
1050 dev_err(&spi->dev, "no IRQ specified\n");
1051 return -EINVAL;
1052 }
1053
1054 pdata = spi->dev.platform_data;
1055 if (!pdata) {
1056 dev_err(&spi->dev, "no platform_data\n");
1057 return -EINVAL;
1058 }
1059
1060 rc = gpio_request(pdata->rstn, "rstn");
1061 if (rc)
1062 return rc;
1063
1064 if (gpio_is_valid(pdata->slp_tr)) {
1065 rc = gpio_request(pdata->slp_tr, "slp_tr");
1066 if (rc)
1067 goto err_slp_tr;
1068 }
1069
1070 rc = gpio_direction_output(pdata->rstn, 1);
1071 if (rc)
1072 goto err_gpio_dir;
1073
1074 if (gpio_is_valid(pdata->slp_tr)) {
1075 rc = gpio_direction_output(pdata->slp_tr, 0);
1076 if (rc)
1077 goto err_gpio_dir;
1078 }
1079
1080 /* Reset */
1081 msleep(1);
1082 gpio_set_value(pdata->rstn, 0);
1083 msleep(1);
1084 gpio_set_value(pdata->rstn, 1);
1085 msleep(1);
1086
1087 rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1088 if (rc < 0)
1089 goto err_gpio_dir;
1090
1091 if (man_id != 0x001f) {
1092 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1093 man_id >> 8, man_id & 0xFF);
1094 rc = -EINVAL;
1095 goto err_gpio_dir;
1096 }
1097
1098 switch (part) {
1099 case 2:
1100 chip = "at86rf230";
1101 /* FIXME: should be easy to support; */
1102 break;
1103 case 3:
1104 chip = "at86rf231";
1105 ops = &at86rf230_ops;
1106 break;
1107 case 7:
1108 chip = "at86rf212";
1109 if (version == 1)
1110 ops = &at86rf212_ops;
1111 break;
1112 case 11:
1113 chip = "at86rf233";
1114 ops = &at86rf230_ops;
1115 break;
1116 default:
1117 chip = "UNKNOWN";
1118 break;
1119 }
1120
1121 dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1122 if (!ops) {
1123 rc = -ENOTSUPP;
1124 goto err_gpio_dir;
1125 }
1126
1127 dev = ieee802154_alloc_device(sizeof(*lp), ops);
1128 if (!dev) {
1129 rc = -ENOMEM;
1130 goto err_gpio_dir;
1131 }
1132
1133 lp = dev->priv;
1134 lp->dev = dev;
1135 lp->part = part;
1136 lp->vers = version;
1137
1138 lp->spi = spi;
1139
1140 dev->parent = &spi->dev;
1141 dev->extra_tx_headroom = 0;
1142 dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1143
1144 if (pdata->irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1145 irq_worker = at86rf230_irqwork;
1146 irq_handler = at86rf230_isr;
1147 } else {
1148 irq_worker = at86rf230_irqwork_level;
1149 irq_handler = at86rf230_isr_level;
1150 }
1151
1152 mutex_init(&lp->bmux);
1153 INIT_WORK(&lp->irqwork, irq_worker);
1154 spin_lock_init(&lp->lock);
1155 init_completion(&lp->tx_complete);
1156
1157 spi_set_drvdata(spi, lp);
1158
1159 if (is_rf212(lp)) {
1160 dev->phy->channels_supported[0] = 0x00007FF;
1161 dev->phy->channels_supported[2] = 0x00007FF;
1162 } else {
1163 dev->phy->channels_supported[0] = 0x7FFF800;
1164 }
1165
1166 rc = at86rf230_hw_init(lp);
1167 if (rc)
1168 goto err_hw_init;
1169
1170 rc = request_irq(spi->irq, irq_handler,
1171 IRQF_SHARED | pdata->irq_type,
1172 dev_name(&spi->dev), lp);
1173 if (rc)
1174 goto err_hw_init;
1175
1176 /* Read irq status register to reset irq line */
1177 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1178 if (rc)
1179 goto err_irq;
1180
1181 rc = ieee802154_register_device(lp->dev);
1182 if (rc)
1183 goto err_irq;
1184
1185 return rc;
1186
1187 err_irq:
1188 free_irq(spi->irq, lp);
1189 err_hw_init:
1190 flush_work(&lp->irqwork);
1191 spi_set_drvdata(spi, NULL);
1192 mutex_destroy(&lp->bmux);
1193 ieee802154_free_device(lp->dev);
1194
1195 err_gpio_dir:
1196 if (gpio_is_valid(pdata->slp_tr))
1197 gpio_free(pdata->slp_tr);
1198 err_slp_tr:
1199 gpio_free(pdata->rstn);
1200 return rc;
1201 }
1202
1203 static int at86rf230_remove(struct spi_device *spi)
1204 {
1205 struct at86rf230_local *lp = spi_get_drvdata(spi);
1206 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1207
1208 ieee802154_unregister_device(lp->dev);
1209
1210 free_irq(spi->irq, lp);
1211 flush_work(&lp->irqwork);
1212
1213 if (gpio_is_valid(pdata->slp_tr))
1214 gpio_free(pdata->slp_tr);
1215 gpio_free(pdata->rstn);
1216
1217 mutex_destroy(&lp->bmux);
1218 ieee802154_free_device(lp->dev);
1219
1220 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1221 return 0;
1222 }
1223
1224 static struct spi_driver at86rf230_driver = {
1225 .driver = {
1226 .name = "at86rf230",
1227 .owner = THIS_MODULE,
1228 },
1229 .probe = at86rf230_probe,
1230 .remove = at86rf230_remove,
1231 };
1232
1233 module_spi_driver(at86rf230_driver);
1234
1235 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1236 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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