2 * AT86RF230/RF231 driver
4 * Copyright (C) 2009-2012 Siemens AG
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 * Alexander Aring <aar@pengutronix.de>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/hrtimer.h>
23 #include <linux/jiffies.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/gpio.h>
27 #include <linux/delay.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/at86rf230.h>
30 #include <linux/regmap.h>
31 #include <linux/skbuff.h>
32 #include <linux/of_gpio.h>
33 #include <linux/ieee802154.h>
35 #include <net/mac802154.h>
36 #include <net/cfg802154.h>
38 struct at86rf230_local
;
39 /* at86rf2xx chip depend data.
40 * All timings are in us.
42 struct at86rf2xx_chip_data
{
52 int (*set_channel
)(struct at86rf230_local
*, u8
, u8
);
53 int (*get_desense_steps
)(struct at86rf230_local
*, s32
);
56 #define AT86RF2XX_MAX_BUF (127 + 3)
57 /* tx retries to access the TX_ON state
58 * if it's above then force change will be started.
60 * We assume the max_frame_retries (7) value of 802.15.4 here.
62 #define AT86RF2XX_MAX_TX_RETRIES 7
63 /* We use the recommended 5 minutes timeout to recalibrate */
64 #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
66 struct at86rf230_state_change
{
67 struct at86rf230_local
*lp
;
71 struct spi_message msg
;
72 struct spi_transfer trx
;
73 u8 buf
[AT86RF2XX_MAX_BUF
];
75 void (*complete
)(void *context
);
82 struct at86rf230_local
{
83 struct spi_device
*spi
;
85 struct ieee802154_hw
*hw
;
86 struct at86rf2xx_chip_data
*data
;
87 struct regmap
*regmap
;
89 struct completion state_complete
;
90 struct at86rf230_state_change state
;
92 struct at86rf230_state_change irq
;
95 unsigned long cal_timeout
;
99 struct sk_buff
*tx_skb
;
100 struct at86rf230_state_change tx
;
103 #define RG_TRX_STATUS (0x01)
104 #define SR_TRX_STATUS 0x01, 0x1f, 0
105 #define SR_RESERVED_01_3 0x01, 0x20, 5
106 #define SR_CCA_STATUS 0x01, 0x40, 6
107 #define SR_CCA_DONE 0x01, 0x80, 7
108 #define RG_TRX_STATE (0x02)
109 #define SR_TRX_CMD 0x02, 0x1f, 0
110 #define SR_TRAC_STATUS 0x02, 0xe0, 5
111 #define RG_TRX_CTRL_0 (0x03)
112 #define SR_CLKM_CTRL 0x03, 0x07, 0
113 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3
114 #define SR_PAD_IO_CLKM 0x03, 0x30, 4
115 #define SR_PAD_IO 0x03, 0xc0, 6
116 #define RG_TRX_CTRL_1 (0x04)
117 #define SR_IRQ_POLARITY 0x04, 0x01, 0
118 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1
119 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2
120 #define SR_RX_BL_CTRL 0x04, 0x10, 4
121 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
122 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
123 #define SR_PA_EXT_EN 0x04, 0x80, 7
124 #define RG_PHY_TX_PWR (0x05)
125 #define SR_TX_PWR 0x05, 0x0f, 0
126 #define SR_PA_LT 0x05, 0x30, 4
127 #define SR_PA_BUF_LT 0x05, 0xc0, 6
128 #define RG_PHY_RSSI (0x06)
129 #define SR_RSSI 0x06, 0x1f, 0
130 #define SR_RND_VALUE 0x06, 0x60, 5
131 #define SR_RX_CRC_VALID 0x06, 0x80, 7
132 #define RG_PHY_ED_LEVEL (0x07)
133 #define SR_ED_LEVEL 0x07, 0xff, 0
134 #define RG_PHY_CC_CCA (0x08)
135 #define SR_CHANNEL 0x08, 0x1f, 0
136 #define SR_CCA_MODE 0x08, 0x60, 5
137 #define SR_CCA_REQUEST 0x08, 0x80, 7
138 #define RG_CCA_THRES (0x09)
139 #define SR_CCA_ED_THRES 0x09, 0x0f, 0
140 #define SR_RESERVED_09_1 0x09, 0xf0, 4
141 #define RG_RX_CTRL (0x0a)
142 #define SR_PDT_THRES 0x0a, 0x0f, 0
143 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4
144 #define RG_SFD_VALUE (0x0b)
145 #define SR_SFD_VALUE 0x0b, 0xff, 0
146 #define RG_TRX_CTRL_2 (0x0c)
147 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
148 #define SR_SUB_MODE 0x0c, 0x04, 2
149 #define SR_BPSK_QPSK 0x0c, 0x08, 3
150 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
151 #define SR_RESERVED_0c_5 0x0c, 0x60, 5
152 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7
153 #define RG_ANT_DIV (0x0d)
154 #define SR_ANT_CTRL 0x0d, 0x03, 0
155 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
156 #define SR_ANT_DIV_EN 0x0d, 0x08, 3
157 #define SR_RESERVED_0d_2 0x0d, 0x70, 4
158 #define SR_ANT_SEL 0x0d, 0x80, 7
159 #define RG_IRQ_MASK (0x0e)
160 #define SR_IRQ_MASK 0x0e, 0xff, 0
161 #define RG_IRQ_STATUS (0x0f)
162 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
163 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
164 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2
165 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
166 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
167 #define SR_IRQ_5_AMI 0x0f, 0x20, 5
168 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
169 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
170 #define RG_VREG_CTRL (0x10)
171 #define SR_RESERVED_10_6 0x10, 0x03, 0
172 #define SR_DVDD_OK 0x10, 0x04, 2
173 #define SR_DVREG_EXT 0x10, 0x08, 3
174 #define SR_RESERVED_10_3 0x10, 0x30, 4
175 #define SR_AVDD_OK 0x10, 0x40, 6
176 #define SR_AVREG_EXT 0x10, 0x80, 7
177 #define RG_BATMON (0x11)
178 #define SR_BATMON_VTH 0x11, 0x0f, 0
179 #define SR_BATMON_HR 0x11, 0x10, 4
180 #define SR_BATMON_OK 0x11, 0x20, 5
181 #define SR_RESERVED_11_1 0x11, 0xc0, 6
182 #define RG_XOSC_CTRL (0x12)
183 #define SR_XTAL_TRIM 0x12, 0x0f, 0
184 #define SR_XTAL_MODE 0x12, 0xf0, 4
185 #define RG_RX_SYN (0x15)
186 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
187 #define SR_RESERVED_15_2 0x15, 0x70, 4
188 #define SR_RX_PDT_DIS 0x15, 0x80, 7
189 #define RG_XAH_CTRL_1 (0x17)
190 #define SR_RESERVED_17_8 0x17, 0x01, 0
191 #define SR_AACK_PROM_MODE 0x17, 0x02, 1
192 #define SR_AACK_ACK_TIME 0x17, 0x04, 2
193 #define SR_RESERVED_17_5 0x17, 0x08, 3
194 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
195 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
196 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6
197 #define SR_RESERVED_17_1 0x17, 0x80, 7
198 #define RG_FTN_CTRL (0x18)
199 #define SR_RESERVED_18_2 0x18, 0x7f, 0
200 #define SR_FTN_START 0x18, 0x80, 7
201 #define RG_PLL_CF (0x1a)
202 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0
203 #define SR_PLL_CF_START 0x1a, 0x80, 7
204 #define RG_PLL_DCU (0x1b)
205 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0
206 #define SR_RESERVED_1b_2 0x1b, 0x40, 6
207 #define SR_PLL_DCU_START 0x1b, 0x80, 7
208 #define RG_PART_NUM (0x1c)
209 #define SR_PART_NUM 0x1c, 0xff, 0
210 #define RG_VERSION_NUM (0x1d)
211 #define SR_VERSION_NUM 0x1d, 0xff, 0
212 #define RG_MAN_ID_0 (0x1e)
213 #define SR_MAN_ID_0 0x1e, 0xff, 0
214 #define RG_MAN_ID_1 (0x1f)
215 #define SR_MAN_ID_1 0x1f, 0xff, 0
216 #define RG_SHORT_ADDR_0 (0x20)
217 #define SR_SHORT_ADDR_0 0x20, 0xff, 0
218 #define RG_SHORT_ADDR_1 (0x21)
219 #define SR_SHORT_ADDR_1 0x21, 0xff, 0
220 #define RG_PAN_ID_0 (0x22)
221 #define SR_PAN_ID_0 0x22, 0xff, 0
222 #define RG_PAN_ID_1 (0x23)
223 #define SR_PAN_ID_1 0x23, 0xff, 0
224 #define RG_IEEE_ADDR_0 (0x24)
225 #define SR_IEEE_ADDR_0 0x24, 0xff, 0
226 #define RG_IEEE_ADDR_1 (0x25)
227 #define SR_IEEE_ADDR_1 0x25, 0xff, 0
228 #define RG_IEEE_ADDR_2 (0x26)
229 #define SR_IEEE_ADDR_2 0x26, 0xff, 0
230 #define RG_IEEE_ADDR_3 (0x27)
231 #define SR_IEEE_ADDR_3 0x27, 0xff, 0
232 #define RG_IEEE_ADDR_4 (0x28)
233 #define SR_IEEE_ADDR_4 0x28, 0xff, 0
234 #define RG_IEEE_ADDR_5 (0x29)
235 #define SR_IEEE_ADDR_5 0x29, 0xff, 0
236 #define RG_IEEE_ADDR_6 (0x2a)
237 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0
238 #define RG_IEEE_ADDR_7 (0x2b)
239 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0
240 #define RG_XAH_CTRL_0 (0x2c)
241 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
242 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
243 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
244 #define RG_CSMA_SEED_0 (0x2d)
245 #define SR_CSMA_SEED_0 0x2d, 0xff, 0
246 #define RG_CSMA_SEED_1 (0x2e)
247 #define SR_CSMA_SEED_1 0x2e, 0x07, 0
248 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
249 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4
250 #define SR_AACK_SET_PD 0x2e, 0x20, 5
251 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
252 #define RG_CSMA_BE (0x2f)
253 #define SR_MIN_BE 0x2f, 0x0f, 0
254 #define SR_MAX_BE 0x2f, 0xf0, 4
257 #define CMD_REG_MASK 0x3f
258 #define CMD_WRITE 0x40
261 #define IRQ_BAT_LOW (1 << 7)
262 #define IRQ_TRX_UR (1 << 6)
263 #define IRQ_AMI (1 << 5)
264 #define IRQ_CCA_ED (1 << 4)
265 #define IRQ_TRX_END (1 << 3)
266 #define IRQ_RX_START (1 << 2)
267 #define IRQ_PLL_UNL (1 << 1)
268 #define IRQ_PLL_LOCK (1 << 0)
270 #define IRQ_ACTIVE_HIGH 0
271 #define IRQ_ACTIVE_LOW 1
273 #define STATE_P_ON 0x00 /* BUSY */
274 #define STATE_BUSY_RX 0x01
275 #define STATE_BUSY_TX 0x02
276 #define STATE_FORCE_TRX_OFF 0x03
277 #define STATE_FORCE_TX_ON 0x04 /* IDLE */
278 /* 0x05 */ /* INVALID_PARAMETER */
279 #define STATE_RX_ON 0x06
280 /* 0x07 */ /* SUCCESS */
281 #define STATE_TRX_OFF 0x08
282 #define STATE_TX_ON 0x09
283 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
284 #define STATE_SLEEP 0x0F
285 #define STATE_PREP_DEEP_SLEEP 0x10
286 #define STATE_BUSY_RX_AACK 0x11
287 #define STATE_BUSY_TX_ARET 0x12
288 #define STATE_RX_AACK_ON 0x16
289 #define STATE_TX_ARET_ON 0x19
290 #define STATE_RX_ON_NOCLK 0x1C
291 #define STATE_RX_AACK_ON_NOCLK 0x1D
292 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
293 #define STATE_TRANSITION_IN_PROGRESS 0x1F
295 #define AT86RF2XX_NUMREGS 0x3F
298 at86rf230_async_state_change(struct at86rf230_local
*lp
,
299 struct at86rf230_state_change
*ctx
,
300 const u8 state
, void (*complete
)(void *context
),
301 const bool irq_enable
);
304 __at86rf230_write(struct at86rf230_local
*lp
,
305 unsigned int addr
, unsigned int data
)
307 return regmap_write(lp
->regmap
, addr
, data
);
311 __at86rf230_read(struct at86rf230_local
*lp
,
312 unsigned int addr
, unsigned int *data
)
314 return regmap_read(lp
->regmap
, addr
, data
);
318 at86rf230_read_subreg(struct at86rf230_local
*lp
,
319 unsigned int addr
, unsigned int mask
,
320 unsigned int shift
, unsigned int *data
)
324 rc
= __at86rf230_read(lp
, addr
, data
);
326 *data
= (*data
& mask
) >> shift
;
332 at86rf230_write_subreg(struct at86rf230_local
*lp
,
333 unsigned int addr
, unsigned int mask
,
334 unsigned int shift
, unsigned int data
)
336 return regmap_update_bits(lp
->regmap
, addr
, mask
, data
<< shift
);
340 at86rf230_reg_writeable(struct device
*dev
, unsigned int reg
)
347 case RG_PHY_ED_LEVEL
:
363 case RG_SHORT_ADDR_0
:
364 case RG_SHORT_ADDR_1
:
386 at86rf230_reg_readable(struct device
*dev
, unsigned int reg
)
390 /* all writeable are also readable */
391 rc
= at86rf230_reg_writeable(dev
, reg
);
411 at86rf230_reg_volatile(struct device
*dev
, unsigned int reg
)
413 /* can be changed during runtime */
418 case RG_PHY_ED_LEVEL
:
430 at86rf230_reg_precious(struct device
*dev
, unsigned int reg
)
432 /* don't clear irq line on read */
441 static const struct regmap_config at86rf230_regmap_spi_config
= {
444 .write_flag_mask
= CMD_REG
| CMD_WRITE
,
445 .read_flag_mask
= CMD_REG
,
446 .cache_type
= REGCACHE_RBTREE
,
447 .max_register
= AT86RF2XX_NUMREGS
,
448 .writeable_reg
= at86rf230_reg_writeable
,
449 .readable_reg
= at86rf230_reg_readable
,
450 .volatile_reg
= at86rf230_reg_volatile
,
451 .precious_reg
= at86rf230_reg_precious
,
455 at86rf230_async_error_recover(void *context
)
457 struct at86rf230_state_change
*ctx
= context
;
458 struct at86rf230_local
*lp
= ctx
->lp
;
461 at86rf230_async_state_change(lp
, ctx
, STATE_RX_AACK_ON
, NULL
, false);
462 ieee802154_wake_queue(lp
->hw
);
466 at86rf230_async_error(struct at86rf230_local
*lp
,
467 struct at86rf230_state_change
*ctx
, int rc
)
469 dev_err(&lp
->spi
->dev
, "spi_async error %d\n", rc
);
471 at86rf230_async_state_change(lp
, ctx
, STATE_FORCE_TRX_OFF
,
472 at86rf230_async_error_recover
, false);
475 /* Generic function to get some register value in async mode */
477 at86rf230_async_read_reg(struct at86rf230_local
*lp
, const u8 reg
,
478 struct at86rf230_state_change
*ctx
,
479 void (*complete
)(void *context
),
480 const bool irq_enable
)
484 u8
*tx_buf
= ctx
->buf
;
486 tx_buf
[0] = (reg
& CMD_REG_MASK
) | CMD_REG
;
487 ctx
->msg
.complete
= complete
;
488 ctx
->irq_enable
= irq_enable
;
489 rc
= spi_async(lp
->spi
, &ctx
->msg
);
492 enable_irq(ctx
->irq
);
494 at86rf230_async_error(lp
, ctx
, rc
);
498 static inline u8
at86rf230_state_to_force(u8 state
)
500 if (state
== STATE_TX_ON
)
501 return STATE_FORCE_TX_ON
;
503 return STATE_FORCE_TRX_OFF
;
507 at86rf230_async_state_assert(void *context
)
509 struct at86rf230_state_change
*ctx
= context
;
510 struct at86rf230_local
*lp
= ctx
->lp
;
511 const u8
*buf
= ctx
->buf
;
512 const u8 trx_state
= buf
[1] & 0x1f;
514 /* Assert state change */
515 if (trx_state
!= ctx
->to_state
) {
516 /* Special handling if transceiver state is in
517 * STATE_BUSY_RX_AACK and a SHR was detected.
519 if (trx_state
== STATE_BUSY_RX_AACK
) {
520 /* Undocumented race condition. If we send a state
521 * change to STATE_RX_AACK_ON the transceiver could
522 * change his state automatically to STATE_BUSY_RX_AACK
523 * if a SHR was detected. This is not an error, but we
526 if (ctx
->to_state
== STATE_RX_AACK_ON
)
529 /* If we change to STATE_TX_ON without forcing and
530 * transceiver state is STATE_BUSY_RX_AACK, we wait
531 * 'tFrame + tPAck' receiving time. In this time the
532 * PDU should be received. If the transceiver is still
533 * in STATE_BUSY_RX_AACK, we run a force state change
534 * to STATE_TX_ON. This is a timeout handling, if the
535 * transceiver stucks in STATE_BUSY_RX_AACK.
537 * Additional we do several retries to try to get into
538 * TX_ON state without forcing. If the retries are
539 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
540 * will do a force change.
542 if (ctx
->to_state
== STATE_TX_ON
||
543 ctx
->to_state
== STATE_TRX_OFF
) {
544 u8 state
= ctx
->to_state
;
546 if (lp
->tx_retry
>= AT86RF2XX_MAX_TX_RETRIES
)
547 state
= at86rf230_state_to_force(state
);
550 at86rf230_async_state_change(lp
, ctx
, state
,
557 dev_warn(&lp
->spi
->dev
, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
558 ctx
->from_state
, ctx
->to_state
, trx_state
);
563 ctx
->complete(context
);
566 static enum hrtimer_restart
at86rf230_async_state_timer(struct hrtimer
*timer
)
568 struct at86rf230_state_change
*ctx
=
569 container_of(timer
, struct at86rf230_state_change
, timer
);
570 struct at86rf230_local
*lp
= ctx
->lp
;
572 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
573 at86rf230_async_state_assert
,
576 return HRTIMER_NORESTART
;
579 /* Do state change timing delay. */
581 at86rf230_async_state_delay(void *context
)
583 struct at86rf230_state_change
*ctx
= context
;
584 struct at86rf230_local
*lp
= ctx
->lp
;
585 struct at86rf2xx_chip_data
*c
= lp
->data
;
589 /* The force state changes are will show as normal states in the
590 * state status subregister. We change the to_state to the
591 * corresponding one and remember if it was a force change, this
592 * differs if we do a state change from STATE_BUSY_RX_AACK.
594 switch (ctx
->to_state
) {
595 case STATE_FORCE_TX_ON
:
596 ctx
->to_state
= STATE_TX_ON
;
599 case STATE_FORCE_TRX_OFF
:
600 ctx
->to_state
= STATE_TRX_OFF
;
607 switch (ctx
->from_state
) {
609 switch (ctx
->to_state
) {
610 case STATE_RX_AACK_ON
:
611 tim
= ktime_set(0, c
->t_off_to_aack
* NSEC_PER_USEC
);
614 tim
= ktime_set(0, c
->t_off_to_tx_on
* NSEC_PER_USEC
);
615 /* state change from TRX_OFF to TX_ON to do a
616 * calibration, we need to reset the timeout for the
619 lp
->cal_timeout
= jiffies
+ AT86RF2XX_CAL_LOOP_TIMEOUT
;
625 case STATE_BUSY_RX_AACK
:
626 switch (ctx
->to_state
) {
629 /* Wait for worst case receiving time if we
630 * didn't make a force change from BUSY_RX_AACK
631 * to TX_ON or TRX_OFF.
634 tim
= ktime_set(0, (c
->t_frame
+ c
->t_p_ack
) *
643 /* Default value, means RESET state */
645 switch (ctx
->to_state
) {
647 tim
= ktime_set(0, c
->t_reset_to_off
* NSEC_PER_USEC
);
657 /* Default delay is 1us in the most cases */
658 tim
= ktime_set(0, NSEC_PER_USEC
);
661 hrtimer_start(&ctx
->timer
, tim
, HRTIMER_MODE_REL
);
665 at86rf230_async_state_change_start(void *context
)
667 struct at86rf230_state_change
*ctx
= context
;
668 struct at86rf230_local
*lp
= ctx
->lp
;
670 const u8 trx_state
= buf
[1] & 0x1f;
673 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
674 if (trx_state
== STATE_TRANSITION_IN_PROGRESS
) {
676 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
677 at86rf230_async_state_change_start
,
682 /* Check if we already are in the state which we change in */
683 if (trx_state
== ctx
->to_state
) {
685 ctx
->complete(context
);
689 /* Set current state to the context of state change */
690 ctx
->from_state
= trx_state
;
692 /* Going into the next step for a state change which do a timing
695 buf
[0] = (RG_TRX_STATE
& CMD_REG_MASK
) | CMD_REG
| CMD_WRITE
;
696 buf
[1] = ctx
->to_state
;
697 ctx
->msg
.complete
= at86rf230_async_state_delay
;
698 rc
= spi_async(lp
->spi
, &ctx
->msg
);
701 enable_irq(ctx
->irq
);
703 at86rf230_async_error(lp
, ctx
, rc
);
708 at86rf230_async_state_change(struct at86rf230_local
*lp
,
709 struct at86rf230_state_change
*ctx
,
710 const u8 state
, void (*complete
)(void *context
),
711 const bool irq_enable
)
713 /* Initialization for the state change context */
714 ctx
->to_state
= state
;
715 ctx
->complete
= complete
;
716 ctx
->irq_enable
= irq_enable
;
717 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
718 at86rf230_async_state_change_start
,
723 at86rf230_sync_state_change_complete(void *context
)
725 struct at86rf230_state_change
*ctx
= context
;
726 struct at86rf230_local
*lp
= ctx
->lp
;
728 complete(&lp
->state_complete
);
731 /* This function do a sync framework above the async state change.
732 * Some callbacks of the IEEE 802.15.4 driver interface need to be
733 * handled synchronously.
736 at86rf230_sync_state_change(struct at86rf230_local
*lp
, unsigned int state
)
740 at86rf230_async_state_change(lp
, &lp
->state
, state
,
741 at86rf230_sync_state_change_complete
,
744 rc
= wait_for_completion_timeout(&lp
->state_complete
,
745 msecs_to_jiffies(100));
747 at86rf230_async_error(lp
, &lp
->state
, -ETIMEDOUT
);
755 at86rf230_tx_complete(void *context
)
757 struct at86rf230_state_change
*ctx
= context
;
758 struct at86rf230_local
*lp
= ctx
->lp
;
760 enable_irq(ctx
->irq
);
762 ieee802154_xmit_complete(lp
->hw
, lp
->tx_skb
, !lp
->tx_aret
);
766 at86rf230_tx_on(void *context
)
768 struct at86rf230_state_change
*ctx
= context
;
769 struct at86rf230_local
*lp
= ctx
->lp
;
771 at86rf230_async_state_change(lp
, ctx
, STATE_RX_AACK_ON
,
772 at86rf230_tx_complete
, true);
776 at86rf230_tx_trac_error(void *context
)
778 struct at86rf230_state_change
*ctx
= context
;
779 struct at86rf230_local
*lp
= ctx
->lp
;
781 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ON
,
782 at86rf230_tx_on
, true);
786 at86rf230_tx_trac_check(void *context
)
788 struct at86rf230_state_change
*ctx
= context
;
789 struct at86rf230_local
*lp
= ctx
->lp
;
790 const u8
*buf
= ctx
->buf
;
791 const u8 trac
= (buf
[1] & 0xe0) >> 5;
793 /* If trac status is different than zero we need to do a state change
794 * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver
798 at86rf230_async_state_change(lp
, ctx
, STATE_FORCE_TRX_OFF
,
799 at86rf230_tx_trac_error
, true);
801 at86rf230_tx_on(context
);
805 at86rf230_tx_trac_status(void *context
)
807 struct at86rf230_state_change
*ctx
= context
;
808 struct at86rf230_local
*lp
= ctx
->lp
;
810 at86rf230_async_read_reg(lp
, RG_TRX_STATE
, ctx
,
811 at86rf230_tx_trac_check
, true);
815 at86rf230_rx_read_frame_complete(void *context
)
817 struct at86rf230_state_change
*ctx
= context
;
818 struct at86rf230_local
*lp
= ctx
->lp
;
819 u8 rx_local_buf
[AT86RF2XX_MAX_BUF
];
820 const u8
*buf
= ctx
->buf
;
825 if (!ieee802154_is_valid_psdu_len(len
)) {
826 dev_vdbg(&lp
->spi
->dev
, "corrupted frame received\n");
827 len
= IEEE802154_MTU
;
831 memcpy(rx_local_buf
, buf
+ 2, len
);
833 enable_irq(ctx
->irq
);
835 skb
= dev_alloc_skb(IEEE802154_MTU
);
837 dev_vdbg(&lp
->spi
->dev
, "failed to allocate sk_buff\n");
841 memcpy(skb_put(skb
, len
), rx_local_buf
, len
);
842 ieee802154_rx_irqsafe(lp
->hw
, skb
, lqi
);
846 at86rf230_rx_read_frame(void *context
)
848 struct at86rf230_state_change
*ctx
= context
;
849 struct at86rf230_local
*lp
= ctx
->lp
;
854 ctx
->trx
.len
= AT86RF2XX_MAX_BUF
;
855 ctx
->msg
.complete
= at86rf230_rx_read_frame_complete
;
856 rc
= spi_async(lp
->spi
, &ctx
->msg
);
859 enable_irq(ctx
->irq
);
860 at86rf230_async_error(lp
, ctx
, rc
);
865 at86rf230_rx_trac_check(void *context
)
867 /* Possible check on trac status here. This could be useful to make
868 * some stats why receive is failed. Not used at the moment, but it's
869 * maybe timing relevant. Datasheet doesn't say anything about this.
870 * The programming guide say do it so.
873 at86rf230_rx_read_frame(context
);
877 at86rf230_irq_trx_end(struct at86rf230_local
*lp
)
883 at86rf230_async_state_change(lp
, &lp
->irq
,
885 at86rf230_tx_trac_status
,
888 at86rf230_async_state_change(lp
, &lp
->irq
,
890 at86rf230_tx_complete
,
893 at86rf230_async_read_reg(lp
, RG_TRX_STATE
, &lp
->irq
,
894 at86rf230_rx_trac_check
, true);
899 at86rf230_irq_status(void *context
)
901 struct at86rf230_state_change
*ctx
= context
;
902 struct at86rf230_local
*lp
= ctx
->lp
;
903 const u8
*buf
= ctx
->buf
;
904 const u8 irq
= buf
[1];
906 if (irq
& IRQ_TRX_END
) {
907 at86rf230_irq_trx_end(lp
);
909 enable_irq(ctx
->irq
);
910 dev_err(&lp
->spi
->dev
, "not supported irq %02x received\n",
915 static irqreturn_t
at86rf230_isr(int irq
, void *data
)
917 struct at86rf230_local
*lp
= data
;
918 struct at86rf230_state_change
*ctx
= &lp
->irq
;
922 disable_irq_nosync(irq
);
924 buf
[0] = (RG_IRQ_STATUS
& CMD_REG_MASK
) | CMD_REG
;
925 ctx
->msg
.complete
= at86rf230_irq_status
;
926 rc
= spi_async(lp
->spi
, &ctx
->msg
);
929 at86rf230_async_error(lp
, ctx
, rc
);
937 at86rf230_write_frame_complete(void *context
)
939 struct at86rf230_state_change
*ctx
= context
;
940 struct at86rf230_local
*lp
= ctx
->lp
;
944 buf
[0] = (RG_TRX_STATE
& CMD_REG_MASK
) | CMD_REG
| CMD_WRITE
;
945 buf
[1] = STATE_BUSY_TX
;
947 ctx
->msg
.complete
= NULL
;
948 rc
= spi_async(lp
->spi
, &ctx
->msg
);
950 at86rf230_async_error(lp
, ctx
, rc
);
954 at86rf230_write_frame(void *context
)
956 struct at86rf230_state_change
*ctx
= context
;
957 struct at86rf230_local
*lp
= ctx
->lp
;
958 struct sk_buff
*skb
= lp
->tx_skb
;
964 buf
[0] = CMD_FB
| CMD_WRITE
;
965 buf
[1] = skb
->len
+ 2;
966 memcpy(buf
+ 2, skb
->data
, skb
->len
);
967 ctx
->trx
.len
= skb
->len
+ 2;
968 ctx
->msg
.complete
= at86rf230_write_frame_complete
;
969 rc
= spi_async(lp
->spi
, &ctx
->msg
);
972 at86rf230_async_error(lp
, ctx
, rc
);
977 at86rf230_xmit_tx_on(void *context
)
979 struct at86rf230_state_change
*ctx
= context
;
980 struct at86rf230_local
*lp
= ctx
->lp
;
982 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ARET_ON
,
983 at86rf230_write_frame
, false);
987 at86rf230_xmit_start(void *context
)
989 struct at86rf230_state_change
*ctx
= context
;
990 struct at86rf230_local
*lp
= ctx
->lp
;
992 /* In ARET mode we need to go into STATE_TX_ARET_ON after we
993 * are in STATE_TX_ON. The pfad differs here, so we change
994 * the complete handler.
997 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ON
,
998 at86rf230_xmit_tx_on
, false);
1000 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ON
,
1001 at86rf230_write_frame
, false);
1005 at86rf230_xmit(struct ieee802154_hw
*hw
, struct sk_buff
*skb
)
1007 struct at86rf230_local
*lp
= hw
->priv
;
1008 struct at86rf230_state_change
*ctx
= &lp
->tx
;
1013 /* After 5 minutes in PLL and the same frequency we run again the
1014 * calibration loops which is recommended by at86rf2xx datasheets.
1016 * The calibration is initiate by a state change from TRX_OFF
1017 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
1018 * function then to start in the next 5 minutes.
1020 if (time_is_before_jiffies(lp
->cal_timeout
))
1021 at86rf230_async_state_change(lp
, ctx
, STATE_TRX_OFF
,
1022 at86rf230_xmit_start
, false);
1024 at86rf230_xmit_start(ctx
);
1030 at86rf230_ed(struct ieee802154_hw
*hw
, u8
*level
)
1038 at86rf230_start(struct ieee802154_hw
*hw
)
1040 struct at86rf230_local
*lp
= hw
->priv
;
1042 lp
->cal_timeout
= jiffies
+ AT86RF2XX_CAL_LOOP_TIMEOUT
;
1043 return at86rf230_sync_state_change(hw
->priv
, STATE_RX_AACK_ON
);
1047 at86rf230_stop(struct ieee802154_hw
*hw
)
1049 at86rf230_sync_state_change(hw
->priv
, STATE_FORCE_TRX_OFF
);
1053 at86rf23x_set_channel(struct at86rf230_local
*lp
, u8 page
, u8 channel
)
1055 return at86rf230_write_subreg(lp
, SR_CHANNEL
, channel
);
1059 at86rf212_set_channel(struct at86rf230_local
*lp
, u8 page
, u8 channel
)
1064 rc
= at86rf230_write_subreg(lp
, SR_SUB_MODE
, 0);
1066 rc
= at86rf230_write_subreg(lp
, SR_SUB_MODE
, 1);
1071 rc
= at86rf230_write_subreg(lp
, SR_BPSK_QPSK
, 0);
1072 lp
->data
->rssi_base_val
= -100;
1074 rc
= at86rf230_write_subreg(lp
, SR_BPSK_QPSK
, 1);
1075 lp
->data
->rssi_base_val
= -98;
1080 /* This sets the symbol_duration according frequency on the 212.
1081 * TODO move this handling while set channel and page in cfg802154.
1082 * We can do that, this timings are according 802.15.4 standard.
1083 * If we do that in cfg802154, this is a more generic calculation.
1085 * This should also protected from ifs_timer. Means cancel timer and
1086 * init with a new value. For now, this is okay.
1090 /* SUB:0 and BPSK:0 -> BPSK-20 */
1091 lp
->hw
->phy
->symbol_duration
= 50;
1093 /* SUB:1 and BPSK:0 -> BPSK-40 */
1094 lp
->hw
->phy
->symbol_duration
= 25;
1098 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1099 lp
->hw
->phy
->symbol_duration
= 40;
1101 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1102 lp
->hw
->phy
->symbol_duration
= 16;
1105 lp
->hw
->phy
->lifs_period
= IEEE802154_LIFS_PERIOD
*
1106 lp
->hw
->phy
->symbol_duration
;
1107 lp
->hw
->phy
->sifs_period
= IEEE802154_SIFS_PERIOD
*
1108 lp
->hw
->phy
->symbol_duration
;
1110 return at86rf230_write_subreg(lp
, SR_CHANNEL
, channel
);
1114 at86rf230_channel(struct ieee802154_hw
*hw
, u8 page
, u8 channel
)
1116 struct at86rf230_local
*lp
= hw
->priv
;
1119 rc
= lp
->data
->set_channel(lp
, page
, channel
);
1121 usleep_range(lp
->data
->t_channel_switch
,
1122 lp
->data
->t_channel_switch
+ 10);
1124 lp
->cal_timeout
= jiffies
+ AT86RF2XX_CAL_LOOP_TIMEOUT
;
1129 at86rf230_set_hw_addr_filt(struct ieee802154_hw
*hw
,
1130 struct ieee802154_hw_addr_filt
*filt
,
1131 unsigned long changed
)
1133 struct at86rf230_local
*lp
= hw
->priv
;
1135 if (changed
& IEEE802154_AFILT_SADDR_CHANGED
) {
1136 u16 addr
= le16_to_cpu(filt
->short_addr
);
1138 dev_vdbg(&lp
->spi
->dev
,
1139 "at86rf230_set_hw_addr_filt called for saddr\n");
1140 __at86rf230_write(lp
, RG_SHORT_ADDR_0
, addr
);
1141 __at86rf230_write(lp
, RG_SHORT_ADDR_1
, addr
>> 8);
1144 if (changed
& IEEE802154_AFILT_PANID_CHANGED
) {
1145 u16 pan
= le16_to_cpu(filt
->pan_id
);
1147 dev_vdbg(&lp
->spi
->dev
,
1148 "at86rf230_set_hw_addr_filt called for pan id\n");
1149 __at86rf230_write(lp
, RG_PAN_ID_0
, pan
);
1150 __at86rf230_write(lp
, RG_PAN_ID_1
, pan
>> 8);
1153 if (changed
& IEEE802154_AFILT_IEEEADDR_CHANGED
) {
1156 memcpy(addr
, &filt
->ieee_addr
, 8);
1157 dev_vdbg(&lp
->spi
->dev
,
1158 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1159 for (i
= 0; i
< 8; i
++)
1160 __at86rf230_write(lp
, RG_IEEE_ADDR_0
+ i
, addr
[i
]);
1163 if (changed
& IEEE802154_AFILT_PANC_CHANGED
) {
1164 dev_vdbg(&lp
->spi
->dev
,
1165 "at86rf230_set_hw_addr_filt called for panc change\n");
1166 if (filt
->pan_coord
)
1167 at86rf230_write_subreg(lp
, SR_AACK_I_AM_COORD
, 1);
1169 at86rf230_write_subreg(lp
, SR_AACK_I_AM_COORD
, 0);
1176 at86rf230_set_txpower(struct ieee802154_hw
*hw
, s8 db
)
1178 struct at86rf230_local
*lp
= hw
->priv
;
1180 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1181 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1183 * thus, supported values for db range from -26 to 5, for 31dB of
1184 * reduction to 0dB of reduction.
1186 if (db
> 5 || db
< -26)
1191 return __at86rf230_write(lp
, RG_PHY_TX_PWR
, 0x60 | db
);
1195 at86rf230_set_lbt(struct ieee802154_hw
*hw
, bool on
)
1197 struct at86rf230_local
*lp
= hw
->priv
;
1199 return at86rf230_write_subreg(lp
, SR_CSMA_LBT_MODE
, on
);
1203 at86rf230_set_cca_mode(struct ieee802154_hw
*hw
,
1204 const struct wpan_phy_cca
*cca
)
1206 struct at86rf230_local
*lp
= hw
->priv
;
1209 /* mapping 802.15.4 to driver spec */
1210 switch (cca
->mode
) {
1211 case NL802154_CCA_ENERGY
:
1214 case NL802154_CCA_CARRIER
:
1217 case NL802154_CCA_ENERGY_CARRIER
:
1219 case NL802154_CCA_OPT_ENERGY_CARRIER_AND
:
1222 case NL802154_CCA_OPT_ENERGY_CARRIER_OR
:
1233 return at86rf230_write_subreg(lp
, SR_CCA_MODE
, val
);
1237 at86rf212_get_desens_steps(struct at86rf230_local
*lp
, s32 level
)
1239 return (level
- lp
->data
->rssi_base_val
) * 100 / 207;
1243 at86rf23x_get_desens_steps(struct at86rf230_local
*lp
, s32 level
)
1245 return (level
- lp
->data
->rssi_base_val
) / 2;
1249 at86rf230_set_cca_ed_level(struct ieee802154_hw
*hw
, s32 level
)
1251 struct at86rf230_local
*lp
= hw
->priv
;
1253 if (level
< lp
->data
->rssi_base_val
|| level
> 30)
1256 return at86rf230_write_subreg(lp
, SR_CCA_ED_THRES
,
1257 lp
->data
->get_desense_steps(lp
, level
));
1261 at86rf230_set_csma_params(struct ieee802154_hw
*hw
, u8 min_be
, u8 max_be
,
1264 struct at86rf230_local
*lp
= hw
->priv
;
1267 rc
= at86rf230_write_subreg(lp
, SR_MIN_BE
, min_be
);
1271 rc
= at86rf230_write_subreg(lp
, SR_MAX_BE
, max_be
);
1275 return at86rf230_write_subreg(lp
, SR_MAX_CSMA_RETRIES
, retries
);
1279 at86rf230_set_frame_retries(struct ieee802154_hw
*hw
, s8 retries
)
1281 struct at86rf230_local
*lp
= hw
->priv
;
1284 lp
->tx_aret
= retries
>= 0;
1285 lp
->max_frame_retries
= retries
;
1288 rc
= at86rf230_write_subreg(lp
, SR_MAX_FRAME_RETRIES
, retries
);
1294 at86rf230_set_promiscuous_mode(struct ieee802154_hw
*hw
, const bool on
)
1296 struct at86rf230_local
*lp
= hw
->priv
;
1300 rc
= at86rf230_write_subreg(lp
, SR_AACK_DIS_ACK
, 1);
1304 rc
= at86rf230_write_subreg(lp
, SR_AACK_PROM_MODE
, 1);
1308 rc
= at86rf230_write_subreg(lp
, SR_AACK_PROM_MODE
, 0);
1312 rc
= at86rf230_write_subreg(lp
, SR_AACK_DIS_ACK
, 0);
1320 static const struct ieee802154_ops at86rf230_ops
= {
1321 .owner
= THIS_MODULE
,
1322 .xmit_async
= at86rf230_xmit
,
1324 .set_channel
= at86rf230_channel
,
1325 .start
= at86rf230_start
,
1326 .stop
= at86rf230_stop
,
1327 .set_hw_addr_filt
= at86rf230_set_hw_addr_filt
,
1328 .set_txpower
= at86rf230_set_txpower
,
1329 .set_lbt
= at86rf230_set_lbt
,
1330 .set_cca_mode
= at86rf230_set_cca_mode
,
1331 .set_cca_ed_level
= at86rf230_set_cca_ed_level
,
1332 .set_csma_params
= at86rf230_set_csma_params
,
1333 .set_frame_retries
= at86rf230_set_frame_retries
,
1334 .set_promiscuous_mode
= at86rf230_set_promiscuous_mode
,
1337 static struct at86rf2xx_chip_data at86rf233_data
= {
1338 .t_sleep_cycle
= 330,
1339 .t_channel_switch
= 11,
1340 .t_reset_to_off
= 26,
1341 .t_off_to_aack
= 80,
1342 .t_off_to_tx_on
= 80,
1345 .rssi_base_val
= -91,
1346 .set_channel
= at86rf23x_set_channel
,
1347 .get_desense_steps
= at86rf23x_get_desens_steps
1350 static struct at86rf2xx_chip_data at86rf231_data
= {
1351 .t_sleep_cycle
= 330,
1352 .t_channel_switch
= 24,
1353 .t_reset_to_off
= 37,
1354 .t_off_to_aack
= 110,
1355 .t_off_to_tx_on
= 110,
1358 .rssi_base_val
= -91,
1359 .set_channel
= at86rf23x_set_channel
,
1360 .get_desense_steps
= at86rf23x_get_desens_steps
1363 static struct at86rf2xx_chip_data at86rf212_data
= {
1364 .t_sleep_cycle
= 330,
1365 .t_channel_switch
= 11,
1366 .t_reset_to_off
= 26,
1367 .t_off_to_aack
= 200,
1368 .t_off_to_tx_on
= 200,
1371 .rssi_base_val
= -100,
1372 .set_channel
= at86rf212_set_channel
,
1373 .get_desense_steps
= at86rf212_get_desens_steps
1376 static int at86rf230_hw_init(struct at86rf230_local
*lp
, u8 xtal_trim
)
1378 int rc
, irq_type
, irq_pol
= IRQ_ACTIVE_HIGH
;
1382 rc
= at86rf230_sync_state_change(lp
, STATE_FORCE_TRX_OFF
);
1386 irq_type
= irq_get_trigger_type(lp
->spi
->irq
);
1387 if (irq_type
== IRQ_TYPE_EDGE_RISING
||
1388 irq_type
== IRQ_TYPE_EDGE_FALLING
)
1389 dev_warn(&lp
->spi
->dev
,
1390 "Using edge triggered irq's are not recommended!\n");
1391 if (irq_type
== IRQ_TYPE_EDGE_FALLING
||
1392 irq_type
== IRQ_TYPE_LEVEL_LOW
)
1393 irq_pol
= IRQ_ACTIVE_LOW
;
1395 rc
= at86rf230_write_subreg(lp
, SR_IRQ_POLARITY
, irq_pol
);
1399 rc
= at86rf230_write_subreg(lp
, SR_RX_SAFE_MODE
, 1);
1403 rc
= at86rf230_write_subreg(lp
, SR_IRQ_MASK
, IRQ_TRX_END
);
1407 /* reset values differs in at86rf231 and at86rf233 */
1408 rc
= at86rf230_write_subreg(lp
, SR_IRQ_MASK_MODE
, 0);
1412 get_random_bytes(csma_seed
, ARRAY_SIZE(csma_seed
));
1413 rc
= at86rf230_write_subreg(lp
, SR_CSMA_SEED_0
, csma_seed
[0]);
1416 rc
= at86rf230_write_subreg(lp
, SR_CSMA_SEED_1
, csma_seed
[1]);
1420 /* CLKM changes are applied immediately */
1421 rc
= at86rf230_write_subreg(lp
, SR_CLKM_SHA_SEL
, 0x00);
1426 rc
= at86rf230_write_subreg(lp
, SR_CLKM_CTRL
, 0x00);
1429 /* Wait the next SLEEP cycle */
1430 usleep_range(lp
->data
->t_sleep_cycle
,
1431 lp
->data
->t_sleep_cycle
+ 100);
1433 /* xtal_trim value is calculated by:
1434 * CL = 0.5 * (CX + CTRIM + CPAR)
1437 * CL = capacitor of used crystal
1438 * CX = connected capacitors at xtal pins
1439 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1440 * but this is different on each board setup. You need to fine
1441 * tuning this value via CTRIM.
1442 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1446 * atben transceiver:
1450 * CPAR = 3 pF (We assume the magic constant from datasheet)
1453 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1457 * openlabs transceiver:
1461 * CPAR = 3 pF (We assume the magic constant from datasheet)
1464 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1468 rc
= at86rf230_write_subreg(lp
, SR_XTAL_TRIM
, xtal_trim
);
1472 rc
= at86rf230_read_subreg(lp
, SR_DVDD_OK
, &dvdd
);
1476 dev_err(&lp
->spi
->dev
, "DVDD error\n");
1480 /* Force setting slotted operation bit to 0. Sometimes the atben
1481 * sets this bit and I don't know why. We set this always force
1482 * to zero while probing.
1484 return at86rf230_write_subreg(lp
, SR_SLOTTED_OPERATION
, 0);
1488 at86rf230_get_pdata(struct spi_device
*spi
, int *rstn
, int *slp_tr
,
1491 struct at86rf230_platform_data
*pdata
= spi
->dev
.platform_data
;
1494 if (!IS_ENABLED(CONFIG_OF
) || !spi
->dev
.of_node
) {
1498 *rstn
= pdata
->rstn
;
1499 *slp_tr
= pdata
->slp_tr
;
1500 *xtal_trim
= pdata
->xtal_trim
;
1504 *rstn
= of_get_named_gpio(spi
->dev
.of_node
, "reset-gpio", 0);
1505 *slp_tr
= of_get_named_gpio(spi
->dev
.of_node
, "sleep-gpio", 0);
1506 ret
= of_property_read_u8(spi
->dev
.of_node
, "xtal-trim", xtal_trim
);
1507 if (ret
< 0 && ret
!= -EINVAL
)
1514 at86rf230_detect_device(struct at86rf230_local
*lp
)
1516 unsigned int part
, version
, val
;
1521 rc
= __at86rf230_read(lp
, RG_MAN_ID_0
, &val
);
1526 rc
= __at86rf230_read(lp
, RG_MAN_ID_1
, &val
);
1529 man_id
|= (val
<< 8);
1531 rc
= __at86rf230_read(lp
, RG_PART_NUM
, &part
);
1535 rc
= __at86rf230_read(lp
, RG_VERSION_NUM
, &version
);
1539 if (man_id
!= 0x001f) {
1540 dev_err(&lp
->spi
->dev
, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1541 man_id
>> 8, man_id
& 0xFF);
1545 lp
->hw
->flags
= IEEE802154_HW_TX_OMIT_CKSUM
| IEEE802154_HW_AACK
|
1546 IEEE802154_HW_TXPOWER
| IEEE802154_HW_ARET
|
1547 IEEE802154_HW_AFILT
| IEEE802154_HW_PROMISCUOUS
;
1549 lp
->hw
->phy
->cca
.mode
= NL802154_CCA_ENERGY
;
1558 lp
->data
= &at86rf231_data
;
1559 lp
->hw
->phy
->channels_supported
[0] = 0x7FFF800;
1560 lp
->hw
->phy
->current_channel
= 11;
1561 lp
->hw
->phy
->symbol_duration
= 16;
1565 lp
->data
= &at86rf212_data
;
1566 lp
->hw
->flags
|= IEEE802154_HW_LBT
;
1567 lp
->hw
->phy
->channels_supported
[0] = 0x00007FF;
1568 lp
->hw
->phy
->channels_supported
[2] = 0x00007FF;
1569 lp
->hw
->phy
->current_channel
= 5;
1570 lp
->hw
->phy
->symbol_duration
= 25;
1574 lp
->data
= &at86rf233_data
;
1575 lp
->hw
->phy
->channels_supported
[0] = 0x7FFF800;
1576 lp
->hw
->phy
->current_channel
= 13;
1577 lp
->hw
->phy
->symbol_duration
= 16;
1585 dev_info(&lp
->spi
->dev
, "Detected %s chip version %d\n", chip
, version
);
1591 at86rf230_setup_spi_messages(struct at86rf230_local
*lp
)
1594 lp
->state
.irq
= lp
->spi
->irq
;
1595 spi_message_init(&lp
->state
.msg
);
1596 lp
->state
.msg
.context
= &lp
->state
;
1597 lp
->state
.trx
.len
= 2;
1598 lp
->state
.trx
.tx_buf
= lp
->state
.buf
;
1599 lp
->state
.trx
.rx_buf
= lp
->state
.buf
;
1600 spi_message_add_tail(&lp
->state
.trx
, &lp
->state
.msg
);
1601 hrtimer_init(&lp
->state
.timer
, CLOCK_MONOTONIC
, HRTIMER_MODE_REL
);
1602 lp
->state
.timer
.function
= at86rf230_async_state_timer
;
1605 lp
->irq
.irq
= lp
->spi
->irq
;
1606 spi_message_init(&lp
->irq
.msg
);
1607 lp
->irq
.msg
.context
= &lp
->irq
;
1608 lp
->irq
.trx
.len
= 2;
1609 lp
->irq
.trx
.tx_buf
= lp
->irq
.buf
;
1610 lp
->irq
.trx
.rx_buf
= lp
->irq
.buf
;
1611 spi_message_add_tail(&lp
->irq
.trx
, &lp
->irq
.msg
);
1612 hrtimer_init(&lp
->irq
.timer
, CLOCK_MONOTONIC
, HRTIMER_MODE_REL
);
1613 lp
->irq
.timer
.function
= at86rf230_async_state_timer
;
1616 lp
->tx
.irq
= lp
->spi
->irq
;
1617 spi_message_init(&lp
->tx
.msg
);
1618 lp
->tx
.msg
.context
= &lp
->tx
;
1620 lp
->tx
.trx
.tx_buf
= lp
->tx
.buf
;
1621 lp
->tx
.trx
.rx_buf
= lp
->tx
.buf
;
1622 spi_message_add_tail(&lp
->tx
.trx
, &lp
->tx
.msg
);
1623 hrtimer_init(&lp
->tx
.timer
, CLOCK_MONOTONIC
, HRTIMER_MODE_REL
);
1624 lp
->tx
.timer
.function
= at86rf230_async_state_timer
;
1627 static int at86rf230_probe(struct spi_device
*spi
)
1629 struct ieee802154_hw
*hw
;
1630 struct at86rf230_local
*lp
;
1631 unsigned int status
;
1632 int rc
, irq_type
, rstn
, slp_tr
;
1636 dev_err(&spi
->dev
, "no IRQ specified\n");
1640 rc
= at86rf230_get_pdata(spi
, &rstn
, &slp_tr
, &xtal_trim
);
1642 dev_err(&spi
->dev
, "failed to parse platform_data: %d\n", rc
);
1646 if (gpio_is_valid(rstn
)) {
1647 rc
= devm_gpio_request_one(&spi
->dev
, rstn
,
1648 GPIOF_OUT_INIT_HIGH
, "rstn");
1653 if (gpio_is_valid(slp_tr
)) {
1654 rc
= devm_gpio_request_one(&spi
->dev
, slp_tr
,
1655 GPIOF_OUT_INIT_LOW
, "slp_tr");
1661 if (gpio_is_valid(rstn
)) {
1663 gpio_set_value(rstn
, 0);
1665 gpio_set_value(rstn
, 1);
1666 usleep_range(120, 240);
1669 hw
= ieee802154_alloc_hw(sizeof(*lp
), &at86rf230_ops
);
1676 hw
->parent
= &spi
->dev
;
1677 hw
->vif_data_size
= sizeof(*lp
);
1678 ieee802154_random_extended_addr(&hw
->phy
->perm_extended_addr
);
1680 lp
->regmap
= devm_regmap_init_spi(spi
, &at86rf230_regmap_spi_config
);
1681 if (IS_ERR(lp
->regmap
)) {
1682 rc
= PTR_ERR(lp
->regmap
);
1683 dev_err(&spi
->dev
, "Failed to allocate register map: %d\n",
1688 at86rf230_setup_spi_messages(lp
);
1690 rc
= at86rf230_detect_device(lp
);
1694 init_completion(&lp
->state_complete
);
1696 spi_set_drvdata(spi
, lp
);
1698 rc
= at86rf230_hw_init(lp
, xtal_trim
);
1702 /* Read irq status register to reset irq line */
1703 rc
= at86rf230_read_subreg(lp
, RG_IRQ_STATUS
, 0xff, 0, &status
);
1707 irq_type
= irq_get_trigger_type(spi
->irq
);
1709 irq_type
= IRQF_TRIGGER_RISING
;
1711 rc
= devm_request_irq(&spi
->dev
, spi
->irq
, at86rf230_isr
,
1712 IRQF_SHARED
| irq_type
, dev_name(&spi
->dev
), lp
);
1716 rc
= ieee802154_register_hw(lp
->hw
);
1723 ieee802154_free_hw(lp
->hw
);
1728 static int at86rf230_remove(struct spi_device
*spi
)
1730 struct at86rf230_local
*lp
= spi_get_drvdata(spi
);
1732 /* mask all at86rf230 irq's */
1733 at86rf230_write_subreg(lp
, SR_IRQ_MASK
, 0);
1734 ieee802154_unregister_hw(lp
->hw
);
1735 ieee802154_free_hw(lp
->hw
);
1736 dev_dbg(&spi
->dev
, "unregistered at86rf230\n");
1741 static const struct of_device_id at86rf230_of_match
[] = {
1742 { .compatible
= "atmel,at86rf230", },
1743 { .compatible
= "atmel,at86rf231", },
1744 { .compatible
= "atmel,at86rf233", },
1745 { .compatible
= "atmel,at86rf212", },
1748 MODULE_DEVICE_TABLE(of
, at86rf230_of_match
);
1750 static const struct spi_device_id at86rf230_device_id
[] = {
1751 { .name
= "at86rf230", },
1752 { .name
= "at86rf231", },
1753 { .name
= "at86rf233", },
1754 { .name
= "at86rf212", },
1757 MODULE_DEVICE_TABLE(spi
, at86rf230_device_id
);
1759 static struct spi_driver at86rf230_driver
= {
1760 .id_table
= at86rf230_device_id
,
1762 .of_match_table
= of_match_ptr(at86rf230_of_match
),
1763 .name
= "at86rf230",
1764 .owner
= THIS_MODULE
,
1766 .probe
= at86rf230_probe
,
1767 .remove
= at86rf230_remove
,
1770 module_spi_driver(at86rf230_driver
);
1772 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1773 MODULE_LICENSE("GPL v2");