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Merge tag 'wireless-drivers-next-for-davem-2015-03-06' of git://git.kernel.org/pub...
[deliverable/linux.git] / drivers / net / ieee802154 / at86rf230.c
1 /*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * Written by:
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 * Alexander Aring <aar@pengutronix.de>
19 */
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/gpio.h>
25 #include <linux/delay.h>
26 #include <linux/spinlock.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/at86rf230.h>
29 #include <linux/regmap.h>
30 #include <linux/skbuff.h>
31 #include <linux/of_gpio.h>
32 #include <linux/ieee802154.h>
33
34 #include <net/mac802154.h>
35 #include <net/cfg802154.h>
36
37 struct at86rf230_local;
38 /* at86rf2xx chip depend data.
39 * All timings are in us.
40 */
41 struct at86rf2xx_chip_data {
42 u16 t_sleep_cycle;
43 u16 t_channel_switch;
44 u16 t_reset_to_off;
45 u16 t_off_to_aack;
46 u16 t_off_to_tx_on;
47 u16 t_frame;
48 u16 t_p_ack;
49 int rssi_base_val;
50
51 int (*set_channel)(struct at86rf230_local *, u8, u8);
52 int (*get_desense_steps)(struct at86rf230_local *, s32);
53 };
54
55 #define AT86RF2XX_MAX_BUF (127 + 3)
56
57 struct at86rf230_state_change {
58 struct at86rf230_local *lp;
59
60 struct spi_message msg;
61 struct spi_transfer trx;
62 u8 buf[AT86RF2XX_MAX_BUF];
63
64 void (*complete)(void *context);
65 u8 from_state;
66 u8 to_state;
67
68 bool irq_enable;
69 };
70
71 struct at86rf230_local {
72 struct spi_device *spi;
73
74 struct ieee802154_hw *hw;
75 struct at86rf2xx_chip_data *data;
76 struct regmap *regmap;
77
78 struct completion state_complete;
79 struct at86rf230_state_change state;
80
81 struct at86rf230_state_change irq;
82
83 bool tx_aret;
84 s8 max_frame_retries;
85 bool is_tx;
86 /* spinlock for is_tx protection */
87 spinlock_t lock;
88 struct sk_buff *tx_skb;
89 struct at86rf230_state_change tx;
90 };
91
92 #define RG_TRX_STATUS (0x01)
93 #define SR_TRX_STATUS 0x01, 0x1f, 0
94 #define SR_RESERVED_01_3 0x01, 0x20, 5
95 #define SR_CCA_STATUS 0x01, 0x40, 6
96 #define SR_CCA_DONE 0x01, 0x80, 7
97 #define RG_TRX_STATE (0x02)
98 #define SR_TRX_CMD 0x02, 0x1f, 0
99 #define SR_TRAC_STATUS 0x02, 0xe0, 5
100 #define RG_TRX_CTRL_0 (0x03)
101 #define SR_CLKM_CTRL 0x03, 0x07, 0
102 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3
103 #define SR_PAD_IO_CLKM 0x03, 0x30, 4
104 #define SR_PAD_IO 0x03, 0xc0, 6
105 #define RG_TRX_CTRL_1 (0x04)
106 #define SR_IRQ_POLARITY 0x04, 0x01, 0
107 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1
108 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2
109 #define SR_RX_BL_CTRL 0x04, 0x10, 4
110 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
111 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
112 #define SR_PA_EXT_EN 0x04, 0x80, 7
113 #define RG_PHY_TX_PWR (0x05)
114 #define SR_TX_PWR 0x05, 0x0f, 0
115 #define SR_PA_LT 0x05, 0x30, 4
116 #define SR_PA_BUF_LT 0x05, 0xc0, 6
117 #define RG_PHY_RSSI (0x06)
118 #define SR_RSSI 0x06, 0x1f, 0
119 #define SR_RND_VALUE 0x06, 0x60, 5
120 #define SR_RX_CRC_VALID 0x06, 0x80, 7
121 #define RG_PHY_ED_LEVEL (0x07)
122 #define SR_ED_LEVEL 0x07, 0xff, 0
123 #define RG_PHY_CC_CCA (0x08)
124 #define SR_CHANNEL 0x08, 0x1f, 0
125 #define SR_CCA_MODE 0x08, 0x60, 5
126 #define SR_CCA_REQUEST 0x08, 0x80, 7
127 #define RG_CCA_THRES (0x09)
128 #define SR_CCA_ED_THRES 0x09, 0x0f, 0
129 #define SR_RESERVED_09_1 0x09, 0xf0, 4
130 #define RG_RX_CTRL (0x0a)
131 #define SR_PDT_THRES 0x0a, 0x0f, 0
132 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4
133 #define RG_SFD_VALUE (0x0b)
134 #define SR_SFD_VALUE 0x0b, 0xff, 0
135 #define RG_TRX_CTRL_2 (0x0c)
136 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
137 #define SR_SUB_MODE 0x0c, 0x04, 2
138 #define SR_BPSK_QPSK 0x0c, 0x08, 3
139 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
140 #define SR_RESERVED_0c_5 0x0c, 0x60, 5
141 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7
142 #define RG_ANT_DIV (0x0d)
143 #define SR_ANT_CTRL 0x0d, 0x03, 0
144 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
145 #define SR_ANT_DIV_EN 0x0d, 0x08, 3
146 #define SR_RESERVED_0d_2 0x0d, 0x70, 4
147 #define SR_ANT_SEL 0x0d, 0x80, 7
148 #define RG_IRQ_MASK (0x0e)
149 #define SR_IRQ_MASK 0x0e, 0xff, 0
150 #define RG_IRQ_STATUS (0x0f)
151 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
152 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
153 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2
154 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
155 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
156 #define SR_IRQ_5_AMI 0x0f, 0x20, 5
157 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
158 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
159 #define RG_VREG_CTRL (0x10)
160 #define SR_RESERVED_10_6 0x10, 0x03, 0
161 #define SR_DVDD_OK 0x10, 0x04, 2
162 #define SR_DVREG_EXT 0x10, 0x08, 3
163 #define SR_RESERVED_10_3 0x10, 0x30, 4
164 #define SR_AVDD_OK 0x10, 0x40, 6
165 #define SR_AVREG_EXT 0x10, 0x80, 7
166 #define RG_BATMON (0x11)
167 #define SR_BATMON_VTH 0x11, 0x0f, 0
168 #define SR_BATMON_HR 0x11, 0x10, 4
169 #define SR_BATMON_OK 0x11, 0x20, 5
170 #define SR_RESERVED_11_1 0x11, 0xc0, 6
171 #define RG_XOSC_CTRL (0x12)
172 #define SR_XTAL_TRIM 0x12, 0x0f, 0
173 #define SR_XTAL_MODE 0x12, 0xf0, 4
174 #define RG_RX_SYN (0x15)
175 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
176 #define SR_RESERVED_15_2 0x15, 0x70, 4
177 #define SR_RX_PDT_DIS 0x15, 0x80, 7
178 #define RG_XAH_CTRL_1 (0x17)
179 #define SR_RESERVED_17_8 0x17, 0x01, 0
180 #define SR_AACK_PROM_MODE 0x17, 0x02, 1
181 #define SR_AACK_ACK_TIME 0x17, 0x04, 2
182 #define SR_RESERVED_17_5 0x17, 0x08, 3
183 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
184 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
185 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6
186 #define SR_RESERVED_17_1 0x17, 0x80, 7
187 #define RG_FTN_CTRL (0x18)
188 #define SR_RESERVED_18_2 0x18, 0x7f, 0
189 #define SR_FTN_START 0x18, 0x80, 7
190 #define RG_PLL_CF (0x1a)
191 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0
192 #define SR_PLL_CF_START 0x1a, 0x80, 7
193 #define RG_PLL_DCU (0x1b)
194 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0
195 #define SR_RESERVED_1b_2 0x1b, 0x40, 6
196 #define SR_PLL_DCU_START 0x1b, 0x80, 7
197 #define RG_PART_NUM (0x1c)
198 #define SR_PART_NUM 0x1c, 0xff, 0
199 #define RG_VERSION_NUM (0x1d)
200 #define SR_VERSION_NUM 0x1d, 0xff, 0
201 #define RG_MAN_ID_0 (0x1e)
202 #define SR_MAN_ID_0 0x1e, 0xff, 0
203 #define RG_MAN_ID_1 (0x1f)
204 #define SR_MAN_ID_1 0x1f, 0xff, 0
205 #define RG_SHORT_ADDR_0 (0x20)
206 #define SR_SHORT_ADDR_0 0x20, 0xff, 0
207 #define RG_SHORT_ADDR_1 (0x21)
208 #define SR_SHORT_ADDR_1 0x21, 0xff, 0
209 #define RG_PAN_ID_0 (0x22)
210 #define SR_PAN_ID_0 0x22, 0xff, 0
211 #define RG_PAN_ID_1 (0x23)
212 #define SR_PAN_ID_1 0x23, 0xff, 0
213 #define RG_IEEE_ADDR_0 (0x24)
214 #define SR_IEEE_ADDR_0 0x24, 0xff, 0
215 #define RG_IEEE_ADDR_1 (0x25)
216 #define SR_IEEE_ADDR_1 0x25, 0xff, 0
217 #define RG_IEEE_ADDR_2 (0x26)
218 #define SR_IEEE_ADDR_2 0x26, 0xff, 0
219 #define RG_IEEE_ADDR_3 (0x27)
220 #define SR_IEEE_ADDR_3 0x27, 0xff, 0
221 #define RG_IEEE_ADDR_4 (0x28)
222 #define SR_IEEE_ADDR_4 0x28, 0xff, 0
223 #define RG_IEEE_ADDR_5 (0x29)
224 #define SR_IEEE_ADDR_5 0x29, 0xff, 0
225 #define RG_IEEE_ADDR_6 (0x2a)
226 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0
227 #define RG_IEEE_ADDR_7 (0x2b)
228 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0
229 #define RG_XAH_CTRL_0 (0x2c)
230 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
231 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
232 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
233 #define RG_CSMA_SEED_0 (0x2d)
234 #define SR_CSMA_SEED_0 0x2d, 0xff, 0
235 #define RG_CSMA_SEED_1 (0x2e)
236 #define SR_CSMA_SEED_1 0x2e, 0x07, 0
237 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
238 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4
239 #define SR_AACK_SET_PD 0x2e, 0x20, 5
240 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
241 #define RG_CSMA_BE (0x2f)
242 #define SR_MIN_BE 0x2f, 0x0f, 0
243 #define SR_MAX_BE 0x2f, 0xf0, 4
244
245 #define CMD_REG 0x80
246 #define CMD_REG_MASK 0x3f
247 #define CMD_WRITE 0x40
248 #define CMD_FB 0x20
249
250 #define IRQ_BAT_LOW (1 << 7)
251 #define IRQ_TRX_UR (1 << 6)
252 #define IRQ_AMI (1 << 5)
253 #define IRQ_CCA_ED (1 << 4)
254 #define IRQ_TRX_END (1 << 3)
255 #define IRQ_RX_START (1 << 2)
256 #define IRQ_PLL_UNL (1 << 1)
257 #define IRQ_PLL_LOCK (1 << 0)
258
259 #define IRQ_ACTIVE_HIGH 0
260 #define IRQ_ACTIVE_LOW 1
261
262 #define STATE_P_ON 0x00 /* BUSY */
263 #define STATE_BUSY_RX 0x01
264 #define STATE_BUSY_TX 0x02
265 #define STATE_FORCE_TRX_OFF 0x03
266 #define STATE_FORCE_TX_ON 0x04 /* IDLE */
267 /* 0x05 */ /* INVALID_PARAMETER */
268 #define STATE_RX_ON 0x06
269 /* 0x07 */ /* SUCCESS */
270 #define STATE_TRX_OFF 0x08
271 #define STATE_TX_ON 0x09
272 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
273 #define STATE_SLEEP 0x0F
274 #define STATE_PREP_DEEP_SLEEP 0x10
275 #define STATE_BUSY_RX_AACK 0x11
276 #define STATE_BUSY_TX_ARET 0x12
277 #define STATE_RX_AACK_ON 0x16
278 #define STATE_TX_ARET_ON 0x19
279 #define STATE_RX_ON_NOCLK 0x1C
280 #define STATE_RX_AACK_ON_NOCLK 0x1D
281 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
282 #define STATE_TRANSITION_IN_PROGRESS 0x1F
283
284 #define AT86RF2XX_NUMREGS 0x3F
285
286 static void
287 at86rf230_async_state_change(struct at86rf230_local *lp,
288 struct at86rf230_state_change *ctx,
289 const u8 state, void (*complete)(void *context),
290 const bool irq_enable);
291
292 static inline int
293 __at86rf230_write(struct at86rf230_local *lp,
294 unsigned int addr, unsigned int data)
295 {
296 return regmap_write(lp->regmap, addr, data);
297 }
298
299 static inline int
300 __at86rf230_read(struct at86rf230_local *lp,
301 unsigned int addr, unsigned int *data)
302 {
303 return regmap_read(lp->regmap, addr, data);
304 }
305
306 static inline int
307 at86rf230_read_subreg(struct at86rf230_local *lp,
308 unsigned int addr, unsigned int mask,
309 unsigned int shift, unsigned int *data)
310 {
311 int rc;
312
313 rc = __at86rf230_read(lp, addr, data);
314 if (rc > 0)
315 *data = (*data & mask) >> shift;
316
317 return rc;
318 }
319
320 static inline int
321 at86rf230_write_subreg(struct at86rf230_local *lp,
322 unsigned int addr, unsigned int mask,
323 unsigned int shift, unsigned int data)
324 {
325 return regmap_update_bits(lp->regmap, addr, mask, data << shift);
326 }
327
328 static bool
329 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
330 {
331 switch (reg) {
332 case RG_TRX_STATE:
333 case RG_TRX_CTRL_0:
334 case RG_TRX_CTRL_1:
335 case RG_PHY_TX_PWR:
336 case RG_PHY_ED_LEVEL:
337 case RG_PHY_CC_CCA:
338 case RG_CCA_THRES:
339 case RG_RX_CTRL:
340 case RG_SFD_VALUE:
341 case RG_TRX_CTRL_2:
342 case RG_ANT_DIV:
343 case RG_IRQ_MASK:
344 case RG_VREG_CTRL:
345 case RG_BATMON:
346 case RG_XOSC_CTRL:
347 case RG_RX_SYN:
348 case RG_XAH_CTRL_1:
349 case RG_FTN_CTRL:
350 case RG_PLL_CF:
351 case RG_PLL_DCU:
352 case RG_SHORT_ADDR_0:
353 case RG_SHORT_ADDR_1:
354 case RG_PAN_ID_0:
355 case RG_PAN_ID_1:
356 case RG_IEEE_ADDR_0:
357 case RG_IEEE_ADDR_1:
358 case RG_IEEE_ADDR_2:
359 case RG_IEEE_ADDR_3:
360 case RG_IEEE_ADDR_4:
361 case RG_IEEE_ADDR_5:
362 case RG_IEEE_ADDR_6:
363 case RG_IEEE_ADDR_7:
364 case RG_XAH_CTRL_0:
365 case RG_CSMA_SEED_0:
366 case RG_CSMA_SEED_1:
367 case RG_CSMA_BE:
368 return true;
369 default:
370 return false;
371 }
372 }
373
374 static bool
375 at86rf230_reg_readable(struct device *dev, unsigned int reg)
376 {
377 bool rc;
378
379 /* all writeable are also readable */
380 rc = at86rf230_reg_writeable(dev, reg);
381 if (rc)
382 return rc;
383
384 /* readonly regs */
385 switch (reg) {
386 case RG_TRX_STATUS:
387 case RG_PHY_RSSI:
388 case RG_IRQ_STATUS:
389 case RG_PART_NUM:
390 case RG_VERSION_NUM:
391 case RG_MAN_ID_1:
392 case RG_MAN_ID_0:
393 return true;
394 default:
395 return false;
396 }
397 }
398
399 static bool
400 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
401 {
402 /* can be changed during runtime */
403 switch (reg) {
404 case RG_TRX_STATUS:
405 case RG_TRX_STATE:
406 case RG_PHY_RSSI:
407 case RG_PHY_ED_LEVEL:
408 case RG_IRQ_STATUS:
409 case RG_VREG_CTRL:
410 return true;
411 default:
412 return false;
413 }
414 }
415
416 static bool
417 at86rf230_reg_precious(struct device *dev, unsigned int reg)
418 {
419 /* don't clear irq line on read */
420 switch (reg) {
421 case RG_IRQ_STATUS:
422 return true;
423 default:
424 return false;
425 }
426 }
427
428 static const struct regmap_config at86rf230_regmap_spi_config = {
429 .reg_bits = 8,
430 .val_bits = 8,
431 .write_flag_mask = CMD_REG | CMD_WRITE,
432 .read_flag_mask = CMD_REG,
433 .cache_type = REGCACHE_RBTREE,
434 .max_register = AT86RF2XX_NUMREGS,
435 .writeable_reg = at86rf230_reg_writeable,
436 .readable_reg = at86rf230_reg_readable,
437 .volatile_reg = at86rf230_reg_volatile,
438 .precious_reg = at86rf230_reg_precious,
439 };
440
441 static void
442 at86rf230_async_error_recover(void *context)
443 {
444 struct at86rf230_state_change *ctx = context;
445 struct at86rf230_local *lp = ctx->lp;
446
447 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
448 ieee802154_wake_queue(lp->hw);
449 }
450
451 static inline void
452 at86rf230_async_error(struct at86rf230_local *lp,
453 struct at86rf230_state_change *ctx, int rc)
454 {
455 dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
456
457 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
458 at86rf230_async_error_recover, false);
459 }
460
461 /* Generic function to get some register value in async mode */
462 static void
463 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
464 struct at86rf230_state_change *ctx,
465 void (*complete)(void *context),
466 const bool irq_enable)
467 {
468 int rc;
469
470 u8 *tx_buf = ctx->buf;
471
472 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
473 ctx->trx.len = 2;
474 ctx->msg.complete = complete;
475 ctx->irq_enable = irq_enable;
476 rc = spi_async(lp->spi, &ctx->msg);
477 if (rc) {
478 if (irq_enable)
479 enable_irq(lp->spi->irq);
480
481 at86rf230_async_error(lp, ctx, rc);
482 }
483 }
484
485 static void
486 at86rf230_async_state_assert(void *context)
487 {
488 struct at86rf230_state_change *ctx = context;
489 struct at86rf230_local *lp = ctx->lp;
490 const u8 *buf = ctx->buf;
491 const u8 trx_state = buf[1] & 0x1f;
492
493 /* Assert state change */
494 if (trx_state != ctx->to_state) {
495 /* Special handling if transceiver state is in
496 * STATE_BUSY_RX_AACK and a SHR was detected.
497 */
498 if (trx_state == STATE_BUSY_RX_AACK) {
499 /* Undocumented race condition. If we send a state
500 * change to STATE_RX_AACK_ON the transceiver could
501 * change his state automatically to STATE_BUSY_RX_AACK
502 * if a SHR was detected. This is not an error, but we
503 * can't assert this.
504 */
505 if (ctx->to_state == STATE_RX_AACK_ON)
506 goto done;
507
508 /* If we change to STATE_TX_ON without forcing and
509 * transceiver state is STATE_BUSY_RX_AACK, we wait
510 * 'tFrame + tPAck' receiving time. In this time the
511 * PDU should be received. If the transceiver is still
512 * in STATE_BUSY_RX_AACK, we run a force state change
513 * to STATE_TX_ON. This is a timeout handling, if the
514 * transceiver stucks in STATE_BUSY_RX_AACK.
515 */
516 if (ctx->to_state == STATE_TX_ON) {
517 at86rf230_async_state_change(lp, ctx,
518 STATE_FORCE_TX_ON,
519 ctx->complete,
520 ctx->irq_enable);
521 return;
522 }
523 }
524
525 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
526 ctx->from_state, ctx->to_state, trx_state);
527 }
528
529 done:
530 if (ctx->complete)
531 ctx->complete(context);
532 }
533
534 /* Do state change timing delay. */
535 static void
536 at86rf230_async_state_delay(void *context)
537 {
538 struct at86rf230_state_change *ctx = context;
539 struct at86rf230_local *lp = ctx->lp;
540 struct at86rf2xx_chip_data *c = lp->data;
541 bool force = false;
542
543 /* The force state changes are will show as normal states in the
544 * state status subregister. We change the to_state to the
545 * corresponding one and remember if it was a force change, this
546 * differs if we do a state change from STATE_BUSY_RX_AACK.
547 */
548 switch (ctx->to_state) {
549 case STATE_FORCE_TX_ON:
550 ctx->to_state = STATE_TX_ON;
551 force = true;
552 break;
553 case STATE_FORCE_TRX_OFF:
554 ctx->to_state = STATE_TRX_OFF;
555 force = true;
556 break;
557 default:
558 break;
559 }
560
561 switch (ctx->from_state) {
562 case STATE_TRX_OFF:
563 switch (ctx->to_state) {
564 case STATE_RX_AACK_ON:
565 usleep_range(c->t_off_to_aack, c->t_off_to_aack + 10);
566 goto change;
567 case STATE_TX_ON:
568 usleep_range(c->t_off_to_tx_on,
569 c->t_off_to_tx_on + 10);
570 goto change;
571 default:
572 break;
573 }
574 break;
575 case STATE_BUSY_RX_AACK:
576 switch (ctx->to_state) {
577 case STATE_TX_ON:
578 /* Wait for worst case receiving time if we
579 * didn't make a force change from BUSY_RX_AACK
580 * to TX_ON.
581 */
582 if (!force) {
583 usleep_range(c->t_frame + c->t_p_ack,
584 c->t_frame + c->t_p_ack + 1000);
585 goto change;
586 }
587 break;
588 default:
589 break;
590 }
591 break;
592 /* Default value, means RESET state */
593 case STATE_P_ON:
594 switch (ctx->to_state) {
595 case STATE_TRX_OFF:
596 usleep_range(c->t_reset_to_off, c->t_reset_to_off + 10);
597 goto change;
598 default:
599 break;
600 }
601 break;
602 default:
603 break;
604 }
605
606 /* Default delay is 1us in the most cases */
607 udelay(1);
608
609 change:
610 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
611 at86rf230_async_state_assert,
612 ctx->irq_enable);
613 }
614
615 static void
616 at86rf230_async_state_change_start(void *context)
617 {
618 struct at86rf230_state_change *ctx = context;
619 struct at86rf230_local *lp = ctx->lp;
620 u8 *buf = ctx->buf;
621 const u8 trx_state = buf[1] & 0x1f;
622 int rc;
623
624 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
625 if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
626 udelay(1);
627 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
628 at86rf230_async_state_change_start,
629 ctx->irq_enable);
630 return;
631 }
632
633 /* Check if we already are in the state which we change in */
634 if (trx_state == ctx->to_state) {
635 if (ctx->complete)
636 ctx->complete(context);
637 return;
638 }
639
640 /* Set current state to the context of state change */
641 ctx->from_state = trx_state;
642
643 /* Going into the next step for a state change which do a timing
644 * relevant delay.
645 */
646 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
647 buf[1] = ctx->to_state;
648 ctx->trx.len = 2;
649 ctx->msg.complete = at86rf230_async_state_delay;
650 rc = spi_async(lp->spi, &ctx->msg);
651 if (rc) {
652 if (ctx->irq_enable)
653 enable_irq(lp->spi->irq);
654
655 at86rf230_async_error(lp, ctx, rc);
656 }
657 }
658
659 static void
660 at86rf230_async_state_change(struct at86rf230_local *lp,
661 struct at86rf230_state_change *ctx,
662 const u8 state, void (*complete)(void *context),
663 const bool irq_enable)
664 {
665 /* Initialization for the state change context */
666 ctx->to_state = state;
667 ctx->complete = complete;
668 ctx->irq_enable = irq_enable;
669 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
670 at86rf230_async_state_change_start,
671 irq_enable);
672 }
673
674 static void
675 at86rf230_sync_state_change_complete(void *context)
676 {
677 struct at86rf230_state_change *ctx = context;
678 struct at86rf230_local *lp = ctx->lp;
679
680 complete(&lp->state_complete);
681 }
682
683 /* This function do a sync framework above the async state change.
684 * Some callbacks of the IEEE 802.15.4 driver interface need to be
685 * handled synchronously.
686 */
687 static int
688 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
689 {
690 unsigned long rc;
691
692 at86rf230_async_state_change(lp, &lp->state, state,
693 at86rf230_sync_state_change_complete,
694 false);
695
696 rc = wait_for_completion_timeout(&lp->state_complete,
697 msecs_to_jiffies(100));
698 if (!rc) {
699 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
700 return -ETIMEDOUT;
701 }
702
703 return 0;
704 }
705
706 static void
707 at86rf230_tx_complete(void *context)
708 {
709 struct at86rf230_state_change *ctx = context;
710 struct at86rf230_local *lp = ctx->lp;
711 struct sk_buff *skb = lp->tx_skb;
712
713 enable_irq(lp->spi->irq);
714
715 ieee802154_xmit_complete(lp->hw, skb, !lp->tx_aret);
716 }
717
718 static void
719 at86rf230_tx_on(void *context)
720 {
721 struct at86rf230_state_change *ctx = context;
722 struct at86rf230_local *lp = ctx->lp;
723
724 at86rf230_async_state_change(lp, &lp->irq, STATE_RX_AACK_ON,
725 at86rf230_tx_complete, true);
726 }
727
728 static void
729 at86rf230_tx_trac_error(void *context)
730 {
731 struct at86rf230_state_change *ctx = context;
732 struct at86rf230_local *lp = ctx->lp;
733
734 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
735 at86rf230_tx_on, true);
736 }
737
738 static void
739 at86rf230_tx_trac_check(void *context)
740 {
741 struct at86rf230_state_change *ctx = context;
742 struct at86rf230_local *lp = ctx->lp;
743 const u8 *buf = ctx->buf;
744 const u8 trac = (buf[1] & 0xe0) >> 5;
745
746 /* If trac status is different than zero we need to do a state change
747 * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver
748 * state to TX_ON.
749 */
750 if (trac)
751 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
752 at86rf230_tx_trac_error, true);
753 else
754 at86rf230_tx_on(context);
755 }
756
757 static void
758 at86rf230_tx_trac_status(void *context)
759 {
760 struct at86rf230_state_change *ctx = context;
761 struct at86rf230_local *lp = ctx->lp;
762
763 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
764 at86rf230_tx_trac_check, true);
765 }
766
767 static void
768 at86rf230_rx(struct at86rf230_local *lp,
769 const u8 *data, const u8 len, const u8 lqi)
770 {
771 struct sk_buff *skb;
772 u8 rx_local_buf[AT86RF2XX_MAX_BUF];
773
774 memcpy(rx_local_buf, data, len);
775 enable_irq(lp->spi->irq);
776
777 skb = dev_alloc_skb(IEEE802154_MTU);
778 if (!skb) {
779 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
780 return;
781 }
782
783 memcpy(skb_put(skb, len), rx_local_buf, len);
784 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
785 }
786
787 static void
788 at86rf230_rx_read_frame_complete(void *context)
789 {
790 struct at86rf230_state_change *ctx = context;
791 struct at86rf230_local *lp = ctx->lp;
792 const u8 *buf = lp->irq.buf;
793 u8 len = buf[1];
794
795 if (!ieee802154_is_valid_psdu_len(len)) {
796 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
797 len = IEEE802154_MTU;
798 }
799
800 at86rf230_rx(lp, buf + 2, len, buf[2 + len]);
801 }
802
803 static void
804 at86rf230_rx_read_frame(struct at86rf230_local *lp)
805 {
806 int rc;
807
808 u8 *buf = lp->irq.buf;
809
810 buf[0] = CMD_FB;
811 lp->irq.trx.len = AT86RF2XX_MAX_BUF;
812 lp->irq.msg.complete = at86rf230_rx_read_frame_complete;
813 rc = spi_async(lp->spi, &lp->irq.msg);
814 if (rc) {
815 enable_irq(lp->spi->irq);
816 at86rf230_async_error(lp, &lp->irq, rc);
817 }
818 }
819
820 static void
821 at86rf230_rx_trac_check(void *context)
822 {
823 struct at86rf230_state_change *ctx = context;
824 struct at86rf230_local *lp = ctx->lp;
825
826 /* Possible check on trac status here. This could be useful to make
827 * some stats why receive is failed. Not used at the moment, but it's
828 * maybe timing relevant. Datasheet doesn't say anything about this.
829 * The programming guide say do it so.
830 */
831
832 at86rf230_rx_read_frame(lp);
833 }
834
835 static void
836 at86rf230_irq_trx_end(struct at86rf230_local *lp)
837 {
838 spin_lock(&lp->lock);
839 if (lp->is_tx) {
840 lp->is_tx = 0;
841 spin_unlock(&lp->lock);
842
843 if (lp->tx_aret)
844 at86rf230_async_state_change(lp, &lp->irq,
845 STATE_FORCE_TX_ON,
846 at86rf230_tx_trac_status,
847 true);
848 else
849 at86rf230_async_state_change(lp, &lp->irq,
850 STATE_RX_AACK_ON,
851 at86rf230_tx_complete,
852 true);
853 } else {
854 spin_unlock(&lp->lock);
855 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
856 at86rf230_rx_trac_check, true);
857 }
858 }
859
860 static void
861 at86rf230_irq_status(void *context)
862 {
863 struct at86rf230_state_change *ctx = context;
864 struct at86rf230_local *lp = ctx->lp;
865 const u8 *buf = lp->irq.buf;
866 const u8 irq = buf[1];
867
868 if (irq & IRQ_TRX_END) {
869 at86rf230_irq_trx_end(lp);
870 } else {
871 enable_irq(lp->spi->irq);
872 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
873 irq);
874 }
875 }
876
877 static irqreturn_t at86rf230_isr(int irq, void *data)
878 {
879 struct at86rf230_local *lp = data;
880 struct at86rf230_state_change *ctx = &lp->irq;
881 u8 *buf = ctx->buf;
882 int rc;
883
884 disable_irq_nosync(irq);
885
886 buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
887 ctx->trx.len = 2;
888 ctx->msg.complete = at86rf230_irq_status;
889 rc = spi_async(lp->spi, &ctx->msg);
890 if (rc) {
891 enable_irq(irq);
892 at86rf230_async_error(lp, ctx, rc);
893 return IRQ_NONE;
894 }
895
896 return IRQ_HANDLED;
897 }
898
899 static void
900 at86rf230_write_frame_complete(void *context)
901 {
902 struct at86rf230_state_change *ctx = context;
903 struct at86rf230_local *lp = ctx->lp;
904 u8 *buf = ctx->buf;
905 int rc;
906
907 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
908 buf[1] = STATE_BUSY_TX;
909 ctx->trx.len = 2;
910 ctx->msg.complete = NULL;
911 rc = spi_async(lp->spi, &ctx->msg);
912 if (rc)
913 at86rf230_async_error(lp, ctx, rc);
914 }
915
916 static void
917 at86rf230_write_frame(void *context)
918 {
919 struct at86rf230_state_change *ctx = context;
920 struct at86rf230_local *lp = ctx->lp;
921 struct sk_buff *skb = lp->tx_skb;
922 u8 *buf = lp->tx.buf;
923 int rc;
924
925 spin_lock(&lp->lock);
926 lp->is_tx = 1;
927 spin_unlock(&lp->lock);
928
929 buf[0] = CMD_FB | CMD_WRITE;
930 buf[1] = skb->len + 2;
931 memcpy(buf + 2, skb->data, skb->len);
932 lp->tx.trx.len = skb->len + 2;
933 lp->tx.msg.complete = at86rf230_write_frame_complete;
934 rc = spi_async(lp->spi, &lp->tx.msg);
935 if (rc)
936 at86rf230_async_error(lp, ctx, rc);
937 }
938
939 static void
940 at86rf230_xmit_tx_on(void *context)
941 {
942 struct at86rf230_state_change *ctx = context;
943 struct at86rf230_local *lp = ctx->lp;
944
945 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
946 at86rf230_write_frame, false);
947 }
948
949 static int
950 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
951 {
952 struct at86rf230_local *lp = hw->priv;
953 struct at86rf230_state_change *ctx = &lp->tx;
954
955 void (*tx_complete)(void *context) = at86rf230_write_frame;
956
957 lp->tx_skb = skb;
958
959 /* In ARET mode we need to go into STATE_TX_ARET_ON after we
960 * are in STATE_TX_ON. The pfad differs here, so we change
961 * the complete handler.
962 */
963 if (lp->tx_aret)
964 tx_complete = at86rf230_xmit_tx_on;
965
966 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, tx_complete, false);
967
968 return 0;
969 }
970
971 static int
972 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
973 {
974 BUG_ON(!level);
975 *level = 0xbe;
976 return 0;
977 }
978
979 static int
980 at86rf230_start(struct ieee802154_hw *hw)
981 {
982 return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON);
983 }
984
985 static void
986 at86rf230_stop(struct ieee802154_hw *hw)
987 {
988 at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF);
989 }
990
991 static int
992 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
993 {
994 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
995 }
996
997 static int
998 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
999 {
1000 int rc;
1001
1002 if (channel == 0)
1003 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1004 else
1005 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1006 if (rc < 0)
1007 return rc;
1008
1009 if (page == 0) {
1010 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1011 lp->data->rssi_base_val = -100;
1012 } else {
1013 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1014 lp->data->rssi_base_val = -98;
1015 }
1016 if (rc < 0)
1017 return rc;
1018
1019 /* This sets the symbol_duration according frequency on the 212.
1020 * TODO move this handling while set channel and page in cfg802154.
1021 * We can do that, this timings are according 802.15.4 standard.
1022 * If we do that in cfg802154, this is a more generic calculation.
1023 *
1024 * This should also protected from ifs_timer. Means cancel timer and
1025 * init with a new value. For now, this is okay.
1026 */
1027 if (channel == 0) {
1028 if (page == 0) {
1029 /* SUB:0 and BPSK:0 -> BPSK-20 */
1030 lp->hw->phy->symbol_duration = 50;
1031 } else {
1032 /* SUB:1 and BPSK:0 -> BPSK-40 */
1033 lp->hw->phy->symbol_duration = 25;
1034 }
1035 } else {
1036 if (page == 0)
1037 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1038 lp->hw->phy->symbol_duration = 40;
1039 else
1040 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1041 lp->hw->phy->symbol_duration = 16;
1042 }
1043
1044 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1045 lp->hw->phy->symbol_duration;
1046 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1047 lp->hw->phy->symbol_duration;
1048
1049 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1050 }
1051
1052 static int
1053 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1054 {
1055 struct at86rf230_local *lp = hw->priv;
1056 int rc;
1057
1058 rc = lp->data->set_channel(lp, page, channel);
1059 /* Wait for PLL */
1060 usleep_range(lp->data->t_channel_switch,
1061 lp->data->t_channel_switch + 10);
1062 return rc;
1063 }
1064
1065 static int
1066 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1067 struct ieee802154_hw_addr_filt *filt,
1068 unsigned long changed)
1069 {
1070 struct at86rf230_local *lp = hw->priv;
1071
1072 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1073 u16 addr = le16_to_cpu(filt->short_addr);
1074
1075 dev_vdbg(&lp->spi->dev,
1076 "at86rf230_set_hw_addr_filt called for saddr\n");
1077 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1078 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1079 }
1080
1081 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1082 u16 pan = le16_to_cpu(filt->pan_id);
1083
1084 dev_vdbg(&lp->spi->dev,
1085 "at86rf230_set_hw_addr_filt called for pan id\n");
1086 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1087 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1088 }
1089
1090 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1091 u8 i, addr[8];
1092
1093 memcpy(addr, &filt->ieee_addr, 8);
1094 dev_vdbg(&lp->spi->dev,
1095 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1096 for (i = 0; i < 8; i++)
1097 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1098 }
1099
1100 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1101 dev_vdbg(&lp->spi->dev,
1102 "at86rf230_set_hw_addr_filt called for panc change\n");
1103 if (filt->pan_coord)
1104 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1105 else
1106 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1107 }
1108
1109 return 0;
1110 }
1111
1112 static int
1113 at86rf230_set_txpower(struct ieee802154_hw *hw, int db)
1114 {
1115 struct at86rf230_local *lp = hw->priv;
1116
1117 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1118 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1119 * 0dB.
1120 * thus, supported values for db range from -26 to 5, for 31dB of
1121 * reduction to 0dB of reduction.
1122 */
1123 if (db > 5 || db < -26)
1124 return -EINVAL;
1125
1126 db = -(db - 5);
1127
1128 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
1129 }
1130
1131 static int
1132 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1133 {
1134 struct at86rf230_local *lp = hw->priv;
1135
1136 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1137 }
1138
1139 static int
1140 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1141 const struct wpan_phy_cca *cca)
1142 {
1143 struct at86rf230_local *lp = hw->priv;
1144 u8 val;
1145
1146 /* mapping 802.15.4 to driver spec */
1147 switch (cca->mode) {
1148 case NL802154_CCA_ENERGY:
1149 val = 1;
1150 break;
1151 case NL802154_CCA_CARRIER:
1152 val = 2;
1153 break;
1154 case NL802154_CCA_ENERGY_CARRIER:
1155 switch (cca->opt) {
1156 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1157 val = 3;
1158 break;
1159 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1160 val = 0;
1161 break;
1162 default:
1163 return -EINVAL;
1164 }
1165 break;
1166 default:
1167 return -EINVAL;
1168 }
1169
1170 return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1171 }
1172
1173 static int
1174 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level)
1175 {
1176 return (level - lp->data->rssi_base_val) * 100 / 207;
1177 }
1178
1179 static int
1180 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level)
1181 {
1182 return (level - lp->data->rssi_base_val) / 2;
1183 }
1184
1185 static int
1186 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
1187 {
1188 struct at86rf230_local *lp = hw->priv;
1189
1190 if (level < lp->data->rssi_base_val || level > 30)
1191 return -EINVAL;
1192
1193 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES,
1194 lp->data->get_desense_steps(lp, level));
1195 }
1196
1197 static int
1198 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1199 u8 retries)
1200 {
1201 struct at86rf230_local *lp = hw->priv;
1202 int rc;
1203
1204 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1205 if (rc)
1206 return rc;
1207
1208 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1209 if (rc)
1210 return rc;
1211
1212 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1213 }
1214
1215 static int
1216 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1217 {
1218 struct at86rf230_local *lp = hw->priv;
1219 int rc = 0;
1220
1221 lp->tx_aret = retries >= 0;
1222 lp->max_frame_retries = retries;
1223
1224 if (retries >= 0)
1225 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1226
1227 return rc;
1228 }
1229
1230 static int
1231 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1232 {
1233 struct at86rf230_local *lp = hw->priv;
1234 int rc;
1235
1236 if (on) {
1237 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1238 if (rc < 0)
1239 return rc;
1240
1241 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1242 if (rc < 0)
1243 return rc;
1244 } else {
1245 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1246 if (rc < 0)
1247 return rc;
1248
1249 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1250 if (rc < 0)
1251 return rc;
1252 }
1253
1254 return 0;
1255 }
1256
1257 static const struct ieee802154_ops at86rf230_ops = {
1258 .owner = THIS_MODULE,
1259 .xmit_async = at86rf230_xmit,
1260 .ed = at86rf230_ed,
1261 .set_channel = at86rf230_channel,
1262 .start = at86rf230_start,
1263 .stop = at86rf230_stop,
1264 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1265 .set_txpower = at86rf230_set_txpower,
1266 .set_lbt = at86rf230_set_lbt,
1267 .set_cca_mode = at86rf230_set_cca_mode,
1268 .set_cca_ed_level = at86rf230_set_cca_ed_level,
1269 .set_csma_params = at86rf230_set_csma_params,
1270 .set_frame_retries = at86rf230_set_frame_retries,
1271 .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1272 };
1273
1274 static struct at86rf2xx_chip_data at86rf233_data = {
1275 .t_sleep_cycle = 330,
1276 .t_channel_switch = 11,
1277 .t_reset_to_off = 26,
1278 .t_off_to_aack = 80,
1279 .t_off_to_tx_on = 80,
1280 .t_frame = 4096,
1281 .t_p_ack = 545,
1282 .rssi_base_val = -91,
1283 .set_channel = at86rf23x_set_channel,
1284 .get_desense_steps = at86rf23x_get_desens_steps
1285 };
1286
1287 static struct at86rf2xx_chip_data at86rf231_data = {
1288 .t_sleep_cycle = 330,
1289 .t_channel_switch = 24,
1290 .t_reset_to_off = 37,
1291 .t_off_to_aack = 110,
1292 .t_off_to_tx_on = 110,
1293 .t_frame = 4096,
1294 .t_p_ack = 545,
1295 .rssi_base_val = -91,
1296 .set_channel = at86rf23x_set_channel,
1297 .get_desense_steps = at86rf23x_get_desens_steps
1298 };
1299
1300 static struct at86rf2xx_chip_data at86rf212_data = {
1301 .t_sleep_cycle = 330,
1302 .t_channel_switch = 11,
1303 .t_reset_to_off = 26,
1304 .t_off_to_aack = 200,
1305 .t_off_to_tx_on = 200,
1306 .t_frame = 4096,
1307 .t_p_ack = 545,
1308 .rssi_base_val = -100,
1309 .set_channel = at86rf212_set_channel,
1310 .get_desense_steps = at86rf212_get_desens_steps
1311 };
1312
1313 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1314 {
1315 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1316 unsigned int dvdd;
1317 u8 csma_seed[2];
1318
1319 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1320 if (rc)
1321 return rc;
1322
1323 irq_type = irq_get_trigger_type(lp->spi->irq);
1324 if (irq_type == IRQ_TYPE_EDGE_RISING ||
1325 irq_type == IRQ_TYPE_EDGE_FALLING)
1326 dev_warn(&lp->spi->dev,
1327 "Using edge triggered irq's are not recommended!\n");
1328 if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1329 irq_type == IRQ_TYPE_LEVEL_LOW)
1330 irq_pol = IRQ_ACTIVE_LOW;
1331
1332 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1333 if (rc)
1334 return rc;
1335
1336 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1337 if (rc)
1338 return rc;
1339
1340 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1341 if (rc)
1342 return rc;
1343
1344 /* reset values differs in at86rf231 and at86rf233 */
1345 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1346 if (rc)
1347 return rc;
1348
1349 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1350 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1351 if (rc)
1352 return rc;
1353 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1354 if (rc)
1355 return rc;
1356
1357 /* CLKM changes are applied immediately */
1358 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1359 if (rc)
1360 return rc;
1361
1362 /* Turn CLKM Off */
1363 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1364 if (rc)
1365 return rc;
1366 /* Wait the next SLEEP cycle */
1367 usleep_range(lp->data->t_sleep_cycle,
1368 lp->data->t_sleep_cycle + 100);
1369
1370 /* xtal_trim value is calculated by:
1371 * CL = 0.5 * (CX + CTRIM + CPAR)
1372 *
1373 * whereas:
1374 * CL = capacitor of used crystal
1375 * CX = connected capacitors at xtal pins
1376 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1377 * but this is different on each board setup. You need to fine
1378 * tuning this value via CTRIM.
1379 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1380 * 0 pF upto 4.5 pF.
1381 *
1382 * Examples:
1383 * atben transceiver:
1384 *
1385 * CL = 8 pF
1386 * CX = 12 pF
1387 * CPAR = 3 pF (We assume the magic constant from datasheet)
1388 * CTRIM = 0.9 pF
1389 *
1390 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1391 *
1392 * xtal_trim = 0x3
1393 *
1394 * openlabs transceiver:
1395 *
1396 * CL = 16 pF
1397 * CX = 22 pF
1398 * CPAR = 3 pF (We assume the magic constant from datasheet)
1399 * CTRIM = 4.5 pF
1400 *
1401 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1402 *
1403 * xtal_trim = 0xf
1404 */
1405 rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1406 if (rc)
1407 return rc;
1408
1409 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1410 if (rc)
1411 return rc;
1412 if (!dvdd) {
1413 dev_err(&lp->spi->dev, "DVDD error\n");
1414 return -EINVAL;
1415 }
1416
1417 /* Force setting slotted operation bit to 0. Sometimes the atben
1418 * sets this bit and I don't know why. We set this always force
1419 * to zero while probing.
1420 */
1421 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1422 }
1423
1424 static int
1425 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1426 u8 *xtal_trim)
1427 {
1428 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1429 int ret;
1430
1431 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1432 if (!pdata)
1433 return -ENOENT;
1434
1435 *rstn = pdata->rstn;
1436 *slp_tr = pdata->slp_tr;
1437 *xtal_trim = pdata->xtal_trim;
1438 return 0;
1439 }
1440
1441 *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1442 *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1443 ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1444 if (ret < 0 && ret != -EINVAL)
1445 return ret;
1446
1447 return 0;
1448 }
1449
1450 static int
1451 at86rf230_detect_device(struct at86rf230_local *lp)
1452 {
1453 unsigned int part, version, val;
1454 u16 man_id = 0;
1455 const char *chip;
1456 int rc;
1457
1458 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1459 if (rc)
1460 return rc;
1461 man_id |= val;
1462
1463 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1464 if (rc)
1465 return rc;
1466 man_id |= (val << 8);
1467
1468 rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1469 if (rc)
1470 return rc;
1471
1472 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1473 if (rc)
1474 return rc;
1475
1476 if (man_id != 0x001f) {
1477 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1478 man_id >> 8, man_id & 0xFF);
1479 return -EINVAL;
1480 }
1481
1482 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AACK |
1483 IEEE802154_HW_TXPOWER | IEEE802154_HW_ARET |
1484 IEEE802154_HW_AFILT | IEEE802154_HW_PROMISCUOUS;
1485
1486 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1487
1488 switch (part) {
1489 case 2:
1490 chip = "at86rf230";
1491 rc = -ENOTSUPP;
1492 break;
1493 case 3:
1494 chip = "at86rf231";
1495 lp->data = &at86rf231_data;
1496 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1497 lp->hw->phy->current_channel = 11;
1498 lp->hw->phy->symbol_duration = 16;
1499 break;
1500 case 7:
1501 chip = "at86rf212";
1502 lp->data = &at86rf212_data;
1503 lp->hw->flags |= IEEE802154_HW_LBT;
1504 lp->hw->phy->channels_supported[0] = 0x00007FF;
1505 lp->hw->phy->channels_supported[2] = 0x00007FF;
1506 lp->hw->phy->current_channel = 5;
1507 lp->hw->phy->symbol_duration = 25;
1508 break;
1509 case 11:
1510 chip = "at86rf233";
1511 lp->data = &at86rf233_data;
1512 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1513 lp->hw->phy->current_channel = 13;
1514 lp->hw->phy->symbol_duration = 16;
1515 break;
1516 default:
1517 chip = "unknown";
1518 rc = -ENOTSUPP;
1519 break;
1520 }
1521
1522 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1523
1524 return rc;
1525 }
1526
1527 static void
1528 at86rf230_setup_spi_messages(struct at86rf230_local *lp)
1529 {
1530 lp->state.lp = lp;
1531 spi_message_init(&lp->state.msg);
1532 lp->state.msg.context = &lp->state;
1533 lp->state.trx.tx_buf = lp->state.buf;
1534 lp->state.trx.rx_buf = lp->state.buf;
1535 spi_message_add_tail(&lp->state.trx, &lp->state.msg);
1536
1537 lp->irq.lp = lp;
1538 spi_message_init(&lp->irq.msg);
1539 lp->irq.msg.context = &lp->irq;
1540 lp->irq.trx.tx_buf = lp->irq.buf;
1541 lp->irq.trx.rx_buf = lp->irq.buf;
1542 spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
1543
1544 lp->tx.lp = lp;
1545 spi_message_init(&lp->tx.msg);
1546 lp->tx.msg.context = &lp->tx;
1547 lp->tx.trx.tx_buf = lp->tx.buf;
1548 lp->tx.trx.rx_buf = lp->tx.buf;
1549 spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
1550 }
1551
1552 static int at86rf230_probe(struct spi_device *spi)
1553 {
1554 struct ieee802154_hw *hw;
1555 struct at86rf230_local *lp;
1556 unsigned int status;
1557 int rc, irq_type, rstn, slp_tr;
1558 u8 xtal_trim;
1559
1560 if (!spi->irq) {
1561 dev_err(&spi->dev, "no IRQ specified\n");
1562 return -EINVAL;
1563 }
1564
1565 rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1566 if (rc < 0) {
1567 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1568 return rc;
1569 }
1570
1571 if (gpio_is_valid(rstn)) {
1572 rc = devm_gpio_request_one(&spi->dev, rstn,
1573 GPIOF_OUT_INIT_HIGH, "rstn");
1574 if (rc)
1575 return rc;
1576 }
1577
1578 if (gpio_is_valid(slp_tr)) {
1579 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1580 GPIOF_OUT_INIT_LOW, "slp_tr");
1581 if (rc)
1582 return rc;
1583 }
1584
1585 /* Reset */
1586 if (gpio_is_valid(rstn)) {
1587 udelay(1);
1588 gpio_set_value(rstn, 0);
1589 udelay(1);
1590 gpio_set_value(rstn, 1);
1591 usleep_range(120, 240);
1592 }
1593
1594 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1595 if (!hw)
1596 return -ENOMEM;
1597
1598 lp = hw->priv;
1599 lp->hw = hw;
1600 lp->spi = spi;
1601 hw->parent = &spi->dev;
1602 hw->vif_data_size = sizeof(*lp);
1603 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1604
1605 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1606 if (IS_ERR(lp->regmap)) {
1607 rc = PTR_ERR(lp->regmap);
1608 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1609 rc);
1610 goto free_dev;
1611 }
1612
1613 at86rf230_setup_spi_messages(lp);
1614
1615 rc = at86rf230_detect_device(lp);
1616 if (rc < 0)
1617 goto free_dev;
1618
1619 spin_lock_init(&lp->lock);
1620 init_completion(&lp->state_complete);
1621
1622 spi_set_drvdata(spi, lp);
1623
1624 rc = at86rf230_hw_init(lp, xtal_trim);
1625 if (rc)
1626 goto free_dev;
1627
1628 /* Read irq status register to reset irq line */
1629 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1630 if (rc)
1631 goto free_dev;
1632
1633 irq_type = irq_get_trigger_type(spi->irq);
1634 if (!irq_type)
1635 irq_type = IRQF_TRIGGER_RISING;
1636
1637 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1638 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1639 if (rc)
1640 goto free_dev;
1641
1642 rc = ieee802154_register_hw(lp->hw);
1643 if (rc)
1644 goto free_dev;
1645
1646 return rc;
1647
1648 free_dev:
1649 ieee802154_free_hw(lp->hw);
1650
1651 return rc;
1652 }
1653
1654 static int at86rf230_remove(struct spi_device *spi)
1655 {
1656 struct at86rf230_local *lp = spi_get_drvdata(spi);
1657
1658 /* mask all at86rf230 irq's */
1659 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1660 ieee802154_unregister_hw(lp->hw);
1661 ieee802154_free_hw(lp->hw);
1662 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1663
1664 return 0;
1665 }
1666
1667 static const struct of_device_id at86rf230_of_match[] = {
1668 { .compatible = "atmel,at86rf230", },
1669 { .compatible = "atmel,at86rf231", },
1670 { .compatible = "atmel,at86rf233", },
1671 { .compatible = "atmel,at86rf212", },
1672 { },
1673 };
1674 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1675
1676 static const struct spi_device_id at86rf230_device_id[] = {
1677 { .name = "at86rf230", },
1678 { .name = "at86rf231", },
1679 { .name = "at86rf233", },
1680 { .name = "at86rf212", },
1681 { },
1682 };
1683 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1684
1685 static struct spi_driver at86rf230_driver = {
1686 .id_table = at86rf230_device_id,
1687 .driver = {
1688 .of_match_table = of_match_ptr(at86rf230_of_match),
1689 .name = "at86rf230",
1690 .owner = THIS_MODULE,
1691 },
1692 .probe = at86rf230_probe,
1693 .remove = at86rf230_remove,
1694 };
1695
1696 module_spi_driver(at86rf230_driver);
1697
1698 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1699 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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