2 * AT86RF230/RF231 driver
4 * Copyright (C) 2009-2012 Siemens AG
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 * Alexander Aring <aar@pengutronix.de>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/gpio.h>
25 #include <linux/delay.h>
26 #include <linux/spinlock.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/at86rf230.h>
29 #include <linux/regmap.h>
30 #include <linux/skbuff.h>
31 #include <linux/of_gpio.h>
32 #include <linux/ieee802154.h>
34 #include <net/mac802154.h>
35 #include <net/cfg802154.h>
37 struct at86rf230_local
;
38 /* at86rf2xx chip depend data.
39 * All timings are in us.
41 struct at86rf2xx_chip_data
{
51 int (*set_channel
)(struct at86rf230_local
*, u8
, u8
);
52 int (*get_desense_steps
)(struct at86rf230_local
*, s32
);
55 #define AT86RF2XX_MAX_BUF (127 + 3)
56 /* tx retries to access the TX_ON state
57 * if it's above then force change will be started.
59 * We assume the max_frame_retries (7) value of 802.15.4 here.
61 #define AT86RF2XX_MAX_TX_RETRIES 7
63 struct at86rf230_state_change
{
64 struct at86rf230_local
*lp
;
67 struct spi_message msg
;
68 struct spi_transfer trx
;
69 u8 buf
[AT86RF2XX_MAX_BUF
];
71 void (*complete
)(void *context
);
78 struct at86rf230_local
{
79 struct spi_device
*spi
;
81 struct ieee802154_hw
*hw
;
82 struct at86rf2xx_chip_data
*data
;
83 struct regmap
*regmap
;
85 struct completion state_complete
;
86 struct at86rf230_state_change state
;
88 struct at86rf230_state_change irq
;
93 /* spinlock for is_tx protection */
96 struct sk_buff
*tx_skb
;
97 struct at86rf230_state_change tx
;
100 #define RG_TRX_STATUS (0x01)
101 #define SR_TRX_STATUS 0x01, 0x1f, 0
102 #define SR_RESERVED_01_3 0x01, 0x20, 5
103 #define SR_CCA_STATUS 0x01, 0x40, 6
104 #define SR_CCA_DONE 0x01, 0x80, 7
105 #define RG_TRX_STATE (0x02)
106 #define SR_TRX_CMD 0x02, 0x1f, 0
107 #define SR_TRAC_STATUS 0x02, 0xe0, 5
108 #define RG_TRX_CTRL_0 (0x03)
109 #define SR_CLKM_CTRL 0x03, 0x07, 0
110 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3
111 #define SR_PAD_IO_CLKM 0x03, 0x30, 4
112 #define SR_PAD_IO 0x03, 0xc0, 6
113 #define RG_TRX_CTRL_1 (0x04)
114 #define SR_IRQ_POLARITY 0x04, 0x01, 0
115 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1
116 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2
117 #define SR_RX_BL_CTRL 0x04, 0x10, 4
118 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
119 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
120 #define SR_PA_EXT_EN 0x04, 0x80, 7
121 #define RG_PHY_TX_PWR (0x05)
122 #define SR_TX_PWR 0x05, 0x0f, 0
123 #define SR_PA_LT 0x05, 0x30, 4
124 #define SR_PA_BUF_LT 0x05, 0xc0, 6
125 #define RG_PHY_RSSI (0x06)
126 #define SR_RSSI 0x06, 0x1f, 0
127 #define SR_RND_VALUE 0x06, 0x60, 5
128 #define SR_RX_CRC_VALID 0x06, 0x80, 7
129 #define RG_PHY_ED_LEVEL (0x07)
130 #define SR_ED_LEVEL 0x07, 0xff, 0
131 #define RG_PHY_CC_CCA (0x08)
132 #define SR_CHANNEL 0x08, 0x1f, 0
133 #define SR_CCA_MODE 0x08, 0x60, 5
134 #define SR_CCA_REQUEST 0x08, 0x80, 7
135 #define RG_CCA_THRES (0x09)
136 #define SR_CCA_ED_THRES 0x09, 0x0f, 0
137 #define SR_RESERVED_09_1 0x09, 0xf0, 4
138 #define RG_RX_CTRL (0x0a)
139 #define SR_PDT_THRES 0x0a, 0x0f, 0
140 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4
141 #define RG_SFD_VALUE (0x0b)
142 #define SR_SFD_VALUE 0x0b, 0xff, 0
143 #define RG_TRX_CTRL_2 (0x0c)
144 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
145 #define SR_SUB_MODE 0x0c, 0x04, 2
146 #define SR_BPSK_QPSK 0x0c, 0x08, 3
147 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
148 #define SR_RESERVED_0c_5 0x0c, 0x60, 5
149 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7
150 #define RG_ANT_DIV (0x0d)
151 #define SR_ANT_CTRL 0x0d, 0x03, 0
152 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
153 #define SR_ANT_DIV_EN 0x0d, 0x08, 3
154 #define SR_RESERVED_0d_2 0x0d, 0x70, 4
155 #define SR_ANT_SEL 0x0d, 0x80, 7
156 #define RG_IRQ_MASK (0x0e)
157 #define SR_IRQ_MASK 0x0e, 0xff, 0
158 #define RG_IRQ_STATUS (0x0f)
159 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
160 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
161 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2
162 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
163 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
164 #define SR_IRQ_5_AMI 0x0f, 0x20, 5
165 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
166 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
167 #define RG_VREG_CTRL (0x10)
168 #define SR_RESERVED_10_6 0x10, 0x03, 0
169 #define SR_DVDD_OK 0x10, 0x04, 2
170 #define SR_DVREG_EXT 0x10, 0x08, 3
171 #define SR_RESERVED_10_3 0x10, 0x30, 4
172 #define SR_AVDD_OK 0x10, 0x40, 6
173 #define SR_AVREG_EXT 0x10, 0x80, 7
174 #define RG_BATMON (0x11)
175 #define SR_BATMON_VTH 0x11, 0x0f, 0
176 #define SR_BATMON_HR 0x11, 0x10, 4
177 #define SR_BATMON_OK 0x11, 0x20, 5
178 #define SR_RESERVED_11_1 0x11, 0xc0, 6
179 #define RG_XOSC_CTRL (0x12)
180 #define SR_XTAL_TRIM 0x12, 0x0f, 0
181 #define SR_XTAL_MODE 0x12, 0xf0, 4
182 #define RG_RX_SYN (0x15)
183 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
184 #define SR_RESERVED_15_2 0x15, 0x70, 4
185 #define SR_RX_PDT_DIS 0x15, 0x80, 7
186 #define RG_XAH_CTRL_1 (0x17)
187 #define SR_RESERVED_17_8 0x17, 0x01, 0
188 #define SR_AACK_PROM_MODE 0x17, 0x02, 1
189 #define SR_AACK_ACK_TIME 0x17, 0x04, 2
190 #define SR_RESERVED_17_5 0x17, 0x08, 3
191 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
192 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
193 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6
194 #define SR_RESERVED_17_1 0x17, 0x80, 7
195 #define RG_FTN_CTRL (0x18)
196 #define SR_RESERVED_18_2 0x18, 0x7f, 0
197 #define SR_FTN_START 0x18, 0x80, 7
198 #define RG_PLL_CF (0x1a)
199 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0
200 #define SR_PLL_CF_START 0x1a, 0x80, 7
201 #define RG_PLL_DCU (0x1b)
202 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0
203 #define SR_RESERVED_1b_2 0x1b, 0x40, 6
204 #define SR_PLL_DCU_START 0x1b, 0x80, 7
205 #define RG_PART_NUM (0x1c)
206 #define SR_PART_NUM 0x1c, 0xff, 0
207 #define RG_VERSION_NUM (0x1d)
208 #define SR_VERSION_NUM 0x1d, 0xff, 0
209 #define RG_MAN_ID_0 (0x1e)
210 #define SR_MAN_ID_0 0x1e, 0xff, 0
211 #define RG_MAN_ID_1 (0x1f)
212 #define SR_MAN_ID_1 0x1f, 0xff, 0
213 #define RG_SHORT_ADDR_0 (0x20)
214 #define SR_SHORT_ADDR_0 0x20, 0xff, 0
215 #define RG_SHORT_ADDR_1 (0x21)
216 #define SR_SHORT_ADDR_1 0x21, 0xff, 0
217 #define RG_PAN_ID_0 (0x22)
218 #define SR_PAN_ID_0 0x22, 0xff, 0
219 #define RG_PAN_ID_1 (0x23)
220 #define SR_PAN_ID_1 0x23, 0xff, 0
221 #define RG_IEEE_ADDR_0 (0x24)
222 #define SR_IEEE_ADDR_0 0x24, 0xff, 0
223 #define RG_IEEE_ADDR_1 (0x25)
224 #define SR_IEEE_ADDR_1 0x25, 0xff, 0
225 #define RG_IEEE_ADDR_2 (0x26)
226 #define SR_IEEE_ADDR_2 0x26, 0xff, 0
227 #define RG_IEEE_ADDR_3 (0x27)
228 #define SR_IEEE_ADDR_3 0x27, 0xff, 0
229 #define RG_IEEE_ADDR_4 (0x28)
230 #define SR_IEEE_ADDR_4 0x28, 0xff, 0
231 #define RG_IEEE_ADDR_5 (0x29)
232 #define SR_IEEE_ADDR_5 0x29, 0xff, 0
233 #define RG_IEEE_ADDR_6 (0x2a)
234 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0
235 #define RG_IEEE_ADDR_7 (0x2b)
236 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0
237 #define RG_XAH_CTRL_0 (0x2c)
238 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
239 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
240 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
241 #define RG_CSMA_SEED_0 (0x2d)
242 #define SR_CSMA_SEED_0 0x2d, 0xff, 0
243 #define RG_CSMA_SEED_1 (0x2e)
244 #define SR_CSMA_SEED_1 0x2e, 0x07, 0
245 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
246 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4
247 #define SR_AACK_SET_PD 0x2e, 0x20, 5
248 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
249 #define RG_CSMA_BE (0x2f)
250 #define SR_MIN_BE 0x2f, 0x0f, 0
251 #define SR_MAX_BE 0x2f, 0xf0, 4
254 #define CMD_REG_MASK 0x3f
255 #define CMD_WRITE 0x40
258 #define IRQ_BAT_LOW (1 << 7)
259 #define IRQ_TRX_UR (1 << 6)
260 #define IRQ_AMI (1 << 5)
261 #define IRQ_CCA_ED (1 << 4)
262 #define IRQ_TRX_END (1 << 3)
263 #define IRQ_RX_START (1 << 2)
264 #define IRQ_PLL_UNL (1 << 1)
265 #define IRQ_PLL_LOCK (1 << 0)
267 #define IRQ_ACTIVE_HIGH 0
268 #define IRQ_ACTIVE_LOW 1
270 #define STATE_P_ON 0x00 /* BUSY */
271 #define STATE_BUSY_RX 0x01
272 #define STATE_BUSY_TX 0x02
273 #define STATE_FORCE_TRX_OFF 0x03
274 #define STATE_FORCE_TX_ON 0x04 /* IDLE */
275 /* 0x05 */ /* INVALID_PARAMETER */
276 #define STATE_RX_ON 0x06
277 /* 0x07 */ /* SUCCESS */
278 #define STATE_TRX_OFF 0x08
279 #define STATE_TX_ON 0x09
280 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
281 #define STATE_SLEEP 0x0F
282 #define STATE_PREP_DEEP_SLEEP 0x10
283 #define STATE_BUSY_RX_AACK 0x11
284 #define STATE_BUSY_TX_ARET 0x12
285 #define STATE_RX_AACK_ON 0x16
286 #define STATE_TX_ARET_ON 0x19
287 #define STATE_RX_ON_NOCLK 0x1C
288 #define STATE_RX_AACK_ON_NOCLK 0x1D
289 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
290 #define STATE_TRANSITION_IN_PROGRESS 0x1F
292 #define AT86RF2XX_NUMREGS 0x3F
295 at86rf230_async_state_change(struct at86rf230_local
*lp
,
296 struct at86rf230_state_change
*ctx
,
297 const u8 state
, void (*complete
)(void *context
),
298 const bool irq_enable
);
301 __at86rf230_write(struct at86rf230_local
*lp
,
302 unsigned int addr
, unsigned int data
)
304 return regmap_write(lp
->regmap
, addr
, data
);
308 __at86rf230_read(struct at86rf230_local
*lp
,
309 unsigned int addr
, unsigned int *data
)
311 return regmap_read(lp
->regmap
, addr
, data
);
315 at86rf230_read_subreg(struct at86rf230_local
*lp
,
316 unsigned int addr
, unsigned int mask
,
317 unsigned int shift
, unsigned int *data
)
321 rc
= __at86rf230_read(lp
, addr
, data
);
323 *data
= (*data
& mask
) >> shift
;
329 at86rf230_write_subreg(struct at86rf230_local
*lp
,
330 unsigned int addr
, unsigned int mask
,
331 unsigned int shift
, unsigned int data
)
333 return regmap_update_bits(lp
->regmap
, addr
, mask
, data
<< shift
);
337 at86rf230_reg_writeable(struct device
*dev
, unsigned int reg
)
344 case RG_PHY_ED_LEVEL
:
360 case RG_SHORT_ADDR_0
:
361 case RG_SHORT_ADDR_1
:
383 at86rf230_reg_readable(struct device
*dev
, unsigned int reg
)
387 /* all writeable are also readable */
388 rc
= at86rf230_reg_writeable(dev
, reg
);
408 at86rf230_reg_volatile(struct device
*dev
, unsigned int reg
)
410 /* can be changed during runtime */
415 case RG_PHY_ED_LEVEL
:
425 at86rf230_reg_precious(struct device
*dev
, unsigned int reg
)
427 /* don't clear irq line on read */
436 static const struct regmap_config at86rf230_regmap_spi_config
= {
439 .write_flag_mask
= CMD_REG
| CMD_WRITE
,
440 .read_flag_mask
= CMD_REG
,
441 .cache_type
= REGCACHE_RBTREE
,
442 .max_register
= AT86RF2XX_NUMREGS
,
443 .writeable_reg
= at86rf230_reg_writeable
,
444 .readable_reg
= at86rf230_reg_readable
,
445 .volatile_reg
= at86rf230_reg_volatile
,
446 .precious_reg
= at86rf230_reg_precious
,
450 at86rf230_async_error_recover(void *context
)
452 struct at86rf230_state_change
*ctx
= context
;
453 struct at86rf230_local
*lp
= ctx
->lp
;
455 at86rf230_async_state_change(lp
, ctx
, STATE_RX_AACK_ON
, NULL
, false);
456 ieee802154_wake_queue(lp
->hw
);
460 at86rf230_async_error(struct at86rf230_local
*lp
,
461 struct at86rf230_state_change
*ctx
, int rc
)
463 dev_err(&lp
->spi
->dev
, "spi_async error %d\n", rc
);
465 at86rf230_async_state_change(lp
, ctx
, STATE_FORCE_TRX_OFF
,
466 at86rf230_async_error_recover
, false);
469 /* Generic function to get some register value in async mode */
471 at86rf230_async_read_reg(struct at86rf230_local
*lp
, const u8 reg
,
472 struct at86rf230_state_change
*ctx
,
473 void (*complete
)(void *context
),
474 const bool irq_enable
)
478 u8
*tx_buf
= ctx
->buf
;
480 tx_buf
[0] = (reg
& CMD_REG_MASK
) | CMD_REG
;
482 ctx
->msg
.complete
= complete
;
483 ctx
->irq_enable
= irq_enable
;
484 rc
= spi_async(lp
->spi
, &ctx
->msg
);
487 enable_irq(ctx
->irq
);
489 at86rf230_async_error(lp
, ctx
, rc
);
494 at86rf230_async_state_assert(void *context
)
496 struct at86rf230_state_change
*ctx
= context
;
497 struct at86rf230_local
*lp
= ctx
->lp
;
498 const u8
*buf
= ctx
->buf
;
499 const u8 trx_state
= buf
[1] & 0x1f;
501 /* Assert state change */
502 if (trx_state
!= ctx
->to_state
) {
503 /* Special handling if transceiver state is in
504 * STATE_BUSY_RX_AACK and a SHR was detected.
506 if (trx_state
== STATE_BUSY_RX_AACK
) {
507 /* Undocumented race condition. If we send a state
508 * change to STATE_RX_AACK_ON the transceiver could
509 * change his state automatically to STATE_BUSY_RX_AACK
510 * if a SHR was detected. This is not an error, but we
513 if (ctx
->to_state
== STATE_RX_AACK_ON
)
516 /* If we change to STATE_TX_ON without forcing and
517 * transceiver state is STATE_BUSY_RX_AACK, we wait
518 * 'tFrame + tPAck' receiving time. In this time the
519 * PDU should be received. If the transceiver is still
520 * in STATE_BUSY_RX_AACK, we run a force state change
521 * to STATE_TX_ON. This is a timeout handling, if the
522 * transceiver stucks in STATE_BUSY_RX_AACK.
524 * Additional we do several retries to try to get into
525 * TX_ON state without forcing. If the retries are
526 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
527 * will do a force change.
529 if (ctx
->to_state
== STATE_TX_ON
) {
530 u8 state
= STATE_TX_ON
;
532 if (lp
->tx_retry
>= AT86RF2XX_MAX_TX_RETRIES
)
533 state
= STATE_FORCE_TX_ON
;
536 at86rf230_async_state_change(lp
, ctx
, state
,
543 dev_warn(&lp
->spi
->dev
, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
544 ctx
->from_state
, ctx
->to_state
, trx_state
);
549 ctx
->complete(context
);
552 /* Do state change timing delay. */
554 at86rf230_async_state_delay(void *context
)
556 struct at86rf230_state_change
*ctx
= context
;
557 struct at86rf230_local
*lp
= ctx
->lp
;
558 struct at86rf2xx_chip_data
*c
= lp
->data
;
561 /* The force state changes are will show as normal states in the
562 * state status subregister. We change the to_state to the
563 * corresponding one and remember if it was a force change, this
564 * differs if we do a state change from STATE_BUSY_RX_AACK.
566 switch (ctx
->to_state
) {
567 case STATE_FORCE_TX_ON
:
568 ctx
->to_state
= STATE_TX_ON
;
571 case STATE_FORCE_TRX_OFF
:
572 ctx
->to_state
= STATE_TRX_OFF
;
579 switch (ctx
->from_state
) {
581 switch (ctx
->to_state
) {
582 case STATE_RX_AACK_ON
:
583 usleep_range(c
->t_off_to_aack
, c
->t_off_to_aack
+ 10);
586 usleep_range(c
->t_off_to_tx_on
,
587 c
->t_off_to_tx_on
+ 10);
593 case STATE_BUSY_RX_AACK
:
594 switch (ctx
->to_state
) {
596 /* Wait for worst case receiving time if we
597 * didn't make a force change from BUSY_RX_AACK
601 usleep_range(c
->t_frame
+ c
->t_p_ack
,
602 c
->t_frame
+ c
->t_p_ack
+ 1000);
610 /* Default value, means RESET state */
612 switch (ctx
->to_state
) {
614 usleep_range(c
->t_reset_to_off
, c
->t_reset_to_off
+ 10);
624 /* Default delay is 1us in the most cases */
628 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
629 at86rf230_async_state_assert
,
634 at86rf230_async_state_change_start(void *context
)
636 struct at86rf230_state_change
*ctx
= context
;
637 struct at86rf230_local
*lp
= ctx
->lp
;
639 const u8 trx_state
= buf
[1] & 0x1f;
642 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
643 if (trx_state
== STATE_TRANSITION_IN_PROGRESS
) {
645 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
646 at86rf230_async_state_change_start
,
651 /* Check if we already are in the state which we change in */
652 if (trx_state
== ctx
->to_state
) {
654 ctx
->complete(context
);
658 /* Set current state to the context of state change */
659 ctx
->from_state
= trx_state
;
661 /* Going into the next step for a state change which do a timing
664 buf
[0] = (RG_TRX_STATE
& CMD_REG_MASK
) | CMD_REG
| CMD_WRITE
;
665 buf
[1] = ctx
->to_state
;
667 ctx
->msg
.complete
= at86rf230_async_state_delay
;
668 rc
= spi_async(lp
->spi
, &ctx
->msg
);
671 enable_irq(ctx
->irq
);
673 at86rf230_async_error(lp
, ctx
, rc
);
678 at86rf230_async_state_change(struct at86rf230_local
*lp
,
679 struct at86rf230_state_change
*ctx
,
680 const u8 state
, void (*complete
)(void *context
),
681 const bool irq_enable
)
683 /* Initialization for the state change context */
684 ctx
->to_state
= state
;
685 ctx
->complete
= complete
;
686 ctx
->irq_enable
= irq_enable
;
687 at86rf230_async_read_reg(lp
, RG_TRX_STATUS
, ctx
,
688 at86rf230_async_state_change_start
,
693 at86rf230_sync_state_change_complete(void *context
)
695 struct at86rf230_state_change
*ctx
= context
;
696 struct at86rf230_local
*lp
= ctx
->lp
;
698 complete(&lp
->state_complete
);
701 /* This function do a sync framework above the async state change.
702 * Some callbacks of the IEEE 802.15.4 driver interface need to be
703 * handled synchronously.
706 at86rf230_sync_state_change(struct at86rf230_local
*lp
, unsigned int state
)
710 at86rf230_async_state_change(lp
, &lp
->state
, state
,
711 at86rf230_sync_state_change_complete
,
714 rc
= wait_for_completion_timeout(&lp
->state_complete
,
715 msecs_to_jiffies(100));
717 at86rf230_async_error(lp
, &lp
->state
, -ETIMEDOUT
);
725 at86rf230_tx_complete(void *context
)
727 struct at86rf230_state_change
*ctx
= context
;
728 struct at86rf230_local
*lp
= ctx
->lp
;
730 enable_irq(ctx
->irq
);
732 ieee802154_xmit_complete(lp
->hw
, lp
->tx_skb
, !lp
->tx_aret
);
736 at86rf230_tx_on(void *context
)
738 struct at86rf230_state_change
*ctx
= context
;
739 struct at86rf230_local
*lp
= ctx
->lp
;
741 at86rf230_async_state_change(lp
, ctx
, STATE_RX_AACK_ON
,
742 at86rf230_tx_complete
, true);
746 at86rf230_tx_trac_error(void *context
)
748 struct at86rf230_state_change
*ctx
= context
;
749 struct at86rf230_local
*lp
= ctx
->lp
;
751 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ON
,
752 at86rf230_tx_on
, true);
756 at86rf230_tx_trac_check(void *context
)
758 struct at86rf230_state_change
*ctx
= context
;
759 struct at86rf230_local
*lp
= ctx
->lp
;
760 const u8
*buf
= ctx
->buf
;
761 const u8 trac
= (buf
[1] & 0xe0) >> 5;
763 /* If trac status is different than zero we need to do a state change
764 * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver
768 at86rf230_async_state_change(lp
, ctx
, STATE_FORCE_TRX_OFF
,
769 at86rf230_tx_trac_error
, true);
771 at86rf230_tx_on(context
);
775 at86rf230_tx_trac_status(void *context
)
777 struct at86rf230_state_change
*ctx
= context
;
778 struct at86rf230_local
*lp
= ctx
->lp
;
780 at86rf230_async_read_reg(lp
, RG_TRX_STATE
, ctx
,
781 at86rf230_tx_trac_check
, true);
785 at86rf230_rx_read_frame_complete(void *context
)
787 struct at86rf230_state_change
*ctx
= context
;
788 struct at86rf230_local
*lp
= ctx
->lp
;
789 u8 rx_local_buf
[AT86RF2XX_MAX_BUF
];
790 const u8
*buf
= ctx
->buf
;
795 if (!ieee802154_is_valid_psdu_len(len
)) {
796 dev_vdbg(&lp
->spi
->dev
, "corrupted frame received\n");
797 len
= IEEE802154_MTU
;
801 memcpy(rx_local_buf
, buf
+ 2, len
);
802 enable_irq(ctx
->irq
);
804 skb
= dev_alloc_skb(IEEE802154_MTU
);
806 dev_vdbg(&lp
->spi
->dev
, "failed to allocate sk_buff\n");
810 memcpy(skb_put(skb
, len
), rx_local_buf
, len
);
811 ieee802154_rx_irqsafe(lp
->hw
, skb
, lqi
);
815 at86rf230_rx_read_frame(void *context
)
817 struct at86rf230_state_change
*ctx
= context
;
818 struct at86rf230_local
*lp
= ctx
->lp
;
823 ctx
->trx
.len
= AT86RF2XX_MAX_BUF
;
824 ctx
->msg
.complete
= at86rf230_rx_read_frame_complete
;
825 rc
= spi_async(lp
->spi
, &ctx
->msg
);
827 enable_irq(ctx
->irq
);
828 at86rf230_async_error(lp
, ctx
, rc
);
833 at86rf230_rx_trac_check(void *context
)
835 /* Possible check on trac status here. This could be useful to make
836 * some stats why receive is failed. Not used at the moment, but it's
837 * maybe timing relevant. Datasheet doesn't say anything about this.
838 * The programming guide say do it so.
841 at86rf230_rx_read_frame(context
);
845 at86rf230_irq_trx_end(struct at86rf230_local
*lp
)
847 spin_lock(&lp
->lock
);
850 spin_unlock(&lp
->lock
);
853 at86rf230_async_state_change(lp
, &lp
->irq
,
855 at86rf230_tx_trac_status
,
858 at86rf230_async_state_change(lp
, &lp
->irq
,
860 at86rf230_tx_complete
,
863 spin_unlock(&lp
->lock
);
864 at86rf230_async_read_reg(lp
, RG_TRX_STATE
, &lp
->irq
,
865 at86rf230_rx_trac_check
, true);
870 at86rf230_irq_status(void *context
)
872 struct at86rf230_state_change
*ctx
= context
;
873 struct at86rf230_local
*lp
= ctx
->lp
;
874 const u8
*buf
= ctx
->buf
;
875 const u8 irq
= buf
[1];
877 if (irq
& IRQ_TRX_END
) {
878 at86rf230_irq_trx_end(lp
);
880 enable_irq(ctx
->irq
);
881 dev_err(&lp
->spi
->dev
, "not supported irq %02x received\n",
886 static irqreturn_t
at86rf230_isr(int irq
, void *data
)
888 struct at86rf230_local
*lp
= data
;
889 struct at86rf230_state_change
*ctx
= &lp
->irq
;
893 disable_irq_nosync(irq
);
895 buf
[0] = (RG_IRQ_STATUS
& CMD_REG_MASK
) | CMD_REG
;
897 ctx
->msg
.complete
= at86rf230_irq_status
;
898 rc
= spi_async(lp
->spi
, &ctx
->msg
);
901 at86rf230_async_error(lp
, ctx
, rc
);
909 at86rf230_write_frame_complete(void *context
)
911 struct at86rf230_state_change
*ctx
= context
;
912 struct at86rf230_local
*lp
= ctx
->lp
;
916 buf
[0] = (RG_TRX_STATE
& CMD_REG_MASK
) | CMD_REG
| CMD_WRITE
;
917 buf
[1] = STATE_BUSY_TX
;
919 ctx
->msg
.complete
= NULL
;
920 rc
= spi_async(lp
->spi
, &ctx
->msg
);
922 at86rf230_async_error(lp
, ctx
, rc
);
926 at86rf230_write_frame(void *context
)
928 struct at86rf230_state_change
*ctx
= context
;
929 struct at86rf230_local
*lp
= ctx
->lp
;
930 struct sk_buff
*skb
= lp
->tx_skb
;
934 spin_lock(&lp
->lock
);
936 spin_unlock(&lp
->lock
);
938 buf
[0] = CMD_FB
| CMD_WRITE
;
939 buf
[1] = skb
->len
+ 2;
940 memcpy(buf
+ 2, skb
->data
, skb
->len
);
941 ctx
->trx
.len
= skb
->len
+ 2;
942 ctx
->msg
.complete
= at86rf230_write_frame_complete
;
943 rc
= spi_async(lp
->spi
, &ctx
->msg
);
945 at86rf230_async_error(lp
, ctx
, rc
);
949 at86rf230_xmit_tx_on(void *context
)
951 struct at86rf230_state_change
*ctx
= context
;
952 struct at86rf230_local
*lp
= ctx
->lp
;
954 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ARET_ON
,
955 at86rf230_write_frame
, false);
959 at86rf230_xmit(struct ieee802154_hw
*hw
, struct sk_buff
*skb
)
961 struct at86rf230_local
*lp
= hw
->priv
;
962 struct at86rf230_state_change
*ctx
= &lp
->tx
;
964 void (*tx_complete
)(void *context
) = at86rf230_write_frame
;
968 /* In ARET mode we need to go into STATE_TX_ARET_ON after we
969 * are in STATE_TX_ON. The pfad differs here, so we change
970 * the complete handler.
973 tx_complete
= at86rf230_xmit_tx_on
;
976 at86rf230_async_state_change(lp
, ctx
, STATE_TX_ON
, tx_complete
, false);
982 at86rf230_ed(struct ieee802154_hw
*hw
, u8
*level
)
990 at86rf230_start(struct ieee802154_hw
*hw
)
992 return at86rf230_sync_state_change(hw
->priv
, STATE_RX_AACK_ON
);
996 at86rf230_stop(struct ieee802154_hw
*hw
)
998 at86rf230_sync_state_change(hw
->priv
, STATE_FORCE_TRX_OFF
);
1002 at86rf23x_set_channel(struct at86rf230_local
*lp
, u8 page
, u8 channel
)
1004 return at86rf230_write_subreg(lp
, SR_CHANNEL
, channel
);
1008 at86rf212_set_channel(struct at86rf230_local
*lp
, u8 page
, u8 channel
)
1013 rc
= at86rf230_write_subreg(lp
, SR_SUB_MODE
, 0);
1015 rc
= at86rf230_write_subreg(lp
, SR_SUB_MODE
, 1);
1020 rc
= at86rf230_write_subreg(lp
, SR_BPSK_QPSK
, 0);
1021 lp
->data
->rssi_base_val
= -100;
1023 rc
= at86rf230_write_subreg(lp
, SR_BPSK_QPSK
, 1);
1024 lp
->data
->rssi_base_val
= -98;
1029 /* This sets the symbol_duration according frequency on the 212.
1030 * TODO move this handling while set channel and page in cfg802154.
1031 * We can do that, this timings are according 802.15.4 standard.
1032 * If we do that in cfg802154, this is a more generic calculation.
1034 * This should also protected from ifs_timer. Means cancel timer and
1035 * init with a new value. For now, this is okay.
1039 /* SUB:0 and BPSK:0 -> BPSK-20 */
1040 lp
->hw
->phy
->symbol_duration
= 50;
1042 /* SUB:1 and BPSK:0 -> BPSK-40 */
1043 lp
->hw
->phy
->symbol_duration
= 25;
1047 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1048 lp
->hw
->phy
->symbol_duration
= 40;
1050 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1051 lp
->hw
->phy
->symbol_duration
= 16;
1054 lp
->hw
->phy
->lifs_period
= IEEE802154_LIFS_PERIOD
*
1055 lp
->hw
->phy
->symbol_duration
;
1056 lp
->hw
->phy
->sifs_period
= IEEE802154_SIFS_PERIOD
*
1057 lp
->hw
->phy
->symbol_duration
;
1059 return at86rf230_write_subreg(lp
, SR_CHANNEL
, channel
);
1063 at86rf230_channel(struct ieee802154_hw
*hw
, u8 page
, u8 channel
)
1065 struct at86rf230_local
*lp
= hw
->priv
;
1068 rc
= lp
->data
->set_channel(lp
, page
, channel
);
1070 usleep_range(lp
->data
->t_channel_switch
,
1071 lp
->data
->t_channel_switch
+ 10);
1076 at86rf230_set_hw_addr_filt(struct ieee802154_hw
*hw
,
1077 struct ieee802154_hw_addr_filt
*filt
,
1078 unsigned long changed
)
1080 struct at86rf230_local
*lp
= hw
->priv
;
1082 if (changed
& IEEE802154_AFILT_SADDR_CHANGED
) {
1083 u16 addr
= le16_to_cpu(filt
->short_addr
);
1085 dev_vdbg(&lp
->spi
->dev
,
1086 "at86rf230_set_hw_addr_filt called for saddr\n");
1087 __at86rf230_write(lp
, RG_SHORT_ADDR_0
, addr
);
1088 __at86rf230_write(lp
, RG_SHORT_ADDR_1
, addr
>> 8);
1091 if (changed
& IEEE802154_AFILT_PANID_CHANGED
) {
1092 u16 pan
= le16_to_cpu(filt
->pan_id
);
1094 dev_vdbg(&lp
->spi
->dev
,
1095 "at86rf230_set_hw_addr_filt called for pan id\n");
1096 __at86rf230_write(lp
, RG_PAN_ID_0
, pan
);
1097 __at86rf230_write(lp
, RG_PAN_ID_1
, pan
>> 8);
1100 if (changed
& IEEE802154_AFILT_IEEEADDR_CHANGED
) {
1103 memcpy(addr
, &filt
->ieee_addr
, 8);
1104 dev_vdbg(&lp
->spi
->dev
,
1105 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1106 for (i
= 0; i
< 8; i
++)
1107 __at86rf230_write(lp
, RG_IEEE_ADDR_0
+ i
, addr
[i
]);
1110 if (changed
& IEEE802154_AFILT_PANC_CHANGED
) {
1111 dev_vdbg(&lp
->spi
->dev
,
1112 "at86rf230_set_hw_addr_filt called for panc change\n");
1113 if (filt
->pan_coord
)
1114 at86rf230_write_subreg(lp
, SR_AACK_I_AM_COORD
, 1);
1116 at86rf230_write_subreg(lp
, SR_AACK_I_AM_COORD
, 0);
1123 at86rf230_set_txpower(struct ieee802154_hw
*hw
, int db
)
1125 struct at86rf230_local
*lp
= hw
->priv
;
1127 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1128 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1130 * thus, supported values for db range from -26 to 5, for 31dB of
1131 * reduction to 0dB of reduction.
1133 if (db
> 5 || db
< -26)
1138 return __at86rf230_write(lp
, RG_PHY_TX_PWR
, 0x60 | db
);
1142 at86rf230_set_lbt(struct ieee802154_hw
*hw
, bool on
)
1144 struct at86rf230_local
*lp
= hw
->priv
;
1146 return at86rf230_write_subreg(lp
, SR_CSMA_LBT_MODE
, on
);
1150 at86rf230_set_cca_mode(struct ieee802154_hw
*hw
,
1151 const struct wpan_phy_cca
*cca
)
1153 struct at86rf230_local
*lp
= hw
->priv
;
1156 /* mapping 802.15.4 to driver spec */
1157 switch (cca
->mode
) {
1158 case NL802154_CCA_ENERGY
:
1161 case NL802154_CCA_CARRIER
:
1164 case NL802154_CCA_ENERGY_CARRIER
:
1166 case NL802154_CCA_OPT_ENERGY_CARRIER_AND
:
1169 case NL802154_CCA_OPT_ENERGY_CARRIER_OR
:
1180 return at86rf230_write_subreg(lp
, SR_CCA_MODE
, val
);
1184 at86rf212_get_desens_steps(struct at86rf230_local
*lp
, s32 level
)
1186 return (level
- lp
->data
->rssi_base_val
) * 100 / 207;
1190 at86rf23x_get_desens_steps(struct at86rf230_local
*lp
, s32 level
)
1192 return (level
- lp
->data
->rssi_base_val
) / 2;
1196 at86rf230_set_cca_ed_level(struct ieee802154_hw
*hw
, s32 level
)
1198 struct at86rf230_local
*lp
= hw
->priv
;
1200 if (level
< lp
->data
->rssi_base_val
|| level
> 30)
1203 return at86rf230_write_subreg(lp
, SR_CCA_ED_THRES
,
1204 lp
->data
->get_desense_steps(lp
, level
));
1208 at86rf230_set_csma_params(struct ieee802154_hw
*hw
, u8 min_be
, u8 max_be
,
1211 struct at86rf230_local
*lp
= hw
->priv
;
1214 rc
= at86rf230_write_subreg(lp
, SR_MIN_BE
, min_be
);
1218 rc
= at86rf230_write_subreg(lp
, SR_MAX_BE
, max_be
);
1222 return at86rf230_write_subreg(lp
, SR_MAX_CSMA_RETRIES
, retries
);
1226 at86rf230_set_frame_retries(struct ieee802154_hw
*hw
, s8 retries
)
1228 struct at86rf230_local
*lp
= hw
->priv
;
1231 lp
->tx_aret
= retries
>= 0;
1232 lp
->max_frame_retries
= retries
;
1235 rc
= at86rf230_write_subreg(lp
, SR_MAX_FRAME_RETRIES
, retries
);
1241 at86rf230_set_promiscuous_mode(struct ieee802154_hw
*hw
, const bool on
)
1243 struct at86rf230_local
*lp
= hw
->priv
;
1247 rc
= at86rf230_write_subreg(lp
, SR_AACK_DIS_ACK
, 1);
1251 rc
= at86rf230_write_subreg(lp
, SR_AACK_PROM_MODE
, 1);
1255 rc
= at86rf230_write_subreg(lp
, SR_AACK_PROM_MODE
, 0);
1259 rc
= at86rf230_write_subreg(lp
, SR_AACK_DIS_ACK
, 0);
1267 static const struct ieee802154_ops at86rf230_ops
= {
1268 .owner
= THIS_MODULE
,
1269 .xmit_async
= at86rf230_xmit
,
1271 .set_channel
= at86rf230_channel
,
1272 .start
= at86rf230_start
,
1273 .stop
= at86rf230_stop
,
1274 .set_hw_addr_filt
= at86rf230_set_hw_addr_filt
,
1275 .set_txpower
= at86rf230_set_txpower
,
1276 .set_lbt
= at86rf230_set_lbt
,
1277 .set_cca_mode
= at86rf230_set_cca_mode
,
1278 .set_cca_ed_level
= at86rf230_set_cca_ed_level
,
1279 .set_csma_params
= at86rf230_set_csma_params
,
1280 .set_frame_retries
= at86rf230_set_frame_retries
,
1281 .set_promiscuous_mode
= at86rf230_set_promiscuous_mode
,
1284 static struct at86rf2xx_chip_data at86rf233_data
= {
1285 .t_sleep_cycle
= 330,
1286 .t_channel_switch
= 11,
1287 .t_reset_to_off
= 26,
1288 .t_off_to_aack
= 80,
1289 .t_off_to_tx_on
= 80,
1292 .rssi_base_val
= -91,
1293 .set_channel
= at86rf23x_set_channel
,
1294 .get_desense_steps
= at86rf23x_get_desens_steps
1297 static struct at86rf2xx_chip_data at86rf231_data
= {
1298 .t_sleep_cycle
= 330,
1299 .t_channel_switch
= 24,
1300 .t_reset_to_off
= 37,
1301 .t_off_to_aack
= 110,
1302 .t_off_to_tx_on
= 110,
1305 .rssi_base_val
= -91,
1306 .set_channel
= at86rf23x_set_channel
,
1307 .get_desense_steps
= at86rf23x_get_desens_steps
1310 static struct at86rf2xx_chip_data at86rf212_data
= {
1311 .t_sleep_cycle
= 330,
1312 .t_channel_switch
= 11,
1313 .t_reset_to_off
= 26,
1314 .t_off_to_aack
= 200,
1315 .t_off_to_tx_on
= 200,
1318 .rssi_base_val
= -100,
1319 .set_channel
= at86rf212_set_channel
,
1320 .get_desense_steps
= at86rf212_get_desens_steps
1323 static int at86rf230_hw_init(struct at86rf230_local
*lp
, u8 xtal_trim
)
1325 int rc
, irq_type
, irq_pol
= IRQ_ACTIVE_HIGH
;
1329 rc
= at86rf230_sync_state_change(lp
, STATE_FORCE_TRX_OFF
);
1333 irq_type
= irq_get_trigger_type(lp
->spi
->irq
);
1334 if (irq_type
== IRQ_TYPE_EDGE_RISING
||
1335 irq_type
== IRQ_TYPE_EDGE_FALLING
)
1336 dev_warn(&lp
->spi
->dev
,
1337 "Using edge triggered irq's are not recommended!\n");
1338 if (irq_type
== IRQ_TYPE_EDGE_FALLING
||
1339 irq_type
== IRQ_TYPE_LEVEL_LOW
)
1340 irq_pol
= IRQ_ACTIVE_LOW
;
1342 rc
= at86rf230_write_subreg(lp
, SR_IRQ_POLARITY
, irq_pol
);
1346 rc
= at86rf230_write_subreg(lp
, SR_RX_SAFE_MODE
, 1);
1350 rc
= at86rf230_write_subreg(lp
, SR_IRQ_MASK
, IRQ_TRX_END
);
1354 /* reset values differs in at86rf231 and at86rf233 */
1355 rc
= at86rf230_write_subreg(lp
, SR_IRQ_MASK_MODE
, 0);
1359 get_random_bytes(csma_seed
, ARRAY_SIZE(csma_seed
));
1360 rc
= at86rf230_write_subreg(lp
, SR_CSMA_SEED_0
, csma_seed
[0]);
1363 rc
= at86rf230_write_subreg(lp
, SR_CSMA_SEED_1
, csma_seed
[1]);
1367 /* CLKM changes are applied immediately */
1368 rc
= at86rf230_write_subreg(lp
, SR_CLKM_SHA_SEL
, 0x00);
1373 rc
= at86rf230_write_subreg(lp
, SR_CLKM_CTRL
, 0x00);
1376 /* Wait the next SLEEP cycle */
1377 usleep_range(lp
->data
->t_sleep_cycle
,
1378 lp
->data
->t_sleep_cycle
+ 100);
1380 /* xtal_trim value is calculated by:
1381 * CL = 0.5 * (CX + CTRIM + CPAR)
1384 * CL = capacitor of used crystal
1385 * CX = connected capacitors at xtal pins
1386 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1387 * but this is different on each board setup. You need to fine
1388 * tuning this value via CTRIM.
1389 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1393 * atben transceiver:
1397 * CPAR = 3 pF (We assume the magic constant from datasheet)
1400 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1404 * openlabs transceiver:
1408 * CPAR = 3 pF (We assume the magic constant from datasheet)
1411 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1415 rc
= at86rf230_write_subreg(lp
, SR_XTAL_TRIM
, xtal_trim
);
1419 rc
= at86rf230_read_subreg(lp
, SR_DVDD_OK
, &dvdd
);
1423 dev_err(&lp
->spi
->dev
, "DVDD error\n");
1427 /* Force setting slotted operation bit to 0. Sometimes the atben
1428 * sets this bit and I don't know why. We set this always force
1429 * to zero while probing.
1431 return at86rf230_write_subreg(lp
, SR_SLOTTED_OPERATION
, 0);
1435 at86rf230_get_pdata(struct spi_device
*spi
, int *rstn
, int *slp_tr
,
1438 struct at86rf230_platform_data
*pdata
= spi
->dev
.platform_data
;
1441 if (!IS_ENABLED(CONFIG_OF
) || !spi
->dev
.of_node
) {
1445 *rstn
= pdata
->rstn
;
1446 *slp_tr
= pdata
->slp_tr
;
1447 *xtal_trim
= pdata
->xtal_trim
;
1451 *rstn
= of_get_named_gpio(spi
->dev
.of_node
, "reset-gpio", 0);
1452 *slp_tr
= of_get_named_gpio(spi
->dev
.of_node
, "sleep-gpio", 0);
1453 ret
= of_property_read_u8(spi
->dev
.of_node
, "xtal-trim", xtal_trim
);
1454 if (ret
< 0 && ret
!= -EINVAL
)
1461 at86rf230_detect_device(struct at86rf230_local
*lp
)
1463 unsigned int part
, version
, val
;
1468 rc
= __at86rf230_read(lp
, RG_MAN_ID_0
, &val
);
1473 rc
= __at86rf230_read(lp
, RG_MAN_ID_1
, &val
);
1476 man_id
|= (val
<< 8);
1478 rc
= __at86rf230_read(lp
, RG_PART_NUM
, &part
);
1482 rc
= __at86rf230_read(lp
, RG_VERSION_NUM
, &version
);
1486 if (man_id
!= 0x001f) {
1487 dev_err(&lp
->spi
->dev
, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1488 man_id
>> 8, man_id
& 0xFF);
1492 lp
->hw
->flags
= IEEE802154_HW_TX_OMIT_CKSUM
| IEEE802154_HW_AACK
|
1493 IEEE802154_HW_TXPOWER
| IEEE802154_HW_ARET
|
1494 IEEE802154_HW_AFILT
| IEEE802154_HW_PROMISCUOUS
;
1496 lp
->hw
->phy
->cca
.mode
= NL802154_CCA_ENERGY
;
1505 lp
->data
= &at86rf231_data
;
1506 lp
->hw
->phy
->channels_supported
[0] = 0x7FFF800;
1507 lp
->hw
->phy
->current_channel
= 11;
1508 lp
->hw
->phy
->symbol_duration
= 16;
1512 lp
->data
= &at86rf212_data
;
1513 lp
->hw
->flags
|= IEEE802154_HW_LBT
;
1514 lp
->hw
->phy
->channels_supported
[0] = 0x00007FF;
1515 lp
->hw
->phy
->channels_supported
[2] = 0x00007FF;
1516 lp
->hw
->phy
->current_channel
= 5;
1517 lp
->hw
->phy
->symbol_duration
= 25;
1521 lp
->data
= &at86rf233_data
;
1522 lp
->hw
->phy
->channels_supported
[0] = 0x7FFF800;
1523 lp
->hw
->phy
->current_channel
= 13;
1524 lp
->hw
->phy
->symbol_duration
= 16;
1532 dev_info(&lp
->spi
->dev
, "Detected %s chip version %d\n", chip
, version
);
1538 at86rf230_setup_spi_messages(struct at86rf230_local
*lp
)
1541 lp
->state
.irq
= lp
->spi
->irq
;
1542 spi_message_init(&lp
->state
.msg
);
1543 lp
->state
.msg
.context
= &lp
->state
;
1544 lp
->state
.trx
.tx_buf
= lp
->state
.buf
;
1545 lp
->state
.trx
.rx_buf
= lp
->state
.buf
;
1546 spi_message_add_tail(&lp
->state
.trx
, &lp
->state
.msg
);
1549 lp
->irq
.irq
= lp
->spi
->irq
;
1550 spi_message_init(&lp
->irq
.msg
);
1551 lp
->irq
.msg
.context
= &lp
->irq
;
1552 lp
->irq
.trx
.tx_buf
= lp
->irq
.buf
;
1553 lp
->irq
.trx
.rx_buf
= lp
->irq
.buf
;
1554 spi_message_add_tail(&lp
->irq
.trx
, &lp
->irq
.msg
);
1557 lp
->tx
.irq
= lp
->spi
->irq
;
1558 spi_message_init(&lp
->tx
.msg
);
1559 lp
->tx
.msg
.context
= &lp
->tx
;
1560 lp
->tx
.trx
.tx_buf
= lp
->tx
.buf
;
1561 lp
->tx
.trx
.rx_buf
= lp
->tx
.buf
;
1562 spi_message_add_tail(&lp
->tx
.trx
, &lp
->tx
.msg
);
1565 static int at86rf230_probe(struct spi_device
*spi
)
1567 struct ieee802154_hw
*hw
;
1568 struct at86rf230_local
*lp
;
1569 unsigned int status
;
1570 int rc
, irq_type
, rstn
, slp_tr
;
1574 dev_err(&spi
->dev
, "no IRQ specified\n");
1578 rc
= at86rf230_get_pdata(spi
, &rstn
, &slp_tr
, &xtal_trim
);
1580 dev_err(&spi
->dev
, "failed to parse platform_data: %d\n", rc
);
1584 if (gpio_is_valid(rstn
)) {
1585 rc
= devm_gpio_request_one(&spi
->dev
, rstn
,
1586 GPIOF_OUT_INIT_HIGH
, "rstn");
1591 if (gpio_is_valid(slp_tr
)) {
1592 rc
= devm_gpio_request_one(&spi
->dev
, slp_tr
,
1593 GPIOF_OUT_INIT_LOW
, "slp_tr");
1599 if (gpio_is_valid(rstn
)) {
1601 gpio_set_value(rstn
, 0);
1603 gpio_set_value(rstn
, 1);
1604 usleep_range(120, 240);
1607 hw
= ieee802154_alloc_hw(sizeof(*lp
), &at86rf230_ops
);
1614 hw
->parent
= &spi
->dev
;
1615 hw
->vif_data_size
= sizeof(*lp
);
1616 ieee802154_random_extended_addr(&hw
->phy
->perm_extended_addr
);
1618 lp
->regmap
= devm_regmap_init_spi(spi
, &at86rf230_regmap_spi_config
);
1619 if (IS_ERR(lp
->regmap
)) {
1620 rc
= PTR_ERR(lp
->regmap
);
1621 dev_err(&spi
->dev
, "Failed to allocate register map: %d\n",
1626 at86rf230_setup_spi_messages(lp
);
1628 rc
= at86rf230_detect_device(lp
);
1632 spin_lock_init(&lp
->lock
);
1633 init_completion(&lp
->state_complete
);
1635 spi_set_drvdata(spi
, lp
);
1637 rc
= at86rf230_hw_init(lp
, xtal_trim
);
1641 /* Read irq status register to reset irq line */
1642 rc
= at86rf230_read_subreg(lp
, RG_IRQ_STATUS
, 0xff, 0, &status
);
1646 irq_type
= irq_get_trigger_type(spi
->irq
);
1648 irq_type
= IRQF_TRIGGER_RISING
;
1650 rc
= devm_request_irq(&spi
->dev
, spi
->irq
, at86rf230_isr
,
1651 IRQF_SHARED
| irq_type
, dev_name(&spi
->dev
), lp
);
1655 rc
= ieee802154_register_hw(lp
->hw
);
1662 ieee802154_free_hw(lp
->hw
);
1667 static int at86rf230_remove(struct spi_device
*spi
)
1669 struct at86rf230_local
*lp
= spi_get_drvdata(spi
);
1671 /* mask all at86rf230 irq's */
1672 at86rf230_write_subreg(lp
, SR_IRQ_MASK
, 0);
1673 ieee802154_unregister_hw(lp
->hw
);
1674 ieee802154_free_hw(lp
->hw
);
1675 dev_dbg(&spi
->dev
, "unregistered at86rf230\n");
1680 static const struct of_device_id at86rf230_of_match
[] = {
1681 { .compatible
= "atmel,at86rf230", },
1682 { .compatible
= "atmel,at86rf231", },
1683 { .compatible
= "atmel,at86rf233", },
1684 { .compatible
= "atmel,at86rf212", },
1687 MODULE_DEVICE_TABLE(of
, at86rf230_of_match
);
1689 static const struct spi_device_id at86rf230_device_id
[] = {
1690 { .name
= "at86rf230", },
1691 { .name
= "at86rf231", },
1692 { .name
= "at86rf233", },
1693 { .name
= "at86rf212", },
1696 MODULE_DEVICE_TABLE(spi
, at86rf230_device_id
);
1698 static struct spi_driver at86rf230_driver
= {
1699 .id_table
= at86rf230_device_id
,
1701 .of_match_table
= of_match_ptr(at86rf230_of_match
),
1702 .name
= "at86rf230",
1703 .owner
= THIS_MODULE
,
1705 .probe
= at86rf230_probe
,
1706 .remove
= at86rf230_remove
,
1709 module_spi_driver(at86rf230_driver
);
1711 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1712 MODULE_LICENSE("GPL v2");