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Merge tag 'efi-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/mfleming...
[deliverable/linux.git] / drivers / net / ieee802154 / at86rf230.c
1 /*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * Written by:
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 * Alexander Aring <aar@pengutronix.de>
19 */
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/gpio.h>
25 #include <linux/delay.h>
26 #include <linux/spinlock.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/at86rf230.h>
29 #include <linux/regmap.h>
30 #include <linux/skbuff.h>
31 #include <linux/of_gpio.h>
32 #include <linux/ieee802154.h>
33
34 #include <net/mac802154.h>
35 #include <net/cfg802154.h>
36
37 struct at86rf230_local;
38 /* at86rf2xx chip depend data.
39 * All timings are in us.
40 */
41 struct at86rf2xx_chip_data {
42 u16 t_sleep_cycle;
43 u16 t_channel_switch;
44 u16 t_reset_to_off;
45 u16 t_off_to_aack;
46 u16 t_off_to_tx_on;
47 u16 t_frame;
48 u16 t_p_ack;
49 /* completion timeout for tx in msecs */
50 u16 t_tx_timeout;
51 int rssi_base_val;
52
53 int (*set_channel)(struct at86rf230_local *, u8, u8);
54 int (*get_desense_steps)(struct at86rf230_local *, s32);
55 };
56
57 #define AT86RF2XX_MAX_BUF (127 + 3)
58
59 struct at86rf230_state_change {
60 struct at86rf230_local *lp;
61
62 struct spi_message msg;
63 struct spi_transfer trx;
64 u8 buf[AT86RF2XX_MAX_BUF];
65
66 void (*complete)(void *context);
67 u8 from_state;
68 u8 to_state;
69
70 bool irq_enable;
71 };
72
73 struct at86rf230_local {
74 struct spi_device *spi;
75
76 struct ieee802154_hw *hw;
77 struct at86rf2xx_chip_data *data;
78 struct regmap *regmap;
79
80 struct completion state_complete;
81 struct at86rf230_state_change state;
82
83 struct at86rf230_state_change irq;
84
85 bool tx_aret;
86 s8 max_frame_retries;
87 bool is_tx;
88 /* spinlock for is_tx protection */
89 spinlock_t lock;
90 struct sk_buff *tx_skb;
91 struct at86rf230_state_change tx;
92 };
93
94 #define RG_TRX_STATUS (0x01)
95 #define SR_TRX_STATUS 0x01, 0x1f, 0
96 #define SR_RESERVED_01_3 0x01, 0x20, 5
97 #define SR_CCA_STATUS 0x01, 0x40, 6
98 #define SR_CCA_DONE 0x01, 0x80, 7
99 #define RG_TRX_STATE (0x02)
100 #define SR_TRX_CMD 0x02, 0x1f, 0
101 #define SR_TRAC_STATUS 0x02, 0xe0, 5
102 #define RG_TRX_CTRL_0 (0x03)
103 #define SR_CLKM_CTRL 0x03, 0x07, 0
104 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3
105 #define SR_PAD_IO_CLKM 0x03, 0x30, 4
106 #define SR_PAD_IO 0x03, 0xc0, 6
107 #define RG_TRX_CTRL_1 (0x04)
108 #define SR_IRQ_POLARITY 0x04, 0x01, 0
109 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1
110 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2
111 #define SR_RX_BL_CTRL 0x04, 0x10, 4
112 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
113 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
114 #define SR_PA_EXT_EN 0x04, 0x80, 7
115 #define RG_PHY_TX_PWR (0x05)
116 #define SR_TX_PWR 0x05, 0x0f, 0
117 #define SR_PA_LT 0x05, 0x30, 4
118 #define SR_PA_BUF_LT 0x05, 0xc0, 6
119 #define RG_PHY_RSSI (0x06)
120 #define SR_RSSI 0x06, 0x1f, 0
121 #define SR_RND_VALUE 0x06, 0x60, 5
122 #define SR_RX_CRC_VALID 0x06, 0x80, 7
123 #define RG_PHY_ED_LEVEL (0x07)
124 #define SR_ED_LEVEL 0x07, 0xff, 0
125 #define RG_PHY_CC_CCA (0x08)
126 #define SR_CHANNEL 0x08, 0x1f, 0
127 #define SR_CCA_MODE 0x08, 0x60, 5
128 #define SR_CCA_REQUEST 0x08, 0x80, 7
129 #define RG_CCA_THRES (0x09)
130 #define SR_CCA_ED_THRES 0x09, 0x0f, 0
131 #define SR_RESERVED_09_1 0x09, 0xf0, 4
132 #define RG_RX_CTRL (0x0a)
133 #define SR_PDT_THRES 0x0a, 0x0f, 0
134 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4
135 #define RG_SFD_VALUE (0x0b)
136 #define SR_SFD_VALUE 0x0b, 0xff, 0
137 #define RG_TRX_CTRL_2 (0x0c)
138 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
139 #define SR_SUB_MODE 0x0c, 0x04, 2
140 #define SR_BPSK_QPSK 0x0c, 0x08, 3
141 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
142 #define SR_RESERVED_0c_5 0x0c, 0x60, 5
143 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7
144 #define RG_ANT_DIV (0x0d)
145 #define SR_ANT_CTRL 0x0d, 0x03, 0
146 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
147 #define SR_ANT_DIV_EN 0x0d, 0x08, 3
148 #define SR_RESERVED_0d_2 0x0d, 0x70, 4
149 #define SR_ANT_SEL 0x0d, 0x80, 7
150 #define RG_IRQ_MASK (0x0e)
151 #define SR_IRQ_MASK 0x0e, 0xff, 0
152 #define RG_IRQ_STATUS (0x0f)
153 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
154 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
155 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2
156 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
157 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
158 #define SR_IRQ_5_AMI 0x0f, 0x20, 5
159 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
160 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
161 #define RG_VREG_CTRL (0x10)
162 #define SR_RESERVED_10_6 0x10, 0x03, 0
163 #define SR_DVDD_OK 0x10, 0x04, 2
164 #define SR_DVREG_EXT 0x10, 0x08, 3
165 #define SR_RESERVED_10_3 0x10, 0x30, 4
166 #define SR_AVDD_OK 0x10, 0x40, 6
167 #define SR_AVREG_EXT 0x10, 0x80, 7
168 #define RG_BATMON (0x11)
169 #define SR_BATMON_VTH 0x11, 0x0f, 0
170 #define SR_BATMON_HR 0x11, 0x10, 4
171 #define SR_BATMON_OK 0x11, 0x20, 5
172 #define SR_RESERVED_11_1 0x11, 0xc0, 6
173 #define RG_XOSC_CTRL (0x12)
174 #define SR_XTAL_TRIM 0x12, 0x0f, 0
175 #define SR_XTAL_MODE 0x12, 0xf0, 4
176 #define RG_RX_SYN (0x15)
177 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
178 #define SR_RESERVED_15_2 0x15, 0x70, 4
179 #define SR_RX_PDT_DIS 0x15, 0x80, 7
180 #define RG_XAH_CTRL_1 (0x17)
181 #define SR_RESERVED_17_8 0x17, 0x01, 0
182 #define SR_AACK_PROM_MODE 0x17, 0x02, 1
183 #define SR_AACK_ACK_TIME 0x17, 0x04, 2
184 #define SR_RESERVED_17_5 0x17, 0x08, 3
185 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
186 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
187 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6
188 #define SR_RESERVED_17_1 0x17, 0x80, 7
189 #define RG_FTN_CTRL (0x18)
190 #define SR_RESERVED_18_2 0x18, 0x7f, 0
191 #define SR_FTN_START 0x18, 0x80, 7
192 #define RG_PLL_CF (0x1a)
193 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0
194 #define SR_PLL_CF_START 0x1a, 0x80, 7
195 #define RG_PLL_DCU (0x1b)
196 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0
197 #define SR_RESERVED_1b_2 0x1b, 0x40, 6
198 #define SR_PLL_DCU_START 0x1b, 0x80, 7
199 #define RG_PART_NUM (0x1c)
200 #define SR_PART_NUM 0x1c, 0xff, 0
201 #define RG_VERSION_NUM (0x1d)
202 #define SR_VERSION_NUM 0x1d, 0xff, 0
203 #define RG_MAN_ID_0 (0x1e)
204 #define SR_MAN_ID_0 0x1e, 0xff, 0
205 #define RG_MAN_ID_1 (0x1f)
206 #define SR_MAN_ID_1 0x1f, 0xff, 0
207 #define RG_SHORT_ADDR_0 (0x20)
208 #define SR_SHORT_ADDR_0 0x20, 0xff, 0
209 #define RG_SHORT_ADDR_1 (0x21)
210 #define SR_SHORT_ADDR_1 0x21, 0xff, 0
211 #define RG_PAN_ID_0 (0x22)
212 #define SR_PAN_ID_0 0x22, 0xff, 0
213 #define RG_PAN_ID_1 (0x23)
214 #define SR_PAN_ID_1 0x23, 0xff, 0
215 #define RG_IEEE_ADDR_0 (0x24)
216 #define SR_IEEE_ADDR_0 0x24, 0xff, 0
217 #define RG_IEEE_ADDR_1 (0x25)
218 #define SR_IEEE_ADDR_1 0x25, 0xff, 0
219 #define RG_IEEE_ADDR_2 (0x26)
220 #define SR_IEEE_ADDR_2 0x26, 0xff, 0
221 #define RG_IEEE_ADDR_3 (0x27)
222 #define SR_IEEE_ADDR_3 0x27, 0xff, 0
223 #define RG_IEEE_ADDR_4 (0x28)
224 #define SR_IEEE_ADDR_4 0x28, 0xff, 0
225 #define RG_IEEE_ADDR_5 (0x29)
226 #define SR_IEEE_ADDR_5 0x29, 0xff, 0
227 #define RG_IEEE_ADDR_6 (0x2a)
228 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0
229 #define RG_IEEE_ADDR_7 (0x2b)
230 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0
231 #define RG_XAH_CTRL_0 (0x2c)
232 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
233 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
234 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
235 #define RG_CSMA_SEED_0 (0x2d)
236 #define SR_CSMA_SEED_0 0x2d, 0xff, 0
237 #define RG_CSMA_SEED_1 (0x2e)
238 #define SR_CSMA_SEED_1 0x2e, 0x07, 0
239 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
240 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4
241 #define SR_AACK_SET_PD 0x2e, 0x20, 5
242 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
243 #define RG_CSMA_BE (0x2f)
244 #define SR_MIN_BE 0x2f, 0x0f, 0
245 #define SR_MAX_BE 0x2f, 0xf0, 4
246
247 #define CMD_REG 0x80
248 #define CMD_REG_MASK 0x3f
249 #define CMD_WRITE 0x40
250 #define CMD_FB 0x20
251
252 #define IRQ_BAT_LOW (1 << 7)
253 #define IRQ_TRX_UR (1 << 6)
254 #define IRQ_AMI (1 << 5)
255 #define IRQ_CCA_ED (1 << 4)
256 #define IRQ_TRX_END (1 << 3)
257 #define IRQ_RX_START (1 << 2)
258 #define IRQ_PLL_UNL (1 << 1)
259 #define IRQ_PLL_LOCK (1 << 0)
260
261 #define IRQ_ACTIVE_HIGH 0
262 #define IRQ_ACTIVE_LOW 1
263
264 #define STATE_P_ON 0x00 /* BUSY */
265 #define STATE_BUSY_RX 0x01
266 #define STATE_BUSY_TX 0x02
267 #define STATE_FORCE_TRX_OFF 0x03
268 #define STATE_FORCE_TX_ON 0x04 /* IDLE */
269 /* 0x05 */ /* INVALID_PARAMETER */
270 #define STATE_RX_ON 0x06
271 /* 0x07 */ /* SUCCESS */
272 #define STATE_TRX_OFF 0x08
273 #define STATE_TX_ON 0x09
274 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
275 #define STATE_SLEEP 0x0F
276 #define STATE_PREP_DEEP_SLEEP 0x10
277 #define STATE_BUSY_RX_AACK 0x11
278 #define STATE_BUSY_TX_ARET 0x12
279 #define STATE_RX_AACK_ON 0x16
280 #define STATE_TX_ARET_ON 0x19
281 #define STATE_RX_ON_NOCLK 0x1C
282 #define STATE_RX_AACK_ON_NOCLK 0x1D
283 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
284 #define STATE_TRANSITION_IN_PROGRESS 0x1F
285
286 #define AT86RF2XX_NUMREGS 0x3F
287
288 static void
289 at86rf230_async_state_change(struct at86rf230_local *lp,
290 struct at86rf230_state_change *ctx,
291 const u8 state, void (*complete)(void *context),
292 const bool irq_enable);
293
294 static inline int
295 __at86rf230_write(struct at86rf230_local *lp,
296 unsigned int addr, unsigned int data)
297 {
298 return regmap_write(lp->regmap, addr, data);
299 }
300
301 static inline int
302 __at86rf230_read(struct at86rf230_local *lp,
303 unsigned int addr, unsigned int *data)
304 {
305 return regmap_read(lp->regmap, addr, data);
306 }
307
308 static inline int
309 at86rf230_read_subreg(struct at86rf230_local *lp,
310 unsigned int addr, unsigned int mask,
311 unsigned int shift, unsigned int *data)
312 {
313 int rc;
314
315 rc = __at86rf230_read(lp, addr, data);
316 if (rc > 0)
317 *data = (*data & mask) >> shift;
318
319 return rc;
320 }
321
322 static inline int
323 at86rf230_write_subreg(struct at86rf230_local *lp,
324 unsigned int addr, unsigned int mask,
325 unsigned int shift, unsigned int data)
326 {
327 return regmap_update_bits(lp->regmap, addr, mask, data << shift);
328 }
329
330 static bool
331 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
332 {
333 switch (reg) {
334 case RG_TRX_STATE:
335 case RG_TRX_CTRL_0:
336 case RG_TRX_CTRL_1:
337 case RG_PHY_TX_PWR:
338 case RG_PHY_ED_LEVEL:
339 case RG_PHY_CC_CCA:
340 case RG_CCA_THRES:
341 case RG_RX_CTRL:
342 case RG_SFD_VALUE:
343 case RG_TRX_CTRL_2:
344 case RG_ANT_DIV:
345 case RG_IRQ_MASK:
346 case RG_VREG_CTRL:
347 case RG_BATMON:
348 case RG_XOSC_CTRL:
349 case RG_RX_SYN:
350 case RG_XAH_CTRL_1:
351 case RG_FTN_CTRL:
352 case RG_PLL_CF:
353 case RG_PLL_DCU:
354 case RG_SHORT_ADDR_0:
355 case RG_SHORT_ADDR_1:
356 case RG_PAN_ID_0:
357 case RG_PAN_ID_1:
358 case RG_IEEE_ADDR_0:
359 case RG_IEEE_ADDR_1:
360 case RG_IEEE_ADDR_2:
361 case RG_IEEE_ADDR_3:
362 case RG_IEEE_ADDR_4:
363 case RG_IEEE_ADDR_5:
364 case RG_IEEE_ADDR_6:
365 case RG_IEEE_ADDR_7:
366 case RG_XAH_CTRL_0:
367 case RG_CSMA_SEED_0:
368 case RG_CSMA_SEED_1:
369 case RG_CSMA_BE:
370 return true;
371 default:
372 return false;
373 }
374 }
375
376 static bool
377 at86rf230_reg_readable(struct device *dev, unsigned int reg)
378 {
379 bool rc;
380
381 /* all writeable are also readable */
382 rc = at86rf230_reg_writeable(dev, reg);
383 if (rc)
384 return rc;
385
386 /* readonly regs */
387 switch (reg) {
388 case RG_TRX_STATUS:
389 case RG_PHY_RSSI:
390 case RG_IRQ_STATUS:
391 case RG_PART_NUM:
392 case RG_VERSION_NUM:
393 case RG_MAN_ID_1:
394 case RG_MAN_ID_0:
395 return true;
396 default:
397 return false;
398 }
399 }
400
401 static bool
402 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
403 {
404 /* can be changed during runtime */
405 switch (reg) {
406 case RG_TRX_STATUS:
407 case RG_TRX_STATE:
408 case RG_PHY_RSSI:
409 case RG_PHY_ED_LEVEL:
410 case RG_IRQ_STATUS:
411 case RG_VREG_CTRL:
412 return true;
413 default:
414 return false;
415 }
416 }
417
418 static bool
419 at86rf230_reg_precious(struct device *dev, unsigned int reg)
420 {
421 /* don't clear irq line on read */
422 switch (reg) {
423 case RG_IRQ_STATUS:
424 return true;
425 default:
426 return false;
427 }
428 }
429
430 static const struct regmap_config at86rf230_regmap_spi_config = {
431 .reg_bits = 8,
432 .val_bits = 8,
433 .write_flag_mask = CMD_REG | CMD_WRITE,
434 .read_flag_mask = CMD_REG,
435 .cache_type = REGCACHE_RBTREE,
436 .max_register = AT86RF2XX_NUMREGS,
437 .writeable_reg = at86rf230_reg_writeable,
438 .readable_reg = at86rf230_reg_readable,
439 .volatile_reg = at86rf230_reg_volatile,
440 .precious_reg = at86rf230_reg_precious,
441 };
442
443 static void
444 at86rf230_async_error_recover(void *context)
445 {
446 struct at86rf230_state_change *ctx = context;
447 struct at86rf230_local *lp = ctx->lp;
448
449 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
450 ieee802154_wake_queue(lp->hw);
451 }
452
453 static inline void
454 at86rf230_async_error(struct at86rf230_local *lp,
455 struct at86rf230_state_change *ctx, int rc)
456 {
457 dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
458
459 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
460 at86rf230_async_error_recover, false);
461 }
462
463 /* Generic function to get some register value in async mode */
464 static void
465 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
466 struct at86rf230_state_change *ctx,
467 void (*complete)(void *context),
468 const bool irq_enable)
469 {
470 int rc;
471
472 u8 *tx_buf = ctx->buf;
473
474 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
475 ctx->trx.len = 2;
476 ctx->msg.complete = complete;
477 ctx->irq_enable = irq_enable;
478 rc = spi_async(lp->spi, &ctx->msg);
479 if (rc) {
480 if (irq_enable)
481 enable_irq(lp->spi->irq);
482
483 at86rf230_async_error(lp, ctx, rc);
484 }
485 }
486
487 static void
488 at86rf230_async_state_assert(void *context)
489 {
490 struct at86rf230_state_change *ctx = context;
491 struct at86rf230_local *lp = ctx->lp;
492 const u8 *buf = ctx->buf;
493 const u8 trx_state = buf[1] & 0x1f;
494
495 /* Assert state change */
496 if (trx_state != ctx->to_state) {
497 /* Special handling if transceiver state is in
498 * STATE_BUSY_RX_AACK and a SHR was detected.
499 */
500 if (trx_state == STATE_BUSY_RX_AACK) {
501 /* Undocumented race condition. If we send a state
502 * change to STATE_RX_AACK_ON the transceiver could
503 * change his state automatically to STATE_BUSY_RX_AACK
504 * if a SHR was detected. This is not an error, but we
505 * can't assert this.
506 */
507 if (ctx->to_state == STATE_RX_AACK_ON)
508 goto done;
509
510 /* If we change to STATE_TX_ON without forcing and
511 * transceiver state is STATE_BUSY_RX_AACK, we wait
512 * 'tFrame + tPAck' receiving time. In this time the
513 * PDU should be received. If the transceiver is still
514 * in STATE_BUSY_RX_AACK, we run a force state change
515 * to STATE_TX_ON. This is a timeout handling, if the
516 * transceiver stucks in STATE_BUSY_RX_AACK.
517 */
518 if (ctx->to_state == STATE_TX_ON) {
519 at86rf230_async_state_change(lp, ctx,
520 STATE_FORCE_TX_ON,
521 ctx->complete,
522 ctx->irq_enable);
523 return;
524 }
525 }
526
527 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
528 ctx->from_state, ctx->to_state, trx_state);
529 }
530
531 done:
532 if (ctx->complete)
533 ctx->complete(context);
534 }
535
536 /* Do state change timing delay. */
537 static void
538 at86rf230_async_state_delay(void *context)
539 {
540 struct at86rf230_state_change *ctx = context;
541 struct at86rf230_local *lp = ctx->lp;
542 struct at86rf2xx_chip_data *c = lp->data;
543 bool force = false;
544
545 /* The force state changes are will show as normal states in the
546 * state status subregister. We change the to_state to the
547 * corresponding one and remember if it was a force change, this
548 * differs if we do a state change from STATE_BUSY_RX_AACK.
549 */
550 switch (ctx->to_state) {
551 case STATE_FORCE_TX_ON:
552 ctx->to_state = STATE_TX_ON;
553 force = true;
554 break;
555 case STATE_FORCE_TRX_OFF:
556 ctx->to_state = STATE_TRX_OFF;
557 force = true;
558 break;
559 default:
560 break;
561 }
562
563 switch (ctx->from_state) {
564 case STATE_TRX_OFF:
565 switch (ctx->to_state) {
566 case STATE_RX_AACK_ON:
567 usleep_range(c->t_off_to_aack, c->t_off_to_aack + 10);
568 goto change;
569 case STATE_TX_ON:
570 usleep_range(c->t_off_to_tx_on,
571 c->t_off_to_tx_on + 10);
572 goto change;
573 default:
574 break;
575 }
576 break;
577 case STATE_BUSY_RX_AACK:
578 switch (ctx->to_state) {
579 case STATE_TX_ON:
580 /* Wait for worst case receiving time if we
581 * didn't make a force change from BUSY_RX_AACK
582 * to TX_ON.
583 */
584 if (!force) {
585 usleep_range(c->t_frame + c->t_p_ack,
586 c->t_frame + c->t_p_ack + 1000);
587 goto change;
588 }
589 break;
590 default:
591 break;
592 }
593 break;
594 /* Default value, means RESET state */
595 case STATE_P_ON:
596 switch (ctx->to_state) {
597 case STATE_TRX_OFF:
598 usleep_range(c->t_reset_to_off, c->t_reset_to_off + 10);
599 goto change;
600 default:
601 break;
602 }
603 break;
604 default:
605 break;
606 }
607
608 /* Default delay is 1us in the most cases */
609 udelay(1);
610
611 change:
612 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
613 at86rf230_async_state_assert,
614 ctx->irq_enable);
615 }
616
617 static void
618 at86rf230_async_state_change_start(void *context)
619 {
620 struct at86rf230_state_change *ctx = context;
621 struct at86rf230_local *lp = ctx->lp;
622 u8 *buf = ctx->buf;
623 const u8 trx_state = buf[1] & 0x1f;
624 int rc;
625
626 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
627 if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
628 udelay(1);
629 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
630 at86rf230_async_state_change_start,
631 ctx->irq_enable);
632 return;
633 }
634
635 /* Check if we already are in the state which we change in */
636 if (trx_state == ctx->to_state) {
637 if (ctx->complete)
638 ctx->complete(context);
639 return;
640 }
641
642 /* Set current state to the context of state change */
643 ctx->from_state = trx_state;
644
645 /* Going into the next step for a state change which do a timing
646 * relevant delay.
647 */
648 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
649 buf[1] = ctx->to_state;
650 ctx->trx.len = 2;
651 ctx->msg.complete = at86rf230_async_state_delay;
652 rc = spi_async(lp->spi, &ctx->msg);
653 if (rc) {
654 if (ctx->irq_enable)
655 enable_irq(lp->spi->irq);
656
657 at86rf230_async_error(lp, ctx, rc);
658 }
659 }
660
661 static void
662 at86rf230_async_state_change(struct at86rf230_local *lp,
663 struct at86rf230_state_change *ctx,
664 const u8 state, void (*complete)(void *context),
665 const bool irq_enable)
666 {
667 /* Initialization for the state change context */
668 ctx->to_state = state;
669 ctx->complete = complete;
670 ctx->irq_enable = irq_enable;
671 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
672 at86rf230_async_state_change_start,
673 irq_enable);
674 }
675
676 static void
677 at86rf230_sync_state_change_complete(void *context)
678 {
679 struct at86rf230_state_change *ctx = context;
680 struct at86rf230_local *lp = ctx->lp;
681
682 complete(&lp->state_complete);
683 }
684
685 /* This function do a sync framework above the async state change.
686 * Some callbacks of the IEEE 802.15.4 driver interface need to be
687 * handled synchronously.
688 */
689 static int
690 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
691 {
692 int rc;
693
694 at86rf230_async_state_change(lp, &lp->state, state,
695 at86rf230_sync_state_change_complete,
696 false);
697
698 rc = wait_for_completion_timeout(&lp->state_complete,
699 msecs_to_jiffies(100));
700 if (!rc) {
701 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
702 return -ETIMEDOUT;
703 }
704
705 return 0;
706 }
707
708 static void
709 at86rf230_tx_complete(void *context)
710 {
711 struct at86rf230_state_change *ctx = context;
712 struct at86rf230_local *lp = ctx->lp;
713 struct sk_buff *skb = lp->tx_skb;
714
715 enable_irq(lp->spi->irq);
716
717 ieee802154_xmit_complete(lp->hw, skb, !lp->tx_aret);
718 }
719
720 static void
721 at86rf230_tx_on(void *context)
722 {
723 struct at86rf230_state_change *ctx = context;
724 struct at86rf230_local *lp = ctx->lp;
725
726 at86rf230_async_state_change(lp, &lp->irq, STATE_RX_AACK_ON,
727 at86rf230_tx_complete, true);
728 }
729
730 static void
731 at86rf230_tx_trac_error(void *context)
732 {
733 struct at86rf230_state_change *ctx = context;
734 struct at86rf230_local *lp = ctx->lp;
735
736 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
737 at86rf230_tx_on, true);
738 }
739
740 static void
741 at86rf230_tx_trac_check(void *context)
742 {
743 struct at86rf230_state_change *ctx = context;
744 struct at86rf230_local *lp = ctx->lp;
745 const u8 *buf = ctx->buf;
746 const u8 trac = (buf[1] & 0xe0) >> 5;
747
748 /* If trac status is different than zero we need to do a state change
749 * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver
750 * state to TX_ON.
751 */
752 if (trac)
753 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
754 at86rf230_tx_trac_error, true);
755 else
756 at86rf230_tx_on(context);
757 }
758
759 static void
760 at86rf230_tx_trac_status(void *context)
761 {
762 struct at86rf230_state_change *ctx = context;
763 struct at86rf230_local *lp = ctx->lp;
764
765 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
766 at86rf230_tx_trac_check, true);
767 }
768
769 static void
770 at86rf230_rx(struct at86rf230_local *lp,
771 const u8 *data, const u8 len, const u8 lqi)
772 {
773 struct sk_buff *skb;
774 u8 rx_local_buf[AT86RF2XX_MAX_BUF];
775
776 memcpy(rx_local_buf, data, len);
777 enable_irq(lp->spi->irq);
778
779 skb = dev_alloc_skb(IEEE802154_MTU);
780 if (!skb) {
781 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
782 return;
783 }
784
785 memcpy(skb_put(skb, len), rx_local_buf, len);
786 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
787 }
788
789 static void
790 at86rf230_rx_read_frame_complete(void *context)
791 {
792 struct at86rf230_state_change *ctx = context;
793 struct at86rf230_local *lp = ctx->lp;
794 const u8 *buf = lp->irq.buf;
795 u8 len = buf[1];
796
797 if (!ieee802154_is_valid_psdu_len(len)) {
798 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
799 len = IEEE802154_MTU;
800 }
801
802 at86rf230_rx(lp, buf + 2, len, buf[2 + len]);
803 }
804
805 static void
806 at86rf230_rx_read_frame(struct at86rf230_local *lp)
807 {
808 int rc;
809
810 u8 *buf = lp->irq.buf;
811
812 buf[0] = CMD_FB;
813 lp->irq.trx.len = AT86RF2XX_MAX_BUF;
814 lp->irq.msg.complete = at86rf230_rx_read_frame_complete;
815 rc = spi_async(lp->spi, &lp->irq.msg);
816 if (rc) {
817 enable_irq(lp->spi->irq);
818 at86rf230_async_error(lp, &lp->irq, rc);
819 }
820 }
821
822 static void
823 at86rf230_rx_trac_check(void *context)
824 {
825 struct at86rf230_state_change *ctx = context;
826 struct at86rf230_local *lp = ctx->lp;
827
828 /* Possible check on trac status here. This could be useful to make
829 * some stats why receive is failed. Not used at the moment, but it's
830 * maybe timing relevant. Datasheet doesn't say anything about this.
831 * The programming guide say do it so.
832 */
833
834 at86rf230_rx_read_frame(lp);
835 }
836
837 static void
838 at86rf230_irq_trx_end(struct at86rf230_local *lp)
839 {
840 spin_lock(&lp->lock);
841 if (lp->is_tx) {
842 lp->is_tx = 0;
843 spin_unlock(&lp->lock);
844
845 if (lp->tx_aret)
846 at86rf230_async_state_change(lp, &lp->irq,
847 STATE_FORCE_TX_ON,
848 at86rf230_tx_trac_status,
849 true);
850 else
851 at86rf230_async_state_change(lp, &lp->irq,
852 STATE_RX_AACK_ON,
853 at86rf230_tx_complete,
854 true);
855 } else {
856 spin_unlock(&lp->lock);
857 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
858 at86rf230_rx_trac_check, true);
859 }
860 }
861
862 static void
863 at86rf230_irq_status(void *context)
864 {
865 struct at86rf230_state_change *ctx = context;
866 struct at86rf230_local *lp = ctx->lp;
867 const u8 *buf = lp->irq.buf;
868 const u8 irq = buf[1];
869
870 if (irq & IRQ_TRX_END) {
871 at86rf230_irq_trx_end(lp);
872 } else {
873 enable_irq(lp->spi->irq);
874 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
875 irq);
876 }
877 }
878
879 static irqreturn_t at86rf230_isr(int irq, void *data)
880 {
881 struct at86rf230_local *lp = data;
882 struct at86rf230_state_change *ctx = &lp->irq;
883 u8 *buf = ctx->buf;
884 int rc;
885
886 disable_irq_nosync(irq);
887
888 buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
889 ctx->trx.len = 2;
890 ctx->msg.complete = at86rf230_irq_status;
891 rc = spi_async(lp->spi, &ctx->msg);
892 if (rc) {
893 enable_irq(irq);
894 at86rf230_async_error(lp, ctx, rc);
895 return IRQ_NONE;
896 }
897
898 return IRQ_HANDLED;
899 }
900
901 static void
902 at86rf230_write_frame_complete(void *context)
903 {
904 struct at86rf230_state_change *ctx = context;
905 struct at86rf230_local *lp = ctx->lp;
906 u8 *buf = ctx->buf;
907 int rc;
908
909 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
910 buf[1] = STATE_BUSY_TX;
911 ctx->trx.len = 2;
912 ctx->msg.complete = NULL;
913 rc = spi_async(lp->spi, &ctx->msg);
914 if (rc)
915 at86rf230_async_error(lp, ctx, rc);
916 }
917
918 static void
919 at86rf230_write_frame(void *context)
920 {
921 struct at86rf230_state_change *ctx = context;
922 struct at86rf230_local *lp = ctx->lp;
923 struct sk_buff *skb = lp->tx_skb;
924 u8 *buf = lp->tx.buf;
925 int rc;
926
927 spin_lock(&lp->lock);
928 lp->is_tx = 1;
929 spin_unlock(&lp->lock);
930
931 buf[0] = CMD_FB | CMD_WRITE;
932 buf[1] = skb->len + 2;
933 memcpy(buf + 2, skb->data, skb->len);
934 lp->tx.trx.len = skb->len + 2;
935 lp->tx.msg.complete = at86rf230_write_frame_complete;
936 rc = spi_async(lp->spi, &lp->tx.msg);
937 if (rc)
938 at86rf230_async_error(lp, ctx, rc);
939 }
940
941 static void
942 at86rf230_xmit_tx_on(void *context)
943 {
944 struct at86rf230_state_change *ctx = context;
945 struct at86rf230_local *lp = ctx->lp;
946
947 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
948 at86rf230_write_frame, false);
949 }
950
951 static int
952 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
953 {
954 struct at86rf230_local *lp = hw->priv;
955 struct at86rf230_state_change *ctx = &lp->tx;
956
957 void (*tx_complete)(void *context) = at86rf230_write_frame;
958
959 lp->tx_skb = skb;
960
961 /* In ARET mode we need to go into STATE_TX_ARET_ON after we
962 * are in STATE_TX_ON. The pfad differs here, so we change
963 * the complete handler.
964 */
965 if (lp->tx_aret)
966 tx_complete = at86rf230_xmit_tx_on;
967
968 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, tx_complete, false);
969
970 return 0;
971 }
972
973 static int
974 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
975 {
976 BUG_ON(!level);
977 *level = 0xbe;
978 return 0;
979 }
980
981 static int
982 at86rf230_start(struct ieee802154_hw *hw)
983 {
984 return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON);
985 }
986
987 static void
988 at86rf230_stop(struct ieee802154_hw *hw)
989 {
990 at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF);
991 }
992
993 static int
994 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
995 {
996 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
997 }
998
999 static int
1000 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1001 {
1002 int rc;
1003
1004 if (channel == 0)
1005 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1006 else
1007 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1008 if (rc < 0)
1009 return rc;
1010
1011 if (page == 0) {
1012 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1013 lp->data->rssi_base_val = -100;
1014 } else {
1015 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1016 lp->data->rssi_base_val = -98;
1017 }
1018 if (rc < 0)
1019 return rc;
1020
1021 /* This sets the symbol_duration according frequency on the 212.
1022 * TODO move this handling while set channel and page in cfg802154.
1023 * We can do that, this timings are according 802.15.4 standard.
1024 * If we do that in cfg802154, this is a more generic calculation.
1025 *
1026 * This should also protected from ifs_timer. Means cancel timer and
1027 * init with a new value. For now, this is okay.
1028 */
1029 if (channel == 0) {
1030 if (page == 0) {
1031 /* SUB:0 and BPSK:0 -> BPSK-20 */
1032 lp->hw->phy->symbol_duration = 50;
1033 } else {
1034 /* SUB:1 and BPSK:0 -> BPSK-40 */
1035 lp->hw->phy->symbol_duration = 25;
1036 }
1037 } else {
1038 if (page == 0)
1039 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1040 lp->hw->phy->symbol_duration = 40;
1041 else
1042 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1043 lp->hw->phy->symbol_duration = 16;
1044 }
1045
1046 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1047 lp->hw->phy->symbol_duration;
1048 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1049 lp->hw->phy->symbol_duration;
1050
1051 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1052 }
1053
1054 static int
1055 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1056 {
1057 struct at86rf230_local *lp = hw->priv;
1058 int rc;
1059
1060 rc = lp->data->set_channel(lp, page, channel);
1061 /* Wait for PLL */
1062 usleep_range(lp->data->t_channel_switch,
1063 lp->data->t_channel_switch + 10);
1064 return rc;
1065 }
1066
1067 static int
1068 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1069 struct ieee802154_hw_addr_filt *filt,
1070 unsigned long changed)
1071 {
1072 struct at86rf230_local *lp = hw->priv;
1073
1074 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1075 u16 addr = le16_to_cpu(filt->short_addr);
1076
1077 dev_vdbg(&lp->spi->dev,
1078 "at86rf230_set_hw_addr_filt called for saddr\n");
1079 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1080 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1081 }
1082
1083 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1084 u16 pan = le16_to_cpu(filt->pan_id);
1085
1086 dev_vdbg(&lp->spi->dev,
1087 "at86rf230_set_hw_addr_filt called for pan id\n");
1088 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1089 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1090 }
1091
1092 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1093 u8 i, addr[8];
1094
1095 memcpy(addr, &filt->ieee_addr, 8);
1096 dev_vdbg(&lp->spi->dev,
1097 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1098 for (i = 0; i < 8; i++)
1099 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1100 }
1101
1102 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1103 dev_vdbg(&lp->spi->dev,
1104 "at86rf230_set_hw_addr_filt called for panc change\n");
1105 if (filt->pan_coord)
1106 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1107 else
1108 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1109 }
1110
1111 return 0;
1112 }
1113
1114 static int
1115 at86rf230_set_txpower(struct ieee802154_hw *hw, int db)
1116 {
1117 struct at86rf230_local *lp = hw->priv;
1118
1119 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1120 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1121 * 0dB.
1122 * thus, supported values for db range from -26 to 5, for 31dB of
1123 * reduction to 0dB of reduction.
1124 */
1125 if (db > 5 || db < -26)
1126 return -EINVAL;
1127
1128 db = -(db - 5);
1129
1130 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
1131 }
1132
1133 static int
1134 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1135 {
1136 struct at86rf230_local *lp = hw->priv;
1137
1138 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1139 }
1140
1141 static int
1142 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1143 const struct wpan_phy_cca *cca)
1144 {
1145 struct at86rf230_local *lp = hw->priv;
1146 u8 val;
1147
1148 /* mapping 802.15.4 to driver spec */
1149 switch (cca->mode) {
1150 case NL802154_CCA_ENERGY:
1151 val = 1;
1152 break;
1153 case NL802154_CCA_CARRIER:
1154 val = 2;
1155 break;
1156 case NL802154_CCA_ENERGY_CARRIER:
1157 switch (cca->opt) {
1158 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1159 val = 3;
1160 break;
1161 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1162 val = 0;
1163 break;
1164 default:
1165 return -EINVAL;
1166 }
1167 break;
1168 default:
1169 return -EINVAL;
1170 }
1171
1172 return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1173 }
1174
1175 static int
1176 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level)
1177 {
1178 return (level - lp->data->rssi_base_val) * 100 / 207;
1179 }
1180
1181 static int
1182 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level)
1183 {
1184 return (level - lp->data->rssi_base_val) / 2;
1185 }
1186
1187 static int
1188 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
1189 {
1190 struct at86rf230_local *lp = hw->priv;
1191
1192 if (level < lp->data->rssi_base_val || level > 30)
1193 return -EINVAL;
1194
1195 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES,
1196 lp->data->get_desense_steps(lp, level));
1197 }
1198
1199 static int
1200 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1201 u8 retries)
1202 {
1203 struct at86rf230_local *lp = hw->priv;
1204 int rc;
1205
1206 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1207 if (rc)
1208 return rc;
1209
1210 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1211 if (rc)
1212 return rc;
1213
1214 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1215 }
1216
1217 static int
1218 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1219 {
1220 struct at86rf230_local *lp = hw->priv;
1221 int rc = 0;
1222
1223 lp->tx_aret = retries >= 0;
1224 lp->max_frame_retries = retries;
1225
1226 if (retries >= 0)
1227 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1228
1229 return rc;
1230 }
1231
1232 static int
1233 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1234 {
1235 struct at86rf230_local *lp = hw->priv;
1236 int rc;
1237
1238 if (on) {
1239 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1240 if (rc < 0)
1241 return rc;
1242
1243 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1244 if (rc < 0)
1245 return rc;
1246 } else {
1247 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1248 if (rc < 0)
1249 return rc;
1250
1251 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1252 if (rc < 0)
1253 return rc;
1254 }
1255
1256 return 0;
1257 }
1258
1259 static const struct ieee802154_ops at86rf230_ops = {
1260 .owner = THIS_MODULE,
1261 .xmit_async = at86rf230_xmit,
1262 .ed = at86rf230_ed,
1263 .set_channel = at86rf230_channel,
1264 .start = at86rf230_start,
1265 .stop = at86rf230_stop,
1266 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1267 .set_txpower = at86rf230_set_txpower,
1268 .set_lbt = at86rf230_set_lbt,
1269 .set_cca_mode = at86rf230_set_cca_mode,
1270 .set_cca_ed_level = at86rf230_set_cca_ed_level,
1271 .set_csma_params = at86rf230_set_csma_params,
1272 .set_frame_retries = at86rf230_set_frame_retries,
1273 .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1274 };
1275
1276 static struct at86rf2xx_chip_data at86rf233_data = {
1277 .t_sleep_cycle = 330,
1278 .t_channel_switch = 11,
1279 .t_reset_to_off = 26,
1280 .t_off_to_aack = 80,
1281 .t_off_to_tx_on = 80,
1282 .t_frame = 4096,
1283 .t_p_ack = 545,
1284 .t_tx_timeout = 2000,
1285 .rssi_base_val = -91,
1286 .set_channel = at86rf23x_set_channel,
1287 .get_desense_steps = at86rf23x_get_desens_steps
1288 };
1289
1290 static struct at86rf2xx_chip_data at86rf231_data = {
1291 .t_sleep_cycle = 330,
1292 .t_channel_switch = 24,
1293 .t_reset_to_off = 37,
1294 .t_off_to_aack = 110,
1295 .t_off_to_tx_on = 110,
1296 .t_frame = 4096,
1297 .t_p_ack = 545,
1298 .t_tx_timeout = 2000,
1299 .rssi_base_val = -91,
1300 .set_channel = at86rf23x_set_channel,
1301 .get_desense_steps = at86rf23x_get_desens_steps
1302 };
1303
1304 static struct at86rf2xx_chip_data at86rf212_data = {
1305 .t_sleep_cycle = 330,
1306 .t_channel_switch = 11,
1307 .t_reset_to_off = 26,
1308 .t_off_to_aack = 200,
1309 .t_off_to_tx_on = 200,
1310 .t_frame = 4096,
1311 .t_p_ack = 545,
1312 .t_tx_timeout = 2000,
1313 .rssi_base_val = -100,
1314 .set_channel = at86rf212_set_channel,
1315 .get_desense_steps = at86rf212_get_desens_steps
1316 };
1317
1318 static int at86rf230_hw_init(struct at86rf230_local *lp)
1319 {
1320 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1321 unsigned int dvdd;
1322 u8 csma_seed[2];
1323
1324 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1325 if (rc)
1326 return rc;
1327
1328 irq_type = irq_get_trigger_type(lp->spi->irq);
1329 if (irq_type == IRQ_TYPE_EDGE_FALLING)
1330 irq_pol = IRQ_ACTIVE_LOW;
1331
1332 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1333 if (rc)
1334 return rc;
1335
1336 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1337 if (rc)
1338 return rc;
1339
1340 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1341 if (rc)
1342 return rc;
1343
1344 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1345 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1346 if (rc)
1347 return rc;
1348 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1349 if (rc)
1350 return rc;
1351
1352 /* CLKM changes are applied immediately */
1353 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1354 if (rc)
1355 return rc;
1356
1357 /* Turn CLKM Off */
1358 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1359 if (rc)
1360 return rc;
1361 /* Wait the next SLEEP cycle */
1362 usleep_range(lp->data->t_sleep_cycle,
1363 lp->data->t_sleep_cycle + 100);
1364
1365 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1366 if (rc)
1367 return rc;
1368 if (!dvdd) {
1369 dev_err(&lp->spi->dev, "DVDD error\n");
1370 return -EINVAL;
1371 }
1372
1373 /* Force setting slotted operation bit to 0. Sometimes the atben
1374 * sets this bit and I don't know why. We set this always force
1375 * to zero while probing.
1376 */
1377 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1378 }
1379
1380 static struct at86rf230_platform_data *
1381 at86rf230_get_pdata(struct spi_device *spi)
1382 {
1383 struct at86rf230_platform_data *pdata;
1384
1385 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1386 return spi->dev.platform_data;
1387
1388 pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1389 if (!pdata)
1390 goto done;
1391
1392 pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1393 pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1394
1395 spi->dev.platform_data = pdata;
1396 done:
1397 return pdata;
1398 }
1399
1400 static int
1401 at86rf230_detect_device(struct at86rf230_local *lp)
1402 {
1403 unsigned int part, version, val;
1404 u16 man_id = 0;
1405 const char *chip;
1406 int rc;
1407
1408 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1409 if (rc)
1410 return rc;
1411 man_id |= val;
1412
1413 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1414 if (rc)
1415 return rc;
1416 man_id |= (val << 8);
1417
1418 rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1419 if (rc)
1420 return rc;
1421
1422 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1423 if (rc)
1424 return rc;
1425
1426 if (man_id != 0x001f) {
1427 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1428 man_id >> 8, man_id & 0xFF);
1429 return -EINVAL;
1430 }
1431
1432 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AACK |
1433 IEEE802154_HW_TXPOWER | IEEE802154_HW_ARET |
1434 IEEE802154_HW_AFILT | IEEE802154_HW_PROMISCUOUS;
1435
1436 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1437
1438 switch (part) {
1439 case 2:
1440 chip = "at86rf230";
1441 rc = -ENOTSUPP;
1442 break;
1443 case 3:
1444 chip = "at86rf231";
1445 lp->data = &at86rf231_data;
1446 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1447 lp->hw->phy->current_channel = 11;
1448 lp->hw->phy->symbol_duration = 16;
1449 break;
1450 case 7:
1451 chip = "at86rf212";
1452 lp->data = &at86rf212_data;
1453 lp->hw->flags |= IEEE802154_HW_LBT;
1454 lp->hw->phy->channels_supported[0] = 0x00007FF;
1455 lp->hw->phy->channels_supported[2] = 0x00007FF;
1456 lp->hw->phy->current_channel = 5;
1457 lp->hw->phy->symbol_duration = 25;
1458 break;
1459 case 11:
1460 chip = "at86rf233";
1461 lp->data = &at86rf233_data;
1462 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1463 lp->hw->phy->current_channel = 13;
1464 lp->hw->phy->symbol_duration = 16;
1465 break;
1466 default:
1467 chip = "unknown";
1468 rc = -ENOTSUPP;
1469 break;
1470 }
1471
1472 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1473
1474 return rc;
1475 }
1476
1477 static void
1478 at86rf230_setup_spi_messages(struct at86rf230_local *lp)
1479 {
1480 lp->state.lp = lp;
1481 spi_message_init(&lp->state.msg);
1482 lp->state.msg.context = &lp->state;
1483 lp->state.trx.tx_buf = lp->state.buf;
1484 lp->state.trx.rx_buf = lp->state.buf;
1485 spi_message_add_tail(&lp->state.trx, &lp->state.msg);
1486
1487 lp->irq.lp = lp;
1488 spi_message_init(&lp->irq.msg);
1489 lp->irq.msg.context = &lp->irq;
1490 lp->irq.trx.tx_buf = lp->irq.buf;
1491 lp->irq.trx.rx_buf = lp->irq.buf;
1492 spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
1493
1494 lp->tx.lp = lp;
1495 spi_message_init(&lp->tx.msg);
1496 lp->tx.msg.context = &lp->tx;
1497 lp->tx.trx.tx_buf = lp->tx.buf;
1498 lp->tx.trx.rx_buf = lp->tx.buf;
1499 spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
1500 }
1501
1502 static int at86rf230_probe(struct spi_device *spi)
1503 {
1504 struct at86rf230_platform_data *pdata;
1505 struct ieee802154_hw *hw;
1506 struct at86rf230_local *lp;
1507 unsigned int status;
1508 int rc, irq_type;
1509
1510 if (!spi->irq) {
1511 dev_err(&spi->dev, "no IRQ specified\n");
1512 return -EINVAL;
1513 }
1514
1515 pdata = at86rf230_get_pdata(spi);
1516 if (!pdata) {
1517 dev_err(&spi->dev, "no platform_data\n");
1518 return -EINVAL;
1519 }
1520
1521 if (gpio_is_valid(pdata->rstn)) {
1522 rc = devm_gpio_request_one(&spi->dev, pdata->rstn,
1523 GPIOF_OUT_INIT_HIGH, "rstn");
1524 if (rc)
1525 return rc;
1526 }
1527
1528 if (gpio_is_valid(pdata->slp_tr)) {
1529 rc = devm_gpio_request_one(&spi->dev, pdata->slp_tr,
1530 GPIOF_OUT_INIT_LOW, "slp_tr");
1531 if (rc)
1532 return rc;
1533 }
1534
1535 /* Reset */
1536 if (gpio_is_valid(pdata->rstn)) {
1537 udelay(1);
1538 gpio_set_value(pdata->rstn, 0);
1539 udelay(1);
1540 gpio_set_value(pdata->rstn, 1);
1541 usleep_range(120, 240);
1542 }
1543
1544 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1545 if (!hw)
1546 return -ENOMEM;
1547
1548 lp = hw->priv;
1549 lp->hw = hw;
1550 lp->spi = spi;
1551 hw->parent = &spi->dev;
1552 hw->vif_data_size = sizeof(*lp);
1553 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1554
1555 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1556 if (IS_ERR(lp->regmap)) {
1557 rc = PTR_ERR(lp->regmap);
1558 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1559 rc);
1560 goto free_dev;
1561 }
1562
1563 at86rf230_setup_spi_messages(lp);
1564
1565 rc = at86rf230_detect_device(lp);
1566 if (rc < 0)
1567 goto free_dev;
1568
1569 spin_lock_init(&lp->lock);
1570 init_completion(&lp->state_complete);
1571
1572 spi_set_drvdata(spi, lp);
1573
1574 rc = at86rf230_hw_init(lp);
1575 if (rc)
1576 goto free_dev;
1577
1578 /* Read irq status register to reset irq line */
1579 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1580 if (rc)
1581 goto free_dev;
1582
1583 irq_type = irq_get_trigger_type(spi->irq);
1584 if (!irq_type)
1585 irq_type = IRQF_TRIGGER_RISING;
1586
1587 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1588 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1589 if (rc)
1590 goto free_dev;
1591
1592 rc = ieee802154_register_hw(lp->hw);
1593 if (rc)
1594 goto free_dev;
1595
1596 return rc;
1597
1598 free_dev:
1599 ieee802154_free_hw(lp->hw);
1600
1601 return rc;
1602 }
1603
1604 static int at86rf230_remove(struct spi_device *spi)
1605 {
1606 struct at86rf230_local *lp = spi_get_drvdata(spi);
1607
1608 /* mask all at86rf230 irq's */
1609 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1610 ieee802154_unregister_hw(lp->hw);
1611 ieee802154_free_hw(lp->hw);
1612 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1613
1614 return 0;
1615 }
1616
1617 static const struct of_device_id at86rf230_of_match[] = {
1618 { .compatible = "atmel,at86rf230", },
1619 { .compatible = "atmel,at86rf231", },
1620 { .compatible = "atmel,at86rf233", },
1621 { .compatible = "atmel,at86rf212", },
1622 { },
1623 };
1624 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1625
1626 static const struct spi_device_id at86rf230_device_id[] = {
1627 { .name = "at86rf230", },
1628 { .name = "at86rf231", },
1629 { .name = "at86rf233", },
1630 { .name = "at86rf212", },
1631 { },
1632 };
1633 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1634
1635 static struct spi_driver at86rf230_driver = {
1636 .id_table = at86rf230_device_id,
1637 .driver = {
1638 .of_match_table = of_match_ptr(at86rf230_of_match),
1639 .name = "at86rf230",
1640 .owner = THIS_MODULE,
1641 },
1642 .probe = at86rf230_probe,
1643 .remove = at86rf230_remove,
1644 };
1645
1646 module_spi_driver(at86rf230_driver);
1647
1648 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1649 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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