1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for igb */
30 #include <linux/vmalloc.h>
31 #include <linux/netdevice.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/if_ether.h>
36 #include <linux/ethtool.h>
40 enum {NETDEV_STATS
, IGB_STATS
};
43 char stat_string
[ETH_GSTRING_LEN
];
49 #define IGB_STAT(m) IGB_STATS, \
50 FIELD_SIZEOF(struct igb_adapter, m), \
51 offsetof(struct igb_adapter, m)
52 #define IGB_NETDEV_STAT(m) NETDEV_STATS, \
53 FIELD_SIZEOF(struct net_device, m), \
54 offsetof(struct net_device, m)
56 static const struct igb_stats igb_gstrings_stats
[] = {
57 { "rx_packets", IGB_STAT(stats
.gprc
) },
58 { "tx_packets", IGB_STAT(stats
.gptc
) },
59 { "rx_bytes", IGB_STAT(stats
.gorc
) },
60 { "tx_bytes", IGB_STAT(stats
.gotc
) },
61 { "rx_broadcast", IGB_STAT(stats
.bprc
) },
62 { "tx_broadcast", IGB_STAT(stats
.bptc
) },
63 { "rx_multicast", IGB_STAT(stats
.mprc
) },
64 { "tx_multicast", IGB_STAT(stats
.mptc
) },
65 { "rx_errors", IGB_NETDEV_STAT(stats
.rx_errors
) },
66 { "tx_errors", IGB_NETDEV_STAT(stats
.tx_errors
) },
67 { "tx_dropped", IGB_NETDEV_STAT(stats
.tx_dropped
) },
68 { "multicast", IGB_STAT(stats
.mprc
) },
69 { "collisions", IGB_STAT(stats
.colc
) },
70 { "rx_length_errors", IGB_NETDEV_STAT(stats
.rx_length_errors
) },
71 { "rx_over_errors", IGB_NETDEV_STAT(stats
.rx_over_errors
) },
72 { "rx_crc_errors", IGB_STAT(stats
.crcerrs
) },
73 { "rx_frame_errors", IGB_NETDEV_STAT(stats
.rx_frame_errors
) },
74 { "rx_no_buffer_count", IGB_STAT(stats
.rnbc
) },
75 { "rx_queue_drop_packet_count", IGB_NETDEV_STAT(stats
.rx_fifo_errors
) },
76 { "rx_missed_errors", IGB_STAT(stats
.mpc
) },
77 { "tx_aborted_errors", IGB_STAT(stats
.ecol
) },
78 { "tx_carrier_errors", IGB_STAT(stats
.tncrs
) },
79 { "tx_fifo_errors", IGB_NETDEV_STAT(stats
.tx_fifo_errors
) },
80 { "tx_heartbeat_errors", IGB_NETDEV_STAT(stats
.tx_heartbeat_errors
) },
81 { "tx_window_errors", IGB_STAT(stats
.latecol
) },
82 { "tx_abort_late_coll", IGB_STAT(stats
.latecol
) },
83 { "tx_deferred_ok", IGB_STAT(stats
.dc
) },
84 { "tx_single_coll_ok", IGB_STAT(stats
.scc
) },
85 { "tx_multi_coll_ok", IGB_STAT(stats
.mcc
) },
86 { "tx_timeout_count", IGB_STAT(tx_timeout_count
) },
87 { "rx_long_length_errors", IGB_STAT(stats
.roc
) },
88 { "rx_short_length_errors", IGB_STAT(stats
.ruc
) },
89 { "rx_align_errors", IGB_STAT(stats
.algnerrc
) },
90 { "tx_tcp_seg_good", IGB_STAT(stats
.tsctc
) },
91 { "tx_tcp_seg_failed", IGB_STAT(stats
.tsctfc
) },
92 { "rx_flow_control_xon", IGB_STAT(stats
.xonrxc
) },
93 { "rx_flow_control_xoff", IGB_STAT(stats
.xoffrxc
) },
94 { "tx_flow_control_xon", IGB_STAT(stats
.xontxc
) },
95 { "tx_flow_control_xoff", IGB_STAT(stats
.xofftxc
) },
96 { "rx_long_byte_count", IGB_STAT(stats
.gorc
) },
97 { "tx_dma_out_of_sync", IGB_STAT(stats
.doosync
) },
98 { "tx_smbus", IGB_STAT(stats
.mgptc
) },
99 { "rx_smbus", IGB_STAT(stats
.mgprc
) },
100 { "dropped_smbus", IGB_STAT(stats
.mgpdc
) },
103 #define IGB_QUEUE_STATS_LEN \
104 (((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues)* \
105 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))) + \
106 ((((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
107 (sizeof(struct igb_tx_queue_stats) / sizeof(u64))))
108 #define IGB_GLOBAL_STATS_LEN \
109 sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
110 #define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
111 static const char igb_gstrings_test
[][ETH_GSTRING_LEN
] = {
112 "Register test (offline)", "Eeprom test (offline)",
113 "Interrupt test (offline)", "Loopback test (offline)",
114 "Link test (on/offline)"
116 #define IGB_TEST_LEN sizeof(igb_gstrings_test) / ETH_GSTRING_LEN
118 static int igb_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
120 struct igb_adapter
*adapter
= netdev_priv(netdev
);
121 struct e1000_hw
*hw
= &adapter
->hw
;
123 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
125 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
126 SUPPORTED_10baseT_Full
|
127 SUPPORTED_100baseT_Half
|
128 SUPPORTED_100baseT_Full
|
129 SUPPORTED_1000baseT_Full
|
132 ecmd
->advertising
= ADVERTISED_TP
;
134 if (hw
->mac
.autoneg
== 1) {
135 ecmd
->advertising
|= ADVERTISED_Autoneg
;
136 /* the e1000 autoneg seems to match ethtool nicely */
137 ecmd
->advertising
|= hw
->phy
.autoneg_advertised
;
140 ecmd
->port
= PORT_TP
;
141 ecmd
->phy_address
= hw
->phy
.addr
;
143 ecmd
->supported
= (SUPPORTED_1000baseT_Full
|
147 ecmd
->advertising
= (ADVERTISED_1000baseT_Full
|
151 ecmd
->port
= PORT_FIBRE
;
154 ecmd
->transceiver
= XCVR_INTERNAL
;
156 if (rd32(E1000_STATUS
) & E1000_STATUS_LU
) {
158 adapter
->hw
.mac
.ops
.get_speed_and_duplex(hw
,
159 &adapter
->link_speed
,
160 &adapter
->link_duplex
);
161 ecmd
->speed
= adapter
->link_speed
;
163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
164 * and HALF_DUPLEX != DUPLEX_HALF */
166 if (adapter
->link_duplex
== FULL_DUPLEX
)
167 ecmd
->duplex
= DUPLEX_FULL
;
169 ecmd
->duplex
= DUPLEX_HALF
;
175 ecmd
->autoneg
= hw
->mac
.autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
;
179 static int igb_set_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
181 struct igb_adapter
*adapter
= netdev_priv(netdev
);
182 struct e1000_hw
*hw
= &adapter
->hw
;
184 /* When SoL/IDER sessions are active, autoneg/speed/duplex
185 * cannot be changed */
186 if (igb_check_reset_block(hw
)) {
187 dev_err(&adapter
->pdev
->dev
, "Cannot change link "
188 "characteristics when SoL/IDER is active.\n");
192 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
195 if (ecmd
->autoneg
== AUTONEG_ENABLE
) {
197 hw
->phy
.autoneg_advertised
= ecmd
->advertising
|
200 ecmd
->advertising
= hw
->phy
.autoneg_advertised
;
201 if (adapter
->fc_autoneg
)
202 hw
->fc
.requested_mode
= e1000_fc_default
;
204 if (igb_set_spd_dplx(adapter
, ecmd
->speed
+ ecmd
->duplex
)) {
205 clear_bit(__IGB_RESETTING
, &adapter
->state
);
211 if (netif_running(adapter
->netdev
)) {
217 clear_bit(__IGB_RESETTING
, &adapter
->state
);
221 static void igb_get_pauseparam(struct net_device
*netdev
,
222 struct ethtool_pauseparam
*pause
)
224 struct igb_adapter
*adapter
= netdev_priv(netdev
);
225 struct e1000_hw
*hw
= &adapter
->hw
;
228 (adapter
->fc_autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
);
230 if (hw
->fc
.current_mode
== e1000_fc_rx_pause
)
232 else if (hw
->fc
.current_mode
== e1000_fc_tx_pause
)
234 else if (hw
->fc
.current_mode
== e1000_fc_full
) {
240 static int igb_set_pauseparam(struct net_device
*netdev
,
241 struct ethtool_pauseparam
*pause
)
243 struct igb_adapter
*adapter
= netdev_priv(netdev
);
244 struct e1000_hw
*hw
= &adapter
->hw
;
247 adapter
->fc_autoneg
= pause
->autoneg
;
249 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
252 if (adapter
->fc_autoneg
== AUTONEG_ENABLE
) {
253 hw
->fc
.requested_mode
= e1000_fc_default
;
254 if (netif_running(adapter
->netdev
)) {
260 if (pause
->rx_pause
&& pause
->tx_pause
)
261 hw
->fc
.requested_mode
= e1000_fc_full
;
262 else if (pause
->rx_pause
&& !pause
->tx_pause
)
263 hw
->fc
.requested_mode
= e1000_fc_rx_pause
;
264 else if (!pause
->rx_pause
&& pause
->tx_pause
)
265 hw
->fc
.requested_mode
= e1000_fc_tx_pause
;
266 else if (!pause
->rx_pause
&& !pause
->tx_pause
)
267 hw
->fc
.requested_mode
= e1000_fc_none
;
269 hw
->fc
.current_mode
= hw
->fc
.requested_mode
;
271 retval
= ((hw
->phy
.media_type
== e1000_media_type_copper
) ?
272 igb_force_mac_fc(hw
) : igb_setup_link(hw
));
275 clear_bit(__IGB_RESETTING
, &adapter
->state
);
279 static u32
igb_get_rx_csum(struct net_device
*netdev
)
281 struct igb_adapter
*adapter
= netdev_priv(netdev
);
282 return !!(adapter
->rx_ring
[0].flags
& IGB_RING_FLAG_RX_CSUM
);
285 static int igb_set_rx_csum(struct net_device
*netdev
, u32 data
)
287 struct igb_adapter
*adapter
= netdev_priv(netdev
);
290 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
292 adapter
->rx_ring
[i
].flags
|= IGB_RING_FLAG_RX_CSUM
;
294 adapter
->rx_ring
[i
].flags
&= ~IGB_RING_FLAG_RX_CSUM
;
300 static u32
igb_get_tx_csum(struct net_device
*netdev
)
302 return (netdev
->features
& NETIF_F_IP_CSUM
) != 0;
305 static int igb_set_tx_csum(struct net_device
*netdev
, u32 data
)
307 struct igb_adapter
*adapter
= netdev_priv(netdev
);
310 netdev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
);
311 if (adapter
->hw
.mac
.type
== e1000_82576
)
312 netdev
->features
|= NETIF_F_SCTP_CSUM
;
314 netdev
->features
&= ~(NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
|
321 static int igb_set_tso(struct net_device
*netdev
, u32 data
)
323 struct igb_adapter
*adapter
= netdev_priv(netdev
);
326 netdev
->features
|= NETIF_F_TSO
;
327 netdev
->features
|= NETIF_F_TSO6
;
329 netdev
->features
&= ~NETIF_F_TSO
;
330 netdev
->features
&= ~NETIF_F_TSO6
;
333 dev_info(&adapter
->pdev
->dev
, "TSO is %s\n",
334 data
? "Enabled" : "Disabled");
338 static u32
igb_get_msglevel(struct net_device
*netdev
)
340 struct igb_adapter
*adapter
= netdev_priv(netdev
);
341 return adapter
->msg_enable
;
344 static void igb_set_msglevel(struct net_device
*netdev
, u32 data
)
346 struct igb_adapter
*adapter
= netdev_priv(netdev
);
347 adapter
->msg_enable
= data
;
350 static int igb_get_regs_len(struct net_device
*netdev
)
352 #define IGB_REGS_LEN 551
353 return IGB_REGS_LEN
* sizeof(u32
);
356 static void igb_get_regs(struct net_device
*netdev
,
357 struct ethtool_regs
*regs
, void *p
)
359 struct igb_adapter
*adapter
= netdev_priv(netdev
);
360 struct e1000_hw
*hw
= &adapter
->hw
;
364 memset(p
, 0, IGB_REGS_LEN
* sizeof(u32
));
366 regs
->version
= (1 << 24) | (hw
->revision_id
<< 16) | hw
->device_id
;
368 /* General Registers */
369 regs_buff
[0] = rd32(E1000_CTRL
);
370 regs_buff
[1] = rd32(E1000_STATUS
);
371 regs_buff
[2] = rd32(E1000_CTRL_EXT
);
372 regs_buff
[3] = rd32(E1000_MDIC
);
373 regs_buff
[4] = rd32(E1000_SCTL
);
374 regs_buff
[5] = rd32(E1000_CONNSW
);
375 regs_buff
[6] = rd32(E1000_VET
);
376 regs_buff
[7] = rd32(E1000_LEDCTL
);
377 regs_buff
[8] = rd32(E1000_PBA
);
378 regs_buff
[9] = rd32(E1000_PBS
);
379 regs_buff
[10] = rd32(E1000_FRTIMER
);
380 regs_buff
[11] = rd32(E1000_TCPTIMER
);
383 regs_buff
[12] = rd32(E1000_EECD
);
386 /* Reading EICS for EICR because they read the
387 * same but EICS does not clear on read */
388 regs_buff
[13] = rd32(E1000_EICS
);
389 regs_buff
[14] = rd32(E1000_EICS
);
390 regs_buff
[15] = rd32(E1000_EIMS
);
391 regs_buff
[16] = rd32(E1000_EIMC
);
392 regs_buff
[17] = rd32(E1000_EIAC
);
393 regs_buff
[18] = rd32(E1000_EIAM
);
394 /* Reading ICS for ICR because they read the
395 * same but ICS does not clear on read */
396 regs_buff
[19] = rd32(E1000_ICS
);
397 regs_buff
[20] = rd32(E1000_ICS
);
398 regs_buff
[21] = rd32(E1000_IMS
);
399 regs_buff
[22] = rd32(E1000_IMC
);
400 regs_buff
[23] = rd32(E1000_IAC
);
401 regs_buff
[24] = rd32(E1000_IAM
);
402 regs_buff
[25] = rd32(E1000_IMIRVP
);
405 regs_buff
[26] = rd32(E1000_FCAL
);
406 regs_buff
[27] = rd32(E1000_FCAH
);
407 regs_buff
[28] = rd32(E1000_FCTTV
);
408 regs_buff
[29] = rd32(E1000_FCRTL
);
409 regs_buff
[30] = rd32(E1000_FCRTH
);
410 regs_buff
[31] = rd32(E1000_FCRTV
);
413 regs_buff
[32] = rd32(E1000_RCTL
);
414 regs_buff
[33] = rd32(E1000_RXCSUM
);
415 regs_buff
[34] = rd32(E1000_RLPML
);
416 regs_buff
[35] = rd32(E1000_RFCTL
);
417 regs_buff
[36] = rd32(E1000_MRQC
);
418 regs_buff
[37] = rd32(E1000_VT_CTL
);
421 regs_buff
[38] = rd32(E1000_TCTL
);
422 regs_buff
[39] = rd32(E1000_TCTL_EXT
);
423 regs_buff
[40] = rd32(E1000_TIPG
);
424 regs_buff
[41] = rd32(E1000_DTXCTL
);
427 regs_buff
[42] = rd32(E1000_WUC
);
428 regs_buff
[43] = rd32(E1000_WUFC
);
429 regs_buff
[44] = rd32(E1000_WUS
);
430 regs_buff
[45] = rd32(E1000_IPAV
);
431 regs_buff
[46] = rd32(E1000_WUPL
);
434 regs_buff
[47] = rd32(E1000_PCS_CFG0
);
435 regs_buff
[48] = rd32(E1000_PCS_LCTL
);
436 regs_buff
[49] = rd32(E1000_PCS_LSTAT
);
437 regs_buff
[50] = rd32(E1000_PCS_ANADV
);
438 regs_buff
[51] = rd32(E1000_PCS_LPAB
);
439 regs_buff
[52] = rd32(E1000_PCS_NPTX
);
440 regs_buff
[53] = rd32(E1000_PCS_LPABNP
);
443 regs_buff
[54] = adapter
->stats
.crcerrs
;
444 regs_buff
[55] = adapter
->stats
.algnerrc
;
445 regs_buff
[56] = adapter
->stats
.symerrs
;
446 regs_buff
[57] = adapter
->stats
.rxerrc
;
447 regs_buff
[58] = adapter
->stats
.mpc
;
448 regs_buff
[59] = adapter
->stats
.scc
;
449 regs_buff
[60] = adapter
->stats
.ecol
;
450 regs_buff
[61] = adapter
->stats
.mcc
;
451 regs_buff
[62] = adapter
->stats
.latecol
;
452 regs_buff
[63] = adapter
->stats
.colc
;
453 regs_buff
[64] = adapter
->stats
.dc
;
454 regs_buff
[65] = adapter
->stats
.tncrs
;
455 regs_buff
[66] = adapter
->stats
.sec
;
456 regs_buff
[67] = adapter
->stats
.htdpmc
;
457 regs_buff
[68] = adapter
->stats
.rlec
;
458 regs_buff
[69] = adapter
->stats
.xonrxc
;
459 regs_buff
[70] = adapter
->stats
.xontxc
;
460 regs_buff
[71] = adapter
->stats
.xoffrxc
;
461 regs_buff
[72] = adapter
->stats
.xofftxc
;
462 regs_buff
[73] = adapter
->stats
.fcruc
;
463 regs_buff
[74] = adapter
->stats
.prc64
;
464 regs_buff
[75] = adapter
->stats
.prc127
;
465 regs_buff
[76] = adapter
->stats
.prc255
;
466 regs_buff
[77] = adapter
->stats
.prc511
;
467 regs_buff
[78] = adapter
->stats
.prc1023
;
468 regs_buff
[79] = adapter
->stats
.prc1522
;
469 regs_buff
[80] = adapter
->stats
.gprc
;
470 regs_buff
[81] = adapter
->stats
.bprc
;
471 regs_buff
[82] = adapter
->stats
.mprc
;
472 regs_buff
[83] = adapter
->stats
.gptc
;
473 regs_buff
[84] = adapter
->stats
.gorc
;
474 regs_buff
[86] = adapter
->stats
.gotc
;
475 regs_buff
[88] = adapter
->stats
.rnbc
;
476 regs_buff
[89] = adapter
->stats
.ruc
;
477 regs_buff
[90] = adapter
->stats
.rfc
;
478 regs_buff
[91] = adapter
->stats
.roc
;
479 regs_buff
[92] = adapter
->stats
.rjc
;
480 regs_buff
[93] = adapter
->stats
.mgprc
;
481 regs_buff
[94] = adapter
->stats
.mgpdc
;
482 regs_buff
[95] = adapter
->stats
.mgptc
;
483 regs_buff
[96] = adapter
->stats
.tor
;
484 regs_buff
[98] = adapter
->stats
.tot
;
485 regs_buff
[100] = adapter
->stats
.tpr
;
486 regs_buff
[101] = adapter
->stats
.tpt
;
487 regs_buff
[102] = adapter
->stats
.ptc64
;
488 regs_buff
[103] = adapter
->stats
.ptc127
;
489 regs_buff
[104] = adapter
->stats
.ptc255
;
490 regs_buff
[105] = adapter
->stats
.ptc511
;
491 regs_buff
[106] = adapter
->stats
.ptc1023
;
492 regs_buff
[107] = adapter
->stats
.ptc1522
;
493 regs_buff
[108] = adapter
->stats
.mptc
;
494 regs_buff
[109] = adapter
->stats
.bptc
;
495 regs_buff
[110] = adapter
->stats
.tsctc
;
496 regs_buff
[111] = adapter
->stats
.iac
;
497 regs_buff
[112] = adapter
->stats
.rpthc
;
498 regs_buff
[113] = adapter
->stats
.hgptc
;
499 regs_buff
[114] = adapter
->stats
.hgorc
;
500 regs_buff
[116] = adapter
->stats
.hgotc
;
501 regs_buff
[118] = adapter
->stats
.lenerrs
;
502 regs_buff
[119] = adapter
->stats
.scvpc
;
503 regs_buff
[120] = adapter
->stats
.hrmpc
;
505 /* These should probably be added to e1000_regs.h instead */
506 #define E1000_PSRTYPE_REG(_i) (0x05480 + ((_i) * 4))
507 #define E1000_IP4AT_REG(_i) (0x05840 + ((_i) * 8))
508 #define E1000_IP6AT_REG(_i) (0x05880 + ((_i) * 4))
509 #define E1000_WUPM_REG(_i) (0x05A00 + ((_i) * 4))
510 #define E1000_FFMT_REG(_i) (0x09000 + ((_i) * 8))
511 #define E1000_FFVT_REG(_i) (0x09800 + ((_i) * 8))
512 #define E1000_FFLT_REG(_i) (0x05F00 + ((_i) * 8))
514 for (i
= 0; i
< 4; i
++)
515 regs_buff
[121 + i
] = rd32(E1000_SRRCTL(i
));
516 for (i
= 0; i
< 4; i
++)
517 regs_buff
[125 + i
] = rd32(E1000_PSRTYPE_REG(i
));
518 for (i
= 0; i
< 4; i
++)
519 regs_buff
[129 + i
] = rd32(E1000_RDBAL(i
));
520 for (i
= 0; i
< 4; i
++)
521 regs_buff
[133 + i
] = rd32(E1000_RDBAH(i
));
522 for (i
= 0; i
< 4; i
++)
523 regs_buff
[137 + i
] = rd32(E1000_RDLEN(i
));
524 for (i
= 0; i
< 4; i
++)
525 regs_buff
[141 + i
] = rd32(E1000_RDH(i
));
526 for (i
= 0; i
< 4; i
++)
527 regs_buff
[145 + i
] = rd32(E1000_RDT(i
));
528 for (i
= 0; i
< 4; i
++)
529 regs_buff
[149 + i
] = rd32(E1000_RXDCTL(i
));
531 for (i
= 0; i
< 10; i
++)
532 regs_buff
[153 + i
] = rd32(E1000_EITR(i
));
533 for (i
= 0; i
< 8; i
++)
534 regs_buff
[163 + i
] = rd32(E1000_IMIR(i
));
535 for (i
= 0; i
< 8; i
++)
536 regs_buff
[171 + i
] = rd32(E1000_IMIREXT(i
));
537 for (i
= 0; i
< 16; i
++)
538 regs_buff
[179 + i
] = rd32(E1000_RAL(i
));
539 for (i
= 0; i
< 16; i
++)
540 regs_buff
[195 + i
] = rd32(E1000_RAH(i
));
542 for (i
= 0; i
< 4; i
++)
543 regs_buff
[211 + i
] = rd32(E1000_TDBAL(i
));
544 for (i
= 0; i
< 4; i
++)
545 regs_buff
[215 + i
] = rd32(E1000_TDBAH(i
));
546 for (i
= 0; i
< 4; i
++)
547 regs_buff
[219 + i
] = rd32(E1000_TDLEN(i
));
548 for (i
= 0; i
< 4; i
++)
549 regs_buff
[223 + i
] = rd32(E1000_TDH(i
));
550 for (i
= 0; i
< 4; i
++)
551 regs_buff
[227 + i
] = rd32(E1000_TDT(i
));
552 for (i
= 0; i
< 4; i
++)
553 regs_buff
[231 + i
] = rd32(E1000_TXDCTL(i
));
554 for (i
= 0; i
< 4; i
++)
555 regs_buff
[235 + i
] = rd32(E1000_TDWBAL(i
));
556 for (i
= 0; i
< 4; i
++)
557 regs_buff
[239 + i
] = rd32(E1000_TDWBAH(i
));
558 for (i
= 0; i
< 4; i
++)
559 regs_buff
[243 + i
] = rd32(E1000_DCA_TXCTRL(i
));
561 for (i
= 0; i
< 4; i
++)
562 regs_buff
[247 + i
] = rd32(E1000_IP4AT_REG(i
));
563 for (i
= 0; i
< 4; i
++)
564 regs_buff
[251 + i
] = rd32(E1000_IP6AT_REG(i
));
565 for (i
= 0; i
< 32; i
++)
566 regs_buff
[255 + i
] = rd32(E1000_WUPM_REG(i
));
567 for (i
= 0; i
< 128; i
++)
568 regs_buff
[287 + i
] = rd32(E1000_FFMT_REG(i
));
569 for (i
= 0; i
< 128; i
++)
570 regs_buff
[415 + i
] = rd32(E1000_FFVT_REG(i
));
571 for (i
= 0; i
< 4; i
++)
572 regs_buff
[543 + i
] = rd32(E1000_FFLT_REG(i
));
574 regs_buff
[547] = rd32(E1000_TDFH
);
575 regs_buff
[548] = rd32(E1000_TDFT
);
576 regs_buff
[549] = rd32(E1000_TDFHS
);
577 regs_buff
[550] = rd32(E1000_TDFPC
);
581 static int igb_get_eeprom_len(struct net_device
*netdev
)
583 struct igb_adapter
*adapter
= netdev_priv(netdev
);
584 return adapter
->hw
.nvm
.word_size
* 2;
587 static int igb_get_eeprom(struct net_device
*netdev
,
588 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
590 struct igb_adapter
*adapter
= netdev_priv(netdev
);
591 struct e1000_hw
*hw
= &adapter
->hw
;
593 int first_word
, last_word
;
597 if (eeprom
->len
== 0)
600 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
602 first_word
= eeprom
->offset
>> 1;
603 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
605 eeprom_buff
= kmalloc(sizeof(u16
) *
606 (last_word
- first_word
+ 1), GFP_KERNEL
);
610 if (hw
->nvm
.type
== e1000_nvm_eeprom_spi
)
611 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
,
612 last_word
- first_word
+ 1,
615 for (i
= 0; i
< last_word
- first_word
+ 1; i
++) {
616 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
+ i
, 1,
623 /* Device's eeprom is always little-endian, word addressable */
624 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
625 le16_to_cpus(&eeprom_buff
[i
]);
627 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 1),
634 static int igb_set_eeprom(struct net_device
*netdev
,
635 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
637 struct igb_adapter
*adapter
= netdev_priv(netdev
);
638 struct e1000_hw
*hw
= &adapter
->hw
;
641 int max_len
, first_word
, last_word
, ret_val
= 0;
644 if (eeprom
->len
== 0)
647 if (eeprom
->magic
!= (hw
->vendor_id
| (hw
->device_id
<< 16)))
650 max_len
= hw
->nvm
.word_size
* 2;
652 first_word
= eeprom
->offset
>> 1;
653 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
654 eeprom_buff
= kmalloc(max_len
, GFP_KERNEL
);
658 ptr
= (void *)eeprom_buff
;
660 if (eeprom
->offset
& 1) {
661 /* need read/modify/write of first changed EEPROM word */
662 /* only the second byte of the word is being modified */
663 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
, 1,
667 if (((eeprom
->offset
+ eeprom
->len
) & 1) && (ret_val
== 0)) {
668 /* need read/modify/write of last changed EEPROM word */
669 /* only the first byte of the word is being modified */
670 ret_val
= hw
->nvm
.ops
.read(hw
, last_word
, 1,
671 &eeprom_buff
[last_word
- first_word
]);
674 /* Device's eeprom is always little-endian, word addressable */
675 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
676 le16_to_cpus(&eeprom_buff
[i
]);
678 memcpy(ptr
, bytes
, eeprom
->len
);
680 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
681 eeprom_buff
[i
] = cpu_to_le16(eeprom_buff
[i
]);
683 ret_val
= hw
->nvm
.ops
.write(hw
, first_word
,
684 last_word
- first_word
+ 1, eeprom_buff
);
686 /* Update the checksum over the first part of the EEPROM if needed
687 * and flush shadow RAM for 82573 controllers */
688 if ((ret_val
== 0) && ((first_word
<= NVM_CHECKSUM_REG
)))
689 igb_update_nvm_checksum(hw
);
695 static void igb_get_drvinfo(struct net_device
*netdev
,
696 struct ethtool_drvinfo
*drvinfo
)
698 struct igb_adapter
*adapter
= netdev_priv(netdev
);
699 char firmware_version
[32];
702 strncpy(drvinfo
->driver
, igb_driver_name
, 32);
703 strncpy(drvinfo
->version
, igb_driver_version
, 32);
705 /* EEPROM image version # is reported as firmware version # for
706 * 82575 controllers */
707 adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, 5, 1, &eeprom_data
);
708 sprintf(firmware_version
, "%d.%d-%d",
709 (eeprom_data
& 0xF000) >> 12,
710 (eeprom_data
& 0x0FF0) >> 4,
711 eeprom_data
& 0x000F);
713 strncpy(drvinfo
->fw_version
, firmware_version
, 32);
714 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
), 32);
715 drvinfo
->n_stats
= IGB_STATS_LEN
;
716 drvinfo
->testinfo_len
= IGB_TEST_LEN
;
717 drvinfo
->regdump_len
= igb_get_regs_len(netdev
);
718 drvinfo
->eedump_len
= igb_get_eeprom_len(netdev
);
721 static void igb_get_ringparam(struct net_device
*netdev
,
722 struct ethtool_ringparam
*ring
)
724 struct igb_adapter
*adapter
= netdev_priv(netdev
);
726 ring
->rx_max_pending
= IGB_MAX_RXD
;
727 ring
->tx_max_pending
= IGB_MAX_TXD
;
728 ring
->rx_mini_max_pending
= 0;
729 ring
->rx_jumbo_max_pending
= 0;
730 ring
->rx_pending
= adapter
->rx_ring_count
;
731 ring
->tx_pending
= adapter
->tx_ring_count
;
732 ring
->rx_mini_pending
= 0;
733 ring
->rx_jumbo_pending
= 0;
736 static int igb_set_ringparam(struct net_device
*netdev
,
737 struct ethtool_ringparam
*ring
)
739 struct igb_adapter
*adapter
= netdev_priv(netdev
);
740 struct igb_ring
*temp_ring
;
742 u32 new_rx_count
, new_tx_count
;
744 if ((ring
->rx_mini_pending
) || (ring
->rx_jumbo_pending
))
747 new_rx_count
= max(ring
->rx_pending
, (u32
)IGB_MIN_RXD
);
748 new_rx_count
= min(new_rx_count
, (u32
)IGB_MAX_RXD
);
749 new_rx_count
= ALIGN(new_rx_count
, REQ_RX_DESCRIPTOR_MULTIPLE
);
751 new_tx_count
= max(ring
->tx_pending
, (u32
)IGB_MIN_TXD
);
752 new_tx_count
= min(new_tx_count
, (u32
)IGB_MAX_TXD
);
753 new_tx_count
= ALIGN(new_tx_count
, REQ_TX_DESCRIPTOR_MULTIPLE
);
755 if ((new_tx_count
== adapter
->tx_ring_count
) &&
756 (new_rx_count
== adapter
->rx_ring_count
)) {
761 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
764 if (!netif_running(adapter
->netdev
)) {
765 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
766 adapter
->tx_ring
[i
].count
= new_tx_count
;
767 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
768 adapter
->rx_ring
[i
].count
= new_rx_count
;
769 adapter
->tx_ring_count
= new_tx_count
;
770 adapter
->rx_ring_count
= new_rx_count
;
774 if (adapter
->num_tx_queues
> adapter
->num_rx_queues
)
775 temp_ring
= vmalloc(adapter
->num_tx_queues
* sizeof(struct igb_ring
));
777 temp_ring
= vmalloc(adapter
->num_rx_queues
* sizeof(struct igb_ring
));
787 * We can't just free everything and then setup again,
788 * because the ISRs in MSI-X mode get passed pointers
789 * to the tx and rx ring structs.
791 if (new_tx_count
!= adapter
->tx_ring_count
) {
792 memcpy(temp_ring
, adapter
->tx_ring
,
793 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
795 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
796 temp_ring
[i
].count
= new_tx_count
;
797 err
= igb_setup_tx_resources(&temp_ring
[i
]);
801 igb_free_tx_resources(&temp_ring
[i
]);
807 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
808 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
810 memcpy(adapter
->tx_ring
, temp_ring
,
811 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
813 adapter
->tx_ring_count
= new_tx_count
;
816 if (new_rx_count
!= adapter
->rx_ring
->count
) {
817 memcpy(temp_ring
, adapter
->rx_ring
,
818 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
820 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
821 temp_ring
[i
].count
= new_rx_count
;
822 err
= igb_setup_rx_resources(&temp_ring
[i
]);
826 igb_free_rx_resources(&temp_ring
[i
]);
833 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
834 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
836 memcpy(adapter
->rx_ring
, temp_ring
,
837 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
839 adapter
->rx_ring_count
= new_rx_count
;
845 clear_bit(__IGB_RESETTING
, &adapter
->state
);
849 /* ethtool register test data */
850 struct igb_reg_test
{
859 /* In the hardware, registers are laid out either singly, in arrays
860 * spaced 0x100 bytes apart, or in contiguous tables. We assume
861 * most tests take place on arrays or single registers (handled
862 * as a single-element array) and special-case the tables.
863 * Table tests are always pattern tests.
865 * We also make provision for some required setup steps by specifying
866 * registers to be written without any read-back testing.
869 #define PATTERN_TEST 1
870 #define SET_READ_TEST 2
871 #define WRITE_NO_TEST 3
872 #define TABLE32_TEST 4
873 #define TABLE64_TEST_LO 5
874 #define TABLE64_TEST_HI 6
877 static struct igb_reg_test reg_test_82576
[] = {
878 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
879 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
880 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
881 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
882 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
883 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
884 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
885 { E1000_RDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
886 { E1000_RDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
887 { E1000_RDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
888 /* Enable all RX queues before testing. */
889 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
890 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
891 /* RDH is read-only for 82576, only test RDT. */
892 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
893 { E1000_RDT(4), 0x40, 12, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
894 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
895 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, 0 },
896 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
897 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
898 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
899 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
900 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
901 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
902 { E1000_TDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
903 { E1000_TDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
904 { E1000_TDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
905 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
906 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
907 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
908 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
909 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
910 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
911 { E1000_RA2
, 0, 8, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
912 { E1000_RA2
, 0, 8, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
913 { E1000_MTA
, 0, 128,TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
917 /* 82575 register test */
918 static struct igb_reg_test reg_test_82575
[] = {
919 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
920 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
921 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
922 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
923 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
924 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
925 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
926 /* Enable all four RX queues before testing. */
927 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
928 /* RDH is read-only for 82575, only test RDT. */
929 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
930 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
931 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
932 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
933 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
934 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
935 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
936 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
937 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
938 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0x003FFFFB },
939 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0xFFFFFFFF },
940 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
941 { E1000_TXCW
, 0x100, 1, PATTERN_TEST
, 0xC000FFFF, 0x0000FFFF },
942 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
943 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x800FFFFF, 0xFFFFFFFF },
944 { E1000_MTA
, 0, 128, TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
948 static bool reg_pattern_test(struct igb_adapter
*adapter
, u64
*data
,
949 int reg
, u32 mask
, u32 write
)
951 struct e1000_hw
*hw
= &adapter
->hw
;
954 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
955 for (pat
= 0; pat
< ARRAY_SIZE(_test
); pat
++) {
956 wr32(reg
, (_test
[pat
] & write
));
958 if (val
!= (_test
[pat
] & write
& mask
)) {
959 dev_err(&adapter
->pdev
->dev
, "pattern test reg %04X "
960 "failed: got 0x%08X expected 0x%08X\n",
961 reg
, val
, (_test
[pat
] & write
& mask
));
969 static bool reg_set_and_check(struct igb_adapter
*adapter
, u64
*data
,
970 int reg
, u32 mask
, u32 write
)
972 struct e1000_hw
*hw
= &adapter
->hw
;
974 wr32(reg
, write
& mask
);
976 if ((write
& mask
) != (val
& mask
)) {
977 dev_err(&adapter
->pdev
->dev
, "set/check reg %04X test failed:"
978 " got 0x%08X expected 0x%08X\n", reg
,
979 (val
& mask
), (write
& mask
));
986 #define REG_PATTERN_TEST(reg, mask, write) \
988 if (reg_pattern_test(adapter, data, reg, mask, write)) \
992 #define REG_SET_AND_CHECK(reg, mask, write) \
994 if (reg_set_and_check(adapter, data, reg, mask, write)) \
998 static int igb_reg_test(struct igb_adapter
*adapter
, u64
*data
)
1000 struct e1000_hw
*hw
= &adapter
->hw
;
1001 struct igb_reg_test
*test
;
1002 u32 value
, before
, after
;
1005 toggle
= 0x7FFFF3FF;
1007 switch (adapter
->hw
.mac
.type
) {
1009 test
= reg_test_82576
;
1012 test
= reg_test_82575
;
1016 /* Because the status register is such a special case,
1017 * we handle it separately from the rest of the register
1018 * tests. Some bits are read-only, some toggle, and some
1019 * are writable on newer MACs.
1021 before
= rd32(E1000_STATUS
);
1022 value
= (rd32(E1000_STATUS
) & toggle
);
1023 wr32(E1000_STATUS
, toggle
);
1024 after
= rd32(E1000_STATUS
) & toggle
;
1025 if (value
!= after
) {
1026 dev_err(&adapter
->pdev
->dev
, "failed STATUS register test "
1027 "got: 0x%08X expected: 0x%08X\n", after
, value
);
1031 /* restore previous status */
1032 wr32(E1000_STATUS
, before
);
1034 /* Perform the remainder of the register test, looping through
1035 * the test table until we either fail or reach the null entry.
1038 for (i
= 0; i
< test
->array_len
; i
++) {
1039 switch (test
->test_type
) {
1041 REG_PATTERN_TEST(test
->reg
+
1042 (i
* test
->reg_offset
),
1047 REG_SET_AND_CHECK(test
->reg
+
1048 (i
* test
->reg_offset
),
1054 (adapter
->hw
.hw_addr
+ test
->reg
)
1055 + (i
* test
->reg_offset
));
1058 REG_PATTERN_TEST(test
->reg
+ (i
* 4),
1062 case TABLE64_TEST_LO
:
1063 REG_PATTERN_TEST(test
->reg
+ (i
* 8),
1067 case TABLE64_TEST_HI
:
1068 REG_PATTERN_TEST((test
->reg
+ 4) + (i
* 8),
1081 static int igb_eeprom_test(struct igb_adapter
*adapter
, u64
*data
)
1088 /* Read and add up the contents of the EEPROM */
1089 for (i
= 0; i
< (NVM_CHECKSUM_REG
+ 1); i
++) {
1090 if ((adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, i
, 1, &temp
))
1098 /* If Checksum is not Correct return error else test passed */
1099 if ((checksum
!= (u16
) NVM_SUM
) && !(*data
))
1105 static irqreturn_t
igb_test_intr(int irq
, void *data
)
1107 struct net_device
*netdev
= (struct net_device
*) data
;
1108 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1109 struct e1000_hw
*hw
= &adapter
->hw
;
1111 adapter
->test_icr
|= rd32(E1000_ICR
);
1116 static int igb_intr_test(struct igb_adapter
*adapter
, u64
*data
)
1118 struct e1000_hw
*hw
= &adapter
->hw
;
1119 struct net_device
*netdev
= adapter
->netdev
;
1120 u32 mask
, ics_mask
, i
= 0, shared_int
= true;
1121 u32 irq
= adapter
->pdev
->irq
;
1125 /* Hook up test interrupt handler just for this test */
1126 if (adapter
->msix_entries
)
1127 /* NOTE: we don't test MSI-X interrupts here, yet */
1130 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1132 if (request_irq(irq
, &igb_test_intr
, 0, netdev
->name
, netdev
)) {
1136 } else if (!request_irq(irq
, &igb_test_intr
, IRQF_PROBE_SHARED
,
1137 netdev
->name
, netdev
)) {
1139 } else if (request_irq(irq
, &igb_test_intr
, IRQF_SHARED
,
1140 netdev
->name
, netdev
)) {
1144 dev_info(&adapter
->pdev
->dev
, "testing %s interrupt\n",
1145 (shared_int
? "shared" : "unshared"));
1146 /* Disable all the interrupts */
1147 wr32(E1000_IMC
, 0xFFFFFFFF);
1150 /* Define all writable bits for ICS */
1151 switch(hw
->mac
.type
) {
1153 ics_mask
= 0x37F47EDD;
1156 ics_mask
= 0x77D4FBFD;
1159 ics_mask
= 0x7FFFFFFF;
1163 /* Test each interrupt */
1164 for (; i
< 31; i
++) {
1165 /* Interrupt to test */
1168 if (!(mask
& ics_mask
))
1172 /* Disable the interrupt to be reported in
1173 * the cause register and then force the same
1174 * interrupt and see if one gets posted. If
1175 * an interrupt was posted to the bus, the
1178 adapter
->test_icr
= 0;
1180 /* Flush any pending interrupts */
1181 wr32(E1000_ICR
, ~0);
1183 wr32(E1000_IMC
, mask
);
1184 wr32(E1000_ICS
, mask
);
1187 if (adapter
->test_icr
& mask
) {
1193 /* Enable the interrupt to be reported in
1194 * the cause register and then force the same
1195 * interrupt and see if one gets posted. If
1196 * an interrupt was not posted to the bus, the
1199 adapter
->test_icr
= 0;
1201 /* Flush any pending interrupts */
1202 wr32(E1000_ICR
, ~0);
1204 wr32(E1000_IMS
, mask
);
1205 wr32(E1000_ICS
, mask
);
1208 if (!(adapter
->test_icr
& mask
)) {
1214 /* Disable the other interrupts to be reported in
1215 * the cause register and then force the other
1216 * interrupts and see if any get posted. If
1217 * an interrupt was posted to the bus, the
1220 adapter
->test_icr
= 0;
1222 /* Flush any pending interrupts */
1223 wr32(E1000_ICR
, ~0);
1225 wr32(E1000_IMC
, ~mask
);
1226 wr32(E1000_ICS
, ~mask
);
1229 if (adapter
->test_icr
& mask
) {
1236 /* Disable all the interrupts */
1237 wr32(E1000_IMC
, ~0);
1240 /* Unhook test interrupt handler */
1241 free_irq(irq
, netdev
);
1246 static void igb_free_desc_rings(struct igb_adapter
*adapter
)
1248 igb_free_tx_resources(&adapter
->test_tx_ring
);
1249 igb_free_rx_resources(&adapter
->test_rx_ring
);
1252 static int igb_setup_desc_rings(struct igb_adapter
*adapter
)
1254 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1255 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1256 struct e1000_hw
*hw
= &adapter
->hw
;
1259 /* Setup Tx descriptor ring and Tx buffers */
1260 tx_ring
->count
= IGB_DEFAULT_TXD
;
1261 tx_ring
->pdev
= adapter
->pdev
;
1262 tx_ring
->netdev
= adapter
->netdev
;
1263 tx_ring
->reg_idx
= adapter
->vfs_allocated_count
;
1265 if (igb_setup_tx_resources(tx_ring
)) {
1270 igb_setup_tctl(adapter
);
1271 igb_configure_tx_ring(adapter
, tx_ring
);
1273 for (i
= 0; i
< tx_ring
->count
; i
++) {
1274 union e1000_adv_tx_desc
*tx_desc
;
1275 unsigned int size
= 1024;
1276 struct sk_buff
*skb
= alloc_skb(size
, GFP_KERNEL
);
1283 tx_ring
->buffer_info
[i
].skb
= skb
;
1284 tx_ring
->buffer_info
[i
].length
= skb
->len
;
1285 tx_ring
->buffer_info
[i
].dma
=
1286 pci_map_single(tx_ring
->pdev
, skb
->data
, skb
->len
,
1288 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
1289 tx_desc
->read
.buffer_addr
=
1290 cpu_to_le64(tx_ring
->buffer_info
[i
].dma
);
1291 tx_desc
->read
.olinfo_status
= cpu_to_le32(skb
->len
) <<
1292 E1000_ADVTXD_PAYLEN_SHIFT
;
1293 tx_desc
->read
.cmd_type_len
= cpu_to_le32(skb
->len
);
1294 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(E1000_TXD_CMD_EOP
|
1295 E1000_TXD_CMD_IFCS
|
1297 E1000_ADVTXD_DTYP_DATA
|
1298 E1000_ADVTXD_DCMD_DEXT
);
1301 /* Setup Rx descriptor ring and Rx buffers */
1302 rx_ring
->count
= IGB_DEFAULT_RXD
;
1303 rx_ring
->pdev
= adapter
->pdev
;
1304 rx_ring
->netdev
= adapter
->netdev
;
1305 rx_ring
->rx_buffer_len
= IGB_RXBUFFER_2048
;
1306 rx_ring
->reg_idx
= adapter
->vfs_allocated_count
;
1308 if (igb_setup_rx_resources(rx_ring
)) {
1313 /* set the default queue to queue 0 of PF */
1314 wr32(E1000_MRQC
, adapter
->vfs_allocated_count
<< 3);
1316 /* enable receive ring */
1317 igb_setup_rctl(adapter
);
1318 igb_configure_rx_ring(adapter
, rx_ring
);
1320 igb_alloc_rx_buffers_adv(rx_ring
, igb_desc_unused(rx_ring
));
1325 igb_free_desc_rings(adapter
);
1329 static void igb_phy_disable_receiver(struct igb_adapter
*adapter
)
1331 struct e1000_hw
*hw
= &adapter
->hw
;
1333 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1334 igb_write_phy_reg(hw
, 29, 0x001F);
1335 igb_write_phy_reg(hw
, 30, 0x8FFC);
1336 igb_write_phy_reg(hw
, 29, 0x001A);
1337 igb_write_phy_reg(hw
, 30, 0x8FF0);
1340 static int igb_integrated_phy_loopback(struct igb_adapter
*adapter
)
1342 struct e1000_hw
*hw
= &adapter
->hw
;
1345 hw
->mac
.autoneg
= false;
1347 if (hw
->phy
.type
== e1000_phy_m88
) {
1348 /* Auto-MDI/MDIX Off */
1349 igb_write_phy_reg(hw
, M88E1000_PHY_SPEC_CTRL
, 0x0808);
1350 /* reset to update Auto-MDI/MDIX */
1351 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x9140);
1353 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x8140);
1356 ctrl_reg
= rd32(E1000_CTRL
);
1358 /* force 1000, set loopback */
1359 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x4140);
1361 /* Now set up the MAC to the same speed/duplex as the PHY. */
1362 ctrl_reg
= rd32(E1000_CTRL
);
1363 ctrl_reg
&= ~E1000_CTRL_SPD_SEL
; /* Clear the speed sel bits */
1364 ctrl_reg
|= (E1000_CTRL_FRCSPD
| /* Set the Force Speed Bit */
1365 E1000_CTRL_FRCDPX
| /* Set the Force Duplex Bit */
1366 E1000_CTRL_SPD_1000
|/* Force Speed to 1000 */
1367 E1000_CTRL_FD
| /* Force Duplex to FULL */
1368 E1000_CTRL_SLU
); /* Set link up enable bit */
1370 if (hw
->phy
.type
== e1000_phy_m88
)
1371 ctrl_reg
|= E1000_CTRL_ILOS
; /* Invert Loss of Signal */
1373 wr32(E1000_CTRL
, ctrl_reg
);
1375 /* Disable the receiver on the PHY so when a cable is plugged in, the
1376 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1378 if (hw
->phy
.type
== e1000_phy_m88
)
1379 igb_phy_disable_receiver(adapter
);
1386 static int igb_set_phy_loopback(struct igb_adapter
*adapter
)
1388 return igb_integrated_phy_loopback(adapter
);
1391 static int igb_setup_loopback_test(struct igb_adapter
*adapter
)
1393 struct e1000_hw
*hw
= &adapter
->hw
;
1396 if (hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1397 reg
= rd32(E1000_RCTL
);
1398 reg
|= E1000_RCTL_LBM_TCVR
;
1399 wr32(E1000_RCTL
, reg
);
1401 wr32(E1000_SCTL
, E1000_ENABLE_SERDES_LOOPBACK
);
1403 reg
= rd32(E1000_CTRL
);
1404 reg
&= ~(E1000_CTRL_RFCE
|
1407 reg
|= E1000_CTRL_SLU
|
1409 wr32(E1000_CTRL
, reg
);
1411 /* Unset switch control to serdes energy detect */
1412 reg
= rd32(E1000_CONNSW
);
1413 reg
&= ~E1000_CONNSW_ENRGSRC
;
1414 wr32(E1000_CONNSW
, reg
);
1416 /* Set PCS register for forced speed */
1417 reg
= rd32(E1000_PCS_LCTL
);
1418 reg
&= ~E1000_PCS_LCTL_AN_ENABLE
; /* Disable Autoneg*/
1419 reg
|= E1000_PCS_LCTL_FLV_LINK_UP
| /* Force link up */
1420 E1000_PCS_LCTL_FSV_1000
| /* Force 1000 */
1421 E1000_PCS_LCTL_FDV_FULL
| /* SerDes Full duplex */
1422 E1000_PCS_LCTL_FSD
| /* Force Speed */
1423 E1000_PCS_LCTL_FORCE_LINK
; /* Force Link */
1424 wr32(E1000_PCS_LCTL
, reg
);
1427 } else if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1428 return igb_set_phy_loopback(adapter
);
1434 static void igb_loopback_cleanup(struct igb_adapter
*adapter
)
1436 struct e1000_hw
*hw
= &adapter
->hw
;
1440 rctl
= rd32(E1000_RCTL
);
1441 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1442 wr32(E1000_RCTL
, rctl
);
1444 hw
->mac
.autoneg
= true;
1445 igb_read_phy_reg(hw
, PHY_CONTROL
, &phy_reg
);
1446 if (phy_reg
& MII_CR_LOOPBACK
) {
1447 phy_reg
&= ~MII_CR_LOOPBACK
;
1448 igb_write_phy_reg(hw
, PHY_CONTROL
, phy_reg
);
1449 igb_phy_sw_reset(hw
);
1453 static void igb_create_lbtest_frame(struct sk_buff
*skb
,
1454 unsigned int frame_size
)
1456 memset(skb
->data
, 0xFF, frame_size
);
1458 memset(&skb
->data
[frame_size
/ 2], 0xAA, frame_size
/ 2 - 1);
1459 memset(&skb
->data
[frame_size
/ 2 + 10], 0xBE, 1);
1460 memset(&skb
->data
[frame_size
/ 2 + 12], 0xAF, 1);
1463 static int igb_check_lbtest_frame(struct sk_buff
*skb
, unsigned int frame_size
)
1466 if (*(skb
->data
+ 3) == 0xFF)
1467 if ((*(skb
->data
+ frame_size
/ 2 + 10) == 0xBE) &&
1468 (*(skb
->data
+ frame_size
/ 2 + 12) == 0xAF))
1473 static int igb_run_loopback_test(struct igb_adapter
*adapter
)
1475 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1476 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1477 int i
, j
, k
, l
, lc
, good_cnt
, ret_val
= 0;
1480 writel(rx_ring
->count
- 1, rx_ring
->tail
);
1482 /* Calculate the loop count based on the largest descriptor ring
1483 * The idea is to wrap the largest ring a number of times using 64
1484 * send/receive pairs during each loop
1487 if (rx_ring
->count
<= tx_ring
->count
)
1488 lc
= ((tx_ring
->count
/ 64) * 2) + 1;
1490 lc
= ((rx_ring
->count
/ 64) * 2) + 1;
1493 for (j
= 0; j
<= lc
; j
++) { /* loop count loop */
1494 for (i
= 0; i
< 64; i
++) { /* send the packets */
1495 igb_create_lbtest_frame(tx_ring
->buffer_info
[k
].skb
,
1497 pci_dma_sync_single_for_device(tx_ring
->pdev
,
1498 tx_ring
->buffer_info
[k
].dma
,
1499 tx_ring
->buffer_info
[k
].length
,
1502 if (k
== tx_ring
->count
)
1505 writel(k
, tx_ring
->tail
);
1507 time
= jiffies
; /* set the start time for the receive */
1509 do { /* receive the sent packets */
1510 pci_dma_sync_single_for_cpu(rx_ring
->pdev
,
1511 rx_ring
->buffer_info
[l
].dma
,
1513 PCI_DMA_FROMDEVICE
);
1515 ret_val
= igb_check_lbtest_frame(
1516 rx_ring
->buffer_info
[l
].skb
, 1024);
1520 if (l
== rx_ring
->count
)
1522 /* time + 20 msecs (200 msecs on 2.4) is more than
1523 * enough time to complete the receives, if it's
1524 * exceeded, break and error off
1526 } while (good_cnt
< 64 && jiffies
< (time
+ 20));
1527 if (good_cnt
!= 64) {
1528 ret_val
= 13; /* ret_val is the same as mis-compare */
1531 if (jiffies
>= (time
+ 20)) {
1532 ret_val
= 14; /* error code for time out error */
1535 } /* end loop count loop */
1539 static int igb_loopback_test(struct igb_adapter
*adapter
, u64
*data
)
1541 /* PHY loopback cannot be performed if SoL/IDER
1542 * sessions are active */
1543 if (igb_check_reset_block(&adapter
->hw
)) {
1544 dev_err(&adapter
->pdev
->dev
,
1545 "Cannot do PHY loopback test "
1546 "when SoL/IDER is active.\n");
1550 *data
= igb_setup_desc_rings(adapter
);
1553 *data
= igb_setup_loopback_test(adapter
);
1556 *data
= igb_run_loopback_test(adapter
);
1557 igb_loopback_cleanup(adapter
);
1560 igb_free_desc_rings(adapter
);
1565 static int igb_link_test(struct igb_adapter
*adapter
, u64
*data
)
1567 struct e1000_hw
*hw
= &adapter
->hw
;
1569 if (hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1571 hw
->mac
.serdes_has_link
= false;
1573 /* On some blade server designs, link establishment
1574 * could take as long as 2-3 minutes */
1576 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1577 if (hw
->mac
.serdes_has_link
)
1580 } while (i
++ < 3750);
1584 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1585 if (hw
->mac
.autoneg
)
1588 if (!(rd32(E1000_STATUS
) &
1595 static void igb_diag_test(struct net_device
*netdev
,
1596 struct ethtool_test
*eth_test
, u64
*data
)
1598 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1599 u16 autoneg_advertised
;
1600 u8 forced_speed_duplex
, autoneg
;
1601 bool if_running
= netif_running(netdev
);
1603 set_bit(__IGB_TESTING
, &adapter
->state
);
1604 if (eth_test
->flags
== ETH_TEST_FL_OFFLINE
) {
1607 /* save speed, duplex, autoneg settings */
1608 autoneg_advertised
= adapter
->hw
.phy
.autoneg_advertised
;
1609 forced_speed_duplex
= adapter
->hw
.mac
.forced_speed_duplex
;
1610 autoneg
= adapter
->hw
.mac
.autoneg
;
1612 dev_info(&adapter
->pdev
->dev
, "offline testing starting\n");
1614 /* Link test performed before hardware reset so autoneg doesn't
1615 * interfere with test result */
1616 if (igb_link_test(adapter
, &data
[4]))
1617 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1620 /* indicate we're in test mode */
1625 if (igb_reg_test(adapter
, &data
[0]))
1626 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1629 if (igb_eeprom_test(adapter
, &data
[1]))
1630 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1633 if (igb_intr_test(adapter
, &data
[2]))
1634 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1637 if (igb_loopback_test(adapter
, &data
[3]))
1638 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1640 /* restore speed, duplex, autoneg settings */
1641 adapter
->hw
.phy
.autoneg_advertised
= autoneg_advertised
;
1642 adapter
->hw
.mac
.forced_speed_duplex
= forced_speed_duplex
;
1643 adapter
->hw
.mac
.autoneg
= autoneg
;
1645 /* force this routine to wait until autoneg complete/timeout */
1646 adapter
->hw
.phy
.autoneg_wait_to_complete
= true;
1648 adapter
->hw
.phy
.autoneg_wait_to_complete
= false;
1650 clear_bit(__IGB_TESTING
, &adapter
->state
);
1654 dev_info(&adapter
->pdev
->dev
, "online testing starting\n");
1656 if (igb_link_test(adapter
, &data
[4]))
1657 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1659 /* Online tests aren't run; pass by default */
1665 clear_bit(__IGB_TESTING
, &adapter
->state
);
1667 msleep_interruptible(4 * 1000);
1670 static int igb_wol_exclusion(struct igb_adapter
*adapter
,
1671 struct ethtool_wolinfo
*wol
)
1673 struct e1000_hw
*hw
= &adapter
->hw
;
1674 int retval
= 1; /* fail by default */
1676 switch (hw
->device_id
) {
1677 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1678 /* WoL not supported */
1681 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1682 case E1000_DEV_ID_82576_FIBER
:
1683 case E1000_DEV_ID_82576_SERDES
:
1684 /* Wake events not supported on port B */
1685 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
) {
1689 /* return success for non excluded adapter ports */
1692 case E1000_DEV_ID_82576_QUAD_COPPER
:
1693 /* quad port adapters only support WoL on port A */
1694 if (!(adapter
->flags
& IGB_FLAG_QUAD_PORT_A
)) {
1698 /* return success for non excluded adapter ports */
1702 /* dual port cards only support WoL on port A from now on
1703 * unless it was enabled in the eeprom for port B
1704 * so exclude FUNC_1 ports from having WoL enabled */
1705 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
&&
1706 !adapter
->eeprom_wol
) {
1717 static void igb_get_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1719 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1721 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
|
1722 WAKE_BCAST
| WAKE_MAGIC
;
1725 /* this function will set ->supported = 0 and return 1 if wol is not
1726 * supported by this hardware */
1727 if (igb_wol_exclusion(adapter
, wol
) ||
1728 !device_can_wakeup(&adapter
->pdev
->dev
))
1731 /* apply any specific unsupported masks here */
1732 switch (adapter
->hw
.device_id
) {
1737 if (adapter
->wol
& E1000_WUFC_EX
)
1738 wol
->wolopts
|= WAKE_UCAST
;
1739 if (adapter
->wol
& E1000_WUFC_MC
)
1740 wol
->wolopts
|= WAKE_MCAST
;
1741 if (adapter
->wol
& E1000_WUFC_BC
)
1742 wol
->wolopts
|= WAKE_BCAST
;
1743 if (adapter
->wol
& E1000_WUFC_MAG
)
1744 wol
->wolopts
|= WAKE_MAGIC
;
1749 static int igb_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1751 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1753 if (wol
->wolopts
& (WAKE_PHY
| WAKE_ARP
| WAKE_MAGICSECURE
))
1756 if (igb_wol_exclusion(adapter
, wol
) ||
1757 !device_can_wakeup(&adapter
->pdev
->dev
))
1758 return wol
->wolopts
? -EOPNOTSUPP
: 0;
1760 /* these settings will always override what we currently have */
1763 if (wol
->wolopts
& WAKE_UCAST
)
1764 adapter
->wol
|= E1000_WUFC_EX
;
1765 if (wol
->wolopts
& WAKE_MCAST
)
1766 adapter
->wol
|= E1000_WUFC_MC
;
1767 if (wol
->wolopts
& WAKE_BCAST
)
1768 adapter
->wol
|= E1000_WUFC_BC
;
1769 if (wol
->wolopts
& WAKE_MAGIC
)
1770 adapter
->wol
|= E1000_WUFC_MAG
;
1772 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1777 /* bit defines for adapter->led_status */
1778 #define IGB_LED_ON 0
1780 static int igb_phys_id(struct net_device
*netdev
, u32 data
)
1782 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1783 struct e1000_hw
*hw
= &adapter
->hw
;
1785 if (!data
|| data
> (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
))
1786 data
= (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
);
1789 msleep_interruptible(data
* 1000);
1792 clear_bit(IGB_LED_ON
, &adapter
->led_status
);
1793 igb_cleanup_led(hw
);
1798 static int igb_set_coalesce(struct net_device
*netdev
,
1799 struct ethtool_coalesce
*ec
)
1801 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1804 if ((ec
->rx_coalesce_usecs
> IGB_MAX_ITR_USECS
) ||
1805 ((ec
->rx_coalesce_usecs
> 3) &&
1806 (ec
->rx_coalesce_usecs
< IGB_MIN_ITR_USECS
)) ||
1807 (ec
->rx_coalesce_usecs
== 2))
1810 /* convert to rate of irq's per second */
1811 if (ec
->rx_coalesce_usecs
&& ec
->rx_coalesce_usecs
<= 3) {
1812 adapter
->itr_setting
= ec
->rx_coalesce_usecs
;
1813 adapter
->itr
= IGB_START_ITR
;
1815 adapter
->itr_setting
= ec
->rx_coalesce_usecs
<< 2;
1816 adapter
->itr
= adapter
->itr_setting
;
1819 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1820 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
1821 q_vector
->itr_val
= adapter
->itr
;
1822 q_vector
->set_itr
= 1;
1828 static int igb_get_coalesce(struct net_device
*netdev
,
1829 struct ethtool_coalesce
*ec
)
1831 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1833 if (adapter
->itr_setting
<= 3)
1834 ec
->rx_coalesce_usecs
= adapter
->itr_setting
;
1836 ec
->rx_coalesce_usecs
= adapter
->itr_setting
>> 2;
1842 static int igb_nway_reset(struct net_device
*netdev
)
1844 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1845 if (netif_running(netdev
))
1846 igb_reinit_locked(adapter
);
1850 static int igb_get_sset_count(struct net_device
*netdev
, int sset
)
1854 return IGB_STATS_LEN
;
1856 return IGB_TEST_LEN
;
1862 static void igb_get_ethtool_stats(struct net_device
*netdev
,
1863 struct ethtool_stats
*stats
, u64
*data
)
1865 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1867 int stat_count_tx
= sizeof(struct igb_tx_queue_stats
) / sizeof(u64
);
1868 int stat_count_rx
= sizeof(struct igb_rx_queue_stats
) / sizeof(u64
);
1873 igb_update_stats(adapter
);
1874 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
1875 switch (igb_gstrings_stats
[i
].type
) {
1877 p
= (char *) netdev
+
1878 igb_gstrings_stats
[i
].stat_offset
;
1881 p
= (char *) adapter
+
1882 igb_gstrings_stats
[i
].stat_offset
;
1886 data
[i
] = (igb_gstrings_stats
[i
].sizeof_stat
==
1887 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
1889 for (j
= 0; j
< adapter
->num_tx_queues
; j
++) {
1891 queue_stat
= (u64
*)&adapter
->tx_ring
[j
].tx_stats
;
1892 for (k
= 0; k
< stat_count_tx
; k
++)
1893 data
[i
+ k
] = queue_stat
[k
];
1896 for (j
= 0; j
< adapter
->num_rx_queues
; j
++) {
1898 queue_stat
= (u64
*)&adapter
->rx_ring
[j
].rx_stats
;
1899 for (k
= 0; k
< stat_count_rx
; k
++)
1900 data
[i
+ k
] = queue_stat
[k
];
1905 static void igb_get_strings(struct net_device
*netdev
, u32 stringset
, u8
*data
)
1907 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1911 switch (stringset
) {
1913 memcpy(data
, *igb_gstrings_test
,
1914 IGB_TEST_LEN
*ETH_GSTRING_LEN
);
1917 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
1918 memcpy(p
, igb_gstrings_stats
[i
].stat_string
,
1920 p
+= ETH_GSTRING_LEN
;
1922 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1923 sprintf(p
, "tx_queue_%u_packets", i
);
1924 p
+= ETH_GSTRING_LEN
;
1925 sprintf(p
, "tx_queue_%u_bytes", i
);
1926 p
+= ETH_GSTRING_LEN
;
1927 sprintf(p
, "tx_queue_%u_restart", i
);
1928 p
+= ETH_GSTRING_LEN
;
1930 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1931 sprintf(p
, "rx_queue_%u_packets", i
);
1932 p
+= ETH_GSTRING_LEN
;
1933 sprintf(p
, "rx_queue_%u_bytes", i
);
1934 p
+= ETH_GSTRING_LEN
;
1935 sprintf(p
, "rx_queue_%u_drops", i
);
1936 p
+= ETH_GSTRING_LEN
;
1937 sprintf(p
, "rx_queue_%u_csum_err", i
);
1938 p
+= ETH_GSTRING_LEN
;
1939 sprintf(p
, "rx_queue_%u_alloc_failed", i
);
1940 p
+= ETH_GSTRING_LEN
;
1942 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
1947 static const struct ethtool_ops igb_ethtool_ops
= {
1948 .get_settings
= igb_get_settings
,
1949 .set_settings
= igb_set_settings
,
1950 .get_drvinfo
= igb_get_drvinfo
,
1951 .get_regs_len
= igb_get_regs_len
,
1952 .get_regs
= igb_get_regs
,
1953 .get_wol
= igb_get_wol
,
1954 .set_wol
= igb_set_wol
,
1955 .get_msglevel
= igb_get_msglevel
,
1956 .set_msglevel
= igb_set_msglevel
,
1957 .nway_reset
= igb_nway_reset
,
1958 .get_link
= ethtool_op_get_link
,
1959 .get_eeprom_len
= igb_get_eeprom_len
,
1960 .get_eeprom
= igb_get_eeprom
,
1961 .set_eeprom
= igb_set_eeprom
,
1962 .get_ringparam
= igb_get_ringparam
,
1963 .set_ringparam
= igb_set_ringparam
,
1964 .get_pauseparam
= igb_get_pauseparam
,
1965 .set_pauseparam
= igb_set_pauseparam
,
1966 .get_rx_csum
= igb_get_rx_csum
,
1967 .set_rx_csum
= igb_set_rx_csum
,
1968 .get_tx_csum
= igb_get_tx_csum
,
1969 .set_tx_csum
= igb_set_tx_csum
,
1970 .get_sg
= ethtool_op_get_sg
,
1971 .set_sg
= ethtool_op_set_sg
,
1972 .get_tso
= ethtool_op_get_tso
,
1973 .set_tso
= igb_set_tso
,
1974 .self_test
= igb_diag_test
,
1975 .get_strings
= igb_get_strings
,
1976 .phys_id
= igb_phys_id
,
1977 .get_sset_count
= igb_get_sset_count
,
1978 .get_ethtool_stats
= igb_get_ethtool_stats
,
1979 .get_coalesce
= igb_get_coalesce
,
1980 .set_coalesce
= igb_set_coalesce
,
1983 void igb_set_ethtool_ops(struct net_device
*netdev
)
1985 SET_ETHTOOL_OPS(netdev
, &igb_ethtool_ops
);