1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for igb */
30 #include <linux/vmalloc.h>
31 #include <linux/netdevice.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/if_ether.h>
36 #include <linux/ethtool.h>
40 enum {NETDEV_STATS
, IGB_STATS
};
43 char stat_string
[ETH_GSTRING_LEN
];
49 #define IGB_STAT(m) IGB_STATS, \
50 FIELD_SIZEOF(struct igb_adapter, m), \
51 offsetof(struct igb_adapter, m)
52 #define IGB_NETDEV_STAT(m) NETDEV_STATS, \
53 FIELD_SIZEOF(struct net_device, m), \
54 offsetof(struct net_device, m)
56 static const struct igb_stats igb_gstrings_stats
[] = {
57 { "rx_packets", IGB_STAT(stats
.gprc
) },
58 { "tx_packets", IGB_STAT(stats
.gptc
) },
59 { "rx_bytes", IGB_STAT(stats
.gorc
) },
60 { "tx_bytes", IGB_STAT(stats
.gotc
) },
61 { "rx_broadcast", IGB_STAT(stats
.bprc
) },
62 { "tx_broadcast", IGB_STAT(stats
.bptc
) },
63 { "rx_multicast", IGB_STAT(stats
.mprc
) },
64 { "tx_multicast", IGB_STAT(stats
.mptc
) },
65 { "rx_errors", IGB_NETDEV_STAT(stats
.rx_errors
) },
66 { "tx_errors", IGB_NETDEV_STAT(stats
.tx_errors
) },
67 { "tx_dropped", IGB_NETDEV_STAT(stats
.tx_dropped
) },
68 { "multicast", IGB_STAT(stats
.mprc
) },
69 { "collisions", IGB_STAT(stats
.colc
) },
70 { "rx_length_errors", IGB_NETDEV_STAT(stats
.rx_length_errors
) },
71 { "rx_over_errors", IGB_NETDEV_STAT(stats
.rx_over_errors
) },
72 { "rx_crc_errors", IGB_STAT(stats
.crcerrs
) },
73 { "rx_frame_errors", IGB_NETDEV_STAT(stats
.rx_frame_errors
) },
74 { "rx_no_buffer_count", IGB_STAT(stats
.rnbc
) },
75 { "rx_queue_drop_packet_count", IGB_NETDEV_STAT(stats
.rx_fifo_errors
) },
76 { "rx_missed_errors", IGB_STAT(stats
.mpc
) },
77 { "tx_aborted_errors", IGB_STAT(stats
.ecol
) },
78 { "tx_carrier_errors", IGB_STAT(stats
.tncrs
) },
79 { "tx_fifo_errors", IGB_NETDEV_STAT(stats
.tx_fifo_errors
) },
80 { "tx_heartbeat_errors", IGB_NETDEV_STAT(stats
.tx_heartbeat_errors
) },
81 { "tx_window_errors", IGB_STAT(stats
.latecol
) },
82 { "tx_abort_late_coll", IGB_STAT(stats
.latecol
) },
83 { "tx_deferred_ok", IGB_STAT(stats
.dc
) },
84 { "tx_single_coll_ok", IGB_STAT(stats
.scc
) },
85 { "tx_multi_coll_ok", IGB_STAT(stats
.mcc
) },
86 { "tx_timeout_count", IGB_STAT(tx_timeout_count
) },
87 { "rx_long_length_errors", IGB_STAT(stats
.roc
) },
88 { "rx_short_length_errors", IGB_STAT(stats
.ruc
) },
89 { "rx_align_errors", IGB_STAT(stats
.algnerrc
) },
90 { "tx_tcp_seg_good", IGB_STAT(stats
.tsctc
) },
91 { "tx_tcp_seg_failed", IGB_STAT(stats
.tsctfc
) },
92 { "rx_flow_control_xon", IGB_STAT(stats
.xonrxc
) },
93 { "rx_flow_control_xoff", IGB_STAT(stats
.xoffrxc
) },
94 { "tx_flow_control_xon", IGB_STAT(stats
.xontxc
) },
95 { "tx_flow_control_xoff", IGB_STAT(stats
.xofftxc
) },
96 { "rx_long_byte_count", IGB_STAT(stats
.gorc
) },
97 { "tx_dma_out_of_sync", IGB_STAT(stats
.doosync
) },
98 { "tx_smbus", IGB_STAT(stats
.mgptc
) },
99 { "rx_smbus", IGB_STAT(stats
.mgprc
) },
100 { "dropped_smbus", IGB_STAT(stats
.mgpdc
) },
103 #define IGB_QUEUE_STATS_LEN \
104 (((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues)* \
105 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))) + \
106 ((((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
107 (sizeof(struct igb_tx_queue_stats) / sizeof(u64))))
108 #define IGB_GLOBAL_STATS_LEN \
109 sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
110 #define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
111 static const char igb_gstrings_test
[][ETH_GSTRING_LEN
] = {
112 "Register test (offline)", "Eeprom test (offline)",
113 "Interrupt test (offline)", "Loopback test (offline)",
114 "Link test (on/offline)"
116 #define IGB_TEST_LEN sizeof(igb_gstrings_test) / ETH_GSTRING_LEN
118 static int igb_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
120 struct igb_adapter
*adapter
= netdev_priv(netdev
);
121 struct e1000_hw
*hw
= &adapter
->hw
;
123 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
125 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
126 SUPPORTED_10baseT_Full
|
127 SUPPORTED_100baseT_Half
|
128 SUPPORTED_100baseT_Full
|
129 SUPPORTED_1000baseT_Full
|
132 ecmd
->advertising
= ADVERTISED_TP
;
134 if (hw
->mac
.autoneg
== 1) {
135 ecmd
->advertising
|= ADVERTISED_Autoneg
;
136 /* the e1000 autoneg seems to match ethtool nicely */
137 ecmd
->advertising
|= hw
->phy
.autoneg_advertised
;
140 ecmd
->port
= PORT_TP
;
141 ecmd
->phy_address
= hw
->phy
.addr
;
143 ecmd
->supported
= (SUPPORTED_1000baseT_Full
|
147 ecmd
->advertising
= (ADVERTISED_1000baseT_Full
|
151 ecmd
->port
= PORT_FIBRE
;
154 ecmd
->transceiver
= XCVR_INTERNAL
;
156 if (rd32(E1000_STATUS
) & E1000_STATUS_LU
) {
158 adapter
->hw
.mac
.ops
.get_speed_and_duplex(hw
,
159 &adapter
->link_speed
,
160 &adapter
->link_duplex
);
161 ecmd
->speed
= adapter
->link_speed
;
163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
164 * and HALF_DUPLEX != DUPLEX_HALF */
166 if (adapter
->link_duplex
== FULL_DUPLEX
)
167 ecmd
->duplex
= DUPLEX_FULL
;
169 ecmd
->duplex
= DUPLEX_HALF
;
175 ecmd
->autoneg
= hw
->mac
.autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
;
179 static int igb_set_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
181 struct igb_adapter
*adapter
= netdev_priv(netdev
);
182 struct e1000_hw
*hw
= &adapter
->hw
;
184 /* When SoL/IDER sessions are active, autoneg/speed/duplex
185 * cannot be changed */
186 if (igb_check_reset_block(hw
)) {
187 dev_err(&adapter
->pdev
->dev
, "Cannot change link "
188 "characteristics when SoL/IDER is active.\n");
192 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
195 if (ecmd
->autoneg
== AUTONEG_ENABLE
) {
197 hw
->phy
.autoneg_advertised
= ecmd
->advertising
|
200 ecmd
->advertising
= hw
->phy
.autoneg_advertised
;
201 if (adapter
->fc_autoneg
)
202 hw
->fc
.requested_mode
= e1000_fc_default
;
204 if (igb_set_spd_dplx(adapter
, ecmd
->speed
+ ecmd
->duplex
)) {
205 clear_bit(__IGB_RESETTING
, &adapter
->state
);
211 if (netif_running(adapter
->netdev
)) {
217 clear_bit(__IGB_RESETTING
, &adapter
->state
);
221 static void igb_get_pauseparam(struct net_device
*netdev
,
222 struct ethtool_pauseparam
*pause
)
224 struct igb_adapter
*adapter
= netdev_priv(netdev
);
225 struct e1000_hw
*hw
= &adapter
->hw
;
228 (adapter
->fc_autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
);
230 if (hw
->fc
.current_mode
== e1000_fc_rx_pause
)
232 else if (hw
->fc
.current_mode
== e1000_fc_tx_pause
)
234 else if (hw
->fc
.current_mode
== e1000_fc_full
) {
240 static int igb_set_pauseparam(struct net_device
*netdev
,
241 struct ethtool_pauseparam
*pause
)
243 struct igb_adapter
*adapter
= netdev_priv(netdev
);
244 struct e1000_hw
*hw
= &adapter
->hw
;
247 adapter
->fc_autoneg
= pause
->autoneg
;
249 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
252 if (adapter
->fc_autoneg
== AUTONEG_ENABLE
) {
253 hw
->fc
.requested_mode
= e1000_fc_default
;
254 if (netif_running(adapter
->netdev
)) {
260 if (pause
->rx_pause
&& pause
->tx_pause
)
261 hw
->fc
.requested_mode
= e1000_fc_full
;
262 else if (pause
->rx_pause
&& !pause
->tx_pause
)
263 hw
->fc
.requested_mode
= e1000_fc_rx_pause
;
264 else if (!pause
->rx_pause
&& pause
->tx_pause
)
265 hw
->fc
.requested_mode
= e1000_fc_tx_pause
;
266 else if (!pause
->rx_pause
&& !pause
->tx_pause
)
267 hw
->fc
.requested_mode
= e1000_fc_none
;
269 hw
->fc
.current_mode
= hw
->fc
.requested_mode
;
271 retval
= ((hw
->phy
.media_type
== e1000_media_type_copper
) ?
272 igb_force_mac_fc(hw
) : igb_setup_link(hw
));
275 clear_bit(__IGB_RESETTING
, &adapter
->state
);
279 static u32
igb_get_rx_csum(struct net_device
*netdev
)
281 struct igb_adapter
*adapter
= netdev_priv(netdev
);
282 return !(adapter
->flags
& IGB_FLAG_RX_CSUM_DISABLED
);
285 static int igb_set_rx_csum(struct net_device
*netdev
, u32 data
)
287 struct igb_adapter
*adapter
= netdev_priv(netdev
);
290 adapter
->flags
&= ~IGB_FLAG_RX_CSUM_DISABLED
;
292 adapter
->flags
|= IGB_FLAG_RX_CSUM_DISABLED
;
297 static u32
igb_get_tx_csum(struct net_device
*netdev
)
299 return (netdev
->features
& NETIF_F_IP_CSUM
) != 0;
302 static int igb_set_tx_csum(struct net_device
*netdev
, u32 data
)
304 struct igb_adapter
*adapter
= netdev_priv(netdev
);
307 netdev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
);
308 if (adapter
->hw
.mac
.type
== e1000_82576
)
309 netdev
->features
|= NETIF_F_SCTP_CSUM
;
311 netdev
->features
&= ~(NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
|
318 static int igb_set_tso(struct net_device
*netdev
, u32 data
)
320 struct igb_adapter
*adapter
= netdev_priv(netdev
);
323 netdev
->features
|= NETIF_F_TSO
;
324 netdev
->features
|= NETIF_F_TSO6
;
326 netdev
->features
&= ~NETIF_F_TSO
;
327 netdev
->features
&= ~NETIF_F_TSO6
;
330 dev_info(&adapter
->pdev
->dev
, "TSO is %s\n",
331 data
? "Enabled" : "Disabled");
335 static u32
igb_get_msglevel(struct net_device
*netdev
)
337 struct igb_adapter
*adapter
= netdev_priv(netdev
);
338 return adapter
->msg_enable
;
341 static void igb_set_msglevel(struct net_device
*netdev
, u32 data
)
343 struct igb_adapter
*adapter
= netdev_priv(netdev
);
344 adapter
->msg_enable
= data
;
347 static int igb_get_regs_len(struct net_device
*netdev
)
349 #define IGB_REGS_LEN 551
350 return IGB_REGS_LEN
* sizeof(u32
);
353 static void igb_get_regs(struct net_device
*netdev
,
354 struct ethtool_regs
*regs
, void *p
)
356 struct igb_adapter
*adapter
= netdev_priv(netdev
);
357 struct e1000_hw
*hw
= &adapter
->hw
;
361 memset(p
, 0, IGB_REGS_LEN
* sizeof(u32
));
363 regs
->version
= (1 << 24) | (hw
->revision_id
<< 16) | hw
->device_id
;
365 /* General Registers */
366 regs_buff
[0] = rd32(E1000_CTRL
);
367 regs_buff
[1] = rd32(E1000_STATUS
);
368 regs_buff
[2] = rd32(E1000_CTRL_EXT
);
369 regs_buff
[3] = rd32(E1000_MDIC
);
370 regs_buff
[4] = rd32(E1000_SCTL
);
371 regs_buff
[5] = rd32(E1000_CONNSW
);
372 regs_buff
[6] = rd32(E1000_VET
);
373 regs_buff
[7] = rd32(E1000_LEDCTL
);
374 regs_buff
[8] = rd32(E1000_PBA
);
375 regs_buff
[9] = rd32(E1000_PBS
);
376 regs_buff
[10] = rd32(E1000_FRTIMER
);
377 regs_buff
[11] = rd32(E1000_TCPTIMER
);
380 regs_buff
[12] = rd32(E1000_EECD
);
383 /* Reading EICS for EICR because they read the
384 * same but EICS does not clear on read */
385 regs_buff
[13] = rd32(E1000_EICS
);
386 regs_buff
[14] = rd32(E1000_EICS
);
387 regs_buff
[15] = rd32(E1000_EIMS
);
388 regs_buff
[16] = rd32(E1000_EIMC
);
389 regs_buff
[17] = rd32(E1000_EIAC
);
390 regs_buff
[18] = rd32(E1000_EIAM
);
391 /* Reading ICS for ICR because they read the
392 * same but ICS does not clear on read */
393 regs_buff
[19] = rd32(E1000_ICS
);
394 regs_buff
[20] = rd32(E1000_ICS
);
395 regs_buff
[21] = rd32(E1000_IMS
);
396 regs_buff
[22] = rd32(E1000_IMC
);
397 regs_buff
[23] = rd32(E1000_IAC
);
398 regs_buff
[24] = rd32(E1000_IAM
);
399 regs_buff
[25] = rd32(E1000_IMIRVP
);
402 regs_buff
[26] = rd32(E1000_FCAL
);
403 regs_buff
[27] = rd32(E1000_FCAH
);
404 regs_buff
[28] = rd32(E1000_FCTTV
);
405 regs_buff
[29] = rd32(E1000_FCRTL
);
406 regs_buff
[30] = rd32(E1000_FCRTH
);
407 regs_buff
[31] = rd32(E1000_FCRTV
);
410 regs_buff
[32] = rd32(E1000_RCTL
);
411 regs_buff
[33] = rd32(E1000_RXCSUM
);
412 regs_buff
[34] = rd32(E1000_RLPML
);
413 regs_buff
[35] = rd32(E1000_RFCTL
);
414 regs_buff
[36] = rd32(E1000_MRQC
);
415 regs_buff
[37] = rd32(E1000_VT_CTL
);
418 regs_buff
[38] = rd32(E1000_TCTL
);
419 regs_buff
[39] = rd32(E1000_TCTL_EXT
);
420 regs_buff
[40] = rd32(E1000_TIPG
);
421 regs_buff
[41] = rd32(E1000_DTXCTL
);
424 regs_buff
[42] = rd32(E1000_WUC
);
425 regs_buff
[43] = rd32(E1000_WUFC
);
426 regs_buff
[44] = rd32(E1000_WUS
);
427 regs_buff
[45] = rd32(E1000_IPAV
);
428 regs_buff
[46] = rd32(E1000_WUPL
);
431 regs_buff
[47] = rd32(E1000_PCS_CFG0
);
432 regs_buff
[48] = rd32(E1000_PCS_LCTL
);
433 regs_buff
[49] = rd32(E1000_PCS_LSTAT
);
434 regs_buff
[50] = rd32(E1000_PCS_ANADV
);
435 regs_buff
[51] = rd32(E1000_PCS_LPAB
);
436 regs_buff
[52] = rd32(E1000_PCS_NPTX
);
437 regs_buff
[53] = rd32(E1000_PCS_LPABNP
);
440 regs_buff
[54] = adapter
->stats
.crcerrs
;
441 regs_buff
[55] = adapter
->stats
.algnerrc
;
442 regs_buff
[56] = adapter
->stats
.symerrs
;
443 regs_buff
[57] = adapter
->stats
.rxerrc
;
444 regs_buff
[58] = adapter
->stats
.mpc
;
445 regs_buff
[59] = adapter
->stats
.scc
;
446 regs_buff
[60] = adapter
->stats
.ecol
;
447 regs_buff
[61] = adapter
->stats
.mcc
;
448 regs_buff
[62] = adapter
->stats
.latecol
;
449 regs_buff
[63] = adapter
->stats
.colc
;
450 regs_buff
[64] = adapter
->stats
.dc
;
451 regs_buff
[65] = adapter
->stats
.tncrs
;
452 regs_buff
[66] = adapter
->stats
.sec
;
453 regs_buff
[67] = adapter
->stats
.htdpmc
;
454 regs_buff
[68] = adapter
->stats
.rlec
;
455 regs_buff
[69] = adapter
->stats
.xonrxc
;
456 regs_buff
[70] = adapter
->stats
.xontxc
;
457 regs_buff
[71] = adapter
->stats
.xoffrxc
;
458 regs_buff
[72] = adapter
->stats
.xofftxc
;
459 regs_buff
[73] = adapter
->stats
.fcruc
;
460 regs_buff
[74] = adapter
->stats
.prc64
;
461 regs_buff
[75] = adapter
->stats
.prc127
;
462 regs_buff
[76] = adapter
->stats
.prc255
;
463 regs_buff
[77] = adapter
->stats
.prc511
;
464 regs_buff
[78] = adapter
->stats
.prc1023
;
465 regs_buff
[79] = adapter
->stats
.prc1522
;
466 regs_buff
[80] = adapter
->stats
.gprc
;
467 regs_buff
[81] = adapter
->stats
.bprc
;
468 regs_buff
[82] = adapter
->stats
.mprc
;
469 regs_buff
[83] = adapter
->stats
.gptc
;
470 regs_buff
[84] = adapter
->stats
.gorc
;
471 regs_buff
[86] = adapter
->stats
.gotc
;
472 regs_buff
[88] = adapter
->stats
.rnbc
;
473 regs_buff
[89] = adapter
->stats
.ruc
;
474 regs_buff
[90] = adapter
->stats
.rfc
;
475 regs_buff
[91] = adapter
->stats
.roc
;
476 regs_buff
[92] = adapter
->stats
.rjc
;
477 regs_buff
[93] = adapter
->stats
.mgprc
;
478 regs_buff
[94] = adapter
->stats
.mgpdc
;
479 regs_buff
[95] = adapter
->stats
.mgptc
;
480 regs_buff
[96] = adapter
->stats
.tor
;
481 regs_buff
[98] = adapter
->stats
.tot
;
482 regs_buff
[100] = adapter
->stats
.tpr
;
483 regs_buff
[101] = adapter
->stats
.tpt
;
484 regs_buff
[102] = adapter
->stats
.ptc64
;
485 regs_buff
[103] = adapter
->stats
.ptc127
;
486 regs_buff
[104] = adapter
->stats
.ptc255
;
487 regs_buff
[105] = adapter
->stats
.ptc511
;
488 regs_buff
[106] = adapter
->stats
.ptc1023
;
489 regs_buff
[107] = adapter
->stats
.ptc1522
;
490 regs_buff
[108] = adapter
->stats
.mptc
;
491 regs_buff
[109] = adapter
->stats
.bptc
;
492 regs_buff
[110] = adapter
->stats
.tsctc
;
493 regs_buff
[111] = adapter
->stats
.iac
;
494 regs_buff
[112] = adapter
->stats
.rpthc
;
495 regs_buff
[113] = adapter
->stats
.hgptc
;
496 regs_buff
[114] = adapter
->stats
.hgorc
;
497 regs_buff
[116] = adapter
->stats
.hgotc
;
498 regs_buff
[118] = adapter
->stats
.lenerrs
;
499 regs_buff
[119] = adapter
->stats
.scvpc
;
500 regs_buff
[120] = adapter
->stats
.hrmpc
;
502 /* These should probably be added to e1000_regs.h instead */
503 #define E1000_PSRTYPE_REG(_i) (0x05480 + ((_i) * 4))
504 #define E1000_IP4AT_REG(_i) (0x05840 + ((_i) * 8))
505 #define E1000_IP6AT_REG(_i) (0x05880 + ((_i) * 4))
506 #define E1000_WUPM_REG(_i) (0x05A00 + ((_i) * 4))
507 #define E1000_FFMT_REG(_i) (0x09000 + ((_i) * 8))
508 #define E1000_FFVT_REG(_i) (0x09800 + ((_i) * 8))
509 #define E1000_FFLT_REG(_i) (0x05F00 + ((_i) * 8))
511 for (i
= 0; i
< 4; i
++)
512 regs_buff
[121 + i
] = rd32(E1000_SRRCTL(i
));
513 for (i
= 0; i
< 4; i
++)
514 regs_buff
[125 + i
] = rd32(E1000_PSRTYPE_REG(i
));
515 for (i
= 0; i
< 4; i
++)
516 regs_buff
[129 + i
] = rd32(E1000_RDBAL(i
));
517 for (i
= 0; i
< 4; i
++)
518 regs_buff
[133 + i
] = rd32(E1000_RDBAH(i
));
519 for (i
= 0; i
< 4; i
++)
520 regs_buff
[137 + i
] = rd32(E1000_RDLEN(i
));
521 for (i
= 0; i
< 4; i
++)
522 regs_buff
[141 + i
] = rd32(E1000_RDH(i
));
523 for (i
= 0; i
< 4; i
++)
524 regs_buff
[145 + i
] = rd32(E1000_RDT(i
));
525 for (i
= 0; i
< 4; i
++)
526 regs_buff
[149 + i
] = rd32(E1000_RXDCTL(i
));
528 for (i
= 0; i
< 10; i
++)
529 regs_buff
[153 + i
] = rd32(E1000_EITR(i
));
530 for (i
= 0; i
< 8; i
++)
531 regs_buff
[163 + i
] = rd32(E1000_IMIR(i
));
532 for (i
= 0; i
< 8; i
++)
533 regs_buff
[171 + i
] = rd32(E1000_IMIREXT(i
));
534 for (i
= 0; i
< 16; i
++)
535 regs_buff
[179 + i
] = rd32(E1000_RAL(i
));
536 for (i
= 0; i
< 16; i
++)
537 regs_buff
[195 + i
] = rd32(E1000_RAH(i
));
539 for (i
= 0; i
< 4; i
++)
540 regs_buff
[211 + i
] = rd32(E1000_TDBAL(i
));
541 for (i
= 0; i
< 4; i
++)
542 regs_buff
[215 + i
] = rd32(E1000_TDBAH(i
));
543 for (i
= 0; i
< 4; i
++)
544 regs_buff
[219 + i
] = rd32(E1000_TDLEN(i
));
545 for (i
= 0; i
< 4; i
++)
546 regs_buff
[223 + i
] = rd32(E1000_TDH(i
));
547 for (i
= 0; i
< 4; i
++)
548 regs_buff
[227 + i
] = rd32(E1000_TDT(i
));
549 for (i
= 0; i
< 4; i
++)
550 regs_buff
[231 + i
] = rd32(E1000_TXDCTL(i
));
551 for (i
= 0; i
< 4; i
++)
552 regs_buff
[235 + i
] = rd32(E1000_TDWBAL(i
));
553 for (i
= 0; i
< 4; i
++)
554 regs_buff
[239 + i
] = rd32(E1000_TDWBAH(i
));
555 for (i
= 0; i
< 4; i
++)
556 regs_buff
[243 + i
] = rd32(E1000_DCA_TXCTRL(i
));
558 for (i
= 0; i
< 4; i
++)
559 regs_buff
[247 + i
] = rd32(E1000_IP4AT_REG(i
));
560 for (i
= 0; i
< 4; i
++)
561 regs_buff
[251 + i
] = rd32(E1000_IP6AT_REG(i
));
562 for (i
= 0; i
< 32; i
++)
563 regs_buff
[255 + i
] = rd32(E1000_WUPM_REG(i
));
564 for (i
= 0; i
< 128; i
++)
565 regs_buff
[287 + i
] = rd32(E1000_FFMT_REG(i
));
566 for (i
= 0; i
< 128; i
++)
567 regs_buff
[415 + i
] = rd32(E1000_FFVT_REG(i
));
568 for (i
= 0; i
< 4; i
++)
569 regs_buff
[543 + i
] = rd32(E1000_FFLT_REG(i
));
571 regs_buff
[547] = rd32(E1000_TDFH
);
572 regs_buff
[548] = rd32(E1000_TDFT
);
573 regs_buff
[549] = rd32(E1000_TDFHS
);
574 regs_buff
[550] = rd32(E1000_TDFPC
);
578 static int igb_get_eeprom_len(struct net_device
*netdev
)
580 struct igb_adapter
*adapter
= netdev_priv(netdev
);
581 return adapter
->hw
.nvm
.word_size
* 2;
584 static int igb_get_eeprom(struct net_device
*netdev
,
585 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
587 struct igb_adapter
*adapter
= netdev_priv(netdev
);
588 struct e1000_hw
*hw
= &adapter
->hw
;
590 int first_word
, last_word
;
594 if (eeprom
->len
== 0)
597 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
599 first_word
= eeprom
->offset
>> 1;
600 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
602 eeprom_buff
= kmalloc(sizeof(u16
) *
603 (last_word
- first_word
+ 1), GFP_KERNEL
);
607 if (hw
->nvm
.type
== e1000_nvm_eeprom_spi
)
608 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
,
609 last_word
- first_word
+ 1,
612 for (i
= 0; i
< last_word
- first_word
+ 1; i
++) {
613 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
+ i
, 1,
620 /* Device's eeprom is always little-endian, word addressable */
621 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
622 le16_to_cpus(&eeprom_buff
[i
]);
624 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 1),
631 static int igb_set_eeprom(struct net_device
*netdev
,
632 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
634 struct igb_adapter
*adapter
= netdev_priv(netdev
);
635 struct e1000_hw
*hw
= &adapter
->hw
;
638 int max_len
, first_word
, last_word
, ret_val
= 0;
641 if (eeprom
->len
== 0)
644 if (eeprom
->magic
!= (hw
->vendor_id
| (hw
->device_id
<< 16)))
647 max_len
= hw
->nvm
.word_size
* 2;
649 first_word
= eeprom
->offset
>> 1;
650 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
651 eeprom_buff
= kmalloc(max_len
, GFP_KERNEL
);
655 ptr
= (void *)eeprom_buff
;
657 if (eeprom
->offset
& 1) {
658 /* need read/modify/write of first changed EEPROM word */
659 /* only the second byte of the word is being modified */
660 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
, 1,
664 if (((eeprom
->offset
+ eeprom
->len
) & 1) && (ret_val
== 0)) {
665 /* need read/modify/write of last changed EEPROM word */
666 /* only the first byte of the word is being modified */
667 ret_val
= hw
->nvm
.ops
.read(hw
, last_word
, 1,
668 &eeprom_buff
[last_word
- first_word
]);
671 /* Device's eeprom is always little-endian, word addressable */
672 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
673 le16_to_cpus(&eeprom_buff
[i
]);
675 memcpy(ptr
, bytes
, eeprom
->len
);
677 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
678 eeprom_buff
[i
] = cpu_to_le16(eeprom_buff
[i
]);
680 ret_val
= hw
->nvm
.ops
.write(hw
, first_word
,
681 last_word
- first_word
+ 1, eeprom_buff
);
683 /* Update the checksum over the first part of the EEPROM if needed
684 * and flush shadow RAM for 82573 controllers */
685 if ((ret_val
== 0) && ((first_word
<= NVM_CHECKSUM_REG
)))
686 igb_update_nvm_checksum(hw
);
692 static void igb_get_drvinfo(struct net_device
*netdev
,
693 struct ethtool_drvinfo
*drvinfo
)
695 struct igb_adapter
*adapter
= netdev_priv(netdev
);
696 char firmware_version
[32];
699 strncpy(drvinfo
->driver
, igb_driver_name
, 32);
700 strncpy(drvinfo
->version
, igb_driver_version
, 32);
702 /* EEPROM image version # is reported as firmware version # for
703 * 82575 controllers */
704 adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, 5, 1, &eeprom_data
);
705 sprintf(firmware_version
, "%d.%d-%d",
706 (eeprom_data
& 0xF000) >> 12,
707 (eeprom_data
& 0x0FF0) >> 4,
708 eeprom_data
& 0x000F);
710 strncpy(drvinfo
->fw_version
, firmware_version
, 32);
711 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
), 32);
712 drvinfo
->n_stats
= IGB_STATS_LEN
;
713 drvinfo
->testinfo_len
= IGB_TEST_LEN
;
714 drvinfo
->regdump_len
= igb_get_regs_len(netdev
);
715 drvinfo
->eedump_len
= igb_get_eeprom_len(netdev
);
718 static void igb_get_ringparam(struct net_device
*netdev
,
719 struct ethtool_ringparam
*ring
)
721 struct igb_adapter
*adapter
= netdev_priv(netdev
);
723 ring
->rx_max_pending
= IGB_MAX_RXD
;
724 ring
->tx_max_pending
= IGB_MAX_TXD
;
725 ring
->rx_mini_max_pending
= 0;
726 ring
->rx_jumbo_max_pending
= 0;
727 ring
->rx_pending
= adapter
->rx_ring_count
;
728 ring
->tx_pending
= adapter
->tx_ring_count
;
729 ring
->rx_mini_pending
= 0;
730 ring
->rx_jumbo_pending
= 0;
733 static int igb_set_ringparam(struct net_device
*netdev
,
734 struct ethtool_ringparam
*ring
)
736 struct igb_adapter
*adapter
= netdev_priv(netdev
);
737 struct igb_ring
*temp_ring
;
739 u32 new_rx_count
, new_tx_count
;
741 if ((ring
->rx_mini_pending
) || (ring
->rx_jumbo_pending
))
744 new_rx_count
= max(ring
->rx_pending
, (u32
)IGB_MIN_RXD
);
745 new_rx_count
= min(new_rx_count
, (u32
)IGB_MAX_RXD
);
746 new_rx_count
= ALIGN(new_rx_count
, REQ_RX_DESCRIPTOR_MULTIPLE
);
748 new_tx_count
= max(ring
->tx_pending
, (u32
)IGB_MIN_TXD
);
749 new_tx_count
= min(new_tx_count
, (u32
)IGB_MAX_TXD
);
750 new_tx_count
= ALIGN(new_tx_count
, REQ_TX_DESCRIPTOR_MULTIPLE
);
752 if ((new_tx_count
== adapter
->tx_ring_count
) &&
753 (new_rx_count
== adapter
->rx_ring_count
)) {
758 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
761 if (!netif_running(adapter
->netdev
)) {
762 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
763 adapter
->tx_ring
[i
].count
= new_tx_count
;
764 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
765 adapter
->rx_ring
[i
].count
= new_rx_count
;
766 adapter
->tx_ring_count
= new_tx_count
;
767 adapter
->rx_ring_count
= new_rx_count
;
771 if (adapter
->num_tx_queues
> adapter
->num_rx_queues
)
772 temp_ring
= vmalloc(adapter
->num_tx_queues
* sizeof(struct igb_ring
));
774 temp_ring
= vmalloc(adapter
->num_rx_queues
* sizeof(struct igb_ring
));
784 * We can't just free everything and then setup again,
785 * because the ISRs in MSI-X mode get passed pointers
786 * to the tx and rx ring structs.
788 if (new_tx_count
!= adapter
->tx_ring_count
) {
789 memcpy(temp_ring
, adapter
->tx_ring
,
790 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
792 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
793 temp_ring
[i
].count
= new_tx_count
;
794 err
= igb_setup_tx_resources(&temp_ring
[i
]);
798 igb_free_tx_resources(&temp_ring
[i
]);
804 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
805 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
807 memcpy(adapter
->tx_ring
, temp_ring
,
808 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
810 adapter
->tx_ring_count
= new_tx_count
;
813 if (new_rx_count
!= adapter
->rx_ring
->count
) {
814 memcpy(temp_ring
, adapter
->rx_ring
,
815 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
817 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
818 temp_ring
[i
].count
= new_rx_count
;
819 err
= igb_setup_rx_resources(&temp_ring
[i
]);
823 igb_free_rx_resources(&temp_ring
[i
]);
830 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
831 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
833 memcpy(adapter
->rx_ring
, temp_ring
,
834 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
836 adapter
->rx_ring_count
= new_rx_count
;
842 clear_bit(__IGB_RESETTING
, &adapter
->state
);
846 /* ethtool register test data */
847 struct igb_reg_test
{
856 /* In the hardware, registers are laid out either singly, in arrays
857 * spaced 0x100 bytes apart, or in contiguous tables. We assume
858 * most tests take place on arrays or single registers (handled
859 * as a single-element array) and special-case the tables.
860 * Table tests are always pattern tests.
862 * We also make provision for some required setup steps by specifying
863 * registers to be written without any read-back testing.
866 #define PATTERN_TEST 1
867 #define SET_READ_TEST 2
868 #define WRITE_NO_TEST 3
869 #define TABLE32_TEST 4
870 #define TABLE64_TEST_LO 5
871 #define TABLE64_TEST_HI 6
874 static struct igb_reg_test reg_test_82576
[] = {
875 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
876 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
877 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
878 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
879 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
880 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
881 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
882 { E1000_RDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
883 { E1000_RDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
884 { E1000_RDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
885 /* Enable all RX queues before testing. */
886 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
887 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
888 /* RDH is read-only for 82576, only test RDT. */
889 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
890 { E1000_RDT(4), 0x40, 12, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
891 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
892 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, 0 },
893 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
894 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
895 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
896 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
897 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
898 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
899 { E1000_TDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
900 { E1000_TDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
901 { E1000_TDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
902 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
903 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
904 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
905 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
906 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
907 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
908 { E1000_RA2
, 0, 8, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
909 { E1000_RA2
, 0, 8, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
910 { E1000_MTA
, 0, 128,TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
914 /* 82575 register test */
915 static struct igb_reg_test reg_test_82575
[] = {
916 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
917 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
918 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
919 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
920 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
921 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
922 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
923 /* Enable all four RX queues before testing. */
924 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
925 /* RDH is read-only for 82575, only test RDT. */
926 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
927 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
928 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
929 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
930 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
931 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
932 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
933 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
934 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
935 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0x003FFFFB },
936 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0xFFFFFFFF },
937 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
938 { E1000_TXCW
, 0x100, 1, PATTERN_TEST
, 0xC000FFFF, 0x0000FFFF },
939 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
940 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x800FFFFF, 0xFFFFFFFF },
941 { E1000_MTA
, 0, 128, TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
945 static bool reg_pattern_test(struct igb_adapter
*adapter
, u64
*data
,
946 int reg
, u32 mask
, u32 write
)
948 struct e1000_hw
*hw
= &adapter
->hw
;
951 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
952 for (pat
= 0; pat
< ARRAY_SIZE(_test
); pat
++) {
953 wr32(reg
, (_test
[pat
] & write
));
955 if (val
!= (_test
[pat
] & write
& mask
)) {
956 dev_err(&adapter
->pdev
->dev
, "pattern test reg %04X "
957 "failed: got 0x%08X expected 0x%08X\n",
958 reg
, val
, (_test
[pat
] & write
& mask
));
966 static bool reg_set_and_check(struct igb_adapter
*adapter
, u64
*data
,
967 int reg
, u32 mask
, u32 write
)
969 struct e1000_hw
*hw
= &adapter
->hw
;
971 wr32(reg
, write
& mask
);
973 if ((write
& mask
) != (val
& mask
)) {
974 dev_err(&adapter
->pdev
->dev
, "set/check reg %04X test failed:"
975 " got 0x%08X expected 0x%08X\n", reg
,
976 (val
& mask
), (write
& mask
));
983 #define REG_PATTERN_TEST(reg, mask, write) \
985 if (reg_pattern_test(adapter, data, reg, mask, write)) \
989 #define REG_SET_AND_CHECK(reg, mask, write) \
991 if (reg_set_and_check(adapter, data, reg, mask, write)) \
995 static int igb_reg_test(struct igb_adapter
*adapter
, u64
*data
)
997 struct e1000_hw
*hw
= &adapter
->hw
;
998 struct igb_reg_test
*test
;
999 u32 value
, before
, after
;
1002 toggle
= 0x7FFFF3FF;
1004 switch (adapter
->hw
.mac
.type
) {
1006 test
= reg_test_82576
;
1009 test
= reg_test_82575
;
1013 /* Because the status register is such a special case,
1014 * we handle it separately from the rest of the register
1015 * tests. Some bits are read-only, some toggle, and some
1016 * are writable on newer MACs.
1018 before
= rd32(E1000_STATUS
);
1019 value
= (rd32(E1000_STATUS
) & toggle
);
1020 wr32(E1000_STATUS
, toggle
);
1021 after
= rd32(E1000_STATUS
) & toggle
;
1022 if (value
!= after
) {
1023 dev_err(&adapter
->pdev
->dev
, "failed STATUS register test "
1024 "got: 0x%08X expected: 0x%08X\n", after
, value
);
1028 /* restore previous status */
1029 wr32(E1000_STATUS
, before
);
1031 /* Perform the remainder of the register test, looping through
1032 * the test table until we either fail or reach the null entry.
1035 for (i
= 0; i
< test
->array_len
; i
++) {
1036 switch (test
->test_type
) {
1038 REG_PATTERN_TEST(test
->reg
+
1039 (i
* test
->reg_offset
),
1044 REG_SET_AND_CHECK(test
->reg
+
1045 (i
* test
->reg_offset
),
1051 (adapter
->hw
.hw_addr
+ test
->reg
)
1052 + (i
* test
->reg_offset
));
1055 REG_PATTERN_TEST(test
->reg
+ (i
* 4),
1059 case TABLE64_TEST_LO
:
1060 REG_PATTERN_TEST(test
->reg
+ (i
* 8),
1064 case TABLE64_TEST_HI
:
1065 REG_PATTERN_TEST((test
->reg
+ 4) + (i
* 8),
1078 static int igb_eeprom_test(struct igb_adapter
*adapter
, u64
*data
)
1085 /* Read and add up the contents of the EEPROM */
1086 for (i
= 0; i
< (NVM_CHECKSUM_REG
+ 1); i
++) {
1087 if ((adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, i
, 1, &temp
))
1095 /* If Checksum is not Correct return error else test passed */
1096 if ((checksum
!= (u16
) NVM_SUM
) && !(*data
))
1102 static irqreturn_t
igb_test_intr(int irq
, void *data
)
1104 struct net_device
*netdev
= (struct net_device
*) data
;
1105 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1106 struct e1000_hw
*hw
= &adapter
->hw
;
1108 adapter
->test_icr
|= rd32(E1000_ICR
);
1113 static int igb_intr_test(struct igb_adapter
*adapter
, u64
*data
)
1115 struct e1000_hw
*hw
= &adapter
->hw
;
1116 struct net_device
*netdev
= adapter
->netdev
;
1117 u32 mask
, ics_mask
, i
= 0, shared_int
= true;
1118 u32 irq
= adapter
->pdev
->irq
;
1122 /* Hook up test interrupt handler just for this test */
1123 if (adapter
->msix_entries
)
1124 /* NOTE: we don't test MSI-X interrupts here, yet */
1127 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1129 if (request_irq(irq
, &igb_test_intr
, 0, netdev
->name
, netdev
)) {
1133 } else if (!request_irq(irq
, &igb_test_intr
, IRQF_PROBE_SHARED
,
1134 netdev
->name
, netdev
)) {
1136 } else if (request_irq(irq
, &igb_test_intr
, IRQF_SHARED
,
1137 netdev
->name
, netdev
)) {
1141 dev_info(&adapter
->pdev
->dev
, "testing %s interrupt\n",
1142 (shared_int
? "shared" : "unshared"));
1143 /* Disable all the interrupts */
1144 wr32(E1000_IMC
, 0xFFFFFFFF);
1147 /* Define all writable bits for ICS */
1148 switch(hw
->mac
.type
) {
1150 ics_mask
= 0x37F47EDD;
1153 ics_mask
= 0x77D4FBFD;
1156 ics_mask
= 0x7FFFFFFF;
1160 /* Test each interrupt */
1161 for (; i
< 31; i
++) {
1162 /* Interrupt to test */
1165 if (!(mask
& ics_mask
))
1169 /* Disable the interrupt to be reported in
1170 * the cause register and then force the same
1171 * interrupt and see if one gets posted. If
1172 * an interrupt was posted to the bus, the
1175 adapter
->test_icr
= 0;
1177 /* Flush any pending interrupts */
1178 wr32(E1000_ICR
, ~0);
1180 wr32(E1000_IMC
, mask
);
1181 wr32(E1000_ICS
, mask
);
1184 if (adapter
->test_icr
& mask
) {
1190 /* Enable the interrupt to be reported in
1191 * the cause register and then force the same
1192 * interrupt and see if one gets posted. If
1193 * an interrupt was not posted to the bus, the
1196 adapter
->test_icr
= 0;
1198 /* Flush any pending interrupts */
1199 wr32(E1000_ICR
, ~0);
1201 wr32(E1000_IMS
, mask
);
1202 wr32(E1000_ICS
, mask
);
1205 if (!(adapter
->test_icr
& mask
)) {
1211 /* Disable the other interrupts to be reported in
1212 * the cause register and then force the other
1213 * interrupts and see if any get posted. If
1214 * an interrupt was posted to the bus, the
1217 adapter
->test_icr
= 0;
1219 /* Flush any pending interrupts */
1220 wr32(E1000_ICR
, ~0);
1222 wr32(E1000_IMC
, ~mask
);
1223 wr32(E1000_ICS
, ~mask
);
1226 if (adapter
->test_icr
& mask
) {
1233 /* Disable all the interrupts */
1234 wr32(E1000_IMC
, ~0);
1237 /* Unhook test interrupt handler */
1238 free_irq(irq
, netdev
);
1243 static void igb_free_desc_rings(struct igb_adapter
*adapter
)
1245 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1246 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1247 struct pci_dev
*pdev
= adapter
->pdev
;
1250 if (tx_ring
->desc
&& tx_ring
->buffer_info
) {
1251 for (i
= 0; i
< tx_ring
->count
; i
++) {
1252 struct igb_buffer
*buf
= &(tx_ring
->buffer_info
[i
]);
1254 pci_unmap_single(pdev
, buf
->dma
, buf
->length
,
1257 dev_kfree_skb(buf
->skb
);
1261 if (rx_ring
->desc
&& rx_ring
->buffer_info
) {
1262 for (i
= 0; i
< rx_ring
->count
; i
++) {
1263 struct igb_buffer
*buf
= &(rx_ring
->buffer_info
[i
]);
1265 pci_unmap_single(pdev
, buf
->dma
,
1267 PCI_DMA_FROMDEVICE
);
1269 dev_kfree_skb(buf
->skb
);
1273 if (tx_ring
->desc
) {
1274 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
,
1276 tx_ring
->desc
= NULL
;
1278 if (rx_ring
->desc
) {
1279 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
,
1281 rx_ring
->desc
= NULL
;
1284 kfree(tx_ring
->buffer_info
);
1285 tx_ring
->buffer_info
= NULL
;
1286 kfree(rx_ring
->buffer_info
);
1287 rx_ring
->buffer_info
= NULL
;
1292 static int igb_setup_desc_rings(struct igb_adapter
*adapter
)
1294 struct e1000_hw
*hw
= &adapter
->hw
;
1295 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1296 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1297 struct pci_dev
*pdev
= adapter
->pdev
;
1298 struct igb_buffer
*buffer_info
;
1302 /* Setup Tx descriptor ring and Tx buffers */
1304 if (!tx_ring
->count
)
1305 tx_ring
->count
= IGB_DEFAULT_TXD
;
1307 tx_ring
->buffer_info
= kcalloc(tx_ring
->count
,
1308 sizeof(struct igb_buffer
),
1310 if (!tx_ring
->buffer_info
) {
1315 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1316 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1317 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1319 if (!tx_ring
->desc
) {
1323 tx_ring
->next_to_use
= tx_ring
->next_to_clean
= 0;
1325 wr32(E1000_TDBAL(0),
1326 ((u64
) tx_ring
->dma
& 0x00000000FFFFFFFF));
1327 wr32(E1000_TDBAH(0), ((u64
) tx_ring
->dma
>> 32));
1328 wr32(E1000_TDLEN(0),
1329 tx_ring
->count
* sizeof(union e1000_adv_tx_desc
));
1330 wr32(E1000_TDH(0), 0);
1331 wr32(E1000_TDT(0), 0);
1333 E1000_TCTL_PSP
| E1000_TCTL_EN
|
1334 E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
|
1335 E1000_COLLISION_DISTANCE
<< E1000_COLD_SHIFT
);
1337 for (i
= 0; i
< tx_ring
->count
; i
++) {
1338 union e1000_adv_tx_desc
*tx_desc
;
1339 struct sk_buff
*skb
;
1340 unsigned int size
= 1024;
1342 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
1343 skb
= alloc_skb(size
, GFP_KERNEL
);
1349 buffer_info
= &tx_ring
->buffer_info
[i
];
1350 buffer_info
->skb
= skb
;
1351 buffer_info
->length
= skb
->len
;
1352 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
, skb
->len
,
1354 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
1355 tx_desc
->read
.olinfo_status
= cpu_to_le32(skb
->len
) <<
1356 E1000_ADVTXD_PAYLEN_SHIFT
;
1357 tx_desc
->read
.cmd_type_len
= cpu_to_le32(skb
->len
);
1358 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(E1000_TXD_CMD_EOP
|
1359 E1000_TXD_CMD_IFCS
|
1361 E1000_ADVTXD_DTYP_DATA
|
1362 E1000_ADVTXD_DCMD_DEXT
);
1365 /* Setup Rx descriptor ring and Rx buffers */
1367 if (!rx_ring
->count
)
1368 rx_ring
->count
= IGB_DEFAULT_RXD
;
1370 rx_ring
->buffer_info
= kcalloc(rx_ring
->count
,
1371 sizeof(struct igb_buffer
),
1373 if (!rx_ring
->buffer_info
) {
1378 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
1379 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1381 if (!rx_ring
->desc
) {
1385 rx_ring
->next_to_use
= rx_ring
->next_to_clean
= 0;
1387 rctl
= rd32(E1000_RCTL
);
1388 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1389 wr32(E1000_RDBAL(0),
1390 ((u64
) rx_ring
->dma
& 0xFFFFFFFF));
1391 wr32(E1000_RDBAH(0),
1392 ((u64
) rx_ring
->dma
>> 32));
1393 wr32(E1000_RDLEN(0), rx_ring
->size
);
1394 wr32(E1000_RDH(0), 0);
1395 wr32(E1000_RDT(0), 0);
1396 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1397 rctl
= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1398 (adapter
->hw
.mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1399 wr32(E1000_RCTL
, rctl
);
1400 wr32(E1000_SRRCTL(0), E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
);
1402 for (i
= 0; i
< rx_ring
->count
; i
++) {
1403 union e1000_adv_rx_desc
*rx_desc
;
1404 struct sk_buff
*skb
;
1406 buffer_info
= &rx_ring
->buffer_info
[i
];
1407 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
1408 skb
= alloc_skb(IGB_RXBUFFER_2048
+ NET_IP_ALIGN
,
1414 skb_reserve(skb
, NET_IP_ALIGN
);
1415 buffer_info
->skb
= skb
;
1416 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
1418 PCI_DMA_FROMDEVICE
);
1419 rx_desc
->read
.pkt_addr
= cpu_to_le64(buffer_info
->dma
);
1420 memset(skb
->data
, 0x00, skb
->len
);
1426 igb_free_desc_rings(adapter
);
1430 static void igb_phy_disable_receiver(struct igb_adapter
*adapter
)
1432 struct e1000_hw
*hw
= &adapter
->hw
;
1434 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1435 igb_write_phy_reg(hw
, 29, 0x001F);
1436 igb_write_phy_reg(hw
, 30, 0x8FFC);
1437 igb_write_phy_reg(hw
, 29, 0x001A);
1438 igb_write_phy_reg(hw
, 30, 0x8FF0);
1441 static int igb_integrated_phy_loopback(struct igb_adapter
*adapter
)
1443 struct e1000_hw
*hw
= &adapter
->hw
;
1446 hw
->mac
.autoneg
= false;
1448 if (hw
->phy
.type
== e1000_phy_m88
) {
1449 /* Auto-MDI/MDIX Off */
1450 igb_write_phy_reg(hw
, M88E1000_PHY_SPEC_CTRL
, 0x0808);
1451 /* reset to update Auto-MDI/MDIX */
1452 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x9140);
1454 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x8140);
1457 ctrl_reg
= rd32(E1000_CTRL
);
1459 /* force 1000, set loopback */
1460 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x4140);
1462 /* Now set up the MAC to the same speed/duplex as the PHY. */
1463 ctrl_reg
= rd32(E1000_CTRL
);
1464 ctrl_reg
&= ~E1000_CTRL_SPD_SEL
; /* Clear the speed sel bits */
1465 ctrl_reg
|= (E1000_CTRL_FRCSPD
| /* Set the Force Speed Bit */
1466 E1000_CTRL_FRCDPX
| /* Set the Force Duplex Bit */
1467 E1000_CTRL_SPD_1000
|/* Force Speed to 1000 */
1468 E1000_CTRL_FD
| /* Force Duplex to FULL */
1469 E1000_CTRL_SLU
); /* Set link up enable bit */
1471 if (hw
->phy
.type
== e1000_phy_m88
)
1472 ctrl_reg
|= E1000_CTRL_ILOS
; /* Invert Loss of Signal */
1474 wr32(E1000_CTRL
, ctrl_reg
);
1476 /* Disable the receiver on the PHY so when a cable is plugged in, the
1477 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1479 if (hw
->phy
.type
== e1000_phy_m88
)
1480 igb_phy_disable_receiver(adapter
);
1487 static int igb_set_phy_loopback(struct igb_adapter
*adapter
)
1489 return igb_integrated_phy_loopback(adapter
);
1492 static int igb_setup_loopback_test(struct igb_adapter
*adapter
)
1494 struct e1000_hw
*hw
= &adapter
->hw
;
1497 if (hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1498 reg
= rd32(E1000_RCTL
);
1499 reg
|= E1000_RCTL_LBM_TCVR
;
1500 wr32(E1000_RCTL
, reg
);
1502 wr32(E1000_SCTL
, E1000_ENABLE_SERDES_LOOPBACK
);
1504 reg
= rd32(E1000_CTRL
);
1505 reg
&= ~(E1000_CTRL_RFCE
|
1508 reg
|= E1000_CTRL_SLU
|
1510 wr32(E1000_CTRL
, reg
);
1512 /* Unset switch control to serdes energy detect */
1513 reg
= rd32(E1000_CONNSW
);
1514 reg
&= ~E1000_CONNSW_ENRGSRC
;
1515 wr32(E1000_CONNSW
, reg
);
1517 /* Set PCS register for forced speed */
1518 reg
= rd32(E1000_PCS_LCTL
);
1519 reg
&= ~E1000_PCS_LCTL_AN_ENABLE
; /* Disable Autoneg*/
1520 reg
|= E1000_PCS_LCTL_FLV_LINK_UP
| /* Force link up */
1521 E1000_PCS_LCTL_FSV_1000
| /* Force 1000 */
1522 E1000_PCS_LCTL_FDV_FULL
| /* SerDes Full duplex */
1523 E1000_PCS_LCTL_FSD
| /* Force Speed */
1524 E1000_PCS_LCTL_FORCE_LINK
; /* Force Link */
1525 wr32(E1000_PCS_LCTL
, reg
);
1528 } else if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1529 return igb_set_phy_loopback(adapter
);
1535 static void igb_loopback_cleanup(struct igb_adapter
*adapter
)
1537 struct e1000_hw
*hw
= &adapter
->hw
;
1541 rctl
= rd32(E1000_RCTL
);
1542 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1543 wr32(E1000_RCTL
, rctl
);
1545 hw
->mac
.autoneg
= true;
1546 igb_read_phy_reg(hw
, PHY_CONTROL
, &phy_reg
);
1547 if (phy_reg
& MII_CR_LOOPBACK
) {
1548 phy_reg
&= ~MII_CR_LOOPBACK
;
1549 igb_write_phy_reg(hw
, PHY_CONTROL
, phy_reg
);
1550 igb_phy_sw_reset(hw
);
1554 static void igb_create_lbtest_frame(struct sk_buff
*skb
,
1555 unsigned int frame_size
)
1557 memset(skb
->data
, 0xFF, frame_size
);
1559 memset(&skb
->data
[frame_size
/ 2], 0xAA, frame_size
/ 2 - 1);
1560 memset(&skb
->data
[frame_size
/ 2 + 10], 0xBE, 1);
1561 memset(&skb
->data
[frame_size
/ 2 + 12], 0xAF, 1);
1564 static int igb_check_lbtest_frame(struct sk_buff
*skb
, unsigned int frame_size
)
1567 if (*(skb
->data
+ 3) == 0xFF)
1568 if ((*(skb
->data
+ frame_size
/ 2 + 10) == 0xBE) &&
1569 (*(skb
->data
+ frame_size
/ 2 + 12) == 0xAF))
1574 static int igb_run_loopback_test(struct igb_adapter
*adapter
)
1576 struct e1000_hw
*hw
= &adapter
->hw
;
1577 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1578 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1579 struct pci_dev
*pdev
= adapter
->pdev
;
1580 int i
, j
, k
, l
, lc
, good_cnt
;
1584 wr32(E1000_RDT(0), rx_ring
->count
- 1);
1586 /* Calculate the loop count based on the largest descriptor ring
1587 * The idea is to wrap the largest ring a number of times using 64
1588 * send/receive pairs during each loop
1591 if (rx_ring
->count
<= tx_ring
->count
)
1592 lc
= ((tx_ring
->count
/ 64) * 2) + 1;
1594 lc
= ((rx_ring
->count
/ 64) * 2) + 1;
1597 for (j
= 0; j
<= lc
; j
++) { /* loop count loop */
1598 for (i
= 0; i
< 64; i
++) { /* send the packets */
1599 igb_create_lbtest_frame(tx_ring
->buffer_info
[k
].skb
,
1601 pci_dma_sync_single_for_device(pdev
,
1602 tx_ring
->buffer_info
[k
].dma
,
1603 tx_ring
->buffer_info
[k
].length
,
1606 if (k
== tx_ring
->count
)
1609 wr32(E1000_TDT(0), k
);
1611 time
= jiffies
; /* set the start time for the receive */
1613 do { /* receive the sent packets */
1614 pci_dma_sync_single_for_cpu(pdev
,
1615 rx_ring
->buffer_info
[l
].dma
,
1617 PCI_DMA_FROMDEVICE
);
1619 ret_val
= igb_check_lbtest_frame(
1620 rx_ring
->buffer_info
[l
].skb
, 1024);
1624 if (l
== rx_ring
->count
)
1626 /* time + 20 msecs (200 msecs on 2.4) is more than
1627 * enough time to complete the receives, if it's
1628 * exceeded, break and error off
1630 } while (good_cnt
< 64 && jiffies
< (time
+ 20));
1631 if (good_cnt
!= 64) {
1632 ret_val
= 13; /* ret_val is the same as mis-compare */
1635 if (jiffies
>= (time
+ 20)) {
1636 ret_val
= 14; /* error code for time out error */
1639 } /* end loop count loop */
1643 static int igb_loopback_test(struct igb_adapter
*adapter
, u64
*data
)
1645 /* PHY loopback cannot be performed if SoL/IDER
1646 * sessions are active */
1647 if (igb_check_reset_block(&adapter
->hw
)) {
1648 dev_err(&adapter
->pdev
->dev
,
1649 "Cannot do PHY loopback test "
1650 "when SoL/IDER is active.\n");
1654 *data
= igb_setup_desc_rings(adapter
);
1657 *data
= igb_setup_loopback_test(adapter
);
1660 *data
= igb_run_loopback_test(adapter
);
1661 igb_loopback_cleanup(adapter
);
1664 igb_free_desc_rings(adapter
);
1669 static int igb_link_test(struct igb_adapter
*adapter
, u64
*data
)
1671 struct e1000_hw
*hw
= &adapter
->hw
;
1673 if (hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1675 hw
->mac
.serdes_has_link
= false;
1677 /* On some blade server designs, link establishment
1678 * could take as long as 2-3 minutes */
1680 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1681 if (hw
->mac
.serdes_has_link
)
1684 } while (i
++ < 3750);
1688 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1689 if (hw
->mac
.autoneg
)
1692 if (!(rd32(E1000_STATUS
) &
1699 static void igb_diag_test(struct net_device
*netdev
,
1700 struct ethtool_test
*eth_test
, u64
*data
)
1702 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1703 u16 autoneg_advertised
;
1704 u8 forced_speed_duplex
, autoneg
;
1705 bool if_running
= netif_running(netdev
);
1707 set_bit(__IGB_TESTING
, &adapter
->state
);
1708 if (eth_test
->flags
== ETH_TEST_FL_OFFLINE
) {
1711 /* save speed, duplex, autoneg settings */
1712 autoneg_advertised
= adapter
->hw
.phy
.autoneg_advertised
;
1713 forced_speed_duplex
= adapter
->hw
.mac
.forced_speed_duplex
;
1714 autoneg
= adapter
->hw
.mac
.autoneg
;
1716 dev_info(&adapter
->pdev
->dev
, "offline testing starting\n");
1718 /* Link test performed before hardware reset so autoneg doesn't
1719 * interfere with test result */
1720 if (igb_link_test(adapter
, &data
[4]))
1721 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1724 /* indicate we're in test mode */
1729 if (igb_reg_test(adapter
, &data
[0]))
1730 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1733 if (igb_eeprom_test(adapter
, &data
[1]))
1734 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1737 if (igb_intr_test(adapter
, &data
[2]))
1738 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1741 if (igb_loopback_test(adapter
, &data
[3]))
1742 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1744 /* restore speed, duplex, autoneg settings */
1745 adapter
->hw
.phy
.autoneg_advertised
= autoneg_advertised
;
1746 adapter
->hw
.mac
.forced_speed_duplex
= forced_speed_duplex
;
1747 adapter
->hw
.mac
.autoneg
= autoneg
;
1749 /* force this routine to wait until autoneg complete/timeout */
1750 adapter
->hw
.phy
.autoneg_wait_to_complete
= true;
1752 adapter
->hw
.phy
.autoneg_wait_to_complete
= false;
1754 clear_bit(__IGB_TESTING
, &adapter
->state
);
1758 dev_info(&adapter
->pdev
->dev
, "online testing starting\n");
1760 if (igb_link_test(adapter
, &data
[4]))
1761 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1763 /* Online tests aren't run; pass by default */
1769 clear_bit(__IGB_TESTING
, &adapter
->state
);
1771 msleep_interruptible(4 * 1000);
1774 static int igb_wol_exclusion(struct igb_adapter
*adapter
,
1775 struct ethtool_wolinfo
*wol
)
1777 struct e1000_hw
*hw
= &adapter
->hw
;
1778 int retval
= 1; /* fail by default */
1780 switch (hw
->device_id
) {
1781 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1782 /* WoL not supported */
1785 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1786 case E1000_DEV_ID_82576_FIBER
:
1787 case E1000_DEV_ID_82576_SERDES
:
1788 /* Wake events not supported on port B */
1789 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
) {
1793 /* return success for non excluded adapter ports */
1796 case E1000_DEV_ID_82576_QUAD_COPPER
:
1797 /* quad port adapters only support WoL on port A */
1798 if (!(adapter
->flags
& IGB_FLAG_QUAD_PORT_A
)) {
1802 /* return success for non excluded adapter ports */
1806 /* dual port cards only support WoL on port A from now on
1807 * unless it was enabled in the eeprom for port B
1808 * so exclude FUNC_1 ports from having WoL enabled */
1809 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
&&
1810 !adapter
->eeprom_wol
) {
1821 static void igb_get_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1823 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1825 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
|
1826 WAKE_BCAST
| WAKE_MAGIC
;
1829 /* this function will set ->supported = 0 and return 1 if wol is not
1830 * supported by this hardware */
1831 if (igb_wol_exclusion(adapter
, wol
) ||
1832 !device_can_wakeup(&adapter
->pdev
->dev
))
1835 /* apply any specific unsupported masks here */
1836 switch (adapter
->hw
.device_id
) {
1841 if (adapter
->wol
& E1000_WUFC_EX
)
1842 wol
->wolopts
|= WAKE_UCAST
;
1843 if (adapter
->wol
& E1000_WUFC_MC
)
1844 wol
->wolopts
|= WAKE_MCAST
;
1845 if (adapter
->wol
& E1000_WUFC_BC
)
1846 wol
->wolopts
|= WAKE_BCAST
;
1847 if (adapter
->wol
& E1000_WUFC_MAG
)
1848 wol
->wolopts
|= WAKE_MAGIC
;
1853 static int igb_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1855 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1857 if (wol
->wolopts
& (WAKE_PHY
| WAKE_ARP
| WAKE_MAGICSECURE
))
1860 if (igb_wol_exclusion(adapter
, wol
) ||
1861 !device_can_wakeup(&adapter
->pdev
->dev
))
1862 return wol
->wolopts
? -EOPNOTSUPP
: 0;
1864 /* these settings will always override what we currently have */
1867 if (wol
->wolopts
& WAKE_UCAST
)
1868 adapter
->wol
|= E1000_WUFC_EX
;
1869 if (wol
->wolopts
& WAKE_MCAST
)
1870 adapter
->wol
|= E1000_WUFC_MC
;
1871 if (wol
->wolopts
& WAKE_BCAST
)
1872 adapter
->wol
|= E1000_WUFC_BC
;
1873 if (wol
->wolopts
& WAKE_MAGIC
)
1874 adapter
->wol
|= E1000_WUFC_MAG
;
1876 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1881 /* bit defines for adapter->led_status */
1882 #define IGB_LED_ON 0
1884 static int igb_phys_id(struct net_device
*netdev
, u32 data
)
1886 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1887 struct e1000_hw
*hw
= &adapter
->hw
;
1889 if (!data
|| data
> (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
))
1890 data
= (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
);
1893 msleep_interruptible(data
* 1000);
1896 clear_bit(IGB_LED_ON
, &adapter
->led_status
);
1897 igb_cleanup_led(hw
);
1902 static int igb_set_coalesce(struct net_device
*netdev
,
1903 struct ethtool_coalesce
*ec
)
1905 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1908 if ((ec
->rx_coalesce_usecs
> IGB_MAX_ITR_USECS
) ||
1909 ((ec
->rx_coalesce_usecs
> 3) &&
1910 (ec
->rx_coalesce_usecs
< IGB_MIN_ITR_USECS
)) ||
1911 (ec
->rx_coalesce_usecs
== 2))
1914 /* convert to rate of irq's per second */
1915 if (ec
->rx_coalesce_usecs
&& ec
->rx_coalesce_usecs
<= 3) {
1916 adapter
->itr_setting
= ec
->rx_coalesce_usecs
;
1917 adapter
->itr
= IGB_START_ITR
;
1919 adapter
->itr_setting
= ec
->rx_coalesce_usecs
<< 2;
1920 adapter
->itr
= adapter
->itr_setting
;
1923 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1924 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
1925 q_vector
->itr_val
= adapter
->itr
;
1926 q_vector
->set_itr
= 1;
1932 static int igb_get_coalesce(struct net_device
*netdev
,
1933 struct ethtool_coalesce
*ec
)
1935 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1937 if (adapter
->itr_setting
<= 3)
1938 ec
->rx_coalesce_usecs
= adapter
->itr_setting
;
1940 ec
->rx_coalesce_usecs
= adapter
->itr_setting
>> 2;
1946 static int igb_nway_reset(struct net_device
*netdev
)
1948 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1949 if (netif_running(netdev
))
1950 igb_reinit_locked(adapter
);
1954 static int igb_get_sset_count(struct net_device
*netdev
, int sset
)
1958 return IGB_STATS_LEN
;
1960 return IGB_TEST_LEN
;
1966 static void igb_get_ethtool_stats(struct net_device
*netdev
,
1967 struct ethtool_stats
*stats
, u64
*data
)
1969 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1971 int stat_count_tx
= sizeof(struct igb_tx_queue_stats
) / sizeof(u64
);
1972 int stat_count_rx
= sizeof(struct igb_rx_queue_stats
) / sizeof(u64
);
1977 igb_update_stats(adapter
);
1978 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
1979 switch (igb_gstrings_stats
[i
].type
) {
1981 p
= (char *) netdev
+
1982 igb_gstrings_stats
[i
].stat_offset
;
1985 p
= (char *) adapter
+
1986 igb_gstrings_stats
[i
].stat_offset
;
1990 data
[i
] = (igb_gstrings_stats
[i
].sizeof_stat
==
1991 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
1993 for (j
= 0; j
< adapter
->num_tx_queues
; j
++) {
1995 queue_stat
= (u64
*)&adapter
->tx_ring
[j
].tx_stats
;
1996 for (k
= 0; k
< stat_count_tx
; k
++)
1997 data
[i
+ k
] = queue_stat
[k
];
2000 for (j
= 0; j
< adapter
->num_rx_queues
; j
++) {
2002 queue_stat
= (u64
*)&adapter
->rx_ring
[j
].rx_stats
;
2003 for (k
= 0; k
< stat_count_rx
; k
++)
2004 data
[i
+ k
] = queue_stat
[k
];
2009 static void igb_get_strings(struct net_device
*netdev
, u32 stringset
, u8
*data
)
2011 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2015 switch (stringset
) {
2017 memcpy(data
, *igb_gstrings_test
,
2018 IGB_TEST_LEN
*ETH_GSTRING_LEN
);
2021 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
2022 memcpy(p
, igb_gstrings_stats
[i
].stat_string
,
2024 p
+= ETH_GSTRING_LEN
;
2026 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2027 sprintf(p
, "tx_queue_%u_packets", i
);
2028 p
+= ETH_GSTRING_LEN
;
2029 sprintf(p
, "tx_queue_%u_bytes", i
);
2030 p
+= ETH_GSTRING_LEN
;
2031 sprintf(p
, "tx_queue_%u_restart", i
);
2032 p
+= ETH_GSTRING_LEN
;
2034 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2035 sprintf(p
, "rx_queue_%u_packets", i
);
2036 p
+= ETH_GSTRING_LEN
;
2037 sprintf(p
, "rx_queue_%u_bytes", i
);
2038 p
+= ETH_GSTRING_LEN
;
2039 sprintf(p
, "rx_queue_%u_drops", i
);
2040 p
+= ETH_GSTRING_LEN
;
2041 sprintf(p
, "rx_queue_%u_csum_err", i
);
2042 p
+= ETH_GSTRING_LEN
;
2043 sprintf(p
, "rx_queue_%u_alloc_failed", i
);
2044 p
+= ETH_GSTRING_LEN
;
2046 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2051 static const struct ethtool_ops igb_ethtool_ops
= {
2052 .get_settings
= igb_get_settings
,
2053 .set_settings
= igb_set_settings
,
2054 .get_drvinfo
= igb_get_drvinfo
,
2055 .get_regs_len
= igb_get_regs_len
,
2056 .get_regs
= igb_get_regs
,
2057 .get_wol
= igb_get_wol
,
2058 .set_wol
= igb_set_wol
,
2059 .get_msglevel
= igb_get_msglevel
,
2060 .set_msglevel
= igb_set_msglevel
,
2061 .nway_reset
= igb_nway_reset
,
2062 .get_link
= ethtool_op_get_link
,
2063 .get_eeprom_len
= igb_get_eeprom_len
,
2064 .get_eeprom
= igb_get_eeprom
,
2065 .set_eeprom
= igb_set_eeprom
,
2066 .get_ringparam
= igb_get_ringparam
,
2067 .set_ringparam
= igb_set_ringparam
,
2068 .get_pauseparam
= igb_get_pauseparam
,
2069 .set_pauseparam
= igb_set_pauseparam
,
2070 .get_rx_csum
= igb_get_rx_csum
,
2071 .set_rx_csum
= igb_set_rx_csum
,
2072 .get_tx_csum
= igb_get_tx_csum
,
2073 .set_tx_csum
= igb_set_tx_csum
,
2074 .get_sg
= ethtool_op_get_sg
,
2075 .set_sg
= ethtool_op_set_sg
,
2076 .get_tso
= ethtool_op_get_tso
,
2077 .set_tso
= igb_set_tso
,
2078 .self_test
= igb_diag_test
,
2079 .get_strings
= igb_get_strings
,
2080 .phys_id
= igb_phys_id
,
2081 .get_sset_count
= igb_get_sset_count
,
2082 .get_ethtool_stats
= igb_get_ethtool_stats
,
2083 .get_coalesce
= igb_get_coalesce
,
2084 .set_coalesce
= igb_set_coalesce
,
2087 void igb_set_ethtool_ops(struct net_device
*netdev
)
2089 SET_ETHTOOL_OPS(netdev
, &igb_ethtool_ops
);