1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/pci-aspm.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/if_ether.h>
46 #include <linux/aer.h>
48 #include <linux/dca.h>
52 #define DRV_VERSION "1.3.16-k2"
53 char igb_driver_name
[] = "igb";
54 char igb_driver_version
[] = DRV_VERSION
;
55 static const char igb_driver_string
[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
57 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
59 static const struct e1000_info
*igb_info_tbl
[] = {
60 [board_82575
] = &e1000_82575_info
,
63 static struct pci_device_id igb_pci_tbl
[] = {
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
69 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
70 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
71 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
72 /* required last entry */
76 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
78 void igb_reset(struct igb_adapter
*);
79 static int igb_setup_all_tx_resources(struct igb_adapter
*);
80 static int igb_setup_all_rx_resources(struct igb_adapter
*);
81 static void igb_free_all_tx_resources(struct igb_adapter
*);
82 static void igb_free_all_rx_resources(struct igb_adapter
*);
83 void igb_update_stats(struct igb_adapter
*);
84 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
85 static void __devexit
igb_remove(struct pci_dev
*pdev
);
86 static int igb_sw_init(struct igb_adapter
*);
87 static int igb_open(struct net_device
*);
88 static int igb_close(struct net_device
*);
89 static void igb_configure_tx(struct igb_adapter
*);
90 static void igb_configure_rx(struct igb_adapter
*);
91 static void igb_setup_rctl(struct igb_adapter
*);
92 static void igb_clean_all_tx_rings(struct igb_adapter
*);
93 static void igb_clean_all_rx_rings(struct igb_adapter
*);
94 static void igb_clean_tx_ring(struct igb_ring
*);
95 static void igb_clean_rx_ring(struct igb_ring
*);
96 static void igb_set_multi(struct net_device
*);
97 static void igb_update_phy_info(unsigned long);
98 static void igb_watchdog(unsigned long);
99 static void igb_watchdog_task(struct work_struct
*);
100 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
102 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
103 static struct net_device_stats
*igb_get_stats(struct net_device
*);
104 static int igb_change_mtu(struct net_device
*, int);
105 static int igb_set_mac(struct net_device
*, void *);
106 static irqreturn_t
igb_intr(int irq
, void *);
107 static irqreturn_t
igb_intr_msi(int irq
, void *);
108 static irqreturn_t
igb_msix_other(int irq
, void *);
109 static irqreturn_t
igb_msix_rx(int irq
, void *);
110 static irqreturn_t
igb_msix_tx(int irq
, void *);
111 #ifdef CONFIG_IGB_DCA
112 static void igb_update_rx_dca(struct igb_ring
*);
113 static void igb_update_tx_dca(struct igb_ring
*);
114 static void igb_setup_dca(struct igb_adapter
*);
115 #endif /* CONFIG_IGB_DCA */
116 static bool igb_clean_tx_irq(struct igb_ring
*);
117 static int igb_poll(struct napi_struct
*, int);
118 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
119 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
120 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
121 static void igb_tx_timeout(struct net_device
*);
122 static void igb_reset_task(struct work_struct
*);
123 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
124 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
125 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
126 static void igb_restore_vlan(struct igb_adapter
*);
127 static void igb_ping_all_vfs(struct igb_adapter
*);
128 static void igb_msg_task(struct igb_adapter
*);
129 static int igb_rcv_msg_from_vf(struct igb_adapter
*, u32
);
130 static inline void igb_set_rah_pool(struct e1000_hw
*, int , int);
131 static void igb_set_mc_list_pools(struct igb_adapter
*, int, u16
);
132 static void igb_vmm_control(struct igb_adapter
*);
133 static inline void igb_set_vmolr(struct e1000_hw
*, int);
134 static inline int igb_set_vf_rlpml(struct igb_adapter
*, int, int);
135 static int igb_set_vf_mac(struct igb_adapter
*adapter
, int, unsigned char *);
136 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
139 static int igb_suspend(struct pci_dev
*, pm_message_t
);
140 static int igb_resume(struct pci_dev
*);
142 static void igb_shutdown(struct pci_dev
*);
143 #ifdef CONFIG_IGB_DCA
144 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
145 static struct notifier_block dca_notifier
= {
146 .notifier_call
= igb_notify_dca
,
151 #ifdef CONFIG_NET_POLL_CONTROLLER
152 /* for netdump / net console */
153 static void igb_netpoll(struct net_device
*);
155 #ifdef CONFIG_PCI_IOV
156 static unsigned int max_vfs
= 0;
157 module_param(max_vfs
, uint
, 0);
158 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate "
159 "per physical function");
160 #endif /* CONFIG_PCI_IOV */
162 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
163 pci_channel_state_t
);
164 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
165 static void igb_io_resume(struct pci_dev
*);
167 static struct pci_error_handlers igb_err_handler
= {
168 .error_detected
= igb_io_error_detected
,
169 .slot_reset
= igb_io_slot_reset
,
170 .resume
= igb_io_resume
,
174 static struct pci_driver igb_driver
= {
175 .name
= igb_driver_name
,
176 .id_table
= igb_pci_tbl
,
178 .remove
= __devexit_p(igb_remove
),
180 /* Power Managment Hooks */
181 .suspend
= igb_suspend
,
182 .resume
= igb_resume
,
184 .shutdown
= igb_shutdown
,
185 .err_handler
= &igb_err_handler
188 static int global_quad_port_a
; /* global quad port a indication */
190 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
191 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
192 MODULE_LICENSE("GPL");
193 MODULE_VERSION(DRV_VERSION
);
196 * Scale the NIC clock cycle by a large factor so that
197 * relatively small clock corrections can be added or
198 * substracted at each clock tick. The drawbacks of a
199 * large factor are a) that the clock register overflows
200 * more quickly (not such a big deal) and b) that the
201 * increment per tick has to fit into 24 bits.
204 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
206 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
208 * The base scale factor is intentionally a power of two
209 * so that the division in %struct timecounter can be done with
212 #define IGB_TSYNC_SHIFT (19)
213 #define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
216 * The duration of one clock cycle of the NIC.
218 * @todo This hard-coded value is part of the specification and might change
219 * in future hardware revisions. Add revision check.
221 #define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
223 #if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
224 # error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
228 * igb_read_clock - read raw cycle counter (to be used by time counter)
230 static cycle_t
igb_read_clock(const struct cyclecounter
*tc
)
232 struct igb_adapter
*adapter
=
233 container_of(tc
, struct igb_adapter
, cycles
);
234 struct e1000_hw
*hw
= &adapter
->hw
;
237 stamp
= rd32(E1000_SYSTIML
);
238 stamp
|= (u64
)rd32(E1000_SYSTIMH
) << 32ULL;
245 * igb_get_hw_dev_name - return device name string
246 * used by hardware layer to print debugging information
248 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
250 struct igb_adapter
*adapter
= hw
->back
;
251 return adapter
->netdev
->name
;
255 * igb_get_time_str - format current NIC and system time as string
257 static char *igb_get_time_str(struct igb_adapter
*adapter
,
260 cycle_t hw
= adapter
->cycles
.read(&adapter
->cycles
);
261 struct timespec nic
= ns_to_timespec(timecounter_read(&adapter
->clock
));
263 struct timespec delta
;
264 getnstimeofday(&sys
);
266 delta
= timespec_sub(nic
, sys
);
269 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
271 (long)nic
.tv_sec
, nic
.tv_nsec
,
272 (long)sys
.tv_sec
, sys
.tv_nsec
,
273 (long)delta
.tv_sec
, delta
.tv_nsec
);
280 * igb_desc_unused - calculate if we have unused descriptors
282 static int igb_desc_unused(struct igb_ring
*ring
)
284 if (ring
->next_to_clean
> ring
->next_to_use
)
285 return ring
->next_to_clean
- ring
->next_to_use
- 1;
287 return ring
->count
+ ring
->next_to_clean
- ring
->next_to_use
- 1;
291 * igb_init_module - Driver Registration Routine
293 * igb_init_module is the first routine called when the driver is
294 * loaded. All it does is register with the PCI subsystem.
296 static int __init
igb_init_module(void)
299 printk(KERN_INFO
"%s - version %s\n",
300 igb_driver_string
, igb_driver_version
);
302 printk(KERN_INFO
"%s\n", igb_copyright
);
304 global_quad_port_a
= 0;
306 #ifdef CONFIG_IGB_DCA
307 dca_register_notify(&dca_notifier
);
310 ret
= pci_register_driver(&igb_driver
);
314 module_init(igb_init_module
);
317 * igb_exit_module - Driver Exit Cleanup Routine
319 * igb_exit_module is called just before the driver is removed
322 static void __exit
igb_exit_module(void)
324 #ifdef CONFIG_IGB_DCA
325 dca_unregister_notify(&dca_notifier
);
327 pci_unregister_driver(&igb_driver
);
330 module_exit(igb_exit_module
);
332 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
334 * igb_cache_ring_register - Descriptor ring to register mapping
335 * @adapter: board private structure to initialize
337 * Once we know the feature-set enabled for the device, we'll cache
338 * the register offset the descriptor ring is assigned to.
340 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
343 unsigned int rbase_offset
= adapter
->vfs_allocated_count
;
345 switch (adapter
->hw
.mac
.type
) {
347 /* The queues are allocated for virtualization such that VF 0
348 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
349 * In order to avoid collision we start at the first free queue
350 * and continue consuming queues in the same sequence
352 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
353 adapter
->rx_ring
[i
].reg_idx
= rbase_offset
+
355 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
356 adapter
->tx_ring
[i
].reg_idx
= rbase_offset
+
361 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
362 adapter
->rx_ring
[i
].reg_idx
= i
;
363 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
364 adapter
->tx_ring
[i
].reg_idx
= i
;
370 * igb_alloc_queues - Allocate memory for all rings
371 * @adapter: board private structure to initialize
373 * We allocate one ring per queue at run-time since we don't know the
374 * number of queues at compile-time.
376 static int igb_alloc_queues(struct igb_adapter
*adapter
)
380 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
381 sizeof(struct igb_ring
), GFP_KERNEL
);
382 if (!adapter
->tx_ring
)
385 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
386 sizeof(struct igb_ring
), GFP_KERNEL
);
387 if (!adapter
->rx_ring
) {
388 kfree(adapter
->tx_ring
);
392 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
394 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
395 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
396 ring
->count
= adapter
->tx_ring_count
;
397 ring
->adapter
= adapter
;
398 ring
->queue_index
= i
;
400 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
401 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
402 ring
->count
= adapter
->rx_ring_count
;
403 ring
->adapter
= adapter
;
404 ring
->queue_index
= i
;
405 ring
->itr_register
= E1000_ITR
;
407 /* set a default napi handler for each rx_ring */
408 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
411 igb_cache_ring_register(adapter
);
415 static void igb_free_queues(struct igb_adapter
*adapter
)
419 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
420 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
422 adapter
->num_rx_queues
= 0;
423 adapter
->num_tx_queues
= 0;
425 kfree(adapter
->tx_ring
);
426 kfree(adapter
->rx_ring
);
429 #define IGB_N0_QUEUE -1
430 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
431 int tx_queue
, int msix_vector
)
434 struct e1000_hw
*hw
= &adapter
->hw
;
437 switch (hw
->mac
.type
) {
439 /* The 82575 assigns vectors using a bitmask, which matches the
440 bitmask for the EICR/EIMS/EIMC registers. To assign one
441 or more queues to a vector, we write the appropriate bits
442 into the MSIXBM register for that vector. */
443 if (rx_queue
> IGB_N0_QUEUE
) {
444 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
445 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
447 if (tx_queue
> IGB_N0_QUEUE
) {
448 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
449 adapter
->tx_ring
[tx_queue
].eims_value
=
450 E1000_EICR_TX_QUEUE0
<< tx_queue
;
452 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
455 /* 82576 uses a table-based method for assigning vectors.
456 Each queue has a single entry in the table to which we write
457 a vector number along with a "valid" bit. Sadly, the layout
458 of the table is somewhat counterintuitive. */
459 if (rx_queue
> IGB_N0_QUEUE
) {
460 index
= (rx_queue
>> 1) + adapter
->vfs_allocated_count
;
461 ivar
= array_rd32(E1000_IVAR0
, index
);
462 if (rx_queue
& 0x1) {
463 /* vector goes into third byte of register */
464 ivar
= ivar
& 0xFF00FFFF;
465 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
467 /* vector goes into low byte of register */
468 ivar
= ivar
& 0xFFFFFF00;
469 ivar
|= msix_vector
| E1000_IVAR_VALID
;
471 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
472 array_wr32(E1000_IVAR0
, index
, ivar
);
474 if (tx_queue
> IGB_N0_QUEUE
) {
475 index
= (tx_queue
>> 1) + adapter
->vfs_allocated_count
;
476 ivar
= array_rd32(E1000_IVAR0
, index
);
477 if (tx_queue
& 0x1) {
478 /* vector goes into high byte of register */
479 ivar
= ivar
& 0x00FFFFFF;
480 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
482 /* vector goes into second byte of register */
483 ivar
= ivar
& 0xFFFF00FF;
484 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
486 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
487 array_wr32(E1000_IVAR0
, index
, ivar
);
497 * igb_configure_msix - Configure MSI-X hardware
499 * igb_configure_msix sets up the hardware to properly
500 * generate MSI-X interrupts.
502 static void igb_configure_msix(struct igb_adapter
*adapter
)
506 struct e1000_hw
*hw
= &adapter
->hw
;
508 adapter
->eims_enable_mask
= 0;
509 if (hw
->mac
.type
== e1000_82576
)
510 /* Turn on MSI-X capability first, or our settings
511 * won't stick. And it will take days to debug. */
512 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
513 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
516 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
517 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
518 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
519 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
520 if (tx_ring
->itr_val
)
521 writel(tx_ring
->itr_val
,
522 hw
->hw_addr
+ tx_ring
->itr_register
);
524 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
527 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
528 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
529 rx_ring
->buddy
= NULL
;
530 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
531 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
532 if (rx_ring
->itr_val
)
533 writel(rx_ring
->itr_val
,
534 hw
->hw_addr
+ rx_ring
->itr_register
);
536 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
540 /* set vector for other causes, i.e. link changes */
541 switch (hw
->mac
.type
) {
543 array_wr32(E1000_MSIXBM(0), vector
++,
546 tmp
= rd32(E1000_CTRL_EXT
);
547 /* enable MSI-X PBA support*/
548 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
550 /* Auto-Mask interrupts upon ICR read. */
551 tmp
|= E1000_CTRL_EXT_EIAME
;
552 tmp
|= E1000_CTRL_EXT_IRCA
;
554 wr32(E1000_CTRL_EXT
, tmp
);
555 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
556 adapter
->eims_other
= E1000_EIMS_OTHER
;
561 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
562 wr32(E1000_IVAR_MISC
, tmp
);
564 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
565 adapter
->eims_other
= 1 << (vector
- 1);
568 /* do nothing, since nothing else supports MSI-X */
570 } /* switch (hw->mac.type) */
575 * igb_request_msix - Initialize MSI-X interrupts
577 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
580 static int igb_request_msix(struct igb_adapter
*adapter
)
582 struct net_device
*netdev
= adapter
->netdev
;
583 int i
, err
= 0, vector
= 0;
587 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
588 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
589 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
590 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
591 &igb_msix_tx
, 0, ring
->name
,
592 &(adapter
->tx_ring
[i
]));
595 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
596 ring
->itr_val
= 976; /* ~4000 ints/sec */
599 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
600 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
601 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
602 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
604 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
605 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
606 &igb_msix_rx
, 0, ring
->name
,
607 &(adapter
->rx_ring
[i
]));
610 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
611 ring
->itr_val
= adapter
->itr
;
615 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
616 &igb_msix_other
, 0, netdev
->name
, netdev
);
620 igb_configure_msix(adapter
);
626 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
628 if (adapter
->msix_entries
) {
629 pci_disable_msix(adapter
->pdev
);
630 kfree(adapter
->msix_entries
);
631 adapter
->msix_entries
= NULL
;
632 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
633 pci_disable_msi(adapter
->pdev
);
639 * igb_set_interrupt_capability - set MSI or MSI-X if supported
641 * Attempt to configure interrupts using the best available
642 * capabilities of the hardware and kernel.
644 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
649 /* Number of supported queues. */
650 /* Having more queues than CPUs doesn't make sense. */
651 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
652 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
654 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
655 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
657 if (!adapter
->msix_entries
)
660 for (i
= 0; i
< numvecs
; i
++)
661 adapter
->msix_entries
[i
].entry
= i
;
663 err
= pci_enable_msix(adapter
->pdev
,
664 adapter
->msix_entries
,
669 igb_reset_interrupt_capability(adapter
);
671 /* If we can't do MSI-X, try MSI */
673 #ifdef CONFIG_PCI_IOV
674 /* disable SR-IOV for non MSI-X configurations */
675 if (adapter
->vf_data
) {
676 struct e1000_hw
*hw
= &adapter
->hw
;
677 /* disable iov and allow time for transactions to clear */
678 pci_disable_sriov(adapter
->pdev
);
681 kfree(adapter
->vf_data
);
682 adapter
->vf_data
= NULL
;
683 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
685 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
688 adapter
->num_rx_queues
= 1;
689 adapter
->num_tx_queues
= 1;
690 if (!pci_enable_msi(adapter
->pdev
))
691 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
693 /* Notify the stack of the (possibly) reduced Tx Queue count. */
694 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
699 * igb_request_irq - initialize interrupts
701 * Attempts to configure interrupts using the best available
702 * capabilities of the hardware and kernel.
704 static int igb_request_irq(struct igb_adapter
*adapter
)
706 struct net_device
*netdev
= adapter
->netdev
;
707 struct e1000_hw
*hw
= &adapter
->hw
;
710 if (adapter
->msix_entries
) {
711 err
= igb_request_msix(adapter
);
714 /* fall back to MSI */
715 igb_reset_interrupt_capability(adapter
);
716 if (!pci_enable_msi(adapter
->pdev
))
717 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
718 igb_free_all_tx_resources(adapter
);
719 igb_free_all_rx_resources(adapter
);
720 adapter
->num_rx_queues
= 1;
721 igb_alloc_queues(adapter
);
723 switch (hw
->mac
.type
) {
725 wr32(E1000_MSIXBM(0),
726 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
729 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
736 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
737 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
738 netdev
->name
, netdev
);
741 /* fall back to legacy interrupts */
742 igb_reset_interrupt_capability(adapter
);
743 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
746 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
747 netdev
->name
, netdev
);
750 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
757 static void igb_free_irq(struct igb_adapter
*adapter
)
759 struct net_device
*netdev
= adapter
->netdev
;
761 if (adapter
->msix_entries
) {
764 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
765 free_irq(adapter
->msix_entries
[vector
++].vector
,
766 &(adapter
->tx_ring
[i
]));
767 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
768 free_irq(adapter
->msix_entries
[vector
++].vector
,
769 &(adapter
->rx_ring
[i
]));
771 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
775 free_irq(adapter
->pdev
->irq
, netdev
);
779 * igb_irq_disable - Mask off interrupt generation on the NIC
780 * @adapter: board private structure
782 static void igb_irq_disable(struct igb_adapter
*adapter
)
784 struct e1000_hw
*hw
= &adapter
->hw
;
786 if (adapter
->msix_entries
) {
788 wr32(E1000_EIMC
, ~0);
795 synchronize_irq(adapter
->pdev
->irq
);
799 * igb_irq_enable - Enable default interrupt generation settings
800 * @adapter: board private structure
802 static void igb_irq_enable(struct igb_adapter
*adapter
)
804 struct e1000_hw
*hw
= &adapter
->hw
;
806 if (adapter
->msix_entries
) {
807 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
808 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
809 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
810 if (adapter
->vfs_allocated_count
)
811 wr32(E1000_MBVFIMR
, 0xFF);
812 wr32(E1000_IMS
, (E1000_IMS_LSC
| E1000_IMS_VMMB
|
813 E1000_IMS_DOUTSYNC
));
815 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
816 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
820 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
822 struct net_device
*netdev
= adapter
->netdev
;
823 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
824 u16 old_vid
= adapter
->mng_vlan_id
;
825 if (adapter
->vlgrp
) {
826 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
827 if (adapter
->hw
.mng_cookie
.status
&
828 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
829 igb_vlan_rx_add_vid(netdev
, vid
);
830 adapter
->mng_vlan_id
= vid
;
832 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
834 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
836 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
837 igb_vlan_rx_kill_vid(netdev
, old_vid
);
839 adapter
->mng_vlan_id
= vid
;
844 * igb_release_hw_control - release control of the h/w to f/w
845 * @adapter: address of board private structure
847 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
848 * For ASF and Pass Through versions of f/w this means that the
849 * driver is no longer loaded.
852 static void igb_release_hw_control(struct igb_adapter
*adapter
)
854 struct e1000_hw
*hw
= &adapter
->hw
;
857 /* Let firmware take over control of h/w */
858 ctrl_ext
= rd32(E1000_CTRL_EXT
);
860 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
865 * igb_get_hw_control - get control of the h/w from f/w
866 * @adapter: address of board private structure
868 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
869 * For ASF and Pass Through versions of f/w this means that
870 * the driver is loaded.
873 static void igb_get_hw_control(struct igb_adapter
*adapter
)
875 struct e1000_hw
*hw
= &adapter
->hw
;
878 /* Let firmware know the driver has taken over */
879 ctrl_ext
= rd32(E1000_CTRL_EXT
);
881 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
885 * igb_configure - configure the hardware for RX and TX
886 * @adapter: private board structure
888 static void igb_configure(struct igb_adapter
*adapter
)
890 struct net_device
*netdev
= adapter
->netdev
;
893 igb_get_hw_control(adapter
);
894 igb_set_multi(netdev
);
896 igb_restore_vlan(adapter
);
898 igb_configure_tx(adapter
);
899 igb_setup_rctl(adapter
);
900 igb_configure_rx(adapter
);
902 igb_rx_fifo_flush_82575(&adapter
->hw
);
904 /* call igb_desc_unused which always leaves
905 * at least 1 descriptor unused to make sure
906 * next_to_use != next_to_clean */
907 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
908 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
909 igb_alloc_rx_buffers_adv(ring
, igb_desc_unused(ring
));
913 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
918 * igb_up - Open the interface and prepare it to handle traffic
919 * @adapter: board private structure
922 int igb_up(struct igb_adapter
*adapter
)
924 struct e1000_hw
*hw
= &adapter
->hw
;
927 /* hardware has been reset, we need to reload some things */
928 igb_configure(adapter
);
930 clear_bit(__IGB_DOWN
, &adapter
->state
);
932 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
933 napi_enable(&adapter
->rx_ring
[i
].napi
);
934 if (adapter
->msix_entries
)
935 igb_configure_msix(adapter
);
937 igb_vmm_control(adapter
);
938 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
939 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
941 /* Clear any pending interrupts. */
943 igb_irq_enable(adapter
);
945 /* Fire a link change interrupt to start the watchdog. */
946 wr32(E1000_ICS
, E1000_ICS_LSC
);
950 void igb_down(struct igb_adapter
*adapter
)
952 struct e1000_hw
*hw
= &adapter
->hw
;
953 struct net_device
*netdev
= adapter
->netdev
;
957 /* signal that we're down so the interrupt handler does not
958 * reschedule our watchdog timer */
959 set_bit(__IGB_DOWN
, &adapter
->state
);
961 /* disable receives in the hardware */
962 rctl
= rd32(E1000_RCTL
);
963 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
964 /* flush and sleep below */
966 netif_tx_stop_all_queues(netdev
);
968 /* disable transmits in the hardware */
969 tctl
= rd32(E1000_TCTL
);
970 tctl
&= ~E1000_TCTL_EN
;
971 wr32(E1000_TCTL
, tctl
);
972 /* flush both disables and wait for them to finish */
976 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
977 napi_disable(&adapter
->rx_ring
[i
].napi
);
979 igb_irq_disable(adapter
);
981 del_timer_sync(&adapter
->watchdog_timer
);
982 del_timer_sync(&adapter
->phy_info_timer
);
984 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
985 netif_carrier_off(netdev
);
987 /* record the stats before reset*/
988 igb_update_stats(adapter
);
990 adapter
->link_speed
= 0;
991 adapter
->link_duplex
= 0;
993 if (!pci_channel_offline(adapter
->pdev
))
995 igb_clean_all_tx_rings(adapter
);
996 igb_clean_all_rx_rings(adapter
);
999 void igb_reinit_locked(struct igb_adapter
*adapter
)
1001 WARN_ON(in_interrupt());
1002 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1006 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1009 void igb_reset(struct igb_adapter
*adapter
)
1011 struct e1000_hw
*hw
= &adapter
->hw
;
1012 struct e1000_mac_info
*mac
= &hw
->mac
;
1013 struct e1000_fc_info
*fc
= &hw
->fc
;
1014 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
1017 /* Repartition Pba for greater than 9k mtu
1018 * To take effect CTRL.RST is required.
1020 switch (mac
->type
) {
1022 pba
= E1000_PBA_64K
;
1026 pba
= E1000_PBA_34K
;
1030 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1031 (mac
->type
< e1000_82576
)) {
1032 /* adjust PBA for jumbo frames */
1033 wr32(E1000_PBA
, pba
);
1035 /* To maintain wire speed transmits, the Tx FIFO should be
1036 * large enough to accommodate two full transmit packets,
1037 * rounded up to the next 1KB and expressed in KB. Likewise,
1038 * the Rx FIFO should be large enough to accommodate at least
1039 * one full receive packet and is similarly rounded up and
1040 * expressed in KB. */
1041 pba
= rd32(E1000_PBA
);
1042 /* upper 16 bits has Tx packet buffer allocation size in KB */
1043 tx_space
= pba
>> 16;
1044 /* lower 16 bits has Rx packet buffer allocation size in KB */
1046 /* the tx fifo also stores 16 bytes of information about the tx
1047 * but don't include ethernet FCS because hardware appends it */
1048 min_tx_space
= (adapter
->max_frame_size
+
1049 sizeof(union e1000_adv_tx_desc
) -
1051 min_tx_space
= ALIGN(min_tx_space
, 1024);
1052 min_tx_space
>>= 10;
1053 /* software strips receive CRC, so leave room for it */
1054 min_rx_space
= adapter
->max_frame_size
;
1055 min_rx_space
= ALIGN(min_rx_space
, 1024);
1056 min_rx_space
>>= 10;
1058 /* If current Tx allocation is less than the min Tx FIFO size,
1059 * and the min Tx FIFO size is less than the current Rx FIFO
1060 * allocation, take space away from current Rx allocation */
1061 if (tx_space
< min_tx_space
&&
1062 ((min_tx_space
- tx_space
) < pba
)) {
1063 pba
= pba
- (min_tx_space
- tx_space
);
1065 /* if short on rx space, rx wins and must trump tx
1067 if (pba
< min_rx_space
)
1070 wr32(E1000_PBA
, pba
);
1073 /* flow control settings */
1074 /* The high water mark must be low enough to fit one full frame
1075 * (or the size used for early receive) above it in the Rx FIFO.
1076 * Set it to the lower of:
1077 * - 90% of the Rx FIFO size, or
1078 * - the full Rx FIFO size minus one full frame */
1079 hwm
= min(((pba
<< 10) * 9 / 10),
1080 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1082 if (mac
->type
< e1000_82576
) {
1083 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
1084 fc
->low_water
= fc
->high_water
- 8;
1086 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
1087 fc
->low_water
= fc
->high_water
- 16;
1089 fc
->pause_time
= 0xFFFF;
1091 fc
->type
= fc
->original_type
;
1093 /* disable receive for all VFs and wait one second */
1094 if (adapter
->vfs_allocated_count
) {
1096 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1097 adapter
->vf_data
[i
].clear_to_send
= false;
1099 /* ping all the active vfs to let them know we are going down */
1100 igb_ping_all_vfs(adapter
);
1102 /* disable transmits and receives */
1103 wr32(E1000_VFRE
, 0);
1104 wr32(E1000_VFTE
, 0);
1107 /* Allow time for pending master requests to run */
1108 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
1111 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
1112 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
1114 igb_update_mng_vlan(adapter
);
1116 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1117 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1119 igb_reset_adaptive(&adapter
->hw
);
1120 igb_get_phy_info(&adapter
->hw
);
1123 static const struct net_device_ops igb_netdev_ops
= {
1124 .ndo_open
= igb_open
,
1125 .ndo_stop
= igb_close
,
1126 .ndo_start_xmit
= igb_xmit_frame_adv
,
1127 .ndo_get_stats
= igb_get_stats
,
1128 .ndo_set_multicast_list
= igb_set_multi
,
1129 .ndo_set_mac_address
= igb_set_mac
,
1130 .ndo_change_mtu
= igb_change_mtu
,
1131 .ndo_do_ioctl
= igb_ioctl
,
1132 .ndo_tx_timeout
= igb_tx_timeout
,
1133 .ndo_validate_addr
= eth_validate_addr
,
1134 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1135 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1136 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1137 #ifdef CONFIG_NET_POLL_CONTROLLER
1138 .ndo_poll_controller
= igb_netpoll
,
1143 * igb_probe - Device Initialization Routine
1144 * @pdev: PCI device information struct
1145 * @ent: entry in igb_pci_tbl
1147 * Returns 0 on success, negative on failure
1149 * igb_probe initializes an adapter identified by a pci_dev structure.
1150 * The OS initialization, configuring of the adapter private structure,
1151 * and a hardware reset occur.
1153 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1154 const struct pci_device_id
*ent
)
1156 struct net_device
*netdev
;
1157 struct igb_adapter
*adapter
;
1158 struct e1000_hw
*hw
;
1159 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1160 unsigned long mmio_start
, mmio_len
;
1161 int err
, pci_using_dac
;
1162 u16 eeprom_data
= 0;
1163 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1166 err
= pci_enable_device_mem(pdev
);
1171 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
1173 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
1177 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1179 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
1181 dev_err(&pdev
->dev
, "No usable DMA "
1182 "configuration, aborting\n");
1188 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1194 err
= pci_enable_pcie_error_reporting(pdev
);
1196 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1198 /* non-fatal, continue */
1201 pci_set_master(pdev
);
1202 pci_save_state(pdev
);
1205 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
1206 IGB_ABS_MAX_TX_QUEUES
);
1208 goto err_alloc_etherdev
;
1210 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1212 pci_set_drvdata(pdev
, netdev
);
1213 adapter
= netdev_priv(netdev
);
1214 adapter
->netdev
= netdev
;
1215 adapter
->pdev
= pdev
;
1218 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1220 mmio_start
= pci_resource_start(pdev
, 0);
1221 mmio_len
= pci_resource_len(pdev
, 0);
1224 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1228 netdev
->netdev_ops
= &igb_netdev_ops
;
1229 igb_set_ethtool_ops(netdev
);
1230 netdev
->watchdog_timeo
= 5 * HZ
;
1232 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1234 netdev
->mem_start
= mmio_start
;
1235 netdev
->mem_end
= mmio_start
+ mmio_len
;
1237 /* PCI config space info */
1238 hw
->vendor_id
= pdev
->vendor
;
1239 hw
->device_id
= pdev
->device
;
1240 hw
->revision_id
= pdev
->revision
;
1241 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1242 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1244 /* setup the private structure */
1246 /* Copy the default MAC, PHY and NVM function pointers */
1247 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1248 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1249 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1250 /* Initialize skew-specific constants */
1251 err
= ei
->get_invariants(hw
);
1255 #ifdef CONFIG_PCI_IOV
1256 /* since iov functionality isn't critical to base device function we
1257 * can accept failure. If it fails we don't allow iov to be enabled */
1258 if (hw
->mac
.type
== e1000_82576
) {
1259 /* 82576 supports a maximum of 7 VFs in addition to the PF */
1260 unsigned int num_vfs
= (max_vfs
> 7) ? 7 : max_vfs
;
1262 unsigned char mac_addr
[ETH_ALEN
];
1265 adapter
->vf_data
= kcalloc(num_vfs
,
1266 sizeof(struct vf_data_storage
),
1268 if (!adapter
->vf_data
) {
1270 "Could not allocate VF private data - "
1271 "IOV enable failed\n");
1273 err
= pci_enable_sriov(pdev
, num_vfs
);
1275 adapter
->vfs_allocated_count
= num_vfs
;
1276 dev_info(&pdev
->dev
,
1277 "%d vfs allocated\n",
1280 i
< adapter
->vfs_allocated_count
;
1282 random_ether_addr(mac_addr
);
1283 igb_set_vf_mac(adapter
, i
,
1287 kfree(adapter
->vf_data
);
1288 adapter
->vf_data
= NULL
;
1295 /* setup the private structure */
1296 err
= igb_sw_init(adapter
);
1300 igb_get_bus_info_pcie(hw
);
1303 switch (hw
->mac
.type
) {
1305 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1312 hw
->phy
.autoneg_wait_to_complete
= false;
1313 hw
->mac
.adaptive_ifs
= true;
1315 /* Copper options */
1316 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1317 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1318 hw
->phy
.disable_polarity_correction
= false;
1319 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1322 if (igb_check_reset_block(hw
))
1323 dev_info(&pdev
->dev
,
1324 "PHY reset is blocked due to SOL/IDER session.\n");
1326 netdev
->features
= NETIF_F_SG
|
1328 NETIF_F_HW_VLAN_TX
|
1329 NETIF_F_HW_VLAN_RX
|
1330 NETIF_F_HW_VLAN_FILTER
;
1332 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1333 netdev
->features
|= NETIF_F_TSO
;
1334 netdev
->features
|= NETIF_F_TSO6
;
1336 netdev
->features
|= NETIF_F_GRO
;
1338 netdev
->vlan_features
|= NETIF_F_TSO
;
1339 netdev
->vlan_features
|= NETIF_F_TSO6
;
1340 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1341 netdev
->vlan_features
|= NETIF_F_SG
;
1344 netdev
->features
|= NETIF_F_HIGHDMA
;
1346 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1348 /* before reading the NVM, reset the controller to put the device in a
1349 * known good starting state */
1350 hw
->mac
.ops
.reset_hw(hw
);
1352 /* make sure the NVM is good */
1353 if (igb_validate_nvm_checksum(hw
) < 0) {
1354 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1359 /* copy the MAC address out of the NVM */
1360 if (hw
->mac
.ops
.read_mac_addr(hw
))
1361 dev_err(&pdev
->dev
, "NVM Read Error\n");
1363 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1364 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1366 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1367 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1372 setup_timer(&adapter
->watchdog_timer
, &igb_watchdog
,
1373 (unsigned long) adapter
);
1374 setup_timer(&adapter
->phy_info_timer
, &igb_update_phy_info
,
1375 (unsigned long) adapter
);
1377 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1378 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1380 /* Initialize link properties that are user-changeable */
1381 adapter
->fc_autoneg
= true;
1382 hw
->mac
.autoneg
= true;
1383 hw
->phy
.autoneg_advertised
= 0x2f;
1385 hw
->fc
.original_type
= e1000_fc_default
;
1386 hw
->fc
.type
= e1000_fc_default
;
1388 adapter
->itr_setting
= IGB_DEFAULT_ITR
;
1389 adapter
->itr
= IGB_START_ITR
;
1391 igb_validate_mdi_setting(hw
);
1393 adapter
->rx_csum
= 1;
1395 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1396 * enable the ACPI Magic Packet filter
1399 if (hw
->bus
.func
== 0)
1400 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1401 else if (hw
->bus
.func
== 1)
1402 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
1404 if (eeprom_data
& eeprom_apme_mask
)
1405 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1407 /* now that we have the eeprom settings, apply the special cases where
1408 * the eeprom may be wrong or the board simply won't support wake on
1409 * lan on a particular port */
1410 switch (pdev
->device
) {
1411 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1412 adapter
->eeprom_wol
= 0;
1414 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1415 case E1000_DEV_ID_82576_FIBER
:
1416 case E1000_DEV_ID_82576_SERDES
:
1417 /* Wake events only supported on port A for dual fiber
1418 * regardless of eeprom setting */
1419 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1420 adapter
->eeprom_wol
= 0;
1422 case E1000_DEV_ID_82576_QUAD_COPPER
:
1423 /* if quad port adapter, disable WoL on all but port A */
1424 if (global_quad_port_a
!= 0)
1425 adapter
->eeprom_wol
= 0;
1427 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
1428 /* Reset for multiple quad port adapters */
1429 if (++global_quad_port_a
== 4)
1430 global_quad_port_a
= 0;
1434 /* initialize the wol settings based on the eeprom settings */
1435 adapter
->wol
= adapter
->eeprom_wol
;
1436 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1438 /* reset the hardware with the new settings */
1441 /* let the f/w know that the h/w is now under the control of the
1443 igb_get_hw_control(adapter
);
1445 /* tell the stack to leave us alone until igb_open() is called */
1446 netif_carrier_off(netdev
);
1447 netif_tx_stop_all_queues(netdev
);
1449 strcpy(netdev
->name
, "eth%d");
1450 err
= register_netdev(netdev
);
1454 #ifdef CONFIG_IGB_DCA
1455 if (dca_add_requester(&pdev
->dev
) == 0) {
1456 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1457 dev_info(&pdev
->dev
, "DCA enabled\n");
1458 /* Always use CB2 mode, difference is masked
1459 * in the CB driver. */
1460 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
1461 igb_setup_dca(adapter
);
1466 * Initialize hardware timer: we keep it running just in case
1467 * that some program needs it later on.
1469 memset(&adapter
->cycles
, 0, sizeof(adapter
->cycles
));
1470 adapter
->cycles
.read
= igb_read_clock
;
1471 adapter
->cycles
.mask
= CLOCKSOURCE_MASK(64);
1472 adapter
->cycles
.mult
= 1;
1473 adapter
->cycles
.shift
= IGB_TSYNC_SHIFT
;
1476 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS
* IGB_TSYNC_SCALE
);
1479 * Avoid rollover while we initialize by resetting the time counter.
1481 wr32(E1000_SYSTIML
, 0x00000000);
1482 wr32(E1000_SYSTIMH
, 0x00000000);
1485 * Set registers so that rollover occurs soon to test this.
1487 wr32(E1000_SYSTIML
, 0x00000000);
1488 wr32(E1000_SYSTIMH
, 0xFF800000);
1491 timecounter_init(&adapter
->clock
,
1493 ktime_to_ns(ktime_get_real()));
1496 * Synchronize our NIC clock against system wall clock. NIC
1497 * time stamp reading requires ~3us per sample, each sample
1498 * was pretty stable even under load => only require 10
1499 * samples for each offset comparison.
1501 memset(&adapter
->compare
, 0, sizeof(adapter
->compare
));
1502 adapter
->compare
.source
= &adapter
->clock
;
1503 adapter
->compare
.target
= ktime_get_real
;
1504 adapter
->compare
.num_samples
= 10;
1505 timecompare_update(&adapter
->compare
, 0);
1511 "igb: %s: hw %p initialized timer\n",
1512 igb_get_time_str(adapter
, buffer
),
1517 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1518 /* print bus type/speed/width info */
1519 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1521 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1522 ? "2.5Gb/s" : "unknown"),
1523 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ? "Width x4" :
1524 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ? "Width x2" :
1525 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ? "Width x1" :
1529 igb_read_part_num(hw
, &part_num
);
1530 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1531 (part_num
>> 8), (part_num
& 0xff));
1533 dev_info(&pdev
->dev
,
1534 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1535 adapter
->msix_entries
? "MSI-X" :
1536 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1537 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1542 igb_release_hw_control(adapter
);
1544 if (!igb_check_reset_block(hw
))
1547 if (hw
->flash_address
)
1548 iounmap(hw
->flash_address
);
1550 igb_free_queues(adapter
);
1552 iounmap(hw
->hw_addr
);
1554 free_netdev(netdev
);
1556 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1560 pci_disable_device(pdev
);
1565 * igb_remove - Device Removal Routine
1566 * @pdev: PCI device information struct
1568 * igb_remove is called by the PCI subsystem to alert the driver
1569 * that it should release a PCI device. The could be caused by a
1570 * Hot-Plug event, or because the driver is going to be removed from
1573 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1575 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1576 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1577 struct e1000_hw
*hw
= &adapter
->hw
;
1580 /* flush_scheduled work may reschedule our watchdog task, so
1581 * explicitly disable watchdog tasks from being rescheduled */
1582 set_bit(__IGB_DOWN
, &adapter
->state
);
1583 del_timer_sync(&adapter
->watchdog_timer
);
1584 del_timer_sync(&adapter
->phy_info_timer
);
1586 flush_scheduled_work();
1588 #ifdef CONFIG_IGB_DCA
1589 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1590 dev_info(&pdev
->dev
, "DCA disabled\n");
1591 dca_remove_requester(&pdev
->dev
);
1592 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1593 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
1597 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1598 * would have already happened in close and is redundant. */
1599 igb_release_hw_control(adapter
);
1601 unregister_netdev(netdev
);
1603 if (!igb_check_reset_block(&adapter
->hw
))
1604 igb_reset_phy(&adapter
->hw
);
1606 igb_reset_interrupt_capability(adapter
);
1608 igb_free_queues(adapter
);
1610 #ifdef CONFIG_PCI_IOV
1611 /* reclaim resources allocated to VFs */
1612 if (adapter
->vf_data
) {
1613 /* disable iov and allow time for transactions to clear */
1614 pci_disable_sriov(pdev
);
1617 kfree(adapter
->vf_data
);
1618 adapter
->vf_data
= NULL
;
1619 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1621 dev_info(&pdev
->dev
, "IOV Disabled\n");
1624 iounmap(hw
->hw_addr
);
1625 if (hw
->flash_address
)
1626 iounmap(hw
->flash_address
);
1627 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1630 free_netdev(netdev
);
1632 err
= pci_disable_pcie_error_reporting(pdev
);
1635 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1637 pci_disable_device(pdev
);
1641 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1642 * @adapter: board private structure to initialize
1644 * igb_sw_init initializes the Adapter private data structure.
1645 * Fields are initialized based on PCI device information and
1646 * OS network device settings (MTU size).
1648 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1650 struct e1000_hw
*hw
= &adapter
->hw
;
1651 struct net_device
*netdev
= adapter
->netdev
;
1652 struct pci_dev
*pdev
= adapter
->pdev
;
1654 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1656 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1657 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1658 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1659 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1660 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1661 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1663 /* This call may decrease the number of queues depending on
1664 * interrupt mode. */
1665 igb_set_interrupt_capability(adapter
);
1667 if (igb_alloc_queues(adapter
)) {
1668 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1672 /* Explicitly disable IRQ since the NIC can be in any state. */
1673 igb_irq_disable(adapter
);
1675 set_bit(__IGB_DOWN
, &adapter
->state
);
1680 * igb_open - Called when a network interface is made active
1681 * @netdev: network interface device structure
1683 * Returns 0 on success, negative value on failure
1685 * The open entry point is called when a network interface is made
1686 * active by the system (IFF_UP). At this point all resources needed
1687 * for transmit and receive operations are allocated, the interrupt
1688 * handler is registered with the OS, the watchdog timer is started,
1689 * and the stack is notified that the interface is ready.
1691 static int igb_open(struct net_device
*netdev
)
1693 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1694 struct e1000_hw
*hw
= &adapter
->hw
;
1698 /* disallow open during test */
1699 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1702 /* allocate transmit descriptors */
1703 err
= igb_setup_all_tx_resources(adapter
);
1707 /* allocate receive descriptors */
1708 err
= igb_setup_all_rx_resources(adapter
);
1712 /* e1000_power_up_phy(adapter); */
1714 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1715 if ((adapter
->hw
.mng_cookie
.status
&
1716 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1717 igb_update_mng_vlan(adapter
);
1719 /* before we allocate an interrupt, we must be ready to handle it.
1720 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1721 * as soon as we call pci_request_irq, so we have to setup our
1722 * clean_rx handler before we do so. */
1723 igb_configure(adapter
);
1725 igb_vmm_control(adapter
);
1726 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
1727 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
1729 err
= igb_request_irq(adapter
);
1733 /* From here on the code is the same as igb_up() */
1734 clear_bit(__IGB_DOWN
, &adapter
->state
);
1736 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1737 napi_enable(&adapter
->rx_ring
[i
].napi
);
1739 /* Clear any pending interrupts. */
1742 igb_irq_enable(adapter
);
1744 netif_tx_start_all_queues(netdev
);
1746 /* Fire a link status change interrupt to start the watchdog. */
1747 wr32(E1000_ICS
, E1000_ICS_LSC
);
1752 igb_release_hw_control(adapter
);
1753 /* e1000_power_down_phy(adapter); */
1754 igb_free_all_rx_resources(adapter
);
1756 igb_free_all_tx_resources(adapter
);
1764 * igb_close - Disables a network interface
1765 * @netdev: network interface device structure
1767 * Returns 0, this is not allowed to fail
1769 * The close entry point is called when an interface is de-activated
1770 * by the OS. The hardware is still under the driver's control, but
1771 * needs to be disabled. A global MAC reset is issued to stop the
1772 * hardware, and all transmit and receive resources are freed.
1774 static int igb_close(struct net_device
*netdev
)
1776 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1778 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1781 igb_free_irq(adapter
);
1783 igb_free_all_tx_resources(adapter
);
1784 igb_free_all_rx_resources(adapter
);
1786 /* kill manageability vlan ID if supported, but not if a vlan with
1787 * the same ID is registered on the host OS (let 8021q kill it) */
1788 if ((adapter
->hw
.mng_cookie
.status
&
1789 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1791 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1792 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1798 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1799 * @adapter: board private structure
1800 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1802 * Return 0 on success, negative on failure
1804 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1805 struct igb_ring
*tx_ring
)
1807 struct pci_dev
*pdev
= adapter
->pdev
;
1810 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1811 tx_ring
->buffer_info
= vmalloc(size
);
1812 if (!tx_ring
->buffer_info
)
1814 memset(tx_ring
->buffer_info
, 0, size
);
1816 /* round up to nearest 4K */
1817 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1818 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1820 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1826 tx_ring
->adapter
= adapter
;
1827 tx_ring
->next_to_use
= 0;
1828 tx_ring
->next_to_clean
= 0;
1832 vfree(tx_ring
->buffer_info
);
1833 dev_err(&adapter
->pdev
->dev
,
1834 "Unable to allocate memory for the transmit descriptor ring\n");
1839 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1840 * (Descriptors) for all queues
1841 * @adapter: board private structure
1843 * Return 0 on success, negative on failure
1845 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1850 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1851 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1853 dev_err(&adapter
->pdev
->dev
,
1854 "Allocation for Tx Queue %u failed\n", i
);
1855 for (i
--; i
>= 0; i
--)
1856 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1861 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1862 r_idx
= i
% adapter
->num_tx_queues
;
1863 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1869 * igb_configure_tx - Configure transmit Unit after Reset
1870 * @adapter: board private structure
1872 * Configure the Tx unit of the MAC after a reset.
1874 static void igb_configure_tx(struct igb_adapter
*adapter
)
1877 struct e1000_hw
*hw
= &adapter
->hw
;
1882 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1883 struct igb_ring
*ring
= &adapter
->tx_ring
[i
];
1885 wr32(E1000_TDLEN(j
),
1886 ring
->count
* sizeof(union e1000_adv_tx_desc
));
1888 wr32(E1000_TDBAL(j
),
1889 tdba
& 0x00000000ffffffffULL
);
1890 wr32(E1000_TDBAH(j
), tdba
>> 32);
1892 ring
->head
= E1000_TDH(j
);
1893 ring
->tail
= E1000_TDT(j
);
1894 writel(0, hw
->hw_addr
+ ring
->tail
);
1895 writel(0, hw
->hw_addr
+ ring
->head
);
1896 txdctl
= rd32(E1000_TXDCTL(j
));
1897 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1898 wr32(E1000_TXDCTL(j
), txdctl
);
1900 /* Turn off Relaxed Ordering on head write-backs. The
1901 * writebacks MUST be delivered in order or it will
1902 * completely screw up our bookeeping.
1904 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1905 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1906 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1909 /* disable queue 0 to prevent tail bump w/o re-configuration */
1910 if (adapter
->vfs_allocated_count
)
1911 wr32(E1000_TXDCTL(0), 0);
1913 /* Program the Transmit Control Register */
1914 tctl
= rd32(E1000_TCTL
);
1915 tctl
&= ~E1000_TCTL_CT
;
1916 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1917 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1919 igb_config_collision_dist(hw
);
1921 /* Setup Transmit Descriptor Settings for eop descriptor */
1922 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1924 /* Enable transmits */
1925 tctl
|= E1000_TCTL_EN
;
1927 wr32(E1000_TCTL
, tctl
);
1931 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1932 * @adapter: board private structure
1933 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1935 * Returns 0 on success, negative on failure
1937 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1938 struct igb_ring
*rx_ring
)
1940 struct pci_dev
*pdev
= adapter
->pdev
;
1943 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1944 rx_ring
->buffer_info
= vmalloc(size
);
1945 if (!rx_ring
->buffer_info
)
1947 memset(rx_ring
->buffer_info
, 0, size
);
1949 desc_len
= sizeof(union e1000_adv_rx_desc
);
1951 /* Round up to nearest 4K */
1952 rx_ring
->size
= rx_ring
->count
* desc_len
;
1953 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1955 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1961 rx_ring
->next_to_clean
= 0;
1962 rx_ring
->next_to_use
= 0;
1964 rx_ring
->adapter
= adapter
;
1969 vfree(rx_ring
->buffer_info
);
1970 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1971 "the receive descriptor ring\n");
1976 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1977 * (Descriptors) for all queues
1978 * @adapter: board private structure
1980 * Return 0 on success, negative on failure
1982 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1986 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1987 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1989 dev_err(&adapter
->pdev
->dev
,
1990 "Allocation for Rx Queue %u failed\n", i
);
1991 for (i
--; i
>= 0; i
--)
1992 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2001 * igb_setup_rctl - configure the receive control registers
2002 * @adapter: Board private structure
2004 static void igb_setup_rctl(struct igb_adapter
*adapter
)
2006 struct e1000_hw
*hw
= &adapter
->hw
;
2011 rctl
= rd32(E1000_RCTL
);
2013 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
2014 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
2016 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
2017 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
2020 * enable stripping of CRC. It's unlikely this will break BMC
2021 * redirection as it did with e1000. Newer features require
2022 * that the HW strips the CRC.
2024 rctl
|= E1000_RCTL_SECRC
;
2027 * disable store bad packets and clear size bits.
2029 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
2031 /* enable LPE when to prevent packets larger than max_frame_size */
2032 rctl
|= E1000_RCTL_LPE
;
2034 /* Setup buffer sizes */
2035 switch (adapter
->rx_buffer_len
) {
2036 case IGB_RXBUFFER_256
:
2037 rctl
|= E1000_RCTL_SZ_256
;
2039 case IGB_RXBUFFER_512
:
2040 rctl
|= E1000_RCTL_SZ_512
;
2043 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
2044 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
2048 /* 82575 and greater support packet-split where the protocol
2049 * header is placed in skb->data and the packet data is
2050 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2051 * In the case of a non-split, skb->data is linearly filled,
2052 * followed by the page buffers. Therefore, skb->data is
2053 * sized to hold the largest protocol header.
2055 /* allocations using alloc_page take too long for regular MTU
2056 * so only enable packet split for jumbo frames */
2057 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
2058 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
2059 srrctl
|= adapter
->rx_ps_hdr_size
<<
2060 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
2061 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2063 adapter
->rx_ps_hdr_size
= 0;
2064 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2067 /* Attention!!! For SR-IOV PF driver operations you must enable
2068 * queue drop for all VF and PF queues to prevent head of line blocking
2069 * if an un-trusted VF does not provide descriptors to hardware.
2071 if (adapter
->vfs_allocated_count
) {
2074 j
= adapter
->rx_ring
[0].reg_idx
;
2076 /* set all queue drop enable bits */
2077 wr32(E1000_QDE
, ALL_QUEUES
);
2078 srrctl
|= E1000_SRRCTL_DROP_EN
;
2080 /* disable queue 0 to prevent tail write w/o re-config */
2081 wr32(E1000_RXDCTL(0), 0);
2083 vmolr
= rd32(E1000_VMOLR(j
));
2084 if (rctl
& E1000_RCTL_LPE
)
2085 vmolr
|= E1000_VMOLR_LPE
;
2086 if (adapter
->num_rx_queues
> 0)
2087 vmolr
|= E1000_VMOLR_RSSE
;
2088 wr32(E1000_VMOLR(j
), vmolr
);
2091 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2092 j
= adapter
->rx_ring
[i
].reg_idx
;
2093 wr32(E1000_SRRCTL(j
), srrctl
);
2096 wr32(E1000_RCTL
, rctl
);
2100 * igb_rlpml_set - set maximum receive packet size
2101 * @adapter: board private structure
2103 * Configure maximum receivable packet size.
2105 static void igb_rlpml_set(struct igb_adapter
*adapter
)
2107 u32 max_frame_size
= adapter
->max_frame_size
;
2108 struct e1000_hw
*hw
= &adapter
->hw
;
2109 u16 pf_id
= adapter
->vfs_allocated_count
;
2112 max_frame_size
+= VLAN_TAG_SIZE
;
2114 /* if vfs are enabled we set RLPML to the largest possible request
2115 * size and set the VMOLR RLPML to the size we need */
2117 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
2118 max_frame_size
= MAX_STD_JUMBO_FRAME_SIZE
+ VLAN_TAG_SIZE
;
2121 wr32(E1000_RLPML
, max_frame_size
);
2125 * igb_configure_vt_default_pool - Configure VT default pool
2126 * @adapter: board private structure
2128 * Configure the default pool
2130 static void igb_configure_vt_default_pool(struct igb_adapter
*adapter
)
2132 struct e1000_hw
*hw
= &adapter
->hw
;
2133 u16 pf_id
= adapter
->vfs_allocated_count
;
2136 /* not in sr-iov mode - do nothing */
2140 vtctl
= rd32(E1000_VT_CTL
);
2141 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
2142 E1000_VT_CTL_DISABLE_DEF_POOL
);
2143 vtctl
|= pf_id
<< E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
2144 wr32(E1000_VT_CTL
, vtctl
);
2148 * igb_configure_rx - Configure receive Unit after Reset
2149 * @adapter: board private structure
2151 * Configure the Rx unit of the MAC after a reset.
2153 static void igb_configure_rx(struct igb_adapter
*adapter
)
2156 struct e1000_hw
*hw
= &adapter
->hw
;
2161 /* disable receives while setting up the descriptors */
2162 rctl
= rd32(E1000_RCTL
);
2163 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
2167 if (adapter
->itr_setting
> 3)
2168 wr32(E1000_ITR
, adapter
->itr
);
2170 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2171 * the Base and Length of the Rx Descriptor Ring */
2172 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2173 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
2174 int j
= ring
->reg_idx
;
2176 wr32(E1000_RDBAL(j
),
2177 rdba
& 0x00000000ffffffffULL
);
2178 wr32(E1000_RDBAH(j
), rdba
>> 32);
2179 wr32(E1000_RDLEN(j
),
2180 ring
->count
* sizeof(union e1000_adv_rx_desc
));
2182 ring
->head
= E1000_RDH(j
);
2183 ring
->tail
= E1000_RDT(j
);
2184 writel(0, hw
->hw_addr
+ ring
->tail
);
2185 writel(0, hw
->hw_addr
+ ring
->head
);
2187 rxdctl
= rd32(E1000_RXDCTL(j
));
2188 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
2189 rxdctl
&= 0xFFF00000;
2190 rxdctl
|= IGB_RX_PTHRESH
;
2191 rxdctl
|= IGB_RX_HTHRESH
<< 8;
2192 rxdctl
|= IGB_RX_WTHRESH
<< 16;
2193 wr32(E1000_RXDCTL(j
), rxdctl
);
2196 if (adapter
->num_rx_queues
> 1) {
2205 get_random_bytes(&random
[0], 40);
2207 if (hw
->mac
.type
>= e1000_82576
)
2211 for (j
= 0; j
< (32 * 4); j
++) {
2213 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
2216 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
2218 if (adapter
->vfs_allocated_count
)
2219 mrqc
= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
2221 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
2223 /* Fill out hash function seeds */
2224 for (j
= 0; j
< 10; j
++)
2225 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
2227 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
2228 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
2229 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
2230 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
2231 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2232 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2233 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
2234 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
2237 wr32(E1000_MRQC
, mrqc
);
2239 /* Multiqueue and raw packet checksumming are mutually
2240 * exclusive. Note that this not the same as TCP/IP
2241 * checksumming, which works fine. */
2242 rxcsum
= rd32(E1000_RXCSUM
);
2243 rxcsum
|= E1000_RXCSUM_PCSD
;
2244 wr32(E1000_RXCSUM
, rxcsum
);
2246 /* Enable multi-queue for sr-iov */
2247 if (adapter
->vfs_allocated_count
)
2248 wr32(E1000_MRQC
, E1000_MRQC_ENABLE_VMDQ
);
2249 /* Enable Receive Checksum Offload for TCP and UDP */
2250 rxcsum
= rd32(E1000_RXCSUM
);
2251 if (adapter
->rx_csum
)
2252 rxcsum
|= E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
;
2254 rxcsum
&= ~(E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
);
2256 wr32(E1000_RXCSUM
, rxcsum
);
2259 /* Set the default pool for the PF's first queue */
2260 igb_configure_vt_default_pool(adapter
);
2262 igb_rlpml_set(adapter
);
2264 /* Enable Receives */
2265 wr32(E1000_RCTL
, rctl
);
2269 * igb_free_tx_resources - Free Tx Resources per Queue
2270 * @tx_ring: Tx descriptor ring for a specific queue
2272 * Free all transmit software resources
2274 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2276 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2278 igb_clean_tx_ring(tx_ring
);
2280 vfree(tx_ring
->buffer_info
);
2281 tx_ring
->buffer_info
= NULL
;
2283 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2285 tx_ring
->desc
= NULL
;
2289 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2290 * @adapter: board private structure
2292 * Free all transmit software resources
2294 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2298 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2299 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2302 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2303 struct igb_buffer
*buffer_info
)
2305 buffer_info
->dma
= 0;
2306 if (buffer_info
->skb
) {
2307 skb_dma_unmap(&adapter
->pdev
->dev
, buffer_info
->skb
,
2309 dev_kfree_skb_any(buffer_info
->skb
);
2310 buffer_info
->skb
= NULL
;
2312 buffer_info
->time_stamp
= 0;
2313 /* buffer_info must be completely set up in the transmit path */
2317 * igb_clean_tx_ring - Free Tx Buffers
2318 * @tx_ring: ring to be cleaned
2320 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2322 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2323 struct igb_buffer
*buffer_info
;
2327 if (!tx_ring
->buffer_info
)
2329 /* Free all the Tx ring sk_buffs */
2331 for (i
= 0; i
< tx_ring
->count
; i
++) {
2332 buffer_info
= &tx_ring
->buffer_info
[i
];
2333 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2336 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2337 memset(tx_ring
->buffer_info
, 0, size
);
2339 /* Zero out the descriptor ring */
2341 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2343 tx_ring
->next_to_use
= 0;
2344 tx_ring
->next_to_clean
= 0;
2346 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2347 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2351 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2352 * @adapter: board private structure
2354 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2358 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2359 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2363 * igb_free_rx_resources - Free Rx Resources
2364 * @rx_ring: ring to clean the resources from
2366 * Free all receive software resources
2368 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2370 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2372 igb_clean_rx_ring(rx_ring
);
2374 vfree(rx_ring
->buffer_info
);
2375 rx_ring
->buffer_info
= NULL
;
2377 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2379 rx_ring
->desc
= NULL
;
2383 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2384 * @adapter: board private structure
2386 * Free all receive software resources
2388 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2392 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2393 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2397 * igb_clean_rx_ring - Free Rx Buffers per Queue
2398 * @rx_ring: ring to free buffers from
2400 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2402 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2403 struct igb_buffer
*buffer_info
;
2404 struct pci_dev
*pdev
= adapter
->pdev
;
2408 if (!rx_ring
->buffer_info
)
2410 /* Free all the Rx ring sk_buffs */
2411 for (i
= 0; i
< rx_ring
->count
; i
++) {
2412 buffer_info
= &rx_ring
->buffer_info
[i
];
2413 if (buffer_info
->dma
) {
2414 if (adapter
->rx_ps_hdr_size
)
2415 pci_unmap_single(pdev
, buffer_info
->dma
,
2416 adapter
->rx_ps_hdr_size
,
2417 PCI_DMA_FROMDEVICE
);
2419 pci_unmap_single(pdev
, buffer_info
->dma
,
2420 adapter
->rx_buffer_len
,
2421 PCI_DMA_FROMDEVICE
);
2422 buffer_info
->dma
= 0;
2425 if (buffer_info
->skb
) {
2426 dev_kfree_skb(buffer_info
->skb
);
2427 buffer_info
->skb
= NULL
;
2429 if (buffer_info
->page
) {
2430 if (buffer_info
->page_dma
)
2431 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2433 PCI_DMA_FROMDEVICE
);
2434 put_page(buffer_info
->page
);
2435 buffer_info
->page
= NULL
;
2436 buffer_info
->page_dma
= 0;
2437 buffer_info
->page_offset
= 0;
2441 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2442 memset(rx_ring
->buffer_info
, 0, size
);
2444 /* Zero out the descriptor ring */
2445 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2447 rx_ring
->next_to_clean
= 0;
2448 rx_ring
->next_to_use
= 0;
2450 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2451 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2455 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2456 * @adapter: board private structure
2458 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2462 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2463 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2467 * igb_set_mac - Change the Ethernet Address of the NIC
2468 * @netdev: network interface device structure
2469 * @p: pointer to an address structure
2471 * Returns 0 on success, negative on failure
2473 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2475 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2476 struct e1000_hw
*hw
= &adapter
->hw
;
2477 struct sockaddr
*addr
= p
;
2479 if (!is_valid_ether_addr(addr
->sa_data
))
2480 return -EADDRNOTAVAIL
;
2482 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2483 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2485 hw
->mac
.ops
.rar_set(hw
, hw
->mac
.addr
, 0);
2487 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
2493 * igb_set_multi - Multicast and Promiscuous mode set
2494 * @netdev: network interface device structure
2496 * The set_multi entry point is called whenever the multicast address
2497 * list or the network interface flags are updated. This routine is
2498 * responsible for configuring the hardware for proper multicast,
2499 * promiscuous mode, and all-multi behavior.
2501 static void igb_set_multi(struct net_device
*netdev
)
2503 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2504 struct e1000_hw
*hw
= &adapter
->hw
;
2505 struct e1000_mac_info
*mac
= &hw
->mac
;
2506 struct dev_mc_list
*mc_ptr
;
2507 u8
*mta_list
= NULL
;
2511 /* Check for Promiscuous and All Multicast modes */
2513 rctl
= rd32(E1000_RCTL
);
2515 if (netdev
->flags
& IFF_PROMISC
) {
2516 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2517 rctl
&= ~E1000_RCTL_VFE
;
2519 if (netdev
->flags
& IFF_ALLMULTI
) {
2520 rctl
|= E1000_RCTL_MPE
;
2521 rctl
&= ~E1000_RCTL_UPE
;
2523 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2524 rctl
|= E1000_RCTL_VFE
;
2526 wr32(E1000_RCTL
, rctl
);
2528 if (netdev
->mc_count
) {
2529 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2531 dev_err(&adapter
->pdev
->dev
,
2532 "failed to allocate multicast filter list\n");
2537 /* The shared function expects a packed array of only addresses. */
2538 mc_ptr
= netdev
->mc_list
;
2540 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2543 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2544 mc_ptr
= mc_ptr
->next
;
2546 igb_update_mc_addr_list(hw
, mta_list
, i
,
2547 adapter
->vfs_allocated_count
+ 1,
2548 mac
->rar_entry_count
);
2550 igb_set_mc_list_pools(adapter
, i
, mac
->rar_entry_count
);
2551 igb_restore_vf_multicasts(adapter
);
2556 /* Need to wait a few seconds after link up to get diagnostic information from
2558 static void igb_update_phy_info(unsigned long data
)
2560 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2561 igb_get_phy_info(&adapter
->hw
);
2565 * igb_has_link - check shared code for link and determine up/down
2566 * @adapter: pointer to driver private info
2568 static bool igb_has_link(struct igb_adapter
*adapter
)
2570 struct e1000_hw
*hw
= &adapter
->hw
;
2571 bool link_active
= false;
2574 /* get_link_status is set on LSC (link status) interrupt or
2575 * rx sequence error interrupt. get_link_status will stay
2576 * false until the e1000_check_for_link establishes link
2577 * for copper adapters ONLY
2579 switch (hw
->phy
.media_type
) {
2580 case e1000_media_type_copper
:
2581 if (hw
->mac
.get_link_status
) {
2582 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2583 link_active
= !hw
->mac
.get_link_status
;
2588 case e1000_media_type_fiber
:
2589 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2590 link_active
= !!(rd32(E1000_STATUS
) & E1000_STATUS_LU
);
2592 case e1000_media_type_internal_serdes
:
2593 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2594 link_active
= hw
->mac
.serdes_has_link
;
2597 case e1000_media_type_unknown
:
2605 * igb_watchdog - Timer Call-back
2606 * @data: pointer to adapter cast into an unsigned long
2608 static void igb_watchdog(unsigned long data
)
2610 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2611 /* Do the rest outside of interrupt context */
2612 schedule_work(&adapter
->watchdog_task
);
2615 static void igb_watchdog_task(struct work_struct
*work
)
2617 struct igb_adapter
*adapter
= container_of(work
,
2618 struct igb_adapter
, watchdog_task
);
2619 struct e1000_hw
*hw
= &adapter
->hw
;
2620 struct net_device
*netdev
= adapter
->netdev
;
2621 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2626 link
= igb_has_link(adapter
);
2627 if ((netif_carrier_ok(netdev
)) && link
)
2631 if (!netif_carrier_ok(netdev
)) {
2633 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2634 &adapter
->link_speed
,
2635 &adapter
->link_duplex
);
2637 ctrl
= rd32(E1000_CTRL
);
2638 /* Links status message must follow this format */
2639 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2640 "Flow Control: %s\n",
2642 adapter
->link_speed
,
2643 adapter
->link_duplex
== FULL_DUPLEX
?
2644 "Full Duplex" : "Half Duplex",
2645 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2646 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2647 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2648 E1000_CTRL_TFCE
) ? "TX" : "None")));
2650 /* tweak tx_queue_len according to speed/duplex and
2651 * adjust the timeout factor */
2652 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2653 adapter
->tx_timeout_factor
= 1;
2654 switch (adapter
->link_speed
) {
2656 netdev
->tx_queue_len
= 10;
2657 adapter
->tx_timeout_factor
= 14;
2660 netdev
->tx_queue_len
= 100;
2661 /* maybe add some timeout factor ? */
2665 netif_carrier_on(netdev
);
2666 netif_tx_wake_all_queues(netdev
);
2668 igb_ping_all_vfs(adapter
);
2670 /* link state has changed, schedule phy info update */
2671 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2672 mod_timer(&adapter
->phy_info_timer
,
2673 round_jiffies(jiffies
+ 2 * HZ
));
2676 if (netif_carrier_ok(netdev
)) {
2677 adapter
->link_speed
= 0;
2678 adapter
->link_duplex
= 0;
2679 /* Links status message must follow this format */
2680 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2682 netif_carrier_off(netdev
);
2683 netif_tx_stop_all_queues(netdev
);
2685 igb_ping_all_vfs(adapter
);
2687 /* link state has changed, schedule phy info update */
2688 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2689 mod_timer(&adapter
->phy_info_timer
,
2690 round_jiffies(jiffies
+ 2 * HZ
));
2695 igb_update_stats(adapter
);
2697 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2698 adapter
->tpt_old
= adapter
->stats
.tpt
;
2699 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2700 adapter
->colc_old
= adapter
->stats
.colc
;
2702 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2703 adapter
->gorc_old
= adapter
->stats
.gorc
;
2704 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2705 adapter
->gotc_old
= adapter
->stats
.gotc
;
2707 igb_update_adaptive(&adapter
->hw
);
2709 if (!netif_carrier_ok(netdev
)) {
2710 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
2711 /* We've lost link, so the controller stops DMA,
2712 * but we've got queued Tx work that's never going
2713 * to get done, so reset controller to flush Tx.
2714 * (Do the reset outside of interrupt context). */
2715 adapter
->tx_timeout_count
++;
2716 schedule_work(&adapter
->reset_task
);
2720 /* Cause software interrupt to ensure rx ring is cleaned */
2721 if (adapter
->msix_entries
) {
2722 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2723 eics
|= adapter
->rx_ring
[i
].eims_value
;
2724 wr32(E1000_EICS
, eics
);
2726 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2729 /* Force detection of hung controller every watchdog period */
2730 tx_ring
->detect_tx_hung
= true;
2732 /* Reset the timer */
2733 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2734 mod_timer(&adapter
->watchdog_timer
,
2735 round_jiffies(jiffies
+ 2 * HZ
));
2738 enum latency_range
{
2742 latency_invalid
= 255
2747 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2749 * Stores a new ITR value based on strictly on packet size. This
2750 * algorithm is less sophisticated than that used in igb_update_itr,
2751 * due to the difficulty of synchronizing statistics across multiple
2752 * receive rings. The divisors and thresholds used by this fuction
2753 * were determined based on theoretical maximum wire speed and testing
2754 * data, in order to minimize response time while increasing bulk
2756 * This functionality is controlled by the InterruptThrottleRate module
2757 * parameter (see igb_param.c)
2758 * NOTE: This function is called only when operating in a multiqueue
2759 * receive environment.
2760 * @rx_ring: pointer to ring
2762 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2764 int new_val
= rx_ring
->itr_val
;
2765 int avg_wire_size
= 0;
2766 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2768 if (!rx_ring
->total_packets
)
2769 goto clear_counts
; /* no packets, so don't do anything */
2771 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2772 * ints/sec - ITR timer value of 120 ticks.
2774 if (adapter
->link_speed
!= SPEED_1000
) {
2778 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2780 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2781 avg_wire_size
+= 24;
2783 /* Don't starve jumbo frames */
2784 avg_wire_size
= min(avg_wire_size
, 3000);
2786 /* Give a little boost to mid-size frames */
2787 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2788 new_val
= avg_wire_size
/ 3;
2790 new_val
= avg_wire_size
/ 2;
2793 if (new_val
!= rx_ring
->itr_val
) {
2794 rx_ring
->itr_val
= new_val
;
2795 rx_ring
->set_itr
= 1;
2798 rx_ring
->total_bytes
= 0;
2799 rx_ring
->total_packets
= 0;
2803 * igb_update_itr - update the dynamic ITR value based on statistics
2804 * Stores a new ITR value based on packets and byte
2805 * counts during the last interrupt. The advantage of per interrupt
2806 * computation is faster updates and more accurate ITR for the current
2807 * traffic pattern. Constants in this function were computed
2808 * based on theoretical maximum wire speed and thresholds were set based
2809 * on testing data as well as attempting to minimize response time
2810 * while increasing bulk throughput.
2811 * this functionality is controlled by the InterruptThrottleRate module
2812 * parameter (see igb_param.c)
2813 * NOTE: These calculations are only valid when operating in a single-
2814 * queue environment.
2815 * @adapter: pointer to adapter
2816 * @itr_setting: current adapter->itr
2817 * @packets: the number of packets during this measurement interval
2818 * @bytes: the number of bytes during this measurement interval
2820 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2821 int packets
, int bytes
)
2823 unsigned int retval
= itr_setting
;
2826 goto update_itr_done
;
2828 switch (itr_setting
) {
2829 case lowest_latency
:
2830 /* handle TSO and jumbo frames */
2831 if (bytes
/packets
> 8000)
2832 retval
= bulk_latency
;
2833 else if ((packets
< 5) && (bytes
> 512))
2834 retval
= low_latency
;
2836 case low_latency
: /* 50 usec aka 20000 ints/s */
2837 if (bytes
> 10000) {
2838 /* this if handles the TSO accounting */
2839 if (bytes
/packets
> 8000) {
2840 retval
= bulk_latency
;
2841 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2842 retval
= bulk_latency
;
2843 } else if ((packets
> 35)) {
2844 retval
= lowest_latency
;
2846 } else if (bytes
/packets
> 2000) {
2847 retval
= bulk_latency
;
2848 } else if (packets
<= 2 && bytes
< 512) {
2849 retval
= lowest_latency
;
2852 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2853 if (bytes
> 25000) {
2855 retval
= low_latency
;
2856 } else if (bytes
< 1500) {
2857 retval
= low_latency
;
2866 static void igb_set_itr(struct igb_adapter
*adapter
)
2869 u32 new_itr
= adapter
->itr
;
2871 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2872 if (adapter
->link_speed
!= SPEED_1000
) {
2878 adapter
->rx_itr
= igb_update_itr(adapter
,
2880 adapter
->rx_ring
->total_packets
,
2881 adapter
->rx_ring
->total_bytes
);
2883 if (adapter
->rx_ring
->buddy
) {
2884 adapter
->tx_itr
= igb_update_itr(adapter
,
2886 adapter
->tx_ring
->total_packets
,
2887 adapter
->tx_ring
->total_bytes
);
2888 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2890 current_itr
= adapter
->rx_itr
;
2893 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2894 if (adapter
->itr_setting
== 3 && current_itr
== lowest_latency
)
2895 current_itr
= low_latency
;
2897 switch (current_itr
) {
2898 /* counts and packets in update_itr are dependent on these numbers */
2899 case lowest_latency
:
2903 new_itr
= 20000; /* aka hwitr = ~200 */
2913 adapter
->rx_ring
->total_bytes
= 0;
2914 adapter
->rx_ring
->total_packets
= 0;
2915 if (adapter
->rx_ring
->buddy
) {
2916 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2917 adapter
->rx_ring
->buddy
->total_packets
= 0;
2920 if (new_itr
!= adapter
->itr
) {
2921 /* this attempts to bias the interrupt rate towards Bulk
2922 * by adding intermediate steps when interrupt rate is
2924 new_itr
= new_itr
> adapter
->itr
?
2925 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2927 /* Don't write the value here; it resets the adapter's
2928 * internal timer, and causes us to delay far longer than
2929 * we should between interrupts. Instead, we write the ITR
2930 * value at the beginning of the next interrupt so the timing
2931 * ends up being correct.
2933 adapter
->itr
= new_itr
;
2934 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2935 adapter
->rx_ring
->set_itr
= 1;
2942 #define IGB_TX_FLAGS_CSUM 0x00000001
2943 #define IGB_TX_FLAGS_VLAN 0x00000002
2944 #define IGB_TX_FLAGS_TSO 0x00000004
2945 #define IGB_TX_FLAGS_IPV4 0x00000008
2946 #define IGB_TX_FLAGS_TSTAMP 0x00000010
2947 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2948 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2950 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2951 struct igb_ring
*tx_ring
,
2952 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2954 struct e1000_adv_tx_context_desc
*context_desc
;
2957 struct igb_buffer
*buffer_info
;
2958 u32 info
= 0, tu_cmd
= 0;
2959 u32 mss_l4len_idx
, l4len
;
2962 if (skb_header_cloned(skb
)) {
2963 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2968 l4len
= tcp_hdrlen(skb
);
2971 if (skb
->protocol
== htons(ETH_P_IP
)) {
2972 struct iphdr
*iph
= ip_hdr(skb
);
2975 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2979 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2980 ipv6_hdr(skb
)->payload_len
= 0;
2981 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2982 &ipv6_hdr(skb
)->daddr
,
2986 i
= tx_ring
->next_to_use
;
2988 buffer_info
= &tx_ring
->buffer_info
[i
];
2989 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2990 /* VLAN MACLEN IPLEN */
2991 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2992 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2993 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2994 *hdr_len
+= skb_network_offset(skb
);
2995 info
|= skb_network_header_len(skb
);
2996 *hdr_len
+= skb_network_header_len(skb
);
2997 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2999 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3000 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3002 if (skb
->protocol
== htons(ETH_P_IP
))
3003 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3004 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3006 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3009 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
3010 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
3012 /* For 82575, context index must be unique per ring. */
3013 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3014 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
3016 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3017 context_desc
->seqnum_seed
= 0;
3019 buffer_info
->time_stamp
= jiffies
;
3020 buffer_info
->next_to_watch
= i
;
3021 buffer_info
->dma
= 0;
3023 if (i
== tx_ring
->count
)
3026 tx_ring
->next_to_use
= i
;
3031 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
3032 struct igb_ring
*tx_ring
,
3033 struct sk_buff
*skb
, u32 tx_flags
)
3035 struct e1000_adv_tx_context_desc
*context_desc
;
3037 struct igb_buffer
*buffer_info
;
3038 u32 info
= 0, tu_cmd
= 0;
3040 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
3041 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
3042 i
= tx_ring
->next_to_use
;
3043 buffer_info
= &tx_ring
->buffer_info
[i
];
3044 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
3046 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3047 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
3048 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
3049 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3050 info
|= skb_network_header_len(skb
);
3052 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
3054 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3056 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3059 if (skb
->protocol
== cpu_to_be16(ETH_P_8021Q
)) {
3060 const struct vlan_ethhdr
*vhdr
=
3061 (const struct vlan_ethhdr
*)skb
->data
;
3063 protocol
= vhdr
->h_vlan_encapsulated_proto
;
3065 protocol
= skb
->protocol
;
3069 case cpu_to_be16(ETH_P_IP
):
3070 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3071 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3072 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3074 case cpu_to_be16(ETH_P_IPV6
):
3075 /* XXX what about other V6 headers?? */
3076 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3077 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3080 if (unlikely(net_ratelimit()))
3081 dev_warn(&adapter
->pdev
->dev
,
3082 "partial checksum but proto=%x!\n",
3088 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3089 context_desc
->seqnum_seed
= 0;
3090 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3091 context_desc
->mss_l4len_idx
=
3092 cpu_to_le32(tx_ring
->queue_index
<< 4);
3094 context_desc
->mss_l4len_idx
= 0;
3096 buffer_info
->time_stamp
= jiffies
;
3097 buffer_info
->next_to_watch
= i
;
3098 buffer_info
->dma
= 0;
3101 if (i
== tx_ring
->count
)
3103 tx_ring
->next_to_use
= i
;
3110 #define IGB_MAX_TXD_PWR 16
3111 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
3113 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
3114 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
3117 struct igb_buffer
*buffer_info
;
3118 unsigned int len
= skb_headlen(skb
);
3119 unsigned int count
= 0, i
;
3123 i
= tx_ring
->next_to_use
;
3125 if (skb_dma_map(&adapter
->pdev
->dev
, skb
, DMA_TO_DEVICE
)) {
3126 dev_err(&adapter
->pdev
->dev
, "TX DMA map failed\n");
3130 map
= skb_shinfo(skb
)->dma_maps
;
3132 buffer_info
= &tx_ring
->buffer_info
[i
];
3133 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3134 buffer_info
->length
= len
;
3135 /* set time_stamp *before* dma to help avoid a possible race */
3136 buffer_info
->time_stamp
= jiffies
;
3137 buffer_info
->next_to_watch
= i
;
3138 buffer_info
->dma
= map
[count
];
3141 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
3142 struct skb_frag_struct
*frag
;
3145 if (i
== tx_ring
->count
)
3148 frag
= &skb_shinfo(skb
)->frags
[f
];
3151 buffer_info
= &tx_ring
->buffer_info
[i
];
3152 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3153 buffer_info
->length
= len
;
3154 buffer_info
->time_stamp
= jiffies
;
3155 buffer_info
->next_to_watch
= i
;
3156 buffer_info
->dma
= map
[count
];
3160 tx_ring
->buffer_info
[i
].skb
= skb
;
3161 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
3166 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
3167 struct igb_ring
*tx_ring
,
3168 int tx_flags
, int count
, u32 paylen
,
3171 union e1000_adv_tx_desc
*tx_desc
= NULL
;
3172 struct igb_buffer
*buffer_info
;
3173 u32 olinfo_status
= 0, cmd_type_len
;
3176 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
3177 E1000_ADVTXD_DCMD_DEXT
);
3179 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3180 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
3182 if (tx_flags
& IGB_TX_FLAGS_TSTAMP
)
3183 cmd_type_len
|= E1000_ADVTXD_MAC_TSTAMP
;
3185 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
3186 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
3188 /* insert tcp checksum */
3189 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3191 /* insert ip checksum */
3192 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
3193 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
3195 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
3196 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3199 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
3200 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
3201 IGB_TX_FLAGS_VLAN
)))
3202 olinfo_status
|= tx_ring
->queue_index
<< 4;
3204 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
3206 i
= tx_ring
->next_to_use
;
3208 buffer_info
= &tx_ring
->buffer_info
[i
];
3209 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3210 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
3211 tx_desc
->read
.cmd_type_len
=
3212 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
3213 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3215 if (i
== tx_ring
->count
)
3219 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
3220 /* Force memory writes to complete before letting h/w
3221 * know there are new descriptors to fetch. (Only
3222 * applicable for weak-ordered memory model archs,
3223 * such as IA-64). */
3226 tx_ring
->next_to_use
= i
;
3227 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3228 /* we need this if more than one processor can write to our tail
3229 * at a time, it syncronizes IO on IA64/Altix systems */
3233 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
3234 struct igb_ring
*tx_ring
, int size
)
3236 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3238 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3240 /* Herbert's original patch had:
3241 * smp_mb__after_netif_stop_queue();
3242 * but since that doesn't exist yet, just open code it. */
3245 /* We need to check again in a case another CPU has just
3246 * made room available. */
3247 if (igb_desc_unused(tx_ring
) < size
)
3251 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3252 ++adapter
->restart_queue
;
3256 static int igb_maybe_stop_tx(struct net_device
*netdev
,
3257 struct igb_ring
*tx_ring
, int size
)
3259 if (igb_desc_unused(tx_ring
) >= size
)
3261 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
3264 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
3265 struct net_device
*netdev
,
3266 struct igb_ring
*tx_ring
)
3268 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3270 unsigned int tx_flags
= 0;
3274 union skb_shared_tx
*shtx
;
3276 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
3277 dev_kfree_skb_any(skb
);
3278 return NETDEV_TX_OK
;
3281 if (skb
->len
<= 0) {
3282 dev_kfree_skb_any(skb
);
3283 return NETDEV_TX_OK
;
3286 /* need: 1 descriptor per page,
3287 * + 2 desc gap to keep tail from touching head,
3288 * + 1 desc for skb->data,
3289 * + 1 desc for context descriptor,
3290 * otherwise try next time */
3291 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3292 /* this is a hard error */
3293 return NETDEV_TX_BUSY
;
3297 * TODO: check that there currently is no other packet with
3298 * time stamping in the queue
3300 * When doing time stamping, keep the connection to the socket
3301 * a while longer: it is still needed by skb_hwtstamp_tx(),
3302 * called either in igb_tx_hwtstamp() or by our caller when
3303 * doing software time stamping.
3306 if (unlikely(shtx
->hardware
)) {
3307 shtx
->in_progress
= 1;
3308 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
3311 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3312 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3313 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3316 if (skb
->protocol
== htons(ETH_P_IP
))
3317 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3319 first
= tx_ring
->next_to_use
;
3320 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3324 dev_kfree_skb_any(skb
);
3325 return NETDEV_TX_OK
;
3329 tx_flags
|= IGB_TX_FLAGS_TSO
;
3330 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
) &&
3331 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3332 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3335 * count reflects descriptors mapped, if 0 then mapping error
3336 * has occured and we need to rewind the descriptor queue
3338 count
= igb_tx_map_adv(adapter
, tx_ring
, skb
, first
);
3341 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
, count
,
3343 netdev
->trans_start
= jiffies
;
3344 /* Make sure there is space in the ring for the next send. */
3345 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3347 dev_kfree_skb_any(skb
);
3348 tx_ring
->buffer_info
[first
].time_stamp
= 0;
3349 tx_ring
->next_to_use
= first
;
3352 return NETDEV_TX_OK
;
3355 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3357 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3358 struct igb_ring
*tx_ring
;
3361 r_idx
= skb
->queue_mapping
& (IGB_ABS_MAX_TX_QUEUES
- 1);
3362 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3364 /* This goes back to the question of how to logically map a tx queue
3365 * to a flow. Right now, performance is impacted slightly negatively
3366 * if using multiple tx queues. If the stack breaks away from a
3367 * single qdisc implementation, we can look at this again. */
3368 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3372 * igb_tx_timeout - Respond to a Tx Hang
3373 * @netdev: network interface device structure
3375 static void igb_tx_timeout(struct net_device
*netdev
)
3377 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3378 struct e1000_hw
*hw
= &adapter
->hw
;
3380 /* Do the reset outside of interrupt context */
3381 adapter
->tx_timeout_count
++;
3382 schedule_work(&adapter
->reset_task
);
3384 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3387 static void igb_reset_task(struct work_struct
*work
)
3389 struct igb_adapter
*adapter
;
3390 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3392 igb_reinit_locked(adapter
);
3396 * igb_get_stats - Get System Network Statistics
3397 * @netdev: network interface device structure
3399 * Returns the address of the device statistics structure.
3400 * The statistics are actually updated from the timer callback.
3402 static struct net_device_stats
*igb_get_stats(struct net_device
*netdev
)
3404 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3406 /* only return the current stats */
3407 return &adapter
->net_stats
;
3411 * igb_change_mtu - Change the Maximum Transfer Unit
3412 * @netdev: network interface device structure
3413 * @new_mtu: new value for maximum frame size
3415 * Returns 0 on success, negative on failure
3417 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3419 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3420 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3422 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3423 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3424 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3428 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3429 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3433 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3436 /* igb_down has a dependency on max_frame_size */
3437 adapter
->max_frame_size
= max_frame
;
3438 if (netif_running(netdev
))
3441 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3442 * means we reserve 2 more, this pushes us to allocate from the next
3444 * i.e. RXBUFFER_2048 --> size-4096 slab
3447 if (max_frame
<= IGB_RXBUFFER_256
)
3448 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3449 else if (max_frame
<= IGB_RXBUFFER_512
)
3450 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3451 else if (max_frame
<= IGB_RXBUFFER_1024
)
3452 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3453 else if (max_frame
<= IGB_RXBUFFER_2048
)
3454 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3456 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3457 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3459 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3462 /* if sr-iov is enabled we need to force buffer size to 1K or larger */
3463 if (adapter
->vfs_allocated_count
&&
3464 (adapter
->rx_buffer_len
< IGB_RXBUFFER_1024
))
3465 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3467 /* adjust allocation if LPE protects us, and we aren't using SBP */
3468 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3469 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3470 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3472 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3473 netdev
->mtu
, new_mtu
);
3474 netdev
->mtu
= new_mtu
;
3476 if (netif_running(netdev
))
3481 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3487 * igb_update_stats - Update the board statistics counters
3488 * @adapter: board private structure
3491 void igb_update_stats(struct igb_adapter
*adapter
)
3493 struct e1000_hw
*hw
= &adapter
->hw
;
3494 struct pci_dev
*pdev
= adapter
->pdev
;
3497 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3500 * Prevent stats update while adapter is being reset, or if the pci
3501 * connection is down.
3503 if (adapter
->link_speed
== 0)
3505 if (pci_channel_offline(pdev
))
3508 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3509 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3510 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3511 rd32(E1000_GORCH
); /* clear GORCL */
3512 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3513 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3514 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3516 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3517 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3518 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3519 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3520 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3521 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3522 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3523 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3525 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3526 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3527 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3528 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3529 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3530 adapter
->stats
.dc
+= rd32(E1000_DC
);
3531 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3532 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3533 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3534 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3535 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3536 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3537 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3538 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3539 rd32(E1000_GOTCH
); /* clear GOTCL */
3540 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3541 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3542 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3543 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3544 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3545 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3546 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3548 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3549 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3550 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3551 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3552 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3553 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3555 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3556 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3558 /* used for adaptive IFS */
3560 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3561 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3562 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3563 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3565 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3566 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3567 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3568 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3569 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3571 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3572 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3573 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3574 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3575 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3576 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3577 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3578 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3579 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3581 /* Fill out the OS statistics structure */
3582 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3583 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3587 /* RLEC on some newer hardware can be incorrect so build
3588 * our own version based on RUC and ROC */
3589 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3590 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3591 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3592 adapter
->stats
.cexterr
;
3593 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3595 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3596 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3597 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3600 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3601 adapter
->stats
.latecol
;
3602 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3603 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3604 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3606 /* Tx Dropped needs to be maintained elsewhere */
3609 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3610 if ((adapter
->link_speed
== SPEED_1000
) &&
3611 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
3612 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3613 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3617 /* Management Stats */
3618 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3619 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3620 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3623 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3625 struct net_device
*netdev
= data
;
3626 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3627 struct e1000_hw
*hw
= &adapter
->hw
;
3628 u32 icr
= rd32(E1000_ICR
);
3630 /* reading ICR causes bit 31 of EICR to be cleared */
3632 if(icr
& E1000_ICR_DOUTSYNC
) {
3633 /* HW is reporting DMA is out of sync */
3634 adapter
->stats
.doosync
++;
3637 /* Check for a mailbox event */
3638 if (icr
& E1000_ICR_VMMB
)
3639 igb_msg_task(adapter
);
3641 if (icr
& E1000_ICR_LSC
) {
3642 hw
->mac
.get_link_status
= 1;
3643 /* guard against interrupt when we're going down */
3644 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3645 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3648 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_VMMB
);
3649 wr32(E1000_EIMS
, adapter
->eims_other
);
3654 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3656 struct igb_ring
*tx_ring
= data
;
3657 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3658 struct e1000_hw
*hw
= &adapter
->hw
;
3660 #ifdef CONFIG_IGB_DCA
3661 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3662 igb_update_tx_dca(tx_ring
);
3665 tx_ring
->total_bytes
= 0;
3666 tx_ring
->total_packets
= 0;
3668 /* auto mask will automatically reenable the interrupt when we write
3670 if (!igb_clean_tx_irq(tx_ring
))
3671 /* Ring was not completely cleaned, so fire another interrupt */
3672 wr32(E1000_EICS
, tx_ring
->eims_value
);
3674 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3679 static void igb_write_itr(struct igb_ring
*ring
)
3681 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3682 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3683 switch (hw
->mac
.type
) {
3685 wr32(ring
->itr_register
, ring
->itr_val
|
3689 wr32(ring
->itr_register
, ring
->itr_val
|
3690 (ring
->itr_val
<< 16));
3697 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3699 struct igb_ring
*rx_ring
= data
;
3701 /* Write the ITR value calculated at the end of the
3702 * previous interrupt.
3705 igb_write_itr(rx_ring
);
3707 if (napi_schedule_prep(&rx_ring
->napi
))
3708 __napi_schedule(&rx_ring
->napi
);
3710 #ifdef CONFIG_IGB_DCA
3711 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3712 igb_update_rx_dca(rx_ring
);
3717 #ifdef CONFIG_IGB_DCA
3718 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3721 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3722 struct e1000_hw
*hw
= &adapter
->hw
;
3723 int cpu
= get_cpu();
3724 int q
= rx_ring
->reg_idx
;
3726 if (rx_ring
->cpu
!= cpu
) {
3727 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3728 if (hw
->mac
.type
== e1000_82576
) {
3729 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3730 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3731 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3733 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3734 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3736 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3737 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3738 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3739 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3745 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3748 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3749 struct e1000_hw
*hw
= &adapter
->hw
;
3750 int cpu
= get_cpu();
3751 int q
= tx_ring
->reg_idx
;
3753 if (tx_ring
->cpu
!= cpu
) {
3754 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3755 if (hw
->mac
.type
== e1000_82576
) {
3756 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3757 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3758 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3760 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3761 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3763 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3764 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3770 static void igb_setup_dca(struct igb_adapter
*adapter
)
3774 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3777 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3778 adapter
->tx_ring
[i
].cpu
= -1;
3779 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3781 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3782 adapter
->rx_ring
[i
].cpu
= -1;
3783 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3787 static int __igb_notify_dca(struct device
*dev
, void *data
)
3789 struct net_device
*netdev
= dev_get_drvdata(dev
);
3790 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3791 struct e1000_hw
*hw
= &adapter
->hw
;
3792 unsigned long event
= *(unsigned long *)data
;
3795 case DCA_PROVIDER_ADD
:
3796 /* if already enabled, don't do it again */
3797 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3799 /* Always use CB2 mode, difference is masked
3800 * in the CB driver. */
3801 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3802 if (dca_add_requester(dev
) == 0) {
3803 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3804 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3805 igb_setup_dca(adapter
);
3808 /* Fall Through since DCA is disabled. */
3809 case DCA_PROVIDER_REMOVE
:
3810 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3811 /* without this a class_device is left
3812 * hanging around in the sysfs model */
3813 dca_remove_requester(dev
);
3814 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3815 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3816 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
3824 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3829 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3832 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3834 #endif /* CONFIG_IGB_DCA */
3836 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
3838 struct e1000_hw
*hw
= &adapter
->hw
;
3842 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
3843 ping
= E1000_PF_CONTROL_MSG
;
3844 if (adapter
->vf_data
[i
].clear_to_send
)
3845 ping
|= E1000_VT_MSGTYPE_CTS
;
3846 igb_write_mbx(hw
, &ping
, 1, i
);
3850 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
3851 u32
*msgbuf
, u32 vf
)
3853 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3854 u16
*hash_list
= (u16
*)&msgbuf
[1];
3855 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
3858 /* only up to 30 hash values supported */
3862 /* salt away the number of multi cast addresses assigned
3863 * to this VF for later use to restore when the PF multi cast
3866 vf_data
->num_vf_mc_hashes
= n
;
3868 /* VFs are limited to using the MTA hash table for their multicast
3870 for (i
= 0; i
< n
; i
++)
3871 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];;
3873 /* Flush and reset the mta with the new values */
3874 igb_set_multi(adapter
->netdev
);
3879 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
3881 struct e1000_hw
*hw
= &adapter
->hw
;
3882 struct vf_data_storage
*vf_data
;
3885 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
3886 vf_data
= &adapter
->vf_data
[i
];
3887 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
3888 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
3892 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
3894 struct e1000_hw
*hw
= &adapter
->hw
;
3895 u32 pool_mask
, reg
, vid
;
3898 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3900 /* Find the vlan filter for this id */
3901 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3902 reg
= rd32(E1000_VLVF(i
));
3904 /* remove the vf from the pool */
3907 /* if pool is empty then remove entry from vfta */
3908 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
3909 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
3911 vid
= reg
& E1000_VLVF_VLANID_MASK
;
3912 igb_vfta_set(hw
, vid
, false);
3915 wr32(E1000_VLVF(i
), reg
);
3919 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
3921 struct e1000_hw
*hw
= &adapter
->hw
;
3924 /* It is an error to call this function when VFs are not enabled */
3925 if (!adapter
->vfs_allocated_count
)
3928 /* Find the vlan filter for this id */
3929 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3930 reg
= rd32(E1000_VLVF(i
));
3931 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
3932 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
3937 if (i
== E1000_VLVF_ARRAY_SIZE
) {
3938 /* Did not find a matching VLAN ID entry that was
3939 * enabled. Search for a free filter entry, i.e.
3940 * one without the enable bit set
3942 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3943 reg
= rd32(E1000_VLVF(i
));
3944 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
3948 if (i
< E1000_VLVF_ARRAY_SIZE
) {
3949 /* Found an enabled/available entry */
3950 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3952 /* if !enabled we need to set this up in vfta */
3953 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
3954 /* add VID to filter table, if bit already set
3955 * PF must have added it outside of table */
3956 if (igb_vfta_set(hw
, vid
, true))
3957 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
3958 adapter
->vfs_allocated_count
);
3959 reg
|= E1000_VLVF_VLANID_ENABLE
;
3961 reg
&= ~E1000_VLVF_VLANID_MASK
;
3964 wr32(E1000_VLVF(i
), reg
);
3968 if (i
< E1000_VLVF_ARRAY_SIZE
) {
3969 /* remove vf from the pool */
3970 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
3971 /* if pool is empty then remove entry from vfta */
3972 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
3974 igb_vfta_set(hw
, vid
, false);
3976 wr32(E1000_VLVF(i
), reg
);
3983 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
3985 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3986 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
3988 return igb_vlvf_set(adapter
, vid
, add
, vf
);
3991 static inline void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
3993 struct e1000_hw
*hw
= &adapter
->hw
;
3995 /* disable mailbox functionality for vf */
3996 adapter
->vf_data
[vf
].clear_to_send
= false;
3998 /* reset offloads to defaults */
3999 igb_set_vmolr(hw
, vf
);
4001 /* reset vlans for device */
4002 igb_clear_vf_vfta(adapter
, vf
);
4004 /* reset multicast table array for vf */
4005 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
4007 /* Flush and reset the mta with the new values */
4008 igb_set_multi(adapter
->netdev
);
4011 static inline void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
4013 struct e1000_hw
*hw
= &adapter
->hw
;
4014 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
4016 u8
*addr
= (u8
*)(&msgbuf
[1]);
4018 /* process all the same items cleared in a function level reset */
4019 igb_vf_reset_event(adapter
, vf
);
4021 /* set vf mac address */
4022 igb_rar_set(hw
, vf_mac
, vf
+ 1);
4023 igb_set_rah_pool(hw
, vf
, vf
+ 1);
4025 /* enable transmit and receive for vf */
4026 reg
= rd32(E1000_VFTE
);
4027 wr32(E1000_VFTE
, reg
| (1 << vf
));
4028 reg
= rd32(E1000_VFRE
);
4029 wr32(E1000_VFRE
, reg
| (1 << vf
));
4031 /* enable mailbox functionality for vf */
4032 adapter
->vf_data
[vf
].clear_to_send
= true;
4034 /* reply to reset with ack and vf mac address */
4035 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
4036 memcpy(addr
, vf_mac
, 6);
4037 igb_write_mbx(hw
, msgbuf
, 3, vf
);
4040 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
4042 unsigned char *addr
= (char *)&msg
[1];
4045 if (is_valid_ether_addr(addr
))
4046 err
= igb_set_vf_mac(adapter
, vf
, addr
);
4052 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4054 struct e1000_hw
*hw
= &adapter
->hw
;
4055 u32 msg
= E1000_VT_MSGTYPE_NACK
;
4057 /* if device isn't clear to send it shouldn't be reading either */
4058 if (!adapter
->vf_data
[vf
].clear_to_send
)
4059 igb_write_mbx(hw
, &msg
, 1, vf
);
4063 static void igb_msg_task(struct igb_adapter
*adapter
)
4065 struct e1000_hw
*hw
= &adapter
->hw
;
4068 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
4069 /* process any reset requests */
4070 if (!igb_check_for_rst(hw
, vf
)) {
4071 adapter
->vf_data
[vf
].clear_to_send
= false;
4072 igb_vf_reset_event(adapter
, vf
);
4075 /* process any messages pending */
4076 if (!igb_check_for_msg(hw
, vf
))
4077 igb_rcv_msg_from_vf(adapter
, vf
);
4079 /* process any acks */
4080 if (!igb_check_for_ack(hw
, vf
))
4081 igb_rcv_ack_from_vf(adapter
, vf
);
4086 static int igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4088 u32 mbx_size
= E1000_VFMAILBOX_SIZE
;
4089 u32 msgbuf
[mbx_size
];
4090 struct e1000_hw
*hw
= &adapter
->hw
;
4093 retval
= igb_read_mbx(hw
, msgbuf
, mbx_size
, vf
);
4096 dev_err(&adapter
->pdev
->dev
,
4097 "Error receiving message from VF\n");
4099 /* this is a message we already processed, do nothing */
4100 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
4104 * until the vf completes a reset it should not be
4105 * allowed to start any configuration.
4108 if (msgbuf
[0] == E1000_VF_RESET
) {
4109 igb_vf_reset_msg(adapter
, vf
);
4114 if (!adapter
->vf_data
[vf
].clear_to_send
) {
4115 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4116 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4120 switch ((msgbuf
[0] & 0xFFFF)) {
4121 case E1000_VF_SET_MAC_ADDR
:
4122 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
4124 case E1000_VF_SET_MULTICAST
:
4125 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
4127 case E1000_VF_SET_LPE
:
4128 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
4130 case E1000_VF_SET_VLAN
:
4131 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
4134 dev_err(&adapter
->pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
4139 /* notify the VF of the results of what it sent us */
4141 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4143 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
4145 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
4147 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4153 * igb_intr_msi - Interrupt Handler
4154 * @irq: interrupt number
4155 * @data: pointer to a network interface device structure
4157 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
4159 struct net_device
*netdev
= data
;
4160 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4161 struct e1000_hw
*hw
= &adapter
->hw
;
4162 /* read ICR disables interrupts using IAM */
4163 u32 icr
= rd32(E1000_ICR
);
4165 igb_write_itr(adapter
->rx_ring
);
4167 if(icr
& E1000_ICR_DOUTSYNC
) {
4168 /* HW is reporting DMA is out of sync */
4169 adapter
->stats
.doosync
++;
4172 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4173 hw
->mac
.get_link_status
= 1;
4174 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4175 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4178 napi_schedule(&adapter
->rx_ring
[0].napi
);
4184 * igb_intr - Legacy Interrupt Handler
4185 * @irq: interrupt number
4186 * @data: pointer to a network interface device structure
4188 static irqreturn_t
igb_intr(int irq
, void *data
)
4190 struct net_device
*netdev
= data
;
4191 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4192 struct e1000_hw
*hw
= &adapter
->hw
;
4193 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
4194 * need for the IMC write */
4195 u32 icr
= rd32(E1000_ICR
);
4197 return IRQ_NONE
; /* Not our interrupt */
4199 igb_write_itr(adapter
->rx_ring
);
4201 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
4202 * not set, then the adapter didn't send an interrupt */
4203 if (!(icr
& E1000_ICR_INT_ASSERTED
))
4206 if(icr
& E1000_ICR_DOUTSYNC
) {
4207 /* HW is reporting DMA is out of sync */
4208 adapter
->stats
.doosync
++;
4211 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4212 hw
->mac
.get_link_status
= 1;
4213 /* guard against interrupt when we're going down */
4214 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4215 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4218 napi_schedule(&adapter
->rx_ring
[0].napi
);
4223 static inline void igb_rx_irq_enable(struct igb_ring
*rx_ring
)
4225 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4226 struct e1000_hw
*hw
= &adapter
->hw
;
4228 if (adapter
->itr_setting
& 3) {
4229 if (adapter
->num_rx_queues
== 1)
4230 igb_set_itr(adapter
);
4232 igb_update_ring_itr(rx_ring
);
4235 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4236 if (adapter
->msix_entries
)
4237 wr32(E1000_EIMS
, rx_ring
->eims_value
);
4239 igb_irq_enable(adapter
);
4244 * igb_poll - NAPI Rx polling callback
4245 * @napi: napi polling structure
4246 * @budget: count of how many packets we should handle
4248 static int igb_poll(struct napi_struct
*napi
, int budget
)
4250 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
4253 #ifdef CONFIG_IGB_DCA
4254 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4255 igb_update_rx_dca(rx_ring
);
4257 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
4259 if (rx_ring
->buddy
) {
4260 #ifdef CONFIG_IGB_DCA
4261 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4262 igb_update_tx_dca(rx_ring
->buddy
);
4264 if (!igb_clean_tx_irq(rx_ring
->buddy
))
4268 /* If not enough Rx work done, exit the polling mode */
4269 if (work_done
< budget
) {
4270 napi_complete(napi
);
4271 igb_rx_irq_enable(rx_ring
);
4278 * igb_hwtstamp - utility function which checks for TX time stamp
4279 * @adapter: board private structure
4280 * @skb: packet that was just sent
4282 * If we were asked to do hardware stamping and such a time stamp is
4283 * available, then it must have been for this skb here because we only
4284 * allow only one such packet into the queue.
4286 static void igb_tx_hwtstamp(struct igb_adapter
*adapter
, struct sk_buff
*skb
)
4288 union skb_shared_tx
*shtx
= skb_tx(skb
);
4289 struct e1000_hw
*hw
= &adapter
->hw
;
4291 if (unlikely(shtx
->hardware
)) {
4292 u32 valid
= rd32(E1000_TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
;
4294 u64 regval
= rd32(E1000_TXSTMPL
);
4296 struct skb_shared_hwtstamps shhwtstamps
;
4298 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
4299 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
4300 ns
= timecounter_cyc2time(&adapter
->clock
,
4302 timecompare_update(&adapter
->compare
, ns
);
4303 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
4304 shhwtstamps
.syststamp
=
4305 timecompare_transform(&adapter
->compare
, ns
);
4306 skb_tstamp_tx(skb
, &shhwtstamps
);
4312 * igb_clean_tx_irq - Reclaim resources after transmit completes
4313 * @adapter: board private structure
4314 * returns true if ring is completely cleaned
4316 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
4318 struct igb_adapter
*adapter
= tx_ring
->adapter
;
4319 struct net_device
*netdev
= adapter
->netdev
;
4320 struct e1000_hw
*hw
= &adapter
->hw
;
4321 struct igb_buffer
*buffer_info
;
4322 struct sk_buff
*skb
;
4323 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
4324 unsigned int total_bytes
= 0, total_packets
= 0;
4325 unsigned int i
, eop
, count
= 0;
4326 bool cleaned
= false;
4328 i
= tx_ring
->next_to_clean
;
4329 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4330 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4332 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
4333 (count
< tx_ring
->count
)) {
4334 for (cleaned
= false; !cleaned
; count
++) {
4335 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
4336 buffer_info
= &tx_ring
->buffer_info
[i
];
4337 cleaned
= (i
== eop
);
4338 skb
= buffer_info
->skb
;
4341 unsigned int segs
, bytecount
;
4342 /* gso_segs is currently only valid for tcp */
4343 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
4344 /* multiply data chunks by size of headers */
4345 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
4347 total_packets
+= segs
;
4348 total_bytes
+= bytecount
;
4350 igb_tx_hwtstamp(adapter
, skb
);
4353 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
4354 tx_desc
->wb
.status
= 0;
4357 if (i
== tx_ring
->count
)
4360 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4361 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4364 tx_ring
->next_to_clean
= i
;
4366 if (unlikely(count
&&
4367 netif_carrier_ok(netdev
) &&
4368 igb_desc_unused(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
4369 /* Make sure that anybody stopping the queue after this
4370 * sees the new next_to_clean.
4373 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
4374 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
4375 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4376 ++adapter
->restart_queue
;
4380 if (tx_ring
->detect_tx_hung
) {
4381 /* Detect a transmit hang in hardware, this serializes the
4382 * check with the clearing of time_stamp and movement of i */
4383 tx_ring
->detect_tx_hung
= false;
4384 if (tx_ring
->buffer_info
[i
].time_stamp
&&
4385 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
4386 (adapter
->tx_timeout_factor
* HZ
))
4387 && !(rd32(E1000_STATUS
) &
4388 E1000_STATUS_TXOFF
)) {
4390 /* detected Tx unit hang */
4391 dev_err(&adapter
->pdev
->dev
,
4392 "Detected Tx Unit Hang\n"
4396 " next_to_use <%x>\n"
4397 " next_to_clean <%x>\n"
4398 "buffer_info[next_to_clean]\n"
4399 " time_stamp <%lx>\n"
4400 " next_to_watch <%x>\n"
4402 " desc.status <%x>\n",
4403 tx_ring
->queue_index
,
4404 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
4405 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
4406 tx_ring
->next_to_use
,
4407 tx_ring
->next_to_clean
,
4408 tx_ring
->buffer_info
[i
].time_stamp
,
4411 eop_desc
->wb
.status
);
4412 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4415 tx_ring
->total_bytes
+= total_bytes
;
4416 tx_ring
->total_packets
+= total_packets
;
4417 tx_ring
->tx_stats
.bytes
+= total_bytes
;
4418 tx_ring
->tx_stats
.packets
+= total_packets
;
4419 adapter
->net_stats
.tx_bytes
+= total_bytes
;
4420 adapter
->net_stats
.tx_packets
+= total_packets
;
4421 return (count
< tx_ring
->count
);
4425 * igb_receive_skb - helper function to handle rx indications
4426 * @ring: pointer to receive ring receving this packet
4427 * @status: descriptor status field as written by hardware
4428 * @rx_desc: receive descriptor containing vlan and type information.
4429 * @skb: pointer to sk_buff to be indicated to stack
4431 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
4432 union e1000_adv_rx_desc
* rx_desc
,
4433 struct sk_buff
*skb
)
4435 struct igb_adapter
* adapter
= ring
->adapter
;
4436 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
4438 skb_record_rx_queue(skb
, ring
->queue_index
);
4439 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
4441 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
4442 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
4445 napi_gro_receive(&ring
->napi
, skb
);
4448 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
4449 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
4451 netif_receive_skb(skb
);
4455 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
4456 u32 status_err
, struct sk_buff
*skb
)
4458 skb
->ip_summed
= CHECKSUM_NONE
;
4460 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
4461 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
4463 /* TCP/UDP checksum error bit is set */
4465 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
4466 /* let the stack verify checksum errors */
4467 adapter
->hw_csum_err
++;
4470 /* It must be a TCP or UDP packet with a valid checksum */
4471 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
4472 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
4474 adapter
->hw_csum_good
++;
4477 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
4478 int *work_done
, int budget
)
4480 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4481 struct net_device
*netdev
= adapter
->netdev
;
4482 struct e1000_hw
*hw
= &adapter
->hw
;
4483 struct pci_dev
*pdev
= adapter
->pdev
;
4484 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
4485 struct igb_buffer
*buffer_info
, *next_buffer
;
4486 struct sk_buff
*skb
;
4487 bool cleaned
= false;
4488 int cleaned_count
= 0;
4489 unsigned int total_bytes
= 0, total_packets
= 0;
4491 u32 length
, hlen
, staterr
;
4493 i
= rx_ring
->next_to_clean
;
4494 buffer_info
= &rx_ring
->buffer_info
[i
];
4495 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4496 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4498 while (staterr
& E1000_RXD_STAT_DD
) {
4499 if (*work_done
>= budget
)
4503 skb
= buffer_info
->skb
;
4504 prefetch(skb
->data
- NET_IP_ALIGN
);
4505 buffer_info
->skb
= NULL
;
4508 if (i
== rx_ring
->count
)
4510 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4512 next_buffer
= &rx_ring
->buffer_info
[i
];
4514 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
4518 if (!adapter
->rx_ps_hdr_size
) {
4519 pci_unmap_single(pdev
, buffer_info
->dma
,
4520 adapter
->rx_buffer_len
+
4522 PCI_DMA_FROMDEVICE
);
4523 skb_put(skb
, length
);
4527 /* HW will not DMA in data larger than the given buffer, even
4528 * if it parses the (NFS, of course) header to be larger. In
4529 * that case, it fills the header buffer and spills the rest
4532 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
4533 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
4534 if (hlen
> adapter
->rx_ps_hdr_size
)
4535 hlen
= adapter
->rx_ps_hdr_size
;
4537 if (!skb_shinfo(skb
)->nr_frags
) {
4538 pci_unmap_single(pdev
, buffer_info
->dma
,
4539 adapter
->rx_ps_hdr_size
+ NET_IP_ALIGN
,
4540 PCI_DMA_FROMDEVICE
);
4545 pci_unmap_page(pdev
, buffer_info
->page_dma
,
4546 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
4547 buffer_info
->page_dma
= 0;
4549 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
4551 buffer_info
->page_offset
,
4554 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
4555 (page_count(buffer_info
->page
) != 1))
4556 buffer_info
->page
= NULL
;
4558 get_page(buffer_info
->page
);
4561 skb
->data_len
+= length
;
4563 skb
->truesize
+= length
;
4566 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
4567 buffer_info
->skb
= next_buffer
->skb
;
4568 buffer_info
->dma
= next_buffer
->dma
;
4569 next_buffer
->skb
= skb
;
4570 next_buffer
->dma
= 0;
4575 * If this bit is set, then the RX registers contain
4576 * the time stamp. No other packet will be time
4577 * stamped until we read these registers, so read the
4578 * registers to make them available again. Because
4579 * only one packet can be time stamped at a time, we
4580 * know that the register values must belong to this
4581 * one here and therefore we don't need to compare
4582 * any of the additional attributes stored for it.
4584 * If nothing went wrong, then it should have a
4585 * skb_shared_tx that we can turn into a
4586 * skb_shared_hwtstamps.
4588 * TODO: can time stamping be triggered (thus locking
4589 * the registers) without the packet reaching this point
4590 * here? In that case RX time stamping would get stuck.
4592 * TODO: in "time stamp all packets" mode this bit is
4593 * not set. Need a global flag for this mode and then
4594 * always read the registers. Cannot be done without
4597 if (unlikely(staterr
& E1000_RXD_STAT_TS
)) {
4600 struct skb_shared_hwtstamps
*shhwtstamps
=
4603 WARN(!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
),
4604 "igb: no RX time stamp available for time stamped packet");
4605 regval
= rd32(E1000_RXSTMPL
);
4606 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
4607 ns
= timecounter_cyc2time(&adapter
->clock
, regval
);
4608 timecompare_update(&adapter
->compare
, ns
);
4609 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
4610 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
4611 shhwtstamps
->syststamp
=
4612 timecompare_transform(&adapter
->compare
, ns
);
4615 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
4616 dev_kfree_skb_irq(skb
);
4620 total_bytes
+= skb
->len
;
4623 igb_rx_checksum_adv(adapter
, staterr
, skb
);
4625 skb
->protocol
= eth_type_trans(skb
, netdev
);
4627 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
4630 rx_desc
->wb
.upper
.status_error
= 0;
4632 /* return some buffers to hardware, one at a time is too slow */
4633 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
4634 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4638 /* use prefetched values */
4640 buffer_info
= next_buffer
;
4641 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4644 rx_ring
->next_to_clean
= i
;
4645 cleaned_count
= igb_desc_unused(rx_ring
);
4648 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4650 rx_ring
->total_packets
+= total_packets
;
4651 rx_ring
->total_bytes
+= total_bytes
;
4652 rx_ring
->rx_stats
.packets
+= total_packets
;
4653 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4654 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4655 adapter
->net_stats
.rx_packets
+= total_packets
;
4660 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4661 * @adapter: address of board private structure
4663 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4666 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4667 struct net_device
*netdev
= adapter
->netdev
;
4668 struct pci_dev
*pdev
= adapter
->pdev
;
4669 union e1000_adv_rx_desc
*rx_desc
;
4670 struct igb_buffer
*buffer_info
;
4671 struct sk_buff
*skb
;
4675 i
= rx_ring
->next_to_use
;
4676 buffer_info
= &rx_ring
->buffer_info
[i
];
4678 if (adapter
->rx_ps_hdr_size
)
4679 bufsz
= adapter
->rx_ps_hdr_size
;
4681 bufsz
= adapter
->rx_buffer_len
;
4682 bufsz
+= NET_IP_ALIGN
;
4684 while (cleaned_count
--) {
4685 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4687 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4688 if (!buffer_info
->page
) {
4689 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4690 if (!buffer_info
->page
) {
4691 adapter
->alloc_rx_buff_failed
++;
4694 buffer_info
->page_offset
= 0;
4696 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4698 buffer_info
->page_dma
=
4699 pci_map_page(pdev
, buffer_info
->page
,
4700 buffer_info
->page_offset
,
4702 PCI_DMA_FROMDEVICE
);
4705 if (!buffer_info
->skb
) {
4706 skb
= netdev_alloc_skb(netdev
, bufsz
);
4708 adapter
->alloc_rx_buff_failed
++;
4712 /* Make buffer alignment 2 beyond a 16 byte boundary
4713 * this will result in a 16 byte aligned IP header after
4714 * the 14 byte MAC header is removed
4716 skb_reserve(skb
, NET_IP_ALIGN
);
4718 buffer_info
->skb
= skb
;
4719 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4721 PCI_DMA_FROMDEVICE
);
4723 /* Refresh the desc even if buffer_addrs didn't change because
4724 * each write-back erases this info. */
4725 if (adapter
->rx_ps_hdr_size
) {
4726 rx_desc
->read
.pkt_addr
=
4727 cpu_to_le64(buffer_info
->page_dma
);
4728 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4730 rx_desc
->read
.pkt_addr
=
4731 cpu_to_le64(buffer_info
->dma
);
4732 rx_desc
->read
.hdr_addr
= 0;
4736 if (i
== rx_ring
->count
)
4738 buffer_info
= &rx_ring
->buffer_info
[i
];
4742 if (rx_ring
->next_to_use
!= i
) {
4743 rx_ring
->next_to_use
= i
;
4745 i
= (rx_ring
->count
- 1);
4749 /* Force memory writes to complete before letting h/w
4750 * know there are new descriptors to fetch. (Only
4751 * applicable for weak-ordered memory model archs,
4752 * such as IA-64). */
4754 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4764 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4766 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4767 struct mii_ioctl_data
*data
= if_mii(ifr
);
4769 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4774 data
->phy_id
= adapter
->hw
.phy
.addr
;
4777 if (!capable(CAP_NET_ADMIN
))
4779 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4791 * igb_hwtstamp_ioctl - control hardware time stamping
4796 * Outgoing time stamping can be enabled and disabled. Play nice and
4797 * disable it when requested, although it shouldn't case any overhead
4798 * when no packet needs it. At most one packet in the queue may be
4799 * marked for time stamping, otherwise it would be impossible to tell
4800 * for sure to which packet the hardware time stamp belongs.
4802 * Incoming time stamping has to be configured via the hardware
4803 * filters. Not all combinations are supported, in particular event
4804 * type has to be specified. Matching the kind of event packet is
4805 * not supported, with the exception of "all V2 events regardless of
4809 static int igb_hwtstamp_ioctl(struct net_device
*netdev
,
4810 struct ifreq
*ifr
, int cmd
)
4812 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4813 struct e1000_hw
*hw
= &adapter
->hw
;
4814 struct hwtstamp_config config
;
4815 u32 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4816 u32 tsync_rx_ctl_bit
= E1000_TSYNCRXCTL_ENABLED
;
4817 u32 tsync_rx_ctl_type
= 0;
4818 u32 tsync_rx_cfg
= 0;
4821 short port
= 319; /* PTP */
4824 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
4827 /* reserved for future extensions */
4831 switch (config
.tx_type
) {
4832 case HWTSTAMP_TX_OFF
:
4833 tsync_tx_ctl_bit
= 0;
4835 case HWTSTAMP_TX_ON
:
4836 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4842 switch (config
.rx_filter
) {
4843 case HWTSTAMP_FILTER_NONE
:
4844 tsync_rx_ctl_bit
= 0;
4846 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
4847 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
4848 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
4849 case HWTSTAMP_FILTER_ALL
:
4851 * register TSYNCRXCFG must be set, therefore it is not
4852 * possible to time stamp both Sync and Delay_Req messages
4853 * => fall back to time stamping all packets
4855 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_ALL
;
4856 config
.rx_filter
= HWTSTAMP_FILTER_ALL
;
4858 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
4859 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4860 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
4863 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
4864 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4865 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
4868 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
4869 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
4870 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4871 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
;
4874 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4876 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
4877 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
4878 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4879 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
;
4882 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4884 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
4885 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
4886 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
4887 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
4888 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
4895 /* enable/disable TX */
4896 regval
= rd32(E1000_TSYNCTXCTL
);
4897 regval
= (regval
& ~E1000_TSYNCTXCTL_ENABLED
) | tsync_tx_ctl_bit
;
4898 wr32(E1000_TSYNCTXCTL
, regval
);
4900 /* enable/disable RX, define which PTP packets are time stamped */
4901 regval
= rd32(E1000_TSYNCRXCTL
);
4902 regval
= (regval
& ~E1000_TSYNCRXCTL_ENABLED
) | tsync_rx_ctl_bit
;
4903 regval
= (regval
& ~0xE) | tsync_rx_ctl_type
;
4904 wr32(E1000_TSYNCRXCTL
, regval
);
4905 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
4908 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
4909 * (Ethertype to filter on)
4910 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
4911 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
4913 wr32(E1000_ETQF0
, is_l2
? 0x440088f7 : 0);
4915 /* L4 Queue Filter[0]: only filter by source and destination port */
4916 wr32(E1000_SPQF0
, htons(port
));
4917 wr32(E1000_IMIREXT(0), is_l4
?
4918 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
4919 wr32(E1000_IMIR(0), is_l4
?
4921 | (0<<16) /* immediate interrupt disabled */
4922 | 0 /* (1<<17) bit cleared: do not bypass
4923 destination port check */)
4925 wr32(E1000_FTQF0
, is_l4
?
4927 | (1<<15) /* VF not compared */
4928 | (1<<27) /* Enable Timestamping */
4929 | (7<<28) /* only source port filter enabled,
4930 source/target address and protocol
4932 : ((1<<15) | (15<<28) /* all mask bits set = filter not
4937 adapter
->hwtstamp_config
= config
;
4939 /* clear TX/RX time stamp registers, just to be sure */
4940 regval
= rd32(E1000_TXSTMPH
);
4941 regval
= rd32(E1000_RXSTMPH
);
4943 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
4953 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4959 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4961 return igb_hwtstamp_ioctl(netdev
, ifr
, cmd
);
4967 static void igb_vlan_rx_register(struct net_device
*netdev
,
4968 struct vlan_group
*grp
)
4970 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4971 struct e1000_hw
*hw
= &adapter
->hw
;
4974 igb_irq_disable(adapter
);
4975 adapter
->vlgrp
= grp
;
4978 /* enable VLAN tag insert/strip */
4979 ctrl
= rd32(E1000_CTRL
);
4980 ctrl
|= E1000_CTRL_VME
;
4981 wr32(E1000_CTRL
, ctrl
);
4983 /* enable VLAN receive filtering */
4984 rctl
= rd32(E1000_RCTL
);
4985 rctl
&= ~E1000_RCTL_CFIEN
;
4986 wr32(E1000_RCTL
, rctl
);
4987 igb_update_mng_vlan(adapter
);
4989 /* disable VLAN tag insert/strip */
4990 ctrl
= rd32(E1000_CTRL
);
4991 ctrl
&= ~E1000_CTRL_VME
;
4992 wr32(E1000_CTRL
, ctrl
);
4994 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4995 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4996 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
5000 igb_rlpml_set(adapter
);
5002 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5003 igb_irq_enable(adapter
);
5006 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
5008 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5009 struct e1000_hw
*hw
= &adapter
->hw
;
5010 int pf_id
= adapter
->vfs_allocated_count
;
5012 if ((hw
->mng_cookie
.status
&
5013 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
5014 (vid
== adapter
->mng_vlan_id
))
5017 /* add vid to vlvf if sr-iov is enabled,
5018 * if that fails add directly to filter table */
5019 if (igb_vlvf_set(adapter
, vid
, true, pf_id
))
5020 igb_vfta_set(hw
, vid
, true);
5024 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
5026 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5027 struct e1000_hw
*hw
= &adapter
->hw
;
5028 int pf_id
= adapter
->vfs_allocated_count
;
5030 igb_irq_disable(adapter
);
5031 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
5033 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5034 igb_irq_enable(adapter
);
5036 if ((adapter
->hw
.mng_cookie
.status
&
5037 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
5038 (vid
== adapter
->mng_vlan_id
)) {
5039 /* release control to f/w */
5040 igb_release_hw_control(adapter
);
5044 /* remove vid from vlvf if sr-iov is enabled,
5045 * if not in vlvf remove from vfta */
5046 if (igb_vlvf_set(adapter
, vid
, false, pf_id
))
5047 igb_vfta_set(hw
, vid
, false);
5050 static void igb_restore_vlan(struct igb_adapter
*adapter
)
5052 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
5054 if (adapter
->vlgrp
) {
5056 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
5057 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
5059 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
5064 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
5066 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
5070 /* Fiber NICs only allow 1000 gbps Full duplex */
5071 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
5072 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
5073 dev_err(&adapter
->pdev
->dev
,
5074 "Unsupported Speed/Duplex configuration\n");
5079 case SPEED_10
+ DUPLEX_HALF
:
5080 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
5082 case SPEED_10
+ DUPLEX_FULL
:
5083 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
5085 case SPEED_100
+ DUPLEX_HALF
:
5086 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
5088 case SPEED_100
+ DUPLEX_FULL
:
5089 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
5091 case SPEED_1000
+ DUPLEX_FULL
:
5093 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
5095 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
5097 dev_err(&adapter
->pdev
->dev
,
5098 "Unsupported Speed/Duplex configuration\n");
5104 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5106 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5107 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5108 struct e1000_hw
*hw
= &adapter
->hw
;
5109 u32 ctrl
, rctl
, status
;
5110 u32 wufc
= adapter
->wol
;
5115 netif_device_detach(netdev
);
5117 if (netif_running(netdev
))
5120 igb_reset_interrupt_capability(adapter
);
5122 igb_free_queues(adapter
);
5125 retval
= pci_save_state(pdev
);
5130 status
= rd32(E1000_STATUS
);
5131 if (status
& E1000_STATUS_LU
)
5132 wufc
&= ~E1000_WUFC_LNKC
;
5135 igb_setup_rctl(adapter
);
5136 igb_set_multi(netdev
);
5138 /* turn on all-multi mode if wake on multicast is enabled */
5139 if (wufc
& E1000_WUFC_MC
) {
5140 rctl
= rd32(E1000_RCTL
);
5141 rctl
|= E1000_RCTL_MPE
;
5142 wr32(E1000_RCTL
, rctl
);
5145 ctrl
= rd32(E1000_CTRL
);
5146 /* advertise wake from D3Cold */
5147 #define E1000_CTRL_ADVD3WUC 0x00100000
5148 /* phy power management enable */
5149 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5150 ctrl
|= E1000_CTRL_ADVD3WUC
;
5151 wr32(E1000_CTRL
, ctrl
);
5153 /* Allow time for pending master requests to run */
5154 igb_disable_pcie_master(&adapter
->hw
);
5156 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
5157 wr32(E1000_WUFC
, wufc
);
5160 wr32(E1000_WUFC
, 0);
5163 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
5165 igb_shutdown_fiber_serdes_link_82575(hw
);
5167 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5168 * would have already happened in close and is redundant. */
5169 igb_release_hw_control(adapter
);
5171 pci_disable_device(pdev
);
5177 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5182 retval
= __igb_shutdown(pdev
, &wake
);
5187 pci_prepare_to_sleep(pdev
);
5189 pci_wake_from_d3(pdev
, false);
5190 pci_set_power_state(pdev
, PCI_D3hot
);
5196 static int igb_resume(struct pci_dev
*pdev
)
5198 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5199 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5200 struct e1000_hw
*hw
= &adapter
->hw
;
5203 pci_set_power_state(pdev
, PCI_D0
);
5204 pci_restore_state(pdev
);
5206 err
= pci_enable_device_mem(pdev
);
5209 "igb: Cannot enable PCI device from suspend\n");
5212 pci_set_master(pdev
);
5214 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5215 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5217 igb_set_interrupt_capability(adapter
);
5219 if (igb_alloc_queues(adapter
)) {
5220 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
5224 /* e1000_power_up_phy(adapter); */
5228 /* let the f/w know that the h/w is now under the control of the
5230 igb_get_hw_control(adapter
);
5232 wr32(E1000_WUS
, ~0);
5234 if (netif_running(netdev
)) {
5235 err
= igb_open(netdev
);
5240 netif_device_attach(netdev
);
5246 static void igb_shutdown(struct pci_dev
*pdev
)
5250 __igb_shutdown(pdev
, &wake
);
5252 if (system_state
== SYSTEM_POWER_OFF
) {
5253 pci_wake_from_d3(pdev
, wake
);
5254 pci_set_power_state(pdev
, PCI_D3hot
);
5258 #ifdef CONFIG_NET_POLL_CONTROLLER
5260 * Polling 'interrupt' - used by things like netconsole to send skbs
5261 * without having to re-enable interrupts. It's not called while
5262 * the interrupt routine is executing.
5264 static void igb_netpoll(struct net_device
*netdev
)
5266 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5267 struct e1000_hw
*hw
= &adapter
->hw
;
5270 if (!adapter
->msix_entries
) {
5271 igb_irq_disable(adapter
);
5272 napi_schedule(&adapter
->rx_ring
[0].napi
);
5276 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5277 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
5278 wr32(E1000_EIMC
, tx_ring
->eims_value
);
5279 igb_clean_tx_irq(tx_ring
);
5280 wr32(E1000_EIMS
, tx_ring
->eims_value
);
5283 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5284 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
5285 wr32(E1000_EIMC
, rx_ring
->eims_value
);
5286 napi_schedule(&rx_ring
->napi
);
5289 #endif /* CONFIG_NET_POLL_CONTROLLER */
5292 * igb_io_error_detected - called when PCI error is detected
5293 * @pdev: Pointer to PCI device
5294 * @state: The current pci connection state
5296 * This function is called after a PCI bus error affecting
5297 * this device has been detected.
5299 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
5300 pci_channel_state_t state
)
5302 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5303 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5305 netif_device_detach(netdev
);
5307 if (netif_running(netdev
))
5309 pci_disable_device(pdev
);
5311 /* Request a slot slot reset. */
5312 return PCI_ERS_RESULT_NEED_RESET
;
5316 * igb_io_slot_reset - called after the pci bus has been reset.
5317 * @pdev: Pointer to PCI device
5319 * Restart the card from scratch, as if from a cold-boot. Implementation
5320 * resembles the first-half of the igb_resume routine.
5322 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
5324 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5325 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5326 struct e1000_hw
*hw
= &adapter
->hw
;
5327 pci_ers_result_t result
;
5330 if (pci_enable_device_mem(pdev
)) {
5332 "Cannot re-enable PCI device after reset.\n");
5333 result
= PCI_ERS_RESULT_DISCONNECT
;
5335 pci_set_master(pdev
);
5336 pci_restore_state(pdev
);
5338 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5339 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5342 wr32(E1000_WUS
, ~0);
5343 result
= PCI_ERS_RESULT_RECOVERED
;
5346 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
5348 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
5349 "failed 0x%0x\n", err
);
5350 /* non-fatal, continue */
5357 * igb_io_resume - called when traffic can start flowing again.
5358 * @pdev: Pointer to PCI device
5360 * This callback is called when the error recovery driver tells us that
5361 * its OK to resume normal operation. Implementation resembles the
5362 * second-half of the igb_resume routine.
5364 static void igb_io_resume(struct pci_dev
*pdev
)
5366 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5367 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5369 if (netif_running(netdev
)) {
5370 if (igb_up(adapter
)) {
5371 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
5376 netif_device_attach(netdev
);
5378 /* let the f/w know that the h/w is now under the control of the
5380 igb_get_hw_control(adapter
);
5383 static inline void igb_set_vmolr(struct e1000_hw
*hw
, int vfn
)
5387 reg_data
= rd32(E1000_VMOLR(vfn
));
5388 reg_data
|= E1000_VMOLR_BAM
| /* Accept broadcast */
5389 E1000_VMOLR_ROPE
| /* Accept packets matched in UTA */
5390 E1000_VMOLR_ROMPE
| /* Accept packets matched in MTA */
5391 E1000_VMOLR_AUPE
| /* Accept untagged packets */
5392 E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
5393 wr32(E1000_VMOLR(vfn
), reg_data
);
5396 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
5399 struct e1000_hw
*hw
= &adapter
->hw
;
5402 vmolr
= rd32(E1000_VMOLR(vfn
));
5403 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
5404 vmolr
|= size
| E1000_VMOLR_LPE
;
5405 wr32(E1000_VMOLR(vfn
), vmolr
);
5410 static inline void igb_set_rah_pool(struct e1000_hw
*hw
, int pool
, int entry
)
5414 reg_data
= rd32(E1000_RAH(entry
));
5415 reg_data
&= ~E1000_RAH_POOL_MASK
;
5416 reg_data
|= E1000_RAH_POOL_1
<< pool
;;
5417 wr32(E1000_RAH(entry
), reg_data
);
5420 static void igb_set_mc_list_pools(struct igb_adapter
*adapter
,
5421 int entry_count
, u16 total_rar_filters
)
5423 struct e1000_hw
*hw
= &adapter
->hw
;
5424 int i
= adapter
->vfs_allocated_count
+ 1;
5426 if ((i
+ entry_count
) < total_rar_filters
)
5427 total_rar_filters
= i
+ entry_count
;
5429 for (; i
< total_rar_filters
; i
++)
5430 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, i
);
5433 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
5434 int vf
, unsigned char *mac_addr
)
5436 struct e1000_hw
*hw
= &adapter
->hw
;
5437 int rar_entry
= vf
+ 1; /* VF MAC addresses start at entry 1 */
5439 igb_rar_set(hw
, mac_addr
, rar_entry
);
5441 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
5443 igb_set_rah_pool(hw
, vf
, rar_entry
);
5448 static void igb_vmm_control(struct igb_adapter
*adapter
)
5450 struct e1000_hw
*hw
= &adapter
->hw
;
5453 if (!adapter
->vfs_allocated_count
)
5456 /* VF's need PF reset indication before they
5457 * can send/receive mail */
5458 reg_data
= rd32(E1000_CTRL_EXT
);
5459 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
5460 wr32(E1000_CTRL_EXT
, reg_data
);
5462 igb_vmdq_set_loopback_pf(hw
, true);
5463 igb_vmdq_set_replication_pf(hw
, true);