1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/pci-aspm.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/if_ether.h>
46 #include <linux/aer.h>
48 #include <linux/dca.h>
52 #define DRV_VERSION "1.3.16-k2"
53 char igb_driver_name
[] = "igb";
54 char igb_driver_version
[] = DRV_VERSION
;
55 static const char igb_driver_string
[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
57 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
59 static const struct e1000_info
*igb_info_tbl
[] = {
60 [board_82575
] = &e1000_82575_info
,
63 static struct pci_device_id igb_pci_tbl
[] = {
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
69 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
70 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
71 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
72 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
73 /* required last entry */
77 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
79 void igb_reset(struct igb_adapter
*);
80 static int igb_setup_all_tx_resources(struct igb_adapter
*);
81 static int igb_setup_all_rx_resources(struct igb_adapter
*);
82 static void igb_free_all_tx_resources(struct igb_adapter
*);
83 static void igb_free_all_rx_resources(struct igb_adapter
*);
84 void igb_update_stats(struct igb_adapter
*);
85 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
86 static void __devexit
igb_remove(struct pci_dev
*pdev
);
87 static int igb_sw_init(struct igb_adapter
*);
88 static int igb_open(struct net_device
*);
89 static int igb_close(struct net_device
*);
90 static void igb_configure_tx(struct igb_adapter
*);
91 static void igb_configure_rx(struct igb_adapter
*);
92 static void igb_setup_rctl(struct igb_adapter
*);
93 static void igb_clean_all_tx_rings(struct igb_adapter
*);
94 static void igb_clean_all_rx_rings(struct igb_adapter
*);
95 static void igb_clean_tx_ring(struct igb_ring
*);
96 static void igb_clean_rx_ring(struct igb_ring
*);
97 static void igb_set_multi(struct net_device
*);
98 static void igb_update_phy_info(unsigned long);
99 static void igb_watchdog(unsigned long);
100 static void igb_watchdog_task(struct work_struct
*);
101 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
103 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
104 static struct net_device_stats
*igb_get_stats(struct net_device
*);
105 static int igb_change_mtu(struct net_device
*, int);
106 static int igb_set_mac(struct net_device
*, void *);
107 static irqreturn_t
igb_intr(int irq
, void *);
108 static irqreturn_t
igb_intr_msi(int irq
, void *);
109 static irqreturn_t
igb_msix_other(int irq
, void *);
110 static irqreturn_t
igb_msix_rx(int irq
, void *);
111 static irqreturn_t
igb_msix_tx(int irq
, void *);
112 #ifdef CONFIG_IGB_DCA
113 static void igb_update_rx_dca(struct igb_ring
*);
114 static void igb_update_tx_dca(struct igb_ring
*);
115 static void igb_setup_dca(struct igb_adapter
*);
116 #endif /* CONFIG_IGB_DCA */
117 static bool igb_clean_tx_irq(struct igb_ring
*);
118 static int igb_poll(struct napi_struct
*, int);
119 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
120 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
121 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
122 static void igb_tx_timeout(struct net_device
*);
123 static void igb_reset_task(struct work_struct
*);
124 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
125 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
126 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
127 static void igb_restore_vlan(struct igb_adapter
*);
128 static void igb_ping_all_vfs(struct igb_adapter
*);
129 static void igb_msg_task(struct igb_adapter
*);
130 static int igb_rcv_msg_from_vf(struct igb_adapter
*, u32
);
131 static inline void igb_set_rah_pool(struct e1000_hw
*, int , int);
132 static void igb_vmm_control(struct igb_adapter
*);
133 static int igb_set_vf_mac(struct igb_adapter
*adapter
, int, unsigned char *);
134 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
136 static inline void igb_set_vmolr(struct e1000_hw
*hw
, int vfn
)
140 reg_data
= rd32(E1000_VMOLR(vfn
));
141 reg_data
|= E1000_VMOLR_BAM
| /* Accept broadcast */
142 E1000_VMOLR_ROPE
| /* Accept packets matched in UTA */
143 E1000_VMOLR_ROMPE
| /* Accept packets matched in MTA */
144 E1000_VMOLR_AUPE
| /* Accept untagged packets */
145 E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
146 wr32(E1000_VMOLR(vfn
), reg_data
);
149 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
152 struct e1000_hw
*hw
= &adapter
->hw
;
155 vmolr
= rd32(E1000_VMOLR(vfn
));
156 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
157 vmolr
|= size
| E1000_VMOLR_LPE
;
158 wr32(E1000_VMOLR(vfn
), vmolr
);
163 static inline void igb_set_rah_pool(struct e1000_hw
*hw
, int pool
, int entry
)
167 reg_data
= rd32(E1000_RAH(entry
));
168 reg_data
&= ~E1000_RAH_POOL_MASK
;
169 reg_data
|= E1000_RAH_POOL_1
<< pool
;;
170 wr32(E1000_RAH(entry
), reg_data
);
174 static int igb_suspend(struct pci_dev
*, pm_message_t
);
175 static int igb_resume(struct pci_dev
*);
177 static void igb_shutdown(struct pci_dev
*);
178 #ifdef CONFIG_IGB_DCA
179 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
180 static struct notifier_block dca_notifier
= {
181 .notifier_call
= igb_notify_dca
,
186 #ifdef CONFIG_NET_POLL_CONTROLLER
187 /* for netdump / net console */
188 static void igb_netpoll(struct net_device
*);
190 #ifdef CONFIG_PCI_IOV
191 static unsigned int max_vfs
= 0;
192 module_param(max_vfs
, uint
, 0);
193 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate "
194 "per physical function");
195 #endif /* CONFIG_PCI_IOV */
197 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
198 pci_channel_state_t
);
199 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
200 static void igb_io_resume(struct pci_dev
*);
202 static struct pci_error_handlers igb_err_handler
= {
203 .error_detected
= igb_io_error_detected
,
204 .slot_reset
= igb_io_slot_reset
,
205 .resume
= igb_io_resume
,
209 static struct pci_driver igb_driver
= {
210 .name
= igb_driver_name
,
211 .id_table
= igb_pci_tbl
,
213 .remove
= __devexit_p(igb_remove
),
215 /* Power Managment Hooks */
216 .suspend
= igb_suspend
,
217 .resume
= igb_resume
,
219 .shutdown
= igb_shutdown
,
220 .err_handler
= &igb_err_handler
223 static int global_quad_port_a
; /* global quad port a indication */
225 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
226 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
227 MODULE_LICENSE("GPL");
228 MODULE_VERSION(DRV_VERSION
);
231 * Scale the NIC clock cycle by a large factor so that
232 * relatively small clock corrections can be added or
233 * substracted at each clock tick. The drawbacks of a
234 * large factor are a) that the clock register overflows
235 * more quickly (not such a big deal) and b) that the
236 * increment per tick has to fit into 24 bits.
239 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
241 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
243 * The base scale factor is intentionally a power of two
244 * so that the division in %struct timecounter can be done with
247 #define IGB_TSYNC_SHIFT (19)
248 #define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
251 * The duration of one clock cycle of the NIC.
253 * @todo This hard-coded value is part of the specification and might change
254 * in future hardware revisions. Add revision check.
256 #define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
258 #if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
259 # error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
263 * igb_read_clock - read raw cycle counter (to be used by time counter)
265 static cycle_t
igb_read_clock(const struct cyclecounter
*tc
)
267 struct igb_adapter
*adapter
=
268 container_of(tc
, struct igb_adapter
, cycles
);
269 struct e1000_hw
*hw
= &adapter
->hw
;
272 stamp
= rd32(E1000_SYSTIML
);
273 stamp
|= (u64
)rd32(E1000_SYSTIMH
) << 32ULL;
280 * igb_get_hw_dev_name - return device name string
281 * used by hardware layer to print debugging information
283 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
285 struct igb_adapter
*adapter
= hw
->back
;
286 return adapter
->netdev
->name
;
290 * igb_get_time_str - format current NIC and system time as string
292 static char *igb_get_time_str(struct igb_adapter
*adapter
,
295 cycle_t hw
= adapter
->cycles
.read(&adapter
->cycles
);
296 struct timespec nic
= ns_to_timespec(timecounter_read(&adapter
->clock
));
298 struct timespec delta
;
299 getnstimeofday(&sys
);
301 delta
= timespec_sub(nic
, sys
);
304 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
306 (long)nic
.tv_sec
, nic
.tv_nsec
,
307 (long)sys
.tv_sec
, sys
.tv_nsec
,
308 (long)delta
.tv_sec
, delta
.tv_nsec
);
315 * igb_desc_unused - calculate if we have unused descriptors
317 static int igb_desc_unused(struct igb_ring
*ring
)
319 if (ring
->next_to_clean
> ring
->next_to_use
)
320 return ring
->next_to_clean
- ring
->next_to_use
- 1;
322 return ring
->count
+ ring
->next_to_clean
- ring
->next_to_use
- 1;
326 * igb_init_module - Driver Registration Routine
328 * igb_init_module is the first routine called when the driver is
329 * loaded. All it does is register with the PCI subsystem.
331 static int __init
igb_init_module(void)
334 printk(KERN_INFO
"%s - version %s\n",
335 igb_driver_string
, igb_driver_version
);
337 printk(KERN_INFO
"%s\n", igb_copyright
);
339 global_quad_port_a
= 0;
341 #ifdef CONFIG_IGB_DCA
342 dca_register_notify(&dca_notifier
);
345 ret
= pci_register_driver(&igb_driver
);
349 module_init(igb_init_module
);
352 * igb_exit_module - Driver Exit Cleanup Routine
354 * igb_exit_module is called just before the driver is removed
357 static void __exit
igb_exit_module(void)
359 #ifdef CONFIG_IGB_DCA
360 dca_unregister_notify(&dca_notifier
);
362 pci_unregister_driver(&igb_driver
);
365 module_exit(igb_exit_module
);
367 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
369 * igb_cache_ring_register - Descriptor ring to register mapping
370 * @adapter: board private structure to initialize
372 * Once we know the feature-set enabled for the device, we'll cache
373 * the register offset the descriptor ring is assigned to.
375 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
378 unsigned int rbase_offset
= adapter
->vfs_allocated_count
;
380 switch (adapter
->hw
.mac
.type
) {
382 /* The queues are allocated for virtualization such that VF 0
383 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
384 * In order to avoid collision we start at the first free queue
385 * and continue consuming queues in the same sequence
387 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
388 adapter
->rx_ring
[i
].reg_idx
= rbase_offset
+
390 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
391 adapter
->tx_ring
[i
].reg_idx
= rbase_offset
+
396 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
397 adapter
->rx_ring
[i
].reg_idx
= i
;
398 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
399 adapter
->tx_ring
[i
].reg_idx
= i
;
405 * igb_alloc_queues - Allocate memory for all rings
406 * @adapter: board private structure to initialize
408 * We allocate one ring per queue at run-time since we don't know the
409 * number of queues at compile-time.
411 static int igb_alloc_queues(struct igb_adapter
*adapter
)
415 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
416 sizeof(struct igb_ring
), GFP_KERNEL
);
417 if (!adapter
->tx_ring
)
420 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
421 sizeof(struct igb_ring
), GFP_KERNEL
);
422 if (!adapter
->rx_ring
) {
423 kfree(adapter
->tx_ring
);
427 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
429 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
430 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
431 ring
->count
= adapter
->tx_ring_count
;
432 ring
->adapter
= adapter
;
433 ring
->queue_index
= i
;
435 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
436 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
437 ring
->count
= adapter
->rx_ring_count
;
438 ring
->adapter
= adapter
;
439 ring
->queue_index
= i
;
440 ring
->itr_register
= E1000_ITR
;
442 /* set a default napi handler for each rx_ring */
443 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
446 igb_cache_ring_register(adapter
);
450 static void igb_free_queues(struct igb_adapter
*adapter
)
454 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
455 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
457 adapter
->num_rx_queues
= 0;
458 adapter
->num_tx_queues
= 0;
460 kfree(adapter
->tx_ring
);
461 kfree(adapter
->rx_ring
);
464 #define IGB_N0_QUEUE -1
465 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
466 int tx_queue
, int msix_vector
)
469 struct e1000_hw
*hw
= &adapter
->hw
;
472 switch (hw
->mac
.type
) {
474 /* The 82575 assigns vectors using a bitmask, which matches the
475 bitmask for the EICR/EIMS/EIMC registers. To assign one
476 or more queues to a vector, we write the appropriate bits
477 into the MSIXBM register for that vector. */
478 if (rx_queue
> IGB_N0_QUEUE
) {
479 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
480 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
482 if (tx_queue
> IGB_N0_QUEUE
) {
483 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
484 adapter
->tx_ring
[tx_queue
].eims_value
=
485 E1000_EICR_TX_QUEUE0
<< tx_queue
;
487 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
490 /* 82576 uses a table-based method for assigning vectors.
491 Each queue has a single entry in the table to which we write
492 a vector number along with a "valid" bit. Sadly, the layout
493 of the table is somewhat counterintuitive. */
494 if (rx_queue
> IGB_N0_QUEUE
) {
495 index
= (rx_queue
>> 1) + adapter
->vfs_allocated_count
;
496 ivar
= array_rd32(E1000_IVAR0
, index
);
497 if (rx_queue
& 0x1) {
498 /* vector goes into third byte of register */
499 ivar
= ivar
& 0xFF00FFFF;
500 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
502 /* vector goes into low byte of register */
503 ivar
= ivar
& 0xFFFFFF00;
504 ivar
|= msix_vector
| E1000_IVAR_VALID
;
506 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
507 array_wr32(E1000_IVAR0
, index
, ivar
);
509 if (tx_queue
> IGB_N0_QUEUE
) {
510 index
= (tx_queue
>> 1) + adapter
->vfs_allocated_count
;
511 ivar
= array_rd32(E1000_IVAR0
, index
);
512 if (tx_queue
& 0x1) {
513 /* vector goes into high byte of register */
514 ivar
= ivar
& 0x00FFFFFF;
515 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
517 /* vector goes into second byte of register */
518 ivar
= ivar
& 0xFFFF00FF;
519 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
521 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
522 array_wr32(E1000_IVAR0
, index
, ivar
);
532 * igb_configure_msix - Configure MSI-X hardware
534 * igb_configure_msix sets up the hardware to properly
535 * generate MSI-X interrupts.
537 static void igb_configure_msix(struct igb_adapter
*adapter
)
541 struct e1000_hw
*hw
= &adapter
->hw
;
543 adapter
->eims_enable_mask
= 0;
544 if (hw
->mac
.type
== e1000_82576
)
545 /* Turn on MSI-X capability first, or our settings
546 * won't stick. And it will take days to debug. */
547 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
548 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
551 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
552 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
553 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
554 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
555 if (tx_ring
->itr_val
)
556 writel(tx_ring
->itr_val
,
557 hw
->hw_addr
+ tx_ring
->itr_register
);
559 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
562 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
563 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
564 rx_ring
->buddy
= NULL
;
565 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
566 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
567 if (rx_ring
->itr_val
)
568 writel(rx_ring
->itr_val
,
569 hw
->hw_addr
+ rx_ring
->itr_register
);
571 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
575 /* set vector for other causes, i.e. link changes */
576 switch (hw
->mac
.type
) {
578 array_wr32(E1000_MSIXBM(0), vector
++,
581 tmp
= rd32(E1000_CTRL_EXT
);
582 /* enable MSI-X PBA support*/
583 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
585 /* Auto-Mask interrupts upon ICR read. */
586 tmp
|= E1000_CTRL_EXT_EIAME
;
587 tmp
|= E1000_CTRL_EXT_IRCA
;
589 wr32(E1000_CTRL_EXT
, tmp
);
590 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
591 adapter
->eims_other
= E1000_EIMS_OTHER
;
596 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
597 wr32(E1000_IVAR_MISC
, tmp
);
599 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
600 adapter
->eims_other
= 1 << (vector
- 1);
603 /* do nothing, since nothing else supports MSI-X */
605 } /* switch (hw->mac.type) */
610 * igb_request_msix - Initialize MSI-X interrupts
612 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
615 static int igb_request_msix(struct igb_adapter
*adapter
)
617 struct net_device
*netdev
= adapter
->netdev
;
618 int i
, err
= 0, vector
= 0;
622 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
623 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
624 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
625 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
626 &igb_msix_tx
, 0, ring
->name
,
627 &(adapter
->tx_ring
[i
]));
630 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
631 ring
->itr_val
= 976; /* ~4000 ints/sec */
634 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
635 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
636 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
637 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
639 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
640 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
641 &igb_msix_rx
, 0, ring
->name
,
642 &(adapter
->rx_ring
[i
]));
645 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
646 ring
->itr_val
= adapter
->itr
;
650 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
651 &igb_msix_other
, 0, netdev
->name
, netdev
);
655 igb_configure_msix(adapter
);
661 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
663 if (adapter
->msix_entries
) {
664 pci_disable_msix(adapter
->pdev
);
665 kfree(adapter
->msix_entries
);
666 adapter
->msix_entries
= NULL
;
667 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
668 pci_disable_msi(adapter
->pdev
);
674 * igb_set_interrupt_capability - set MSI or MSI-X if supported
676 * Attempt to configure interrupts using the best available
677 * capabilities of the hardware and kernel.
679 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
684 /* Number of supported queues. */
685 /* Having more queues than CPUs doesn't make sense. */
686 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
687 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
689 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
690 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
692 if (!adapter
->msix_entries
)
695 for (i
= 0; i
< numvecs
; i
++)
696 adapter
->msix_entries
[i
].entry
= i
;
698 err
= pci_enable_msix(adapter
->pdev
,
699 adapter
->msix_entries
,
704 igb_reset_interrupt_capability(adapter
);
706 /* If we can't do MSI-X, try MSI */
708 #ifdef CONFIG_PCI_IOV
709 /* disable SR-IOV for non MSI-X configurations */
710 if (adapter
->vf_data
) {
711 struct e1000_hw
*hw
= &adapter
->hw
;
712 /* disable iov and allow time for transactions to clear */
713 pci_disable_sriov(adapter
->pdev
);
716 kfree(adapter
->vf_data
);
717 adapter
->vf_data
= NULL
;
718 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
720 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
723 adapter
->num_rx_queues
= 1;
724 adapter
->num_tx_queues
= 1;
725 if (!pci_enable_msi(adapter
->pdev
))
726 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
728 /* Notify the stack of the (possibly) reduced Tx Queue count. */
729 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
734 * igb_request_irq - initialize interrupts
736 * Attempts to configure interrupts using the best available
737 * capabilities of the hardware and kernel.
739 static int igb_request_irq(struct igb_adapter
*adapter
)
741 struct net_device
*netdev
= adapter
->netdev
;
742 struct e1000_hw
*hw
= &adapter
->hw
;
745 if (adapter
->msix_entries
) {
746 err
= igb_request_msix(adapter
);
749 /* fall back to MSI */
750 igb_reset_interrupt_capability(adapter
);
751 if (!pci_enable_msi(adapter
->pdev
))
752 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
753 igb_free_all_tx_resources(adapter
);
754 igb_free_all_rx_resources(adapter
);
755 adapter
->num_rx_queues
= 1;
756 igb_alloc_queues(adapter
);
758 switch (hw
->mac
.type
) {
760 wr32(E1000_MSIXBM(0),
761 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
764 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
771 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
772 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
773 netdev
->name
, netdev
);
776 /* fall back to legacy interrupts */
777 igb_reset_interrupt_capability(adapter
);
778 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
781 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
782 netdev
->name
, netdev
);
785 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
792 static void igb_free_irq(struct igb_adapter
*adapter
)
794 struct net_device
*netdev
= adapter
->netdev
;
796 if (adapter
->msix_entries
) {
799 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
800 free_irq(adapter
->msix_entries
[vector
++].vector
,
801 &(adapter
->tx_ring
[i
]));
802 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
803 free_irq(adapter
->msix_entries
[vector
++].vector
,
804 &(adapter
->rx_ring
[i
]));
806 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
810 free_irq(adapter
->pdev
->irq
, netdev
);
814 * igb_irq_disable - Mask off interrupt generation on the NIC
815 * @adapter: board private structure
817 static void igb_irq_disable(struct igb_adapter
*adapter
)
819 struct e1000_hw
*hw
= &adapter
->hw
;
821 if (adapter
->msix_entries
) {
823 wr32(E1000_EIMC
, ~0);
830 synchronize_irq(adapter
->pdev
->irq
);
834 * igb_irq_enable - Enable default interrupt generation settings
835 * @adapter: board private structure
837 static void igb_irq_enable(struct igb_adapter
*adapter
)
839 struct e1000_hw
*hw
= &adapter
->hw
;
841 if (adapter
->msix_entries
) {
842 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
843 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
844 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
845 if (adapter
->vfs_allocated_count
)
846 wr32(E1000_MBVFIMR
, 0xFF);
847 wr32(E1000_IMS
, (E1000_IMS_LSC
| E1000_IMS_VMMB
|
848 E1000_IMS_DOUTSYNC
));
850 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
851 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
855 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
857 struct net_device
*netdev
= adapter
->netdev
;
858 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
859 u16 old_vid
= adapter
->mng_vlan_id
;
860 if (adapter
->vlgrp
) {
861 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
862 if (adapter
->hw
.mng_cookie
.status
&
863 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
864 igb_vlan_rx_add_vid(netdev
, vid
);
865 adapter
->mng_vlan_id
= vid
;
867 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
869 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
871 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
872 igb_vlan_rx_kill_vid(netdev
, old_vid
);
874 adapter
->mng_vlan_id
= vid
;
879 * igb_release_hw_control - release control of the h/w to f/w
880 * @adapter: address of board private structure
882 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
883 * For ASF and Pass Through versions of f/w this means that the
884 * driver is no longer loaded.
887 static void igb_release_hw_control(struct igb_adapter
*adapter
)
889 struct e1000_hw
*hw
= &adapter
->hw
;
892 /* Let firmware take over control of h/w */
893 ctrl_ext
= rd32(E1000_CTRL_EXT
);
895 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
900 * igb_get_hw_control - get control of the h/w from f/w
901 * @adapter: address of board private structure
903 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
904 * For ASF and Pass Through versions of f/w this means that
905 * the driver is loaded.
908 static void igb_get_hw_control(struct igb_adapter
*adapter
)
910 struct e1000_hw
*hw
= &adapter
->hw
;
913 /* Let firmware know the driver has taken over */
914 ctrl_ext
= rd32(E1000_CTRL_EXT
);
916 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
920 * igb_configure - configure the hardware for RX and TX
921 * @adapter: private board structure
923 static void igb_configure(struct igb_adapter
*adapter
)
925 struct net_device
*netdev
= adapter
->netdev
;
928 igb_get_hw_control(adapter
);
929 igb_set_multi(netdev
);
931 igb_restore_vlan(adapter
);
933 igb_configure_tx(adapter
);
934 igb_setup_rctl(adapter
);
935 igb_configure_rx(adapter
);
937 igb_rx_fifo_flush_82575(&adapter
->hw
);
939 /* call igb_desc_unused which always leaves
940 * at least 1 descriptor unused to make sure
941 * next_to_use != next_to_clean */
942 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
943 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
944 igb_alloc_rx_buffers_adv(ring
, igb_desc_unused(ring
));
948 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
953 * igb_up - Open the interface and prepare it to handle traffic
954 * @adapter: board private structure
957 int igb_up(struct igb_adapter
*adapter
)
959 struct e1000_hw
*hw
= &adapter
->hw
;
962 /* hardware has been reset, we need to reload some things */
963 igb_configure(adapter
);
965 clear_bit(__IGB_DOWN
, &adapter
->state
);
967 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
968 napi_enable(&adapter
->rx_ring
[i
].napi
);
969 if (adapter
->msix_entries
)
970 igb_configure_msix(adapter
);
972 igb_vmm_control(adapter
);
973 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
974 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
976 /* Clear any pending interrupts. */
978 igb_irq_enable(adapter
);
980 netif_tx_start_all_queues(adapter
->netdev
);
982 /* Fire a link change interrupt to start the watchdog. */
983 wr32(E1000_ICS
, E1000_ICS_LSC
);
987 void igb_down(struct igb_adapter
*adapter
)
989 struct e1000_hw
*hw
= &adapter
->hw
;
990 struct net_device
*netdev
= adapter
->netdev
;
994 /* signal that we're down so the interrupt handler does not
995 * reschedule our watchdog timer */
996 set_bit(__IGB_DOWN
, &adapter
->state
);
998 /* disable receives in the hardware */
999 rctl
= rd32(E1000_RCTL
);
1000 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1001 /* flush and sleep below */
1003 netif_tx_stop_all_queues(netdev
);
1005 /* disable transmits in the hardware */
1006 tctl
= rd32(E1000_TCTL
);
1007 tctl
&= ~E1000_TCTL_EN
;
1008 wr32(E1000_TCTL
, tctl
);
1009 /* flush both disables and wait for them to finish */
1013 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1014 napi_disable(&adapter
->rx_ring
[i
].napi
);
1016 igb_irq_disable(adapter
);
1018 del_timer_sync(&adapter
->watchdog_timer
);
1019 del_timer_sync(&adapter
->phy_info_timer
);
1021 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
1022 netif_carrier_off(netdev
);
1024 /* record the stats before reset*/
1025 igb_update_stats(adapter
);
1027 adapter
->link_speed
= 0;
1028 adapter
->link_duplex
= 0;
1030 if (!pci_channel_offline(adapter
->pdev
))
1032 igb_clean_all_tx_rings(adapter
);
1033 igb_clean_all_rx_rings(adapter
);
1034 #ifdef CONFIG_IGB_DCA
1036 /* since we reset the hardware DCA settings were cleared */
1037 igb_setup_dca(adapter
);
1041 void igb_reinit_locked(struct igb_adapter
*adapter
)
1043 WARN_ON(in_interrupt());
1044 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1048 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1051 void igb_reset(struct igb_adapter
*adapter
)
1053 struct e1000_hw
*hw
= &adapter
->hw
;
1054 struct e1000_mac_info
*mac
= &hw
->mac
;
1055 struct e1000_fc_info
*fc
= &hw
->fc
;
1056 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
1059 /* Repartition Pba for greater than 9k mtu
1060 * To take effect CTRL.RST is required.
1062 switch (mac
->type
) {
1064 pba
= E1000_PBA_64K
;
1068 pba
= E1000_PBA_34K
;
1072 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1073 (mac
->type
< e1000_82576
)) {
1074 /* adjust PBA for jumbo frames */
1075 wr32(E1000_PBA
, pba
);
1077 /* To maintain wire speed transmits, the Tx FIFO should be
1078 * large enough to accommodate two full transmit packets,
1079 * rounded up to the next 1KB and expressed in KB. Likewise,
1080 * the Rx FIFO should be large enough to accommodate at least
1081 * one full receive packet and is similarly rounded up and
1082 * expressed in KB. */
1083 pba
= rd32(E1000_PBA
);
1084 /* upper 16 bits has Tx packet buffer allocation size in KB */
1085 tx_space
= pba
>> 16;
1086 /* lower 16 bits has Rx packet buffer allocation size in KB */
1088 /* the tx fifo also stores 16 bytes of information about the tx
1089 * but don't include ethernet FCS because hardware appends it */
1090 min_tx_space
= (adapter
->max_frame_size
+
1091 sizeof(union e1000_adv_tx_desc
) -
1093 min_tx_space
= ALIGN(min_tx_space
, 1024);
1094 min_tx_space
>>= 10;
1095 /* software strips receive CRC, so leave room for it */
1096 min_rx_space
= adapter
->max_frame_size
;
1097 min_rx_space
= ALIGN(min_rx_space
, 1024);
1098 min_rx_space
>>= 10;
1100 /* If current Tx allocation is less than the min Tx FIFO size,
1101 * and the min Tx FIFO size is less than the current Rx FIFO
1102 * allocation, take space away from current Rx allocation */
1103 if (tx_space
< min_tx_space
&&
1104 ((min_tx_space
- tx_space
) < pba
)) {
1105 pba
= pba
- (min_tx_space
- tx_space
);
1107 /* if short on rx space, rx wins and must trump tx
1109 if (pba
< min_rx_space
)
1112 wr32(E1000_PBA
, pba
);
1115 /* flow control settings */
1116 /* The high water mark must be low enough to fit one full frame
1117 * (or the size used for early receive) above it in the Rx FIFO.
1118 * Set it to the lower of:
1119 * - 90% of the Rx FIFO size, or
1120 * - the full Rx FIFO size minus one full frame */
1121 hwm
= min(((pba
<< 10) * 9 / 10),
1122 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1124 if (mac
->type
< e1000_82576
) {
1125 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
1126 fc
->low_water
= fc
->high_water
- 8;
1128 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
1129 fc
->low_water
= fc
->high_water
- 16;
1131 fc
->pause_time
= 0xFFFF;
1133 fc
->type
= fc
->original_type
;
1135 /* disable receive for all VFs and wait one second */
1136 if (adapter
->vfs_allocated_count
) {
1138 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1139 adapter
->vf_data
[i
].clear_to_send
= false;
1141 /* ping all the active vfs to let them know we are going down */
1142 igb_ping_all_vfs(adapter
);
1144 /* disable transmits and receives */
1145 wr32(E1000_VFRE
, 0);
1146 wr32(E1000_VFTE
, 0);
1149 /* Allow time for pending master requests to run */
1150 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
1153 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
1154 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
1156 igb_update_mng_vlan(adapter
);
1158 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1159 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1161 igb_reset_adaptive(&adapter
->hw
);
1162 igb_get_phy_info(&adapter
->hw
);
1165 static const struct net_device_ops igb_netdev_ops
= {
1166 .ndo_open
= igb_open
,
1167 .ndo_stop
= igb_close
,
1168 .ndo_start_xmit
= igb_xmit_frame_adv
,
1169 .ndo_get_stats
= igb_get_stats
,
1170 .ndo_set_multicast_list
= igb_set_multi
,
1171 .ndo_set_mac_address
= igb_set_mac
,
1172 .ndo_change_mtu
= igb_change_mtu
,
1173 .ndo_do_ioctl
= igb_ioctl
,
1174 .ndo_tx_timeout
= igb_tx_timeout
,
1175 .ndo_validate_addr
= eth_validate_addr
,
1176 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1177 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1178 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1179 #ifdef CONFIG_NET_POLL_CONTROLLER
1180 .ndo_poll_controller
= igb_netpoll
,
1185 * igb_probe - Device Initialization Routine
1186 * @pdev: PCI device information struct
1187 * @ent: entry in igb_pci_tbl
1189 * Returns 0 on success, negative on failure
1191 * igb_probe initializes an adapter identified by a pci_dev structure.
1192 * The OS initialization, configuring of the adapter private structure,
1193 * and a hardware reset occur.
1195 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1196 const struct pci_device_id
*ent
)
1198 struct net_device
*netdev
;
1199 struct igb_adapter
*adapter
;
1200 struct e1000_hw
*hw
;
1201 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1202 unsigned long mmio_start
, mmio_len
;
1203 int err
, pci_using_dac
;
1204 u16 eeprom_data
= 0;
1205 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1208 err
= pci_enable_device_mem(pdev
);
1213 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
1215 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
1219 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1221 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
1223 dev_err(&pdev
->dev
, "No usable DMA "
1224 "configuration, aborting\n");
1230 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1236 err
= pci_enable_pcie_error_reporting(pdev
);
1238 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1240 /* non-fatal, continue */
1243 pci_set_master(pdev
);
1244 pci_save_state(pdev
);
1247 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
1248 IGB_ABS_MAX_TX_QUEUES
);
1250 goto err_alloc_etherdev
;
1252 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1254 pci_set_drvdata(pdev
, netdev
);
1255 adapter
= netdev_priv(netdev
);
1256 adapter
->netdev
= netdev
;
1257 adapter
->pdev
= pdev
;
1260 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1262 mmio_start
= pci_resource_start(pdev
, 0);
1263 mmio_len
= pci_resource_len(pdev
, 0);
1266 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1270 netdev
->netdev_ops
= &igb_netdev_ops
;
1271 igb_set_ethtool_ops(netdev
);
1272 netdev
->watchdog_timeo
= 5 * HZ
;
1274 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1276 netdev
->mem_start
= mmio_start
;
1277 netdev
->mem_end
= mmio_start
+ mmio_len
;
1279 /* PCI config space info */
1280 hw
->vendor_id
= pdev
->vendor
;
1281 hw
->device_id
= pdev
->device
;
1282 hw
->revision_id
= pdev
->revision
;
1283 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1284 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1286 /* setup the private structure */
1288 /* Copy the default MAC, PHY and NVM function pointers */
1289 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1290 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1291 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1292 /* Initialize skew-specific constants */
1293 err
= ei
->get_invariants(hw
);
1297 #ifdef CONFIG_PCI_IOV
1298 /* since iov functionality isn't critical to base device function we
1299 * can accept failure. If it fails we don't allow iov to be enabled */
1300 if (hw
->mac
.type
== e1000_82576
) {
1301 /* 82576 supports a maximum of 7 VFs in addition to the PF */
1302 unsigned int num_vfs
= (max_vfs
> 7) ? 7 : max_vfs
;
1304 unsigned char mac_addr
[ETH_ALEN
];
1307 adapter
->vf_data
= kcalloc(num_vfs
,
1308 sizeof(struct vf_data_storage
),
1310 if (!adapter
->vf_data
) {
1312 "Could not allocate VF private data - "
1313 "IOV enable failed\n");
1315 err
= pci_enable_sriov(pdev
, num_vfs
);
1317 adapter
->vfs_allocated_count
= num_vfs
;
1318 dev_info(&pdev
->dev
,
1319 "%d vfs allocated\n",
1322 i
< adapter
->vfs_allocated_count
;
1324 random_ether_addr(mac_addr
);
1325 igb_set_vf_mac(adapter
, i
,
1329 kfree(adapter
->vf_data
);
1330 adapter
->vf_data
= NULL
;
1337 /* setup the private structure */
1338 err
= igb_sw_init(adapter
);
1342 igb_get_bus_info_pcie(hw
);
1345 switch (hw
->mac
.type
) {
1347 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1354 hw
->phy
.autoneg_wait_to_complete
= false;
1355 hw
->mac
.adaptive_ifs
= true;
1357 /* Copper options */
1358 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1359 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1360 hw
->phy
.disable_polarity_correction
= false;
1361 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1364 if (igb_check_reset_block(hw
))
1365 dev_info(&pdev
->dev
,
1366 "PHY reset is blocked due to SOL/IDER session.\n");
1368 netdev
->features
= NETIF_F_SG
|
1370 NETIF_F_HW_VLAN_TX
|
1371 NETIF_F_HW_VLAN_RX
|
1372 NETIF_F_HW_VLAN_FILTER
;
1374 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1375 netdev
->features
|= NETIF_F_TSO
;
1376 netdev
->features
|= NETIF_F_TSO6
;
1378 netdev
->features
|= NETIF_F_GRO
;
1380 netdev
->vlan_features
|= NETIF_F_TSO
;
1381 netdev
->vlan_features
|= NETIF_F_TSO6
;
1382 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1383 netdev
->vlan_features
|= NETIF_F_SG
;
1386 netdev
->features
|= NETIF_F_HIGHDMA
;
1388 if (adapter
->hw
.mac
.type
== e1000_82576
)
1389 netdev
->features
|= NETIF_F_SCTP_CSUM
;
1391 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1393 /* before reading the NVM, reset the controller to put the device in a
1394 * known good starting state */
1395 hw
->mac
.ops
.reset_hw(hw
);
1397 /* make sure the NVM is good */
1398 if (igb_validate_nvm_checksum(hw
) < 0) {
1399 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1404 /* copy the MAC address out of the NVM */
1405 if (hw
->mac
.ops
.read_mac_addr(hw
))
1406 dev_err(&pdev
->dev
, "NVM Read Error\n");
1408 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1409 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1411 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1412 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1417 setup_timer(&adapter
->watchdog_timer
, &igb_watchdog
,
1418 (unsigned long) adapter
);
1419 setup_timer(&adapter
->phy_info_timer
, &igb_update_phy_info
,
1420 (unsigned long) adapter
);
1422 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1423 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1425 /* Initialize link properties that are user-changeable */
1426 adapter
->fc_autoneg
= true;
1427 hw
->mac
.autoneg
= true;
1428 hw
->phy
.autoneg_advertised
= 0x2f;
1430 hw
->fc
.original_type
= e1000_fc_default
;
1431 hw
->fc
.type
= e1000_fc_default
;
1433 adapter
->itr_setting
= IGB_DEFAULT_ITR
;
1434 adapter
->itr
= IGB_START_ITR
;
1436 igb_validate_mdi_setting(hw
);
1438 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1439 * enable the ACPI Magic Packet filter
1442 if (hw
->bus
.func
== 0)
1443 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1444 else if (hw
->bus
.func
== 1)
1445 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
1447 if (eeprom_data
& eeprom_apme_mask
)
1448 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1450 /* now that we have the eeprom settings, apply the special cases where
1451 * the eeprom may be wrong or the board simply won't support wake on
1452 * lan on a particular port */
1453 switch (pdev
->device
) {
1454 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1455 adapter
->eeprom_wol
= 0;
1457 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1458 case E1000_DEV_ID_82576_FIBER
:
1459 case E1000_DEV_ID_82576_SERDES
:
1460 /* Wake events only supported on port A for dual fiber
1461 * regardless of eeprom setting */
1462 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1463 adapter
->eeprom_wol
= 0;
1465 case E1000_DEV_ID_82576_QUAD_COPPER
:
1466 /* if quad port adapter, disable WoL on all but port A */
1467 if (global_quad_port_a
!= 0)
1468 adapter
->eeprom_wol
= 0;
1470 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
1471 /* Reset for multiple quad port adapters */
1472 if (++global_quad_port_a
== 4)
1473 global_quad_port_a
= 0;
1477 /* initialize the wol settings based on the eeprom settings */
1478 adapter
->wol
= adapter
->eeprom_wol
;
1479 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1481 /* reset the hardware with the new settings */
1484 /* let the f/w know that the h/w is now under the control of the
1486 igb_get_hw_control(adapter
);
1488 strcpy(netdev
->name
, "eth%d");
1489 err
= register_netdev(netdev
);
1493 /* carrier off reporting is important to ethtool even BEFORE open */
1494 netif_carrier_off(netdev
);
1496 #ifdef CONFIG_IGB_DCA
1497 if (dca_add_requester(&pdev
->dev
) == 0) {
1498 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1499 dev_info(&pdev
->dev
, "DCA enabled\n");
1500 igb_setup_dca(adapter
);
1505 * Initialize hardware timer: we keep it running just in case
1506 * that some program needs it later on.
1508 memset(&adapter
->cycles
, 0, sizeof(adapter
->cycles
));
1509 adapter
->cycles
.read
= igb_read_clock
;
1510 adapter
->cycles
.mask
= CLOCKSOURCE_MASK(64);
1511 adapter
->cycles
.mult
= 1;
1512 adapter
->cycles
.shift
= IGB_TSYNC_SHIFT
;
1515 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS
* IGB_TSYNC_SCALE
);
1518 * Avoid rollover while we initialize by resetting the time counter.
1520 wr32(E1000_SYSTIML
, 0x00000000);
1521 wr32(E1000_SYSTIMH
, 0x00000000);
1524 * Set registers so that rollover occurs soon to test this.
1526 wr32(E1000_SYSTIML
, 0x00000000);
1527 wr32(E1000_SYSTIMH
, 0xFF800000);
1530 timecounter_init(&adapter
->clock
,
1532 ktime_to_ns(ktime_get_real()));
1535 * Synchronize our NIC clock against system wall clock. NIC
1536 * time stamp reading requires ~3us per sample, each sample
1537 * was pretty stable even under load => only require 10
1538 * samples for each offset comparison.
1540 memset(&adapter
->compare
, 0, sizeof(adapter
->compare
));
1541 adapter
->compare
.source
= &adapter
->clock
;
1542 adapter
->compare
.target
= ktime_get_real
;
1543 adapter
->compare
.num_samples
= 10;
1544 timecompare_update(&adapter
->compare
, 0);
1550 "igb: %s: hw %p initialized timer\n",
1551 igb_get_time_str(adapter
, buffer
),
1556 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1557 /* print bus type/speed/width info */
1558 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1560 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1561 ? "2.5Gb/s" : "unknown"),
1562 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ? "Width x4" :
1563 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ? "Width x2" :
1564 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ? "Width x1" :
1568 igb_read_part_num(hw
, &part_num
);
1569 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1570 (part_num
>> 8), (part_num
& 0xff));
1572 dev_info(&pdev
->dev
,
1573 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1574 adapter
->msix_entries
? "MSI-X" :
1575 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1576 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1581 igb_release_hw_control(adapter
);
1583 if (!igb_check_reset_block(hw
))
1586 if (hw
->flash_address
)
1587 iounmap(hw
->flash_address
);
1589 igb_free_queues(adapter
);
1591 iounmap(hw
->hw_addr
);
1593 free_netdev(netdev
);
1595 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1599 pci_disable_device(pdev
);
1604 * igb_remove - Device Removal Routine
1605 * @pdev: PCI device information struct
1607 * igb_remove is called by the PCI subsystem to alert the driver
1608 * that it should release a PCI device. The could be caused by a
1609 * Hot-Plug event, or because the driver is going to be removed from
1612 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1614 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1615 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1616 struct e1000_hw
*hw
= &adapter
->hw
;
1619 /* flush_scheduled work may reschedule our watchdog task, so
1620 * explicitly disable watchdog tasks from being rescheduled */
1621 set_bit(__IGB_DOWN
, &adapter
->state
);
1622 del_timer_sync(&adapter
->watchdog_timer
);
1623 del_timer_sync(&adapter
->phy_info_timer
);
1625 flush_scheduled_work();
1627 #ifdef CONFIG_IGB_DCA
1628 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1629 dev_info(&pdev
->dev
, "DCA disabled\n");
1630 dca_remove_requester(&pdev
->dev
);
1631 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1632 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
1636 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1637 * would have already happened in close and is redundant. */
1638 igb_release_hw_control(adapter
);
1640 unregister_netdev(netdev
);
1642 if (!igb_check_reset_block(&adapter
->hw
))
1643 igb_reset_phy(&adapter
->hw
);
1645 igb_reset_interrupt_capability(adapter
);
1647 igb_free_queues(adapter
);
1649 #ifdef CONFIG_PCI_IOV
1650 /* reclaim resources allocated to VFs */
1651 if (adapter
->vf_data
) {
1652 /* disable iov and allow time for transactions to clear */
1653 pci_disable_sriov(pdev
);
1656 kfree(adapter
->vf_data
);
1657 adapter
->vf_data
= NULL
;
1658 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1660 dev_info(&pdev
->dev
, "IOV Disabled\n");
1663 iounmap(hw
->hw_addr
);
1664 if (hw
->flash_address
)
1665 iounmap(hw
->flash_address
);
1666 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1669 free_netdev(netdev
);
1671 err
= pci_disable_pcie_error_reporting(pdev
);
1674 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1676 pci_disable_device(pdev
);
1680 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1681 * @adapter: board private structure to initialize
1683 * igb_sw_init initializes the Adapter private data structure.
1684 * Fields are initialized based on PCI device information and
1685 * OS network device settings (MTU size).
1687 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1689 struct e1000_hw
*hw
= &adapter
->hw
;
1690 struct net_device
*netdev
= adapter
->netdev
;
1691 struct pci_dev
*pdev
= adapter
->pdev
;
1693 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1695 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1696 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1697 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1698 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1699 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1700 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1702 /* This call may decrease the number of queues depending on
1703 * interrupt mode. */
1704 igb_set_interrupt_capability(adapter
);
1706 if (igb_alloc_queues(adapter
)) {
1707 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1711 /* Explicitly disable IRQ since the NIC can be in any state. */
1712 igb_irq_disable(adapter
);
1714 set_bit(__IGB_DOWN
, &adapter
->state
);
1719 * igb_open - Called when a network interface is made active
1720 * @netdev: network interface device structure
1722 * Returns 0 on success, negative value on failure
1724 * The open entry point is called when a network interface is made
1725 * active by the system (IFF_UP). At this point all resources needed
1726 * for transmit and receive operations are allocated, the interrupt
1727 * handler is registered with the OS, the watchdog timer is started,
1728 * and the stack is notified that the interface is ready.
1730 static int igb_open(struct net_device
*netdev
)
1732 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1733 struct e1000_hw
*hw
= &adapter
->hw
;
1737 /* disallow open during test */
1738 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1741 netif_carrier_off(netdev
);
1743 /* allocate transmit descriptors */
1744 err
= igb_setup_all_tx_resources(adapter
);
1748 /* allocate receive descriptors */
1749 err
= igb_setup_all_rx_resources(adapter
);
1753 /* e1000_power_up_phy(adapter); */
1755 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1756 if ((adapter
->hw
.mng_cookie
.status
&
1757 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1758 igb_update_mng_vlan(adapter
);
1760 /* before we allocate an interrupt, we must be ready to handle it.
1761 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1762 * as soon as we call pci_request_irq, so we have to setup our
1763 * clean_rx handler before we do so. */
1764 igb_configure(adapter
);
1766 igb_vmm_control(adapter
);
1767 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
1768 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
1770 err
= igb_request_irq(adapter
);
1774 /* From here on the code is the same as igb_up() */
1775 clear_bit(__IGB_DOWN
, &adapter
->state
);
1777 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1778 napi_enable(&adapter
->rx_ring
[i
].napi
);
1780 /* Clear any pending interrupts. */
1783 igb_irq_enable(adapter
);
1785 netif_tx_start_all_queues(netdev
);
1787 /* Fire a link status change interrupt to start the watchdog. */
1788 wr32(E1000_ICS
, E1000_ICS_LSC
);
1793 igb_release_hw_control(adapter
);
1794 /* e1000_power_down_phy(adapter); */
1795 igb_free_all_rx_resources(adapter
);
1797 igb_free_all_tx_resources(adapter
);
1805 * igb_close - Disables a network interface
1806 * @netdev: network interface device structure
1808 * Returns 0, this is not allowed to fail
1810 * The close entry point is called when an interface is de-activated
1811 * by the OS. The hardware is still under the driver's control, but
1812 * needs to be disabled. A global MAC reset is issued to stop the
1813 * hardware, and all transmit and receive resources are freed.
1815 static int igb_close(struct net_device
*netdev
)
1817 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1819 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1822 igb_free_irq(adapter
);
1824 igb_free_all_tx_resources(adapter
);
1825 igb_free_all_rx_resources(adapter
);
1827 /* kill manageability vlan ID if supported, but not if a vlan with
1828 * the same ID is registered on the host OS (let 8021q kill it) */
1829 if ((adapter
->hw
.mng_cookie
.status
&
1830 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1832 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1833 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1839 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1840 * @adapter: board private structure
1841 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1843 * Return 0 on success, negative on failure
1845 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1846 struct igb_ring
*tx_ring
)
1848 struct pci_dev
*pdev
= adapter
->pdev
;
1851 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1852 tx_ring
->buffer_info
= vmalloc(size
);
1853 if (!tx_ring
->buffer_info
)
1855 memset(tx_ring
->buffer_info
, 0, size
);
1857 /* round up to nearest 4K */
1858 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1859 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1861 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1867 tx_ring
->adapter
= adapter
;
1868 tx_ring
->next_to_use
= 0;
1869 tx_ring
->next_to_clean
= 0;
1873 vfree(tx_ring
->buffer_info
);
1874 dev_err(&adapter
->pdev
->dev
,
1875 "Unable to allocate memory for the transmit descriptor ring\n");
1880 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1881 * (Descriptors) for all queues
1882 * @adapter: board private structure
1884 * Return 0 on success, negative on failure
1886 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1891 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1892 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1894 dev_err(&adapter
->pdev
->dev
,
1895 "Allocation for Tx Queue %u failed\n", i
);
1896 for (i
--; i
>= 0; i
--)
1897 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1902 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1903 r_idx
= i
% adapter
->num_tx_queues
;
1904 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1910 * igb_configure_tx - Configure transmit Unit after Reset
1911 * @adapter: board private structure
1913 * Configure the Tx unit of the MAC after a reset.
1915 static void igb_configure_tx(struct igb_adapter
*adapter
)
1918 struct e1000_hw
*hw
= &adapter
->hw
;
1923 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1924 struct igb_ring
*ring
= &adapter
->tx_ring
[i
];
1926 wr32(E1000_TDLEN(j
),
1927 ring
->count
* sizeof(union e1000_adv_tx_desc
));
1929 wr32(E1000_TDBAL(j
),
1930 tdba
& 0x00000000ffffffffULL
);
1931 wr32(E1000_TDBAH(j
), tdba
>> 32);
1933 ring
->head
= E1000_TDH(j
);
1934 ring
->tail
= E1000_TDT(j
);
1935 writel(0, hw
->hw_addr
+ ring
->tail
);
1936 writel(0, hw
->hw_addr
+ ring
->head
);
1937 txdctl
= rd32(E1000_TXDCTL(j
));
1938 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1939 wr32(E1000_TXDCTL(j
), txdctl
);
1941 /* Turn off Relaxed Ordering on head write-backs. The
1942 * writebacks MUST be delivered in order or it will
1943 * completely screw up our bookeeping.
1945 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1946 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1947 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1950 /* disable queue 0 to prevent tail bump w/o re-configuration */
1951 if (adapter
->vfs_allocated_count
)
1952 wr32(E1000_TXDCTL(0), 0);
1954 /* Program the Transmit Control Register */
1955 tctl
= rd32(E1000_TCTL
);
1956 tctl
&= ~E1000_TCTL_CT
;
1957 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1958 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1960 igb_config_collision_dist(hw
);
1962 /* Setup Transmit Descriptor Settings for eop descriptor */
1963 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1965 /* Enable transmits */
1966 tctl
|= E1000_TCTL_EN
;
1968 wr32(E1000_TCTL
, tctl
);
1972 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1973 * @adapter: board private structure
1974 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1976 * Returns 0 on success, negative on failure
1978 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1979 struct igb_ring
*rx_ring
)
1981 struct pci_dev
*pdev
= adapter
->pdev
;
1984 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1985 rx_ring
->buffer_info
= vmalloc(size
);
1986 if (!rx_ring
->buffer_info
)
1988 memset(rx_ring
->buffer_info
, 0, size
);
1990 desc_len
= sizeof(union e1000_adv_rx_desc
);
1992 /* Round up to nearest 4K */
1993 rx_ring
->size
= rx_ring
->count
* desc_len
;
1994 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1996 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
2002 rx_ring
->next_to_clean
= 0;
2003 rx_ring
->next_to_use
= 0;
2005 rx_ring
->adapter
= adapter
;
2010 vfree(rx_ring
->buffer_info
);
2011 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
2012 "the receive descriptor ring\n");
2017 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
2018 * (Descriptors) for all queues
2019 * @adapter: board private structure
2021 * Return 0 on success, negative on failure
2023 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
2027 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2028 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2030 dev_err(&adapter
->pdev
->dev
,
2031 "Allocation for Rx Queue %u failed\n", i
);
2032 for (i
--; i
>= 0; i
--)
2033 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2042 * igb_setup_rctl - configure the receive control registers
2043 * @adapter: Board private structure
2045 static void igb_setup_rctl(struct igb_adapter
*adapter
)
2047 struct e1000_hw
*hw
= &adapter
->hw
;
2052 rctl
= rd32(E1000_RCTL
);
2054 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
2055 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
2057 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
2058 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
2061 * enable stripping of CRC. It's unlikely this will break BMC
2062 * redirection as it did with e1000. Newer features require
2063 * that the HW strips the CRC.
2065 rctl
|= E1000_RCTL_SECRC
;
2068 * disable store bad packets and clear size bits.
2070 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
2072 /* enable LPE when to prevent packets larger than max_frame_size */
2073 rctl
|= E1000_RCTL_LPE
;
2075 /* Setup buffer sizes */
2076 switch (adapter
->rx_buffer_len
) {
2077 case IGB_RXBUFFER_256
:
2078 rctl
|= E1000_RCTL_SZ_256
;
2080 case IGB_RXBUFFER_512
:
2081 rctl
|= E1000_RCTL_SZ_512
;
2084 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
2085 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
2089 /* 82575 and greater support packet-split where the protocol
2090 * header is placed in skb->data and the packet data is
2091 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2092 * In the case of a non-split, skb->data is linearly filled,
2093 * followed by the page buffers. Therefore, skb->data is
2094 * sized to hold the largest protocol header.
2096 /* allocations using alloc_page take too long for regular MTU
2097 * so only enable packet split for jumbo frames */
2098 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
2099 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
2100 srrctl
|= adapter
->rx_ps_hdr_size
<<
2101 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
2102 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2104 adapter
->rx_ps_hdr_size
= 0;
2105 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2108 /* Attention!!! For SR-IOV PF driver operations you must enable
2109 * queue drop for all VF and PF queues to prevent head of line blocking
2110 * if an un-trusted VF does not provide descriptors to hardware.
2112 if (adapter
->vfs_allocated_count
) {
2115 /* set all queue drop enable bits */
2116 wr32(E1000_QDE
, ALL_QUEUES
);
2117 srrctl
|= E1000_SRRCTL_DROP_EN
;
2119 /* disable queue 0 to prevent tail write w/o re-config */
2120 wr32(E1000_RXDCTL(0), 0);
2122 vmolr
= rd32(E1000_VMOLR(adapter
->vfs_allocated_count
));
2123 if (rctl
& E1000_RCTL_LPE
)
2124 vmolr
|= E1000_VMOLR_LPE
;
2125 if (adapter
->num_rx_queues
> 1)
2126 vmolr
|= E1000_VMOLR_RSSE
;
2127 wr32(E1000_VMOLR(adapter
->vfs_allocated_count
), vmolr
);
2130 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2131 int j
= adapter
->rx_ring
[i
].reg_idx
;
2132 wr32(E1000_SRRCTL(j
), srrctl
);
2135 wr32(E1000_RCTL
, rctl
);
2139 * igb_rlpml_set - set maximum receive packet size
2140 * @adapter: board private structure
2142 * Configure maximum receivable packet size.
2144 static void igb_rlpml_set(struct igb_adapter
*adapter
)
2146 u32 max_frame_size
= adapter
->max_frame_size
;
2147 struct e1000_hw
*hw
= &adapter
->hw
;
2148 u16 pf_id
= adapter
->vfs_allocated_count
;
2151 max_frame_size
+= VLAN_TAG_SIZE
;
2153 /* if vfs are enabled we set RLPML to the largest possible request
2154 * size and set the VMOLR RLPML to the size we need */
2156 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
2157 max_frame_size
= MAX_STD_JUMBO_FRAME_SIZE
+ VLAN_TAG_SIZE
;
2160 wr32(E1000_RLPML
, max_frame_size
);
2164 * igb_configure_vt_default_pool - Configure VT default pool
2165 * @adapter: board private structure
2167 * Configure the default pool
2169 static void igb_configure_vt_default_pool(struct igb_adapter
*adapter
)
2171 struct e1000_hw
*hw
= &adapter
->hw
;
2172 u16 pf_id
= adapter
->vfs_allocated_count
;
2175 /* not in sr-iov mode - do nothing */
2179 vtctl
= rd32(E1000_VT_CTL
);
2180 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
2181 E1000_VT_CTL_DISABLE_DEF_POOL
);
2182 vtctl
|= pf_id
<< E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
2183 wr32(E1000_VT_CTL
, vtctl
);
2187 * igb_configure_rx - Configure receive Unit after Reset
2188 * @adapter: board private structure
2190 * Configure the Rx unit of the MAC after a reset.
2192 static void igb_configure_rx(struct igb_adapter
*adapter
)
2195 struct e1000_hw
*hw
= &adapter
->hw
;
2200 /* disable receives while setting up the descriptors */
2201 rctl
= rd32(E1000_RCTL
);
2202 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
2206 if (adapter
->itr_setting
> 3)
2207 wr32(E1000_ITR
, adapter
->itr
);
2209 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2210 * the Base and Length of the Rx Descriptor Ring */
2211 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2212 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
2213 int j
= ring
->reg_idx
;
2215 wr32(E1000_RDBAL(j
),
2216 rdba
& 0x00000000ffffffffULL
);
2217 wr32(E1000_RDBAH(j
), rdba
>> 32);
2218 wr32(E1000_RDLEN(j
),
2219 ring
->count
* sizeof(union e1000_adv_rx_desc
));
2221 ring
->head
= E1000_RDH(j
);
2222 ring
->tail
= E1000_RDT(j
);
2223 writel(0, hw
->hw_addr
+ ring
->tail
);
2224 writel(0, hw
->hw_addr
+ ring
->head
);
2226 rxdctl
= rd32(E1000_RXDCTL(j
));
2227 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
2228 rxdctl
&= 0xFFF00000;
2229 rxdctl
|= IGB_RX_PTHRESH
;
2230 rxdctl
|= IGB_RX_HTHRESH
<< 8;
2231 rxdctl
|= IGB_RX_WTHRESH
<< 16;
2232 wr32(E1000_RXDCTL(j
), rxdctl
);
2235 if (adapter
->num_rx_queues
> 1) {
2244 get_random_bytes(&random
[0], 40);
2246 if (hw
->mac
.type
>= e1000_82576
)
2250 for (j
= 0; j
< (32 * 4); j
++) {
2252 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
2255 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
2257 if (adapter
->vfs_allocated_count
)
2258 mrqc
= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
2260 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
2262 /* Fill out hash function seeds */
2263 for (j
= 0; j
< 10; j
++)
2264 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
2266 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
2267 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
2268 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
2269 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
2270 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2271 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2272 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
2273 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
2275 wr32(E1000_MRQC
, mrqc
);
2276 } else if (adapter
->vfs_allocated_count
) {
2277 /* Enable multi-queue for sr-iov */
2278 wr32(E1000_MRQC
, E1000_MRQC_ENABLE_VMDQ
);
2281 /* Enable Receive Checksum Offload for TCP and UDP */
2282 rxcsum
= rd32(E1000_RXCSUM
);
2283 /* Disable raw packet checksumming */
2284 rxcsum
|= E1000_RXCSUM_PCSD
;
2286 if (adapter
->hw
.mac
.type
== e1000_82576
)
2287 /* Enable Receive Checksum Offload for SCTP */
2288 rxcsum
|= E1000_RXCSUM_CRCOFL
;
2290 /* Don't need to set TUOFL or IPOFL, they default to 1 */
2291 wr32(E1000_RXCSUM
, rxcsum
);
2293 /* Set the default pool for the PF's first queue */
2294 igb_configure_vt_default_pool(adapter
);
2296 igb_rlpml_set(adapter
);
2298 /* Enable Receives */
2299 wr32(E1000_RCTL
, rctl
);
2303 * igb_free_tx_resources - Free Tx Resources per Queue
2304 * @tx_ring: Tx descriptor ring for a specific queue
2306 * Free all transmit software resources
2308 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2310 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2312 igb_clean_tx_ring(tx_ring
);
2314 vfree(tx_ring
->buffer_info
);
2315 tx_ring
->buffer_info
= NULL
;
2317 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2319 tx_ring
->desc
= NULL
;
2323 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2324 * @adapter: board private structure
2326 * Free all transmit software resources
2328 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2332 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2333 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2336 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2337 struct igb_buffer
*buffer_info
)
2339 buffer_info
->dma
= 0;
2340 if (buffer_info
->skb
) {
2341 skb_dma_unmap(&adapter
->pdev
->dev
, buffer_info
->skb
,
2343 dev_kfree_skb_any(buffer_info
->skb
);
2344 buffer_info
->skb
= NULL
;
2346 buffer_info
->time_stamp
= 0;
2347 /* buffer_info must be completely set up in the transmit path */
2351 * igb_clean_tx_ring - Free Tx Buffers
2352 * @tx_ring: ring to be cleaned
2354 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2356 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2357 struct igb_buffer
*buffer_info
;
2361 if (!tx_ring
->buffer_info
)
2363 /* Free all the Tx ring sk_buffs */
2365 for (i
= 0; i
< tx_ring
->count
; i
++) {
2366 buffer_info
= &tx_ring
->buffer_info
[i
];
2367 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2370 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2371 memset(tx_ring
->buffer_info
, 0, size
);
2373 /* Zero out the descriptor ring */
2375 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2377 tx_ring
->next_to_use
= 0;
2378 tx_ring
->next_to_clean
= 0;
2380 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2381 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2385 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2386 * @adapter: board private structure
2388 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2392 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2393 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2397 * igb_free_rx_resources - Free Rx Resources
2398 * @rx_ring: ring to clean the resources from
2400 * Free all receive software resources
2402 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2404 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2406 igb_clean_rx_ring(rx_ring
);
2408 vfree(rx_ring
->buffer_info
);
2409 rx_ring
->buffer_info
= NULL
;
2411 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2413 rx_ring
->desc
= NULL
;
2417 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2418 * @adapter: board private structure
2420 * Free all receive software resources
2422 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2426 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2427 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2431 * igb_clean_rx_ring - Free Rx Buffers per Queue
2432 * @rx_ring: ring to free buffers from
2434 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2436 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2437 struct igb_buffer
*buffer_info
;
2438 struct pci_dev
*pdev
= adapter
->pdev
;
2442 if (!rx_ring
->buffer_info
)
2444 /* Free all the Rx ring sk_buffs */
2445 for (i
= 0; i
< rx_ring
->count
; i
++) {
2446 buffer_info
= &rx_ring
->buffer_info
[i
];
2447 if (buffer_info
->dma
) {
2448 if (adapter
->rx_ps_hdr_size
)
2449 pci_unmap_single(pdev
, buffer_info
->dma
,
2450 adapter
->rx_ps_hdr_size
,
2451 PCI_DMA_FROMDEVICE
);
2453 pci_unmap_single(pdev
, buffer_info
->dma
,
2454 adapter
->rx_buffer_len
,
2455 PCI_DMA_FROMDEVICE
);
2456 buffer_info
->dma
= 0;
2459 if (buffer_info
->skb
) {
2460 dev_kfree_skb(buffer_info
->skb
);
2461 buffer_info
->skb
= NULL
;
2463 if (buffer_info
->page
) {
2464 if (buffer_info
->page_dma
)
2465 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2467 PCI_DMA_FROMDEVICE
);
2468 put_page(buffer_info
->page
);
2469 buffer_info
->page
= NULL
;
2470 buffer_info
->page_dma
= 0;
2471 buffer_info
->page_offset
= 0;
2475 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2476 memset(rx_ring
->buffer_info
, 0, size
);
2478 /* Zero out the descriptor ring */
2479 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2481 rx_ring
->next_to_clean
= 0;
2482 rx_ring
->next_to_use
= 0;
2484 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2485 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2489 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2490 * @adapter: board private structure
2492 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2496 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2497 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2501 * igb_set_mac - Change the Ethernet Address of the NIC
2502 * @netdev: network interface device structure
2503 * @p: pointer to an address structure
2505 * Returns 0 on success, negative on failure
2507 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2509 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2510 struct e1000_hw
*hw
= &adapter
->hw
;
2511 struct sockaddr
*addr
= p
;
2513 if (!is_valid_ether_addr(addr
->sa_data
))
2514 return -EADDRNOTAVAIL
;
2516 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2517 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2519 hw
->mac
.ops
.rar_set(hw
, hw
->mac
.addr
, 0);
2521 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
2527 * igb_set_multi - Multicast and Promiscuous mode set
2528 * @netdev: network interface device structure
2530 * The set_multi entry point is called whenever the multicast address
2531 * list or the network interface flags are updated. This routine is
2532 * responsible for configuring the hardware for proper multicast,
2533 * promiscuous mode, and all-multi behavior.
2535 static void igb_set_multi(struct net_device
*netdev
)
2537 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2538 struct e1000_hw
*hw
= &adapter
->hw
;
2539 struct dev_mc_list
*mc_ptr
;
2540 u8
*mta_list
= NULL
;
2544 /* Check for Promiscuous and All Multicast modes */
2546 rctl
= rd32(E1000_RCTL
);
2548 if (netdev
->flags
& IFF_PROMISC
) {
2549 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2550 rctl
&= ~E1000_RCTL_VFE
;
2552 if (netdev
->flags
& IFF_ALLMULTI
) {
2553 rctl
|= E1000_RCTL_MPE
;
2554 rctl
&= ~E1000_RCTL_UPE
;
2556 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2557 rctl
|= E1000_RCTL_VFE
;
2559 wr32(E1000_RCTL
, rctl
);
2561 if (!netdev
->mc_count
) {
2562 /* nothing to program, so clear mc list */
2563 igb_update_mc_addr_list(hw
, NULL
, 0);
2564 igb_restore_vf_multicasts(adapter
);
2568 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2570 dev_err(&adapter
->pdev
->dev
,
2571 "failed to allocate multicast filter list\n");
2575 /* The shared function expects a packed array of only addresses. */
2576 mc_ptr
= netdev
->mc_list
;
2578 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2581 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2582 mc_ptr
= mc_ptr
->next
;
2584 igb_update_mc_addr_list(hw
, mta_list
, i
);
2586 igb_restore_vf_multicasts(adapter
);
2589 /* Need to wait a few seconds after link up to get diagnostic information from
2591 static void igb_update_phy_info(unsigned long data
)
2593 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2594 igb_get_phy_info(&adapter
->hw
);
2598 * igb_has_link - check shared code for link and determine up/down
2599 * @adapter: pointer to driver private info
2601 static bool igb_has_link(struct igb_adapter
*adapter
)
2603 struct e1000_hw
*hw
= &adapter
->hw
;
2604 bool link_active
= false;
2607 /* get_link_status is set on LSC (link status) interrupt or
2608 * rx sequence error interrupt. get_link_status will stay
2609 * false until the e1000_check_for_link establishes link
2610 * for copper adapters ONLY
2612 switch (hw
->phy
.media_type
) {
2613 case e1000_media_type_copper
:
2614 if (hw
->mac
.get_link_status
) {
2615 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2616 link_active
= !hw
->mac
.get_link_status
;
2621 case e1000_media_type_internal_serdes
:
2622 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2623 link_active
= hw
->mac
.serdes_has_link
;
2626 case e1000_media_type_unknown
:
2634 * igb_watchdog - Timer Call-back
2635 * @data: pointer to adapter cast into an unsigned long
2637 static void igb_watchdog(unsigned long data
)
2639 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2640 /* Do the rest outside of interrupt context */
2641 schedule_work(&adapter
->watchdog_task
);
2644 static void igb_watchdog_task(struct work_struct
*work
)
2646 struct igb_adapter
*adapter
= container_of(work
,
2647 struct igb_adapter
, watchdog_task
);
2648 struct e1000_hw
*hw
= &adapter
->hw
;
2649 struct net_device
*netdev
= adapter
->netdev
;
2650 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2655 link
= igb_has_link(adapter
);
2656 if ((netif_carrier_ok(netdev
)) && link
)
2660 if (!netif_carrier_ok(netdev
)) {
2662 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2663 &adapter
->link_speed
,
2664 &adapter
->link_duplex
);
2666 ctrl
= rd32(E1000_CTRL
);
2667 /* Links status message must follow this format */
2668 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2669 "Flow Control: %s\n",
2671 adapter
->link_speed
,
2672 adapter
->link_duplex
== FULL_DUPLEX
?
2673 "Full Duplex" : "Half Duplex",
2674 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2675 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2676 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2677 E1000_CTRL_TFCE
) ? "TX" : "None")));
2679 /* tweak tx_queue_len according to speed/duplex and
2680 * adjust the timeout factor */
2681 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2682 adapter
->tx_timeout_factor
= 1;
2683 switch (adapter
->link_speed
) {
2685 netdev
->tx_queue_len
= 10;
2686 adapter
->tx_timeout_factor
= 14;
2689 netdev
->tx_queue_len
= 100;
2690 /* maybe add some timeout factor ? */
2694 netif_carrier_on(netdev
);
2696 igb_ping_all_vfs(adapter
);
2698 /* link state has changed, schedule phy info update */
2699 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2700 mod_timer(&adapter
->phy_info_timer
,
2701 round_jiffies(jiffies
+ 2 * HZ
));
2704 if (netif_carrier_ok(netdev
)) {
2705 adapter
->link_speed
= 0;
2706 adapter
->link_duplex
= 0;
2707 /* Links status message must follow this format */
2708 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2710 netif_carrier_off(netdev
);
2712 igb_ping_all_vfs(adapter
);
2714 /* link state has changed, schedule phy info update */
2715 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2716 mod_timer(&adapter
->phy_info_timer
,
2717 round_jiffies(jiffies
+ 2 * HZ
));
2722 igb_update_stats(adapter
);
2724 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2725 adapter
->tpt_old
= adapter
->stats
.tpt
;
2726 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2727 adapter
->colc_old
= adapter
->stats
.colc
;
2729 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2730 adapter
->gorc_old
= adapter
->stats
.gorc
;
2731 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2732 adapter
->gotc_old
= adapter
->stats
.gotc
;
2734 igb_update_adaptive(&adapter
->hw
);
2736 if (!netif_carrier_ok(netdev
)) {
2737 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
2738 /* We've lost link, so the controller stops DMA,
2739 * but we've got queued Tx work that's never going
2740 * to get done, so reset controller to flush Tx.
2741 * (Do the reset outside of interrupt context). */
2742 adapter
->tx_timeout_count
++;
2743 schedule_work(&adapter
->reset_task
);
2744 /* return immediately since reset is imminent */
2749 /* Cause software interrupt to ensure rx ring is cleaned */
2750 if (adapter
->msix_entries
) {
2751 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2752 eics
|= adapter
->rx_ring
[i
].eims_value
;
2753 wr32(E1000_EICS
, eics
);
2755 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2758 /* Force detection of hung controller every watchdog period */
2759 tx_ring
->detect_tx_hung
= true;
2761 /* Reset the timer */
2762 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2763 mod_timer(&adapter
->watchdog_timer
,
2764 round_jiffies(jiffies
+ 2 * HZ
));
2767 enum latency_range
{
2771 latency_invalid
= 255
2776 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2778 * Stores a new ITR value based on strictly on packet size. This
2779 * algorithm is less sophisticated than that used in igb_update_itr,
2780 * due to the difficulty of synchronizing statistics across multiple
2781 * receive rings. The divisors and thresholds used by this fuction
2782 * were determined based on theoretical maximum wire speed and testing
2783 * data, in order to minimize response time while increasing bulk
2785 * This functionality is controlled by the InterruptThrottleRate module
2786 * parameter (see igb_param.c)
2787 * NOTE: This function is called only when operating in a multiqueue
2788 * receive environment.
2789 * @rx_ring: pointer to ring
2791 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2793 int new_val
= rx_ring
->itr_val
;
2794 int avg_wire_size
= 0;
2795 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2797 if (!rx_ring
->total_packets
)
2798 goto clear_counts
; /* no packets, so don't do anything */
2800 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2801 * ints/sec - ITR timer value of 120 ticks.
2803 if (adapter
->link_speed
!= SPEED_1000
) {
2807 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2809 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2810 avg_wire_size
+= 24;
2812 /* Don't starve jumbo frames */
2813 avg_wire_size
= min(avg_wire_size
, 3000);
2815 /* Give a little boost to mid-size frames */
2816 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2817 new_val
= avg_wire_size
/ 3;
2819 new_val
= avg_wire_size
/ 2;
2822 if (new_val
!= rx_ring
->itr_val
) {
2823 rx_ring
->itr_val
= new_val
;
2824 rx_ring
->set_itr
= 1;
2827 rx_ring
->total_bytes
= 0;
2828 rx_ring
->total_packets
= 0;
2832 * igb_update_itr - update the dynamic ITR value based on statistics
2833 * Stores a new ITR value based on packets and byte
2834 * counts during the last interrupt. The advantage of per interrupt
2835 * computation is faster updates and more accurate ITR for the current
2836 * traffic pattern. Constants in this function were computed
2837 * based on theoretical maximum wire speed and thresholds were set based
2838 * on testing data as well as attempting to minimize response time
2839 * while increasing bulk throughput.
2840 * this functionality is controlled by the InterruptThrottleRate module
2841 * parameter (see igb_param.c)
2842 * NOTE: These calculations are only valid when operating in a single-
2843 * queue environment.
2844 * @adapter: pointer to adapter
2845 * @itr_setting: current adapter->itr
2846 * @packets: the number of packets during this measurement interval
2847 * @bytes: the number of bytes during this measurement interval
2849 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2850 int packets
, int bytes
)
2852 unsigned int retval
= itr_setting
;
2855 goto update_itr_done
;
2857 switch (itr_setting
) {
2858 case lowest_latency
:
2859 /* handle TSO and jumbo frames */
2860 if (bytes
/packets
> 8000)
2861 retval
= bulk_latency
;
2862 else if ((packets
< 5) && (bytes
> 512))
2863 retval
= low_latency
;
2865 case low_latency
: /* 50 usec aka 20000 ints/s */
2866 if (bytes
> 10000) {
2867 /* this if handles the TSO accounting */
2868 if (bytes
/packets
> 8000) {
2869 retval
= bulk_latency
;
2870 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2871 retval
= bulk_latency
;
2872 } else if ((packets
> 35)) {
2873 retval
= lowest_latency
;
2875 } else if (bytes
/packets
> 2000) {
2876 retval
= bulk_latency
;
2877 } else if (packets
<= 2 && bytes
< 512) {
2878 retval
= lowest_latency
;
2881 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2882 if (bytes
> 25000) {
2884 retval
= low_latency
;
2885 } else if (bytes
< 1500) {
2886 retval
= low_latency
;
2895 static void igb_set_itr(struct igb_adapter
*adapter
)
2898 u32 new_itr
= adapter
->itr
;
2900 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2901 if (adapter
->link_speed
!= SPEED_1000
) {
2907 adapter
->rx_itr
= igb_update_itr(adapter
,
2909 adapter
->rx_ring
->total_packets
,
2910 adapter
->rx_ring
->total_bytes
);
2912 if (adapter
->rx_ring
->buddy
) {
2913 adapter
->tx_itr
= igb_update_itr(adapter
,
2915 adapter
->tx_ring
->total_packets
,
2916 adapter
->tx_ring
->total_bytes
);
2917 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2919 current_itr
= adapter
->rx_itr
;
2922 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2923 if (adapter
->itr_setting
== 3 && current_itr
== lowest_latency
)
2924 current_itr
= low_latency
;
2926 switch (current_itr
) {
2927 /* counts and packets in update_itr are dependent on these numbers */
2928 case lowest_latency
:
2929 new_itr
= 56; /* aka 70,000 ints/sec */
2932 new_itr
= 196; /* aka 20,000 ints/sec */
2935 new_itr
= 980; /* aka 4,000 ints/sec */
2942 adapter
->rx_ring
->total_bytes
= 0;
2943 adapter
->rx_ring
->total_packets
= 0;
2944 if (adapter
->rx_ring
->buddy
) {
2945 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2946 adapter
->rx_ring
->buddy
->total_packets
= 0;
2949 if (new_itr
!= adapter
->itr
) {
2950 /* this attempts to bias the interrupt rate towards Bulk
2951 * by adding intermediate steps when interrupt rate is
2953 new_itr
= new_itr
> adapter
->itr
?
2954 max((new_itr
* adapter
->itr
) /
2955 (new_itr
+ (adapter
->itr
>> 2)), new_itr
) :
2957 /* Don't write the value here; it resets the adapter's
2958 * internal timer, and causes us to delay far longer than
2959 * we should between interrupts. Instead, we write the ITR
2960 * value at the beginning of the next interrupt so the timing
2961 * ends up being correct.
2963 adapter
->itr
= new_itr
;
2964 adapter
->rx_ring
->itr_val
= new_itr
;
2965 adapter
->rx_ring
->set_itr
= 1;
2972 #define IGB_TX_FLAGS_CSUM 0x00000001
2973 #define IGB_TX_FLAGS_VLAN 0x00000002
2974 #define IGB_TX_FLAGS_TSO 0x00000004
2975 #define IGB_TX_FLAGS_IPV4 0x00000008
2976 #define IGB_TX_FLAGS_TSTAMP 0x00000010
2977 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2978 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2980 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2981 struct igb_ring
*tx_ring
,
2982 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2984 struct e1000_adv_tx_context_desc
*context_desc
;
2987 struct igb_buffer
*buffer_info
;
2988 u32 info
= 0, tu_cmd
= 0;
2989 u32 mss_l4len_idx
, l4len
;
2992 if (skb_header_cloned(skb
)) {
2993 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2998 l4len
= tcp_hdrlen(skb
);
3001 if (skb
->protocol
== htons(ETH_P_IP
)) {
3002 struct iphdr
*iph
= ip_hdr(skb
);
3005 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
3009 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
3010 ipv6_hdr(skb
)->payload_len
= 0;
3011 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
3012 &ipv6_hdr(skb
)->daddr
,
3016 i
= tx_ring
->next_to_use
;
3018 buffer_info
= &tx_ring
->buffer_info
[i
];
3019 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
3020 /* VLAN MACLEN IPLEN */
3021 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3022 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
3023 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
3024 *hdr_len
+= skb_network_offset(skb
);
3025 info
|= skb_network_header_len(skb
);
3026 *hdr_len
+= skb_network_header_len(skb
);
3027 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
3029 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3030 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3032 if (skb
->protocol
== htons(ETH_P_IP
))
3033 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3034 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3036 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3039 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
3040 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
3042 /* For 82575, context index must be unique per ring. */
3043 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3044 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
3046 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3047 context_desc
->seqnum_seed
= 0;
3049 buffer_info
->time_stamp
= jiffies
;
3050 buffer_info
->next_to_watch
= i
;
3051 buffer_info
->dma
= 0;
3053 if (i
== tx_ring
->count
)
3056 tx_ring
->next_to_use
= i
;
3061 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
3062 struct igb_ring
*tx_ring
,
3063 struct sk_buff
*skb
, u32 tx_flags
)
3065 struct e1000_adv_tx_context_desc
*context_desc
;
3067 struct igb_buffer
*buffer_info
;
3068 u32 info
= 0, tu_cmd
= 0;
3070 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
3071 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
3072 i
= tx_ring
->next_to_use
;
3073 buffer_info
= &tx_ring
->buffer_info
[i
];
3074 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
3076 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3077 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
3078 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
3079 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3080 info
|= skb_network_header_len(skb
);
3082 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
3084 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3086 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3089 if (skb
->protocol
== cpu_to_be16(ETH_P_8021Q
)) {
3090 const struct vlan_ethhdr
*vhdr
=
3091 (const struct vlan_ethhdr
*)skb
->data
;
3093 protocol
= vhdr
->h_vlan_encapsulated_proto
;
3095 protocol
= skb
->protocol
;
3099 case cpu_to_be16(ETH_P_IP
):
3100 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3101 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3102 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3103 else if (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)
3104 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
3106 case cpu_to_be16(ETH_P_IPV6
):
3107 /* XXX what about other V6 headers?? */
3108 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3109 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3110 else if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_SCTP
)
3111 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
3114 if (unlikely(net_ratelimit()))
3115 dev_warn(&adapter
->pdev
->dev
,
3116 "partial checksum but proto=%x!\n",
3122 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3123 context_desc
->seqnum_seed
= 0;
3124 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3125 context_desc
->mss_l4len_idx
=
3126 cpu_to_le32(tx_ring
->queue_index
<< 4);
3128 context_desc
->mss_l4len_idx
= 0;
3130 buffer_info
->time_stamp
= jiffies
;
3131 buffer_info
->next_to_watch
= i
;
3132 buffer_info
->dma
= 0;
3135 if (i
== tx_ring
->count
)
3137 tx_ring
->next_to_use
= i
;
3144 #define IGB_MAX_TXD_PWR 16
3145 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
3147 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
3148 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
3151 struct igb_buffer
*buffer_info
;
3152 unsigned int len
= skb_headlen(skb
);
3153 unsigned int count
= 0, i
;
3157 i
= tx_ring
->next_to_use
;
3159 if (skb_dma_map(&adapter
->pdev
->dev
, skb
, DMA_TO_DEVICE
)) {
3160 dev_err(&adapter
->pdev
->dev
, "TX DMA map failed\n");
3164 map
= skb_shinfo(skb
)->dma_maps
;
3166 buffer_info
= &tx_ring
->buffer_info
[i
];
3167 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3168 buffer_info
->length
= len
;
3169 /* set time_stamp *before* dma to help avoid a possible race */
3170 buffer_info
->time_stamp
= jiffies
;
3171 buffer_info
->next_to_watch
= i
;
3172 buffer_info
->dma
= skb_shinfo(skb
)->dma_head
;
3174 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
3175 struct skb_frag_struct
*frag
;
3178 if (i
== tx_ring
->count
)
3181 frag
= &skb_shinfo(skb
)->frags
[f
];
3184 buffer_info
= &tx_ring
->buffer_info
[i
];
3185 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3186 buffer_info
->length
= len
;
3187 buffer_info
->time_stamp
= jiffies
;
3188 buffer_info
->next_to_watch
= i
;
3189 buffer_info
->dma
= map
[count
];
3193 tx_ring
->buffer_info
[i
].skb
= skb
;
3194 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
3199 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
3200 struct igb_ring
*tx_ring
,
3201 int tx_flags
, int count
, u32 paylen
,
3204 union e1000_adv_tx_desc
*tx_desc
= NULL
;
3205 struct igb_buffer
*buffer_info
;
3206 u32 olinfo_status
= 0, cmd_type_len
;
3209 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
3210 E1000_ADVTXD_DCMD_DEXT
);
3212 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3213 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
3215 if (tx_flags
& IGB_TX_FLAGS_TSTAMP
)
3216 cmd_type_len
|= E1000_ADVTXD_MAC_TSTAMP
;
3218 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
3219 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
3221 /* insert tcp checksum */
3222 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3224 /* insert ip checksum */
3225 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
3226 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
3228 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
3229 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3232 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
3233 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
3234 IGB_TX_FLAGS_VLAN
)))
3235 olinfo_status
|= tx_ring
->queue_index
<< 4;
3237 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
3239 i
= tx_ring
->next_to_use
;
3241 buffer_info
= &tx_ring
->buffer_info
[i
];
3242 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3243 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
3244 tx_desc
->read
.cmd_type_len
=
3245 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
3246 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3248 if (i
== tx_ring
->count
)
3252 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
3253 /* Force memory writes to complete before letting h/w
3254 * know there are new descriptors to fetch. (Only
3255 * applicable for weak-ordered memory model archs,
3256 * such as IA-64). */
3259 tx_ring
->next_to_use
= i
;
3260 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3261 /* we need this if more than one processor can write to our tail
3262 * at a time, it syncronizes IO on IA64/Altix systems */
3266 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
3267 struct igb_ring
*tx_ring
, int size
)
3269 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3271 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3273 /* Herbert's original patch had:
3274 * smp_mb__after_netif_stop_queue();
3275 * but since that doesn't exist yet, just open code it. */
3278 /* We need to check again in a case another CPU has just
3279 * made room available. */
3280 if (igb_desc_unused(tx_ring
) < size
)
3284 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3285 ++adapter
->restart_queue
;
3289 static int igb_maybe_stop_tx(struct net_device
*netdev
,
3290 struct igb_ring
*tx_ring
, int size
)
3292 if (igb_desc_unused(tx_ring
) >= size
)
3294 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
3297 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
3298 struct net_device
*netdev
,
3299 struct igb_ring
*tx_ring
)
3301 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3303 unsigned int tx_flags
= 0;
3307 union skb_shared_tx
*shtx
;
3309 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
3310 dev_kfree_skb_any(skb
);
3311 return NETDEV_TX_OK
;
3314 if (skb
->len
<= 0) {
3315 dev_kfree_skb_any(skb
);
3316 return NETDEV_TX_OK
;
3319 /* need: 1 descriptor per page,
3320 * + 2 desc gap to keep tail from touching head,
3321 * + 1 desc for skb->data,
3322 * + 1 desc for context descriptor,
3323 * otherwise try next time */
3324 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3325 /* this is a hard error */
3326 return NETDEV_TX_BUSY
;
3330 * TODO: check that there currently is no other packet with
3331 * time stamping in the queue
3333 * When doing time stamping, keep the connection to the socket
3334 * a while longer: it is still needed by skb_hwtstamp_tx(),
3335 * called either in igb_tx_hwtstamp() or by our caller when
3336 * doing software time stamping.
3339 if (unlikely(shtx
->hardware
)) {
3340 shtx
->in_progress
= 1;
3341 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
3344 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3345 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3346 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3349 if (skb
->protocol
== htons(ETH_P_IP
))
3350 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3352 first
= tx_ring
->next_to_use
;
3353 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3357 dev_kfree_skb_any(skb
);
3358 return NETDEV_TX_OK
;
3362 tx_flags
|= IGB_TX_FLAGS_TSO
;
3363 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
) &&
3364 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3365 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3368 * count reflects descriptors mapped, if 0 then mapping error
3369 * has occured and we need to rewind the descriptor queue
3371 count
= igb_tx_map_adv(adapter
, tx_ring
, skb
, first
);
3374 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
, count
,
3376 /* Make sure there is space in the ring for the next send. */
3377 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3379 dev_kfree_skb_any(skb
);
3380 tx_ring
->buffer_info
[first
].time_stamp
= 0;
3381 tx_ring
->next_to_use
= first
;
3384 return NETDEV_TX_OK
;
3387 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3389 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3390 struct igb_ring
*tx_ring
;
3393 r_idx
= skb
->queue_mapping
& (IGB_ABS_MAX_TX_QUEUES
- 1);
3394 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3396 /* This goes back to the question of how to logically map a tx queue
3397 * to a flow. Right now, performance is impacted slightly negatively
3398 * if using multiple tx queues. If the stack breaks away from a
3399 * single qdisc implementation, we can look at this again. */
3400 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3404 * igb_tx_timeout - Respond to a Tx Hang
3405 * @netdev: network interface device structure
3407 static void igb_tx_timeout(struct net_device
*netdev
)
3409 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3410 struct e1000_hw
*hw
= &adapter
->hw
;
3412 /* Do the reset outside of interrupt context */
3413 adapter
->tx_timeout_count
++;
3414 schedule_work(&adapter
->reset_task
);
3416 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3419 static void igb_reset_task(struct work_struct
*work
)
3421 struct igb_adapter
*adapter
;
3422 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3424 igb_reinit_locked(adapter
);
3428 * igb_get_stats - Get System Network Statistics
3429 * @netdev: network interface device structure
3431 * Returns the address of the device statistics structure.
3432 * The statistics are actually updated from the timer callback.
3434 static struct net_device_stats
*igb_get_stats(struct net_device
*netdev
)
3436 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3438 /* only return the current stats */
3439 return &adapter
->net_stats
;
3443 * igb_change_mtu - Change the Maximum Transfer Unit
3444 * @netdev: network interface device structure
3445 * @new_mtu: new value for maximum frame size
3447 * Returns 0 on success, negative on failure
3449 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3451 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3452 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3454 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3455 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3456 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3460 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3461 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3465 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3468 /* igb_down has a dependency on max_frame_size */
3469 adapter
->max_frame_size
= max_frame
;
3470 if (netif_running(netdev
))
3473 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3474 * means we reserve 2 more, this pushes us to allocate from the next
3476 * i.e. RXBUFFER_2048 --> size-4096 slab
3479 if (max_frame
<= IGB_RXBUFFER_256
)
3480 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3481 else if (max_frame
<= IGB_RXBUFFER_512
)
3482 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3483 else if (max_frame
<= IGB_RXBUFFER_1024
)
3484 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3485 else if (max_frame
<= IGB_RXBUFFER_2048
)
3486 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3488 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3489 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3491 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3494 /* if sr-iov is enabled we need to force buffer size to 1K or larger */
3495 if (adapter
->vfs_allocated_count
&&
3496 (adapter
->rx_buffer_len
< IGB_RXBUFFER_1024
))
3497 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3499 /* adjust allocation if LPE protects us, and we aren't using SBP */
3500 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3501 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3502 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3504 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3505 netdev
->mtu
, new_mtu
);
3506 netdev
->mtu
= new_mtu
;
3508 if (netif_running(netdev
))
3513 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3519 * igb_update_stats - Update the board statistics counters
3520 * @adapter: board private structure
3523 void igb_update_stats(struct igb_adapter
*adapter
)
3525 struct e1000_hw
*hw
= &adapter
->hw
;
3526 struct pci_dev
*pdev
= adapter
->pdev
;
3529 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3532 * Prevent stats update while adapter is being reset, or if the pci
3533 * connection is down.
3535 if (adapter
->link_speed
== 0)
3537 if (pci_channel_offline(pdev
))
3540 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3541 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3542 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3543 rd32(E1000_GORCH
); /* clear GORCL */
3544 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3545 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3546 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3548 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3549 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3550 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3551 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3552 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3553 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3554 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3555 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3557 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3558 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3559 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3560 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3561 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3562 adapter
->stats
.dc
+= rd32(E1000_DC
);
3563 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3564 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3565 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3566 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3567 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3568 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3569 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3570 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3571 rd32(E1000_GOTCH
); /* clear GOTCL */
3572 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3573 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3574 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3575 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3576 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3577 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3578 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3580 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3581 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3582 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3583 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3584 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3585 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3587 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3588 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3590 /* used for adaptive IFS */
3592 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3593 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3594 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3595 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3597 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3598 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3599 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3600 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3601 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3603 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3604 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3605 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3606 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3607 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3608 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3609 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3610 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3611 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3613 /* Fill out the OS statistics structure */
3614 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3615 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3619 if (hw
->mac
.type
!= e1000_82575
) {
3621 u64 rqdpc_total
= 0;
3623 /* Read out drops stats per RX queue. Notice RQDPC (Receive
3624 * Queue Drop Packet Count) stats only gets incremented, if
3625 * the DROP_EN but it set (in the SRRCTL register for that
3626 * queue). If DROP_EN bit is NOT set, then the some what
3627 * equivalent count is stored in RNBC (not per queue basis).
3628 * Also note the drop count is due to lack of available
3631 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3632 rqdpc_tmp
= rd32(E1000_RQDPC(i
)) & 0xFFF;
3633 adapter
->rx_ring
[i
].rx_stats
.drops
+= rqdpc_tmp
;
3634 rqdpc_total
+= adapter
->rx_ring
[i
].rx_stats
.drops
;
3636 adapter
->net_stats
.rx_fifo_errors
= rqdpc_total
;
3639 /* Note RNBC (Receive No Buffers Count) is an not an exact
3640 * drop count as the hardware FIFO might save the day. Thats
3641 * one of the reason for saving it in rx_fifo_errors, as its
3642 * potentially not a true drop.
3644 adapter
->net_stats
.rx_fifo_errors
+= adapter
->stats
.rnbc
;
3646 /* RLEC on some newer hardware can be incorrect so build
3647 * our own version based on RUC and ROC */
3648 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3649 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3650 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3651 adapter
->stats
.cexterr
;
3652 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3654 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3655 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3656 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3659 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3660 adapter
->stats
.latecol
;
3661 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3662 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3663 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3665 /* Tx Dropped needs to be maintained elsewhere */
3668 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3669 if ((adapter
->link_speed
== SPEED_1000
) &&
3670 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
3671 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3672 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3676 /* Management Stats */
3677 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3678 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3679 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3682 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3684 struct net_device
*netdev
= data
;
3685 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3686 struct e1000_hw
*hw
= &adapter
->hw
;
3687 u32 icr
= rd32(E1000_ICR
);
3689 /* reading ICR causes bit 31 of EICR to be cleared */
3691 if(icr
& E1000_ICR_DOUTSYNC
) {
3692 /* HW is reporting DMA is out of sync */
3693 adapter
->stats
.doosync
++;
3696 /* Check for a mailbox event */
3697 if (icr
& E1000_ICR_VMMB
)
3698 igb_msg_task(adapter
);
3700 if (icr
& E1000_ICR_LSC
) {
3701 hw
->mac
.get_link_status
= 1;
3702 /* guard against interrupt when we're going down */
3703 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3704 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3707 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_VMMB
);
3708 wr32(E1000_EIMS
, adapter
->eims_other
);
3713 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3715 struct igb_ring
*tx_ring
= data
;
3716 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3717 struct e1000_hw
*hw
= &adapter
->hw
;
3719 #ifdef CONFIG_IGB_DCA
3720 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3721 igb_update_tx_dca(tx_ring
);
3724 tx_ring
->total_bytes
= 0;
3725 tx_ring
->total_packets
= 0;
3727 /* auto mask will automatically reenable the interrupt when we write
3729 if (!igb_clean_tx_irq(tx_ring
))
3730 /* Ring was not completely cleaned, so fire another interrupt */
3731 wr32(E1000_EICS
, tx_ring
->eims_value
);
3733 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3738 static void igb_write_itr(struct igb_ring
*ring
)
3740 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3741 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3742 switch (hw
->mac
.type
) {
3744 wr32(ring
->itr_register
, ring
->itr_val
|
3748 wr32(ring
->itr_register
, ring
->itr_val
|
3749 (ring
->itr_val
<< 16));
3756 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3758 struct igb_ring
*rx_ring
= data
;
3760 /* Write the ITR value calculated at the end of the
3761 * previous interrupt.
3764 igb_write_itr(rx_ring
);
3766 if (napi_schedule_prep(&rx_ring
->napi
))
3767 __napi_schedule(&rx_ring
->napi
);
3769 #ifdef CONFIG_IGB_DCA
3770 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3771 igb_update_rx_dca(rx_ring
);
3776 #ifdef CONFIG_IGB_DCA
3777 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3780 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3781 struct e1000_hw
*hw
= &adapter
->hw
;
3782 int cpu
= get_cpu();
3783 int q
= rx_ring
->reg_idx
;
3785 if (rx_ring
->cpu
!= cpu
) {
3786 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3787 if (hw
->mac
.type
== e1000_82576
) {
3788 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3789 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3790 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3792 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3793 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3795 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3796 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3797 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3798 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3804 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3807 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3808 struct e1000_hw
*hw
= &adapter
->hw
;
3809 int cpu
= get_cpu();
3810 int q
= tx_ring
->reg_idx
;
3812 if (tx_ring
->cpu
!= cpu
) {
3813 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3814 if (hw
->mac
.type
== e1000_82576
) {
3815 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3816 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3817 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3819 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3820 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3822 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3823 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3829 static void igb_setup_dca(struct igb_adapter
*adapter
)
3831 struct e1000_hw
*hw
= &adapter
->hw
;
3834 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3837 /* Always use CB2 mode, difference is masked in the CB driver. */
3838 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3840 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3841 adapter
->tx_ring
[i
].cpu
= -1;
3842 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3844 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3845 adapter
->rx_ring
[i
].cpu
= -1;
3846 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3850 static int __igb_notify_dca(struct device
*dev
, void *data
)
3852 struct net_device
*netdev
= dev_get_drvdata(dev
);
3853 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3854 struct e1000_hw
*hw
= &adapter
->hw
;
3855 unsigned long event
= *(unsigned long *)data
;
3858 case DCA_PROVIDER_ADD
:
3859 /* if already enabled, don't do it again */
3860 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3862 /* Always use CB2 mode, difference is masked
3863 * in the CB driver. */
3864 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3865 if (dca_add_requester(dev
) == 0) {
3866 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3867 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3868 igb_setup_dca(adapter
);
3871 /* Fall Through since DCA is disabled. */
3872 case DCA_PROVIDER_REMOVE
:
3873 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3874 /* without this a class_device is left
3875 * hanging around in the sysfs model */
3876 dca_remove_requester(dev
);
3877 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3878 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3879 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
3887 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3892 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3895 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3897 #endif /* CONFIG_IGB_DCA */
3899 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
3901 struct e1000_hw
*hw
= &adapter
->hw
;
3905 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
3906 ping
= E1000_PF_CONTROL_MSG
;
3907 if (adapter
->vf_data
[i
].clear_to_send
)
3908 ping
|= E1000_VT_MSGTYPE_CTS
;
3909 igb_write_mbx(hw
, &ping
, 1, i
);
3913 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
3914 u32
*msgbuf
, u32 vf
)
3916 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3917 u16
*hash_list
= (u16
*)&msgbuf
[1];
3918 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
3921 /* only up to 30 hash values supported */
3925 /* salt away the number of multi cast addresses assigned
3926 * to this VF for later use to restore when the PF multi cast
3929 vf_data
->num_vf_mc_hashes
= n
;
3931 /* VFs are limited to using the MTA hash table for their multicast
3933 for (i
= 0; i
< n
; i
++)
3934 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];;
3936 /* Flush and reset the mta with the new values */
3937 igb_set_multi(adapter
->netdev
);
3942 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
3944 struct e1000_hw
*hw
= &adapter
->hw
;
3945 struct vf_data_storage
*vf_data
;
3948 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
3949 vf_data
= &adapter
->vf_data
[i
];
3950 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
3951 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
3955 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
3957 struct e1000_hw
*hw
= &adapter
->hw
;
3958 u32 pool_mask
, reg
, vid
;
3961 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3963 /* Find the vlan filter for this id */
3964 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3965 reg
= rd32(E1000_VLVF(i
));
3967 /* remove the vf from the pool */
3970 /* if pool is empty then remove entry from vfta */
3971 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
3972 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
3974 vid
= reg
& E1000_VLVF_VLANID_MASK
;
3975 igb_vfta_set(hw
, vid
, false);
3978 wr32(E1000_VLVF(i
), reg
);
3982 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
3984 struct e1000_hw
*hw
= &adapter
->hw
;
3987 /* It is an error to call this function when VFs are not enabled */
3988 if (!adapter
->vfs_allocated_count
)
3991 /* Find the vlan filter for this id */
3992 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3993 reg
= rd32(E1000_VLVF(i
));
3994 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
3995 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
4000 if (i
== E1000_VLVF_ARRAY_SIZE
) {
4001 /* Did not find a matching VLAN ID entry that was
4002 * enabled. Search for a free filter entry, i.e.
4003 * one without the enable bit set
4005 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
4006 reg
= rd32(E1000_VLVF(i
));
4007 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
4011 if (i
< E1000_VLVF_ARRAY_SIZE
) {
4012 /* Found an enabled/available entry */
4013 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
4015 /* if !enabled we need to set this up in vfta */
4016 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
4017 /* add VID to filter table, if bit already set
4018 * PF must have added it outside of table */
4019 if (igb_vfta_set(hw
, vid
, true))
4020 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
4021 adapter
->vfs_allocated_count
);
4022 reg
|= E1000_VLVF_VLANID_ENABLE
;
4024 reg
&= ~E1000_VLVF_VLANID_MASK
;
4027 wr32(E1000_VLVF(i
), reg
);
4031 if (i
< E1000_VLVF_ARRAY_SIZE
) {
4032 /* remove vf from the pool */
4033 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
4034 /* if pool is empty then remove entry from vfta */
4035 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
4037 igb_vfta_set(hw
, vid
, false);
4039 wr32(E1000_VLVF(i
), reg
);
4046 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
4048 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
4049 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
4051 return igb_vlvf_set(adapter
, vid
, add
, vf
);
4054 static inline void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
4056 struct e1000_hw
*hw
= &adapter
->hw
;
4058 /* disable mailbox functionality for vf */
4059 adapter
->vf_data
[vf
].clear_to_send
= false;
4061 /* reset offloads to defaults */
4062 igb_set_vmolr(hw
, vf
);
4064 /* reset vlans for device */
4065 igb_clear_vf_vfta(adapter
, vf
);
4067 /* reset multicast table array for vf */
4068 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
4070 /* Flush and reset the mta with the new values */
4071 igb_set_multi(adapter
->netdev
);
4074 static inline void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
4076 struct e1000_hw
*hw
= &adapter
->hw
;
4077 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
4079 u8
*addr
= (u8
*)(&msgbuf
[1]);
4081 /* process all the same items cleared in a function level reset */
4082 igb_vf_reset_event(adapter
, vf
);
4084 /* set vf mac address */
4085 igb_rar_set(hw
, vf_mac
, vf
+ 1);
4086 igb_set_rah_pool(hw
, vf
, vf
+ 1);
4088 /* enable transmit and receive for vf */
4089 reg
= rd32(E1000_VFTE
);
4090 wr32(E1000_VFTE
, reg
| (1 << vf
));
4091 reg
= rd32(E1000_VFRE
);
4092 wr32(E1000_VFRE
, reg
| (1 << vf
));
4094 /* enable mailbox functionality for vf */
4095 adapter
->vf_data
[vf
].clear_to_send
= true;
4097 /* reply to reset with ack and vf mac address */
4098 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
4099 memcpy(addr
, vf_mac
, 6);
4100 igb_write_mbx(hw
, msgbuf
, 3, vf
);
4103 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
4105 unsigned char *addr
= (char *)&msg
[1];
4108 if (is_valid_ether_addr(addr
))
4109 err
= igb_set_vf_mac(adapter
, vf
, addr
);
4115 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4117 struct e1000_hw
*hw
= &adapter
->hw
;
4118 u32 msg
= E1000_VT_MSGTYPE_NACK
;
4120 /* if device isn't clear to send it shouldn't be reading either */
4121 if (!adapter
->vf_data
[vf
].clear_to_send
)
4122 igb_write_mbx(hw
, &msg
, 1, vf
);
4126 static void igb_msg_task(struct igb_adapter
*adapter
)
4128 struct e1000_hw
*hw
= &adapter
->hw
;
4131 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
4132 /* process any reset requests */
4133 if (!igb_check_for_rst(hw
, vf
)) {
4134 adapter
->vf_data
[vf
].clear_to_send
= false;
4135 igb_vf_reset_event(adapter
, vf
);
4138 /* process any messages pending */
4139 if (!igb_check_for_msg(hw
, vf
))
4140 igb_rcv_msg_from_vf(adapter
, vf
);
4142 /* process any acks */
4143 if (!igb_check_for_ack(hw
, vf
))
4144 igb_rcv_ack_from_vf(adapter
, vf
);
4149 static int igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4151 u32 mbx_size
= E1000_VFMAILBOX_SIZE
;
4152 u32 msgbuf
[mbx_size
];
4153 struct e1000_hw
*hw
= &adapter
->hw
;
4156 retval
= igb_read_mbx(hw
, msgbuf
, mbx_size
, vf
);
4159 dev_err(&adapter
->pdev
->dev
,
4160 "Error receiving message from VF\n");
4162 /* this is a message we already processed, do nothing */
4163 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
4167 * until the vf completes a reset it should not be
4168 * allowed to start any configuration.
4171 if (msgbuf
[0] == E1000_VF_RESET
) {
4172 igb_vf_reset_msg(adapter
, vf
);
4177 if (!adapter
->vf_data
[vf
].clear_to_send
) {
4178 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4179 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4183 switch ((msgbuf
[0] & 0xFFFF)) {
4184 case E1000_VF_SET_MAC_ADDR
:
4185 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
4187 case E1000_VF_SET_MULTICAST
:
4188 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
4190 case E1000_VF_SET_LPE
:
4191 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
4193 case E1000_VF_SET_VLAN
:
4194 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
4197 dev_err(&adapter
->pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
4202 /* notify the VF of the results of what it sent us */
4204 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4206 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
4208 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
4210 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4216 * igb_intr_msi - Interrupt Handler
4217 * @irq: interrupt number
4218 * @data: pointer to a network interface device structure
4220 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
4222 struct net_device
*netdev
= data
;
4223 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4224 struct e1000_hw
*hw
= &adapter
->hw
;
4225 /* read ICR disables interrupts using IAM */
4226 u32 icr
= rd32(E1000_ICR
);
4228 igb_write_itr(adapter
->rx_ring
);
4230 if(icr
& E1000_ICR_DOUTSYNC
) {
4231 /* HW is reporting DMA is out of sync */
4232 adapter
->stats
.doosync
++;
4235 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4236 hw
->mac
.get_link_status
= 1;
4237 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4238 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4241 napi_schedule(&adapter
->rx_ring
[0].napi
);
4247 * igb_intr - Legacy Interrupt Handler
4248 * @irq: interrupt number
4249 * @data: pointer to a network interface device structure
4251 static irqreturn_t
igb_intr(int irq
, void *data
)
4253 struct net_device
*netdev
= data
;
4254 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4255 struct e1000_hw
*hw
= &adapter
->hw
;
4256 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
4257 * need for the IMC write */
4258 u32 icr
= rd32(E1000_ICR
);
4260 return IRQ_NONE
; /* Not our interrupt */
4262 igb_write_itr(adapter
->rx_ring
);
4264 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
4265 * not set, then the adapter didn't send an interrupt */
4266 if (!(icr
& E1000_ICR_INT_ASSERTED
))
4269 if(icr
& E1000_ICR_DOUTSYNC
) {
4270 /* HW is reporting DMA is out of sync */
4271 adapter
->stats
.doosync
++;
4274 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4275 hw
->mac
.get_link_status
= 1;
4276 /* guard against interrupt when we're going down */
4277 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4278 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4281 napi_schedule(&adapter
->rx_ring
[0].napi
);
4286 static inline void igb_rx_irq_enable(struct igb_ring
*rx_ring
)
4288 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4289 struct e1000_hw
*hw
= &adapter
->hw
;
4291 if (adapter
->itr_setting
& 3) {
4292 if (adapter
->num_rx_queues
== 1)
4293 igb_set_itr(adapter
);
4295 igb_update_ring_itr(rx_ring
);
4298 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4299 if (adapter
->msix_entries
)
4300 wr32(E1000_EIMS
, rx_ring
->eims_value
);
4302 igb_irq_enable(adapter
);
4307 * igb_poll - NAPI Rx polling callback
4308 * @napi: napi polling structure
4309 * @budget: count of how many packets we should handle
4311 static int igb_poll(struct napi_struct
*napi
, int budget
)
4313 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
4316 #ifdef CONFIG_IGB_DCA
4317 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4318 igb_update_rx_dca(rx_ring
);
4320 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
4322 if (rx_ring
->buddy
) {
4323 #ifdef CONFIG_IGB_DCA
4324 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4325 igb_update_tx_dca(rx_ring
->buddy
);
4327 if (!igb_clean_tx_irq(rx_ring
->buddy
))
4331 /* If not enough Rx work done, exit the polling mode */
4332 if (work_done
< budget
) {
4333 napi_complete(napi
);
4334 igb_rx_irq_enable(rx_ring
);
4341 * igb_hwtstamp - utility function which checks for TX time stamp
4342 * @adapter: board private structure
4343 * @skb: packet that was just sent
4345 * If we were asked to do hardware stamping and such a time stamp is
4346 * available, then it must have been for this skb here because we only
4347 * allow only one such packet into the queue.
4349 static void igb_tx_hwtstamp(struct igb_adapter
*adapter
, struct sk_buff
*skb
)
4351 union skb_shared_tx
*shtx
= skb_tx(skb
);
4352 struct e1000_hw
*hw
= &adapter
->hw
;
4354 if (unlikely(shtx
->hardware
)) {
4355 u32 valid
= rd32(E1000_TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
;
4357 u64 regval
= rd32(E1000_TXSTMPL
);
4359 struct skb_shared_hwtstamps shhwtstamps
;
4361 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
4362 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
4363 ns
= timecounter_cyc2time(&adapter
->clock
,
4365 timecompare_update(&adapter
->compare
, ns
);
4366 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
4367 shhwtstamps
.syststamp
=
4368 timecompare_transform(&adapter
->compare
, ns
);
4369 skb_tstamp_tx(skb
, &shhwtstamps
);
4375 * igb_clean_tx_irq - Reclaim resources after transmit completes
4376 * @adapter: board private structure
4377 * returns true if ring is completely cleaned
4379 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
4381 struct igb_adapter
*adapter
= tx_ring
->adapter
;
4382 struct net_device
*netdev
= adapter
->netdev
;
4383 struct e1000_hw
*hw
= &adapter
->hw
;
4384 struct igb_buffer
*buffer_info
;
4385 struct sk_buff
*skb
;
4386 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
4387 unsigned int total_bytes
= 0, total_packets
= 0;
4388 unsigned int i
, eop
, count
= 0;
4389 bool cleaned
= false;
4391 i
= tx_ring
->next_to_clean
;
4392 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4393 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4395 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
4396 (count
< tx_ring
->count
)) {
4397 for (cleaned
= false; !cleaned
; count
++) {
4398 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
4399 buffer_info
= &tx_ring
->buffer_info
[i
];
4400 cleaned
= (i
== eop
);
4401 skb
= buffer_info
->skb
;
4404 unsigned int segs
, bytecount
;
4405 /* gso_segs is currently only valid for tcp */
4406 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
4407 /* multiply data chunks by size of headers */
4408 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
4410 total_packets
+= segs
;
4411 total_bytes
+= bytecount
;
4413 igb_tx_hwtstamp(adapter
, skb
);
4416 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
4417 tx_desc
->wb
.status
= 0;
4420 if (i
== tx_ring
->count
)
4423 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4424 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4427 tx_ring
->next_to_clean
= i
;
4429 if (unlikely(count
&&
4430 netif_carrier_ok(netdev
) &&
4431 igb_desc_unused(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
4432 /* Make sure that anybody stopping the queue after this
4433 * sees the new next_to_clean.
4436 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
4437 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
4438 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4439 ++adapter
->restart_queue
;
4443 if (tx_ring
->detect_tx_hung
) {
4444 /* Detect a transmit hang in hardware, this serializes the
4445 * check with the clearing of time_stamp and movement of i */
4446 tx_ring
->detect_tx_hung
= false;
4447 if (tx_ring
->buffer_info
[i
].time_stamp
&&
4448 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
4449 (adapter
->tx_timeout_factor
* HZ
))
4450 && !(rd32(E1000_STATUS
) &
4451 E1000_STATUS_TXOFF
)) {
4453 /* detected Tx unit hang */
4454 dev_err(&adapter
->pdev
->dev
,
4455 "Detected Tx Unit Hang\n"
4459 " next_to_use <%x>\n"
4460 " next_to_clean <%x>\n"
4461 "buffer_info[next_to_clean]\n"
4462 " time_stamp <%lx>\n"
4463 " next_to_watch <%x>\n"
4465 " desc.status <%x>\n",
4466 tx_ring
->queue_index
,
4467 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
4468 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
4469 tx_ring
->next_to_use
,
4470 tx_ring
->next_to_clean
,
4471 tx_ring
->buffer_info
[i
].time_stamp
,
4474 eop_desc
->wb
.status
);
4475 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4478 tx_ring
->total_bytes
+= total_bytes
;
4479 tx_ring
->total_packets
+= total_packets
;
4480 tx_ring
->tx_stats
.bytes
+= total_bytes
;
4481 tx_ring
->tx_stats
.packets
+= total_packets
;
4482 adapter
->net_stats
.tx_bytes
+= total_bytes
;
4483 adapter
->net_stats
.tx_packets
+= total_packets
;
4484 return (count
< tx_ring
->count
);
4488 * igb_receive_skb - helper function to handle rx indications
4489 * @ring: pointer to receive ring receving this packet
4490 * @status: descriptor status field as written by hardware
4491 * @rx_desc: receive descriptor containing vlan and type information.
4492 * @skb: pointer to sk_buff to be indicated to stack
4494 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
4495 union e1000_adv_rx_desc
* rx_desc
,
4496 struct sk_buff
*skb
)
4498 struct igb_adapter
* adapter
= ring
->adapter
;
4499 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
4501 skb_record_rx_queue(skb
, ring
->queue_index
);
4503 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
4504 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
4507 napi_gro_receive(&ring
->napi
, skb
);
4510 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
4511 u32 status_err
, struct sk_buff
*skb
)
4513 skb
->ip_summed
= CHECKSUM_NONE
;
4515 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
4516 if ((status_err
& E1000_RXD_STAT_IXSM
) ||
4517 (adapter
->flags
& IGB_FLAG_RX_CSUM_DISABLED
))
4519 /* TCP/UDP checksum error bit is set */
4521 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
4523 * work around errata with sctp packets where the TCPE aka
4524 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
4525 * packets, (aka let the stack check the crc32c)
4527 if (!((adapter
->hw
.mac
.type
== e1000_82576
) &&
4529 adapter
->hw_csum_err
++;
4530 /* let the stack verify checksum errors */
4533 /* It must be a TCP or UDP packet with a valid checksum */
4534 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
4535 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
4537 dev_dbg(&adapter
->pdev
->dev
, "cksum success: bits %08X\n", status_err
);
4538 adapter
->hw_csum_good
++;
4541 static inline u16
igb_get_hlen(struct igb_adapter
*adapter
,
4542 union e1000_adv_rx_desc
*rx_desc
)
4544 /* HW will not DMA in data larger than the given buffer, even if it
4545 * parses the (NFS, of course) header to be larger. In that case, it
4546 * fills the header buffer and spills the rest into the page.
4548 u16 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
4549 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
4550 if (hlen
> adapter
->rx_ps_hdr_size
)
4551 hlen
= adapter
->rx_ps_hdr_size
;
4555 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
4556 int *work_done
, int budget
)
4558 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4559 struct net_device
*netdev
= adapter
->netdev
;
4560 struct e1000_hw
*hw
= &adapter
->hw
;
4561 struct pci_dev
*pdev
= adapter
->pdev
;
4562 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
4563 struct igb_buffer
*buffer_info
, *next_buffer
;
4564 struct sk_buff
*skb
;
4565 bool cleaned
= false;
4566 int cleaned_count
= 0;
4567 unsigned int total_bytes
= 0, total_packets
= 0;
4572 i
= rx_ring
->next_to_clean
;
4573 buffer_info
= &rx_ring
->buffer_info
[i
];
4574 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4575 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4577 while (staterr
& E1000_RXD_STAT_DD
) {
4578 if (*work_done
>= budget
)
4582 skb
= buffer_info
->skb
;
4583 prefetch(skb
->data
- NET_IP_ALIGN
);
4584 buffer_info
->skb
= NULL
;
4587 if (i
== rx_ring
->count
)
4589 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4591 next_buffer
= &rx_ring
->buffer_info
[i
];
4593 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
4597 /* this is the fast path for the non-packet split case */
4598 if (!adapter
->rx_ps_hdr_size
) {
4599 pci_unmap_single(pdev
, buffer_info
->dma
,
4600 adapter
->rx_buffer_len
,
4601 PCI_DMA_FROMDEVICE
);
4602 buffer_info
->dma
= 0;
4603 skb_put(skb
, length
);
4607 if (buffer_info
->dma
) {
4608 u16 hlen
= igb_get_hlen(adapter
, rx_desc
);
4609 pci_unmap_single(pdev
, buffer_info
->dma
,
4610 adapter
->rx_ps_hdr_size
,
4611 PCI_DMA_FROMDEVICE
);
4612 buffer_info
->dma
= 0;
4617 pci_unmap_page(pdev
, buffer_info
->page_dma
,
4618 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
4619 buffer_info
->page_dma
= 0;
4621 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
4623 buffer_info
->page_offset
,
4626 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
4627 (page_count(buffer_info
->page
) != 1))
4628 buffer_info
->page
= NULL
;
4630 get_page(buffer_info
->page
);
4633 skb
->data_len
+= length
;
4635 skb
->truesize
+= length
;
4638 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
4639 buffer_info
->skb
= next_buffer
->skb
;
4640 buffer_info
->dma
= next_buffer
->dma
;
4641 next_buffer
->skb
= skb
;
4642 next_buffer
->dma
= 0;
4647 * If this bit is set, then the RX registers contain
4648 * the time stamp. No other packet will be time
4649 * stamped until we read these registers, so read the
4650 * registers to make them available again. Because
4651 * only one packet can be time stamped at a time, we
4652 * know that the register values must belong to this
4653 * one here and therefore we don't need to compare
4654 * any of the additional attributes stored for it.
4656 * If nothing went wrong, then it should have a
4657 * skb_shared_tx that we can turn into a
4658 * skb_shared_hwtstamps.
4660 * TODO: can time stamping be triggered (thus locking
4661 * the registers) without the packet reaching this point
4662 * here? In that case RX time stamping would get stuck.
4664 * TODO: in "time stamp all packets" mode this bit is
4665 * not set. Need a global flag for this mode and then
4666 * always read the registers. Cannot be done without
4669 if (unlikely(staterr
& E1000_RXD_STAT_TS
)) {
4672 struct skb_shared_hwtstamps
*shhwtstamps
=
4675 WARN(!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
),
4676 "igb: no RX time stamp available for time stamped packet");
4677 regval
= rd32(E1000_RXSTMPL
);
4678 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
4679 ns
= timecounter_cyc2time(&adapter
->clock
, regval
);
4680 timecompare_update(&adapter
->compare
, ns
);
4681 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
4682 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
4683 shhwtstamps
->syststamp
=
4684 timecompare_transform(&adapter
->compare
, ns
);
4687 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
4688 dev_kfree_skb_irq(skb
);
4692 total_bytes
+= skb
->len
;
4695 igb_rx_checksum_adv(adapter
, staterr
, skb
);
4697 skb
->protocol
= eth_type_trans(skb
, netdev
);
4699 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
4702 rx_desc
->wb
.upper
.status_error
= 0;
4704 /* return some buffers to hardware, one at a time is too slow */
4705 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
4706 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4710 /* use prefetched values */
4712 buffer_info
= next_buffer
;
4713 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4716 rx_ring
->next_to_clean
= i
;
4717 cleaned_count
= igb_desc_unused(rx_ring
);
4720 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4722 rx_ring
->total_packets
+= total_packets
;
4723 rx_ring
->total_bytes
+= total_bytes
;
4724 rx_ring
->rx_stats
.packets
+= total_packets
;
4725 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4726 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4727 adapter
->net_stats
.rx_packets
+= total_packets
;
4732 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4733 * @adapter: address of board private structure
4735 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4738 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4739 struct net_device
*netdev
= adapter
->netdev
;
4740 struct pci_dev
*pdev
= adapter
->pdev
;
4741 union e1000_adv_rx_desc
*rx_desc
;
4742 struct igb_buffer
*buffer_info
;
4743 struct sk_buff
*skb
;
4747 i
= rx_ring
->next_to_use
;
4748 buffer_info
= &rx_ring
->buffer_info
[i
];
4750 if (adapter
->rx_ps_hdr_size
)
4751 bufsz
= adapter
->rx_ps_hdr_size
;
4753 bufsz
= adapter
->rx_buffer_len
;
4755 while (cleaned_count
--) {
4756 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4758 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4759 if (!buffer_info
->page
) {
4760 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4761 if (!buffer_info
->page
) {
4762 adapter
->alloc_rx_buff_failed
++;
4765 buffer_info
->page_offset
= 0;
4767 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4769 buffer_info
->page_dma
=
4770 pci_map_page(pdev
, buffer_info
->page
,
4771 buffer_info
->page_offset
,
4773 PCI_DMA_FROMDEVICE
);
4776 if (!buffer_info
->skb
) {
4777 skb
= netdev_alloc_skb(netdev
, bufsz
+ NET_IP_ALIGN
);
4779 adapter
->alloc_rx_buff_failed
++;
4783 /* Make buffer alignment 2 beyond a 16 byte boundary
4784 * this will result in a 16 byte aligned IP header after
4785 * the 14 byte MAC header is removed
4787 skb_reserve(skb
, NET_IP_ALIGN
);
4789 buffer_info
->skb
= skb
;
4790 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4792 PCI_DMA_FROMDEVICE
);
4794 /* Refresh the desc even if buffer_addrs didn't change because
4795 * each write-back erases this info. */
4796 if (adapter
->rx_ps_hdr_size
) {
4797 rx_desc
->read
.pkt_addr
=
4798 cpu_to_le64(buffer_info
->page_dma
);
4799 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4801 rx_desc
->read
.pkt_addr
=
4802 cpu_to_le64(buffer_info
->dma
);
4803 rx_desc
->read
.hdr_addr
= 0;
4807 if (i
== rx_ring
->count
)
4809 buffer_info
= &rx_ring
->buffer_info
[i
];
4813 if (rx_ring
->next_to_use
!= i
) {
4814 rx_ring
->next_to_use
= i
;
4816 i
= (rx_ring
->count
- 1);
4820 /* Force memory writes to complete before letting h/w
4821 * know there are new descriptors to fetch. (Only
4822 * applicable for weak-ordered memory model archs,
4823 * such as IA-64). */
4825 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4835 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4837 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4838 struct mii_ioctl_data
*data
= if_mii(ifr
);
4840 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4845 data
->phy_id
= adapter
->hw
.phy
.addr
;
4848 if (!capable(CAP_NET_ADMIN
))
4850 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4862 * igb_hwtstamp_ioctl - control hardware time stamping
4867 * Outgoing time stamping can be enabled and disabled. Play nice and
4868 * disable it when requested, although it shouldn't case any overhead
4869 * when no packet needs it. At most one packet in the queue may be
4870 * marked for time stamping, otherwise it would be impossible to tell
4871 * for sure to which packet the hardware time stamp belongs.
4873 * Incoming time stamping has to be configured via the hardware
4874 * filters. Not all combinations are supported, in particular event
4875 * type has to be specified. Matching the kind of event packet is
4876 * not supported, with the exception of "all V2 events regardless of
4880 static int igb_hwtstamp_ioctl(struct net_device
*netdev
,
4881 struct ifreq
*ifr
, int cmd
)
4883 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4884 struct e1000_hw
*hw
= &adapter
->hw
;
4885 struct hwtstamp_config config
;
4886 u32 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4887 u32 tsync_rx_ctl_bit
= E1000_TSYNCRXCTL_ENABLED
;
4888 u32 tsync_rx_ctl_type
= 0;
4889 u32 tsync_rx_cfg
= 0;
4892 short port
= 319; /* PTP */
4895 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
4898 /* reserved for future extensions */
4902 switch (config
.tx_type
) {
4903 case HWTSTAMP_TX_OFF
:
4904 tsync_tx_ctl_bit
= 0;
4906 case HWTSTAMP_TX_ON
:
4907 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4913 switch (config
.rx_filter
) {
4914 case HWTSTAMP_FILTER_NONE
:
4915 tsync_rx_ctl_bit
= 0;
4917 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
4918 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
4919 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
4920 case HWTSTAMP_FILTER_ALL
:
4922 * register TSYNCRXCFG must be set, therefore it is not
4923 * possible to time stamp both Sync and Delay_Req messages
4924 * => fall back to time stamping all packets
4926 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_ALL
;
4927 config
.rx_filter
= HWTSTAMP_FILTER_ALL
;
4929 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
4930 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4931 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
4934 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
4935 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4936 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
4939 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
4940 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
4941 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4942 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
;
4945 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4947 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
4948 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
4949 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4950 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
;
4953 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4955 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
4956 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
4957 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
4958 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
4959 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
4966 /* enable/disable TX */
4967 regval
= rd32(E1000_TSYNCTXCTL
);
4968 regval
= (regval
& ~E1000_TSYNCTXCTL_ENABLED
) | tsync_tx_ctl_bit
;
4969 wr32(E1000_TSYNCTXCTL
, regval
);
4971 /* enable/disable RX, define which PTP packets are time stamped */
4972 regval
= rd32(E1000_TSYNCRXCTL
);
4973 regval
= (regval
& ~E1000_TSYNCRXCTL_ENABLED
) | tsync_rx_ctl_bit
;
4974 regval
= (regval
& ~0xE) | tsync_rx_ctl_type
;
4975 wr32(E1000_TSYNCRXCTL
, regval
);
4976 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
4979 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
4980 * (Ethertype to filter on)
4981 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
4982 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
4984 wr32(E1000_ETQF0
, is_l2
? 0x440088f7 : 0);
4986 /* L4 Queue Filter[0]: only filter by source and destination port */
4987 wr32(E1000_SPQF0
, htons(port
));
4988 wr32(E1000_IMIREXT(0), is_l4
?
4989 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
4990 wr32(E1000_IMIR(0), is_l4
?
4992 | (0<<16) /* immediate interrupt disabled */
4993 | 0 /* (1<<17) bit cleared: do not bypass
4994 destination port check */)
4996 wr32(E1000_FTQF0
, is_l4
?
4998 | (1<<15) /* VF not compared */
4999 | (1<<27) /* Enable Timestamping */
5000 | (7<<28) /* only source port filter enabled,
5001 source/target address and protocol
5003 : ((1<<15) | (15<<28) /* all mask bits set = filter not
5008 adapter
->hwtstamp_config
= config
;
5010 /* clear TX/RX time stamp registers, just to be sure */
5011 regval
= rd32(E1000_TXSTMPH
);
5012 regval
= rd32(E1000_RXSTMPH
);
5014 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
5024 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
5030 return igb_mii_ioctl(netdev
, ifr
, cmd
);
5032 return igb_hwtstamp_ioctl(netdev
, ifr
, cmd
);
5038 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
5040 struct igb_adapter
*adapter
= hw
->back
;
5043 cap_offset
= pci_find_capability(adapter
->pdev
, PCI_CAP_ID_EXP
);
5045 return -E1000_ERR_CONFIG
;
5047 pci_read_config_word(adapter
->pdev
, cap_offset
+ reg
, value
);
5052 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
5054 struct igb_adapter
*adapter
= hw
->back
;
5057 cap_offset
= pci_find_capability(adapter
->pdev
, PCI_CAP_ID_EXP
);
5059 return -E1000_ERR_CONFIG
;
5061 pci_write_config_word(adapter
->pdev
, cap_offset
+ reg
, *value
);
5066 static void igb_vlan_rx_register(struct net_device
*netdev
,
5067 struct vlan_group
*grp
)
5069 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5070 struct e1000_hw
*hw
= &adapter
->hw
;
5073 igb_irq_disable(adapter
);
5074 adapter
->vlgrp
= grp
;
5077 /* enable VLAN tag insert/strip */
5078 ctrl
= rd32(E1000_CTRL
);
5079 ctrl
|= E1000_CTRL_VME
;
5080 wr32(E1000_CTRL
, ctrl
);
5082 /* enable VLAN receive filtering */
5083 rctl
= rd32(E1000_RCTL
);
5084 rctl
&= ~E1000_RCTL_CFIEN
;
5085 wr32(E1000_RCTL
, rctl
);
5086 igb_update_mng_vlan(adapter
);
5088 /* disable VLAN tag insert/strip */
5089 ctrl
= rd32(E1000_CTRL
);
5090 ctrl
&= ~E1000_CTRL_VME
;
5091 wr32(E1000_CTRL
, ctrl
);
5093 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
5094 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
5095 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
5099 igb_rlpml_set(adapter
);
5101 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5102 igb_irq_enable(adapter
);
5105 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
5107 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5108 struct e1000_hw
*hw
= &adapter
->hw
;
5109 int pf_id
= adapter
->vfs_allocated_count
;
5111 if ((hw
->mng_cookie
.status
&
5112 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
5113 (vid
== adapter
->mng_vlan_id
))
5116 /* add vid to vlvf if sr-iov is enabled,
5117 * if that fails add directly to filter table */
5118 if (igb_vlvf_set(adapter
, vid
, true, pf_id
))
5119 igb_vfta_set(hw
, vid
, true);
5123 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
5125 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5126 struct e1000_hw
*hw
= &adapter
->hw
;
5127 int pf_id
= adapter
->vfs_allocated_count
;
5129 igb_irq_disable(adapter
);
5130 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
5132 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5133 igb_irq_enable(adapter
);
5135 if ((adapter
->hw
.mng_cookie
.status
&
5136 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
5137 (vid
== adapter
->mng_vlan_id
)) {
5138 /* release control to f/w */
5139 igb_release_hw_control(adapter
);
5143 /* remove vid from vlvf if sr-iov is enabled,
5144 * if not in vlvf remove from vfta */
5145 if (igb_vlvf_set(adapter
, vid
, false, pf_id
))
5146 igb_vfta_set(hw
, vid
, false);
5149 static void igb_restore_vlan(struct igb_adapter
*adapter
)
5151 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
5153 if (adapter
->vlgrp
) {
5155 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
5156 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
5158 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
5163 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
5165 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
5170 case SPEED_10
+ DUPLEX_HALF
:
5171 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
5173 case SPEED_10
+ DUPLEX_FULL
:
5174 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
5176 case SPEED_100
+ DUPLEX_HALF
:
5177 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
5179 case SPEED_100
+ DUPLEX_FULL
:
5180 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
5182 case SPEED_1000
+ DUPLEX_FULL
:
5184 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
5186 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
5188 dev_err(&adapter
->pdev
->dev
,
5189 "Unsupported Speed/Duplex configuration\n");
5195 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5197 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5198 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5199 struct e1000_hw
*hw
= &adapter
->hw
;
5200 u32 ctrl
, rctl
, status
;
5201 u32 wufc
= adapter
->wol
;
5206 netif_device_detach(netdev
);
5208 if (netif_running(netdev
))
5211 igb_reset_interrupt_capability(adapter
);
5213 igb_free_queues(adapter
);
5216 retval
= pci_save_state(pdev
);
5221 status
= rd32(E1000_STATUS
);
5222 if (status
& E1000_STATUS_LU
)
5223 wufc
&= ~E1000_WUFC_LNKC
;
5226 igb_setup_rctl(adapter
);
5227 igb_set_multi(netdev
);
5229 /* turn on all-multi mode if wake on multicast is enabled */
5230 if (wufc
& E1000_WUFC_MC
) {
5231 rctl
= rd32(E1000_RCTL
);
5232 rctl
|= E1000_RCTL_MPE
;
5233 wr32(E1000_RCTL
, rctl
);
5236 ctrl
= rd32(E1000_CTRL
);
5237 /* advertise wake from D3Cold */
5238 #define E1000_CTRL_ADVD3WUC 0x00100000
5239 /* phy power management enable */
5240 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5241 ctrl
|= E1000_CTRL_ADVD3WUC
;
5242 wr32(E1000_CTRL
, ctrl
);
5244 /* Allow time for pending master requests to run */
5245 igb_disable_pcie_master(&adapter
->hw
);
5247 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
5248 wr32(E1000_WUFC
, wufc
);
5251 wr32(E1000_WUFC
, 0);
5254 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
5256 igb_shutdown_fiber_serdes_link_82575(hw
);
5258 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5259 * would have already happened in close and is redundant. */
5260 igb_release_hw_control(adapter
);
5262 pci_disable_device(pdev
);
5268 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5273 retval
= __igb_shutdown(pdev
, &wake
);
5278 pci_prepare_to_sleep(pdev
);
5280 pci_wake_from_d3(pdev
, false);
5281 pci_set_power_state(pdev
, PCI_D3hot
);
5287 static int igb_resume(struct pci_dev
*pdev
)
5289 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5290 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5291 struct e1000_hw
*hw
= &adapter
->hw
;
5294 pci_set_power_state(pdev
, PCI_D0
);
5295 pci_restore_state(pdev
);
5297 err
= pci_enable_device_mem(pdev
);
5300 "igb: Cannot enable PCI device from suspend\n");
5303 pci_set_master(pdev
);
5305 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5306 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5308 igb_set_interrupt_capability(adapter
);
5310 if (igb_alloc_queues(adapter
)) {
5311 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
5315 /* e1000_power_up_phy(adapter); */
5319 /* let the f/w know that the h/w is now under the control of the
5321 igb_get_hw_control(adapter
);
5323 wr32(E1000_WUS
, ~0);
5325 if (netif_running(netdev
)) {
5326 err
= igb_open(netdev
);
5331 netif_device_attach(netdev
);
5337 static void igb_shutdown(struct pci_dev
*pdev
)
5341 __igb_shutdown(pdev
, &wake
);
5343 if (system_state
== SYSTEM_POWER_OFF
) {
5344 pci_wake_from_d3(pdev
, wake
);
5345 pci_set_power_state(pdev
, PCI_D3hot
);
5349 #ifdef CONFIG_NET_POLL_CONTROLLER
5351 * Polling 'interrupt' - used by things like netconsole to send skbs
5352 * without having to re-enable interrupts. It's not called while
5353 * the interrupt routine is executing.
5355 static void igb_netpoll(struct net_device
*netdev
)
5357 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5358 struct e1000_hw
*hw
= &adapter
->hw
;
5361 if (!adapter
->msix_entries
) {
5362 igb_irq_disable(adapter
);
5363 napi_schedule(&adapter
->rx_ring
[0].napi
);
5367 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5368 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
5369 wr32(E1000_EIMC
, tx_ring
->eims_value
);
5370 igb_clean_tx_irq(tx_ring
);
5371 wr32(E1000_EIMS
, tx_ring
->eims_value
);
5374 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5375 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
5376 wr32(E1000_EIMC
, rx_ring
->eims_value
);
5377 napi_schedule(&rx_ring
->napi
);
5380 #endif /* CONFIG_NET_POLL_CONTROLLER */
5383 * igb_io_error_detected - called when PCI error is detected
5384 * @pdev: Pointer to PCI device
5385 * @state: The current pci connection state
5387 * This function is called after a PCI bus error affecting
5388 * this device has been detected.
5390 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
5391 pci_channel_state_t state
)
5393 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5394 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5396 netif_device_detach(netdev
);
5398 if (state
== pci_channel_io_perm_failure
)
5399 return PCI_ERS_RESULT_DISCONNECT
;
5401 if (netif_running(netdev
))
5403 pci_disable_device(pdev
);
5405 /* Request a slot slot reset. */
5406 return PCI_ERS_RESULT_NEED_RESET
;
5410 * igb_io_slot_reset - called after the pci bus has been reset.
5411 * @pdev: Pointer to PCI device
5413 * Restart the card from scratch, as if from a cold-boot. Implementation
5414 * resembles the first-half of the igb_resume routine.
5416 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
5418 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5419 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5420 struct e1000_hw
*hw
= &adapter
->hw
;
5421 pci_ers_result_t result
;
5424 if (pci_enable_device_mem(pdev
)) {
5426 "Cannot re-enable PCI device after reset.\n");
5427 result
= PCI_ERS_RESULT_DISCONNECT
;
5429 pci_set_master(pdev
);
5430 pci_restore_state(pdev
);
5432 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5433 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5436 wr32(E1000_WUS
, ~0);
5437 result
= PCI_ERS_RESULT_RECOVERED
;
5440 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
5442 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
5443 "failed 0x%0x\n", err
);
5444 /* non-fatal, continue */
5451 * igb_io_resume - called when traffic can start flowing again.
5452 * @pdev: Pointer to PCI device
5454 * This callback is called when the error recovery driver tells us that
5455 * its OK to resume normal operation. Implementation resembles the
5456 * second-half of the igb_resume routine.
5458 static void igb_io_resume(struct pci_dev
*pdev
)
5460 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5461 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5463 if (netif_running(netdev
)) {
5464 if (igb_up(adapter
)) {
5465 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
5470 netif_device_attach(netdev
);
5472 /* let the f/w know that the h/w is now under the control of the
5474 igb_get_hw_control(adapter
);
5477 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
5478 int vf
, unsigned char *mac_addr
)
5480 struct e1000_hw
*hw
= &adapter
->hw
;
5481 int rar_entry
= vf
+ 1; /* VF MAC addresses start at entry 1 */
5483 igb_rar_set(hw
, mac_addr
, rar_entry
);
5485 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
5487 igb_set_rah_pool(hw
, vf
, rar_entry
);
5492 static void igb_vmm_control(struct igb_adapter
*adapter
)
5494 struct e1000_hw
*hw
= &adapter
->hw
;
5497 if (!adapter
->vfs_allocated_count
)
5500 /* VF's need PF reset indication before they
5501 * can send/receive mail */
5502 reg_data
= rd32(E1000_CTRL_EXT
);
5503 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
5504 wr32(E1000_CTRL_EXT
, reg_data
);
5506 igb_vmdq_set_loopback_pf(hw
, true);
5507 igb_vmdq_set_replication_pf(hw
, true);