1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/pci-aspm.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/if_ether.h>
46 #include <linux/aer.h>
48 #include <linux/dca.h>
52 #define DRV_VERSION "1.3.16-k2"
53 char igb_driver_name
[] = "igb";
54 char igb_driver_version
[] = DRV_VERSION
;
55 static const char igb_driver_string
[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
57 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
59 static const struct e1000_info
*igb_info_tbl
[] = {
60 [board_82575
] = &e1000_82575_info
,
63 static struct pci_device_id igb_pci_tbl
[] = {
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
69 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
70 /* required last entry */
74 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
76 void igb_reset(struct igb_adapter
*);
77 static int igb_setup_all_tx_resources(struct igb_adapter
*);
78 static int igb_setup_all_rx_resources(struct igb_adapter
*);
79 static void igb_free_all_tx_resources(struct igb_adapter
*);
80 static void igb_free_all_rx_resources(struct igb_adapter
*);
81 void igb_update_stats(struct igb_adapter
*);
82 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
83 static void __devexit
igb_remove(struct pci_dev
*pdev
);
84 static int igb_sw_init(struct igb_adapter
*);
85 static int igb_open(struct net_device
*);
86 static int igb_close(struct net_device
*);
87 static void igb_configure_tx(struct igb_adapter
*);
88 static void igb_configure_rx(struct igb_adapter
*);
89 static void igb_setup_rctl(struct igb_adapter
*);
90 static void igb_clean_all_tx_rings(struct igb_adapter
*);
91 static void igb_clean_all_rx_rings(struct igb_adapter
*);
92 static void igb_clean_tx_ring(struct igb_ring
*);
93 static void igb_clean_rx_ring(struct igb_ring
*);
94 static void igb_set_multi(struct net_device
*);
95 static void igb_update_phy_info(unsigned long);
96 static void igb_watchdog(unsigned long);
97 static void igb_watchdog_task(struct work_struct
*);
98 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
100 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
101 static struct net_device_stats
*igb_get_stats(struct net_device
*);
102 static int igb_change_mtu(struct net_device
*, int);
103 static int igb_set_mac(struct net_device
*, void *);
104 static irqreturn_t
igb_intr(int irq
, void *);
105 static irqreturn_t
igb_intr_msi(int irq
, void *);
106 static irqreturn_t
igb_msix_other(int irq
, void *);
107 static irqreturn_t
igb_msix_rx(int irq
, void *);
108 static irqreturn_t
igb_msix_tx(int irq
, void *);
109 #ifdef CONFIG_IGB_DCA
110 static void igb_update_rx_dca(struct igb_ring
*);
111 static void igb_update_tx_dca(struct igb_ring
*);
112 static void igb_setup_dca(struct igb_adapter
*);
113 #endif /* CONFIG_IGB_DCA */
114 static bool igb_clean_tx_irq(struct igb_ring
*);
115 static int igb_poll(struct napi_struct
*, int);
116 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
117 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
118 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
119 static void igb_tx_timeout(struct net_device
*);
120 static void igb_reset_task(struct work_struct
*);
121 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
122 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
123 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
124 static void igb_restore_vlan(struct igb_adapter
*);
125 static void igb_ping_all_vfs(struct igb_adapter
*);
126 static void igb_msg_task(struct igb_adapter
*);
127 static int igb_rcv_msg_from_vf(struct igb_adapter
*, u32
);
128 static inline void igb_set_rah_pool(struct e1000_hw
*, int , int);
129 static void igb_set_mc_list_pools(struct igb_adapter
*, int, u16
);
130 static void igb_vmm_control(struct igb_adapter
*);
131 static inline void igb_set_vmolr(struct e1000_hw
*, int);
132 static inline int igb_set_vf_rlpml(struct igb_adapter
*, int, int);
133 static int igb_set_vf_mac(struct igb_adapter
*adapter
, int, unsigned char *);
134 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
136 static int igb_suspend(struct pci_dev
*, pm_message_t
);
138 static int igb_resume(struct pci_dev
*);
140 static void igb_shutdown(struct pci_dev
*);
141 #ifdef CONFIG_IGB_DCA
142 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
143 static struct notifier_block dca_notifier
= {
144 .notifier_call
= igb_notify_dca
,
149 #ifdef CONFIG_NET_POLL_CONTROLLER
150 /* for netdump / net console */
151 static void igb_netpoll(struct net_device
*);
154 #ifdef CONFIG_PCI_IOV
155 static ssize_t
igb_set_num_vfs(struct device
*, struct device_attribute
*,
156 const char *, size_t);
157 static ssize_t
igb_show_num_vfs(struct device
*, struct device_attribute
*,
159 DEVICE_ATTR(num_vfs
, S_IRUGO
| S_IWUSR
, igb_show_num_vfs
, igb_set_num_vfs
);
161 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
162 pci_channel_state_t
);
163 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
164 static void igb_io_resume(struct pci_dev
*);
166 static struct pci_error_handlers igb_err_handler
= {
167 .error_detected
= igb_io_error_detected
,
168 .slot_reset
= igb_io_slot_reset
,
169 .resume
= igb_io_resume
,
173 static struct pci_driver igb_driver
= {
174 .name
= igb_driver_name
,
175 .id_table
= igb_pci_tbl
,
177 .remove
= __devexit_p(igb_remove
),
179 /* Power Managment Hooks */
180 .suspend
= igb_suspend
,
181 .resume
= igb_resume
,
183 .shutdown
= igb_shutdown
,
184 .err_handler
= &igb_err_handler
187 static int global_quad_port_a
; /* global quad port a indication */
189 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
190 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
191 MODULE_LICENSE("GPL");
192 MODULE_VERSION(DRV_VERSION
);
195 * Scale the NIC clock cycle by a large factor so that
196 * relatively small clock corrections can be added or
197 * substracted at each clock tick. The drawbacks of a
198 * large factor are a) that the clock register overflows
199 * more quickly (not such a big deal) and b) that the
200 * increment per tick has to fit into 24 bits.
203 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
205 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
207 * The base scale factor is intentionally a power of two
208 * so that the division in %struct timecounter can be done with
211 #define IGB_TSYNC_SHIFT (19)
212 #define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
215 * The duration of one clock cycle of the NIC.
217 * @todo This hard-coded value is part of the specification and might change
218 * in future hardware revisions. Add revision check.
220 #define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
222 #if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
223 # error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
227 * igb_read_clock - read raw cycle counter (to be used by time counter)
229 static cycle_t
igb_read_clock(const struct cyclecounter
*tc
)
231 struct igb_adapter
*adapter
=
232 container_of(tc
, struct igb_adapter
, cycles
);
233 struct e1000_hw
*hw
= &adapter
->hw
;
236 stamp
= rd32(E1000_SYSTIML
);
237 stamp
|= (u64
)rd32(E1000_SYSTIMH
) << 32ULL;
244 * igb_get_hw_dev_name - return device name string
245 * used by hardware layer to print debugging information
247 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
249 struct igb_adapter
*adapter
= hw
->back
;
250 return adapter
->netdev
->name
;
254 * igb_get_time_str - format current NIC and system time as string
256 static char *igb_get_time_str(struct igb_adapter
*adapter
,
259 cycle_t hw
= adapter
->cycles
.read(&adapter
->cycles
);
260 struct timespec nic
= ns_to_timespec(timecounter_read(&adapter
->clock
));
262 struct timespec delta
;
263 getnstimeofday(&sys
);
265 delta
= timespec_sub(nic
, sys
);
268 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
270 (long)nic
.tv_sec
, nic
.tv_nsec
,
271 (long)sys
.tv_sec
, sys
.tv_nsec
,
272 (long)delta
.tv_sec
, delta
.tv_nsec
);
279 * igb_init_module - Driver Registration Routine
281 * igb_init_module is the first routine called when the driver is
282 * loaded. All it does is register with the PCI subsystem.
284 static int __init
igb_init_module(void)
287 printk(KERN_INFO
"%s - version %s\n",
288 igb_driver_string
, igb_driver_version
);
290 printk(KERN_INFO
"%s\n", igb_copyright
);
292 global_quad_port_a
= 0;
294 #ifdef CONFIG_IGB_DCA
295 dca_register_notify(&dca_notifier
);
298 ret
= pci_register_driver(&igb_driver
);
302 module_init(igb_init_module
);
305 * igb_exit_module - Driver Exit Cleanup Routine
307 * igb_exit_module is called just before the driver is removed
310 static void __exit
igb_exit_module(void)
312 #ifdef CONFIG_IGB_DCA
313 dca_unregister_notify(&dca_notifier
);
315 pci_unregister_driver(&igb_driver
);
318 module_exit(igb_exit_module
);
320 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
322 * igb_cache_ring_register - Descriptor ring to register mapping
323 * @adapter: board private structure to initialize
325 * Once we know the feature-set enabled for the device, we'll cache
326 * the register offset the descriptor ring is assigned to.
328 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
331 unsigned int rbase_offset
= adapter
->vfs_allocated_count
;
333 switch (adapter
->hw
.mac
.type
) {
335 /* The queues are allocated for virtualization such that VF 0
336 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
337 * In order to avoid collision we start at the first free queue
338 * and continue consuming queues in the same sequence
340 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
341 adapter
->rx_ring
[i
].reg_idx
= rbase_offset
+
343 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
344 adapter
->tx_ring
[i
].reg_idx
= rbase_offset
+
349 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
350 adapter
->rx_ring
[i
].reg_idx
= i
;
351 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
352 adapter
->tx_ring
[i
].reg_idx
= i
;
358 * igb_alloc_queues - Allocate memory for all rings
359 * @adapter: board private structure to initialize
361 * We allocate one ring per queue at run-time since we don't know the
362 * number of queues at compile-time.
364 static int igb_alloc_queues(struct igb_adapter
*adapter
)
368 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
369 sizeof(struct igb_ring
), GFP_KERNEL
);
370 if (!adapter
->tx_ring
)
373 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
374 sizeof(struct igb_ring
), GFP_KERNEL
);
375 if (!adapter
->rx_ring
) {
376 kfree(adapter
->tx_ring
);
380 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
382 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
383 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
384 ring
->count
= adapter
->tx_ring_count
;
385 ring
->adapter
= adapter
;
386 ring
->queue_index
= i
;
388 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
389 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
390 ring
->count
= adapter
->rx_ring_count
;
391 ring
->adapter
= adapter
;
392 ring
->queue_index
= i
;
393 ring
->itr_register
= E1000_ITR
;
395 /* set a default napi handler for each rx_ring */
396 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
399 igb_cache_ring_register(adapter
);
403 static void igb_free_queues(struct igb_adapter
*adapter
)
407 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
408 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
410 kfree(adapter
->tx_ring
);
411 kfree(adapter
->rx_ring
);
414 #define IGB_N0_QUEUE -1
415 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
416 int tx_queue
, int msix_vector
)
419 struct e1000_hw
*hw
= &adapter
->hw
;
422 switch (hw
->mac
.type
) {
424 /* The 82575 assigns vectors using a bitmask, which matches the
425 bitmask for the EICR/EIMS/EIMC registers. To assign one
426 or more queues to a vector, we write the appropriate bits
427 into the MSIXBM register for that vector. */
428 if (rx_queue
> IGB_N0_QUEUE
) {
429 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
430 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
432 if (tx_queue
> IGB_N0_QUEUE
) {
433 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
434 adapter
->tx_ring
[tx_queue
].eims_value
=
435 E1000_EICR_TX_QUEUE0
<< tx_queue
;
437 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
440 /* 82576 uses a table-based method for assigning vectors.
441 Each queue has a single entry in the table to which we write
442 a vector number along with a "valid" bit. Sadly, the layout
443 of the table is somewhat counterintuitive. */
444 if (rx_queue
> IGB_N0_QUEUE
) {
445 index
= (rx_queue
>> 1) + adapter
->vfs_allocated_count
;
446 ivar
= array_rd32(E1000_IVAR0
, index
);
447 if (rx_queue
& 0x1) {
448 /* vector goes into third byte of register */
449 ivar
= ivar
& 0xFF00FFFF;
450 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
452 /* vector goes into low byte of register */
453 ivar
= ivar
& 0xFFFFFF00;
454 ivar
|= msix_vector
| E1000_IVAR_VALID
;
456 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
457 array_wr32(E1000_IVAR0
, index
, ivar
);
459 if (tx_queue
> IGB_N0_QUEUE
) {
460 index
= (tx_queue
>> 1) + adapter
->vfs_allocated_count
;
461 ivar
= array_rd32(E1000_IVAR0
, index
);
462 if (tx_queue
& 0x1) {
463 /* vector goes into high byte of register */
464 ivar
= ivar
& 0x00FFFFFF;
465 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
467 /* vector goes into second byte of register */
468 ivar
= ivar
& 0xFFFF00FF;
469 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
471 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
472 array_wr32(E1000_IVAR0
, index
, ivar
);
482 * igb_configure_msix - Configure MSI-X hardware
484 * igb_configure_msix sets up the hardware to properly
485 * generate MSI-X interrupts.
487 static void igb_configure_msix(struct igb_adapter
*adapter
)
491 struct e1000_hw
*hw
= &adapter
->hw
;
493 adapter
->eims_enable_mask
= 0;
494 if (hw
->mac
.type
== e1000_82576
)
495 /* Turn on MSI-X capability first, or our settings
496 * won't stick. And it will take days to debug. */
497 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
498 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
501 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
502 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
503 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
504 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
505 if (tx_ring
->itr_val
)
506 writel(tx_ring
->itr_val
,
507 hw
->hw_addr
+ tx_ring
->itr_register
);
509 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
512 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
513 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
514 rx_ring
->buddy
= NULL
;
515 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
516 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
517 if (rx_ring
->itr_val
)
518 writel(rx_ring
->itr_val
,
519 hw
->hw_addr
+ rx_ring
->itr_register
);
521 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
525 /* set vector for other causes, i.e. link changes */
526 switch (hw
->mac
.type
) {
528 array_wr32(E1000_MSIXBM(0), vector
++,
531 tmp
= rd32(E1000_CTRL_EXT
);
532 /* enable MSI-X PBA support*/
533 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
535 /* Auto-Mask interrupts upon ICR read. */
536 tmp
|= E1000_CTRL_EXT_EIAME
;
537 tmp
|= E1000_CTRL_EXT_IRCA
;
539 wr32(E1000_CTRL_EXT
, tmp
);
540 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
541 adapter
->eims_other
= E1000_EIMS_OTHER
;
546 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
547 wr32(E1000_IVAR_MISC
, tmp
);
549 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
550 adapter
->eims_other
= 1 << (vector
- 1);
553 /* do nothing, since nothing else supports MSI-X */
555 } /* switch (hw->mac.type) */
560 * igb_request_msix - Initialize MSI-X interrupts
562 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
565 static int igb_request_msix(struct igb_adapter
*adapter
)
567 struct net_device
*netdev
= adapter
->netdev
;
568 int i
, err
= 0, vector
= 0;
572 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
573 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
574 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
575 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
576 &igb_msix_tx
, 0, ring
->name
,
577 &(adapter
->tx_ring
[i
]));
580 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
581 ring
->itr_val
= 976; /* ~4000 ints/sec */
584 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
585 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
586 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
587 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
589 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
590 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
591 &igb_msix_rx
, 0, ring
->name
,
592 &(adapter
->rx_ring
[i
]));
595 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
596 ring
->itr_val
= adapter
->itr
;
600 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
601 &igb_msix_other
, 0, netdev
->name
, netdev
);
605 igb_configure_msix(adapter
);
611 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
613 if (adapter
->msix_entries
) {
614 pci_disable_msix(adapter
->pdev
);
615 kfree(adapter
->msix_entries
);
616 adapter
->msix_entries
= NULL
;
617 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
618 pci_disable_msi(adapter
->pdev
);
624 * igb_set_interrupt_capability - set MSI or MSI-X if supported
626 * Attempt to configure interrupts using the best available
627 * capabilities of the hardware and kernel.
629 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
634 /* Number of supported queues. */
635 /* Having more queues than CPUs doesn't make sense. */
636 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
637 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
639 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
640 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
642 if (!adapter
->msix_entries
)
645 for (i
= 0; i
< numvecs
; i
++)
646 adapter
->msix_entries
[i
].entry
= i
;
648 err
= pci_enable_msix(adapter
->pdev
,
649 adapter
->msix_entries
,
654 igb_reset_interrupt_capability(adapter
);
656 /* If we can't do MSI-X, try MSI */
658 adapter
->num_rx_queues
= 1;
659 adapter
->num_tx_queues
= 1;
660 if (!pci_enable_msi(adapter
->pdev
))
661 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
663 /* Notify the stack of the (possibly) reduced Tx Queue count. */
664 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
669 * igb_request_irq - initialize interrupts
671 * Attempts to configure interrupts using the best available
672 * capabilities of the hardware and kernel.
674 static int igb_request_irq(struct igb_adapter
*adapter
)
676 struct net_device
*netdev
= adapter
->netdev
;
677 struct e1000_hw
*hw
= &adapter
->hw
;
680 if (adapter
->msix_entries
) {
681 err
= igb_request_msix(adapter
);
684 /* fall back to MSI */
685 igb_reset_interrupt_capability(adapter
);
686 if (!pci_enable_msi(adapter
->pdev
))
687 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
688 igb_free_all_tx_resources(adapter
);
689 igb_free_all_rx_resources(adapter
);
690 adapter
->num_rx_queues
= 1;
691 igb_alloc_queues(adapter
);
693 switch (hw
->mac
.type
) {
695 wr32(E1000_MSIXBM(0),
696 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
699 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
706 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
707 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
708 netdev
->name
, netdev
);
711 /* fall back to legacy interrupts */
712 igb_reset_interrupt_capability(adapter
);
713 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
716 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
717 netdev
->name
, netdev
);
720 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
727 static void igb_free_irq(struct igb_adapter
*adapter
)
729 struct net_device
*netdev
= adapter
->netdev
;
731 if (adapter
->msix_entries
) {
734 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
735 free_irq(adapter
->msix_entries
[vector
++].vector
,
736 &(adapter
->tx_ring
[i
]));
737 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
738 free_irq(adapter
->msix_entries
[vector
++].vector
,
739 &(adapter
->rx_ring
[i
]));
741 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
745 free_irq(adapter
->pdev
->irq
, netdev
);
749 * igb_irq_disable - Mask off interrupt generation on the NIC
750 * @adapter: board private structure
752 static void igb_irq_disable(struct igb_adapter
*adapter
)
754 struct e1000_hw
*hw
= &adapter
->hw
;
756 if (adapter
->msix_entries
) {
758 wr32(E1000_EIMC
, ~0);
765 synchronize_irq(adapter
->pdev
->irq
);
769 * igb_irq_enable - Enable default interrupt generation settings
770 * @adapter: board private structure
772 static void igb_irq_enable(struct igb_adapter
*adapter
)
774 struct e1000_hw
*hw
= &adapter
->hw
;
776 if (adapter
->msix_entries
) {
777 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
778 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
779 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
780 if (adapter
->vfs_allocated_count
)
781 wr32(E1000_MBVFIMR
, 0xFF);
782 wr32(E1000_IMS
, (E1000_IMS_LSC
| E1000_IMS_VMMB
|
783 E1000_IMS_DOUTSYNC
));
785 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
786 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
790 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
792 struct net_device
*netdev
= adapter
->netdev
;
793 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
794 u16 old_vid
= adapter
->mng_vlan_id
;
795 if (adapter
->vlgrp
) {
796 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
797 if (adapter
->hw
.mng_cookie
.status
&
798 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
799 igb_vlan_rx_add_vid(netdev
, vid
);
800 adapter
->mng_vlan_id
= vid
;
802 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
804 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
806 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
807 igb_vlan_rx_kill_vid(netdev
, old_vid
);
809 adapter
->mng_vlan_id
= vid
;
814 * igb_release_hw_control - release control of the h/w to f/w
815 * @adapter: address of board private structure
817 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
818 * For ASF and Pass Through versions of f/w this means that the
819 * driver is no longer loaded.
822 static void igb_release_hw_control(struct igb_adapter
*adapter
)
824 struct e1000_hw
*hw
= &adapter
->hw
;
827 /* Let firmware take over control of h/w */
828 ctrl_ext
= rd32(E1000_CTRL_EXT
);
830 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
835 * igb_get_hw_control - get control of the h/w from f/w
836 * @adapter: address of board private structure
838 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
839 * For ASF and Pass Through versions of f/w this means that
840 * the driver is loaded.
843 static void igb_get_hw_control(struct igb_adapter
*adapter
)
845 struct e1000_hw
*hw
= &adapter
->hw
;
848 /* Let firmware know the driver has taken over */
849 ctrl_ext
= rd32(E1000_CTRL_EXT
);
851 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
855 * igb_configure - configure the hardware for RX and TX
856 * @adapter: private board structure
858 static void igb_configure(struct igb_adapter
*adapter
)
860 struct net_device
*netdev
= adapter
->netdev
;
863 igb_get_hw_control(adapter
);
864 igb_set_multi(netdev
);
866 igb_restore_vlan(adapter
);
868 igb_configure_tx(adapter
);
869 igb_setup_rctl(adapter
);
870 igb_configure_rx(adapter
);
872 igb_rx_fifo_flush_82575(&adapter
->hw
);
874 /* call IGB_DESC_UNUSED which always leaves
875 * at least 1 descriptor unused to make sure
876 * next_to_use != next_to_clean */
877 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
878 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
879 igb_alloc_rx_buffers_adv(ring
, IGB_DESC_UNUSED(ring
));
883 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
888 * igb_up - Open the interface and prepare it to handle traffic
889 * @adapter: board private structure
892 int igb_up(struct igb_adapter
*adapter
)
894 struct e1000_hw
*hw
= &adapter
->hw
;
897 /* hardware has been reset, we need to reload some things */
898 igb_configure(adapter
);
900 clear_bit(__IGB_DOWN
, &adapter
->state
);
902 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
903 napi_enable(&adapter
->rx_ring
[i
].napi
);
904 if (adapter
->msix_entries
)
905 igb_configure_msix(adapter
);
907 igb_vmm_control(adapter
);
908 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
909 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
911 /* Clear any pending interrupts. */
913 igb_irq_enable(adapter
);
915 /* Fire a link change interrupt to start the watchdog. */
916 wr32(E1000_ICS
, E1000_ICS_LSC
);
920 void igb_down(struct igb_adapter
*adapter
)
922 struct e1000_hw
*hw
= &adapter
->hw
;
923 struct net_device
*netdev
= adapter
->netdev
;
927 /* signal that we're down so the interrupt handler does not
928 * reschedule our watchdog timer */
929 set_bit(__IGB_DOWN
, &adapter
->state
);
931 /* disable receives in the hardware */
932 rctl
= rd32(E1000_RCTL
);
933 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
934 /* flush and sleep below */
936 netif_tx_stop_all_queues(netdev
);
938 /* disable transmits in the hardware */
939 tctl
= rd32(E1000_TCTL
);
940 tctl
&= ~E1000_TCTL_EN
;
941 wr32(E1000_TCTL
, tctl
);
942 /* flush both disables and wait for them to finish */
946 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
947 napi_disable(&adapter
->rx_ring
[i
].napi
);
949 igb_irq_disable(adapter
);
951 del_timer_sync(&adapter
->watchdog_timer
);
952 del_timer_sync(&adapter
->phy_info_timer
);
954 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
955 netif_carrier_off(netdev
);
957 /* record the stats before reset*/
958 igb_update_stats(adapter
);
960 adapter
->link_speed
= 0;
961 adapter
->link_duplex
= 0;
963 if (!pci_channel_offline(adapter
->pdev
))
965 igb_clean_all_tx_rings(adapter
);
966 igb_clean_all_rx_rings(adapter
);
969 void igb_reinit_locked(struct igb_adapter
*adapter
)
971 WARN_ON(in_interrupt());
972 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
976 clear_bit(__IGB_RESETTING
, &adapter
->state
);
979 void igb_reset(struct igb_adapter
*adapter
)
981 struct e1000_hw
*hw
= &adapter
->hw
;
982 struct e1000_mac_info
*mac
= &hw
->mac
;
983 struct e1000_fc_info
*fc
= &hw
->fc
;
984 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
987 /* Repartition Pba for greater than 9k mtu
988 * To take effect CTRL.RST is required.
1000 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1001 (mac
->type
< e1000_82576
)) {
1002 /* adjust PBA for jumbo frames */
1003 wr32(E1000_PBA
, pba
);
1005 /* To maintain wire speed transmits, the Tx FIFO should be
1006 * large enough to accommodate two full transmit packets,
1007 * rounded up to the next 1KB and expressed in KB. Likewise,
1008 * the Rx FIFO should be large enough to accommodate at least
1009 * one full receive packet and is similarly rounded up and
1010 * expressed in KB. */
1011 pba
= rd32(E1000_PBA
);
1012 /* upper 16 bits has Tx packet buffer allocation size in KB */
1013 tx_space
= pba
>> 16;
1014 /* lower 16 bits has Rx packet buffer allocation size in KB */
1016 /* the tx fifo also stores 16 bytes of information about the tx
1017 * but don't include ethernet FCS because hardware appends it */
1018 min_tx_space
= (adapter
->max_frame_size
+
1019 sizeof(union e1000_adv_tx_desc
) -
1021 min_tx_space
= ALIGN(min_tx_space
, 1024);
1022 min_tx_space
>>= 10;
1023 /* software strips receive CRC, so leave room for it */
1024 min_rx_space
= adapter
->max_frame_size
;
1025 min_rx_space
= ALIGN(min_rx_space
, 1024);
1026 min_rx_space
>>= 10;
1028 /* If current Tx allocation is less than the min Tx FIFO size,
1029 * and the min Tx FIFO size is less than the current Rx FIFO
1030 * allocation, take space away from current Rx allocation */
1031 if (tx_space
< min_tx_space
&&
1032 ((min_tx_space
- tx_space
) < pba
)) {
1033 pba
= pba
- (min_tx_space
- tx_space
);
1035 /* if short on rx space, rx wins and must trump tx
1037 if (pba
< min_rx_space
)
1040 wr32(E1000_PBA
, pba
);
1043 /* flow control settings */
1044 /* The high water mark must be low enough to fit one full frame
1045 * (or the size used for early receive) above it in the Rx FIFO.
1046 * Set it to the lower of:
1047 * - 90% of the Rx FIFO size, or
1048 * - the full Rx FIFO size minus one full frame */
1049 hwm
= min(((pba
<< 10) * 9 / 10),
1050 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1052 if (mac
->type
< e1000_82576
) {
1053 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
1054 fc
->low_water
= fc
->high_water
- 8;
1056 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
1057 fc
->low_water
= fc
->high_water
- 16;
1059 fc
->pause_time
= 0xFFFF;
1061 fc
->type
= fc
->original_type
;
1063 /* disable receive for all VFs and wait one second */
1064 if (adapter
->vfs_allocated_count
) {
1066 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1067 adapter
->vf_data
[i
].clear_to_send
= false;
1069 /* ping all the active vfs to let them know we are going down */
1070 igb_ping_all_vfs(adapter
);
1072 /* disable transmits and receives */
1073 wr32(E1000_VFRE
, 0);
1074 wr32(E1000_VFTE
, 0);
1077 /* Allow time for pending master requests to run */
1078 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
1081 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
1082 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
1084 igb_update_mng_vlan(adapter
);
1086 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1087 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1089 igb_reset_adaptive(&adapter
->hw
);
1090 igb_get_phy_info(&adapter
->hw
);
1093 static const struct net_device_ops igb_netdev_ops
= {
1094 .ndo_open
= igb_open
,
1095 .ndo_stop
= igb_close
,
1096 .ndo_start_xmit
= igb_xmit_frame_adv
,
1097 .ndo_get_stats
= igb_get_stats
,
1098 .ndo_set_multicast_list
= igb_set_multi
,
1099 .ndo_set_mac_address
= igb_set_mac
,
1100 .ndo_change_mtu
= igb_change_mtu
,
1101 .ndo_do_ioctl
= igb_ioctl
,
1102 .ndo_tx_timeout
= igb_tx_timeout
,
1103 .ndo_validate_addr
= eth_validate_addr
,
1104 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1105 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1106 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1107 #ifdef CONFIG_NET_POLL_CONTROLLER
1108 .ndo_poll_controller
= igb_netpoll
,
1113 * igb_probe - Device Initialization Routine
1114 * @pdev: PCI device information struct
1115 * @ent: entry in igb_pci_tbl
1117 * Returns 0 on success, negative on failure
1119 * igb_probe initializes an adapter identified by a pci_dev structure.
1120 * The OS initialization, configuring of the adapter private structure,
1121 * and a hardware reset occur.
1123 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1124 const struct pci_device_id
*ent
)
1126 struct net_device
*netdev
;
1127 struct igb_adapter
*adapter
;
1128 struct e1000_hw
*hw
;
1129 struct pci_dev
*us_dev
;
1130 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1131 unsigned long mmio_start
, mmio_len
;
1132 int err
, pci_using_dac
, pos
;
1133 u16 eeprom_data
= 0, state
= 0;
1134 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1137 err
= pci_enable_device_mem(pdev
);
1142 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1144 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1148 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1150 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1152 dev_err(&pdev
->dev
, "No usable DMA "
1153 "configuration, aborting\n");
1159 /* 82575 requires that the pci-e link partner disable the L0s state */
1160 switch (pdev
->device
) {
1161 case E1000_DEV_ID_82575EB_COPPER
:
1162 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1163 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1164 us_dev
= pdev
->bus
->self
;
1165 pos
= pci_find_capability(us_dev
, PCI_CAP_ID_EXP
);
1167 pci_read_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1169 state
&= ~PCIE_LINK_STATE_L0S
;
1170 pci_write_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1172 dev_info(&pdev
->dev
,
1173 "Disabling ASPM L0s upstream switch port %s\n",
1180 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1186 err
= pci_enable_pcie_error_reporting(pdev
);
1188 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1190 /* non-fatal, continue */
1193 pci_set_master(pdev
);
1194 pci_save_state(pdev
);
1197 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
1198 IGB_ABS_MAX_TX_QUEUES
);
1200 goto err_alloc_etherdev
;
1202 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1204 pci_set_drvdata(pdev
, netdev
);
1205 adapter
= netdev_priv(netdev
);
1206 adapter
->netdev
= netdev
;
1207 adapter
->pdev
= pdev
;
1210 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1212 mmio_start
= pci_resource_start(pdev
, 0);
1213 mmio_len
= pci_resource_len(pdev
, 0);
1216 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1220 netdev
->netdev_ops
= &igb_netdev_ops
;
1221 igb_set_ethtool_ops(netdev
);
1222 netdev
->watchdog_timeo
= 5 * HZ
;
1224 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1226 netdev
->mem_start
= mmio_start
;
1227 netdev
->mem_end
= mmio_start
+ mmio_len
;
1229 /* PCI config space info */
1230 hw
->vendor_id
= pdev
->vendor
;
1231 hw
->device_id
= pdev
->device
;
1232 hw
->revision_id
= pdev
->revision
;
1233 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1234 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1236 /* setup the private structure */
1238 /* Copy the default MAC, PHY and NVM function pointers */
1239 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1240 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1241 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1242 /* Initialize skew-specific constants */
1243 err
= ei
->get_invariants(hw
);
1247 /* setup the private structure */
1248 err
= igb_sw_init(adapter
);
1252 igb_get_bus_info_pcie(hw
);
1255 switch (hw
->mac
.type
) {
1257 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1264 hw
->phy
.autoneg_wait_to_complete
= false;
1265 hw
->mac
.adaptive_ifs
= true;
1267 /* Copper options */
1268 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1269 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1270 hw
->phy
.disable_polarity_correction
= false;
1271 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1274 if (igb_check_reset_block(hw
))
1275 dev_info(&pdev
->dev
,
1276 "PHY reset is blocked due to SOL/IDER session.\n");
1278 netdev
->features
= NETIF_F_SG
|
1280 NETIF_F_HW_VLAN_TX
|
1281 NETIF_F_HW_VLAN_RX
|
1282 NETIF_F_HW_VLAN_FILTER
;
1284 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1285 netdev
->features
|= NETIF_F_TSO
;
1286 netdev
->features
|= NETIF_F_TSO6
;
1288 netdev
->features
|= NETIF_F_GRO
;
1290 netdev
->vlan_features
|= NETIF_F_TSO
;
1291 netdev
->vlan_features
|= NETIF_F_TSO6
;
1292 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1293 netdev
->vlan_features
|= NETIF_F_SG
;
1296 netdev
->features
|= NETIF_F_HIGHDMA
;
1298 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1300 /* before reading the NVM, reset the controller to put the device in a
1301 * known good starting state */
1302 hw
->mac
.ops
.reset_hw(hw
);
1304 /* make sure the NVM is good */
1305 if (igb_validate_nvm_checksum(hw
) < 0) {
1306 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1311 /* copy the MAC address out of the NVM */
1312 if (hw
->mac
.ops
.read_mac_addr(hw
))
1313 dev_err(&pdev
->dev
, "NVM Read Error\n");
1315 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1316 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1318 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1319 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1324 init_timer(&adapter
->watchdog_timer
);
1325 adapter
->watchdog_timer
.function
= &igb_watchdog
;
1326 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1328 init_timer(&adapter
->phy_info_timer
);
1329 adapter
->phy_info_timer
.function
= &igb_update_phy_info
;
1330 adapter
->phy_info_timer
.data
= (unsigned long) adapter
;
1332 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1333 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1335 /* Initialize link properties that are user-changeable */
1336 adapter
->fc_autoneg
= true;
1337 hw
->mac
.autoneg
= true;
1338 hw
->phy
.autoneg_advertised
= 0x2f;
1340 hw
->fc
.original_type
= e1000_fc_default
;
1341 hw
->fc
.type
= e1000_fc_default
;
1343 adapter
->itr_setting
= IGB_DEFAULT_ITR
;
1344 adapter
->itr
= IGB_START_ITR
;
1346 igb_validate_mdi_setting(hw
);
1348 adapter
->rx_csum
= 1;
1350 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1351 * enable the ACPI Magic Packet filter
1354 if (hw
->bus
.func
== 0 ||
1355 hw
->device_id
== E1000_DEV_ID_82575EB_COPPER
)
1356 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1358 if (eeprom_data
& eeprom_apme_mask
)
1359 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1361 /* now that we have the eeprom settings, apply the special cases where
1362 * the eeprom may be wrong or the board simply won't support wake on
1363 * lan on a particular port */
1364 switch (pdev
->device
) {
1365 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1366 adapter
->eeprom_wol
= 0;
1368 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1369 case E1000_DEV_ID_82576_FIBER
:
1370 case E1000_DEV_ID_82576_SERDES
:
1371 /* Wake events only supported on port A for dual fiber
1372 * regardless of eeprom setting */
1373 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1374 adapter
->eeprom_wol
= 0;
1378 /* initialize the wol settings based on the eeprom settings */
1379 adapter
->wol
= adapter
->eeprom_wol
;
1380 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1382 /* reset the hardware with the new settings */
1385 /* let the f/w know that the h/w is now under the control of the
1387 igb_get_hw_control(adapter
);
1389 /* tell the stack to leave us alone until igb_open() is called */
1390 netif_carrier_off(netdev
);
1391 netif_tx_stop_all_queues(netdev
);
1393 strcpy(netdev
->name
, "eth%d");
1394 err
= register_netdev(netdev
);
1398 #ifdef CONFIG_PCI_IOV
1399 /* since iov functionality isn't critical to base device function we
1400 * can accept failure. If it fails we don't allow iov to be enabled */
1401 if (hw
->mac
.type
== e1000_82576
) {
1402 err
= pci_enable_sriov(pdev
, 0);
1404 err
= device_create_file(&netdev
->dev
,
1407 dev_err(&pdev
->dev
, "Failed to initialize IOV\n");
1411 #ifdef CONFIG_IGB_DCA
1412 if (dca_add_requester(&pdev
->dev
) == 0) {
1413 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1414 dev_info(&pdev
->dev
, "DCA enabled\n");
1415 /* Always use CB2 mode, difference is masked
1416 * in the CB driver. */
1417 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
1418 igb_setup_dca(adapter
);
1423 * Initialize hardware timer: we keep it running just in case
1424 * that some program needs it later on.
1426 memset(&adapter
->cycles
, 0, sizeof(adapter
->cycles
));
1427 adapter
->cycles
.read
= igb_read_clock
;
1428 adapter
->cycles
.mask
= CLOCKSOURCE_MASK(64);
1429 adapter
->cycles
.mult
= 1;
1430 adapter
->cycles
.shift
= IGB_TSYNC_SHIFT
;
1433 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS
* IGB_TSYNC_SCALE
);
1436 * Avoid rollover while we initialize by resetting the time counter.
1438 wr32(E1000_SYSTIML
, 0x00000000);
1439 wr32(E1000_SYSTIMH
, 0x00000000);
1442 * Set registers so that rollover occurs soon to test this.
1444 wr32(E1000_SYSTIML
, 0x00000000);
1445 wr32(E1000_SYSTIMH
, 0xFF800000);
1448 timecounter_init(&adapter
->clock
,
1450 ktime_to_ns(ktime_get_real()));
1453 * Synchronize our NIC clock against system wall clock. NIC
1454 * time stamp reading requires ~3us per sample, each sample
1455 * was pretty stable even under load => only require 10
1456 * samples for each offset comparison.
1458 memset(&adapter
->compare
, 0, sizeof(adapter
->compare
));
1459 adapter
->compare
.source
= &adapter
->clock
;
1460 adapter
->compare
.target
= ktime_get_real
;
1461 adapter
->compare
.num_samples
= 10;
1462 timecompare_update(&adapter
->compare
, 0);
1468 "igb: %s: hw %p initialized timer\n",
1469 igb_get_time_str(adapter
, buffer
),
1474 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1475 /* print bus type/speed/width info */
1476 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1478 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1479 ? "2.5Gb/s" : "unknown"),
1480 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1481 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1482 ? "Width x1" : "unknown"),
1485 igb_read_part_num(hw
, &part_num
);
1486 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1487 (part_num
>> 8), (part_num
& 0xff));
1489 dev_info(&pdev
->dev
,
1490 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1491 adapter
->msix_entries
? "MSI-X" :
1492 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1493 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1498 igb_release_hw_control(adapter
);
1500 if (!igb_check_reset_block(hw
))
1503 if (hw
->flash_address
)
1504 iounmap(hw
->flash_address
);
1506 igb_free_queues(adapter
);
1508 iounmap(hw
->hw_addr
);
1510 free_netdev(netdev
);
1512 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1516 pci_disable_device(pdev
);
1521 * igb_remove - Device Removal Routine
1522 * @pdev: PCI device information struct
1524 * igb_remove is called by the PCI subsystem to alert the driver
1525 * that it should release a PCI device. The could be caused by a
1526 * Hot-Plug event, or because the driver is going to be removed from
1529 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1531 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1532 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1533 struct e1000_hw
*hw
= &adapter
->hw
;
1536 /* flush_scheduled work may reschedule our watchdog task, so
1537 * explicitly disable watchdog tasks from being rescheduled */
1538 set_bit(__IGB_DOWN
, &adapter
->state
);
1539 del_timer_sync(&adapter
->watchdog_timer
);
1540 del_timer_sync(&adapter
->phy_info_timer
);
1542 flush_scheduled_work();
1544 #ifdef CONFIG_IGB_DCA
1545 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1546 dev_info(&pdev
->dev
, "DCA disabled\n");
1547 dca_remove_requester(&pdev
->dev
);
1548 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1549 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
1553 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1554 * would have already happened in close and is redundant. */
1555 igb_release_hw_control(adapter
);
1557 unregister_netdev(netdev
);
1559 if (!igb_check_reset_block(&adapter
->hw
))
1560 igb_reset_phy(&adapter
->hw
);
1562 igb_reset_interrupt_capability(adapter
);
1564 igb_free_queues(adapter
);
1566 #ifdef CONFIG_PCI_IOV
1567 /* reclaim resources allocated to VFs */
1568 if (adapter
->vf_data
) {
1569 /* disable iov and allow time for transactions to clear */
1570 pci_disable_sriov(pdev
);
1573 kfree(adapter
->vf_data
);
1574 adapter
->vf_data
= NULL
;
1575 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1577 dev_info(&pdev
->dev
, "IOV Disabled\n");
1580 iounmap(hw
->hw_addr
);
1581 if (hw
->flash_address
)
1582 iounmap(hw
->flash_address
);
1583 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1586 free_netdev(netdev
);
1588 err
= pci_disable_pcie_error_reporting(pdev
);
1591 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1593 pci_disable_device(pdev
);
1597 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1598 * @adapter: board private structure to initialize
1600 * igb_sw_init initializes the Adapter private data structure.
1601 * Fields are initialized based on PCI device information and
1602 * OS network device settings (MTU size).
1604 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1606 struct e1000_hw
*hw
= &adapter
->hw
;
1607 struct net_device
*netdev
= adapter
->netdev
;
1608 struct pci_dev
*pdev
= adapter
->pdev
;
1610 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1612 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1613 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1614 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1615 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1616 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1617 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1619 /* This call may decrease the number of queues depending on
1620 * interrupt mode. */
1621 igb_set_interrupt_capability(adapter
);
1623 if (igb_alloc_queues(adapter
)) {
1624 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1628 /* Explicitly disable IRQ since the NIC can be in any state. */
1629 igb_irq_disable(adapter
);
1631 set_bit(__IGB_DOWN
, &adapter
->state
);
1636 * igb_open - Called when a network interface is made active
1637 * @netdev: network interface device structure
1639 * Returns 0 on success, negative value on failure
1641 * The open entry point is called when a network interface is made
1642 * active by the system (IFF_UP). At this point all resources needed
1643 * for transmit and receive operations are allocated, the interrupt
1644 * handler is registered with the OS, the watchdog timer is started,
1645 * and the stack is notified that the interface is ready.
1647 static int igb_open(struct net_device
*netdev
)
1649 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1650 struct e1000_hw
*hw
= &adapter
->hw
;
1654 /* disallow open during test */
1655 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1658 /* allocate transmit descriptors */
1659 err
= igb_setup_all_tx_resources(adapter
);
1663 /* allocate receive descriptors */
1664 err
= igb_setup_all_rx_resources(adapter
);
1668 /* e1000_power_up_phy(adapter); */
1670 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1671 if ((adapter
->hw
.mng_cookie
.status
&
1672 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1673 igb_update_mng_vlan(adapter
);
1675 /* before we allocate an interrupt, we must be ready to handle it.
1676 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1677 * as soon as we call pci_request_irq, so we have to setup our
1678 * clean_rx handler before we do so. */
1679 igb_configure(adapter
);
1681 igb_vmm_control(adapter
);
1682 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
1683 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
1685 err
= igb_request_irq(adapter
);
1689 /* From here on the code is the same as igb_up() */
1690 clear_bit(__IGB_DOWN
, &adapter
->state
);
1692 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1693 napi_enable(&adapter
->rx_ring
[i
].napi
);
1695 /* Clear any pending interrupts. */
1698 igb_irq_enable(adapter
);
1700 netif_tx_start_all_queues(netdev
);
1702 /* Fire a link status change interrupt to start the watchdog. */
1703 wr32(E1000_ICS
, E1000_ICS_LSC
);
1708 igb_release_hw_control(adapter
);
1709 /* e1000_power_down_phy(adapter); */
1710 igb_free_all_rx_resources(adapter
);
1712 igb_free_all_tx_resources(adapter
);
1720 * igb_close - Disables a network interface
1721 * @netdev: network interface device structure
1723 * Returns 0, this is not allowed to fail
1725 * The close entry point is called when an interface is de-activated
1726 * by the OS. The hardware is still under the driver's control, but
1727 * needs to be disabled. A global MAC reset is issued to stop the
1728 * hardware, and all transmit and receive resources are freed.
1730 static int igb_close(struct net_device
*netdev
)
1732 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1734 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1737 igb_free_irq(adapter
);
1739 igb_free_all_tx_resources(adapter
);
1740 igb_free_all_rx_resources(adapter
);
1742 /* kill manageability vlan ID if supported, but not if a vlan with
1743 * the same ID is registered on the host OS (let 8021q kill it) */
1744 if ((adapter
->hw
.mng_cookie
.status
&
1745 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1747 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1748 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1754 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1755 * @adapter: board private structure
1756 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1758 * Return 0 on success, negative on failure
1760 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1761 struct igb_ring
*tx_ring
)
1763 struct pci_dev
*pdev
= adapter
->pdev
;
1766 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1767 tx_ring
->buffer_info
= vmalloc(size
);
1768 if (!tx_ring
->buffer_info
)
1770 memset(tx_ring
->buffer_info
, 0, size
);
1772 /* round up to nearest 4K */
1773 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1774 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1776 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1782 tx_ring
->adapter
= adapter
;
1783 tx_ring
->next_to_use
= 0;
1784 tx_ring
->next_to_clean
= 0;
1788 vfree(tx_ring
->buffer_info
);
1789 dev_err(&adapter
->pdev
->dev
,
1790 "Unable to allocate memory for the transmit descriptor ring\n");
1795 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1796 * (Descriptors) for all queues
1797 * @adapter: board private structure
1799 * Return 0 on success, negative on failure
1801 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1806 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1807 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1809 dev_err(&adapter
->pdev
->dev
,
1810 "Allocation for Tx Queue %u failed\n", i
);
1811 for (i
--; i
>= 0; i
--)
1812 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1817 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1818 r_idx
= i
% adapter
->num_tx_queues
;
1819 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1825 * igb_configure_tx - Configure transmit Unit after Reset
1826 * @adapter: board private structure
1828 * Configure the Tx unit of the MAC after a reset.
1830 static void igb_configure_tx(struct igb_adapter
*adapter
)
1833 struct e1000_hw
*hw
= &adapter
->hw
;
1838 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1839 struct igb_ring
*ring
= &adapter
->tx_ring
[i
];
1841 wr32(E1000_TDLEN(j
),
1842 ring
->count
* sizeof(union e1000_adv_tx_desc
));
1844 wr32(E1000_TDBAL(j
),
1845 tdba
& 0x00000000ffffffffULL
);
1846 wr32(E1000_TDBAH(j
), tdba
>> 32);
1848 ring
->head
= E1000_TDH(j
);
1849 ring
->tail
= E1000_TDT(j
);
1850 writel(0, hw
->hw_addr
+ ring
->tail
);
1851 writel(0, hw
->hw_addr
+ ring
->head
);
1852 txdctl
= rd32(E1000_TXDCTL(j
));
1853 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1854 wr32(E1000_TXDCTL(j
), txdctl
);
1856 /* Turn off Relaxed Ordering on head write-backs. The
1857 * writebacks MUST be delivered in order or it will
1858 * completely screw up our bookeeping.
1860 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1861 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1862 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1865 /* disable queue 0 to prevent tail bump w/o re-configuration */
1866 if (adapter
->vfs_allocated_count
)
1867 wr32(E1000_TXDCTL(0), 0);
1869 /* Program the Transmit Control Register */
1870 tctl
= rd32(E1000_TCTL
);
1871 tctl
&= ~E1000_TCTL_CT
;
1872 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1873 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1875 igb_config_collision_dist(hw
);
1877 /* Setup Transmit Descriptor Settings for eop descriptor */
1878 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1880 /* Enable transmits */
1881 tctl
|= E1000_TCTL_EN
;
1883 wr32(E1000_TCTL
, tctl
);
1887 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1888 * @adapter: board private structure
1889 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1891 * Returns 0 on success, negative on failure
1893 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1894 struct igb_ring
*rx_ring
)
1896 struct pci_dev
*pdev
= adapter
->pdev
;
1899 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1900 rx_ring
->buffer_info
= vmalloc(size
);
1901 if (!rx_ring
->buffer_info
)
1903 memset(rx_ring
->buffer_info
, 0, size
);
1905 desc_len
= sizeof(union e1000_adv_rx_desc
);
1907 /* Round up to nearest 4K */
1908 rx_ring
->size
= rx_ring
->count
* desc_len
;
1909 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1911 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1917 rx_ring
->next_to_clean
= 0;
1918 rx_ring
->next_to_use
= 0;
1920 rx_ring
->adapter
= adapter
;
1925 vfree(rx_ring
->buffer_info
);
1926 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1927 "the receive descriptor ring\n");
1932 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1933 * (Descriptors) for all queues
1934 * @adapter: board private structure
1936 * Return 0 on success, negative on failure
1938 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1942 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1943 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1945 dev_err(&adapter
->pdev
->dev
,
1946 "Allocation for Rx Queue %u failed\n", i
);
1947 for (i
--; i
>= 0; i
--)
1948 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1957 * igb_setup_rctl - configure the receive control registers
1958 * @adapter: Board private structure
1960 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1962 struct e1000_hw
*hw
= &adapter
->hw
;
1967 rctl
= rd32(E1000_RCTL
);
1969 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1970 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1972 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1973 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1976 * enable stripping of CRC. It's unlikely this will break BMC
1977 * redirection as it did with e1000. Newer features require
1978 * that the HW strips the CRC.
1980 rctl
|= E1000_RCTL_SECRC
;
1983 * disable store bad packets and clear size bits.
1985 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
1987 /* enable LPE when to prevent packets larger than max_frame_size */
1988 rctl
|= E1000_RCTL_LPE
;
1990 /* Setup buffer sizes */
1991 switch (adapter
->rx_buffer_len
) {
1992 case IGB_RXBUFFER_256
:
1993 rctl
|= E1000_RCTL_SZ_256
;
1995 case IGB_RXBUFFER_512
:
1996 rctl
|= E1000_RCTL_SZ_512
;
1999 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
2000 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
2004 /* 82575 and greater support packet-split where the protocol
2005 * header is placed in skb->data and the packet data is
2006 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2007 * In the case of a non-split, skb->data is linearly filled,
2008 * followed by the page buffers. Therefore, skb->data is
2009 * sized to hold the largest protocol header.
2011 /* allocations using alloc_page take too long for regular MTU
2012 * so only enable packet split for jumbo frames */
2013 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
2014 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
2015 srrctl
|= adapter
->rx_ps_hdr_size
<<
2016 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
2017 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2019 adapter
->rx_ps_hdr_size
= 0;
2020 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2023 /* Attention!!! For SR-IOV PF driver operations you must enable
2024 * queue drop for all VF and PF queues to prevent head of line blocking
2025 * if an un-trusted VF does not provide descriptors to hardware.
2027 if (adapter
->vfs_allocated_count
) {
2030 j
= adapter
->rx_ring
[0].reg_idx
;
2032 /* set all queue drop enable bits */
2033 wr32(E1000_QDE
, ALL_QUEUES
);
2034 srrctl
|= E1000_SRRCTL_DROP_EN
;
2036 /* disable queue 0 to prevent tail write w/o re-config */
2037 wr32(E1000_RXDCTL(0), 0);
2039 vmolr
= rd32(E1000_VMOLR(j
));
2040 if (rctl
& E1000_RCTL_LPE
)
2041 vmolr
|= E1000_VMOLR_LPE
;
2042 if (adapter
->num_rx_queues
> 0)
2043 vmolr
|= E1000_VMOLR_RSSE
;
2044 wr32(E1000_VMOLR(j
), vmolr
);
2047 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2048 j
= adapter
->rx_ring
[i
].reg_idx
;
2049 wr32(E1000_SRRCTL(j
), srrctl
);
2052 wr32(E1000_RCTL
, rctl
);
2056 * igb_rlpml_set - set maximum receive packet size
2057 * @adapter: board private structure
2059 * Configure maximum receivable packet size.
2061 static void igb_rlpml_set(struct igb_adapter
*adapter
)
2063 u32 max_frame_size
= adapter
->max_frame_size
;
2064 struct e1000_hw
*hw
= &adapter
->hw
;
2065 u16 pf_id
= adapter
->vfs_allocated_count
;
2068 max_frame_size
+= VLAN_TAG_SIZE
;
2070 /* if vfs are enabled we set RLPML to the largest possible request
2071 * size and set the VMOLR RLPML to the size we need */
2073 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
2074 max_frame_size
= MAX_STD_JUMBO_FRAME_SIZE
+ VLAN_TAG_SIZE
;
2077 wr32(E1000_RLPML
, max_frame_size
);
2081 * igb_configure_vt_default_pool - Configure VT default pool
2082 * @adapter: board private structure
2084 * Configure the default pool
2086 static void igb_configure_vt_default_pool(struct igb_adapter
*adapter
)
2088 struct e1000_hw
*hw
= &adapter
->hw
;
2089 u16 pf_id
= adapter
->vfs_allocated_count
;
2092 /* not in sr-iov mode - do nothing */
2096 vtctl
= rd32(E1000_VT_CTL
);
2097 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
2098 E1000_VT_CTL_DISABLE_DEF_POOL
);
2099 vtctl
|= pf_id
<< E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
2100 wr32(E1000_VT_CTL
, vtctl
);
2104 * igb_configure_rx - Configure receive Unit after Reset
2105 * @adapter: board private structure
2107 * Configure the Rx unit of the MAC after a reset.
2109 static void igb_configure_rx(struct igb_adapter
*adapter
)
2112 struct e1000_hw
*hw
= &adapter
->hw
;
2117 /* disable receives while setting up the descriptors */
2118 rctl
= rd32(E1000_RCTL
);
2119 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
2123 if (adapter
->itr_setting
> 3)
2124 wr32(E1000_ITR
, adapter
->itr
);
2126 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2127 * the Base and Length of the Rx Descriptor Ring */
2128 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2129 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
2130 int j
= ring
->reg_idx
;
2132 wr32(E1000_RDBAL(j
),
2133 rdba
& 0x00000000ffffffffULL
);
2134 wr32(E1000_RDBAH(j
), rdba
>> 32);
2135 wr32(E1000_RDLEN(j
),
2136 ring
->count
* sizeof(union e1000_adv_rx_desc
));
2138 ring
->head
= E1000_RDH(j
);
2139 ring
->tail
= E1000_RDT(j
);
2140 writel(0, hw
->hw_addr
+ ring
->tail
);
2141 writel(0, hw
->hw_addr
+ ring
->head
);
2143 rxdctl
= rd32(E1000_RXDCTL(j
));
2144 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
2145 rxdctl
&= 0xFFF00000;
2146 rxdctl
|= IGB_RX_PTHRESH
;
2147 rxdctl
|= IGB_RX_HTHRESH
<< 8;
2148 rxdctl
|= IGB_RX_WTHRESH
<< 16;
2149 wr32(E1000_RXDCTL(j
), rxdctl
);
2152 if (adapter
->num_rx_queues
> 1) {
2161 get_random_bytes(&random
[0], 40);
2163 if (hw
->mac
.type
>= e1000_82576
)
2167 for (j
= 0; j
< (32 * 4); j
++) {
2169 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
2172 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
2174 if (adapter
->vfs_allocated_count
)
2175 mrqc
= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
2177 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
2179 /* Fill out hash function seeds */
2180 for (j
= 0; j
< 10; j
++)
2181 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
2183 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
2184 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
2185 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
2186 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
2187 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2188 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2189 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
2190 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
2193 wr32(E1000_MRQC
, mrqc
);
2195 /* Multiqueue and raw packet checksumming are mutually
2196 * exclusive. Note that this not the same as TCP/IP
2197 * checksumming, which works fine. */
2198 rxcsum
= rd32(E1000_RXCSUM
);
2199 rxcsum
|= E1000_RXCSUM_PCSD
;
2200 wr32(E1000_RXCSUM
, rxcsum
);
2202 /* Enable multi-queue for sr-iov */
2203 if (adapter
->vfs_allocated_count
)
2204 wr32(E1000_MRQC
, E1000_MRQC_ENABLE_VMDQ
);
2205 /* Enable Receive Checksum Offload for TCP and UDP */
2206 rxcsum
= rd32(E1000_RXCSUM
);
2207 if (adapter
->rx_csum
)
2208 rxcsum
|= E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
;
2210 rxcsum
&= ~(E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
);
2212 wr32(E1000_RXCSUM
, rxcsum
);
2215 /* Set the default pool for the PF's first queue */
2216 igb_configure_vt_default_pool(adapter
);
2218 igb_rlpml_set(adapter
);
2220 /* Enable Receives */
2221 wr32(E1000_RCTL
, rctl
);
2225 * igb_free_tx_resources - Free Tx Resources per Queue
2226 * @tx_ring: Tx descriptor ring for a specific queue
2228 * Free all transmit software resources
2230 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2232 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2234 igb_clean_tx_ring(tx_ring
);
2236 vfree(tx_ring
->buffer_info
);
2237 tx_ring
->buffer_info
= NULL
;
2239 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2241 tx_ring
->desc
= NULL
;
2245 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2246 * @adapter: board private structure
2248 * Free all transmit software resources
2250 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2254 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2255 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2258 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2259 struct igb_buffer
*buffer_info
)
2261 if (buffer_info
->dma
) {
2262 pci_unmap_page(adapter
->pdev
,
2264 buffer_info
->length
,
2266 buffer_info
->dma
= 0;
2268 if (buffer_info
->skb
) {
2269 dev_kfree_skb_any(buffer_info
->skb
);
2270 buffer_info
->skb
= NULL
;
2272 buffer_info
->time_stamp
= 0;
2273 buffer_info
->next_to_watch
= 0;
2274 /* buffer_info must be completely set up in the transmit path */
2278 * igb_clean_tx_ring - Free Tx Buffers
2279 * @tx_ring: ring to be cleaned
2281 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2283 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2284 struct igb_buffer
*buffer_info
;
2288 if (!tx_ring
->buffer_info
)
2290 /* Free all the Tx ring sk_buffs */
2292 for (i
= 0; i
< tx_ring
->count
; i
++) {
2293 buffer_info
= &tx_ring
->buffer_info
[i
];
2294 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2297 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2298 memset(tx_ring
->buffer_info
, 0, size
);
2300 /* Zero out the descriptor ring */
2302 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2304 tx_ring
->next_to_use
= 0;
2305 tx_ring
->next_to_clean
= 0;
2307 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2308 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2312 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2313 * @adapter: board private structure
2315 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2319 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2320 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2324 * igb_free_rx_resources - Free Rx Resources
2325 * @rx_ring: ring to clean the resources from
2327 * Free all receive software resources
2329 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2331 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2333 igb_clean_rx_ring(rx_ring
);
2335 vfree(rx_ring
->buffer_info
);
2336 rx_ring
->buffer_info
= NULL
;
2338 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2340 rx_ring
->desc
= NULL
;
2344 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2345 * @adapter: board private structure
2347 * Free all receive software resources
2349 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2353 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2354 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2358 * igb_clean_rx_ring - Free Rx Buffers per Queue
2359 * @rx_ring: ring to free buffers from
2361 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2363 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2364 struct igb_buffer
*buffer_info
;
2365 struct pci_dev
*pdev
= adapter
->pdev
;
2369 if (!rx_ring
->buffer_info
)
2371 /* Free all the Rx ring sk_buffs */
2372 for (i
= 0; i
< rx_ring
->count
; i
++) {
2373 buffer_info
= &rx_ring
->buffer_info
[i
];
2374 if (buffer_info
->dma
) {
2375 if (adapter
->rx_ps_hdr_size
)
2376 pci_unmap_single(pdev
, buffer_info
->dma
,
2377 adapter
->rx_ps_hdr_size
,
2378 PCI_DMA_FROMDEVICE
);
2380 pci_unmap_single(pdev
, buffer_info
->dma
,
2381 adapter
->rx_buffer_len
,
2382 PCI_DMA_FROMDEVICE
);
2383 buffer_info
->dma
= 0;
2386 if (buffer_info
->skb
) {
2387 dev_kfree_skb(buffer_info
->skb
);
2388 buffer_info
->skb
= NULL
;
2390 if (buffer_info
->page
) {
2391 if (buffer_info
->page_dma
)
2392 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2394 PCI_DMA_FROMDEVICE
);
2395 put_page(buffer_info
->page
);
2396 buffer_info
->page
= NULL
;
2397 buffer_info
->page_dma
= 0;
2398 buffer_info
->page_offset
= 0;
2402 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2403 memset(rx_ring
->buffer_info
, 0, size
);
2405 /* Zero out the descriptor ring */
2406 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2408 rx_ring
->next_to_clean
= 0;
2409 rx_ring
->next_to_use
= 0;
2411 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2412 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2416 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2417 * @adapter: board private structure
2419 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2423 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2424 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2428 * igb_set_mac - Change the Ethernet Address of the NIC
2429 * @netdev: network interface device structure
2430 * @p: pointer to an address structure
2432 * Returns 0 on success, negative on failure
2434 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2436 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2437 struct e1000_hw
*hw
= &adapter
->hw
;
2438 struct sockaddr
*addr
= p
;
2440 if (!is_valid_ether_addr(addr
->sa_data
))
2441 return -EADDRNOTAVAIL
;
2443 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2444 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2446 hw
->mac
.ops
.rar_set(hw
, hw
->mac
.addr
, 0);
2448 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
2454 * igb_set_multi - Multicast and Promiscuous mode set
2455 * @netdev: network interface device structure
2457 * The set_multi entry point is called whenever the multicast address
2458 * list or the network interface flags are updated. This routine is
2459 * responsible for configuring the hardware for proper multicast,
2460 * promiscuous mode, and all-multi behavior.
2462 static void igb_set_multi(struct net_device
*netdev
)
2464 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2465 struct e1000_hw
*hw
= &adapter
->hw
;
2466 struct e1000_mac_info
*mac
= &hw
->mac
;
2467 struct dev_mc_list
*mc_ptr
;
2472 /* Check for Promiscuous and All Multicast modes */
2474 rctl
= rd32(E1000_RCTL
);
2476 if (netdev
->flags
& IFF_PROMISC
) {
2477 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2478 rctl
&= ~E1000_RCTL_VFE
;
2480 if (netdev
->flags
& IFF_ALLMULTI
) {
2481 rctl
|= E1000_RCTL_MPE
;
2482 rctl
&= ~E1000_RCTL_UPE
;
2484 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2485 rctl
|= E1000_RCTL_VFE
;
2487 wr32(E1000_RCTL
, rctl
);
2489 if (!netdev
->mc_count
) {
2490 /* nothing to program, so clear mc list */
2491 igb_update_mc_addr_list(hw
, NULL
, 0, 1,
2492 mac
->rar_entry_count
);
2496 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2500 /* The shared function expects a packed array of only addresses. */
2501 mc_ptr
= netdev
->mc_list
;
2503 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2506 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2507 mc_ptr
= mc_ptr
->next
;
2509 igb_update_mc_addr_list(hw
, mta_list
, i
,
2510 adapter
->vfs_allocated_count
+ 1,
2511 mac
->rar_entry_count
);
2513 igb_set_mc_list_pools(adapter
, i
, mac
->rar_entry_count
);
2514 igb_restore_vf_multicasts(adapter
);
2519 /* Need to wait a few seconds after link up to get diagnostic information from
2521 static void igb_update_phy_info(unsigned long data
)
2523 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2524 igb_get_phy_info(&adapter
->hw
);
2528 * igb_has_link - check shared code for link and determine up/down
2529 * @adapter: pointer to driver private info
2531 static bool igb_has_link(struct igb_adapter
*adapter
)
2533 struct e1000_hw
*hw
= &adapter
->hw
;
2534 bool link_active
= false;
2537 /* get_link_status is set on LSC (link status) interrupt or
2538 * rx sequence error interrupt. get_link_status will stay
2539 * false until the e1000_check_for_link establishes link
2540 * for copper adapters ONLY
2542 switch (hw
->phy
.media_type
) {
2543 case e1000_media_type_copper
:
2544 if (hw
->mac
.get_link_status
) {
2545 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2546 link_active
= !hw
->mac
.get_link_status
;
2551 case e1000_media_type_fiber
:
2552 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2553 link_active
= !!(rd32(E1000_STATUS
) & E1000_STATUS_LU
);
2555 case e1000_media_type_internal_serdes
:
2556 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2557 link_active
= hw
->mac
.serdes_has_link
;
2560 case e1000_media_type_unknown
:
2568 * igb_watchdog - Timer Call-back
2569 * @data: pointer to adapter cast into an unsigned long
2571 static void igb_watchdog(unsigned long data
)
2573 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2574 /* Do the rest outside of interrupt context */
2575 schedule_work(&adapter
->watchdog_task
);
2578 static void igb_watchdog_task(struct work_struct
*work
)
2580 struct igb_adapter
*adapter
= container_of(work
,
2581 struct igb_adapter
, watchdog_task
);
2582 struct e1000_hw
*hw
= &adapter
->hw
;
2583 struct net_device
*netdev
= adapter
->netdev
;
2584 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2589 link
= igb_has_link(adapter
);
2590 if ((netif_carrier_ok(netdev
)) && link
)
2594 if (!netif_carrier_ok(netdev
)) {
2596 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2597 &adapter
->link_speed
,
2598 &adapter
->link_duplex
);
2600 ctrl
= rd32(E1000_CTRL
);
2601 /* Links status message must follow this format */
2602 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2603 "Flow Control: %s\n",
2605 adapter
->link_speed
,
2606 adapter
->link_duplex
== FULL_DUPLEX
?
2607 "Full Duplex" : "Half Duplex",
2608 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2609 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2610 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2611 E1000_CTRL_TFCE
) ? "TX" : "None")));
2613 /* tweak tx_queue_len according to speed/duplex and
2614 * adjust the timeout factor */
2615 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2616 adapter
->tx_timeout_factor
= 1;
2617 switch (adapter
->link_speed
) {
2619 netdev
->tx_queue_len
= 10;
2620 adapter
->tx_timeout_factor
= 14;
2623 netdev
->tx_queue_len
= 100;
2624 /* maybe add some timeout factor ? */
2628 netif_carrier_on(netdev
);
2629 netif_tx_wake_all_queues(netdev
);
2631 igb_ping_all_vfs(adapter
);
2633 /* link state has changed, schedule phy info update */
2634 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2635 mod_timer(&adapter
->phy_info_timer
,
2636 round_jiffies(jiffies
+ 2 * HZ
));
2639 if (netif_carrier_ok(netdev
)) {
2640 adapter
->link_speed
= 0;
2641 adapter
->link_duplex
= 0;
2642 /* Links status message must follow this format */
2643 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2645 netif_carrier_off(netdev
);
2646 netif_tx_stop_all_queues(netdev
);
2648 igb_ping_all_vfs(adapter
);
2650 /* link state has changed, schedule phy info update */
2651 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2652 mod_timer(&adapter
->phy_info_timer
,
2653 round_jiffies(jiffies
+ 2 * HZ
));
2658 igb_update_stats(adapter
);
2660 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2661 adapter
->tpt_old
= adapter
->stats
.tpt
;
2662 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2663 adapter
->colc_old
= adapter
->stats
.colc
;
2665 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2666 adapter
->gorc_old
= adapter
->stats
.gorc
;
2667 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2668 adapter
->gotc_old
= adapter
->stats
.gotc
;
2670 igb_update_adaptive(&adapter
->hw
);
2672 if (!netif_carrier_ok(netdev
)) {
2673 if (IGB_DESC_UNUSED(tx_ring
) + 1 < tx_ring
->count
) {
2674 /* We've lost link, so the controller stops DMA,
2675 * but we've got queued Tx work that's never going
2676 * to get done, so reset controller to flush Tx.
2677 * (Do the reset outside of interrupt context). */
2678 adapter
->tx_timeout_count
++;
2679 schedule_work(&adapter
->reset_task
);
2683 /* Cause software interrupt to ensure rx ring is cleaned */
2684 if (adapter
->msix_entries
) {
2685 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2686 eics
|= adapter
->rx_ring
[i
].eims_value
;
2687 wr32(E1000_EICS
, eics
);
2689 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2692 /* Force detection of hung controller every watchdog period */
2693 tx_ring
->detect_tx_hung
= true;
2695 /* Reset the timer */
2696 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2697 mod_timer(&adapter
->watchdog_timer
,
2698 round_jiffies(jiffies
+ 2 * HZ
));
2701 enum latency_range
{
2705 latency_invalid
= 255
2710 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2712 * Stores a new ITR value based on strictly on packet size. This
2713 * algorithm is less sophisticated than that used in igb_update_itr,
2714 * due to the difficulty of synchronizing statistics across multiple
2715 * receive rings. The divisors and thresholds used by this fuction
2716 * were determined based on theoretical maximum wire speed and testing
2717 * data, in order to minimize response time while increasing bulk
2719 * This functionality is controlled by the InterruptThrottleRate module
2720 * parameter (see igb_param.c)
2721 * NOTE: This function is called only when operating in a multiqueue
2722 * receive environment.
2723 * @rx_ring: pointer to ring
2725 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2727 int new_val
= rx_ring
->itr_val
;
2728 int avg_wire_size
= 0;
2729 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2731 if (!rx_ring
->total_packets
)
2732 goto clear_counts
; /* no packets, so don't do anything */
2734 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2735 * ints/sec - ITR timer value of 120 ticks.
2737 if (adapter
->link_speed
!= SPEED_1000
) {
2741 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2743 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2744 avg_wire_size
+= 24;
2746 /* Don't starve jumbo frames */
2747 avg_wire_size
= min(avg_wire_size
, 3000);
2749 /* Give a little boost to mid-size frames */
2750 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2751 new_val
= avg_wire_size
/ 3;
2753 new_val
= avg_wire_size
/ 2;
2756 if (new_val
!= rx_ring
->itr_val
) {
2757 rx_ring
->itr_val
= new_val
;
2758 rx_ring
->set_itr
= 1;
2761 rx_ring
->total_bytes
= 0;
2762 rx_ring
->total_packets
= 0;
2766 * igb_update_itr - update the dynamic ITR value based on statistics
2767 * Stores a new ITR value based on packets and byte
2768 * counts during the last interrupt. The advantage of per interrupt
2769 * computation is faster updates and more accurate ITR for the current
2770 * traffic pattern. Constants in this function were computed
2771 * based on theoretical maximum wire speed and thresholds were set based
2772 * on testing data as well as attempting to minimize response time
2773 * while increasing bulk throughput.
2774 * this functionality is controlled by the InterruptThrottleRate module
2775 * parameter (see igb_param.c)
2776 * NOTE: These calculations are only valid when operating in a single-
2777 * queue environment.
2778 * @adapter: pointer to adapter
2779 * @itr_setting: current adapter->itr
2780 * @packets: the number of packets during this measurement interval
2781 * @bytes: the number of bytes during this measurement interval
2783 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2784 int packets
, int bytes
)
2786 unsigned int retval
= itr_setting
;
2789 goto update_itr_done
;
2791 switch (itr_setting
) {
2792 case lowest_latency
:
2793 /* handle TSO and jumbo frames */
2794 if (bytes
/packets
> 8000)
2795 retval
= bulk_latency
;
2796 else if ((packets
< 5) && (bytes
> 512))
2797 retval
= low_latency
;
2799 case low_latency
: /* 50 usec aka 20000 ints/s */
2800 if (bytes
> 10000) {
2801 /* this if handles the TSO accounting */
2802 if (bytes
/packets
> 8000) {
2803 retval
= bulk_latency
;
2804 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2805 retval
= bulk_latency
;
2806 } else if ((packets
> 35)) {
2807 retval
= lowest_latency
;
2809 } else if (bytes
/packets
> 2000) {
2810 retval
= bulk_latency
;
2811 } else if (packets
<= 2 && bytes
< 512) {
2812 retval
= lowest_latency
;
2815 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2816 if (bytes
> 25000) {
2818 retval
= low_latency
;
2819 } else if (bytes
< 1500) {
2820 retval
= low_latency
;
2829 static void igb_set_itr(struct igb_adapter
*adapter
)
2832 u32 new_itr
= adapter
->itr
;
2834 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2835 if (adapter
->link_speed
!= SPEED_1000
) {
2841 adapter
->rx_itr
= igb_update_itr(adapter
,
2843 adapter
->rx_ring
->total_packets
,
2844 adapter
->rx_ring
->total_bytes
);
2846 if (adapter
->rx_ring
->buddy
) {
2847 adapter
->tx_itr
= igb_update_itr(adapter
,
2849 adapter
->tx_ring
->total_packets
,
2850 adapter
->tx_ring
->total_bytes
);
2851 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2853 current_itr
= adapter
->rx_itr
;
2856 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2857 if (adapter
->itr_setting
== 3 && current_itr
== lowest_latency
)
2858 current_itr
= low_latency
;
2860 switch (current_itr
) {
2861 /* counts and packets in update_itr are dependent on these numbers */
2862 case lowest_latency
:
2866 new_itr
= 20000; /* aka hwitr = ~200 */
2876 adapter
->rx_ring
->total_bytes
= 0;
2877 adapter
->rx_ring
->total_packets
= 0;
2878 if (adapter
->rx_ring
->buddy
) {
2879 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2880 adapter
->rx_ring
->buddy
->total_packets
= 0;
2883 if (new_itr
!= adapter
->itr
) {
2884 /* this attempts to bias the interrupt rate towards Bulk
2885 * by adding intermediate steps when interrupt rate is
2887 new_itr
= new_itr
> adapter
->itr
?
2888 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2890 /* Don't write the value here; it resets the adapter's
2891 * internal timer, and causes us to delay far longer than
2892 * we should between interrupts. Instead, we write the ITR
2893 * value at the beginning of the next interrupt so the timing
2894 * ends up being correct.
2896 adapter
->itr
= new_itr
;
2897 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2898 adapter
->rx_ring
->set_itr
= 1;
2905 #define IGB_TX_FLAGS_CSUM 0x00000001
2906 #define IGB_TX_FLAGS_VLAN 0x00000002
2907 #define IGB_TX_FLAGS_TSO 0x00000004
2908 #define IGB_TX_FLAGS_IPV4 0x00000008
2909 #define IGB_TX_FLAGS_TSTAMP 0x00000010
2910 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2911 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2913 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2914 struct igb_ring
*tx_ring
,
2915 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2917 struct e1000_adv_tx_context_desc
*context_desc
;
2920 struct igb_buffer
*buffer_info
;
2921 u32 info
= 0, tu_cmd
= 0;
2922 u32 mss_l4len_idx
, l4len
;
2925 if (skb_header_cloned(skb
)) {
2926 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2931 l4len
= tcp_hdrlen(skb
);
2934 if (skb
->protocol
== htons(ETH_P_IP
)) {
2935 struct iphdr
*iph
= ip_hdr(skb
);
2938 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2942 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2943 ipv6_hdr(skb
)->payload_len
= 0;
2944 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2945 &ipv6_hdr(skb
)->daddr
,
2949 i
= tx_ring
->next_to_use
;
2951 buffer_info
= &tx_ring
->buffer_info
[i
];
2952 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2953 /* VLAN MACLEN IPLEN */
2954 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2955 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2956 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2957 *hdr_len
+= skb_network_offset(skb
);
2958 info
|= skb_network_header_len(skb
);
2959 *hdr_len
+= skb_network_header_len(skb
);
2960 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2962 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2963 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2965 if (skb
->protocol
== htons(ETH_P_IP
))
2966 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2967 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2969 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2972 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2973 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2975 /* For 82575, context index must be unique per ring. */
2976 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2977 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2979 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2980 context_desc
->seqnum_seed
= 0;
2982 buffer_info
->time_stamp
= jiffies
;
2983 buffer_info
->next_to_watch
= i
;
2984 buffer_info
->dma
= 0;
2986 if (i
== tx_ring
->count
)
2989 tx_ring
->next_to_use
= i
;
2994 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2995 struct igb_ring
*tx_ring
,
2996 struct sk_buff
*skb
, u32 tx_flags
)
2998 struct e1000_adv_tx_context_desc
*context_desc
;
3000 struct igb_buffer
*buffer_info
;
3001 u32 info
= 0, tu_cmd
= 0;
3003 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
3004 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
3005 i
= tx_ring
->next_to_use
;
3006 buffer_info
= &tx_ring
->buffer_info
[i
];
3007 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
3009 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3010 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
3011 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
3012 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3013 info
|= skb_network_header_len(skb
);
3015 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
3017 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3019 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3020 switch (skb
->protocol
) {
3021 case cpu_to_be16(ETH_P_IP
):
3022 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3023 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3024 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3026 case cpu_to_be16(ETH_P_IPV6
):
3027 /* XXX what about other V6 headers?? */
3028 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3029 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3032 if (unlikely(net_ratelimit()))
3033 dev_warn(&adapter
->pdev
->dev
,
3034 "partial checksum but proto=%x!\n",
3040 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3041 context_desc
->seqnum_seed
= 0;
3042 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3043 context_desc
->mss_l4len_idx
=
3044 cpu_to_le32(tx_ring
->queue_index
<< 4);
3046 context_desc
->mss_l4len_idx
= 0;
3048 buffer_info
->time_stamp
= jiffies
;
3049 buffer_info
->next_to_watch
= i
;
3050 buffer_info
->dma
= 0;
3053 if (i
== tx_ring
->count
)
3055 tx_ring
->next_to_use
= i
;
3062 #define IGB_MAX_TXD_PWR 16
3063 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
3065 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
3066 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
3069 struct igb_buffer
*buffer_info
;
3070 unsigned int len
= skb_headlen(skb
);
3071 unsigned int count
= 0, i
;
3074 i
= tx_ring
->next_to_use
;
3076 buffer_info
= &tx_ring
->buffer_info
[i
];
3077 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3078 buffer_info
->length
= len
;
3079 /* set time_stamp *before* dma to help avoid a possible race */
3080 buffer_info
->time_stamp
= jiffies
;
3081 buffer_info
->next_to_watch
= i
;
3082 buffer_info
->dma
= pci_map_single(adapter
->pdev
, skb
->data
, len
,
3086 if (i
== tx_ring
->count
)
3089 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
3090 struct skb_frag_struct
*frag
;
3092 frag
= &skb_shinfo(skb
)->frags
[f
];
3095 buffer_info
= &tx_ring
->buffer_info
[i
];
3096 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3097 buffer_info
->length
= len
;
3098 buffer_info
->time_stamp
= jiffies
;
3099 buffer_info
->next_to_watch
= i
;
3100 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
3108 if (i
== tx_ring
->count
)
3112 i
= ((i
== 0) ? tx_ring
->count
- 1 : i
- 1);
3113 tx_ring
->buffer_info
[i
].skb
= skb
;
3114 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
3119 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
3120 struct igb_ring
*tx_ring
,
3121 int tx_flags
, int count
, u32 paylen
,
3124 union e1000_adv_tx_desc
*tx_desc
= NULL
;
3125 struct igb_buffer
*buffer_info
;
3126 u32 olinfo_status
= 0, cmd_type_len
;
3129 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
3130 E1000_ADVTXD_DCMD_DEXT
);
3132 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3133 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
3135 if (tx_flags
& IGB_TX_FLAGS_TSTAMP
)
3136 cmd_type_len
|= E1000_ADVTXD_MAC_TSTAMP
;
3138 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
3139 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
3141 /* insert tcp checksum */
3142 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3144 /* insert ip checksum */
3145 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
3146 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
3148 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
3149 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3152 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
3153 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
3154 IGB_TX_FLAGS_VLAN
)))
3155 olinfo_status
|= tx_ring
->queue_index
<< 4;
3157 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
3159 i
= tx_ring
->next_to_use
;
3161 buffer_info
= &tx_ring
->buffer_info
[i
];
3162 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3163 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
3164 tx_desc
->read
.cmd_type_len
=
3165 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
3166 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3168 if (i
== tx_ring
->count
)
3172 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
3173 /* Force memory writes to complete before letting h/w
3174 * know there are new descriptors to fetch. (Only
3175 * applicable for weak-ordered memory model archs,
3176 * such as IA-64). */
3179 tx_ring
->next_to_use
= i
;
3180 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3181 /* we need this if more than one processor can write to our tail
3182 * at a time, it syncronizes IO on IA64/Altix systems */
3186 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
3187 struct igb_ring
*tx_ring
, int size
)
3189 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3191 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3193 /* Herbert's original patch had:
3194 * smp_mb__after_netif_stop_queue();
3195 * but since that doesn't exist yet, just open code it. */
3198 /* We need to check again in a case another CPU has just
3199 * made room available. */
3200 if (IGB_DESC_UNUSED(tx_ring
) < size
)
3204 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3205 ++adapter
->restart_queue
;
3209 static int igb_maybe_stop_tx(struct net_device
*netdev
,
3210 struct igb_ring
*tx_ring
, int size
)
3212 if (IGB_DESC_UNUSED(tx_ring
) >= size
)
3214 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
3217 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
3218 struct net_device
*netdev
,
3219 struct igb_ring
*tx_ring
)
3221 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3223 unsigned int tx_flags
= 0;
3226 union skb_shared_tx
*shtx
;
3228 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
3229 dev_kfree_skb_any(skb
);
3230 return NETDEV_TX_OK
;
3233 if (skb
->len
<= 0) {
3234 dev_kfree_skb_any(skb
);
3235 return NETDEV_TX_OK
;
3238 /* need: 1 descriptor per page,
3239 * + 2 desc gap to keep tail from touching head,
3240 * + 1 desc for skb->data,
3241 * + 1 desc for context descriptor,
3242 * otherwise try next time */
3243 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3244 /* this is a hard error */
3245 return NETDEV_TX_BUSY
;
3249 * TODO: check that there currently is no other packet with
3250 * time stamping in the queue
3252 * When doing time stamping, keep the connection to the socket
3253 * a while longer: it is still needed by skb_hwtstamp_tx(),
3254 * called either in igb_tx_hwtstamp() or by our caller when
3255 * doing software time stamping.
3258 if (unlikely(shtx
->hardware
)) {
3259 shtx
->in_progress
= 1;
3260 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
3263 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3264 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3265 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3268 if (skb
->protocol
== htons(ETH_P_IP
))
3269 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3271 first
= tx_ring
->next_to_use
;
3272 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3276 dev_kfree_skb_any(skb
);
3277 return NETDEV_TX_OK
;
3281 tx_flags
|= IGB_TX_FLAGS_TSO
;
3282 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
) &&
3283 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3284 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3286 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
,
3287 igb_tx_map_adv(adapter
, tx_ring
, skb
, first
),
3290 netdev
->trans_start
= jiffies
;
3292 /* Make sure there is space in the ring for the next send. */
3293 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3295 return NETDEV_TX_OK
;
3298 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3300 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3301 struct igb_ring
*tx_ring
;
3304 r_idx
= skb
->queue_mapping
& (IGB_ABS_MAX_TX_QUEUES
- 1);
3305 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3307 /* This goes back to the question of how to logically map a tx queue
3308 * to a flow. Right now, performance is impacted slightly negatively
3309 * if using multiple tx queues. If the stack breaks away from a
3310 * single qdisc implementation, we can look at this again. */
3311 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3315 * igb_tx_timeout - Respond to a Tx Hang
3316 * @netdev: network interface device structure
3318 static void igb_tx_timeout(struct net_device
*netdev
)
3320 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3321 struct e1000_hw
*hw
= &adapter
->hw
;
3323 /* Do the reset outside of interrupt context */
3324 adapter
->tx_timeout_count
++;
3325 schedule_work(&adapter
->reset_task
);
3327 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3330 static void igb_reset_task(struct work_struct
*work
)
3332 struct igb_adapter
*adapter
;
3333 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3335 igb_reinit_locked(adapter
);
3339 * igb_get_stats - Get System Network Statistics
3340 * @netdev: network interface device structure
3342 * Returns the address of the device statistics structure.
3343 * The statistics are actually updated from the timer callback.
3345 static struct net_device_stats
*igb_get_stats(struct net_device
*netdev
)
3347 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3349 /* only return the current stats */
3350 return &adapter
->net_stats
;
3354 * igb_change_mtu - Change the Maximum Transfer Unit
3355 * @netdev: network interface device structure
3356 * @new_mtu: new value for maximum frame size
3358 * Returns 0 on success, negative on failure
3360 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3362 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3363 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3365 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3366 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3367 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3371 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3372 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3376 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3379 /* igb_down has a dependency on max_frame_size */
3380 adapter
->max_frame_size
= max_frame
;
3381 if (netif_running(netdev
))
3384 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3385 * means we reserve 2 more, this pushes us to allocate from the next
3387 * i.e. RXBUFFER_2048 --> size-4096 slab
3390 if (max_frame
<= IGB_RXBUFFER_256
)
3391 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3392 else if (max_frame
<= IGB_RXBUFFER_512
)
3393 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3394 else if (max_frame
<= IGB_RXBUFFER_1024
)
3395 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3396 else if (max_frame
<= IGB_RXBUFFER_2048
)
3397 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3399 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3400 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3402 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3405 /* if sr-iov is enabled we need to force buffer size to 1K or larger */
3406 if (adapter
->vfs_allocated_count
&&
3407 (adapter
->rx_buffer_len
< IGB_RXBUFFER_1024
))
3408 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3410 /* adjust allocation if LPE protects us, and we aren't using SBP */
3411 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3412 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3413 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3415 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3416 netdev
->mtu
, new_mtu
);
3417 netdev
->mtu
= new_mtu
;
3419 if (netif_running(netdev
))
3424 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3430 * igb_update_stats - Update the board statistics counters
3431 * @adapter: board private structure
3434 void igb_update_stats(struct igb_adapter
*adapter
)
3436 struct e1000_hw
*hw
= &adapter
->hw
;
3437 struct pci_dev
*pdev
= adapter
->pdev
;
3440 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3443 * Prevent stats update while adapter is being reset, or if the pci
3444 * connection is down.
3446 if (adapter
->link_speed
== 0)
3448 if (pci_channel_offline(pdev
))
3451 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3452 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3453 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3454 rd32(E1000_GORCH
); /* clear GORCL */
3455 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3456 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3457 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3459 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3460 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3461 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3462 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3463 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3464 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3465 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3466 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3468 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3469 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3470 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3471 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3472 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3473 adapter
->stats
.dc
+= rd32(E1000_DC
);
3474 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3475 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3476 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3477 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3478 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3479 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3480 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3481 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3482 rd32(E1000_GOTCH
); /* clear GOTCL */
3483 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3484 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3485 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3486 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3487 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3488 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3489 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3491 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3492 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3493 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3494 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3495 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3496 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3498 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3499 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3501 /* used for adaptive IFS */
3503 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3504 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3505 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3506 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3508 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3509 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3510 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3511 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3512 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3514 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3515 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3516 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3517 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3518 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3519 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3520 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3521 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3522 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3524 /* Fill out the OS statistics structure */
3525 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3526 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3530 /* RLEC on some newer hardware can be incorrect so build
3531 * our own version based on RUC and ROC */
3532 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3533 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3534 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3535 adapter
->stats
.cexterr
;
3536 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3538 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3539 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3540 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3543 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3544 adapter
->stats
.latecol
;
3545 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3546 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3547 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3549 /* Tx Dropped needs to be maintained elsewhere */
3552 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3553 if ((adapter
->link_speed
== SPEED_1000
) &&
3554 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
3555 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3556 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3560 /* Management Stats */
3561 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3562 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3563 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3566 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3568 struct net_device
*netdev
= data
;
3569 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3570 struct e1000_hw
*hw
= &adapter
->hw
;
3571 u32 icr
= rd32(E1000_ICR
);
3573 /* reading ICR causes bit 31 of EICR to be cleared */
3575 if(icr
& E1000_ICR_DOUTSYNC
) {
3576 /* HW is reporting DMA is out of sync */
3577 adapter
->stats
.doosync
++;
3580 /* Check for a mailbox event */
3581 if (icr
& E1000_ICR_VMMB
)
3582 igb_msg_task(adapter
);
3584 if (icr
& E1000_ICR_LSC
) {
3585 hw
->mac
.get_link_status
= 1;
3586 /* guard against interrupt when we're going down */
3587 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3588 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3591 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_VMMB
);
3592 wr32(E1000_EIMS
, adapter
->eims_other
);
3597 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3599 struct igb_ring
*tx_ring
= data
;
3600 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3601 struct e1000_hw
*hw
= &adapter
->hw
;
3603 #ifdef CONFIG_IGB_DCA
3604 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3605 igb_update_tx_dca(tx_ring
);
3608 tx_ring
->total_bytes
= 0;
3609 tx_ring
->total_packets
= 0;
3611 /* auto mask will automatically reenable the interrupt when we write
3613 if (!igb_clean_tx_irq(tx_ring
))
3614 /* Ring was not completely cleaned, so fire another interrupt */
3615 wr32(E1000_EICS
, tx_ring
->eims_value
);
3617 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3622 static void igb_write_itr(struct igb_ring
*ring
)
3624 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3625 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3626 switch (hw
->mac
.type
) {
3628 wr32(ring
->itr_register
, ring
->itr_val
|
3632 wr32(ring
->itr_register
, ring
->itr_val
|
3633 (ring
->itr_val
<< 16));
3640 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3642 struct igb_ring
*rx_ring
= data
;
3644 /* Write the ITR value calculated at the end of the
3645 * previous interrupt.
3648 igb_write_itr(rx_ring
);
3650 if (napi_schedule_prep(&rx_ring
->napi
))
3651 __napi_schedule(&rx_ring
->napi
);
3653 #ifdef CONFIG_IGB_DCA
3654 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3655 igb_update_rx_dca(rx_ring
);
3660 #ifdef CONFIG_IGB_DCA
3661 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3664 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3665 struct e1000_hw
*hw
= &adapter
->hw
;
3666 int cpu
= get_cpu();
3667 int q
= rx_ring
->reg_idx
;
3669 if (rx_ring
->cpu
!= cpu
) {
3670 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3671 if (hw
->mac
.type
== e1000_82576
) {
3672 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3673 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3674 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3676 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3677 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3679 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3680 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3681 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3682 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3688 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3691 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3692 struct e1000_hw
*hw
= &adapter
->hw
;
3693 int cpu
= get_cpu();
3694 int q
= tx_ring
->reg_idx
;
3696 if (tx_ring
->cpu
!= cpu
) {
3697 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3698 if (hw
->mac
.type
== e1000_82576
) {
3699 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3700 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3701 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3703 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3704 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3706 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3707 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3713 static void igb_setup_dca(struct igb_adapter
*adapter
)
3717 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3720 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3721 adapter
->tx_ring
[i
].cpu
= -1;
3722 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3724 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3725 adapter
->rx_ring
[i
].cpu
= -1;
3726 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3730 static int __igb_notify_dca(struct device
*dev
, void *data
)
3732 struct net_device
*netdev
= dev_get_drvdata(dev
);
3733 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3734 struct e1000_hw
*hw
= &adapter
->hw
;
3735 unsigned long event
= *(unsigned long *)data
;
3738 case DCA_PROVIDER_ADD
:
3739 /* if already enabled, don't do it again */
3740 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3742 /* Always use CB2 mode, difference is masked
3743 * in the CB driver. */
3744 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3745 if (dca_add_requester(dev
) == 0) {
3746 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3747 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3748 igb_setup_dca(adapter
);
3751 /* Fall Through since DCA is disabled. */
3752 case DCA_PROVIDER_REMOVE
:
3753 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3754 /* without this a class_device is left
3755 * hanging around in the sysfs model */
3756 dca_remove_requester(dev
);
3757 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3758 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3759 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
3767 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3772 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3775 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3777 #endif /* CONFIG_IGB_DCA */
3779 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
3781 struct e1000_hw
*hw
= &adapter
->hw
;
3785 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
3786 ping
= E1000_PF_CONTROL_MSG
;
3787 if (adapter
->vf_data
[i
].clear_to_send
)
3788 ping
|= E1000_VT_MSGTYPE_CTS
;
3789 igb_write_mbx(hw
, &ping
, 1, i
);
3793 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
3794 u32
*msgbuf
, u32 vf
)
3796 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3797 u16
*hash_list
= (u16
*)&msgbuf
[1];
3798 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
3801 /* only up to 30 hash values supported */
3805 /* salt away the number of multi cast addresses assigned
3806 * to this VF for later use to restore when the PF multi cast
3809 vf_data
->num_vf_mc_hashes
= n
;
3811 /* VFs are limited to using the MTA hash table for their multicast
3813 for (i
= 0; i
< n
; i
++)
3814 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];;
3816 /* Flush and reset the mta with the new values */
3817 igb_set_multi(adapter
->netdev
);
3822 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
3824 struct e1000_hw
*hw
= &adapter
->hw
;
3825 struct vf_data_storage
*vf_data
;
3828 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
3829 vf_data
= &adapter
->vf_data
[i
];
3830 for (j
= 0; j
< vf_data
[i
].num_vf_mc_hashes
; j
++)
3831 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
3835 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
3837 struct e1000_hw
*hw
= &adapter
->hw
;
3838 u32 pool_mask
, reg
, vid
;
3841 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3843 /* Find the vlan filter for this id */
3844 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3845 reg
= rd32(E1000_VLVF(i
));
3847 /* remove the vf from the pool */
3850 /* if pool is empty then remove entry from vfta */
3851 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
3852 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
3854 vid
= reg
& E1000_VLVF_VLANID_MASK
;
3855 igb_vfta_set(hw
, vid
, false);
3858 wr32(E1000_VLVF(i
), reg
);
3862 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
3864 struct e1000_hw
*hw
= &adapter
->hw
;
3867 /* It is an error to call this function when VFs are not enabled */
3868 if (!adapter
->vfs_allocated_count
)
3871 /* Find the vlan filter for this id */
3872 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3873 reg
= rd32(E1000_VLVF(i
));
3874 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
3875 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
3880 if (i
== E1000_VLVF_ARRAY_SIZE
) {
3881 /* Did not find a matching VLAN ID entry that was
3882 * enabled. Search for a free filter entry, i.e.
3883 * one without the enable bit set
3885 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3886 reg
= rd32(E1000_VLVF(i
));
3887 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
3891 if (i
< E1000_VLVF_ARRAY_SIZE
) {
3892 /* Found an enabled/available entry */
3893 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3895 /* if !enabled we need to set this up in vfta */
3896 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
3897 /* add VID to filter table */
3898 igb_vfta_set(hw
, vid
, true);
3899 reg
|= E1000_VLVF_VLANID_ENABLE
;
3902 wr32(E1000_VLVF(i
), reg
);
3906 if (i
< E1000_VLVF_ARRAY_SIZE
) {
3907 /* remove vf from the pool */
3908 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
3909 /* if pool is empty then remove entry from vfta */
3910 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
3912 igb_vfta_set(hw
, vid
, false);
3914 wr32(E1000_VLVF(i
), reg
);
3921 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
3923 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3924 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
3926 return igb_vlvf_set(adapter
, vid
, add
, vf
);
3929 static inline void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
3931 struct e1000_hw
*hw
= &adapter
->hw
;
3933 /* disable mailbox functionality for vf */
3934 adapter
->vf_data
[vf
].clear_to_send
= false;
3936 /* reset offloads to defaults */
3937 igb_set_vmolr(hw
, vf
);
3939 /* reset vlans for device */
3940 igb_clear_vf_vfta(adapter
, vf
);
3942 /* reset multicast table array for vf */
3943 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
3945 /* Flush and reset the mta with the new values */
3946 igb_set_multi(adapter
->netdev
);
3949 static inline void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
3951 struct e1000_hw
*hw
= &adapter
->hw
;
3952 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
3954 u8
*addr
= (u8
*)(&msgbuf
[1]);
3956 /* process all the same items cleared in a function level reset */
3957 igb_vf_reset_event(adapter
, vf
);
3959 /* set vf mac address */
3960 igb_rar_set(hw
, vf_mac
, vf
+ 1);
3961 igb_set_rah_pool(hw
, vf
, vf
+ 1);
3963 /* enable transmit and receive for vf */
3964 reg
= rd32(E1000_VFTE
);
3965 wr32(E1000_VFTE
, reg
| (1 << vf
));
3966 reg
= rd32(E1000_VFRE
);
3967 wr32(E1000_VFRE
, reg
| (1 << vf
));
3969 /* enable mailbox functionality for vf */
3970 adapter
->vf_data
[vf
].clear_to_send
= true;
3972 /* reply to reset with ack and vf mac address */
3973 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
3974 memcpy(addr
, vf_mac
, 6);
3975 igb_write_mbx(hw
, msgbuf
, 3, vf
);
3978 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
3980 unsigned char *addr
= (char *)&msg
[1];
3983 if (is_valid_ether_addr(addr
))
3984 err
= igb_set_vf_mac(adapter
, vf
, addr
);
3990 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
3992 struct e1000_hw
*hw
= &adapter
->hw
;
3993 u32 msg
= E1000_VT_MSGTYPE_NACK
;
3995 /* if device isn't clear to send it shouldn't be reading either */
3996 if (!adapter
->vf_data
[vf
].clear_to_send
)
3997 igb_write_mbx(hw
, &msg
, 1, vf
);
4001 static void igb_msg_task(struct igb_adapter
*adapter
)
4003 struct e1000_hw
*hw
= &adapter
->hw
;
4006 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
4007 /* process any reset requests */
4008 if (!igb_check_for_rst(hw
, vf
)) {
4009 adapter
->vf_data
[vf
].clear_to_send
= false;
4010 igb_vf_reset_event(adapter
, vf
);
4013 /* process any messages pending */
4014 if (!igb_check_for_msg(hw
, vf
))
4015 igb_rcv_msg_from_vf(adapter
, vf
);
4017 /* process any acks */
4018 if (!igb_check_for_ack(hw
, vf
))
4019 igb_rcv_ack_from_vf(adapter
, vf
);
4024 static int igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4026 u32 mbx_size
= E1000_VFMAILBOX_SIZE
;
4027 u32 msgbuf
[mbx_size
];
4028 struct e1000_hw
*hw
= &adapter
->hw
;
4031 retval
= igb_read_mbx(hw
, msgbuf
, mbx_size
, vf
);
4034 dev_err(&adapter
->pdev
->dev
,
4035 "Error receiving message from VF\n");
4037 /* this is a message we already processed, do nothing */
4038 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
4042 * until the vf completes a reset it should not be
4043 * allowed to start any configuration.
4046 if (msgbuf
[0] == E1000_VF_RESET
) {
4047 igb_vf_reset_msg(adapter
, vf
);
4052 if (!adapter
->vf_data
[vf
].clear_to_send
) {
4053 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4054 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4058 switch ((msgbuf
[0] & 0xFFFF)) {
4059 case E1000_VF_SET_MAC_ADDR
:
4060 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
4062 case E1000_VF_SET_MULTICAST
:
4063 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
4065 case E1000_VF_SET_LPE
:
4066 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
4068 case E1000_VF_SET_VLAN
:
4069 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
4072 dev_err(&adapter
->pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
4077 /* notify the VF of the results of what it sent us */
4079 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4081 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
4083 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
4085 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4091 * igb_intr_msi - Interrupt Handler
4092 * @irq: interrupt number
4093 * @data: pointer to a network interface device structure
4095 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
4097 struct net_device
*netdev
= data
;
4098 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4099 struct e1000_hw
*hw
= &adapter
->hw
;
4100 /* read ICR disables interrupts using IAM */
4101 u32 icr
= rd32(E1000_ICR
);
4103 igb_write_itr(adapter
->rx_ring
);
4105 if(icr
& E1000_ICR_DOUTSYNC
) {
4106 /* HW is reporting DMA is out of sync */
4107 adapter
->stats
.doosync
++;
4110 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4111 hw
->mac
.get_link_status
= 1;
4112 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4113 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4116 napi_schedule(&adapter
->rx_ring
[0].napi
);
4122 * igb_intr - Legacy Interrupt Handler
4123 * @irq: interrupt number
4124 * @data: pointer to a network interface device structure
4126 static irqreturn_t
igb_intr(int irq
, void *data
)
4128 struct net_device
*netdev
= data
;
4129 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4130 struct e1000_hw
*hw
= &adapter
->hw
;
4131 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
4132 * need for the IMC write */
4133 u32 icr
= rd32(E1000_ICR
);
4135 return IRQ_NONE
; /* Not our interrupt */
4137 igb_write_itr(adapter
->rx_ring
);
4139 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
4140 * not set, then the adapter didn't send an interrupt */
4141 if (!(icr
& E1000_ICR_INT_ASSERTED
))
4144 if(icr
& E1000_ICR_DOUTSYNC
) {
4145 /* HW is reporting DMA is out of sync */
4146 adapter
->stats
.doosync
++;
4149 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4150 hw
->mac
.get_link_status
= 1;
4151 /* guard against interrupt when we're going down */
4152 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4153 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4156 napi_schedule(&adapter
->rx_ring
[0].napi
);
4161 static inline void igb_rx_irq_enable(struct igb_ring
*rx_ring
)
4163 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4164 struct e1000_hw
*hw
= &adapter
->hw
;
4166 if (adapter
->itr_setting
& 3) {
4167 if (adapter
->num_rx_queues
== 1)
4168 igb_set_itr(adapter
);
4170 igb_update_ring_itr(rx_ring
);
4173 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4174 if (adapter
->msix_entries
)
4175 wr32(E1000_EIMS
, rx_ring
->eims_value
);
4177 igb_irq_enable(adapter
);
4182 * igb_poll - NAPI Rx polling callback
4183 * @napi: napi polling structure
4184 * @budget: count of how many packets we should handle
4186 static int igb_poll(struct napi_struct
*napi
, int budget
)
4188 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
4189 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4190 struct net_device
*netdev
= adapter
->netdev
;
4193 #ifdef CONFIG_IGB_DCA
4194 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4195 igb_update_rx_dca(rx_ring
);
4197 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
4199 if (rx_ring
->buddy
) {
4200 #ifdef CONFIG_IGB_DCA
4201 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4202 igb_update_tx_dca(rx_ring
->buddy
);
4204 if (!igb_clean_tx_irq(rx_ring
->buddy
))
4208 /* If not enough Rx work done, exit the polling mode */
4209 if ((work_done
< budget
) || !netif_running(netdev
)) {
4210 napi_complete(napi
);
4211 igb_rx_irq_enable(rx_ring
);
4218 * igb_hwtstamp - utility function which checks for TX time stamp
4219 * @adapter: board private structure
4220 * @skb: packet that was just sent
4222 * If we were asked to do hardware stamping and such a time stamp is
4223 * available, then it must have been for this skb here because we only
4224 * allow only one such packet into the queue.
4226 static void igb_tx_hwtstamp(struct igb_adapter
*adapter
, struct sk_buff
*skb
)
4228 union skb_shared_tx
*shtx
= skb_tx(skb
);
4229 struct e1000_hw
*hw
= &adapter
->hw
;
4231 if (unlikely(shtx
->hardware
)) {
4232 u32 valid
= rd32(E1000_TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
;
4234 u64 regval
= rd32(E1000_TXSTMPL
);
4236 struct skb_shared_hwtstamps shhwtstamps
;
4238 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
4239 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
4240 ns
= timecounter_cyc2time(&adapter
->clock
,
4242 timecompare_update(&adapter
->compare
, ns
);
4243 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
4244 shhwtstamps
.syststamp
=
4245 timecompare_transform(&adapter
->compare
, ns
);
4246 skb_tstamp_tx(skb
, &shhwtstamps
);
4252 * igb_clean_tx_irq - Reclaim resources after transmit completes
4253 * @adapter: board private structure
4254 * returns true if ring is completely cleaned
4256 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
4258 struct igb_adapter
*adapter
= tx_ring
->adapter
;
4259 struct net_device
*netdev
= adapter
->netdev
;
4260 struct e1000_hw
*hw
= &adapter
->hw
;
4261 struct igb_buffer
*buffer_info
;
4262 struct sk_buff
*skb
;
4263 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
4264 unsigned int total_bytes
= 0, total_packets
= 0;
4265 unsigned int i
, eop
, count
= 0;
4266 bool cleaned
= false;
4268 i
= tx_ring
->next_to_clean
;
4269 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4270 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4272 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
4273 (count
< tx_ring
->count
)) {
4274 for (cleaned
= false; !cleaned
; count
++) {
4275 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
4276 buffer_info
= &tx_ring
->buffer_info
[i
];
4277 cleaned
= (i
== eop
);
4278 skb
= buffer_info
->skb
;
4281 unsigned int segs
, bytecount
;
4282 /* gso_segs is currently only valid for tcp */
4283 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
4284 /* multiply data chunks by size of headers */
4285 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
4287 total_packets
+= segs
;
4288 total_bytes
+= bytecount
;
4290 igb_tx_hwtstamp(adapter
, skb
);
4293 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
4294 tx_desc
->wb
.status
= 0;
4297 if (i
== tx_ring
->count
)
4300 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4301 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4304 tx_ring
->next_to_clean
= i
;
4306 if (unlikely(count
&&
4307 netif_carrier_ok(netdev
) &&
4308 IGB_DESC_UNUSED(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
4309 /* Make sure that anybody stopping the queue after this
4310 * sees the new next_to_clean.
4313 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
4314 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
4315 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4316 ++adapter
->restart_queue
;
4320 if (tx_ring
->detect_tx_hung
) {
4321 /* Detect a transmit hang in hardware, this serializes the
4322 * check with the clearing of time_stamp and movement of i */
4323 tx_ring
->detect_tx_hung
= false;
4324 if (tx_ring
->buffer_info
[i
].time_stamp
&&
4325 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
4326 (adapter
->tx_timeout_factor
* HZ
))
4327 && !(rd32(E1000_STATUS
) &
4328 E1000_STATUS_TXOFF
)) {
4330 /* detected Tx unit hang */
4331 dev_err(&adapter
->pdev
->dev
,
4332 "Detected Tx Unit Hang\n"
4336 " next_to_use <%x>\n"
4337 " next_to_clean <%x>\n"
4338 "buffer_info[next_to_clean]\n"
4339 " time_stamp <%lx>\n"
4340 " next_to_watch <%x>\n"
4342 " desc.status <%x>\n",
4343 tx_ring
->queue_index
,
4344 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
4345 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
4346 tx_ring
->next_to_use
,
4347 tx_ring
->next_to_clean
,
4348 tx_ring
->buffer_info
[i
].time_stamp
,
4351 eop_desc
->wb
.status
);
4352 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4355 tx_ring
->total_bytes
+= total_bytes
;
4356 tx_ring
->total_packets
+= total_packets
;
4357 tx_ring
->tx_stats
.bytes
+= total_bytes
;
4358 tx_ring
->tx_stats
.packets
+= total_packets
;
4359 adapter
->net_stats
.tx_bytes
+= total_bytes
;
4360 adapter
->net_stats
.tx_packets
+= total_packets
;
4361 return (count
< tx_ring
->count
);
4365 * igb_receive_skb - helper function to handle rx indications
4366 * @ring: pointer to receive ring receving this packet
4367 * @status: descriptor status field as written by hardware
4368 * @rx_desc: receive descriptor containing vlan and type information.
4369 * @skb: pointer to sk_buff to be indicated to stack
4371 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
4372 union e1000_adv_rx_desc
* rx_desc
,
4373 struct sk_buff
*skb
)
4375 struct igb_adapter
* adapter
= ring
->adapter
;
4376 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
4378 skb_record_rx_queue(skb
, ring
->queue_index
);
4379 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
4381 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
4382 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
4385 napi_gro_receive(&ring
->napi
, skb
);
4388 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
4389 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
4391 netif_receive_skb(skb
);
4395 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
4396 u32 status_err
, struct sk_buff
*skb
)
4398 skb
->ip_summed
= CHECKSUM_NONE
;
4400 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
4401 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
4403 /* TCP/UDP checksum error bit is set */
4405 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
4406 /* let the stack verify checksum errors */
4407 adapter
->hw_csum_err
++;
4410 /* It must be a TCP or UDP packet with a valid checksum */
4411 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
4412 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
4414 adapter
->hw_csum_good
++;
4417 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
4418 int *work_done
, int budget
)
4420 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4421 struct net_device
*netdev
= adapter
->netdev
;
4422 struct e1000_hw
*hw
= &adapter
->hw
;
4423 struct pci_dev
*pdev
= adapter
->pdev
;
4424 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
4425 struct igb_buffer
*buffer_info
, *next_buffer
;
4426 struct sk_buff
*skb
;
4427 bool cleaned
= false;
4428 int cleaned_count
= 0;
4429 unsigned int total_bytes
= 0, total_packets
= 0;
4431 u32 length
, hlen
, staterr
;
4433 i
= rx_ring
->next_to_clean
;
4434 buffer_info
= &rx_ring
->buffer_info
[i
];
4435 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4436 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4438 while (staterr
& E1000_RXD_STAT_DD
) {
4439 if (*work_done
>= budget
)
4443 skb
= buffer_info
->skb
;
4444 prefetch(skb
->data
- NET_IP_ALIGN
);
4445 buffer_info
->skb
= NULL
;
4448 if (i
== rx_ring
->count
)
4450 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4452 next_buffer
= &rx_ring
->buffer_info
[i
];
4454 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
4458 if (!adapter
->rx_ps_hdr_size
) {
4459 pci_unmap_single(pdev
, buffer_info
->dma
,
4460 adapter
->rx_buffer_len
+
4462 PCI_DMA_FROMDEVICE
);
4463 skb_put(skb
, length
);
4467 /* HW will not DMA in data larger than the given buffer, even
4468 * if it parses the (NFS, of course) header to be larger. In
4469 * that case, it fills the header buffer and spills the rest
4472 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
4473 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
4474 if (hlen
> adapter
->rx_ps_hdr_size
)
4475 hlen
= adapter
->rx_ps_hdr_size
;
4477 if (!skb_shinfo(skb
)->nr_frags
) {
4478 pci_unmap_single(pdev
, buffer_info
->dma
,
4479 adapter
->rx_ps_hdr_size
+ NET_IP_ALIGN
,
4480 PCI_DMA_FROMDEVICE
);
4485 pci_unmap_page(pdev
, buffer_info
->page_dma
,
4486 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
4487 buffer_info
->page_dma
= 0;
4489 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
4491 buffer_info
->page_offset
,
4494 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
4495 (page_count(buffer_info
->page
) != 1))
4496 buffer_info
->page
= NULL
;
4498 get_page(buffer_info
->page
);
4501 skb
->data_len
+= length
;
4503 skb
->truesize
+= length
;
4506 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
4507 buffer_info
->skb
= next_buffer
->skb
;
4508 buffer_info
->dma
= next_buffer
->dma
;
4509 next_buffer
->skb
= skb
;
4510 next_buffer
->dma
= 0;
4515 * If this bit is set, then the RX registers contain
4516 * the time stamp. No other packet will be time
4517 * stamped until we read these registers, so read the
4518 * registers to make them available again. Because
4519 * only one packet can be time stamped at a time, we
4520 * know that the register values must belong to this
4521 * one here and therefore we don't need to compare
4522 * any of the additional attributes stored for it.
4524 * If nothing went wrong, then it should have a
4525 * skb_shared_tx that we can turn into a
4526 * skb_shared_hwtstamps.
4528 * TODO: can time stamping be triggered (thus locking
4529 * the registers) without the packet reaching this point
4530 * here? In that case RX time stamping would get stuck.
4532 * TODO: in "time stamp all packets" mode this bit is
4533 * not set. Need a global flag for this mode and then
4534 * always read the registers. Cannot be done without
4537 if (unlikely(staterr
& E1000_RXD_STAT_TS
)) {
4540 struct skb_shared_hwtstamps
*shhwtstamps
=
4543 WARN(!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
),
4544 "igb: no RX time stamp available for time stamped packet");
4545 regval
= rd32(E1000_RXSTMPL
);
4546 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
4547 ns
= timecounter_cyc2time(&adapter
->clock
, regval
);
4548 timecompare_update(&adapter
->compare
, ns
);
4549 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
4550 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
4551 shhwtstamps
->syststamp
=
4552 timecompare_transform(&adapter
->compare
, ns
);
4555 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
4556 dev_kfree_skb_irq(skb
);
4560 total_bytes
+= skb
->len
;
4563 igb_rx_checksum_adv(adapter
, staterr
, skb
);
4565 skb
->protocol
= eth_type_trans(skb
, netdev
);
4567 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
4570 rx_desc
->wb
.upper
.status_error
= 0;
4572 /* return some buffers to hardware, one at a time is too slow */
4573 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
4574 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4578 /* use prefetched values */
4580 buffer_info
= next_buffer
;
4581 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4584 rx_ring
->next_to_clean
= i
;
4585 cleaned_count
= IGB_DESC_UNUSED(rx_ring
);
4588 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4590 rx_ring
->total_packets
+= total_packets
;
4591 rx_ring
->total_bytes
+= total_bytes
;
4592 rx_ring
->rx_stats
.packets
+= total_packets
;
4593 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4594 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4595 adapter
->net_stats
.rx_packets
+= total_packets
;
4600 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4601 * @adapter: address of board private structure
4603 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4606 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4607 struct net_device
*netdev
= adapter
->netdev
;
4608 struct pci_dev
*pdev
= adapter
->pdev
;
4609 union e1000_adv_rx_desc
*rx_desc
;
4610 struct igb_buffer
*buffer_info
;
4611 struct sk_buff
*skb
;
4615 i
= rx_ring
->next_to_use
;
4616 buffer_info
= &rx_ring
->buffer_info
[i
];
4618 if (adapter
->rx_ps_hdr_size
)
4619 bufsz
= adapter
->rx_ps_hdr_size
;
4621 bufsz
= adapter
->rx_buffer_len
;
4622 bufsz
+= NET_IP_ALIGN
;
4624 while (cleaned_count
--) {
4625 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4627 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4628 if (!buffer_info
->page
) {
4629 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4630 if (!buffer_info
->page
) {
4631 adapter
->alloc_rx_buff_failed
++;
4634 buffer_info
->page_offset
= 0;
4636 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4638 buffer_info
->page_dma
=
4639 pci_map_page(pdev
, buffer_info
->page
,
4640 buffer_info
->page_offset
,
4642 PCI_DMA_FROMDEVICE
);
4645 if (!buffer_info
->skb
) {
4646 skb
= netdev_alloc_skb(netdev
, bufsz
);
4648 adapter
->alloc_rx_buff_failed
++;
4652 /* Make buffer alignment 2 beyond a 16 byte boundary
4653 * this will result in a 16 byte aligned IP header after
4654 * the 14 byte MAC header is removed
4656 skb_reserve(skb
, NET_IP_ALIGN
);
4658 buffer_info
->skb
= skb
;
4659 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4661 PCI_DMA_FROMDEVICE
);
4663 /* Refresh the desc even if buffer_addrs didn't change because
4664 * each write-back erases this info. */
4665 if (adapter
->rx_ps_hdr_size
) {
4666 rx_desc
->read
.pkt_addr
=
4667 cpu_to_le64(buffer_info
->page_dma
);
4668 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4670 rx_desc
->read
.pkt_addr
=
4671 cpu_to_le64(buffer_info
->dma
);
4672 rx_desc
->read
.hdr_addr
= 0;
4676 if (i
== rx_ring
->count
)
4678 buffer_info
= &rx_ring
->buffer_info
[i
];
4682 if (rx_ring
->next_to_use
!= i
) {
4683 rx_ring
->next_to_use
= i
;
4685 i
= (rx_ring
->count
- 1);
4689 /* Force memory writes to complete before letting h/w
4690 * know there are new descriptors to fetch. (Only
4691 * applicable for weak-ordered memory model archs,
4692 * such as IA-64). */
4694 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4704 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4706 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4707 struct mii_ioctl_data
*data
= if_mii(ifr
);
4709 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4714 data
->phy_id
= adapter
->hw
.phy
.addr
;
4717 if (!capable(CAP_NET_ADMIN
))
4719 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4731 * igb_hwtstamp_ioctl - control hardware time stamping
4736 * Outgoing time stamping can be enabled and disabled. Play nice and
4737 * disable it when requested, although it shouldn't case any overhead
4738 * when no packet needs it. At most one packet in the queue may be
4739 * marked for time stamping, otherwise it would be impossible to tell
4740 * for sure to which packet the hardware time stamp belongs.
4742 * Incoming time stamping has to be configured via the hardware
4743 * filters. Not all combinations are supported, in particular event
4744 * type has to be specified. Matching the kind of event packet is
4745 * not supported, with the exception of "all V2 events regardless of
4749 static int igb_hwtstamp_ioctl(struct net_device
*netdev
,
4750 struct ifreq
*ifr
, int cmd
)
4752 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4753 struct e1000_hw
*hw
= &adapter
->hw
;
4754 struct hwtstamp_config config
;
4755 u32 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4756 u32 tsync_rx_ctl_bit
= E1000_TSYNCRXCTL_ENABLED
;
4757 u32 tsync_rx_ctl_type
= 0;
4758 u32 tsync_rx_cfg
= 0;
4761 short port
= 319; /* PTP */
4764 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
4767 /* reserved for future extensions */
4771 switch (config
.tx_type
) {
4772 case HWTSTAMP_TX_OFF
:
4773 tsync_tx_ctl_bit
= 0;
4775 case HWTSTAMP_TX_ON
:
4776 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4782 switch (config
.rx_filter
) {
4783 case HWTSTAMP_FILTER_NONE
:
4784 tsync_rx_ctl_bit
= 0;
4786 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
4787 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
4788 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
4789 case HWTSTAMP_FILTER_ALL
:
4791 * register TSYNCRXCFG must be set, therefore it is not
4792 * possible to time stamp both Sync and Delay_Req messages
4793 * => fall back to time stamping all packets
4795 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_ALL
;
4796 config
.rx_filter
= HWTSTAMP_FILTER_ALL
;
4798 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
4799 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4800 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
4803 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
4804 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4805 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
4808 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
4809 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
4810 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4811 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
;
4814 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4816 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
4817 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
4818 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4819 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
;
4822 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4824 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
4825 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
4826 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
4827 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
4828 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
4835 /* enable/disable TX */
4836 regval
= rd32(E1000_TSYNCTXCTL
);
4837 regval
= (regval
& ~E1000_TSYNCTXCTL_ENABLED
) | tsync_tx_ctl_bit
;
4838 wr32(E1000_TSYNCTXCTL
, regval
);
4840 /* enable/disable RX, define which PTP packets are time stamped */
4841 regval
= rd32(E1000_TSYNCRXCTL
);
4842 regval
= (regval
& ~E1000_TSYNCRXCTL_ENABLED
) | tsync_rx_ctl_bit
;
4843 regval
= (regval
& ~0xE) | tsync_rx_ctl_type
;
4844 wr32(E1000_TSYNCRXCTL
, regval
);
4845 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
4848 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
4849 * (Ethertype to filter on)
4850 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
4851 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
4853 wr32(E1000_ETQF0
, is_l2
? 0x440088f7 : 0);
4855 /* L4 Queue Filter[0]: only filter by source and destination port */
4856 wr32(E1000_SPQF0
, htons(port
));
4857 wr32(E1000_IMIREXT(0), is_l4
?
4858 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
4859 wr32(E1000_IMIR(0), is_l4
?
4861 | (0<<16) /* immediate interrupt disabled */
4862 | 0 /* (1<<17) bit cleared: do not bypass
4863 destination port check */)
4865 wr32(E1000_FTQF0
, is_l4
?
4867 | (1<<15) /* VF not compared */
4868 | (1<<27) /* Enable Timestamping */
4869 | (7<<28) /* only source port filter enabled,
4870 source/target address and protocol
4872 : ((1<<15) | (15<<28) /* all mask bits set = filter not
4877 adapter
->hwtstamp_config
= config
;
4879 /* clear TX/RX time stamp registers, just to be sure */
4880 regval
= rd32(E1000_TXSTMPH
);
4881 regval
= rd32(E1000_RXSTMPH
);
4883 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
4893 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4899 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4901 return igb_hwtstamp_ioctl(netdev
, ifr
, cmd
);
4907 static void igb_vlan_rx_register(struct net_device
*netdev
,
4908 struct vlan_group
*grp
)
4910 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4911 struct e1000_hw
*hw
= &adapter
->hw
;
4914 igb_irq_disable(adapter
);
4915 adapter
->vlgrp
= grp
;
4918 /* enable VLAN tag insert/strip */
4919 ctrl
= rd32(E1000_CTRL
);
4920 ctrl
|= E1000_CTRL_VME
;
4921 wr32(E1000_CTRL
, ctrl
);
4923 /* enable VLAN receive filtering */
4924 rctl
= rd32(E1000_RCTL
);
4925 rctl
&= ~E1000_RCTL_CFIEN
;
4926 wr32(E1000_RCTL
, rctl
);
4927 igb_update_mng_vlan(adapter
);
4929 /* disable VLAN tag insert/strip */
4930 ctrl
= rd32(E1000_CTRL
);
4931 ctrl
&= ~E1000_CTRL_VME
;
4932 wr32(E1000_CTRL
, ctrl
);
4934 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4935 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4936 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4940 igb_rlpml_set(adapter
);
4942 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4943 igb_irq_enable(adapter
);
4946 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4948 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4949 struct e1000_hw
*hw
= &adapter
->hw
;
4950 int pf_id
= adapter
->vfs_allocated_count
;
4952 if ((hw
->mng_cookie
.status
&
4953 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4954 (vid
== adapter
->mng_vlan_id
))
4957 /* add vid to vlvf if sr-iov is enabled,
4958 * if that fails add directly to filter table */
4959 if (igb_vlvf_set(adapter
, vid
, true, pf_id
))
4960 igb_vfta_set(hw
, vid
, true);
4964 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4966 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4967 struct e1000_hw
*hw
= &adapter
->hw
;
4968 int pf_id
= adapter
->vfs_allocated_count
;
4970 igb_irq_disable(adapter
);
4971 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4973 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4974 igb_irq_enable(adapter
);
4976 if ((adapter
->hw
.mng_cookie
.status
&
4977 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4978 (vid
== adapter
->mng_vlan_id
)) {
4979 /* release control to f/w */
4980 igb_release_hw_control(adapter
);
4984 /* remove vid from vlvf if sr-iov is enabled,
4985 * if not in vlvf remove from vfta */
4986 if (igb_vlvf_set(adapter
, vid
, false, pf_id
))
4987 igb_vfta_set(hw
, vid
, false);
4990 static void igb_restore_vlan(struct igb_adapter
*adapter
)
4992 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
4994 if (adapter
->vlgrp
) {
4996 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
4997 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
4999 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
5004 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
5006 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
5010 /* Fiber NICs only allow 1000 gbps Full duplex */
5011 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
5012 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
5013 dev_err(&adapter
->pdev
->dev
,
5014 "Unsupported Speed/Duplex configuration\n");
5019 case SPEED_10
+ DUPLEX_HALF
:
5020 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
5022 case SPEED_10
+ DUPLEX_FULL
:
5023 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
5025 case SPEED_100
+ DUPLEX_HALF
:
5026 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
5028 case SPEED_100
+ DUPLEX_FULL
:
5029 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
5031 case SPEED_1000
+ DUPLEX_FULL
:
5033 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
5035 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
5037 dev_err(&adapter
->pdev
->dev
,
5038 "Unsupported Speed/Duplex configuration\n");
5044 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5046 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5047 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5048 struct e1000_hw
*hw
= &adapter
->hw
;
5049 u32 ctrl
, rctl
, status
;
5050 u32 wufc
= adapter
->wol
;
5055 netif_device_detach(netdev
);
5057 if (netif_running(netdev
))
5060 igb_reset_interrupt_capability(adapter
);
5062 igb_free_queues(adapter
);
5065 retval
= pci_save_state(pdev
);
5070 status
= rd32(E1000_STATUS
);
5071 if (status
& E1000_STATUS_LU
)
5072 wufc
&= ~E1000_WUFC_LNKC
;
5075 igb_setup_rctl(adapter
);
5076 igb_set_multi(netdev
);
5078 /* turn on all-multi mode if wake on multicast is enabled */
5079 if (wufc
& E1000_WUFC_MC
) {
5080 rctl
= rd32(E1000_RCTL
);
5081 rctl
|= E1000_RCTL_MPE
;
5082 wr32(E1000_RCTL
, rctl
);
5085 ctrl
= rd32(E1000_CTRL
);
5086 /* advertise wake from D3Cold */
5087 #define E1000_CTRL_ADVD3WUC 0x00100000
5088 /* phy power management enable */
5089 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5090 ctrl
|= E1000_CTRL_ADVD3WUC
;
5091 wr32(E1000_CTRL
, ctrl
);
5093 /* Allow time for pending master requests to run */
5094 igb_disable_pcie_master(&adapter
->hw
);
5096 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
5097 wr32(E1000_WUFC
, wufc
);
5100 wr32(E1000_WUFC
, 0);
5103 /* make sure adapter isn't asleep if manageability/wol is enabled */
5104 if (wufc
|| adapter
->en_mng_pt
) {
5105 pci_enable_wake(pdev
, PCI_D3hot
, 1);
5106 pci_enable_wake(pdev
, PCI_D3cold
, 1);
5108 igb_shutdown_fiber_serdes_link_82575(hw
);
5109 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5110 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5113 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5114 * would have already happened in close and is redundant. */
5115 igb_release_hw_control(adapter
);
5117 pci_disable_device(pdev
);
5119 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
5125 static int igb_resume(struct pci_dev
*pdev
)
5127 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5128 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5129 struct e1000_hw
*hw
= &adapter
->hw
;
5132 pci_set_power_state(pdev
, PCI_D0
);
5133 pci_restore_state(pdev
);
5135 err
= pci_enable_device_mem(pdev
);
5138 "igb: Cannot enable PCI device from suspend\n");
5141 pci_set_master(pdev
);
5143 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5144 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5146 igb_set_interrupt_capability(adapter
);
5148 if (igb_alloc_queues(adapter
)) {
5149 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
5153 /* e1000_power_up_phy(adapter); */
5157 /* let the f/w know that the h/w is now under the control of the
5159 igb_get_hw_control(adapter
);
5161 wr32(E1000_WUS
, ~0);
5163 if (netif_running(netdev
)) {
5164 err
= igb_open(netdev
);
5169 netif_device_attach(netdev
);
5175 static void igb_shutdown(struct pci_dev
*pdev
)
5177 igb_suspend(pdev
, PMSG_SUSPEND
);
5180 #ifdef CONFIG_NET_POLL_CONTROLLER
5182 * Polling 'interrupt' - used by things like netconsole to send skbs
5183 * without having to re-enable interrupts. It's not called while
5184 * the interrupt routine is executing.
5186 static void igb_netpoll(struct net_device
*netdev
)
5188 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5189 struct e1000_hw
*hw
= &adapter
->hw
;
5192 if (!adapter
->msix_entries
) {
5193 igb_irq_disable(adapter
);
5194 napi_schedule(&adapter
->rx_ring
[0].napi
);
5198 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5199 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
5200 wr32(E1000_EIMC
, tx_ring
->eims_value
);
5201 igb_clean_tx_irq(tx_ring
);
5202 wr32(E1000_EIMS
, tx_ring
->eims_value
);
5205 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5206 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
5207 wr32(E1000_EIMC
, rx_ring
->eims_value
);
5208 napi_schedule(&rx_ring
->napi
);
5211 #endif /* CONFIG_NET_POLL_CONTROLLER */
5214 * igb_io_error_detected - called when PCI error is detected
5215 * @pdev: Pointer to PCI device
5216 * @state: The current pci connection state
5218 * This function is called after a PCI bus error affecting
5219 * this device has been detected.
5221 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
5222 pci_channel_state_t state
)
5224 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5225 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5227 netif_device_detach(netdev
);
5229 if (netif_running(netdev
))
5231 pci_disable_device(pdev
);
5233 /* Request a slot slot reset. */
5234 return PCI_ERS_RESULT_NEED_RESET
;
5238 * igb_io_slot_reset - called after the pci bus has been reset.
5239 * @pdev: Pointer to PCI device
5241 * Restart the card from scratch, as if from a cold-boot. Implementation
5242 * resembles the first-half of the igb_resume routine.
5244 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
5246 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5247 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5248 struct e1000_hw
*hw
= &adapter
->hw
;
5249 pci_ers_result_t result
;
5252 if (pci_enable_device_mem(pdev
)) {
5254 "Cannot re-enable PCI device after reset.\n");
5255 result
= PCI_ERS_RESULT_DISCONNECT
;
5257 pci_set_master(pdev
);
5258 pci_restore_state(pdev
);
5260 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5261 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5264 wr32(E1000_WUS
, ~0);
5265 result
= PCI_ERS_RESULT_RECOVERED
;
5268 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
5270 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
5271 "failed 0x%0x\n", err
);
5272 /* non-fatal, continue */
5279 * igb_io_resume - called when traffic can start flowing again.
5280 * @pdev: Pointer to PCI device
5282 * This callback is called when the error recovery driver tells us that
5283 * its OK to resume normal operation. Implementation resembles the
5284 * second-half of the igb_resume routine.
5286 static void igb_io_resume(struct pci_dev
*pdev
)
5288 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5289 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5291 if (netif_running(netdev
)) {
5292 if (igb_up(adapter
)) {
5293 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
5298 netif_device_attach(netdev
);
5300 /* let the f/w know that the h/w is now under the control of the
5302 igb_get_hw_control(adapter
);
5305 static inline void igb_set_vmolr(struct e1000_hw
*hw
, int vfn
)
5309 reg_data
= rd32(E1000_VMOLR(vfn
));
5310 reg_data
|= E1000_VMOLR_BAM
| /* Accept broadcast */
5311 E1000_VMOLR_ROPE
| /* Accept packets matched in UTA */
5312 E1000_VMOLR_ROMPE
| /* Accept packets matched in MTA */
5313 E1000_VMOLR_AUPE
| /* Accept untagged packets */
5314 E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
5315 wr32(E1000_VMOLR(vfn
), reg_data
);
5318 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
5321 struct e1000_hw
*hw
= &adapter
->hw
;
5324 vmolr
= rd32(E1000_VMOLR(vfn
));
5325 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
5326 vmolr
|= size
| E1000_VMOLR_LPE
;
5327 wr32(E1000_VMOLR(vfn
), vmolr
);
5332 static inline void igb_set_rah_pool(struct e1000_hw
*hw
, int pool
, int entry
)
5336 reg_data
= rd32(E1000_RAH(entry
));
5337 reg_data
&= ~E1000_RAH_POOL_MASK
;
5338 reg_data
|= E1000_RAH_POOL_1
<< pool
;;
5339 wr32(E1000_RAH(entry
), reg_data
);
5342 static void igb_set_mc_list_pools(struct igb_adapter
*adapter
,
5343 int entry_count
, u16 total_rar_filters
)
5345 struct e1000_hw
*hw
= &adapter
->hw
;
5346 int i
= adapter
->vfs_allocated_count
+ 1;
5348 if ((i
+ entry_count
) < total_rar_filters
)
5349 total_rar_filters
= i
+ entry_count
;
5351 for (; i
< total_rar_filters
; i
++)
5352 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, i
);
5355 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
5356 int vf
, unsigned char *mac_addr
)
5358 struct e1000_hw
*hw
= &adapter
->hw
;
5359 int rar_entry
= vf
+ 1; /* VF MAC addresses start at entry 1 */
5361 igb_rar_set(hw
, mac_addr
, rar_entry
);
5363 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
5365 igb_set_rah_pool(hw
, vf
, rar_entry
);
5370 static void igb_vmm_control(struct igb_adapter
*adapter
)
5372 struct e1000_hw
*hw
= &adapter
->hw
;
5375 if (!adapter
->vfs_allocated_count
)
5378 /* VF's need PF reset indication before they
5379 * can send/receive mail */
5380 reg_data
= rd32(E1000_CTRL_EXT
);
5381 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
5382 wr32(E1000_CTRL_EXT
, reg_data
);
5384 igb_vmdq_set_loopback_pf(hw
, true);
5385 igb_vmdq_set_replication_pf(hw
, true);
5388 #ifdef CONFIG_PCI_IOV
5389 static ssize_t
igb_show_num_vfs(struct device
*dev
,
5390 struct device_attribute
*attr
, char *buf
)
5392 struct igb_adapter
*adapter
= netdev_priv(to_net_dev(dev
));
5394 return sprintf(buf
, "%d\n", adapter
->vfs_allocated_count
);
5397 static ssize_t
igb_set_num_vfs(struct device
*dev
,
5398 struct device_attribute
*attr
,
5399 const char *buf
, size_t count
)
5401 struct net_device
*netdev
= to_net_dev(dev
);
5402 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5403 struct e1000_hw
*hw
= &adapter
->hw
;
5404 struct pci_dev
*pdev
= adapter
->pdev
;
5405 unsigned int num_vfs
, i
;
5406 unsigned char mac_addr
[ETH_ALEN
];
5409 sscanf(buf
, "%u", &num_vfs
);
5414 /* value unchanged do nothing */
5415 if (num_vfs
== adapter
->vfs_allocated_count
)
5418 if (netdev
->flags
& IFF_UP
)
5421 igb_reset_interrupt_capability(adapter
);
5422 igb_free_queues(adapter
);
5423 adapter
->tx_ring
= NULL
;
5424 adapter
->rx_ring
= NULL
;
5425 adapter
->vfs_allocated_count
= 0;
5427 /* reclaim resources allocated to VFs since we are changing count */
5428 if (adapter
->vf_data
) {
5429 /* disable iov and allow time for transactions to clear */
5430 pci_disable_sriov(pdev
);
5433 kfree(adapter
->vf_data
);
5434 adapter
->vf_data
= NULL
;
5435 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
5437 dev_info(&pdev
->dev
, "IOV Disabled\n");
5441 adapter
->vf_data
= kcalloc(num_vfs
,
5442 sizeof(struct vf_data_storage
),
5444 if (!adapter
->vf_data
) {
5445 dev_err(&pdev
->dev
, "Could not allocate VF private "
5446 "data - IOV enable failed\n");
5448 err
= pci_enable_sriov(pdev
, num_vfs
);
5450 adapter
->vfs_allocated_count
= num_vfs
;
5451 dev_info(&pdev
->dev
, "%d vfs allocated\n", num_vfs
);
5452 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5453 random_ether_addr(mac_addr
);
5454 igb_set_vf_mac(adapter
, i
, mac_addr
);
5457 kfree(adapter
->vf_data
);
5458 adapter
->vf_data
= NULL
;
5463 igb_set_interrupt_capability(adapter
);
5464 igb_alloc_queues(adapter
);
5467 if (netdev
->flags
& IFF_UP
)
5472 #endif /* CONFIG_PCI_IOV */