1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
45 #include <linux/aer.h>
47 #include <linux/dca.h>
51 #define DRV_VERSION "1.2.45-k2"
52 char igb_driver_name
[] = "igb";
53 char igb_driver_version
[] = DRV_VERSION
;
54 static const char igb_driver_string
[] =
55 "Intel(R) Gigabit Ethernet Network Driver";
56 static const char igb_copyright
[] = "Copyright (c) 2008 Intel Corporation.";
58 static const struct e1000_info
*igb_info_tbl
[] = {
59 [board_82575
] = &e1000_82575_info
,
62 static struct pci_device_id igb_pci_tbl
[] = {
63 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
69 /* required last entry */
73 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
75 void igb_reset(struct igb_adapter
*);
76 static int igb_setup_all_tx_resources(struct igb_adapter
*);
77 static int igb_setup_all_rx_resources(struct igb_adapter
*);
78 static void igb_free_all_tx_resources(struct igb_adapter
*);
79 static void igb_free_all_rx_resources(struct igb_adapter
*);
80 void igb_update_stats(struct igb_adapter
*);
81 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
82 static void __devexit
igb_remove(struct pci_dev
*pdev
);
83 static int igb_sw_init(struct igb_adapter
*);
84 static int igb_open(struct net_device
*);
85 static int igb_close(struct net_device
*);
86 static void igb_configure_tx(struct igb_adapter
*);
87 static void igb_configure_rx(struct igb_adapter
*);
88 static void igb_setup_rctl(struct igb_adapter
*);
89 static void igb_clean_all_tx_rings(struct igb_adapter
*);
90 static void igb_clean_all_rx_rings(struct igb_adapter
*);
91 static void igb_clean_tx_ring(struct igb_ring
*);
92 static void igb_clean_rx_ring(struct igb_ring
*);
93 static void igb_set_multi(struct net_device
*);
94 static void igb_update_phy_info(unsigned long);
95 static void igb_watchdog(unsigned long);
96 static void igb_watchdog_task(struct work_struct
*);
97 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
99 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
100 static struct net_device_stats
*igb_get_stats(struct net_device
*);
101 static int igb_change_mtu(struct net_device
*, int);
102 static int igb_set_mac(struct net_device
*, void *);
103 static irqreturn_t
igb_intr(int irq
, void *);
104 static irqreturn_t
igb_intr_msi(int irq
, void *);
105 static irqreturn_t
igb_msix_other(int irq
, void *);
106 static irqreturn_t
igb_msix_rx(int irq
, void *);
107 static irqreturn_t
igb_msix_tx(int irq
, void *);
108 static int igb_clean_rx_ring_msix(struct napi_struct
*, int);
109 #ifdef CONFIG_IGB_DCA
110 static void igb_update_rx_dca(struct igb_ring
*);
111 static void igb_update_tx_dca(struct igb_ring
*);
112 static void igb_setup_dca(struct igb_adapter
*);
113 #endif /* CONFIG_IGB_DCA */
114 static bool igb_clean_tx_irq(struct igb_ring
*);
115 static int igb_poll(struct napi_struct
*, int);
116 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
117 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
118 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
119 static void igb_tx_timeout(struct net_device
*);
120 static void igb_reset_task(struct work_struct
*);
121 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
122 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
123 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
124 static void igb_restore_vlan(struct igb_adapter
*);
126 static int igb_suspend(struct pci_dev
*, pm_message_t
);
128 static int igb_resume(struct pci_dev
*);
130 static void igb_shutdown(struct pci_dev
*);
131 #ifdef CONFIG_IGB_DCA
132 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
133 static struct notifier_block dca_notifier
= {
134 .notifier_call
= igb_notify_dca
,
140 #ifdef CONFIG_NET_POLL_CONTROLLER
141 /* for netdump / net console */
142 static void igb_netpoll(struct net_device
*);
145 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
146 pci_channel_state_t
);
147 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
148 static void igb_io_resume(struct pci_dev
*);
150 static struct pci_error_handlers igb_err_handler
= {
151 .error_detected
= igb_io_error_detected
,
152 .slot_reset
= igb_io_slot_reset
,
153 .resume
= igb_io_resume
,
157 static struct pci_driver igb_driver
= {
158 .name
= igb_driver_name
,
159 .id_table
= igb_pci_tbl
,
161 .remove
= __devexit_p(igb_remove
),
163 /* Power Managment Hooks */
164 .suspend
= igb_suspend
,
165 .resume
= igb_resume
,
167 .shutdown
= igb_shutdown
,
168 .err_handler
= &igb_err_handler
171 static int global_quad_port_a
; /* global quad port a indication */
173 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
174 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION
);
180 * igb_get_hw_dev_name - return device name string
181 * used by hardware layer to print debugging information
183 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
185 struct igb_adapter
*adapter
= hw
->back
;
186 return adapter
->netdev
->name
;
191 * igb_init_module - Driver Registration Routine
193 * igb_init_module is the first routine called when the driver is
194 * loaded. All it does is register with the PCI subsystem.
196 static int __init
igb_init_module(void)
199 printk(KERN_INFO
"%s - version %s\n",
200 igb_driver_string
, igb_driver_version
);
202 printk(KERN_INFO
"%s\n", igb_copyright
);
204 global_quad_port_a
= 0;
206 #ifdef CONFIG_IGB_DCA
207 dca_register_notify(&dca_notifier
);
210 ret
= pci_register_driver(&igb_driver
);
214 module_init(igb_init_module
);
217 * igb_exit_module - Driver Exit Cleanup Routine
219 * igb_exit_module is called just before the driver is removed
222 static void __exit
igb_exit_module(void)
224 #ifdef CONFIG_IGB_DCA
225 dca_unregister_notify(&dca_notifier
);
227 pci_unregister_driver(&igb_driver
);
230 module_exit(igb_exit_module
);
232 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
234 * igb_cache_ring_register - Descriptor ring to register mapping
235 * @adapter: board private structure to initialize
237 * Once we know the feature-set enabled for the device, we'll cache
238 * the register offset the descriptor ring is assigned to.
240 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
244 switch (adapter
->hw
.mac
.type
) {
246 /* The queues are allocated for virtualization such that VF 0
247 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
248 * In order to avoid collision we start at the first free queue
249 * and continue consuming queues in the same sequence
251 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
252 adapter
->rx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
253 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
254 adapter
->tx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
258 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
259 adapter
->rx_ring
[i
].reg_idx
= i
;
260 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
261 adapter
->tx_ring
[i
].reg_idx
= i
;
267 * igb_alloc_queues - Allocate memory for all rings
268 * @adapter: board private structure to initialize
270 * We allocate one ring per queue at run-time since we don't know the
271 * number of queues at compile-time.
273 static int igb_alloc_queues(struct igb_adapter
*adapter
)
277 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
278 sizeof(struct igb_ring
), GFP_KERNEL
);
279 if (!adapter
->tx_ring
)
282 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
283 sizeof(struct igb_ring
), GFP_KERNEL
);
284 if (!adapter
->rx_ring
) {
285 kfree(adapter
->tx_ring
);
289 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
291 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
292 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
293 ring
->count
= adapter
->tx_ring_count
;
294 ring
->adapter
= adapter
;
295 ring
->queue_index
= i
;
297 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
298 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
299 ring
->count
= adapter
->rx_ring_count
;
300 ring
->adapter
= adapter
;
301 ring
->queue_index
= i
;
302 ring
->itr_register
= E1000_ITR
;
304 /* set a default napi handler for each rx_ring */
305 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
308 igb_cache_ring_register(adapter
);
312 static void igb_free_queues(struct igb_adapter
*adapter
)
316 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
317 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
319 kfree(adapter
->tx_ring
);
320 kfree(adapter
->rx_ring
);
323 #define IGB_N0_QUEUE -1
324 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
325 int tx_queue
, int msix_vector
)
328 struct e1000_hw
*hw
= &adapter
->hw
;
331 switch (hw
->mac
.type
) {
333 /* The 82575 assigns vectors using a bitmask, which matches the
334 bitmask for the EICR/EIMS/EIMC registers. To assign one
335 or more queues to a vector, we write the appropriate bits
336 into the MSIXBM register for that vector. */
337 if (rx_queue
> IGB_N0_QUEUE
) {
338 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
339 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
341 if (tx_queue
> IGB_N0_QUEUE
) {
342 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
343 adapter
->tx_ring
[tx_queue
].eims_value
=
344 E1000_EICR_TX_QUEUE0
<< tx_queue
;
346 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
349 /* 82576 uses a table-based method for assigning vectors.
350 Each queue has a single entry in the table to which we write
351 a vector number along with a "valid" bit. Sadly, the layout
352 of the table is somewhat counterintuitive. */
353 if (rx_queue
> IGB_N0_QUEUE
) {
354 index
= (rx_queue
>> 1);
355 ivar
= array_rd32(E1000_IVAR0
, index
);
356 if (rx_queue
& 0x1) {
357 /* vector goes into third byte of register */
358 ivar
= ivar
& 0xFF00FFFF;
359 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
361 /* vector goes into low byte of register */
362 ivar
= ivar
& 0xFFFFFF00;
363 ivar
|= msix_vector
| E1000_IVAR_VALID
;
365 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
366 array_wr32(E1000_IVAR0
, index
, ivar
);
368 if (tx_queue
> IGB_N0_QUEUE
) {
369 index
= (tx_queue
>> 1);
370 ivar
= array_rd32(E1000_IVAR0
, index
);
371 if (tx_queue
& 0x1) {
372 /* vector goes into high byte of register */
373 ivar
= ivar
& 0x00FFFFFF;
374 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
376 /* vector goes into second byte of register */
377 ivar
= ivar
& 0xFFFF00FF;
378 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
380 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
381 array_wr32(E1000_IVAR0
, index
, ivar
);
391 * igb_configure_msix - Configure MSI-X hardware
393 * igb_configure_msix sets up the hardware to properly
394 * generate MSI-X interrupts.
396 static void igb_configure_msix(struct igb_adapter
*adapter
)
400 struct e1000_hw
*hw
= &adapter
->hw
;
402 adapter
->eims_enable_mask
= 0;
403 if (hw
->mac
.type
== e1000_82576
)
404 /* Turn on MSI-X capability first, or our settings
405 * won't stick. And it will take days to debug. */
406 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
407 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
410 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
411 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
412 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
413 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
414 if (tx_ring
->itr_val
)
415 writel(tx_ring
->itr_val
,
416 hw
->hw_addr
+ tx_ring
->itr_register
);
418 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
421 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
422 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
423 rx_ring
->buddy
= NULL
;
424 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
425 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
426 if (rx_ring
->itr_val
)
427 writel(rx_ring
->itr_val
,
428 hw
->hw_addr
+ rx_ring
->itr_register
);
430 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
434 /* set vector for other causes, i.e. link changes */
435 switch (hw
->mac
.type
) {
437 array_wr32(E1000_MSIXBM(0), vector
++,
440 tmp
= rd32(E1000_CTRL_EXT
);
441 /* enable MSI-X PBA support*/
442 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
444 /* Auto-Mask interrupts upon ICR read. */
445 tmp
|= E1000_CTRL_EXT_EIAME
;
446 tmp
|= E1000_CTRL_EXT_IRCA
;
448 wr32(E1000_CTRL_EXT
, tmp
);
449 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
450 adapter
->eims_other
= E1000_EIMS_OTHER
;
455 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
456 wr32(E1000_IVAR_MISC
, tmp
);
458 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
459 adapter
->eims_other
= 1 << (vector
- 1);
462 /* do nothing, since nothing else supports MSI-X */
464 } /* switch (hw->mac.type) */
469 * igb_request_msix - Initialize MSI-X interrupts
471 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
474 static int igb_request_msix(struct igb_adapter
*adapter
)
476 struct net_device
*netdev
= adapter
->netdev
;
477 int i
, err
= 0, vector
= 0;
481 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
482 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
483 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
484 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
485 &igb_msix_tx
, 0, ring
->name
,
486 &(adapter
->tx_ring
[i
]));
489 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
490 ring
->itr_val
= 976; /* ~4000 ints/sec */
493 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
494 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
495 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
496 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
498 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
499 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
500 &igb_msix_rx
, 0, ring
->name
,
501 &(adapter
->rx_ring
[i
]));
504 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
505 ring
->itr_val
= adapter
->itr
;
506 /* overwrite the poll routine for MSIX, we've already done
508 ring
->napi
.poll
= &igb_clean_rx_ring_msix
;
512 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
513 &igb_msix_other
, 0, netdev
->name
, netdev
);
517 igb_configure_msix(adapter
);
523 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
525 if (adapter
->msix_entries
) {
526 pci_disable_msix(adapter
->pdev
);
527 kfree(adapter
->msix_entries
);
528 adapter
->msix_entries
= NULL
;
529 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
530 pci_disable_msi(adapter
->pdev
);
536 * igb_set_interrupt_capability - set MSI or MSI-X if supported
538 * Attempt to configure interrupts using the best available
539 * capabilities of the hardware and kernel.
541 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
546 /* Number of supported queues. */
547 /* Having more queues than CPUs doesn't make sense. */
548 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
549 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
551 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
552 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
554 if (!adapter
->msix_entries
)
557 for (i
= 0; i
< numvecs
; i
++)
558 adapter
->msix_entries
[i
].entry
= i
;
560 err
= pci_enable_msix(adapter
->pdev
,
561 adapter
->msix_entries
,
566 igb_reset_interrupt_capability(adapter
);
568 /* If we can't do MSI-X, try MSI */
570 adapter
->num_rx_queues
= 1;
571 adapter
->num_tx_queues
= 1;
572 if (!pci_enable_msi(adapter
->pdev
))
573 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
575 /* Notify the stack of the (possibly) reduced Tx Queue count. */
576 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
581 * igb_request_irq - initialize interrupts
583 * Attempts to configure interrupts using the best available
584 * capabilities of the hardware and kernel.
586 static int igb_request_irq(struct igb_adapter
*adapter
)
588 struct net_device
*netdev
= adapter
->netdev
;
589 struct e1000_hw
*hw
= &adapter
->hw
;
592 if (adapter
->msix_entries
) {
593 err
= igb_request_msix(adapter
);
596 /* fall back to MSI */
597 igb_reset_interrupt_capability(adapter
);
598 if (!pci_enable_msi(adapter
->pdev
))
599 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
600 igb_free_all_tx_resources(adapter
);
601 igb_free_all_rx_resources(adapter
);
602 adapter
->num_rx_queues
= 1;
603 igb_alloc_queues(adapter
);
605 switch (hw
->mac
.type
) {
607 wr32(E1000_MSIXBM(0),
608 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
611 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
618 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
619 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
620 netdev
->name
, netdev
);
623 /* fall back to legacy interrupts */
624 igb_reset_interrupt_capability(adapter
);
625 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
628 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
629 netdev
->name
, netdev
);
632 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
639 static void igb_free_irq(struct igb_adapter
*adapter
)
641 struct net_device
*netdev
= adapter
->netdev
;
643 if (adapter
->msix_entries
) {
646 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
647 free_irq(adapter
->msix_entries
[vector
++].vector
,
648 &(adapter
->tx_ring
[i
]));
649 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
650 free_irq(adapter
->msix_entries
[vector
++].vector
,
651 &(adapter
->rx_ring
[i
]));
653 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
657 free_irq(adapter
->pdev
->irq
, netdev
);
661 * igb_irq_disable - Mask off interrupt generation on the NIC
662 * @adapter: board private structure
664 static void igb_irq_disable(struct igb_adapter
*adapter
)
666 struct e1000_hw
*hw
= &adapter
->hw
;
668 if (adapter
->msix_entries
) {
670 wr32(E1000_EIMC
, ~0);
677 synchronize_irq(adapter
->pdev
->irq
);
681 * igb_irq_enable - Enable default interrupt generation settings
682 * @adapter: board private structure
684 static void igb_irq_enable(struct igb_adapter
*adapter
)
686 struct e1000_hw
*hw
= &adapter
->hw
;
688 if (adapter
->msix_entries
) {
689 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
690 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
691 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
692 wr32(E1000_IMS
, E1000_IMS_LSC
);
694 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
695 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
699 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
701 struct net_device
*netdev
= adapter
->netdev
;
702 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
703 u16 old_vid
= adapter
->mng_vlan_id
;
704 if (adapter
->vlgrp
) {
705 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
706 if (adapter
->hw
.mng_cookie
.status
&
707 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
708 igb_vlan_rx_add_vid(netdev
, vid
);
709 adapter
->mng_vlan_id
= vid
;
711 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
713 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
715 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
716 igb_vlan_rx_kill_vid(netdev
, old_vid
);
718 adapter
->mng_vlan_id
= vid
;
723 * igb_release_hw_control - release control of the h/w to f/w
724 * @adapter: address of board private structure
726 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
727 * For ASF and Pass Through versions of f/w this means that the
728 * driver is no longer loaded.
731 static void igb_release_hw_control(struct igb_adapter
*adapter
)
733 struct e1000_hw
*hw
= &adapter
->hw
;
736 /* Let firmware take over control of h/w */
737 ctrl_ext
= rd32(E1000_CTRL_EXT
);
739 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
744 * igb_get_hw_control - get control of the h/w from f/w
745 * @adapter: address of board private structure
747 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
748 * For ASF and Pass Through versions of f/w this means that
749 * the driver is loaded.
752 static void igb_get_hw_control(struct igb_adapter
*adapter
)
754 struct e1000_hw
*hw
= &adapter
->hw
;
757 /* Let firmware know the driver has taken over */
758 ctrl_ext
= rd32(E1000_CTRL_EXT
);
760 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
764 * igb_configure - configure the hardware for RX and TX
765 * @adapter: private board structure
767 static void igb_configure(struct igb_adapter
*adapter
)
769 struct net_device
*netdev
= adapter
->netdev
;
772 igb_get_hw_control(adapter
);
773 igb_set_multi(netdev
);
775 igb_restore_vlan(adapter
);
777 igb_configure_tx(adapter
);
778 igb_setup_rctl(adapter
);
779 igb_configure_rx(adapter
);
781 igb_rx_fifo_flush_82575(&adapter
->hw
);
783 /* call IGB_DESC_UNUSED which always leaves
784 * at least 1 descriptor unused to make sure
785 * next_to_use != next_to_clean */
786 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
787 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
788 igb_alloc_rx_buffers_adv(ring
, IGB_DESC_UNUSED(ring
));
792 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
797 * igb_up - Open the interface and prepare it to handle traffic
798 * @adapter: board private structure
801 int igb_up(struct igb_adapter
*adapter
)
803 struct e1000_hw
*hw
= &adapter
->hw
;
806 /* hardware has been reset, we need to reload some things */
807 igb_configure(adapter
);
809 clear_bit(__IGB_DOWN
, &adapter
->state
);
811 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
812 napi_enable(&adapter
->rx_ring
[i
].napi
);
813 if (adapter
->msix_entries
)
814 igb_configure_msix(adapter
);
816 /* Clear any pending interrupts. */
818 igb_irq_enable(adapter
);
820 /* Fire a link change interrupt to start the watchdog. */
821 wr32(E1000_ICS
, E1000_ICS_LSC
);
825 void igb_down(struct igb_adapter
*adapter
)
827 struct e1000_hw
*hw
= &adapter
->hw
;
828 struct net_device
*netdev
= adapter
->netdev
;
832 /* signal that we're down so the interrupt handler does not
833 * reschedule our watchdog timer */
834 set_bit(__IGB_DOWN
, &adapter
->state
);
836 /* disable receives in the hardware */
837 rctl
= rd32(E1000_RCTL
);
838 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
839 /* flush and sleep below */
841 netif_tx_stop_all_queues(netdev
);
843 /* disable transmits in the hardware */
844 tctl
= rd32(E1000_TCTL
);
845 tctl
&= ~E1000_TCTL_EN
;
846 wr32(E1000_TCTL
, tctl
);
847 /* flush both disables and wait for them to finish */
851 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
852 napi_disable(&adapter
->rx_ring
[i
].napi
);
854 igb_irq_disable(adapter
);
856 del_timer_sync(&adapter
->watchdog_timer
);
857 del_timer_sync(&adapter
->phy_info_timer
);
859 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
860 netif_carrier_off(netdev
);
861 adapter
->link_speed
= 0;
862 adapter
->link_duplex
= 0;
864 if (!pci_channel_offline(adapter
->pdev
))
866 igb_clean_all_tx_rings(adapter
);
867 igb_clean_all_rx_rings(adapter
);
870 void igb_reinit_locked(struct igb_adapter
*adapter
)
872 WARN_ON(in_interrupt());
873 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
877 clear_bit(__IGB_RESETTING
, &adapter
->state
);
880 void igb_reset(struct igb_adapter
*adapter
)
882 struct e1000_hw
*hw
= &adapter
->hw
;
883 struct e1000_mac_info
*mac
= &hw
->mac
;
884 struct e1000_fc_info
*fc
= &hw
->fc
;
885 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
888 /* Repartition Pba for greater than 9k mtu
889 * To take effect CTRL.RST is required.
891 if (mac
->type
!= e1000_82576
) {
898 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
899 (mac
->type
< e1000_82576
)) {
900 /* adjust PBA for jumbo frames */
901 wr32(E1000_PBA
, pba
);
903 /* To maintain wire speed transmits, the Tx FIFO should be
904 * large enough to accommodate two full transmit packets,
905 * rounded up to the next 1KB and expressed in KB. Likewise,
906 * the Rx FIFO should be large enough to accommodate at least
907 * one full receive packet and is similarly rounded up and
908 * expressed in KB. */
909 pba
= rd32(E1000_PBA
);
910 /* upper 16 bits has Tx packet buffer allocation size in KB */
911 tx_space
= pba
>> 16;
912 /* lower 16 bits has Rx packet buffer allocation size in KB */
914 /* the tx fifo also stores 16 bytes of information about the tx
915 * but don't include ethernet FCS because hardware appends it */
916 min_tx_space
= (adapter
->max_frame_size
+
917 sizeof(struct e1000_tx_desc
) -
919 min_tx_space
= ALIGN(min_tx_space
, 1024);
921 /* software strips receive CRC, so leave room for it */
922 min_rx_space
= adapter
->max_frame_size
;
923 min_rx_space
= ALIGN(min_rx_space
, 1024);
926 /* If current Tx allocation is less than the min Tx FIFO size,
927 * and the min Tx FIFO size is less than the current Rx FIFO
928 * allocation, take space away from current Rx allocation */
929 if (tx_space
< min_tx_space
&&
930 ((min_tx_space
- tx_space
) < pba
)) {
931 pba
= pba
- (min_tx_space
- tx_space
);
933 /* if short on rx space, rx wins and must trump tx
935 if (pba
< min_rx_space
)
938 wr32(E1000_PBA
, pba
);
941 /* flow control settings */
942 /* The high water mark must be low enough to fit one full frame
943 * (or the size used for early receive) above it in the Rx FIFO.
944 * Set it to the lower of:
945 * - 90% of the Rx FIFO size, or
946 * - the full Rx FIFO size minus one full frame */
947 hwm
= min(((pba
<< 10) * 9 / 10),
948 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
950 if (mac
->type
< e1000_82576
) {
951 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
952 fc
->low_water
= fc
->high_water
- 8;
954 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
955 fc
->low_water
= fc
->high_water
- 16;
957 fc
->pause_time
= 0xFFFF;
959 fc
->type
= fc
->original_type
;
961 /* Allow time for pending master requests to run */
962 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
965 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
966 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
968 igb_update_mng_vlan(adapter
);
970 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
971 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
973 igb_reset_adaptive(&adapter
->hw
);
974 igb_get_phy_info(&adapter
->hw
);
977 static const struct net_device_ops igb_netdev_ops
= {
978 .ndo_open
= igb_open
,
979 .ndo_stop
= igb_close
,
980 .ndo_start_xmit
= igb_xmit_frame_adv
,
981 .ndo_get_stats
= igb_get_stats
,
982 .ndo_set_multicast_list
= igb_set_multi
,
983 .ndo_set_mac_address
= igb_set_mac
,
984 .ndo_change_mtu
= igb_change_mtu
,
985 .ndo_do_ioctl
= igb_ioctl
,
986 .ndo_tx_timeout
= igb_tx_timeout
,
987 .ndo_validate_addr
= eth_validate_addr
,
988 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
989 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
990 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
991 #ifdef CONFIG_NET_POLL_CONTROLLER
992 .ndo_poll_controller
= igb_netpoll
,
997 * igb_probe - Device Initialization Routine
998 * @pdev: PCI device information struct
999 * @ent: entry in igb_pci_tbl
1001 * Returns 0 on success, negative on failure
1003 * igb_probe initializes an adapter identified by a pci_dev structure.
1004 * The OS initialization, configuring of the adapter private structure,
1005 * and a hardware reset occur.
1007 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1008 const struct pci_device_id
*ent
)
1010 struct net_device
*netdev
;
1011 struct igb_adapter
*adapter
;
1012 struct e1000_hw
*hw
;
1013 struct pci_dev
*us_dev
;
1014 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1015 unsigned long mmio_start
, mmio_len
;
1016 int i
, err
, pci_using_dac
, pos
;
1017 u16 eeprom_data
= 0, state
= 0;
1018 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1021 err
= pci_enable_device_mem(pdev
);
1026 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1028 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1032 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1034 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1036 dev_err(&pdev
->dev
, "No usable DMA "
1037 "configuration, aborting\n");
1043 /* 82575 requires that the pci-e link partner disable the L0s state */
1044 switch (pdev
->device
) {
1045 case E1000_DEV_ID_82575EB_COPPER
:
1046 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1047 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1048 us_dev
= pdev
->bus
->self
;
1049 pos
= pci_find_capability(us_dev
, PCI_CAP_ID_EXP
);
1051 pci_read_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1053 state
&= ~PCIE_LINK_STATE_L0S
;
1054 pci_write_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1056 dev_info(&pdev
->dev
,
1057 "Disabling ASPM L0s upstream switch port %s\n",
1064 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1070 err
= pci_enable_pcie_error_reporting(pdev
);
1072 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1074 /* non-fatal, continue */
1077 pci_set_master(pdev
);
1078 pci_save_state(pdev
);
1081 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
), IGB_MAX_TX_QUEUES
);
1083 goto err_alloc_etherdev
;
1085 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1087 pci_set_drvdata(pdev
, netdev
);
1088 adapter
= netdev_priv(netdev
);
1089 adapter
->netdev
= netdev
;
1090 adapter
->pdev
= pdev
;
1093 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1095 mmio_start
= pci_resource_start(pdev
, 0);
1096 mmio_len
= pci_resource_len(pdev
, 0);
1099 adapter
->hw
.hw_addr
= ioremap(mmio_start
, mmio_len
);
1100 if (!adapter
->hw
.hw_addr
)
1103 netdev
->netdev_ops
= &igb_netdev_ops
;
1104 igb_set_ethtool_ops(netdev
);
1105 netdev
->watchdog_timeo
= 5 * HZ
;
1107 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1109 netdev
->mem_start
= mmio_start
;
1110 netdev
->mem_end
= mmio_start
+ mmio_len
;
1112 /* PCI config space info */
1113 hw
->vendor_id
= pdev
->vendor
;
1114 hw
->device_id
= pdev
->device
;
1115 hw
->revision_id
= pdev
->revision
;
1116 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1117 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1119 /* setup the private structure */
1121 /* Copy the default MAC, PHY and NVM function pointers */
1122 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1123 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1124 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1125 /* Initialize skew-specific constants */
1126 err
= ei
->get_invariants(hw
);
1130 err
= igb_sw_init(adapter
);
1134 igb_get_bus_info_pcie(hw
);
1137 switch (hw
->mac
.type
) {
1139 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1146 hw
->phy
.autoneg_wait_to_complete
= false;
1147 hw
->mac
.adaptive_ifs
= true;
1149 /* Copper options */
1150 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1151 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1152 hw
->phy
.disable_polarity_correction
= false;
1153 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1156 if (igb_check_reset_block(hw
))
1157 dev_info(&pdev
->dev
,
1158 "PHY reset is blocked due to SOL/IDER session.\n");
1160 netdev
->features
= NETIF_F_SG
|
1162 NETIF_F_HW_VLAN_TX
|
1163 NETIF_F_HW_VLAN_RX
|
1164 NETIF_F_HW_VLAN_FILTER
;
1166 netdev
->features
|= NETIF_F_TSO
;
1167 netdev
->features
|= NETIF_F_TSO6
;
1169 #ifdef CONFIG_IGB_LRO
1170 netdev
->features
|= NETIF_F_GRO
;
1173 netdev
->vlan_features
|= NETIF_F_TSO
;
1174 netdev
->vlan_features
|= NETIF_F_TSO6
;
1175 netdev
->vlan_features
|= NETIF_F_HW_CSUM
;
1176 netdev
->vlan_features
|= NETIF_F_SG
;
1179 netdev
->features
|= NETIF_F_HIGHDMA
;
1181 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1183 /* before reading the NVM, reset the controller to put the device in a
1184 * known good starting state */
1185 hw
->mac
.ops
.reset_hw(hw
);
1187 /* make sure the NVM is good */
1188 if (igb_validate_nvm_checksum(hw
) < 0) {
1189 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1194 /* copy the MAC address out of the NVM */
1195 if (hw
->mac
.ops
.read_mac_addr(hw
))
1196 dev_err(&pdev
->dev
, "NVM Read Error\n");
1198 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1199 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1201 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1202 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1207 init_timer(&adapter
->watchdog_timer
);
1208 adapter
->watchdog_timer
.function
= &igb_watchdog
;
1209 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1211 init_timer(&adapter
->phy_info_timer
);
1212 adapter
->phy_info_timer
.function
= &igb_update_phy_info
;
1213 adapter
->phy_info_timer
.data
= (unsigned long) adapter
;
1215 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1216 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1218 /* Initialize link & ring properties that are user-changeable */
1219 adapter
->tx_ring
->count
= 256;
1220 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
1221 adapter
->tx_ring
[i
].count
= adapter
->tx_ring
->count
;
1222 adapter
->rx_ring
->count
= 256;
1223 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1224 adapter
->rx_ring
[i
].count
= adapter
->rx_ring
->count
;
1226 adapter
->fc_autoneg
= true;
1227 hw
->mac
.autoneg
= true;
1228 hw
->phy
.autoneg_advertised
= 0x2f;
1230 hw
->fc
.original_type
= e1000_fc_default
;
1231 hw
->fc
.type
= e1000_fc_default
;
1233 adapter
->itr_setting
= 3;
1234 adapter
->itr
= IGB_START_ITR
;
1236 igb_validate_mdi_setting(hw
);
1238 adapter
->rx_csum
= 1;
1240 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1241 * enable the ACPI Magic Packet filter
1244 if (hw
->bus
.func
== 0 ||
1245 hw
->device_id
== E1000_DEV_ID_82575EB_COPPER
)
1246 hw
->nvm
.ops
.read_nvm(hw
, NVM_INIT_CONTROL3_PORT_A
, 1,
1249 if (eeprom_data
& eeprom_apme_mask
)
1250 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1252 /* now that we have the eeprom settings, apply the special cases where
1253 * the eeprom may be wrong or the board simply won't support wake on
1254 * lan on a particular port */
1255 switch (pdev
->device
) {
1256 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1257 adapter
->eeprom_wol
= 0;
1259 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1260 case E1000_DEV_ID_82576_FIBER
:
1261 case E1000_DEV_ID_82576_SERDES
:
1262 /* Wake events only supported on port A for dual fiber
1263 * regardless of eeprom setting */
1264 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1265 adapter
->eeprom_wol
= 0;
1269 /* initialize the wol settings based on the eeprom settings */
1270 adapter
->wol
= adapter
->eeprom_wol
;
1271 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1273 /* reset the hardware with the new settings */
1276 /* let the f/w know that the h/w is now under the control of the
1278 igb_get_hw_control(adapter
);
1280 /* tell the stack to leave us alone until igb_open() is called */
1281 netif_carrier_off(netdev
);
1282 netif_tx_stop_all_queues(netdev
);
1284 strcpy(netdev
->name
, "eth%d");
1285 err
= register_netdev(netdev
);
1289 #ifdef CONFIG_IGB_DCA
1290 if (dca_add_requester(&pdev
->dev
) == 0) {
1291 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1292 dev_info(&pdev
->dev
, "DCA enabled\n");
1293 /* Always use CB2 mode, difference is masked
1294 * in the CB driver. */
1295 wr32(E1000_DCA_CTRL
, 2);
1296 igb_setup_dca(adapter
);
1300 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1301 /* print bus type/speed/width info */
1302 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1304 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1305 ? "2.5Gb/s" : "unknown"),
1306 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1307 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1308 ? "Width x1" : "unknown"),
1311 igb_read_part_num(hw
, &part_num
);
1312 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1313 (part_num
>> 8), (part_num
& 0xff));
1315 dev_info(&pdev
->dev
,
1316 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1317 adapter
->msix_entries
? "MSI-X" :
1318 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1319 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1324 igb_release_hw_control(adapter
);
1326 if (!igb_check_reset_block(hw
))
1329 if (hw
->flash_address
)
1330 iounmap(hw
->flash_address
);
1332 igb_remove_device(hw
);
1333 igb_free_queues(adapter
);
1336 iounmap(hw
->hw_addr
);
1338 free_netdev(netdev
);
1340 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1344 pci_disable_device(pdev
);
1349 * igb_remove - Device Removal Routine
1350 * @pdev: PCI device information struct
1352 * igb_remove is called by the PCI subsystem to alert the driver
1353 * that it should release a PCI device. The could be caused by a
1354 * Hot-Plug event, or because the driver is going to be removed from
1357 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1359 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1360 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1361 #ifdef CONFIG_IGB_DCA
1362 struct e1000_hw
*hw
= &adapter
->hw
;
1366 /* flush_scheduled work may reschedule our watchdog task, so
1367 * explicitly disable watchdog tasks from being rescheduled */
1368 set_bit(__IGB_DOWN
, &adapter
->state
);
1369 del_timer_sync(&adapter
->watchdog_timer
);
1370 del_timer_sync(&adapter
->phy_info_timer
);
1372 flush_scheduled_work();
1374 #ifdef CONFIG_IGB_DCA
1375 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1376 dev_info(&pdev
->dev
, "DCA disabled\n");
1377 dca_remove_requester(&pdev
->dev
);
1378 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1379 wr32(E1000_DCA_CTRL
, 1);
1383 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1384 * would have already happened in close and is redundant. */
1385 igb_release_hw_control(adapter
);
1387 unregister_netdev(netdev
);
1389 if (!igb_check_reset_block(&adapter
->hw
))
1390 igb_reset_phy(&adapter
->hw
);
1392 igb_remove_device(&adapter
->hw
);
1393 igb_reset_interrupt_capability(adapter
);
1395 igb_free_queues(adapter
);
1397 iounmap(adapter
->hw
.hw_addr
);
1398 if (adapter
->hw
.flash_address
)
1399 iounmap(adapter
->hw
.flash_address
);
1400 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1403 free_netdev(netdev
);
1405 err
= pci_disable_pcie_error_reporting(pdev
);
1408 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1410 pci_disable_device(pdev
);
1414 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1415 * @adapter: board private structure to initialize
1417 * igb_sw_init initializes the Adapter private data structure.
1418 * Fields are initialized based on PCI device information and
1419 * OS network device settings (MTU size).
1421 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1423 struct e1000_hw
*hw
= &adapter
->hw
;
1424 struct net_device
*netdev
= adapter
->netdev
;
1425 struct pci_dev
*pdev
= adapter
->pdev
;
1427 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1429 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1430 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1431 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1432 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1433 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1434 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1436 /* This call may decrease the number of queues depending on
1437 * interrupt mode. */
1438 igb_set_interrupt_capability(adapter
);
1440 if (igb_alloc_queues(adapter
)) {
1441 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1445 /* Explicitly disable IRQ since the NIC can be in any state. */
1446 igb_irq_disable(adapter
);
1448 set_bit(__IGB_DOWN
, &adapter
->state
);
1453 * igb_open - Called when a network interface is made active
1454 * @netdev: network interface device structure
1456 * Returns 0 on success, negative value on failure
1458 * The open entry point is called when a network interface is made
1459 * active by the system (IFF_UP). At this point all resources needed
1460 * for transmit and receive operations are allocated, the interrupt
1461 * handler is registered with the OS, the watchdog timer is started,
1462 * and the stack is notified that the interface is ready.
1464 static int igb_open(struct net_device
*netdev
)
1466 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1467 struct e1000_hw
*hw
= &adapter
->hw
;
1471 /* disallow open during test */
1472 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1475 /* allocate transmit descriptors */
1476 err
= igb_setup_all_tx_resources(adapter
);
1480 /* allocate receive descriptors */
1481 err
= igb_setup_all_rx_resources(adapter
);
1485 /* e1000_power_up_phy(adapter); */
1487 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1488 if ((adapter
->hw
.mng_cookie
.status
&
1489 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1490 igb_update_mng_vlan(adapter
);
1492 /* before we allocate an interrupt, we must be ready to handle it.
1493 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1494 * as soon as we call pci_request_irq, so we have to setup our
1495 * clean_rx handler before we do so. */
1496 igb_configure(adapter
);
1498 err
= igb_request_irq(adapter
);
1502 /* From here on the code is the same as igb_up() */
1503 clear_bit(__IGB_DOWN
, &adapter
->state
);
1505 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1506 napi_enable(&adapter
->rx_ring
[i
].napi
);
1508 /* Clear any pending interrupts. */
1511 igb_irq_enable(adapter
);
1513 netif_tx_start_all_queues(netdev
);
1515 /* Fire a link status change interrupt to start the watchdog. */
1516 wr32(E1000_ICS
, E1000_ICS_LSC
);
1521 igb_release_hw_control(adapter
);
1522 /* e1000_power_down_phy(adapter); */
1523 igb_free_all_rx_resources(adapter
);
1525 igb_free_all_tx_resources(adapter
);
1533 * igb_close - Disables a network interface
1534 * @netdev: network interface device structure
1536 * Returns 0, this is not allowed to fail
1538 * The close entry point is called when an interface is de-activated
1539 * by the OS. The hardware is still under the driver's control, but
1540 * needs to be disabled. A global MAC reset is issued to stop the
1541 * hardware, and all transmit and receive resources are freed.
1543 static int igb_close(struct net_device
*netdev
)
1545 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1547 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1550 igb_free_irq(adapter
);
1552 igb_free_all_tx_resources(adapter
);
1553 igb_free_all_rx_resources(adapter
);
1555 /* kill manageability vlan ID if supported, but not if a vlan with
1556 * the same ID is registered on the host OS (let 8021q kill it) */
1557 if ((adapter
->hw
.mng_cookie
.status
&
1558 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1560 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1561 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1567 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1568 * @adapter: board private structure
1569 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1571 * Return 0 on success, negative on failure
1574 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1575 struct igb_ring
*tx_ring
)
1577 struct pci_dev
*pdev
= adapter
->pdev
;
1580 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1581 tx_ring
->buffer_info
= vmalloc(size
);
1582 if (!tx_ring
->buffer_info
)
1584 memset(tx_ring
->buffer_info
, 0, size
);
1586 /* round up to nearest 4K */
1587 tx_ring
->size
= tx_ring
->count
* sizeof(struct e1000_tx_desc
);
1588 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1590 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1596 tx_ring
->adapter
= adapter
;
1597 tx_ring
->next_to_use
= 0;
1598 tx_ring
->next_to_clean
= 0;
1602 vfree(tx_ring
->buffer_info
);
1603 dev_err(&adapter
->pdev
->dev
,
1604 "Unable to allocate memory for the transmit descriptor ring\n");
1609 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1610 * (Descriptors) for all queues
1611 * @adapter: board private structure
1613 * Return 0 on success, negative on failure
1615 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1620 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1621 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1623 dev_err(&adapter
->pdev
->dev
,
1624 "Allocation for Tx Queue %u failed\n", i
);
1625 for (i
--; i
>= 0; i
--)
1626 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1631 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1632 r_idx
= i
% adapter
->num_tx_queues
;
1633 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1639 * igb_configure_tx - Configure transmit Unit after Reset
1640 * @adapter: board private structure
1642 * Configure the Tx unit of the MAC after a reset.
1644 static void igb_configure_tx(struct igb_adapter
*adapter
)
1647 struct e1000_hw
*hw
= &adapter
->hw
;
1652 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1653 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
1655 wr32(E1000_TDLEN(j
),
1656 ring
->count
* sizeof(struct e1000_tx_desc
));
1658 wr32(E1000_TDBAL(j
),
1659 tdba
& 0x00000000ffffffffULL
);
1660 wr32(E1000_TDBAH(j
), tdba
>> 32);
1662 ring
->head
= E1000_TDH(j
);
1663 ring
->tail
= E1000_TDT(j
);
1664 writel(0, hw
->hw_addr
+ ring
->tail
);
1665 writel(0, hw
->hw_addr
+ ring
->head
);
1666 txdctl
= rd32(E1000_TXDCTL(j
));
1667 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1668 wr32(E1000_TXDCTL(j
), txdctl
);
1670 /* Turn off Relaxed Ordering on head write-backs. The
1671 * writebacks MUST be delivered in order or it will
1672 * completely screw up our bookeeping.
1674 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1675 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1676 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1681 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1683 /* Program the Transmit Control Register */
1685 tctl
= rd32(E1000_TCTL
);
1686 tctl
&= ~E1000_TCTL_CT
;
1687 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1688 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1690 igb_config_collision_dist(hw
);
1692 /* Setup Transmit Descriptor Settings for eop descriptor */
1693 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1695 /* Enable transmits */
1696 tctl
|= E1000_TCTL_EN
;
1698 wr32(E1000_TCTL
, tctl
);
1702 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1703 * @adapter: board private structure
1704 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1706 * Returns 0 on success, negative on failure
1709 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1710 struct igb_ring
*rx_ring
)
1712 struct pci_dev
*pdev
= adapter
->pdev
;
1715 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1716 rx_ring
->buffer_info
= vmalloc(size
);
1717 if (!rx_ring
->buffer_info
)
1719 memset(rx_ring
->buffer_info
, 0, size
);
1721 desc_len
= sizeof(union e1000_adv_rx_desc
);
1723 /* Round up to nearest 4K */
1724 rx_ring
->size
= rx_ring
->count
* desc_len
;
1725 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1727 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1733 rx_ring
->next_to_clean
= 0;
1734 rx_ring
->next_to_use
= 0;
1736 rx_ring
->adapter
= adapter
;
1741 vfree(rx_ring
->buffer_info
);
1742 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1743 "the receive descriptor ring\n");
1748 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1749 * (Descriptors) for all queues
1750 * @adapter: board private structure
1752 * Return 0 on success, negative on failure
1754 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1758 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1759 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1761 dev_err(&adapter
->pdev
->dev
,
1762 "Allocation for Rx Queue %u failed\n", i
);
1763 for (i
--; i
>= 0; i
--)
1764 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1773 * igb_setup_rctl - configure the receive control registers
1774 * @adapter: Board private structure
1776 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1778 struct e1000_hw
*hw
= &adapter
->hw
;
1783 rctl
= rd32(E1000_RCTL
);
1785 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1786 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1788 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1789 (adapter
->hw
.mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1792 * enable stripping of CRC. It's unlikely this will break BMC
1793 * redirection as it did with e1000. Newer features require
1794 * that the HW strips the CRC.
1796 rctl
|= E1000_RCTL_SECRC
;
1799 * disable store bad packets and clear size bits.
1801 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
1803 /* enable LPE when to prevent packets larger than max_frame_size */
1804 rctl
|= E1000_RCTL_LPE
;
1806 /* Setup buffer sizes */
1807 switch (adapter
->rx_buffer_len
) {
1808 case IGB_RXBUFFER_256
:
1809 rctl
|= E1000_RCTL_SZ_256
;
1811 case IGB_RXBUFFER_512
:
1812 rctl
|= E1000_RCTL_SZ_512
;
1815 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
1816 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
1820 /* 82575 and greater support packet-split where the protocol
1821 * header is placed in skb->data and the packet data is
1822 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1823 * In the case of a non-split, skb->data is linearly filled,
1824 * followed by the page buffers. Therefore, skb->data is
1825 * sized to hold the largest protocol header.
1827 /* allocations using alloc_page take too long for regular MTU
1828 * so only enable packet split for jumbo frames */
1829 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
1830 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
1831 srrctl
|= adapter
->rx_ps_hdr_size
<<
1832 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
1833 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1835 adapter
->rx_ps_hdr_size
= 0;
1836 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1839 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1840 j
= adapter
->rx_ring
[i
].reg_idx
;
1841 wr32(E1000_SRRCTL(j
), srrctl
);
1844 wr32(E1000_RCTL
, rctl
);
1848 * igb_configure_rx - Configure receive Unit after Reset
1849 * @adapter: board private structure
1851 * Configure the Rx unit of the MAC after a reset.
1853 static void igb_configure_rx(struct igb_adapter
*adapter
)
1856 struct e1000_hw
*hw
= &adapter
->hw
;
1861 /* disable receives while setting up the descriptors */
1862 rctl
= rd32(E1000_RCTL
);
1863 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1867 if (adapter
->itr_setting
> 3)
1868 wr32(E1000_ITR
, adapter
->itr
);
1870 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1871 * the Base and Length of the Rx Descriptor Ring */
1872 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1873 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
1876 wr32(E1000_RDBAL(j
),
1877 rdba
& 0x00000000ffffffffULL
);
1878 wr32(E1000_RDBAH(j
), rdba
>> 32);
1879 wr32(E1000_RDLEN(j
),
1880 ring
->count
* sizeof(union e1000_adv_rx_desc
));
1882 ring
->head
= E1000_RDH(j
);
1883 ring
->tail
= E1000_RDT(j
);
1884 writel(0, hw
->hw_addr
+ ring
->tail
);
1885 writel(0, hw
->hw_addr
+ ring
->head
);
1887 rxdctl
= rd32(E1000_RXDCTL(j
));
1888 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
1889 rxdctl
&= 0xFFF00000;
1890 rxdctl
|= IGB_RX_PTHRESH
;
1891 rxdctl
|= IGB_RX_HTHRESH
<< 8;
1892 rxdctl
|= IGB_RX_WTHRESH
<< 16;
1893 wr32(E1000_RXDCTL(j
), rxdctl
);
1896 if (adapter
->num_rx_queues
> 1) {
1905 get_random_bytes(&random
[0], 40);
1907 if (hw
->mac
.type
>= e1000_82576
)
1911 for (j
= 0; j
< (32 * 4); j
++) {
1913 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
1916 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
1918 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
1920 /* Fill out hash function seeds */
1921 for (j
= 0; j
< 10; j
++)
1922 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
1924 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
1925 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
1926 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
1927 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
1928 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
1929 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
1930 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
1931 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
1934 wr32(E1000_MRQC
, mrqc
);
1936 /* Multiqueue and raw packet checksumming are mutually
1937 * exclusive. Note that this not the same as TCP/IP
1938 * checksumming, which works fine. */
1939 rxcsum
= rd32(E1000_RXCSUM
);
1940 rxcsum
|= E1000_RXCSUM_PCSD
;
1941 wr32(E1000_RXCSUM
, rxcsum
);
1943 /* Enable Receive Checksum Offload for TCP and UDP */
1944 rxcsum
= rd32(E1000_RXCSUM
);
1945 if (adapter
->rx_csum
) {
1946 rxcsum
|= E1000_RXCSUM_TUOFL
;
1948 /* Enable IPv4 payload checksum for UDP fragments
1949 * Must be used in conjunction with packet-split. */
1950 if (adapter
->rx_ps_hdr_size
)
1951 rxcsum
|= E1000_RXCSUM_IPPCSE
;
1953 rxcsum
&= ~E1000_RXCSUM_TUOFL
;
1954 /* don't need to clear IPPCSE as it defaults to 0 */
1956 wr32(E1000_RXCSUM
, rxcsum
);
1961 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
1963 wr32(E1000_RLPML
, adapter
->max_frame_size
);
1965 /* Enable Receives */
1966 wr32(E1000_RCTL
, rctl
);
1970 * igb_free_tx_resources - Free Tx Resources per Queue
1971 * @tx_ring: Tx descriptor ring for a specific queue
1973 * Free all transmit software resources
1975 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
1977 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
1979 igb_clean_tx_ring(tx_ring
);
1981 vfree(tx_ring
->buffer_info
);
1982 tx_ring
->buffer_info
= NULL
;
1984 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
1986 tx_ring
->desc
= NULL
;
1990 * igb_free_all_tx_resources - Free Tx Resources for All Queues
1991 * @adapter: board private structure
1993 * Free all transmit software resources
1995 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
1999 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2000 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2003 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2004 struct igb_buffer
*buffer_info
)
2006 if (buffer_info
->dma
) {
2007 pci_unmap_page(adapter
->pdev
,
2009 buffer_info
->length
,
2011 buffer_info
->dma
= 0;
2013 if (buffer_info
->skb
) {
2014 dev_kfree_skb_any(buffer_info
->skb
);
2015 buffer_info
->skb
= NULL
;
2017 buffer_info
->time_stamp
= 0;
2018 /* buffer_info must be completely set up in the transmit path */
2022 * igb_clean_tx_ring - Free Tx Buffers
2023 * @tx_ring: ring to be cleaned
2025 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2027 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2028 struct igb_buffer
*buffer_info
;
2032 if (!tx_ring
->buffer_info
)
2034 /* Free all the Tx ring sk_buffs */
2036 for (i
= 0; i
< tx_ring
->count
; i
++) {
2037 buffer_info
= &tx_ring
->buffer_info
[i
];
2038 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2041 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2042 memset(tx_ring
->buffer_info
, 0, size
);
2044 /* Zero out the descriptor ring */
2046 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2048 tx_ring
->next_to_use
= 0;
2049 tx_ring
->next_to_clean
= 0;
2051 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2052 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2056 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2057 * @adapter: board private structure
2059 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2063 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2064 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2068 * igb_free_rx_resources - Free Rx Resources
2069 * @rx_ring: ring to clean the resources from
2071 * Free all receive software resources
2073 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2075 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2077 igb_clean_rx_ring(rx_ring
);
2079 vfree(rx_ring
->buffer_info
);
2080 rx_ring
->buffer_info
= NULL
;
2082 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2084 rx_ring
->desc
= NULL
;
2088 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2089 * @adapter: board private structure
2091 * Free all receive software resources
2093 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2097 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2098 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2102 * igb_clean_rx_ring - Free Rx Buffers per Queue
2103 * @rx_ring: ring to free buffers from
2105 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2107 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2108 struct igb_buffer
*buffer_info
;
2109 struct pci_dev
*pdev
= adapter
->pdev
;
2113 if (!rx_ring
->buffer_info
)
2115 /* Free all the Rx ring sk_buffs */
2116 for (i
= 0; i
< rx_ring
->count
; i
++) {
2117 buffer_info
= &rx_ring
->buffer_info
[i
];
2118 if (buffer_info
->dma
) {
2119 if (adapter
->rx_ps_hdr_size
)
2120 pci_unmap_single(pdev
, buffer_info
->dma
,
2121 adapter
->rx_ps_hdr_size
,
2122 PCI_DMA_FROMDEVICE
);
2124 pci_unmap_single(pdev
, buffer_info
->dma
,
2125 adapter
->rx_buffer_len
,
2126 PCI_DMA_FROMDEVICE
);
2127 buffer_info
->dma
= 0;
2130 if (buffer_info
->skb
) {
2131 dev_kfree_skb(buffer_info
->skb
);
2132 buffer_info
->skb
= NULL
;
2134 if (buffer_info
->page
) {
2135 if (buffer_info
->page_dma
)
2136 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2138 PCI_DMA_FROMDEVICE
);
2139 put_page(buffer_info
->page
);
2140 buffer_info
->page
= NULL
;
2141 buffer_info
->page_dma
= 0;
2142 buffer_info
->page_offset
= 0;
2146 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2147 memset(rx_ring
->buffer_info
, 0, size
);
2149 /* Zero out the descriptor ring */
2150 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2152 rx_ring
->next_to_clean
= 0;
2153 rx_ring
->next_to_use
= 0;
2155 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2156 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2160 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2161 * @adapter: board private structure
2163 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2167 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2168 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2172 * igb_set_mac - Change the Ethernet Address of the NIC
2173 * @netdev: network interface device structure
2174 * @p: pointer to an address structure
2176 * Returns 0 on success, negative on failure
2178 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2180 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2181 struct sockaddr
*addr
= p
;
2183 if (!is_valid_ether_addr(addr
->sa_data
))
2184 return -EADDRNOTAVAIL
;
2186 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2187 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2189 adapter
->hw
.mac
.ops
.rar_set(&adapter
->hw
, adapter
->hw
.mac
.addr
, 0);
2195 * igb_set_multi - Multicast and Promiscuous mode set
2196 * @netdev: network interface device structure
2198 * The set_multi entry point is called whenever the multicast address
2199 * list or the network interface flags are updated. This routine is
2200 * responsible for configuring the hardware for proper multicast,
2201 * promiscuous mode, and all-multi behavior.
2203 static void igb_set_multi(struct net_device
*netdev
)
2205 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2206 struct e1000_hw
*hw
= &adapter
->hw
;
2207 struct e1000_mac_info
*mac
= &hw
->mac
;
2208 struct dev_mc_list
*mc_ptr
;
2213 /* Check for Promiscuous and All Multicast modes */
2215 rctl
= rd32(E1000_RCTL
);
2217 if (netdev
->flags
& IFF_PROMISC
) {
2218 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2219 rctl
&= ~E1000_RCTL_VFE
;
2221 if (netdev
->flags
& IFF_ALLMULTI
) {
2222 rctl
|= E1000_RCTL_MPE
;
2223 rctl
&= ~E1000_RCTL_UPE
;
2225 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2226 rctl
|= E1000_RCTL_VFE
;
2228 wr32(E1000_RCTL
, rctl
);
2230 if (!netdev
->mc_count
) {
2231 /* nothing to program, so clear mc list */
2232 igb_update_mc_addr_list_82575(hw
, NULL
, 0, 1,
2233 mac
->rar_entry_count
);
2237 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2241 /* The shared function expects a packed array of only addresses. */
2242 mc_ptr
= netdev
->mc_list
;
2244 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2247 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2248 mc_ptr
= mc_ptr
->next
;
2250 igb_update_mc_addr_list_82575(hw
, mta_list
, i
, 1,
2251 mac
->rar_entry_count
);
2255 /* Need to wait a few seconds after link up to get diagnostic information from
2257 static void igb_update_phy_info(unsigned long data
)
2259 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2260 igb_get_phy_info(&adapter
->hw
);
2264 * igb_has_link - check shared code for link and determine up/down
2265 * @adapter: pointer to driver private info
2267 static bool igb_has_link(struct igb_adapter
*adapter
)
2269 struct e1000_hw
*hw
= &adapter
->hw
;
2270 bool link_active
= false;
2273 /* get_link_status is set on LSC (link status) interrupt or
2274 * rx sequence error interrupt. get_link_status will stay
2275 * false until the e1000_check_for_link establishes link
2276 * for copper adapters ONLY
2278 switch (hw
->phy
.media_type
) {
2279 case e1000_media_type_copper
:
2280 if (hw
->mac
.get_link_status
) {
2281 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2282 link_active
= !hw
->mac
.get_link_status
;
2287 case e1000_media_type_fiber
:
2288 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2289 link_active
= !!(rd32(E1000_STATUS
) & E1000_STATUS_LU
);
2291 case e1000_media_type_internal_serdes
:
2292 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2293 link_active
= hw
->mac
.serdes_has_link
;
2296 case e1000_media_type_unknown
:
2304 * igb_watchdog - Timer Call-back
2305 * @data: pointer to adapter cast into an unsigned long
2307 static void igb_watchdog(unsigned long data
)
2309 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2310 /* Do the rest outside of interrupt context */
2311 schedule_work(&adapter
->watchdog_task
);
2314 static void igb_watchdog_task(struct work_struct
*work
)
2316 struct igb_adapter
*adapter
= container_of(work
,
2317 struct igb_adapter
, watchdog_task
);
2318 struct e1000_hw
*hw
= &adapter
->hw
;
2320 struct net_device
*netdev
= adapter
->netdev
;
2321 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2322 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
2328 link
= igb_has_link(adapter
);
2329 if ((netif_carrier_ok(netdev
)) && link
)
2333 if (!netif_carrier_ok(netdev
)) {
2335 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2336 &adapter
->link_speed
,
2337 &adapter
->link_duplex
);
2339 ctrl
= rd32(E1000_CTRL
);
2340 /* Links status message must follow this format */
2341 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2342 "Flow Control: %s\n",
2344 adapter
->link_speed
,
2345 adapter
->link_duplex
== FULL_DUPLEX
?
2346 "Full Duplex" : "Half Duplex",
2347 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2348 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2349 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2350 E1000_CTRL_TFCE
) ? "TX" : "None")));
2352 /* tweak tx_queue_len according to speed/duplex and
2353 * adjust the timeout factor */
2354 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2355 adapter
->tx_timeout_factor
= 1;
2356 switch (adapter
->link_speed
) {
2358 netdev
->tx_queue_len
= 10;
2359 adapter
->tx_timeout_factor
= 14;
2362 netdev
->tx_queue_len
= 100;
2363 /* maybe add some timeout factor ? */
2367 netif_carrier_on(netdev
);
2368 netif_tx_wake_all_queues(netdev
);
2370 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2371 mod_timer(&adapter
->phy_info_timer
,
2372 round_jiffies(jiffies
+ 2 * HZ
));
2375 if (netif_carrier_ok(netdev
)) {
2376 adapter
->link_speed
= 0;
2377 adapter
->link_duplex
= 0;
2378 /* Links status message must follow this format */
2379 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2381 netif_carrier_off(netdev
);
2382 netif_tx_stop_all_queues(netdev
);
2383 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2384 mod_timer(&adapter
->phy_info_timer
,
2385 round_jiffies(jiffies
+ 2 * HZ
));
2390 igb_update_stats(adapter
);
2392 mac
->tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2393 adapter
->tpt_old
= adapter
->stats
.tpt
;
2394 mac
->collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2395 adapter
->colc_old
= adapter
->stats
.colc
;
2397 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2398 adapter
->gorc_old
= adapter
->stats
.gorc
;
2399 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2400 adapter
->gotc_old
= adapter
->stats
.gotc
;
2402 igb_update_adaptive(&adapter
->hw
);
2404 if (!netif_carrier_ok(netdev
)) {
2405 if (IGB_DESC_UNUSED(tx_ring
) + 1 < tx_ring
->count
) {
2406 /* We've lost link, so the controller stops DMA,
2407 * but we've got queued Tx work that's never going
2408 * to get done, so reset controller to flush Tx.
2409 * (Do the reset outside of interrupt context). */
2410 adapter
->tx_timeout_count
++;
2411 schedule_work(&adapter
->reset_task
);
2415 /* Cause software interrupt to ensure rx ring is cleaned */
2416 if (adapter
->msix_entries
) {
2417 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2418 eics
|= adapter
->rx_ring
[i
].eims_value
;
2419 wr32(E1000_EICS
, eics
);
2421 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2424 /* Force detection of hung controller every watchdog period */
2425 tx_ring
->detect_tx_hung
= true;
2427 /* Reset the timer */
2428 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2429 mod_timer(&adapter
->watchdog_timer
,
2430 round_jiffies(jiffies
+ 2 * HZ
));
2433 enum latency_range
{
2437 latency_invalid
= 255
2442 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2444 * Stores a new ITR value based on strictly on packet size. This
2445 * algorithm is less sophisticated than that used in igb_update_itr,
2446 * due to the difficulty of synchronizing statistics across multiple
2447 * receive rings. The divisors and thresholds used by this fuction
2448 * were determined based on theoretical maximum wire speed and testing
2449 * data, in order to minimize response time while increasing bulk
2451 * This functionality is controlled by the InterruptThrottleRate module
2452 * parameter (see igb_param.c)
2453 * NOTE: This function is called only when operating in a multiqueue
2454 * receive environment.
2455 * @rx_ring: pointer to ring
2457 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2459 int new_val
= rx_ring
->itr_val
;
2460 int avg_wire_size
= 0;
2461 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2463 if (!rx_ring
->total_packets
)
2464 goto clear_counts
; /* no packets, so don't do anything */
2466 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2467 * ints/sec - ITR timer value of 120 ticks.
2469 if (adapter
->link_speed
!= SPEED_1000
) {
2473 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2475 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2476 avg_wire_size
+= 24;
2478 /* Don't starve jumbo frames */
2479 avg_wire_size
= min(avg_wire_size
, 3000);
2481 /* Give a little boost to mid-size frames */
2482 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2483 new_val
= avg_wire_size
/ 3;
2485 new_val
= avg_wire_size
/ 2;
2488 if (new_val
!= rx_ring
->itr_val
) {
2489 rx_ring
->itr_val
= new_val
;
2490 rx_ring
->set_itr
= 1;
2493 rx_ring
->total_bytes
= 0;
2494 rx_ring
->total_packets
= 0;
2498 * igb_update_itr - update the dynamic ITR value based on statistics
2499 * Stores a new ITR value based on packets and byte
2500 * counts during the last interrupt. The advantage of per interrupt
2501 * computation is faster updates and more accurate ITR for the current
2502 * traffic pattern. Constants in this function were computed
2503 * based on theoretical maximum wire speed and thresholds were set based
2504 * on testing data as well as attempting to minimize response time
2505 * while increasing bulk throughput.
2506 * this functionality is controlled by the InterruptThrottleRate module
2507 * parameter (see igb_param.c)
2508 * NOTE: These calculations are only valid when operating in a single-
2509 * queue environment.
2510 * @adapter: pointer to adapter
2511 * @itr_setting: current adapter->itr
2512 * @packets: the number of packets during this measurement interval
2513 * @bytes: the number of bytes during this measurement interval
2515 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2516 int packets
, int bytes
)
2518 unsigned int retval
= itr_setting
;
2521 goto update_itr_done
;
2523 switch (itr_setting
) {
2524 case lowest_latency
:
2525 /* handle TSO and jumbo frames */
2526 if (bytes
/packets
> 8000)
2527 retval
= bulk_latency
;
2528 else if ((packets
< 5) && (bytes
> 512))
2529 retval
= low_latency
;
2531 case low_latency
: /* 50 usec aka 20000 ints/s */
2532 if (bytes
> 10000) {
2533 /* this if handles the TSO accounting */
2534 if (bytes
/packets
> 8000) {
2535 retval
= bulk_latency
;
2536 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2537 retval
= bulk_latency
;
2538 } else if ((packets
> 35)) {
2539 retval
= lowest_latency
;
2541 } else if (bytes
/packets
> 2000) {
2542 retval
= bulk_latency
;
2543 } else if (packets
<= 2 && bytes
< 512) {
2544 retval
= lowest_latency
;
2547 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2548 if (bytes
> 25000) {
2550 retval
= low_latency
;
2551 } else if (bytes
< 6000) {
2552 retval
= low_latency
;
2561 static void igb_set_itr(struct igb_adapter
*adapter
)
2564 u32 new_itr
= adapter
->itr
;
2566 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2567 if (adapter
->link_speed
!= SPEED_1000
) {
2573 adapter
->rx_itr
= igb_update_itr(adapter
,
2575 adapter
->rx_ring
->total_packets
,
2576 adapter
->rx_ring
->total_bytes
);
2578 if (adapter
->rx_ring
->buddy
) {
2579 adapter
->tx_itr
= igb_update_itr(adapter
,
2581 adapter
->tx_ring
->total_packets
,
2582 adapter
->tx_ring
->total_bytes
);
2584 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2586 current_itr
= adapter
->rx_itr
;
2589 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2590 if (adapter
->itr_setting
== 3 &&
2591 current_itr
== lowest_latency
)
2592 current_itr
= low_latency
;
2594 switch (current_itr
) {
2595 /* counts and packets in update_itr are dependent on these numbers */
2596 case lowest_latency
:
2600 new_itr
= 20000; /* aka hwitr = ~200 */
2610 adapter
->rx_ring
->total_bytes
= 0;
2611 adapter
->rx_ring
->total_packets
= 0;
2612 if (adapter
->rx_ring
->buddy
) {
2613 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2614 adapter
->rx_ring
->buddy
->total_packets
= 0;
2617 if (new_itr
!= adapter
->itr
) {
2618 /* this attempts to bias the interrupt rate towards Bulk
2619 * by adding intermediate steps when interrupt rate is
2621 new_itr
= new_itr
> adapter
->itr
?
2622 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2624 /* Don't write the value here; it resets the adapter's
2625 * internal timer, and causes us to delay far longer than
2626 * we should between interrupts. Instead, we write the ITR
2627 * value at the beginning of the next interrupt so the timing
2628 * ends up being correct.
2630 adapter
->itr
= new_itr
;
2631 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2632 adapter
->rx_ring
->set_itr
= 1;
2639 #define IGB_TX_FLAGS_CSUM 0x00000001
2640 #define IGB_TX_FLAGS_VLAN 0x00000002
2641 #define IGB_TX_FLAGS_TSO 0x00000004
2642 #define IGB_TX_FLAGS_IPV4 0x00000008
2643 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2644 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2646 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2647 struct igb_ring
*tx_ring
,
2648 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2650 struct e1000_adv_tx_context_desc
*context_desc
;
2653 struct igb_buffer
*buffer_info
;
2654 u32 info
= 0, tu_cmd
= 0;
2655 u32 mss_l4len_idx
, l4len
;
2658 if (skb_header_cloned(skb
)) {
2659 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2664 l4len
= tcp_hdrlen(skb
);
2667 if (skb
->protocol
== htons(ETH_P_IP
)) {
2668 struct iphdr
*iph
= ip_hdr(skb
);
2671 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2675 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2676 ipv6_hdr(skb
)->payload_len
= 0;
2677 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2678 &ipv6_hdr(skb
)->daddr
,
2682 i
= tx_ring
->next_to_use
;
2684 buffer_info
= &tx_ring
->buffer_info
[i
];
2685 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2686 /* VLAN MACLEN IPLEN */
2687 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2688 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2689 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2690 *hdr_len
+= skb_network_offset(skb
);
2691 info
|= skb_network_header_len(skb
);
2692 *hdr_len
+= skb_network_header_len(skb
);
2693 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2695 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2696 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2698 if (skb
->protocol
== htons(ETH_P_IP
))
2699 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2700 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2702 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2705 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2706 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2708 /* Context index must be unique per ring. */
2709 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2710 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2712 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2713 context_desc
->seqnum_seed
= 0;
2715 buffer_info
->time_stamp
= jiffies
;
2716 buffer_info
->next_to_watch
= i
;
2717 buffer_info
->dma
= 0;
2719 if (i
== tx_ring
->count
)
2722 tx_ring
->next_to_use
= i
;
2727 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2728 struct igb_ring
*tx_ring
,
2729 struct sk_buff
*skb
, u32 tx_flags
)
2731 struct e1000_adv_tx_context_desc
*context_desc
;
2733 struct igb_buffer
*buffer_info
;
2734 u32 info
= 0, tu_cmd
= 0;
2736 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
2737 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
2738 i
= tx_ring
->next_to_use
;
2739 buffer_info
= &tx_ring
->buffer_info
[i
];
2740 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2742 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2743 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2744 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2745 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2746 info
|= skb_network_header_len(skb
);
2748 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2750 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2752 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2753 switch (skb
->protocol
) {
2754 case cpu_to_be16(ETH_P_IP
):
2755 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2756 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
2757 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2759 case cpu_to_be16(ETH_P_IPV6
):
2760 /* XXX what about other V6 headers?? */
2761 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
2762 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2765 if (unlikely(net_ratelimit()))
2766 dev_warn(&adapter
->pdev
->dev
,
2767 "partial checksum but proto=%x!\n",
2773 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2774 context_desc
->seqnum_seed
= 0;
2775 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2776 context_desc
->mss_l4len_idx
=
2777 cpu_to_le32(tx_ring
->queue_index
<< 4);
2779 buffer_info
->time_stamp
= jiffies
;
2780 buffer_info
->next_to_watch
= i
;
2781 buffer_info
->dma
= 0;
2784 if (i
== tx_ring
->count
)
2786 tx_ring
->next_to_use
= i
;
2795 #define IGB_MAX_TXD_PWR 16
2796 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2798 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
2799 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
2802 struct igb_buffer
*buffer_info
;
2803 unsigned int len
= skb_headlen(skb
);
2804 unsigned int count
= 0, i
;
2807 i
= tx_ring
->next_to_use
;
2809 buffer_info
= &tx_ring
->buffer_info
[i
];
2810 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2811 buffer_info
->length
= len
;
2812 /* set time_stamp *before* dma to help avoid a possible race */
2813 buffer_info
->time_stamp
= jiffies
;
2814 buffer_info
->next_to_watch
= i
;
2815 buffer_info
->dma
= pci_map_single(adapter
->pdev
, skb
->data
, len
,
2819 if (i
== tx_ring
->count
)
2822 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
2823 struct skb_frag_struct
*frag
;
2825 frag
= &skb_shinfo(skb
)->frags
[f
];
2828 buffer_info
= &tx_ring
->buffer_info
[i
];
2829 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2830 buffer_info
->length
= len
;
2831 buffer_info
->time_stamp
= jiffies
;
2832 buffer_info
->next_to_watch
= i
;
2833 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2841 if (i
== tx_ring
->count
)
2845 i
= ((i
== 0) ? tx_ring
->count
- 1 : i
- 1);
2846 tx_ring
->buffer_info
[i
].skb
= skb
;
2847 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
2852 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
2853 struct igb_ring
*tx_ring
,
2854 int tx_flags
, int count
, u32 paylen
,
2857 union e1000_adv_tx_desc
*tx_desc
= NULL
;
2858 struct igb_buffer
*buffer_info
;
2859 u32 olinfo_status
= 0, cmd_type_len
;
2862 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
2863 E1000_ADVTXD_DCMD_DEXT
);
2865 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2866 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
2868 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
2869 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
2871 /* insert tcp checksum */
2872 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2874 /* insert ip checksum */
2875 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
2876 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
2878 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
2879 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2882 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
2883 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
2884 IGB_TX_FLAGS_VLAN
)))
2885 olinfo_status
|= tx_ring
->queue_index
<< 4;
2887 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
2889 i
= tx_ring
->next_to_use
;
2891 buffer_info
= &tx_ring
->buffer_info
[i
];
2892 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
2893 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
2894 tx_desc
->read
.cmd_type_len
=
2895 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
2896 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
2898 if (i
== tx_ring
->count
)
2902 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
2903 /* Force memory writes to complete before letting h/w
2904 * know there are new descriptors to fetch. (Only
2905 * applicable for weak-ordered memory model archs,
2906 * such as IA-64). */
2909 tx_ring
->next_to_use
= i
;
2910 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2911 /* we need this if more than one processor can write to our tail
2912 * at a time, it syncronizes IO on IA64/Altix systems */
2916 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
2917 struct igb_ring
*tx_ring
, int size
)
2919 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2921 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
2923 /* Herbert's original patch had:
2924 * smp_mb__after_netif_stop_queue();
2925 * but since that doesn't exist yet, just open code it. */
2928 /* We need to check again in a case another CPU has just
2929 * made room available. */
2930 if (IGB_DESC_UNUSED(tx_ring
) < size
)
2934 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
2935 ++adapter
->restart_queue
;
2939 static int igb_maybe_stop_tx(struct net_device
*netdev
,
2940 struct igb_ring
*tx_ring
, int size
)
2942 if (IGB_DESC_UNUSED(tx_ring
) >= size
)
2944 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
2947 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2949 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
2950 struct net_device
*netdev
,
2951 struct igb_ring
*tx_ring
)
2953 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2955 unsigned int tx_flags
= 0;
2960 len
= skb_headlen(skb
);
2962 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
2963 dev_kfree_skb_any(skb
);
2964 return NETDEV_TX_OK
;
2967 if (skb
->len
<= 0) {
2968 dev_kfree_skb_any(skb
);
2969 return NETDEV_TX_OK
;
2972 /* need: 1 descriptor per page,
2973 * + 2 desc gap to keep tail from touching head,
2974 * + 1 desc for skb->data,
2975 * + 1 desc for context descriptor,
2976 * otherwise try next time */
2977 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
2978 /* this is a hard error */
2979 return NETDEV_TX_BUSY
;
2983 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
2984 tx_flags
|= IGB_TX_FLAGS_VLAN
;
2985 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
2988 if (skb
->protocol
== htons(ETH_P_IP
))
2989 tx_flags
|= IGB_TX_FLAGS_IPV4
;
2991 first
= tx_ring
->next_to_use
;
2993 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
2997 dev_kfree_skb_any(skb
);
2998 return NETDEV_TX_OK
;
3002 tx_flags
|= IGB_TX_FLAGS_TSO
;
3003 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
))
3004 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3005 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3007 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
,
3008 igb_tx_map_adv(adapter
, tx_ring
, skb
, first
),
3011 netdev
->trans_start
= jiffies
;
3013 /* Make sure there is space in the ring for the next send. */
3014 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3016 return NETDEV_TX_OK
;
3019 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3021 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3022 struct igb_ring
*tx_ring
;
3025 r_idx
= skb
->queue_mapping
& (IGB_MAX_TX_QUEUES
- 1);
3026 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3028 /* This goes back to the question of how to logically map a tx queue
3029 * to a flow. Right now, performance is impacted slightly negatively
3030 * if using multiple tx queues. If the stack breaks away from a
3031 * single qdisc implementation, we can look at this again. */
3032 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3036 * igb_tx_timeout - Respond to a Tx Hang
3037 * @netdev: network interface device structure
3039 static void igb_tx_timeout(struct net_device
*netdev
)
3041 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3042 struct e1000_hw
*hw
= &adapter
->hw
;
3044 /* Do the reset outside of interrupt context */
3045 adapter
->tx_timeout_count
++;
3046 schedule_work(&adapter
->reset_task
);
3047 wr32(E1000_EICS
, adapter
->eims_enable_mask
&
3048 ~(E1000_EIMS_TCP_TIMER
| E1000_EIMS_OTHER
));
3051 static void igb_reset_task(struct work_struct
*work
)
3053 struct igb_adapter
*adapter
;
3054 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3056 igb_reinit_locked(adapter
);
3060 * igb_get_stats - Get System Network Statistics
3061 * @netdev: network interface device structure
3063 * Returns the address of the device statistics structure.
3064 * The statistics are actually updated from the timer callback.
3066 static struct net_device_stats
*
3067 igb_get_stats(struct net_device
*netdev
)
3069 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3071 /* only return the current stats */
3072 return &adapter
->net_stats
;
3076 * igb_change_mtu - Change the Maximum Transfer Unit
3077 * @netdev: network interface device structure
3078 * @new_mtu: new value for maximum frame size
3080 * Returns 0 on success, negative on failure
3082 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3084 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3085 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3087 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3088 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3089 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3093 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3094 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3095 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3099 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3101 /* igb_down has a dependency on max_frame_size */
3102 adapter
->max_frame_size
= max_frame
;
3103 if (netif_running(netdev
))
3106 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3107 * means we reserve 2 more, this pushes us to allocate from the next
3109 * i.e. RXBUFFER_2048 --> size-4096 slab
3112 if (max_frame
<= IGB_RXBUFFER_256
)
3113 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3114 else if (max_frame
<= IGB_RXBUFFER_512
)
3115 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3116 else if (max_frame
<= IGB_RXBUFFER_1024
)
3117 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3118 else if (max_frame
<= IGB_RXBUFFER_2048
)
3119 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3121 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3122 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3124 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3126 /* adjust allocation if LPE protects us, and we aren't using SBP */
3127 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3128 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3129 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3131 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3132 netdev
->mtu
, new_mtu
);
3133 netdev
->mtu
= new_mtu
;
3135 if (netif_running(netdev
))
3140 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3146 * igb_update_stats - Update the board statistics counters
3147 * @adapter: board private structure
3150 void igb_update_stats(struct igb_adapter
*adapter
)
3152 struct e1000_hw
*hw
= &adapter
->hw
;
3153 struct pci_dev
*pdev
= adapter
->pdev
;
3156 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3159 * Prevent stats update while adapter is being reset, or if the pci
3160 * connection is down.
3162 if (adapter
->link_speed
== 0)
3164 if (pci_channel_offline(pdev
))
3167 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3168 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3169 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3170 rd32(E1000_GORCH
); /* clear GORCL */
3171 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3172 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3173 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3175 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3176 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3177 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3178 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3179 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3180 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3181 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3182 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3184 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3185 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3186 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3187 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3188 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3189 adapter
->stats
.dc
+= rd32(E1000_DC
);
3190 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3191 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3192 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3193 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3194 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3195 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3196 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3197 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3198 rd32(E1000_GOTCH
); /* clear GOTCL */
3199 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3200 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3201 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3202 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3203 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3204 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3205 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3207 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3208 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3209 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3210 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3211 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3212 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3214 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3215 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3217 /* used for adaptive IFS */
3219 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3220 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3221 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3222 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3224 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3225 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3226 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3227 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3228 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3230 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3231 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3232 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3233 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3234 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3235 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3236 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3237 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3238 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3240 /* Fill out the OS statistics structure */
3241 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3242 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3246 /* RLEC on some newer hardware can be incorrect so build
3247 * our own version based on RUC and ROC */
3248 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3249 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3250 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3251 adapter
->stats
.cexterr
;
3252 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3254 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3255 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3256 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3259 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3260 adapter
->stats
.latecol
;
3261 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3262 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3263 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3265 /* Tx Dropped needs to be maintained elsewhere */
3268 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3269 if ((adapter
->link_speed
== SPEED_1000
) &&
3270 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
,
3272 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3273 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3277 /* Management Stats */
3278 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3279 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3280 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3284 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3286 struct net_device
*netdev
= data
;
3287 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3288 struct e1000_hw
*hw
= &adapter
->hw
;
3289 u32 icr
= rd32(E1000_ICR
);
3291 /* reading ICR causes bit 31 of EICR to be cleared */
3292 if (!(icr
& E1000_ICR_LSC
))
3293 goto no_link_interrupt
;
3294 hw
->mac
.get_link_status
= 1;
3295 /* guard against interrupt when we're going down */
3296 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3297 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3300 wr32(E1000_IMS
, E1000_IMS_LSC
);
3301 wr32(E1000_EIMS
, adapter
->eims_other
);
3306 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3308 struct igb_ring
*tx_ring
= data
;
3309 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3310 struct e1000_hw
*hw
= &adapter
->hw
;
3312 #ifdef CONFIG_IGB_DCA
3313 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3314 igb_update_tx_dca(tx_ring
);
3316 tx_ring
->total_bytes
= 0;
3317 tx_ring
->total_packets
= 0;
3319 /* auto mask will automatically reenable the interrupt when we write
3321 if (!igb_clean_tx_irq(tx_ring
))
3322 /* Ring was not completely cleaned, so fire another interrupt */
3323 wr32(E1000_EICS
, tx_ring
->eims_value
);
3325 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3330 static void igb_write_itr(struct igb_ring
*ring
)
3332 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3333 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3334 switch (hw
->mac
.type
) {
3336 wr32(ring
->itr_register
,
3341 wr32(ring
->itr_register
,
3343 (ring
->itr_val
<< 16));
3350 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3352 struct igb_ring
*rx_ring
= data
;
3354 /* Write the ITR value calculated at the end of the
3355 * previous interrupt.
3358 igb_write_itr(rx_ring
);
3360 if (napi_schedule_prep(&rx_ring
->napi
))
3361 __napi_schedule(&rx_ring
->napi
);
3363 #ifdef CONFIG_IGB_DCA
3364 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3365 igb_update_rx_dca(rx_ring
);
3370 #ifdef CONFIG_IGB_DCA
3371 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3374 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3375 struct e1000_hw
*hw
= &adapter
->hw
;
3376 int cpu
= get_cpu();
3377 int q
= rx_ring
->reg_idx
;
3379 if (rx_ring
->cpu
!= cpu
) {
3380 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3381 if (hw
->mac
.type
== e1000_82576
) {
3382 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3383 dca_rxctrl
|= dca_get_tag(cpu
) <<
3384 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3386 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3387 dca_rxctrl
|= dca_get_tag(cpu
);
3389 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3390 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3391 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3392 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3398 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3401 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3402 struct e1000_hw
*hw
= &adapter
->hw
;
3403 int cpu
= get_cpu();
3404 int q
= tx_ring
->reg_idx
;
3406 if (tx_ring
->cpu
!= cpu
) {
3407 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3408 if (hw
->mac
.type
== e1000_82576
) {
3409 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3410 dca_txctrl
|= dca_get_tag(cpu
) <<
3411 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3413 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3414 dca_txctrl
|= dca_get_tag(cpu
);
3416 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3417 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3423 static void igb_setup_dca(struct igb_adapter
*adapter
)
3427 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3430 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3431 adapter
->tx_ring
[i
].cpu
= -1;
3432 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3434 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3435 adapter
->rx_ring
[i
].cpu
= -1;
3436 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3440 static int __igb_notify_dca(struct device
*dev
, void *data
)
3442 struct net_device
*netdev
= dev_get_drvdata(dev
);
3443 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3444 struct e1000_hw
*hw
= &adapter
->hw
;
3445 unsigned long event
= *(unsigned long *)data
;
3448 case DCA_PROVIDER_ADD
:
3449 /* if already enabled, don't do it again */
3450 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3452 /* Always use CB2 mode, difference is masked
3453 * in the CB driver. */
3454 wr32(E1000_DCA_CTRL
, 2);
3455 if (dca_add_requester(dev
) == 0) {
3456 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3457 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3458 igb_setup_dca(adapter
);
3461 /* Fall Through since DCA is disabled. */
3462 case DCA_PROVIDER_REMOVE
:
3463 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3464 /* without this a class_device is left
3465 * hanging around in the sysfs model */
3466 dca_remove_requester(dev
);
3467 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3468 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3469 wr32(E1000_DCA_CTRL
, 1);
3477 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3482 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3485 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3487 #endif /* CONFIG_IGB_DCA */
3490 * igb_intr_msi - Interrupt Handler
3491 * @irq: interrupt number
3492 * @data: pointer to a network interface device structure
3494 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
3496 struct net_device
*netdev
= data
;
3497 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3498 struct e1000_hw
*hw
= &adapter
->hw
;
3499 /* read ICR disables interrupts using IAM */
3500 u32 icr
= rd32(E1000_ICR
);
3502 igb_write_itr(adapter
->rx_ring
);
3504 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3505 hw
->mac
.get_link_status
= 1;
3506 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3507 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3510 napi_schedule(&adapter
->rx_ring
[0].napi
);
3516 * igb_intr - Interrupt Handler
3517 * @irq: interrupt number
3518 * @data: pointer to a network interface device structure
3520 static irqreturn_t
igb_intr(int irq
, void *data
)
3522 struct net_device
*netdev
= data
;
3523 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3524 struct e1000_hw
*hw
= &adapter
->hw
;
3525 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3526 * need for the IMC write */
3527 u32 icr
= rd32(E1000_ICR
);
3530 return IRQ_NONE
; /* Not our interrupt */
3532 igb_write_itr(adapter
->rx_ring
);
3534 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3535 * not set, then the adapter didn't send an interrupt */
3536 if (!(icr
& E1000_ICR_INT_ASSERTED
))
3539 eicr
= rd32(E1000_EICR
);
3541 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3542 hw
->mac
.get_link_status
= 1;
3543 /* guard against interrupt when we're going down */
3544 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3545 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3548 napi_schedule(&adapter
->rx_ring
[0].napi
);
3554 * igb_poll - NAPI Rx polling callback
3555 * @napi: napi polling structure
3556 * @budget: count of how many packets we should handle
3558 static int igb_poll(struct napi_struct
*napi
, int budget
)
3560 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3561 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3562 struct net_device
*netdev
= adapter
->netdev
;
3563 int tx_clean_complete
, work_done
= 0;
3565 /* this poll routine only supports one tx and one rx queue */
3566 #ifdef CONFIG_IGB_DCA
3567 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3568 igb_update_tx_dca(&adapter
->tx_ring
[0]);
3570 tx_clean_complete
= igb_clean_tx_irq(&adapter
->tx_ring
[0]);
3572 #ifdef CONFIG_IGB_DCA
3573 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3574 igb_update_rx_dca(&adapter
->rx_ring
[0]);
3576 igb_clean_rx_irq_adv(&adapter
->rx_ring
[0], &work_done
, budget
);
3578 /* If no Tx and not enough Rx work done, exit the polling mode */
3579 if ((tx_clean_complete
&& (work_done
< budget
)) ||
3580 !netif_running(netdev
)) {
3581 if (adapter
->itr_setting
& 3)
3582 igb_set_itr(adapter
);
3583 napi_complete(napi
);
3584 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3585 igb_irq_enable(adapter
);
3592 static int igb_clean_rx_ring_msix(struct napi_struct
*napi
, int budget
)
3594 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3595 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3596 struct e1000_hw
*hw
= &adapter
->hw
;
3597 struct net_device
*netdev
= adapter
->netdev
;
3600 #ifdef CONFIG_IGB_DCA
3601 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3602 igb_update_rx_dca(rx_ring
);
3604 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
3607 /* If not enough Rx work done, exit the polling mode */
3608 if ((work_done
== 0) || !netif_running(netdev
)) {
3609 napi_complete(napi
);
3611 if (adapter
->itr_setting
& 3) {
3612 if (adapter
->num_rx_queues
== 1)
3613 igb_set_itr(adapter
);
3615 igb_update_ring_itr(rx_ring
);
3618 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3619 wr32(E1000_EIMS
, rx_ring
->eims_value
);
3628 * igb_clean_tx_irq - Reclaim resources after transmit completes
3629 * @adapter: board private structure
3630 * returns true if ring is completely cleaned
3632 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
3634 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3635 struct net_device
*netdev
= adapter
->netdev
;
3636 struct e1000_hw
*hw
= &adapter
->hw
;
3637 struct igb_buffer
*buffer_info
;
3638 struct sk_buff
*skb
;
3639 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
3640 unsigned int total_bytes
= 0, total_packets
= 0;
3641 unsigned int i
, eop
, count
= 0;
3642 bool cleaned
= false;
3644 i
= tx_ring
->next_to_clean
;
3645 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3646 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3648 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
3649 (count
< tx_ring
->count
)) {
3650 for (cleaned
= false; !cleaned
; count
++) {
3651 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3652 buffer_info
= &tx_ring
->buffer_info
[i
];
3653 cleaned
= (i
== eop
);
3654 skb
= buffer_info
->skb
;
3657 unsigned int segs
, bytecount
;
3658 /* gso_segs is currently only valid for tcp */
3659 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
3660 /* multiply data chunks by size of headers */
3661 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
3663 total_packets
+= segs
;
3664 total_bytes
+= bytecount
;
3667 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
3668 tx_desc
->wb
.status
= 0;
3671 if (i
== tx_ring
->count
)
3675 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3676 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3679 tx_ring
->next_to_clean
= i
;
3681 if (unlikely(count
&&
3682 netif_carrier_ok(netdev
) &&
3683 IGB_DESC_UNUSED(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
3684 /* Make sure that anybody stopping the queue after this
3685 * sees the new next_to_clean.
3688 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
3689 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
3690 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3691 ++adapter
->restart_queue
;
3695 if (tx_ring
->detect_tx_hung
) {
3696 /* Detect a transmit hang in hardware, this serializes the
3697 * check with the clearing of time_stamp and movement of i */
3698 tx_ring
->detect_tx_hung
= false;
3699 if (tx_ring
->buffer_info
[i
].time_stamp
&&
3700 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
3701 (adapter
->tx_timeout_factor
* HZ
))
3702 && !(rd32(E1000_STATUS
) &
3703 E1000_STATUS_TXOFF
)) {
3705 /* detected Tx unit hang */
3706 dev_err(&adapter
->pdev
->dev
,
3707 "Detected Tx Unit Hang\n"
3711 " next_to_use <%x>\n"
3712 " next_to_clean <%x>\n"
3713 "buffer_info[next_to_clean]\n"
3714 " time_stamp <%lx>\n"
3715 " next_to_watch <%x>\n"
3717 " desc.status <%x>\n",
3718 tx_ring
->queue_index
,
3719 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
3720 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
3721 tx_ring
->next_to_use
,
3722 tx_ring
->next_to_clean
,
3723 tx_ring
->buffer_info
[i
].time_stamp
,
3726 eop_desc
->wb
.status
);
3727 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3730 tx_ring
->total_bytes
+= total_bytes
;
3731 tx_ring
->total_packets
+= total_packets
;
3732 tx_ring
->tx_stats
.bytes
+= total_bytes
;
3733 tx_ring
->tx_stats
.packets
+= total_packets
;
3734 adapter
->net_stats
.tx_bytes
+= total_bytes
;
3735 adapter
->net_stats
.tx_packets
+= total_packets
;
3736 return (count
< tx_ring
->count
);
3740 * igb_receive_skb - helper function to handle rx indications
3741 * @ring: pointer to receive ring receving this packet
3742 * @status: descriptor status field as written by hardware
3743 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3744 * @skb: pointer to sk_buff to be indicated to stack
3746 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
3747 union e1000_adv_rx_desc
* rx_desc
,
3748 struct sk_buff
*skb
)
3750 struct igb_adapter
* adapter
= ring
->adapter
;
3751 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
3753 skb_record_rx_queue(skb
, ring
->queue_index
);
3754 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
3756 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
3757 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
3760 napi_gro_receive(&ring
->napi
, skb
);
3763 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
3764 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
3766 netif_receive_skb(skb
);
3771 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
3772 u32 status_err
, struct sk_buff
*skb
)
3774 skb
->ip_summed
= CHECKSUM_NONE
;
3776 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3777 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
3779 /* TCP/UDP checksum error bit is set */
3781 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
3782 /* let the stack verify checksum errors */
3783 adapter
->hw_csum_err
++;
3786 /* It must be a TCP or UDP packet with a valid checksum */
3787 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
3788 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
3790 adapter
->hw_csum_good
++;
3793 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
3794 int *work_done
, int budget
)
3796 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3797 struct net_device
*netdev
= adapter
->netdev
;
3798 struct pci_dev
*pdev
= adapter
->pdev
;
3799 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
3800 struct igb_buffer
*buffer_info
, *next_buffer
;
3801 struct sk_buff
*skb
;
3803 u32 length
, hlen
, staterr
;
3804 bool cleaned
= false;
3805 int cleaned_count
= 0;
3806 unsigned int total_bytes
= 0, total_packets
= 0;
3808 i
= rx_ring
->next_to_clean
;
3809 buffer_info
= &rx_ring
->buffer_info
[i
];
3810 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3811 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3813 while (staterr
& E1000_RXD_STAT_DD
) {
3814 if (*work_done
>= budget
)
3818 skb
= buffer_info
->skb
;
3819 prefetch(skb
->data
- NET_IP_ALIGN
);
3820 buffer_info
->skb
= NULL
;
3823 if (i
== rx_ring
->count
)
3825 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3827 next_buffer
= &rx_ring
->buffer_info
[i
];
3829 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
3833 if (!adapter
->rx_ps_hdr_size
) {
3834 pci_unmap_single(pdev
, buffer_info
->dma
,
3835 adapter
->rx_buffer_len
+
3837 PCI_DMA_FROMDEVICE
);
3838 skb_put(skb
, length
);
3842 /* HW will not DMA in data larger than the given buffer, even
3843 * if it parses the (NFS, of course) header to be larger. In
3844 * that case, it fills the header buffer and spills the rest
3847 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
3848 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
3849 if (hlen
> adapter
->rx_ps_hdr_size
)
3850 hlen
= adapter
->rx_ps_hdr_size
;
3852 if (!skb_shinfo(skb
)->nr_frags
) {
3853 pci_unmap_single(pdev
, buffer_info
->dma
,
3854 adapter
->rx_ps_hdr_size
+
3856 PCI_DMA_FROMDEVICE
);
3861 pci_unmap_page(pdev
, buffer_info
->page_dma
,
3862 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
3863 buffer_info
->page_dma
= 0;
3865 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
3867 buffer_info
->page_offset
,
3870 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
3871 (page_count(buffer_info
->page
) != 1))
3872 buffer_info
->page
= NULL
;
3874 get_page(buffer_info
->page
);
3877 skb
->data_len
+= length
;
3879 skb
->truesize
+= length
;
3882 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
3883 buffer_info
->skb
= next_buffer
->skb
;
3884 buffer_info
->dma
= next_buffer
->dma
;
3885 next_buffer
->skb
= skb
;
3886 next_buffer
->dma
= 0;
3890 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
3891 dev_kfree_skb_irq(skb
);
3895 total_bytes
+= skb
->len
;
3898 igb_rx_checksum_adv(adapter
, staterr
, skb
);
3900 skb
->protocol
= eth_type_trans(skb
, netdev
);
3902 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
3905 rx_desc
->wb
.upper
.status_error
= 0;
3907 /* return some buffers to hardware, one at a time is too slow */
3908 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
3909 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
3913 /* use prefetched values */
3915 buffer_info
= next_buffer
;
3916 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3919 rx_ring
->next_to_clean
= i
;
3920 cleaned_count
= IGB_DESC_UNUSED(rx_ring
);
3923 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
3925 rx_ring
->total_packets
+= total_packets
;
3926 rx_ring
->total_bytes
+= total_bytes
;
3927 rx_ring
->rx_stats
.packets
+= total_packets
;
3928 rx_ring
->rx_stats
.bytes
+= total_bytes
;
3929 adapter
->net_stats
.rx_bytes
+= total_bytes
;
3930 adapter
->net_stats
.rx_packets
+= total_packets
;
3936 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3937 * @adapter: address of board private structure
3939 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
3942 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3943 struct net_device
*netdev
= adapter
->netdev
;
3944 struct pci_dev
*pdev
= adapter
->pdev
;
3945 union e1000_adv_rx_desc
*rx_desc
;
3946 struct igb_buffer
*buffer_info
;
3947 struct sk_buff
*skb
;
3951 i
= rx_ring
->next_to_use
;
3952 buffer_info
= &rx_ring
->buffer_info
[i
];
3954 if (adapter
->rx_ps_hdr_size
)
3955 bufsz
= adapter
->rx_ps_hdr_size
;
3957 bufsz
= adapter
->rx_buffer_len
;
3958 bufsz
+= NET_IP_ALIGN
;
3960 while (cleaned_count
--) {
3961 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3963 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
3964 if (!buffer_info
->page
) {
3965 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
3966 if (!buffer_info
->page
) {
3967 adapter
->alloc_rx_buff_failed
++;
3970 buffer_info
->page_offset
= 0;
3972 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
3974 buffer_info
->page_dma
=
3975 pci_map_page(pdev
, buffer_info
->page
,
3976 buffer_info
->page_offset
,
3978 PCI_DMA_FROMDEVICE
);
3981 if (!buffer_info
->skb
) {
3982 skb
= netdev_alloc_skb(netdev
, bufsz
);
3984 adapter
->alloc_rx_buff_failed
++;
3988 /* Make buffer alignment 2 beyond a 16 byte boundary
3989 * this will result in a 16 byte aligned IP header after
3990 * the 14 byte MAC header is removed
3992 skb_reserve(skb
, NET_IP_ALIGN
);
3994 buffer_info
->skb
= skb
;
3995 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
3997 PCI_DMA_FROMDEVICE
);
3999 /* Refresh the desc even if buffer_addrs didn't change because
4000 * each write-back erases this info. */
4001 if (adapter
->rx_ps_hdr_size
) {
4002 rx_desc
->read
.pkt_addr
=
4003 cpu_to_le64(buffer_info
->page_dma
);
4004 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4006 rx_desc
->read
.pkt_addr
=
4007 cpu_to_le64(buffer_info
->dma
);
4008 rx_desc
->read
.hdr_addr
= 0;
4012 if (i
== rx_ring
->count
)
4014 buffer_info
= &rx_ring
->buffer_info
[i
];
4018 if (rx_ring
->next_to_use
!= i
) {
4019 rx_ring
->next_to_use
= i
;
4021 i
= (rx_ring
->count
- 1);
4025 /* Force memory writes to complete before letting h/w
4026 * know there are new descriptors to fetch. (Only
4027 * applicable for weak-ordered memory model archs,
4028 * such as IA-64). */
4030 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4040 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4042 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4043 struct mii_ioctl_data
*data
= if_mii(ifr
);
4045 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4050 data
->phy_id
= adapter
->hw
.phy
.addr
;
4053 if (!capable(CAP_NET_ADMIN
))
4055 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4072 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4078 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4084 static void igb_vlan_rx_register(struct net_device
*netdev
,
4085 struct vlan_group
*grp
)
4087 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4088 struct e1000_hw
*hw
= &adapter
->hw
;
4091 igb_irq_disable(adapter
);
4092 adapter
->vlgrp
= grp
;
4095 /* enable VLAN tag insert/strip */
4096 ctrl
= rd32(E1000_CTRL
);
4097 ctrl
|= E1000_CTRL_VME
;
4098 wr32(E1000_CTRL
, ctrl
);
4100 /* enable VLAN receive filtering */
4101 rctl
= rd32(E1000_RCTL
);
4102 rctl
&= ~E1000_RCTL_CFIEN
;
4103 wr32(E1000_RCTL
, rctl
);
4104 igb_update_mng_vlan(adapter
);
4106 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
4108 /* disable VLAN tag insert/strip */
4109 ctrl
= rd32(E1000_CTRL
);
4110 ctrl
&= ~E1000_CTRL_VME
;
4111 wr32(E1000_CTRL
, ctrl
);
4113 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4114 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4115 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4118 adapter
->max_frame_size
);
4121 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4122 igb_irq_enable(adapter
);
4125 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4127 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4128 struct e1000_hw
*hw
= &adapter
->hw
;
4131 if ((adapter
->hw
.mng_cookie
.status
&
4132 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4133 (vid
== adapter
->mng_vlan_id
))
4135 /* add VID to filter table */
4136 index
= (vid
>> 5) & 0x7F;
4137 vfta
= array_rd32(E1000_VFTA
, index
);
4138 vfta
|= (1 << (vid
& 0x1F));
4139 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4142 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4144 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4145 struct e1000_hw
*hw
= &adapter
->hw
;
4148 igb_irq_disable(adapter
);
4149 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4151 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4152 igb_irq_enable(adapter
);
4154 if ((adapter
->hw
.mng_cookie
.status
&
4155 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4156 (vid
== adapter
->mng_vlan_id
)) {
4157 /* release control to f/w */
4158 igb_release_hw_control(adapter
);
4162 /* remove VID from filter table */
4163 index
= (vid
>> 5) & 0x7F;
4164 vfta
= array_rd32(E1000_VFTA
, index
);
4165 vfta
&= ~(1 << (vid
& 0x1F));
4166 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4169 static void igb_restore_vlan(struct igb_adapter
*adapter
)
4171 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
4173 if (adapter
->vlgrp
) {
4175 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
4176 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
4178 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
4183 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
4185 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
4189 /* Fiber NICs only allow 1000 gbps Full duplex */
4190 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
4191 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
4192 dev_err(&adapter
->pdev
->dev
,
4193 "Unsupported Speed/Duplex configuration\n");
4198 case SPEED_10
+ DUPLEX_HALF
:
4199 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
4201 case SPEED_10
+ DUPLEX_FULL
:
4202 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
4204 case SPEED_100
+ DUPLEX_HALF
:
4205 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
4207 case SPEED_100
+ DUPLEX_FULL
:
4208 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
4210 case SPEED_1000
+ DUPLEX_FULL
:
4212 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
4214 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
4216 dev_err(&adapter
->pdev
->dev
,
4217 "Unsupported Speed/Duplex configuration\n");
4224 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4226 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4227 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4228 struct e1000_hw
*hw
= &adapter
->hw
;
4229 u32 ctrl
, rctl
, status
;
4230 u32 wufc
= adapter
->wol
;
4235 netif_device_detach(netdev
);
4237 if (netif_running(netdev
))
4240 igb_reset_interrupt_capability(adapter
);
4242 igb_free_queues(adapter
);
4245 retval
= pci_save_state(pdev
);
4250 status
= rd32(E1000_STATUS
);
4251 if (status
& E1000_STATUS_LU
)
4252 wufc
&= ~E1000_WUFC_LNKC
;
4255 igb_setup_rctl(adapter
);
4256 igb_set_multi(netdev
);
4258 /* turn on all-multi mode if wake on multicast is enabled */
4259 if (wufc
& E1000_WUFC_MC
) {
4260 rctl
= rd32(E1000_RCTL
);
4261 rctl
|= E1000_RCTL_MPE
;
4262 wr32(E1000_RCTL
, rctl
);
4265 ctrl
= rd32(E1000_CTRL
);
4266 /* advertise wake from D3Cold */
4267 #define E1000_CTRL_ADVD3WUC 0x00100000
4268 /* phy power management enable */
4269 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4270 ctrl
|= E1000_CTRL_ADVD3WUC
;
4271 wr32(E1000_CTRL
, ctrl
);
4273 /* Allow time for pending master requests to run */
4274 igb_disable_pcie_master(&adapter
->hw
);
4276 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
4277 wr32(E1000_WUFC
, wufc
);
4280 wr32(E1000_WUFC
, 0);
4283 /* make sure adapter isn't asleep if manageability/wol is enabled */
4284 if (wufc
|| adapter
->en_mng_pt
) {
4285 pci_enable_wake(pdev
, PCI_D3hot
, 1);
4286 pci_enable_wake(pdev
, PCI_D3cold
, 1);
4288 igb_shutdown_fiber_serdes_link_82575(hw
);
4289 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4290 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4293 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4294 * would have already happened in close and is redundant. */
4295 igb_release_hw_control(adapter
);
4297 pci_disable_device(pdev
);
4299 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
4305 static int igb_resume(struct pci_dev
*pdev
)
4307 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4308 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4309 struct e1000_hw
*hw
= &adapter
->hw
;
4312 pci_set_power_state(pdev
, PCI_D0
);
4313 pci_restore_state(pdev
);
4315 err
= pci_enable_device_mem(pdev
);
4318 "igb: Cannot enable PCI device from suspend\n");
4321 pci_set_master(pdev
);
4323 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4324 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4326 igb_set_interrupt_capability(adapter
);
4328 if (igb_alloc_queues(adapter
)) {
4329 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
4333 /* e1000_power_up_phy(adapter); */
4336 wr32(E1000_WUS
, ~0);
4338 if (netif_running(netdev
)) {
4339 err
= igb_open(netdev
);
4344 netif_device_attach(netdev
);
4346 /* let the f/w know that the h/w is now under the control of the
4348 igb_get_hw_control(adapter
);
4354 static void igb_shutdown(struct pci_dev
*pdev
)
4356 igb_suspend(pdev
, PMSG_SUSPEND
);
4359 #ifdef CONFIG_NET_POLL_CONTROLLER
4361 * Polling 'interrupt' - used by things like netconsole to send skbs
4362 * without having to re-enable interrupts. It's not called while
4363 * the interrupt routine is executing.
4365 static void igb_netpoll(struct net_device
*netdev
)
4367 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4371 igb_irq_disable(adapter
);
4372 adapter
->flags
|= IGB_FLAG_IN_NETPOLL
;
4374 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4375 igb_clean_tx_irq(&adapter
->tx_ring
[i
]);
4377 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4378 igb_clean_rx_irq_adv(&adapter
->rx_ring
[i
],
4380 adapter
->rx_ring
[i
].napi
.weight
);
4382 adapter
->flags
&= ~IGB_FLAG_IN_NETPOLL
;
4383 igb_irq_enable(adapter
);
4385 #endif /* CONFIG_NET_POLL_CONTROLLER */
4388 * igb_io_error_detected - called when PCI error is detected
4389 * @pdev: Pointer to PCI device
4390 * @state: The current pci connection state
4392 * This function is called after a PCI bus error affecting
4393 * this device has been detected.
4395 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
4396 pci_channel_state_t state
)
4398 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4399 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4401 netif_device_detach(netdev
);
4403 if (netif_running(netdev
))
4405 pci_disable_device(pdev
);
4407 /* Request a slot slot reset. */
4408 return PCI_ERS_RESULT_NEED_RESET
;
4412 * igb_io_slot_reset - called after the pci bus has been reset.
4413 * @pdev: Pointer to PCI device
4415 * Restart the card from scratch, as if from a cold-boot. Implementation
4416 * resembles the first-half of the igb_resume routine.
4418 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
4420 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4421 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4422 struct e1000_hw
*hw
= &adapter
->hw
;
4423 pci_ers_result_t result
;
4426 if (pci_enable_device_mem(pdev
)) {
4428 "Cannot re-enable PCI device after reset.\n");
4429 result
= PCI_ERS_RESULT_DISCONNECT
;
4431 pci_set_master(pdev
);
4432 pci_restore_state(pdev
);
4434 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4435 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4438 wr32(E1000_WUS
, ~0);
4439 result
= PCI_ERS_RESULT_RECOVERED
;
4442 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4444 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
4445 "failed 0x%0x\n", err
);
4446 /* non-fatal, continue */
4453 * igb_io_resume - called when traffic can start flowing again.
4454 * @pdev: Pointer to PCI device
4456 * This callback is called when the error recovery driver tells us that
4457 * its OK to resume normal operation. Implementation resembles the
4458 * second-half of the igb_resume routine.
4460 static void igb_io_resume(struct pci_dev
*pdev
)
4462 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4463 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4465 if (netif_running(netdev
)) {
4466 if (igb_up(adapter
)) {
4467 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
4472 netif_device_attach(netdev
);
4474 /* let the f/w know that the h/w is now under the control of the
4476 igb_get_hw_control(adapter
);