1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/pci-aspm.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/if_ether.h>
46 #include <linux/aer.h>
48 #include <linux/dca.h>
52 #define DRV_VERSION "1.3.16-k2"
53 char igb_driver_name
[] = "igb";
54 char igb_driver_version
[] = DRV_VERSION
;
55 static const char igb_driver_string
[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
57 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
59 static const struct e1000_info
*igb_info_tbl
[] = {
60 [board_82575
] = &e1000_82575_info
,
63 static struct pci_device_id igb_pci_tbl
[] = {
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
69 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
70 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
71 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
72 /* required last entry */
76 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
78 void igb_reset(struct igb_adapter
*);
79 static int igb_setup_all_tx_resources(struct igb_adapter
*);
80 static int igb_setup_all_rx_resources(struct igb_adapter
*);
81 static void igb_free_all_tx_resources(struct igb_adapter
*);
82 static void igb_free_all_rx_resources(struct igb_adapter
*);
83 void igb_update_stats(struct igb_adapter
*);
84 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
85 static void __devexit
igb_remove(struct pci_dev
*pdev
);
86 static int igb_sw_init(struct igb_adapter
*);
87 static int igb_open(struct net_device
*);
88 static int igb_close(struct net_device
*);
89 static void igb_configure_tx(struct igb_adapter
*);
90 static void igb_configure_rx(struct igb_adapter
*);
91 static void igb_setup_rctl(struct igb_adapter
*);
92 static void igb_clean_all_tx_rings(struct igb_adapter
*);
93 static void igb_clean_all_rx_rings(struct igb_adapter
*);
94 static void igb_clean_tx_ring(struct igb_ring
*);
95 static void igb_clean_rx_ring(struct igb_ring
*);
96 static void igb_set_multi(struct net_device
*);
97 static void igb_update_phy_info(unsigned long);
98 static void igb_watchdog(unsigned long);
99 static void igb_watchdog_task(struct work_struct
*);
100 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
102 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
103 static struct net_device_stats
*igb_get_stats(struct net_device
*);
104 static int igb_change_mtu(struct net_device
*, int);
105 static int igb_set_mac(struct net_device
*, void *);
106 static irqreturn_t
igb_intr(int irq
, void *);
107 static irqreturn_t
igb_intr_msi(int irq
, void *);
108 static irqreturn_t
igb_msix_other(int irq
, void *);
109 static irqreturn_t
igb_msix_rx(int irq
, void *);
110 static irqreturn_t
igb_msix_tx(int irq
, void *);
111 #ifdef CONFIG_IGB_DCA
112 static void igb_update_rx_dca(struct igb_ring
*);
113 static void igb_update_tx_dca(struct igb_ring
*);
114 static void igb_setup_dca(struct igb_adapter
*);
115 #endif /* CONFIG_IGB_DCA */
116 static bool igb_clean_tx_irq(struct igb_ring
*);
117 static int igb_poll(struct napi_struct
*, int);
118 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
119 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
120 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
121 static void igb_tx_timeout(struct net_device
*);
122 static void igb_reset_task(struct work_struct
*);
123 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
124 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
125 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
126 static void igb_restore_vlan(struct igb_adapter
*);
127 static void igb_ping_all_vfs(struct igb_adapter
*);
128 static void igb_msg_task(struct igb_adapter
*);
129 static int igb_rcv_msg_from_vf(struct igb_adapter
*, u32
);
130 static inline void igb_set_rah_pool(struct e1000_hw
*, int , int);
131 static void igb_set_mc_list_pools(struct igb_adapter
*, int, u16
);
132 static void igb_vmm_control(struct igb_adapter
*);
133 static inline void igb_set_vmolr(struct e1000_hw
*, int);
134 static inline int igb_set_vf_rlpml(struct igb_adapter
*, int, int);
135 static int igb_set_vf_mac(struct igb_adapter
*adapter
, int, unsigned char *);
136 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
138 static int igb_suspend(struct pci_dev
*, pm_message_t
);
140 static int igb_resume(struct pci_dev
*);
142 static void igb_shutdown(struct pci_dev
*);
143 #ifdef CONFIG_IGB_DCA
144 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
145 static struct notifier_block dca_notifier
= {
146 .notifier_call
= igb_notify_dca
,
151 #ifdef CONFIG_NET_POLL_CONTROLLER
152 /* for netdump / net console */
153 static void igb_netpoll(struct net_device
*);
156 #ifdef CONFIG_PCI_IOV
157 static ssize_t
igb_set_num_vfs(struct device
*, struct device_attribute
*,
158 const char *, size_t);
159 static ssize_t
igb_show_num_vfs(struct device
*, struct device_attribute
*,
161 DEVICE_ATTR(num_vfs
, S_IRUGO
| S_IWUSR
, igb_show_num_vfs
, igb_set_num_vfs
);
163 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
164 pci_channel_state_t
);
165 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
166 static void igb_io_resume(struct pci_dev
*);
168 static struct pci_error_handlers igb_err_handler
= {
169 .error_detected
= igb_io_error_detected
,
170 .slot_reset
= igb_io_slot_reset
,
171 .resume
= igb_io_resume
,
175 static struct pci_driver igb_driver
= {
176 .name
= igb_driver_name
,
177 .id_table
= igb_pci_tbl
,
179 .remove
= __devexit_p(igb_remove
),
181 /* Power Managment Hooks */
182 .suspend
= igb_suspend
,
183 .resume
= igb_resume
,
185 .shutdown
= igb_shutdown
,
186 .err_handler
= &igb_err_handler
189 static int global_quad_port_a
; /* global quad port a indication */
191 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
192 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
193 MODULE_LICENSE("GPL");
194 MODULE_VERSION(DRV_VERSION
);
197 * Scale the NIC clock cycle by a large factor so that
198 * relatively small clock corrections can be added or
199 * substracted at each clock tick. The drawbacks of a
200 * large factor are a) that the clock register overflows
201 * more quickly (not such a big deal) and b) that the
202 * increment per tick has to fit into 24 bits.
205 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
207 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
209 * The base scale factor is intentionally a power of two
210 * so that the division in %struct timecounter can be done with
213 #define IGB_TSYNC_SHIFT (19)
214 #define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
217 * The duration of one clock cycle of the NIC.
219 * @todo This hard-coded value is part of the specification and might change
220 * in future hardware revisions. Add revision check.
222 #define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
224 #if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
225 # error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
229 * igb_read_clock - read raw cycle counter (to be used by time counter)
231 static cycle_t
igb_read_clock(const struct cyclecounter
*tc
)
233 struct igb_adapter
*adapter
=
234 container_of(tc
, struct igb_adapter
, cycles
);
235 struct e1000_hw
*hw
= &adapter
->hw
;
238 stamp
= rd32(E1000_SYSTIML
);
239 stamp
|= (u64
)rd32(E1000_SYSTIMH
) << 32ULL;
246 * igb_get_hw_dev_name - return device name string
247 * used by hardware layer to print debugging information
249 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
251 struct igb_adapter
*adapter
= hw
->back
;
252 return adapter
->netdev
->name
;
256 * igb_get_time_str - format current NIC and system time as string
258 static char *igb_get_time_str(struct igb_adapter
*adapter
,
261 cycle_t hw
= adapter
->cycles
.read(&adapter
->cycles
);
262 struct timespec nic
= ns_to_timespec(timecounter_read(&adapter
->clock
));
264 struct timespec delta
;
265 getnstimeofday(&sys
);
267 delta
= timespec_sub(nic
, sys
);
270 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
272 (long)nic
.tv_sec
, nic
.tv_nsec
,
273 (long)sys
.tv_sec
, sys
.tv_nsec
,
274 (long)delta
.tv_sec
, delta
.tv_nsec
);
281 * igb_desc_unused - calculate if we have unused descriptors
283 static int igb_desc_unused(struct igb_ring
*ring
)
285 if (ring
->next_to_clean
> ring
->next_to_use
)
286 return ring
->next_to_clean
- ring
->next_to_use
- 1;
288 return ring
->count
+ ring
->next_to_clean
- ring
->next_to_use
- 1;
292 * igb_init_module - Driver Registration Routine
294 * igb_init_module is the first routine called when the driver is
295 * loaded. All it does is register with the PCI subsystem.
297 static int __init
igb_init_module(void)
300 printk(KERN_INFO
"%s - version %s\n",
301 igb_driver_string
, igb_driver_version
);
303 printk(KERN_INFO
"%s\n", igb_copyright
);
305 global_quad_port_a
= 0;
307 #ifdef CONFIG_IGB_DCA
308 dca_register_notify(&dca_notifier
);
311 ret
= pci_register_driver(&igb_driver
);
315 module_init(igb_init_module
);
318 * igb_exit_module - Driver Exit Cleanup Routine
320 * igb_exit_module is called just before the driver is removed
323 static void __exit
igb_exit_module(void)
325 #ifdef CONFIG_IGB_DCA
326 dca_unregister_notify(&dca_notifier
);
328 pci_unregister_driver(&igb_driver
);
331 module_exit(igb_exit_module
);
333 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
335 * igb_cache_ring_register - Descriptor ring to register mapping
336 * @adapter: board private structure to initialize
338 * Once we know the feature-set enabled for the device, we'll cache
339 * the register offset the descriptor ring is assigned to.
341 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
344 unsigned int rbase_offset
= adapter
->vfs_allocated_count
;
346 switch (adapter
->hw
.mac
.type
) {
348 /* The queues are allocated for virtualization such that VF 0
349 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
350 * In order to avoid collision we start at the first free queue
351 * and continue consuming queues in the same sequence
353 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
354 adapter
->rx_ring
[i
].reg_idx
= rbase_offset
+
356 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
357 adapter
->tx_ring
[i
].reg_idx
= rbase_offset
+
362 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
363 adapter
->rx_ring
[i
].reg_idx
= i
;
364 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
365 adapter
->tx_ring
[i
].reg_idx
= i
;
371 * igb_alloc_queues - Allocate memory for all rings
372 * @adapter: board private structure to initialize
374 * We allocate one ring per queue at run-time since we don't know the
375 * number of queues at compile-time.
377 static int igb_alloc_queues(struct igb_adapter
*adapter
)
381 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
382 sizeof(struct igb_ring
), GFP_KERNEL
);
383 if (!adapter
->tx_ring
)
386 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
387 sizeof(struct igb_ring
), GFP_KERNEL
);
388 if (!adapter
->rx_ring
) {
389 kfree(adapter
->tx_ring
);
393 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
395 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
396 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
397 ring
->count
= adapter
->tx_ring_count
;
398 ring
->adapter
= adapter
;
399 ring
->queue_index
= i
;
401 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
402 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
403 ring
->count
= adapter
->rx_ring_count
;
404 ring
->adapter
= adapter
;
405 ring
->queue_index
= i
;
406 ring
->itr_register
= E1000_ITR
;
408 /* set a default napi handler for each rx_ring */
409 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
412 igb_cache_ring_register(adapter
);
416 static void igb_free_queues(struct igb_adapter
*adapter
)
420 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
421 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
423 kfree(adapter
->tx_ring
);
424 kfree(adapter
->rx_ring
);
427 #define IGB_N0_QUEUE -1
428 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
429 int tx_queue
, int msix_vector
)
432 struct e1000_hw
*hw
= &adapter
->hw
;
435 switch (hw
->mac
.type
) {
437 /* The 82575 assigns vectors using a bitmask, which matches the
438 bitmask for the EICR/EIMS/EIMC registers. To assign one
439 or more queues to a vector, we write the appropriate bits
440 into the MSIXBM register for that vector. */
441 if (rx_queue
> IGB_N0_QUEUE
) {
442 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
443 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
445 if (tx_queue
> IGB_N0_QUEUE
) {
446 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
447 adapter
->tx_ring
[tx_queue
].eims_value
=
448 E1000_EICR_TX_QUEUE0
<< tx_queue
;
450 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
453 /* 82576 uses a table-based method for assigning vectors.
454 Each queue has a single entry in the table to which we write
455 a vector number along with a "valid" bit. Sadly, the layout
456 of the table is somewhat counterintuitive. */
457 if (rx_queue
> IGB_N0_QUEUE
) {
458 index
= (rx_queue
>> 1) + adapter
->vfs_allocated_count
;
459 ivar
= array_rd32(E1000_IVAR0
, index
);
460 if (rx_queue
& 0x1) {
461 /* vector goes into third byte of register */
462 ivar
= ivar
& 0xFF00FFFF;
463 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
465 /* vector goes into low byte of register */
466 ivar
= ivar
& 0xFFFFFF00;
467 ivar
|= msix_vector
| E1000_IVAR_VALID
;
469 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
470 array_wr32(E1000_IVAR0
, index
, ivar
);
472 if (tx_queue
> IGB_N0_QUEUE
) {
473 index
= (tx_queue
>> 1) + adapter
->vfs_allocated_count
;
474 ivar
= array_rd32(E1000_IVAR0
, index
);
475 if (tx_queue
& 0x1) {
476 /* vector goes into high byte of register */
477 ivar
= ivar
& 0x00FFFFFF;
478 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
480 /* vector goes into second byte of register */
481 ivar
= ivar
& 0xFFFF00FF;
482 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
484 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
485 array_wr32(E1000_IVAR0
, index
, ivar
);
495 * igb_configure_msix - Configure MSI-X hardware
497 * igb_configure_msix sets up the hardware to properly
498 * generate MSI-X interrupts.
500 static void igb_configure_msix(struct igb_adapter
*adapter
)
504 struct e1000_hw
*hw
= &adapter
->hw
;
506 adapter
->eims_enable_mask
= 0;
507 if (hw
->mac
.type
== e1000_82576
)
508 /* Turn on MSI-X capability first, or our settings
509 * won't stick. And it will take days to debug. */
510 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
511 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
514 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
515 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
516 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
517 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
518 if (tx_ring
->itr_val
)
519 writel(tx_ring
->itr_val
,
520 hw
->hw_addr
+ tx_ring
->itr_register
);
522 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
525 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
526 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
527 rx_ring
->buddy
= NULL
;
528 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
529 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
530 if (rx_ring
->itr_val
)
531 writel(rx_ring
->itr_val
,
532 hw
->hw_addr
+ rx_ring
->itr_register
);
534 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
538 /* set vector for other causes, i.e. link changes */
539 switch (hw
->mac
.type
) {
541 array_wr32(E1000_MSIXBM(0), vector
++,
544 tmp
= rd32(E1000_CTRL_EXT
);
545 /* enable MSI-X PBA support*/
546 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
548 /* Auto-Mask interrupts upon ICR read. */
549 tmp
|= E1000_CTRL_EXT_EIAME
;
550 tmp
|= E1000_CTRL_EXT_IRCA
;
552 wr32(E1000_CTRL_EXT
, tmp
);
553 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
554 adapter
->eims_other
= E1000_EIMS_OTHER
;
559 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
560 wr32(E1000_IVAR_MISC
, tmp
);
562 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
563 adapter
->eims_other
= 1 << (vector
- 1);
566 /* do nothing, since nothing else supports MSI-X */
568 } /* switch (hw->mac.type) */
573 * igb_request_msix - Initialize MSI-X interrupts
575 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
578 static int igb_request_msix(struct igb_adapter
*adapter
)
580 struct net_device
*netdev
= adapter
->netdev
;
581 int i
, err
= 0, vector
= 0;
585 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
586 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
587 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
588 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
589 &igb_msix_tx
, 0, ring
->name
,
590 &(adapter
->tx_ring
[i
]));
593 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
594 ring
->itr_val
= 976; /* ~4000 ints/sec */
597 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
598 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
599 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
600 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
602 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
603 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
604 &igb_msix_rx
, 0, ring
->name
,
605 &(adapter
->rx_ring
[i
]));
608 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
609 ring
->itr_val
= adapter
->itr
;
613 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
614 &igb_msix_other
, 0, netdev
->name
, netdev
);
618 igb_configure_msix(adapter
);
624 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
626 if (adapter
->msix_entries
) {
627 pci_disable_msix(adapter
->pdev
);
628 kfree(adapter
->msix_entries
);
629 adapter
->msix_entries
= NULL
;
630 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
631 pci_disable_msi(adapter
->pdev
);
637 * igb_set_interrupt_capability - set MSI or MSI-X if supported
639 * Attempt to configure interrupts using the best available
640 * capabilities of the hardware and kernel.
642 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
647 /* Number of supported queues. */
648 /* Having more queues than CPUs doesn't make sense. */
649 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
650 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
652 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
653 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
655 if (!adapter
->msix_entries
)
658 for (i
= 0; i
< numvecs
; i
++)
659 adapter
->msix_entries
[i
].entry
= i
;
661 err
= pci_enable_msix(adapter
->pdev
,
662 adapter
->msix_entries
,
667 igb_reset_interrupt_capability(adapter
);
669 /* If we can't do MSI-X, try MSI */
671 adapter
->num_rx_queues
= 1;
672 adapter
->num_tx_queues
= 1;
673 if (!pci_enable_msi(adapter
->pdev
))
674 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
676 /* Notify the stack of the (possibly) reduced Tx Queue count. */
677 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
682 * igb_request_irq - initialize interrupts
684 * Attempts to configure interrupts using the best available
685 * capabilities of the hardware and kernel.
687 static int igb_request_irq(struct igb_adapter
*adapter
)
689 struct net_device
*netdev
= adapter
->netdev
;
690 struct e1000_hw
*hw
= &adapter
->hw
;
693 if (adapter
->msix_entries
) {
694 err
= igb_request_msix(adapter
);
697 /* fall back to MSI */
698 igb_reset_interrupt_capability(adapter
);
699 if (!pci_enable_msi(adapter
->pdev
))
700 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
701 igb_free_all_tx_resources(adapter
);
702 igb_free_all_rx_resources(adapter
);
703 adapter
->num_rx_queues
= 1;
704 igb_alloc_queues(adapter
);
706 switch (hw
->mac
.type
) {
708 wr32(E1000_MSIXBM(0),
709 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
712 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
719 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
720 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
721 netdev
->name
, netdev
);
724 /* fall back to legacy interrupts */
725 igb_reset_interrupt_capability(adapter
);
726 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
729 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
730 netdev
->name
, netdev
);
733 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
740 static void igb_free_irq(struct igb_adapter
*adapter
)
742 struct net_device
*netdev
= adapter
->netdev
;
744 if (adapter
->msix_entries
) {
747 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
748 free_irq(adapter
->msix_entries
[vector
++].vector
,
749 &(adapter
->tx_ring
[i
]));
750 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
751 free_irq(adapter
->msix_entries
[vector
++].vector
,
752 &(adapter
->rx_ring
[i
]));
754 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
758 free_irq(adapter
->pdev
->irq
, netdev
);
762 * igb_irq_disable - Mask off interrupt generation on the NIC
763 * @adapter: board private structure
765 static void igb_irq_disable(struct igb_adapter
*adapter
)
767 struct e1000_hw
*hw
= &adapter
->hw
;
769 if (adapter
->msix_entries
) {
771 wr32(E1000_EIMC
, ~0);
778 synchronize_irq(adapter
->pdev
->irq
);
782 * igb_irq_enable - Enable default interrupt generation settings
783 * @adapter: board private structure
785 static void igb_irq_enable(struct igb_adapter
*adapter
)
787 struct e1000_hw
*hw
= &adapter
->hw
;
789 if (adapter
->msix_entries
) {
790 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
791 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
792 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
793 if (adapter
->vfs_allocated_count
)
794 wr32(E1000_MBVFIMR
, 0xFF);
795 wr32(E1000_IMS
, (E1000_IMS_LSC
| E1000_IMS_VMMB
|
796 E1000_IMS_DOUTSYNC
));
798 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
799 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
803 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
805 struct net_device
*netdev
= adapter
->netdev
;
806 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
807 u16 old_vid
= adapter
->mng_vlan_id
;
808 if (adapter
->vlgrp
) {
809 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
810 if (adapter
->hw
.mng_cookie
.status
&
811 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
812 igb_vlan_rx_add_vid(netdev
, vid
);
813 adapter
->mng_vlan_id
= vid
;
815 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
817 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
819 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
820 igb_vlan_rx_kill_vid(netdev
, old_vid
);
822 adapter
->mng_vlan_id
= vid
;
827 * igb_release_hw_control - release control of the h/w to f/w
828 * @adapter: address of board private structure
830 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
831 * For ASF and Pass Through versions of f/w this means that the
832 * driver is no longer loaded.
835 static void igb_release_hw_control(struct igb_adapter
*adapter
)
837 struct e1000_hw
*hw
= &adapter
->hw
;
840 /* Let firmware take over control of h/w */
841 ctrl_ext
= rd32(E1000_CTRL_EXT
);
843 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
848 * igb_get_hw_control - get control of the h/w from f/w
849 * @adapter: address of board private structure
851 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
852 * For ASF and Pass Through versions of f/w this means that
853 * the driver is loaded.
856 static void igb_get_hw_control(struct igb_adapter
*adapter
)
858 struct e1000_hw
*hw
= &adapter
->hw
;
861 /* Let firmware know the driver has taken over */
862 ctrl_ext
= rd32(E1000_CTRL_EXT
);
864 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
868 * igb_configure - configure the hardware for RX and TX
869 * @adapter: private board structure
871 static void igb_configure(struct igb_adapter
*adapter
)
873 struct net_device
*netdev
= adapter
->netdev
;
876 igb_get_hw_control(adapter
);
877 igb_set_multi(netdev
);
879 igb_restore_vlan(adapter
);
881 igb_configure_tx(adapter
);
882 igb_setup_rctl(adapter
);
883 igb_configure_rx(adapter
);
885 igb_rx_fifo_flush_82575(&adapter
->hw
);
887 /* call igb_desc_unused which always leaves
888 * at least 1 descriptor unused to make sure
889 * next_to_use != next_to_clean */
890 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
891 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
892 igb_alloc_rx_buffers_adv(ring
, igb_desc_unused(ring
));
896 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
901 * igb_up - Open the interface and prepare it to handle traffic
902 * @adapter: board private structure
905 int igb_up(struct igb_adapter
*adapter
)
907 struct e1000_hw
*hw
= &adapter
->hw
;
910 /* hardware has been reset, we need to reload some things */
911 igb_configure(adapter
);
913 clear_bit(__IGB_DOWN
, &adapter
->state
);
915 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
916 napi_enable(&adapter
->rx_ring
[i
].napi
);
917 if (adapter
->msix_entries
)
918 igb_configure_msix(adapter
);
920 igb_vmm_control(adapter
);
921 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
922 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
924 /* Clear any pending interrupts. */
926 igb_irq_enable(adapter
);
928 /* Fire a link change interrupt to start the watchdog. */
929 wr32(E1000_ICS
, E1000_ICS_LSC
);
933 void igb_down(struct igb_adapter
*adapter
)
935 struct e1000_hw
*hw
= &adapter
->hw
;
936 struct net_device
*netdev
= adapter
->netdev
;
940 /* signal that we're down so the interrupt handler does not
941 * reschedule our watchdog timer */
942 set_bit(__IGB_DOWN
, &adapter
->state
);
944 /* disable receives in the hardware */
945 rctl
= rd32(E1000_RCTL
);
946 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
947 /* flush and sleep below */
949 netif_tx_stop_all_queues(netdev
);
951 /* disable transmits in the hardware */
952 tctl
= rd32(E1000_TCTL
);
953 tctl
&= ~E1000_TCTL_EN
;
954 wr32(E1000_TCTL
, tctl
);
955 /* flush both disables and wait for them to finish */
959 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
960 napi_disable(&adapter
->rx_ring
[i
].napi
);
962 igb_irq_disable(adapter
);
964 del_timer_sync(&adapter
->watchdog_timer
);
965 del_timer_sync(&adapter
->phy_info_timer
);
967 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
968 netif_carrier_off(netdev
);
970 /* record the stats before reset*/
971 igb_update_stats(adapter
);
973 adapter
->link_speed
= 0;
974 adapter
->link_duplex
= 0;
976 if (!pci_channel_offline(adapter
->pdev
))
978 igb_clean_all_tx_rings(adapter
);
979 igb_clean_all_rx_rings(adapter
);
982 void igb_reinit_locked(struct igb_adapter
*adapter
)
984 WARN_ON(in_interrupt());
985 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
989 clear_bit(__IGB_RESETTING
, &adapter
->state
);
992 void igb_reset(struct igb_adapter
*adapter
)
994 struct e1000_hw
*hw
= &adapter
->hw
;
995 struct e1000_mac_info
*mac
= &hw
->mac
;
996 struct e1000_fc_info
*fc
= &hw
->fc
;
997 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
1000 /* Repartition Pba for greater than 9k mtu
1001 * To take effect CTRL.RST is required.
1003 switch (mac
->type
) {
1005 pba
= E1000_PBA_64K
;
1009 pba
= E1000_PBA_34K
;
1013 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1014 (mac
->type
< e1000_82576
)) {
1015 /* adjust PBA for jumbo frames */
1016 wr32(E1000_PBA
, pba
);
1018 /* To maintain wire speed transmits, the Tx FIFO should be
1019 * large enough to accommodate two full transmit packets,
1020 * rounded up to the next 1KB and expressed in KB. Likewise,
1021 * the Rx FIFO should be large enough to accommodate at least
1022 * one full receive packet and is similarly rounded up and
1023 * expressed in KB. */
1024 pba
= rd32(E1000_PBA
);
1025 /* upper 16 bits has Tx packet buffer allocation size in KB */
1026 tx_space
= pba
>> 16;
1027 /* lower 16 bits has Rx packet buffer allocation size in KB */
1029 /* the tx fifo also stores 16 bytes of information about the tx
1030 * but don't include ethernet FCS because hardware appends it */
1031 min_tx_space
= (adapter
->max_frame_size
+
1032 sizeof(union e1000_adv_tx_desc
) -
1034 min_tx_space
= ALIGN(min_tx_space
, 1024);
1035 min_tx_space
>>= 10;
1036 /* software strips receive CRC, so leave room for it */
1037 min_rx_space
= adapter
->max_frame_size
;
1038 min_rx_space
= ALIGN(min_rx_space
, 1024);
1039 min_rx_space
>>= 10;
1041 /* If current Tx allocation is less than the min Tx FIFO size,
1042 * and the min Tx FIFO size is less than the current Rx FIFO
1043 * allocation, take space away from current Rx allocation */
1044 if (tx_space
< min_tx_space
&&
1045 ((min_tx_space
- tx_space
) < pba
)) {
1046 pba
= pba
- (min_tx_space
- tx_space
);
1048 /* if short on rx space, rx wins and must trump tx
1050 if (pba
< min_rx_space
)
1053 wr32(E1000_PBA
, pba
);
1056 /* flow control settings */
1057 /* The high water mark must be low enough to fit one full frame
1058 * (or the size used for early receive) above it in the Rx FIFO.
1059 * Set it to the lower of:
1060 * - 90% of the Rx FIFO size, or
1061 * - the full Rx FIFO size minus one full frame */
1062 hwm
= min(((pba
<< 10) * 9 / 10),
1063 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1065 if (mac
->type
< e1000_82576
) {
1066 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
1067 fc
->low_water
= fc
->high_water
- 8;
1069 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
1070 fc
->low_water
= fc
->high_water
- 16;
1072 fc
->pause_time
= 0xFFFF;
1074 fc
->type
= fc
->original_type
;
1076 /* disable receive for all VFs and wait one second */
1077 if (adapter
->vfs_allocated_count
) {
1079 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1080 adapter
->vf_data
[i
].clear_to_send
= false;
1082 /* ping all the active vfs to let them know we are going down */
1083 igb_ping_all_vfs(adapter
);
1085 /* disable transmits and receives */
1086 wr32(E1000_VFRE
, 0);
1087 wr32(E1000_VFTE
, 0);
1090 /* Allow time for pending master requests to run */
1091 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
1094 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
1095 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
1097 igb_update_mng_vlan(adapter
);
1099 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1100 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1102 igb_reset_adaptive(&adapter
->hw
);
1103 igb_get_phy_info(&adapter
->hw
);
1106 static const struct net_device_ops igb_netdev_ops
= {
1107 .ndo_open
= igb_open
,
1108 .ndo_stop
= igb_close
,
1109 .ndo_start_xmit
= igb_xmit_frame_adv
,
1110 .ndo_get_stats
= igb_get_stats
,
1111 .ndo_set_multicast_list
= igb_set_multi
,
1112 .ndo_set_mac_address
= igb_set_mac
,
1113 .ndo_change_mtu
= igb_change_mtu
,
1114 .ndo_do_ioctl
= igb_ioctl
,
1115 .ndo_tx_timeout
= igb_tx_timeout
,
1116 .ndo_validate_addr
= eth_validate_addr
,
1117 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1118 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1119 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1120 #ifdef CONFIG_NET_POLL_CONTROLLER
1121 .ndo_poll_controller
= igb_netpoll
,
1126 * igb_probe - Device Initialization Routine
1127 * @pdev: PCI device information struct
1128 * @ent: entry in igb_pci_tbl
1130 * Returns 0 on success, negative on failure
1132 * igb_probe initializes an adapter identified by a pci_dev structure.
1133 * The OS initialization, configuring of the adapter private structure,
1134 * and a hardware reset occur.
1136 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1137 const struct pci_device_id
*ent
)
1139 struct net_device
*netdev
;
1140 struct igb_adapter
*adapter
;
1141 struct e1000_hw
*hw
;
1142 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1143 unsigned long mmio_start
, mmio_len
;
1144 int err
, pci_using_dac
;
1145 u16 eeprom_data
= 0;
1146 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1149 err
= pci_enable_device_mem(pdev
);
1154 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1156 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1160 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1162 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1164 dev_err(&pdev
->dev
, "No usable DMA "
1165 "configuration, aborting\n");
1171 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1177 err
= pci_enable_pcie_error_reporting(pdev
);
1179 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1181 /* non-fatal, continue */
1184 pci_set_master(pdev
);
1185 pci_save_state(pdev
);
1188 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
1189 IGB_ABS_MAX_TX_QUEUES
);
1191 goto err_alloc_etherdev
;
1193 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1195 pci_set_drvdata(pdev
, netdev
);
1196 adapter
= netdev_priv(netdev
);
1197 adapter
->netdev
= netdev
;
1198 adapter
->pdev
= pdev
;
1201 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1203 mmio_start
= pci_resource_start(pdev
, 0);
1204 mmio_len
= pci_resource_len(pdev
, 0);
1207 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1211 netdev
->netdev_ops
= &igb_netdev_ops
;
1212 igb_set_ethtool_ops(netdev
);
1213 netdev
->watchdog_timeo
= 5 * HZ
;
1215 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1217 netdev
->mem_start
= mmio_start
;
1218 netdev
->mem_end
= mmio_start
+ mmio_len
;
1220 /* PCI config space info */
1221 hw
->vendor_id
= pdev
->vendor
;
1222 hw
->device_id
= pdev
->device
;
1223 hw
->revision_id
= pdev
->revision
;
1224 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1225 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1227 /* setup the private structure */
1229 /* Copy the default MAC, PHY and NVM function pointers */
1230 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1231 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1232 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1233 /* Initialize skew-specific constants */
1234 err
= ei
->get_invariants(hw
);
1238 /* setup the private structure */
1239 err
= igb_sw_init(adapter
);
1243 igb_get_bus_info_pcie(hw
);
1246 switch (hw
->mac
.type
) {
1248 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1255 hw
->phy
.autoneg_wait_to_complete
= false;
1256 hw
->mac
.adaptive_ifs
= true;
1258 /* Copper options */
1259 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1260 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1261 hw
->phy
.disable_polarity_correction
= false;
1262 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1265 if (igb_check_reset_block(hw
))
1266 dev_info(&pdev
->dev
,
1267 "PHY reset is blocked due to SOL/IDER session.\n");
1269 netdev
->features
= NETIF_F_SG
|
1271 NETIF_F_HW_VLAN_TX
|
1272 NETIF_F_HW_VLAN_RX
|
1273 NETIF_F_HW_VLAN_FILTER
;
1275 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1276 netdev
->features
|= NETIF_F_TSO
;
1277 netdev
->features
|= NETIF_F_TSO6
;
1279 netdev
->features
|= NETIF_F_GRO
;
1281 netdev
->vlan_features
|= NETIF_F_TSO
;
1282 netdev
->vlan_features
|= NETIF_F_TSO6
;
1283 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1284 netdev
->vlan_features
|= NETIF_F_SG
;
1287 netdev
->features
|= NETIF_F_HIGHDMA
;
1289 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1291 /* before reading the NVM, reset the controller to put the device in a
1292 * known good starting state */
1293 hw
->mac
.ops
.reset_hw(hw
);
1295 /* make sure the NVM is good */
1296 if (igb_validate_nvm_checksum(hw
) < 0) {
1297 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1302 /* copy the MAC address out of the NVM */
1303 if (hw
->mac
.ops
.read_mac_addr(hw
))
1304 dev_err(&pdev
->dev
, "NVM Read Error\n");
1306 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1307 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1309 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1310 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1315 setup_timer(&adapter
->watchdog_timer
, &igb_watchdog
,
1316 (unsigned long) adapter
);
1317 setup_timer(&adapter
->phy_info_timer
, &igb_update_phy_info
,
1318 (unsigned long) adapter
);
1320 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1321 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1323 /* Initialize link properties that are user-changeable */
1324 adapter
->fc_autoneg
= true;
1325 hw
->mac
.autoneg
= true;
1326 hw
->phy
.autoneg_advertised
= 0x2f;
1328 hw
->fc
.original_type
= e1000_fc_default
;
1329 hw
->fc
.type
= e1000_fc_default
;
1331 adapter
->itr_setting
= IGB_DEFAULT_ITR
;
1332 adapter
->itr
= IGB_START_ITR
;
1334 igb_validate_mdi_setting(hw
);
1336 adapter
->rx_csum
= 1;
1338 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1339 * enable the ACPI Magic Packet filter
1342 if (hw
->bus
.func
== 0)
1343 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1344 else if (hw
->bus
.func
== 1)
1345 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
1347 if (eeprom_data
& eeprom_apme_mask
)
1348 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1350 /* now that we have the eeprom settings, apply the special cases where
1351 * the eeprom may be wrong or the board simply won't support wake on
1352 * lan on a particular port */
1353 switch (pdev
->device
) {
1354 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1355 adapter
->eeprom_wol
= 0;
1357 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1358 case E1000_DEV_ID_82576_FIBER
:
1359 case E1000_DEV_ID_82576_SERDES
:
1360 /* Wake events only supported on port A for dual fiber
1361 * regardless of eeprom setting */
1362 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1363 adapter
->eeprom_wol
= 0;
1365 case E1000_DEV_ID_82576_QUAD_COPPER
:
1366 /* if quad port adapter, disable WoL on all but port A */
1367 if (global_quad_port_a
!= 0)
1368 adapter
->eeprom_wol
= 0;
1370 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
1371 /* Reset for multiple quad port adapters */
1372 if (++global_quad_port_a
== 4)
1373 global_quad_port_a
= 0;
1377 /* initialize the wol settings based on the eeprom settings */
1378 adapter
->wol
= adapter
->eeprom_wol
;
1379 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1381 /* reset the hardware with the new settings */
1384 /* let the f/w know that the h/w is now under the control of the
1386 igb_get_hw_control(adapter
);
1388 /* tell the stack to leave us alone until igb_open() is called */
1389 netif_carrier_off(netdev
);
1390 netif_tx_stop_all_queues(netdev
);
1392 strcpy(netdev
->name
, "eth%d");
1393 err
= register_netdev(netdev
);
1397 #ifdef CONFIG_PCI_IOV
1398 /* since iov functionality isn't critical to base device function we
1399 * can accept failure. If it fails we don't allow iov to be enabled */
1400 if (hw
->mac
.type
== e1000_82576
) {
1401 err
= pci_enable_sriov(pdev
, 0);
1403 err
= device_create_file(&netdev
->dev
,
1406 dev_err(&pdev
->dev
, "Failed to initialize IOV\n");
1410 #ifdef CONFIG_IGB_DCA
1411 if (dca_add_requester(&pdev
->dev
) == 0) {
1412 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1413 dev_info(&pdev
->dev
, "DCA enabled\n");
1414 /* Always use CB2 mode, difference is masked
1415 * in the CB driver. */
1416 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
1417 igb_setup_dca(adapter
);
1422 * Initialize hardware timer: we keep it running just in case
1423 * that some program needs it later on.
1425 memset(&adapter
->cycles
, 0, sizeof(adapter
->cycles
));
1426 adapter
->cycles
.read
= igb_read_clock
;
1427 adapter
->cycles
.mask
= CLOCKSOURCE_MASK(64);
1428 adapter
->cycles
.mult
= 1;
1429 adapter
->cycles
.shift
= IGB_TSYNC_SHIFT
;
1432 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS
* IGB_TSYNC_SCALE
);
1435 * Avoid rollover while we initialize by resetting the time counter.
1437 wr32(E1000_SYSTIML
, 0x00000000);
1438 wr32(E1000_SYSTIMH
, 0x00000000);
1441 * Set registers so that rollover occurs soon to test this.
1443 wr32(E1000_SYSTIML
, 0x00000000);
1444 wr32(E1000_SYSTIMH
, 0xFF800000);
1447 timecounter_init(&adapter
->clock
,
1449 ktime_to_ns(ktime_get_real()));
1452 * Synchronize our NIC clock against system wall clock. NIC
1453 * time stamp reading requires ~3us per sample, each sample
1454 * was pretty stable even under load => only require 10
1455 * samples for each offset comparison.
1457 memset(&adapter
->compare
, 0, sizeof(adapter
->compare
));
1458 adapter
->compare
.source
= &adapter
->clock
;
1459 adapter
->compare
.target
= ktime_get_real
;
1460 adapter
->compare
.num_samples
= 10;
1461 timecompare_update(&adapter
->compare
, 0);
1467 "igb: %s: hw %p initialized timer\n",
1468 igb_get_time_str(adapter
, buffer
),
1473 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1474 /* print bus type/speed/width info */
1475 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1477 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1478 ? "2.5Gb/s" : "unknown"),
1479 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1480 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1481 ? "Width x1" : "unknown"),
1484 igb_read_part_num(hw
, &part_num
);
1485 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1486 (part_num
>> 8), (part_num
& 0xff));
1488 dev_info(&pdev
->dev
,
1489 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1490 adapter
->msix_entries
? "MSI-X" :
1491 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1492 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1497 igb_release_hw_control(adapter
);
1499 if (!igb_check_reset_block(hw
))
1502 if (hw
->flash_address
)
1503 iounmap(hw
->flash_address
);
1505 igb_free_queues(adapter
);
1507 iounmap(hw
->hw_addr
);
1509 free_netdev(netdev
);
1511 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1515 pci_disable_device(pdev
);
1520 * igb_remove - Device Removal Routine
1521 * @pdev: PCI device information struct
1523 * igb_remove is called by the PCI subsystem to alert the driver
1524 * that it should release a PCI device. The could be caused by a
1525 * Hot-Plug event, or because the driver is going to be removed from
1528 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1530 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1531 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1532 struct e1000_hw
*hw
= &adapter
->hw
;
1535 /* flush_scheduled work may reschedule our watchdog task, so
1536 * explicitly disable watchdog tasks from being rescheduled */
1537 set_bit(__IGB_DOWN
, &adapter
->state
);
1538 del_timer_sync(&adapter
->watchdog_timer
);
1539 del_timer_sync(&adapter
->phy_info_timer
);
1541 flush_scheduled_work();
1543 #ifdef CONFIG_IGB_DCA
1544 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1545 dev_info(&pdev
->dev
, "DCA disabled\n");
1546 dca_remove_requester(&pdev
->dev
);
1547 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1548 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
1552 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1553 * would have already happened in close and is redundant. */
1554 igb_release_hw_control(adapter
);
1556 unregister_netdev(netdev
);
1558 if (!igb_check_reset_block(&adapter
->hw
))
1559 igb_reset_phy(&adapter
->hw
);
1561 igb_reset_interrupt_capability(adapter
);
1563 igb_free_queues(adapter
);
1565 #ifdef CONFIG_PCI_IOV
1566 /* reclaim resources allocated to VFs */
1567 if (adapter
->vf_data
) {
1568 /* disable iov and allow time for transactions to clear */
1569 pci_disable_sriov(pdev
);
1572 kfree(adapter
->vf_data
);
1573 adapter
->vf_data
= NULL
;
1574 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1576 dev_info(&pdev
->dev
, "IOV Disabled\n");
1579 iounmap(hw
->hw_addr
);
1580 if (hw
->flash_address
)
1581 iounmap(hw
->flash_address
);
1582 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1585 free_netdev(netdev
);
1587 err
= pci_disable_pcie_error_reporting(pdev
);
1590 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1592 pci_disable_device(pdev
);
1596 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1597 * @adapter: board private structure to initialize
1599 * igb_sw_init initializes the Adapter private data structure.
1600 * Fields are initialized based on PCI device information and
1601 * OS network device settings (MTU size).
1603 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1605 struct e1000_hw
*hw
= &adapter
->hw
;
1606 struct net_device
*netdev
= adapter
->netdev
;
1607 struct pci_dev
*pdev
= adapter
->pdev
;
1609 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1611 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1612 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1613 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1614 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1615 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1616 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1618 /* This call may decrease the number of queues depending on
1619 * interrupt mode. */
1620 igb_set_interrupt_capability(adapter
);
1622 if (igb_alloc_queues(adapter
)) {
1623 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1627 /* Explicitly disable IRQ since the NIC can be in any state. */
1628 igb_irq_disable(adapter
);
1630 set_bit(__IGB_DOWN
, &adapter
->state
);
1635 * igb_open - Called when a network interface is made active
1636 * @netdev: network interface device structure
1638 * Returns 0 on success, negative value on failure
1640 * The open entry point is called when a network interface is made
1641 * active by the system (IFF_UP). At this point all resources needed
1642 * for transmit and receive operations are allocated, the interrupt
1643 * handler is registered with the OS, the watchdog timer is started,
1644 * and the stack is notified that the interface is ready.
1646 static int igb_open(struct net_device
*netdev
)
1648 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1649 struct e1000_hw
*hw
= &adapter
->hw
;
1653 /* disallow open during test */
1654 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1657 /* allocate transmit descriptors */
1658 err
= igb_setup_all_tx_resources(adapter
);
1662 /* allocate receive descriptors */
1663 err
= igb_setup_all_rx_resources(adapter
);
1667 /* e1000_power_up_phy(adapter); */
1669 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1670 if ((adapter
->hw
.mng_cookie
.status
&
1671 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1672 igb_update_mng_vlan(adapter
);
1674 /* before we allocate an interrupt, we must be ready to handle it.
1675 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1676 * as soon as we call pci_request_irq, so we have to setup our
1677 * clean_rx handler before we do so. */
1678 igb_configure(adapter
);
1680 igb_vmm_control(adapter
);
1681 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
1682 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
1684 err
= igb_request_irq(adapter
);
1688 /* From here on the code is the same as igb_up() */
1689 clear_bit(__IGB_DOWN
, &adapter
->state
);
1691 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1692 napi_enable(&adapter
->rx_ring
[i
].napi
);
1694 /* Clear any pending interrupts. */
1697 igb_irq_enable(adapter
);
1699 netif_tx_start_all_queues(netdev
);
1701 /* Fire a link status change interrupt to start the watchdog. */
1702 wr32(E1000_ICS
, E1000_ICS_LSC
);
1707 igb_release_hw_control(adapter
);
1708 /* e1000_power_down_phy(adapter); */
1709 igb_free_all_rx_resources(adapter
);
1711 igb_free_all_tx_resources(adapter
);
1719 * igb_close - Disables a network interface
1720 * @netdev: network interface device structure
1722 * Returns 0, this is not allowed to fail
1724 * The close entry point is called when an interface is de-activated
1725 * by the OS. The hardware is still under the driver's control, but
1726 * needs to be disabled. A global MAC reset is issued to stop the
1727 * hardware, and all transmit and receive resources are freed.
1729 static int igb_close(struct net_device
*netdev
)
1731 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1733 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1736 igb_free_irq(adapter
);
1738 igb_free_all_tx_resources(adapter
);
1739 igb_free_all_rx_resources(adapter
);
1741 /* kill manageability vlan ID if supported, but not if a vlan with
1742 * the same ID is registered on the host OS (let 8021q kill it) */
1743 if ((adapter
->hw
.mng_cookie
.status
&
1744 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1746 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1747 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1753 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1754 * @adapter: board private structure
1755 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1757 * Return 0 on success, negative on failure
1759 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1760 struct igb_ring
*tx_ring
)
1762 struct pci_dev
*pdev
= adapter
->pdev
;
1765 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1766 tx_ring
->buffer_info
= vmalloc(size
);
1767 if (!tx_ring
->buffer_info
)
1769 memset(tx_ring
->buffer_info
, 0, size
);
1771 /* round up to nearest 4K */
1772 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1773 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1775 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1781 tx_ring
->adapter
= adapter
;
1782 tx_ring
->next_to_use
= 0;
1783 tx_ring
->next_to_clean
= 0;
1787 vfree(tx_ring
->buffer_info
);
1788 dev_err(&adapter
->pdev
->dev
,
1789 "Unable to allocate memory for the transmit descriptor ring\n");
1794 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1795 * (Descriptors) for all queues
1796 * @adapter: board private structure
1798 * Return 0 on success, negative on failure
1800 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1805 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1806 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1808 dev_err(&adapter
->pdev
->dev
,
1809 "Allocation for Tx Queue %u failed\n", i
);
1810 for (i
--; i
>= 0; i
--)
1811 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1816 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1817 r_idx
= i
% adapter
->num_tx_queues
;
1818 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1824 * igb_configure_tx - Configure transmit Unit after Reset
1825 * @adapter: board private structure
1827 * Configure the Tx unit of the MAC after a reset.
1829 static void igb_configure_tx(struct igb_adapter
*adapter
)
1832 struct e1000_hw
*hw
= &adapter
->hw
;
1837 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1838 struct igb_ring
*ring
= &adapter
->tx_ring
[i
];
1840 wr32(E1000_TDLEN(j
),
1841 ring
->count
* sizeof(union e1000_adv_tx_desc
));
1843 wr32(E1000_TDBAL(j
),
1844 tdba
& 0x00000000ffffffffULL
);
1845 wr32(E1000_TDBAH(j
), tdba
>> 32);
1847 ring
->head
= E1000_TDH(j
);
1848 ring
->tail
= E1000_TDT(j
);
1849 writel(0, hw
->hw_addr
+ ring
->tail
);
1850 writel(0, hw
->hw_addr
+ ring
->head
);
1851 txdctl
= rd32(E1000_TXDCTL(j
));
1852 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1853 wr32(E1000_TXDCTL(j
), txdctl
);
1855 /* Turn off Relaxed Ordering on head write-backs. The
1856 * writebacks MUST be delivered in order or it will
1857 * completely screw up our bookeeping.
1859 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1860 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1861 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1864 /* disable queue 0 to prevent tail bump w/o re-configuration */
1865 if (adapter
->vfs_allocated_count
)
1866 wr32(E1000_TXDCTL(0), 0);
1868 /* Program the Transmit Control Register */
1869 tctl
= rd32(E1000_TCTL
);
1870 tctl
&= ~E1000_TCTL_CT
;
1871 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1872 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1874 igb_config_collision_dist(hw
);
1876 /* Setup Transmit Descriptor Settings for eop descriptor */
1877 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1879 /* Enable transmits */
1880 tctl
|= E1000_TCTL_EN
;
1882 wr32(E1000_TCTL
, tctl
);
1886 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1887 * @adapter: board private structure
1888 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1890 * Returns 0 on success, negative on failure
1892 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1893 struct igb_ring
*rx_ring
)
1895 struct pci_dev
*pdev
= adapter
->pdev
;
1898 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1899 rx_ring
->buffer_info
= vmalloc(size
);
1900 if (!rx_ring
->buffer_info
)
1902 memset(rx_ring
->buffer_info
, 0, size
);
1904 desc_len
= sizeof(union e1000_adv_rx_desc
);
1906 /* Round up to nearest 4K */
1907 rx_ring
->size
= rx_ring
->count
* desc_len
;
1908 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1910 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1916 rx_ring
->next_to_clean
= 0;
1917 rx_ring
->next_to_use
= 0;
1919 rx_ring
->adapter
= adapter
;
1924 vfree(rx_ring
->buffer_info
);
1925 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1926 "the receive descriptor ring\n");
1931 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1932 * (Descriptors) for all queues
1933 * @adapter: board private structure
1935 * Return 0 on success, negative on failure
1937 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1941 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1942 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1944 dev_err(&adapter
->pdev
->dev
,
1945 "Allocation for Rx Queue %u failed\n", i
);
1946 for (i
--; i
>= 0; i
--)
1947 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1956 * igb_setup_rctl - configure the receive control registers
1957 * @adapter: Board private structure
1959 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1961 struct e1000_hw
*hw
= &adapter
->hw
;
1966 rctl
= rd32(E1000_RCTL
);
1968 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1969 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1971 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1972 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1975 * enable stripping of CRC. It's unlikely this will break BMC
1976 * redirection as it did with e1000. Newer features require
1977 * that the HW strips the CRC.
1979 rctl
|= E1000_RCTL_SECRC
;
1982 * disable store bad packets and clear size bits.
1984 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
1986 /* enable LPE when to prevent packets larger than max_frame_size */
1987 rctl
|= E1000_RCTL_LPE
;
1989 /* Setup buffer sizes */
1990 switch (adapter
->rx_buffer_len
) {
1991 case IGB_RXBUFFER_256
:
1992 rctl
|= E1000_RCTL_SZ_256
;
1994 case IGB_RXBUFFER_512
:
1995 rctl
|= E1000_RCTL_SZ_512
;
1998 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
1999 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
2003 /* 82575 and greater support packet-split where the protocol
2004 * header is placed in skb->data and the packet data is
2005 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2006 * In the case of a non-split, skb->data is linearly filled,
2007 * followed by the page buffers. Therefore, skb->data is
2008 * sized to hold the largest protocol header.
2010 /* allocations using alloc_page take too long for regular MTU
2011 * so only enable packet split for jumbo frames */
2012 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
2013 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
2014 srrctl
|= adapter
->rx_ps_hdr_size
<<
2015 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
2016 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2018 adapter
->rx_ps_hdr_size
= 0;
2019 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2022 /* Attention!!! For SR-IOV PF driver operations you must enable
2023 * queue drop for all VF and PF queues to prevent head of line blocking
2024 * if an un-trusted VF does not provide descriptors to hardware.
2026 if (adapter
->vfs_allocated_count
) {
2029 j
= adapter
->rx_ring
[0].reg_idx
;
2031 /* set all queue drop enable bits */
2032 wr32(E1000_QDE
, ALL_QUEUES
);
2033 srrctl
|= E1000_SRRCTL_DROP_EN
;
2035 /* disable queue 0 to prevent tail write w/o re-config */
2036 wr32(E1000_RXDCTL(0), 0);
2038 vmolr
= rd32(E1000_VMOLR(j
));
2039 if (rctl
& E1000_RCTL_LPE
)
2040 vmolr
|= E1000_VMOLR_LPE
;
2041 if (adapter
->num_rx_queues
> 0)
2042 vmolr
|= E1000_VMOLR_RSSE
;
2043 wr32(E1000_VMOLR(j
), vmolr
);
2046 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2047 j
= adapter
->rx_ring
[i
].reg_idx
;
2048 wr32(E1000_SRRCTL(j
), srrctl
);
2051 wr32(E1000_RCTL
, rctl
);
2055 * igb_rlpml_set - set maximum receive packet size
2056 * @adapter: board private structure
2058 * Configure maximum receivable packet size.
2060 static void igb_rlpml_set(struct igb_adapter
*adapter
)
2062 u32 max_frame_size
= adapter
->max_frame_size
;
2063 struct e1000_hw
*hw
= &adapter
->hw
;
2064 u16 pf_id
= adapter
->vfs_allocated_count
;
2067 max_frame_size
+= VLAN_TAG_SIZE
;
2069 /* if vfs are enabled we set RLPML to the largest possible request
2070 * size and set the VMOLR RLPML to the size we need */
2072 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
2073 max_frame_size
= MAX_STD_JUMBO_FRAME_SIZE
+ VLAN_TAG_SIZE
;
2076 wr32(E1000_RLPML
, max_frame_size
);
2080 * igb_configure_vt_default_pool - Configure VT default pool
2081 * @adapter: board private structure
2083 * Configure the default pool
2085 static void igb_configure_vt_default_pool(struct igb_adapter
*adapter
)
2087 struct e1000_hw
*hw
= &adapter
->hw
;
2088 u16 pf_id
= adapter
->vfs_allocated_count
;
2091 /* not in sr-iov mode - do nothing */
2095 vtctl
= rd32(E1000_VT_CTL
);
2096 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
2097 E1000_VT_CTL_DISABLE_DEF_POOL
);
2098 vtctl
|= pf_id
<< E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
2099 wr32(E1000_VT_CTL
, vtctl
);
2103 * igb_configure_rx - Configure receive Unit after Reset
2104 * @adapter: board private structure
2106 * Configure the Rx unit of the MAC after a reset.
2108 static void igb_configure_rx(struct igb_adapter
*adapter
)
2111 struct e1000_hw
*hw
= &adapter
->hw
;
2116 /* disable receives while setting up the descriptors */
2117 rctl
= rd32(E1000_RCTL
);
2118 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
2122 if (adapter
->itr_setting
> 3)
2123 wr32(E1000_ITR
, adapter
->itr
);
2125 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2126 * the Base and Length of the Rx Descriptor Ring */
2127 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2128 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
2129 int j
= ring
->reg_idx
;
2131 wr32(E1000_RDBAL(j
),
2132 rdba
& 0x00000000ffffffffULL
);
2133 wr32(E1000_RDBAH(j
), rdba
>> 32);
2134 wr32(E1000_RDLEN(j
),
2135 ring
->count
* sizeof(union e1000_adv_rx_desc
));
2137 ring
->head
= E1000_RDH(j
);
2138 ring
->tail
= E1000_RDT(j
);
2139 writel(0, hw
->hw_addr
+ ring
->tail
);
2140 writel(0, hw
->hw_addr
+ ring
->head
);
2142 rxdctl
= rd32(E1000_RXDCTL(j
));
2143 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
2144 rxdctl
&= 0xFFF00000;
2145 rxdctl
|= IGB_RX_PTHRESH
;
2146 rxdctl
|= IGB_RX_HTHRESH
<< 8;
2147 rxdctl
|= IGB_RX_WTHRESH
<< 16;
2148 wr32(E1000_RXDCTL(j
), rxdctl
);
2151 if (adapter
->num_rx_queues
> 1) {
2160 get_random_bytes(&random
[0], 40);
2162 if (hw
->mac
.type
>= e1000_82576
)
2166 for (j
= 0; j
< (32 * 4); j
++) {
2168 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
2171 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
2173 if (adapter
->vfs_allocated_count
)
2174 mrqc
= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
2176 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
2178 /* Fill out hash function seeds */
2179 for (j
= 0; j
< 10; j
++)
2180 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
2182 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
2183 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
2184 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
2185 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
2186 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2187 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2188 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
2189 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
2192 wr32(E1000_MRQC
, mrqc
);
2194 /* Multiqueue and raw packet checksumming are mutually
2195 * exclusive. Note that this not the same as TCP/IP
2196 * checksumming, which works fine. */
2197 rxcsum
= rd32(E1000_RXCSUM
);
2198 rxcsum
|= E1000_RXCSUM_PCSD
;
2199 wr32(E1000_RXCSUM
, rxcsum
);
2201 /* Enable multi-queue for sr-iov */
2202 if (adapter
->vfs_allocated_count
)
2203 wr32(E1000_MRQC
, E1000_MRQC_ENABLE_VMDQ
);
2204 /* Enable Receive Checksum Offload for TCP and UDP */
2205 rxcsum
= rd32(E1000_RXCSUM
);
2206 if (adapter
->rx_csum
)
2207 rxcsum
|= E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
;
2209 rxcsum
&= ~(E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
);
2211 wr32(E1000_RXCSUM
, rxcsum
);
2214 /* Set the default pool for the PF's first queue */
2215 igb_configure_vt_default_pool(adapter
);
2217 igb_rlpml_set(adapter
);
2219 /* Enable Receives */
2220 wr32(E1000_RCTL
, rctl
);
2224 * igb_free_tx_resources - Free Tx Resources per Queue
2225 * @tx_ring: Tx descriptor ring for a specific queue
2227 * Free all transmit software resources
2229 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2231 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2233 igb_clean_tx_ring(tx_ring
);
2235 vfree(tx_ring
->buffer_info
);
2236 tx_ring
->buffer_info
= NULL
;
2238 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2240 tx_ring
->desc
= NULL
;
2244 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2245 * @adapter: board private structure
2247 * Free all transmit software resources
2249 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2253 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2254 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2257 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2258 struct igb_buffer
*buffer_info
)
2260 buffer_info
->dma
= 0;
2261 if (buffer_info
->skb
) {
2262 skb_dma_unmap(&adapter
->pdev
->dev
, buffer_info
->skb
,
2264 dev_kfree_skb_any(buffer_info
->skb
);
2265 buffer_info
->skb
= NULL
;
2267 buffer_info
->time_stamp
= 0;
2268 /* buffer_info must be completely set up in the transmit path */
2272 * igb_clean_tx_ring - Free Tx Buffers
2273 * @tx_ring: ring to be cleaned
2275 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2277 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2278 struct igb_buffer
*buffer_info
;
2282 if (!tx_ring
->buffer_info
)
2284 /* Free all the Tx ring sk_buffs */
2286 for (i
= 0; i
< tx_ring
->count
; i
++) {
2287 buffer_info
= &tx_ring
->buffer_info
[i
];
2288 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2291 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2292 memset(tx_ring
->buffer_info
, 0, size
);
2294 /* Zero out the descriptor ring */
2296 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2298 tx_ring
->next_to_use
= 0;
2299 tx_ring
->next_to_clean
= 0;
2301 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2302 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2306 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2307 * @adapter: board private structure
2309 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2313 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2314 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2318 * igb_free_rx_resources - Free Rx Resources
2319 * @rx_ring: ring to clean the resources from
2321 * Free all receive software resources
2323 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2325 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2327 igb_clean_rx_ring(rx_ring
);
2329 vfree(rx_ring
->buffer_info
);
2330 rx_ring
->buffer_info
= NULL
;
2332 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2334 rx_ring
->desc
= NULL
;
2338 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2339 * @adapter: board private structure
2341 * Free all receive software resources
2343 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2347 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2348 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2352 * igb_clean_rx_ring - Free Rx Buffers per Queue
2353 * @rx_ring: ring to free buffers from
2355 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2357 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2358 struct igb_buffer
*buffer_info
;
2359 struct pci_dev
*pdev
= adapter
->pdev
;
2363 if (!rx_ring
->buffer_info
)
2365 /* Free all the Rx ring sk_buffs */
2366 for (i
= 0; i
< rx_ring
->count
; i
++) {
2367 buffer_info
= &rx_ring
->buffer_info
[i
];
2368 if (buffer_info
->dma
) {
2369 if (adapter
->rx_ps_hdr_size
)
2370 pci_unmap_single(pdev
, buffer_info
->dma
,
2371 adapter
->rx_ps_hdr_size
,
2372 PCI_DMA_FROMDEVICE
);
2374 pci_unmap_single(pdev
, buffer_info
->dma
,
2375 adapter
->rx_buffer_len
,
2376 PCI_DMA_FROMDEVICE
);
2377 buffer_info
->dma
= 0;
2380 if (buffer_info
->skb
) {
2381 dev_kfree_skb(buffer_info
->skb
);
2382 buffer_info
->skb
= NULL
;
2384 if (buffer_info
->page
) {
2385 if (buffer_info
->page_dma
)
2386 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2388 PCI_DMA_FROMDEVICE
);
2389 put_page(buffer_info
->page
);
2390 buffer_info
->page
= NULL
;
2391 buffer_info
->page_dma
= 0;
2392 buffer_info
->page_offset
= 0;
2396 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2397 memset(rx_ring
->buffer_info
, 0, size
);
2399 /* Zero out the descriptor ring */
2400 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2402 rx_ring
->next_to_clean
= 0;
2403 rx_ring
->next_to_use
= 0;
2405 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2406 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2410 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2411 * @adapter: board private structure
2413 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2417 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2418 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2422 * igb_set_mac - Change the Ethernet Address of the NIC
2423 * @netdev: network interface device structure
2424 * @p: pointer to an address structure
2426 * Returns 0 on success, negative on failure
2428 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2430 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2431 struct e1000_hw
*hw
= &adapter
->hw
;
2432 struct sockaddr
*addr
= p
;
2434 if (!is_valid_ether_addr(addr
->sa_data
))
2435 return -EADDRNOTAVAIL
;
2437 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2438 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2440 hw
->mac
.ops
.rar_set(hw
, hw
->mac
.addr
, 0);
2442 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
2448 * igb_set_multi - Multicast and Promiscuous mode set
2449 * @netdev: network interface device structure
2451 * The set_multi entry point is called whenever the multicast address
2452 * list or the network interface flags are updated. This routine is
2453 * responsible for configuring the hardware for proper multicast,
2454 * promiscuous mode, and all-multi behavior.
2456 static void igb_set_multi(struct net_device
*netdev
)
2458 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2459 struct e1000_hw
*hw
= &adapter
->hw
;
2460 struct e1000_mac_info
*mac
= &hw
->mac
;
2461 struct dev_mc_list
*mc_ptr
;
2462 u8
*mta_list
= NULL
;
2466 /* Check for Promiscuous and All Multicast modes */
2468 rctl
= rd32(E1000_RCTL
);
2470 if (netdev
->flags
& IFF_PROMISC
) {
2471 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2472 rctl
&= ~E1000_RCTL_VFE
;
2474 if (netdev
->flags
& IFF_ALLMULTI
) {
2475 rctl
|= E1000_RCTL_MPE
;
2476 rctl
&= ~E1000_RCTL_UPE
;
2478 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2479 rctl
|= E1000_RCTL_VFE
;
2481 wr32(E1000_RCTL
, rctl
);
2483 if (netdev
->mc_count
) {
2484 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2486 dev_err(&adapter
->pdev
->dev
,
2487 "failed to allocate multicast filter list\n");
2492 /* The shared function expects a packed array of only addresses. */
2493 mc_ptr
= netdev
->mc_list
;
2495 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2498 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2499 mc_ptr
= mc_ptr
->next
;
2501 igb_update_mc_addr_list(hw
, mta_list
, i
,
2502 adapter
->vfs_allocated_count
+ 1,
2503 mac
->rar_entry_count
);
2505 igb_set_mc_list_pools(adapter
, i
, mac
->rar_entry_count
);
2506 igb_restore_vf_multicasts(adapter
);
2511 /* Need to wait a few seconds after link up to get diagnostic information from
2513 static void igb_update_phy_info(unsigned long data
)
2515 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2516 igb_get_phy_info(&adapter
->hw
);
2520 * igb_has_link - check shared code for link and determine up/down
2521 * @adapter: pointer to driver private info
2523 static bool igb_has_link(struct igb_adapter
*adapter
)
2525 struct e1000_hw
*hw
= &adapter
->hw
;
2526 bool link_active
= false;
2529 /* get_link_status is set on LSC (link status) interrupt or
2530 * rx sequence error interrupt. get_link_status will stay
2531 * false until the e1000_check_for_link establishes link
2532 * for copper adapters ONLY
2534 switch (hw
->phy
.media_type
) {
2535 case e1000_media_type_copper
:
2536 if (hw
->mac
.get_link_status
) {
2537 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2538 link_active
= !hw
->mac
.get_link_status
;
2543 case e1000_media_type_fiber
:
2544 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2545 link_active
= !!(rd32(E1000_STATUS
) & E1000_STATUS_LU
);
2547 case e1000_media_type_internal_serdes
:
2548 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2549 link_active
= hw
->mac
.serdes_has_link
;
2552 case e1000_media_type_unknown
:
2560 * igb_watchdog - Timer Call-back
2561 * @data: pointer to adapter cast into an unsigned long
2563 static void igb_watchdog(unsigned long data
)
2565 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2566 /* Do the rest outside of interrupt context */
2567 schedule_work(&adapter
->watchdog_task
);
2570 static void igb_watchdog_task(struct work_struct
*work
)
2572 struct igb_adapter
*adapter
= container_of(work
,
2573 struct igb_adapter
, watchdog_task
);
2574 struct e1000_hw
*hw
= &adapter
->hw
;
2575 struct net_device
*netdev
= adapter
->netdev
;
2576 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2581 link
= igb_has_link(adapter
);
2582 if ((netif_carrier_ok(netdev
)) && link
)
2586 if (!netif_carrier_ok(netdev
)) {
2588 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2589 &adapter
->link_speed
,
2590 &adapter
->link_duplex
);
2592 ctrl
= rd32(E1000_CTRL
);
2593 /* Links status message must follow this format */
2594 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2595 "Flow Control: %s\n",
2597 adapter
->link_speed
,
2598 adapter
->link_duplex
== FULL_DUPLEX
?
2599 "Full Duplex" : "Half Duplex",
2600 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2601 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2602 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2603 E1000_CTRL_TFCE
) ? "TX" : "None")));
2605 /* tweak tx_queue_len according to speed/duplex and
2606 * adjust the timeout factor */
2607 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2608 adapter
->tx_timeout_factor
= 1;
2609 switch (adapter
->link_speed
) {
2611 netdev
->tx_queue_len
= 10;
2612 adapter
->tx_timeout_factor
= 14;
2615 netdev
->tx_queue_len
= 100;
2616 /* maybe add some timeout factor ? */
2620 netif_carrier_on(netdev
);
2621 netif_tx_wake_all_queues(netdev
);
2623 igb_ping_all_vfs(adapter
);
2625 /* link state has changed, schedule phy info update */
2626 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2627 mod_timer(&adapter
->phy_info_timer
,
2628 round_jiffies(jiffies
+ 2 * HZ
));
2631 if (netif_carrier_ok(netdev
)) {
2632 adapter
->link_speed
= 0;
2633 adapter
->link_duplex
= 0;
2634 /* Links status message must follow this format */
2635 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2637 netif_carrier_off(netdev
);
2638 netif_tx_stop_all_queues(netdev
);
2640 igb_ping_all_vfs(adapter
);
2642 /* link state has changed, schedule phy info update */
2643 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2644 mod_timer(&adapter
->phy_info_timer
,
2645 round_jiffies(jiffies
+ 2 * HZ
));
2650 igb_update_stats(adapter
);
2652 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2653 adapter
->tpt_old
= adapter
->stats
.tpt
;
2654 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2655 adapter
->colc_old
= adapter
->stats
.colc
;
2657 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2658 adapter
->gorc_old
= adapter
->stats
.gorc
;
2659 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2660 adapter
->gotc_old
= adapter
->stats
.gotc
;
2662 igb_update_adaptive(&adapter
->hw
);
2664 if (!netif_carrier_ok(netdev
)) {
2665 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
2666 /* We've lost link, so the controller stops DMA,
2667 * but we've got queued Tx work that's never going
2668 * to get done, so reset controller to flush Tx.
2669 * (Do the reset outside of interrupt context). */
2670 adapter
->tx_timeout_count
++;
2671 schedule_work(&adapter
->reset_task
);
2675 /* Cause software interrupt to ensure rx ring is cleaned */
2676 if (adapter
->msix_entries
) {
2677 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2678 eics
|= adapter
->rx_ring
[i
].eims_value
;
2679 wr32(E1000_EICS
, eics
);
2681 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2684 /* Force detection of hung controller every watchdog period */
2685 tx_ring
->detect_tx_hung
= true;
2687 /* Reset the timer */
2688 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2689 mod_timer(&adapter
->watchdog_timer
,
2690 round_jiffies(jiffies
+ 2 * HZ
));
2693 enum latency_range
{
2697 latency_invalid
= 255
2702 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2704 * Stores a new ITR value based on strictly on packet size. This
2705 * algorithm is less sophisticated than that used in igb_update_itr,
2706 * due to the difficulty of synchronizing statistics across multiple
2707 * receive rings. The divisors and thresholds used by this fuction
2708 * were determined based on theoretical maximum wire speed and testing
2709 * data, in order to minimize response time while increasing bulk
2711 * This functionality is controlled by the InterruptThrottleRate module
2712 * parameter (see igb_param.c)
2713 * NOTE: This function is called only when operating in a multiqueue
2714 * receive environment.
2715 * @rx_ring: pointer to ring
2717 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2719 int new_val
= rx_ring
->itr_val
;
2720 int avg_wire_size
= 0;
2721 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2723 if (!rx_ring
->total_packets
)
2724 goto clear_counts
; /* no packets, so don't do anything */
2726 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2727 * ints/sec - ITR timer value of 120 ticks.
2729 if (adapter
->link_speed
!= SPEED_1000
) {
2733 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2735 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2736 avg_wire_size
+= 24;
2738 /* Don't starve jumbo frames */
2739 avg_wire_size
= min(avg_wire_size
, 3000);
2741 /* Give a little boost to mid-size frames */
2742 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2743 new_val
= avg_wire_size
/ 3;
2745 new_val
= avg_wire_size
/ 2;
2748 if (new_val
!= rx_ring
->itr_val
) {
2749 rx_ring
->itr_val
= new_val
;
2750 rx_ring
->set_itr
= 1;
2753 rx_ring
->total_bytes
= 0;
2754 rx_ring
->total_packets
= 0;
2758 * igb_update_itr - update the dynamic ITR value based on statistics
2759 * Stores a new ITR value based on packets and byte
2760 * counts during the last interrupt. The advantage of per interrupt
2761 * computation is faster updates and more accurate ITR for the current
2762 * traffic pattern. Constants in this function were computed
2763 * based on theoretical maximum wire speed and thresholds were set based
2764 * on testing data as well as attempting to minimize response time
2765 * while increasing bulk throughput.
2766 * this functionality is controlled by the InterruptThrottleRate module
2767 * parameter (see igb_param.c)
2768 * NOTE: These calculations are only valid when operating in a single-
2769 * queue environment.
2770 * @adapter: pointer to adapter
2771 * @itr_setting: current adapter->itr
2772 * @packets: the number of packets during this measurement interval
2773 * @bytes: the number of bytes during this measurement interval
2775 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2776 int packets
, int bytes
)
2778 unsigned int retval
= itr_setting
;
2781 goto update_itr_done
;
2783 switch (itr_setting
) {
2784 case lowest_latency
:
2785 /* handle TSO and jumbo frames */
2786 if (bytes
/packets
> 8000)
2787 retval
= bulk_latency
;
2788 else if ((packets
< 5) && (bytes
> 512))
2789 retval
= low_latency
;
2791 case low_latency
: /* 50 usec aka 20000 ints/s */
2792 if (bytes
> 10000) {
2793 /* this if handles the TSO accounting */
2794 if (bytes
/packets
> 8000) {
2795 retval
= bulk_latency
;
2796 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2797 retval
= bulk_latency
;
2798 } else if ((packets
> 35)) {
2799 retval
= lowest_latency
;
2801 } else if (bytes
/packets
> 2000) {
2802 retval
= bulk_latency
;
2803 } else if (packets
<= 2 && bytes
< 512) {
2804 retval
= lowest_latency
;
2807 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2808 if (bytes
> 25000) {
2810 retval
= low_latency
;
2811 } else if (bytes
< 1500) {
2812 retval
= low_latency
;
2821 static void igb_set_itr(struct igb_adapter
*adapter
)
2824 u32 new_itr
= adapter
->itr
;
2826 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2827 if (adapter
->link_speed
!= SPEED_1000
) {
2833 adapter
->rx_itr
= igb_update_itr(adapter
,
2835 adapter
->rx_ring
->total_packets
,
2836 adapter
->rx_ring
->total_bytes
);
2838 if (adapter
->rx_ring
->buddy
) {
2839 adapter
->tx_itr
= igb_update_itr(adapter
,
2841 adapter
->tx_ring
->total_packets
,
2842 adapter
->tx_ring
->total_bytes
);
2843 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2845 current_itr
= adapter
->rx_itr
;
2848 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2849 if (adapter
->itr_setting
== 3 && current_itr
== lowest_latency
)
2850 current_itr
= low_latency
;
2852 switch (current_itr
) {
2853 /* counts and packets in update_itr are dependent on these numbers */
2854 case lowest_latency
:
2858 new_itr
= 20000; /* aka hwitr = ~200 */
2868 adapter
->rx_ring
->total_bytes
= 0;
2869 adapter
->rx_ring
->total_packets
= 0;
2870 if (adapter
->rx_ring
->buddy
) {
2871 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2872 adapter
->rx_ring
->buddy
->total_packets
= 0;
2875 if (new_itr
!= adapter
->itr
) {
2876 /* this attempts to bias the interrupt rate towards Bulk
2877 * by adding intermediate steps when interrupt rate is
2879 new_itr
= new_itr
> adapter
->itr
?
2880 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2882 /* Don't write the value here; it resets the adapter's
2883 * internal timer, and causes us to delay far longer than
2884 * we should between interrupts. Instead, we write the ITR
2885 * value at the beginning of the next interrupt so the timing
2886 * ends up being correct.
2888 adapter
->itr
= new_itr
;
2889 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2890 adapter
->rx_ring
->set_itr
= 1;
2897 #define IGB_TX_FLAGS_CSUM 0x00000001
2898 #define IGB_TX_FLAGS_VLAN 0x00000002
2899 #define IGB_TX_FLAGS_TSO 0x00000004
2900 #define IGB_TX_FLAGS_IPV4 0x00000008
2901 #define IGB_TX_FLAGS_TSTAMP 0x00000010
2902 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2903 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2905 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2906 struct igb_ring
*tx_ring
,
2907 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2909 struct e1000_adv_tx_context_desc
*context_desc
;
2912 struct igb_buffer
*buffer_info
;
2913 u32 info
= 0, tu_cmd
= 0;
2914 u32 mss_l4len_idx
, l4len
;
2917 if (skb_header_cloned(skb
)) {
2918 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2923 l4len
= tcp_hdrlen(skb
);
2926 if (skb
->protocol
== htons(ETH_P_IP
)) {
2927 struct iphdr
*iph
= ip_hdr(skb
);
2930 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2934 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2935 ipv6_hdr(skb
)->payload_len
= 0;
2936 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2937 &ipv6_hdr(skb
)->daddr
,
2941 i
= tx_ring
->next_to_use
;
2943 buffer_info
= &tx_ring
->buffer_info
[i
];
2944 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2945 /* VLAN MACLEN IPLEN */
2946 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2947 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2948 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2949 *hdr_len
+= skb_network_offset(skb
);
2950 info
|= skb_network_header_len(skb
);
2951 *hdr_len
+= skb_network_header_len(skb
);
2952 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2954 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2955 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2957 if (skb
->protocol
== htons(ETH_P_IP
))
2958 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2959 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2961 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2964 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2965 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2967 /* For 82575, context index must be unique per ring. */
2968 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2969 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2971 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2972 context_desc
->seqnum_seed
= 0;
2974 buffer_info
->time_stamp
= jiffies
;
2975 buffer_info
->next_to_watch
= i
;
2976 buffer_info
->dma
= 0;
2978 if (i
== tx_ring
->count
)
2981 tx_ring
->next_to_use
= i
;
2986 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2987 struct igb_ring
*tx_ring
,
2988 struct sk_buff
*skb
, u32 tx_flags
)
2990 struct e1000_adv_tx_context_desc
*context_desc
;
2992 struct igb_buffer
*buffer_info
;
2993 u32 info
= 0, tu_cmd
= 0;
2995 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
2996 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
2997 i
= tx_ring
->next_to_use
;
2998 buffer_info
= &tx_ring
->buffer_info
[i
];
2999 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
3001 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3002 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
3003 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
3004 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3005 info
|= skb_network_header_len(skb
);
3007 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
3009 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3011 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3014 if (skb
->protocol
== cpu_to_be16(ETH_P_8021Q
)) {
3015 const struct vlan_ethhdr
*vhdr
=
3016 (const struct vlan_ethhdr
*)skb
->data
;
3018 protocol
= vhdr
->h_vlan_encapsulated_proto
;
3020 protocol
= skb
->protocol
;
3024 case cpu_to_be16(ETH_P_IP
):
3025 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3026 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3027 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3029 case cpu_to_be16(ETH_P_IPV6
):
3030 /* XXX what about other V6 headers?? */
3031 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3032 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3035 if (unlikely(net_ratelimit()))
3036 dev_warn(&adapter
->pdev
->dev
,
3037 "partial checksum but proto=%x!\n",
3043 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3044 context_desc
->seqnum_seed
= 0;
3045 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3046 context_desc
->mss_l4len_idx
=
3047 cpu_to_le32(tx_ring
->queue_index
<< 4);
3049 context_desc
->mss_l4len_idx
= 0;
3051 buffer_info
->time_stamp
= jiffies
;
3052 buffer_info
->next_to_watch
= i
;
3053 buffer_info
->dma
= 0;
3056 if (i
== tx_ring
->count
)
3058 tx_ring
->next_to_use
= i
;
3065 #define IGB_MAX_TXD_PWR 16
3066 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
3068 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
3069 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
3072 struct igb_buffer
*buffer_info
;
3073 unsigned int len
= skb_headlen(skb
);
3074 unsigned int count
= 0, i
;
3078 i
= tx_ring
->next_to_use
;
3080 if (skb_dma_map(&adapter
->pdev
->dev
, skb
, DMA_TO_DEVICE
)) {
3081 dev_err(&adapter
->pdev
->dev
, "TX DMA map failed\n");
3085 map
= skb_shinfo(skb
)->dma_maps
;
3087 buffer_info
= &tx_ring
->buffer_info
[i
];
3088 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3089 buffer_info
->length
= len
;
3090 /* set time_stamp *before* dma to help avoid a possible race */
3091 buffer_info
->time_stamp
= jiffies
;
3092 buffer_info
->next_to_watch
= i
;
3093 buffer_info
->dma
= map
[count
];
3096 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
3097 struct skb_frag_struct
*frag
;
3100 if (i
== tx_ring
->count
)
3103 frag
= &skb_shinfo(skb
)->frags
[f
];
3106 buffer_info
= &tx_ring
->buffer_info
[i
];
3107 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3108 buffer_info
->length
= len
;
3109 buffer_info
->time_stamp
= jiffies
;
3110 buffer_info
->next_to_watch
= i
;
3111 buffer_info
->dma
= map
[count
];
3115 tx_ring
->buffer_info
[i
].skb
= skb
;
3116 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
3121 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
3122 struct igb_ring
*tx_ring
,
3123 int tx_flags
, int count
, u32 paylen
,
3126 union e1000_adv_tx_desc
*tx_desc
= NULL
;
3127 struct igb_buffer
*buffer_info
;
3128 u32 olinfo_status
= 0, cmd_type_len
;
3131 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
3132 E1000_ADVTXD_DCMD_DEXT
);
3134 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3135 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
3137 if (tx_flags
& IGB_TX_FLAGS_TSTAMP
)
3138 cmd_type_len
|= E1000_ADVTXD_MAC_TSTAMP
;
3140 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
3141 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
3143 /* insert tcp checksum */
3144 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3146 /* insert ip checksum */
3147 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
3148 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
3150 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
3151 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3154 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
3155 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
3156 IGB_TX_FLAGS_VLAN
)))
3157 olinfo_status
|= tx_ring
->queue_index
<< 4;
3159 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
3161 i
= tx_ring
->next_to_use
;
3163 buffer_info
= &tx_ring
->buffer_info
[i
];
3164 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3165 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
3166 tx_desc
->read
.cmd_type_len
=
3167 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
3168 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3170 if (i
== tx_ring
->count
)
3174 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
3175 /* Force memory writes to complete before letting h/w
3176 * know there are new descriptors to fetch. (Only
3177 * applicable for weak-ordered memory model archs,
3178 * such as IA-64). */
3181 tx_ring
->next_to_use
= i
;
3182 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3183 /* we need this if more than one processor can write to our tail
3184 * at a time, it syncronizes IO on IA64/Altix systems */
3188 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
3189 struct igb_ring
*tx_ring
, int size
)
3191 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3193 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3195 /* Herbert's original patch had:
3196 * smp_mb__after_netif_stop_queue();
3197 * but since that doesn't exist yet, just open code it. */
3200 /* We need to check again in a case another CPU has just
3201 * made room available. */
3202 if (igb_desc_unused(tx_ring
) < size
)
3206 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3207 ++adapter
->restart_queue
;
3211 static int igb_maybe_stop_tx(struct net_device
*netdev
,
3212 struct igb_ring
*tx_ring
, int size
)
3214 if (igb_desc_unused(tx_ring
) >= size
)
3216 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
3219 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
3220 struct net_device
*netdev
,
3221 struct igb_ring
*tx_ring
)
3223 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3225 unsigned int tx_flags
= 0;
3229 union skb_shared_tx
*shtx
;
3231 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
3232 dev_kfree_skb_any(skb
);
3233 return NETDEV_TX_OK
;
3236 if (skb
->len
<= 0) {
3237 dev_kfree_skb_any(skb
);
3238 return NETDEV_TX_OK
;
3241 /* need: 1 descriptor per page,
3242 * + 2 desc gap to keep tail from touching head,
3243 * + 1 desc for skb->data,
3244 * + 1 desc for context descriptor,
3245 * otherwise try next time */
3246 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3247 /* this is a hard error */
3248 return NETDEV_TX_BUSY
;
3252 * TODO: check that there currently is no other packet with
3253 * time stamping in the queue
3255 * When doing time stamping, keep the connection to the socket
3256 * a while longer: it is still needed by skb_hwtstamp_tx(),
3257 * called either in igb_tx_hwtstamp() or by our caller when
3258 * doing software time stamping.
3261 if (unlikely(shtx
->hardware
)) {
3262 shtx
->in_progress
= 1;
3263 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
3266 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3267 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3268 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3271 if (skb
->protocol
== htons(ETH_P_IP
))
3272 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3274 first
= tx_ring
->next_to_use
;
3275 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3279 dev_kfree_skb_any(skb
);
3280 return NETDEV_TX_OK
;
3284 tx_flags
|= IGB_TX_FLAGS_TSO
;
3285 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
) &&
3286 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3287 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3290 * count reflects descriptors mapped, if 0 then mapping error
3291 * has occured and we need to rewind the descriptor queue
3293 count
= igb_tx_map_adv(adapter
, tx_ring
, skb
, first
);
3296 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
, count
,
3298 netdev
->trans_start
= jiffies
;
3299 /* Make sure there is space in the ring for the next send. */
3300 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3302 dev_kfree_skb_any(skb
);
3303 tx_ring
->buffer_info
[first
].time_stamp
= 0;
3304 tx_ring
->next_to_use
= first
;
3307 return NETDEV_TX_OK
;
3310 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3312 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3313 struct igb_ring
*tx_ring
;
3316 r_idx
= skb
->queue_mapping
& (IGB_ABS_MAX_TX_QUEUES
- 1);
3317 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3319 /* This goes back to the question of how to logically map a tx queue
3320 * to a flow. Right now, performance is impacted slightly negatively
3321 * if using multiple tx queues. If the stack breaks away from a
3322 * single qdisc implementation, we can look at this again. */
3323 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3327 * igb_tx_timeout - Respond to a Tx Hang
3328 * @netdev: network interface device structure
3330 static void igb_tx_timeout(struct net_device
*netdev
)
3332 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3333 struct e1000_hw
*hw
= &adapter
->hw
;
3335 /* Do the reset outside of interrupt context */
3336 adapter
->tx_timeout_count
++;
3337 schedule_work(&adapter
->reset_task
);
3339 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3342 static void igb_reset_task(struct work_struct
*work
)
3344 struct igb_adapter
*adapter
;
3345 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3347 igb_reinit_locked(adapter
);
3351 * igb_get_stats - Get System Network Statistics
3352 * @netdev: network interface device structure
3354 * Returns the address of the device statistics structure.
3355 * The statistics are actually updated from the timer callback.
3357 static struct net_device_stats
*igb_get_stats(struct net_device
*netdev
)
3359 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3361 /* only return the current stats */
3362 return &adapter
->net_stats
;
3366 * igb_change_mtu - Change the Maximum Transfer Unit
3367 * @netdev: network interface device structure
3368 * @new_mtu: new value for maximum frame size
3370 * Returns 0 on success, negative on failure
3372 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3374 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3375 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3377 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3378 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3379 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3383 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3384 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3388 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3391 /* igb_down has a dependency on max_frame_size */
3392 adapter
->max_frame_size
= max_frame
;
3393 if (netif_running(netdev
))
3396 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3397 * means we reserve 2 more, this pushes us to allocate from the next
3399 * i.e. RXBUFFER_2048 --> size-4096 slab
3402 if (max_frame
<= IGB_RXBUFFER_256
)
3403 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3404 else if (max_frame
<= IGB_RXBUFFER_512
)
3405 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3406 else if (max_frame
<= IGB_RXBUFFER_1024
)
3407 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3408 else if (max_frame
<= IGB_RXBUFFER_2048
)
3409 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3411 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3412 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3414 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3417 /* if sr-iov is enabled we need to force buffer size to 1K or larger */
3418 if (adapter
->vfs_allocated_count
&&
3419 (adapter
->rx_buffer_len
< IGB_RXBUFFER_1024
))
3420 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3422 /* adjust allocation if LPE protects us, and we aren't using SBP */
3423 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3424 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3425 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3427 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3428 netdev
->mtu
, new_mtu
);
3429 netdev
->mtu
= new_mtu
;
3431 if (netif_running(netdev
))
3436 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3442 * igb_update_stats - Update the board statistics counters
3443 * @adapter: board private structure
3446 void igb_update_stats(struct igb_adapter
*adapter
)
3448 struct e1000_hw
*hw
= &adapter
->hw
;
3449 struct pci_dev
*pdev
= adapter
->pdev
;
3452 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3455 * Prevent stats update while adapter is being reset, or if the pci
3456 * connection is down.
3458 if (adapter
->link_speed
== 0)
3460 if (pci_channel_offline(pdev
))
3463 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3464 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3465 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3466 rd32(E1000_GORCH
); /* clear GORCL */
3467 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3468 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3469 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3471 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3472 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3473 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3474 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3475 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3476 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3477 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3478 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3480 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3481 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3482 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3483 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3484 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3485 adapter
->stats
.dc
+= rd32(E1000_DC
);
3486 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3487 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3488 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3489 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3490 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3491 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3492 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3493 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3494 rd32(E1000_GOTCH
); /* clear GOTCL */
3495 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3496 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3497 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3498 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3499 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3500 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3501 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3503 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3504 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3505 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3506 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3507 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3508 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3510 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3511 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3513 /* used for adaptive IFS */
3515 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3516 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3517 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3518 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3520 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3521 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3522 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3523 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3524 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3526 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3527 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3528 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3529 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3530 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3531 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3532 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3533 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3534 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3536 /* Fill out the OS statistics structure */
3537 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3538 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3542 /* RLEC on some newer hardware can be incorrect so build
3543 * our own version based on RUC and ROC */
3544 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3545 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3546 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3547 adapter
->stats
.cexterr
;
3548 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3550 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3551 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3552 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3555 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3556 adapter
->stats
.latecol
;
3557 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3558 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3559 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3561 /* Tx Dropped needs to be maintained elsewhere */
3564 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3565 if ((adapter
->link_speed
== SPEED_1000
) &&
3566 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
3567 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3568 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3572 /* Management Stats */
3573 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3574 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3575 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3578 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3580 struct net_device
*netdev
= data
;
3581 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3582 struct e1000_hw
*hw
= &adapter
->hw
;
3583 u32 icr
= rd32(E1000_ICR
);
3585 /* reading ICR causes bit 31 of EICR to be cleared */
3587 if(icr
& E1000_ICR_DOUTSYNC
) {
3588 /* HW is reporting DMA is out of sync */
3589 adapter
->stats
.doosync
++;
3592 /* Check for a mailbox event */
3593 if (icr
& E1000_ICR_VMMB
)
3594 igb_msg_task(adapter
);
3596 if (icr
& E1000_ICR_LSC
) {
3597 hw
->mac
.get_link_status
= 1;
3598 /* guard against interrupt when we're going down */
3599 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3600 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3603 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_VMMB
);
3604 wr32(E1000_EIMS
, adapter
->eims_other
);
3609 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3611 struct igb_ring
*tx_ring
= data
;
3612 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3613 struct e1000_hw
*hw
= &adapter
->hw
;
3615 #ifdef CONFIG_IGB_DCA
3616 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3617 igb_update_tx_dca(tx_ring
);
3620 tx_ring
->total_bytes
= 0;
3621 tx_ring
->total_packets
= 0;
3623 /* auto mask will automatically reenable the interrupt when we write
3625 if (!igb_clean_tx_irq(tx_ring
))
3626 /* Ring was not completely cleaned, so fire another interrupt */
3627 wr32(E1000_EICS
, tx_ring
->eims_value
);
3629 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3634 static void igb_write_itr(struct igb_ring
*ring
)
3636 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3637 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3638 switch (hw
->mac
.type
) {
3640 wr32(ring
->itr_register
, ring
->itr_val
|
3644 wr32(ring
->itr_register
, ring
->itr_val
|
3645 (ring
->itr_val
<< 16));
3652 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3654 struct igb_ring
*rx_ring
= data
;
3656 /* Write the ITR value calculated at the end of the
3657 * previous interrupt.
3660 igb_write_itr(rx_ring
);
3662 if (napi_schedule_prep(&rx_ring
->napi
))
3663 __napi_schedule(&rx_ring
->napi
);
3665 #ifdef CONFIG_IGB_DCA
3666 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3667 igb_update_rx_dca(rx_ring
);
3672 #ifdef CONFIG_IGB_DCA
3673 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3676 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3677 struct e1000_hw
*hw
= &adapter
->hw
;
3678 int cpu
= get_cpu();
3679 int q
= rx_ring
->reg_idx
;
3681 if (rx_ring
->cpu
!= cpu
) {
3682 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3683 if (hw
->mac
.type
== e1000_82576
) {
3684 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3685 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3686 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3688 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3689 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3691 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3692 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3693 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3694 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3700 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3703 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3704 struct e1000_hw
*hw
= &adapter
->hw
;
3705 int cpu
= get_cpu();
3706 int q
= tx_ring
->reg_idx
;
3708 if (tx_ring
->cpu
!= cpu
) {
3709 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3710 if (hw
->mac
.type
== e1000_82576
) {
3711 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3712 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3713 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3715 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3716 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3718 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3719 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3725 static void igb_setup_dca(struct igb_adapter
*adapter
)
3729 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3732 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3733 adapter
->tx_ring
[i
].cpu
= -1;
3734 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3736 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3737 adapter
->rx_ring
[i
].cpu
= -1;
3738 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3742 static int __igb_notify_dca(struct device
*dev
, void *data
)
3744 struct net_device
*netdev
= dev_get_drvdata(dev
);
3745 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3746 struct e1000_hw
*hw
= &adapter
->hw
;
3747 unsigned long event
= *(unsigned long *)data
;
3750 case DCA_PROVIDER_ADD
:
3751 /* if already enabled, don't do it again */
3752 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3754 /* Always use CB2 mode, difference is masked
3755 * in the CB driver. */
3756 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3757 if (dca_add_requester(dev
) == 0) {
3758 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3759 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3760 igb_setup_dca(adapter
);
3763 /* Fall Through since DCA is disabled. */
3764 case DCA_PROVIDER_REMOVE
:
3765 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3766 /* without this a class_device is left
3767 * hanging around in the sysfs model */
3768 dca_remove_requester(dev
);
3769 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3770 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3771 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
3779 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3784 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3787 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3789 #endif /* CONFIG_IGB_DCA */
3791 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
3793 struct e1000_hw
*hw
= &adapter
->hw
;
3797 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
3798 ping
= E1000_PF_CONTROL_MSG
;
3799 if (adapter
->vf_data
[i
].clear_to_send
)
3800 ping
|= E1000_VT_MSGTYPE_CTS
;
3801 igb_write_mbx(hw
, &ping
, 1, i
);
3805 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
3806 u32
*msgbuf
, u32 vf
)
3808 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3809 u16
*hash_list
= (u16
*)&msgbuf
[1];
3810 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
3813 /* only up to 30 hash values supported */
3817 /* salt away the number of multi cast addresses assigned
3818 * to this VF for later use to restore when the PF multi cast
3821 vf_data
->num_vf_mc_hashes
= n
;
3823 /* VFs are limited to using the MTA hash table for their multicast
3825 for (i
= 0; i
< n
; i
++)
3826 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];;
3828 /* Flush and reset the mta with the new values */
3829 igb_set_multi(adapter
->netdev
);
3834 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
3836 struct e1000_hw
*hw
= &adapter
->hw
;
3837 struct vf_data_storage
*vf_data
;
3840 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
3841 vf_data
= &adapter
->vf_data
[i
];
3842 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
3843 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
3847 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
3849 struct e1000_hw
*hw
= &adapter
->hw
;
3850 u32 pool_mask
, reg
, vid
;
3853 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3855 /* Find the vlan filter for this id */
3856 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3857 reg
= rd32(E1000_VLVF(i
));
3859 /* remove the vf from the pool */
3862 /* if pool is empty then remove entry from vfta */
3863 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
3864 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
3866 vid
= reg
& E1000_VLVF_VLANID_MASK
;
3867 igb_vfta_set(hw
, vid
, false);
3870 wr32(E1000_VLVF(i
), reg
);
3874 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
3876 struct e1000_hw
*hw
= &adapter
->hw
;
3879 /* It is an error to call this function when VFs are not enabled */
3880 if (!adapter
->vfs_allocated_count
)
3883 /* Find the vlan filter for this id */
3884 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3885 reg
= rd32(E1000_VLVF(i
));
3886 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
3887 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
3892 if (i
== E1000_VLVF_ARRAY_SIZE
) {
3893 /* Did not find a matching VLAN ID entry that was
3894 * enabled. Search for a free filter entry, i.e.
3895 * one without the enable bit set
3897 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3898 reg
= rd32(E1000_VLVF(i
));
3899 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
3903 if (i
< E1000_VLVF_ARRAY_SIZE
) {
3904 /* Found an enabled/available entry */
3905 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3907 /* if !enabled we need to set this up in vfta */
3908 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
3909 /* add VID to filter table, if bit already set
3910 * PF must have added it outside of table */
3911 if (igb_vfta_set(hw
, vid
, true))
3912 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
3913 adapter
->vfs_allocated_count
);
3914 reg
|= E1000_VLVF_VLANID_ENABLE
;
3916 reg
&= ~E1000_VLVF_VLANID_MASK
;
3919 wr32(E1000_VLVF(i
), reg
);
3923 if (i
< E1000_VLVF_ARRAY_SIZE
) {
3924 /* remove vf from the pool */
3925 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
3926 /* if pool is empty then remove entry from vfta */
3927 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
3929 igb_vfta_set(hw
, vid
, false);
3931 wr32(E1000_VLVF(i
), reg
);
3938 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
3940 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3941 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
3943 return igb_vlvf_set(adapter
, vid
, add
, vf
);
3946 static inline void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
3948 struct e1000_hw
*hw
= &adapter
->hw
;
3950 /* disable mailbox functionality for vf */
3951 adapter
->vf_data
[vf
].clear_to_send
= false;
3953 /* reset offloads to defaults */
3954 igb_set_vmolr(hw
, vf
);
3956 /* reset vlans for device */
3957 igb_clear_vf_vfta(adapter
, vf
);
3959 /* reset multicast table array for vf */
3960 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
3962 /* Flush and reset the mta with the new values */
3963 igb_set_multi(adapter
->netdev
);
3966 static inline void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
3968 struct e1000_hw
*hw
= &adapter
->hw
;
3969 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
3971 u8
*addr
= (u8
*)(&msgbuf
[1]);
3973 /* process all the same items cleared in a function level reset */
3974 igb_vf_reset_event(adapter
, vf
);
3976 /* set vf mac address */
3977 igb_rar_set(hw
, vf_mac
, vf
+ 1);
3978 igb_set_rah_pool(hw
, vf
, vf
+ 1);
3980 /* enable transmit and receive for vf */
3981 reg
= rd32(E1000_VFTE
);
3982 wr32(E1000_VFTE
, reg
| (1 << vf
));
3983 reg
= rd32(E1000_VFRE
);
3984 wr32(E1000_VFRE
, reg
| (1 << vf
));
3986 /* enable mailbox functionality for vf */
3987 adapter
->vf_data
[vf
].clear_to_send
= true;
3989 /* reply to reset with ack and vf mac address */
3990 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
3991 memcpy(addr
, vf_mac
, 6);
3992 igb_write_mbx(hw
, msgbuf
, 3, vf
);
3995 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
3997 unsigned char *addr
= (char *)&msg
[1];
4000 if (is_valid_ether_addr(addr
))
4001 err
= igb_set_vf_mac(adapter
, vf
, addr
);
4007 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4009 struct e1000_hw
*hw
= &adapter
->hw
;
4010 u32 msg
= E1000_VT_MSGTYPE_NACK
;
4012 /* if device isn't clear to send it shouldn't be reading either */
4013 if (!adapter
->vf_data
[vf
].clear_to_send
)
4014 igb_write_mbx(hw
, &msg
, 1, vf
);
4018 static void igb_msg_task(struct igb_adapter
*adapter
)
4020 struct e1000_hw
*hw
= &adapter
->hw
;
4023 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
4024 /* process any reset requests */
4025 if (!igb_check_for_rst(hw
, vf
)) {
4026 adapter
->vf_data
[vf
].clear_to_send
= false;
4027 igb_vf_reset_event(adapter
, vf
);
4030 /* process any messages pending */
4031 if (!igb_check_for_msg(hw
, vf
))
4032 igb_rcv_msg_from_vf(adapter
, vf
);
4034 /* process any acks */
4035 if (!igb_check_for_ack(hw
, vf
))
4036 igb_rcv_ack_from_vf(adapter
, vf
);
4041 static int igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4043 u32 mbx_size
= E1000_VFMAILBOX_SIZE
;
4044 u32 msgbuf
[mbx_size
];
4045 struct e1000_hw
*hw
= &adapter
->hw
;
4048 retval
= igb_read_mbx(hw
, msgbuf
, mbx_size
, vf
);
4051 dev_err(&adapter
->pdev
->dev
,
4052 "Error receiving message from VF\n");
4054 /* this is a message we already processed, do nothing */
4055 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
4059 * until the vf completes a reset it should not be
4060 * allowed to start any configuration.
4063 if (msgbuf
[0] == E1000_VF_RESET
) {
4064 igb_vf_reset_msg(adapter
, vf
);
4069 if (!adapter
->vf_data
[vf
].clear_to_send
) {
4070 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4071 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4075 switch ((msgbuf
[0] & 0xFFFF)) {
4076 case E1000_VF_SET_MAC_ADDR
:
4077 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
4079 case E1000_VF_SET_MULTICAST
:
4080 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
4082 case E1000_VF_SET_LPE
:
4083 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
4085 case E1000_VF_SET_VLAN
:
4086 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
4089 dev_err(&adapter
->pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
4094 /* notify the VF of the results of what it sent us */
4096 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4098 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
4100 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
4102 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4108 * igb_intr_msi - Interrupt Handler
4109 * @irq: interrupt number
4110 * @data: pointer to a network interface device structure
4112 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
4114 struct net_device
*netdev
= data
;
4115 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4116 struct e1000_hw
*hw
= &adapter
->hw
;
4117 /* read ICR disables interrupts using IAM */
4118 u32 icr
= rd32(E1000_ICR
);
4120 igb_write_itr(adapter
->rx_ring
);
4122 if(icr
& E1000_ICR_DOUTSYNC
) {
4123 /* HW is reporting DMA is out of sync */
4124 adapter
->stats
.doosync
++;
4127 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4128 hw
->mac
.get_link_status
= 1;
4129 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4130 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4133 napi_schedule(&adapter
->rx_ring
[0].napi
);
4139 * igb_intr - Legacy Interrupt Handler
4140 * @irq: interrupt number
4141 * @data: pointer to a network interface device structure
4143 static irqreturn_t
igb_intr(int irq
, void *data
)
4145 struct net_device
*netdev
= data
;
4146 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4147 struct e1000_hw
*hw
= &adapter
->hw
;
4148 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
4149 * need for the IMC write */
4150 u32 icr
= rd32(E1000_ICR
);
4152 return IRQ_NONE
; /* Not our interrupt */
4154 igb_write_itr(adapter
->rx_ring
);
4156 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
4157 * not set, then the adapter didn't send an interrupt */
4158 if (!(icr
& E1000_ICR_INT_ASSERTED
))
4161 if(icr
& E1000_ICR_DOUTSYNC
) {
4162 /* HW is reporting DMA is out of sync */
4163 adapter
->stats
.doosync
++;
4166 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4167 hw
->mac
.get_link_status
= 1;
4168 /* guard against interrupt when we're going down */
4169 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4170 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4173 napi_schedule(&adapter
->rx_ring
[0].napi
);
4178 static inline void igb_rx_irq_enable(struct igb_ring
*rx_ring
)
4180 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4181 struct e1000_hw
*hw
= &adapter
->hw
;
4183 if (adapter
->itr_setting
& 3) {
4184 if (adapter
->num_rx_queues
== 1)
4185 igb_set_itr(adapter
);
4187 igb_update_ring_itr(rx_ring
);
4190 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4191 if (adapter
->msix_entries
)
4192 wr32(E1000_EIMS
, rx_ring
->eims_value
);
4194 igb_irq_enable(adapter
);
4199 * igb_poll - NAPI Rx polling callback
4200 * @napi: napi polling structure
4201 * @budget: count of how many packets we should handle
4203 static int igb_poll(struct napi_struct
*napi
, int budget
)
4205 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
4208 #ifdef CONFIG_IGB_DCA
4209 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4210 igb_update_rx_dca(rx_ring
);
4212 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
4214 if (rx_ring
->buddy
) {
4215 #ifdef CONFIG_IGB_DCA
4216 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4217 igb_update_tx_dca(rx_ring
->buddy
);
4219 if (!igb_clean_tx_irq(rx_ring
->buddy
))
4223 /* If not enough Rx work done, exit the polling mode */
4224 if (work_done
< budget
) {
4225 napi_complete(napi
);
4226 igb_rx_irq_enable(rx_ring
);
4233 * igb_hwtstamp - utility function which checks for TX time stamp
4234 * @adapter: board private structure
4235 * @skb: packet that was just sent
4237 * If we were asked to do hardware stamping and such a time stamp is
4238 * available, then it must have been for this skb here because we only
4239 * allow only one such packet into the queue.
4241 static void igb_tx_hwtstamp(struct igb_adapter
*adapter
, struct sk_buff
*skb
)
4243 union skb_shared_tx
*shtx
= skb_tx(skb
);
4244 struct e1000_hw
*hw
= &adapter
->hw
;
4246 if (unlikely(shtx
->hardware
)) {
4247 u32 valid
= rd32(E1000_TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
;
4249 u64 regval
= rd32(E1000_TXSTMPL
);
4251 struct skb_shared_hwtstamps shhwtstamps
;
4253 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
4254 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
4255 ns
= timecounter_cyc2time(&adapter
->clock
,
4257 timecompare_update(&adapter
->compare
, ns
);
4258 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
4259 shhwtstamps
.syststamp
=
4260 timecompare_transform(&adapter
->compare
, ns
);
4261 skb_tstamp_tx(skb
, &shhwtstamps
);
4267 * igb_clean_tx_irq - Reclaim resources after transmit completes
4268 * @adapter: board private structure
4269 * returns true if ring is completely cleaned
4271 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
4273 struct igb_adapter
*adapter
= tx_ring
->adapter
;
4274 struct net_device
*netdev
= adapter
->netdev
;
4275 struct e1000_hw
*hw
= &adapter
->hw
;
4276 struct igb_buffer
*buffer_info
;
4277 struct sk_buff
*skb
;
4278 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
4279 unsigned int total_bytes
= 0, total_packets
= 0;
4280 unsigned int i
, eop
, count
= 0;
4281 bool cleaned
= false;
4283 i
= tx_ring
->next_to_clean
;
4284 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4285 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4287 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
4288 (count
< tx_ring
->count
)) {
4289 for (cleaned
= false; !cleaned
; count
++) {
4290 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
4291 buffer_info
= &tx_ring
->buffer_info
[i
];
4292 cleaned
= (i
== eop
);
4293 skb
= buffer_info
->skb
;
4296 unsigned int segs
, bytecount
;
4297 /* gso_segs is currently only valid for tcp */
4298 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
4299 /* multiply data chunks by size of headers */
4300 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
4302 total_packets
+= segs
;
4303 total_bytes
+= bytecount
;
4305 igb_tx_hwtstamp(adapter
, skb
);
4308 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
4309 tx_desc
->wb
.status
= 0;
4312 if (i
== tx_ring
->count
)
4315 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4316 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4319 tx_ring
->next_to_clean
= i
;
4321 if (unlikely(count
&&
4322 netif_carrier_ok(netdev
) &&
4323 igb_desc_unused(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
4324 /* Make sure that anybody stopping the queue after this
4325 * sees the new next_to_clean.
4328 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
4329 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
4330 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4331 ++adapter
->restart_queue
;
4335 if (tx_ring
->detect_tx_hung
) {
4336 /* Detect a transmit hang in hardware, this serializes the
4337 * check with the clearing of time_stamp and movement of i */
4338 tx_ring
->detect_tx_hung
= false;
4339 if (tx_ring
->buffer_info
[i
].time_stamp
&&
4340 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
4341 (adapter
->tx_timeout_factor
* HZ
))
4342 && !(rd32(E1000_STATUS
) &
4343 E1000_STATUS_TXOFF
)) {
4345 /* detected Tx unit hang */
4346 dev_err(&adapter
->pdev
->dev
,
4347 "Detected Tx Unit Hang\n"
4351 " next_to_use <%x>\n"
4352 " next_to_clean <%x>\n"
4353 "buffer_info[next_to_clean]\n"
4354 " time_stamp <%lx>\n"
4355 " next_to_watch <%x>\n"
4357 " desc.status <%x>\n",
4358 tx_ring
->queue_index
,
4359 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
4360 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
4361 tx_ring
->next_to_use
,
4362 tx_ring
->next_to_clean
,
4363 tx_ring
->buffer_info
[i
].time_stamp
,
4366 eop_desc
->wb
.status
);
4367 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4370 tx_ring
->total_bytes
+= total_bytes
;
4371 tx_ring
->total_packets
+= total_packets
;
4372 tx_ring
->tx_stats
.bytes
+= total_bytes
;
4373 tx_ring
->tx_stats
.packets
+= total_packets
;
4374 adapter
->net_stats
.tx_bytes
+= total_bytes
;
4375 adapter
->net_stats
.tx_packets
+= total_packets
;
4376 return (count
< tx_ring
->count
);
4380 * igb_receive_skb - helper function to handle rx indications
4381 * @ring: pointer to receive ring receving this packet
4382 * @status: descriptor status field as written by hardware
4383 * @rx_desc: receive descriptor containing vlan and type information.
4384 * @skb: pointer to sk_buff to be indicated to stack
4386 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
4387 union e1000_adv_rx_desc
* rx_desc
,
4388 struct sk_buff
*skb
)
4390 struct igb_adapter
* adapter
= ring
->adapter
;
4391 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
4393 skb_record_rx_queue(skb
, ring
->queue_index
);
4394 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
4396 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
4397 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
4400 napi_gro_receive(&ring
->napi
, skb
);
4403 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
4404 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
4406 netif_receive_skb(skb
);
4410 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
4411 u32 status_err
, struct sk_buff
*skb
)
4413 skb
->ip_summed
= CHECKSUM_NONE
;
4415 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
4416 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
4418 /* TCP/UDP checksum error bit is set */
4420 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
4421 /* let the stack verify checksum errors */
4422 adapter
->hw_csum_err
++;
4425 /* It must be a TCP or UDP packet with a valid checksum */
4426 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
4427 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
4429 adapter
->hw_csum_good
++;
4432 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
4433 int *work_done
, int budget
)
4435 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4436 struct net_device
*netdev
= adapter
->netdev
;
4437 struct e1000_hw
*hw
= &adapter
->hw
;
4438 struct pci_dev
*pdev
= adapter
->pdev
;
4439 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
4440 struct igb_buffer
*buffer_info
, *next_buffer
;
4441 struct sk_buff
*skb
;
4442 bool cleaned
= false;
4443 int cleaned_count
= 0;
4444 unsigned int total_bytes
= 0, total_packets
= 0;
4446 u32 length
, hlen
, staterr
;
4448 i
= rx_ring
->next_to_clean
;
4449 buffer_info
= &rx_ring
->buffer_info
[i
];
4450 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4451 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4453 while (staterr
& E1000_RXD_STAT_DD
) {
4454 if (*work_done
>= budget
)
4458 skb
= buffer_info
->skb
;
4459 prefetch(skb
->data
- NET_IP_ALIGN
);
4460 buffer_info
->skb
= NULL
;
4463 if (i
== rx_ring
->count
)
4465 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4467 next_buffer
= &rx_ring
->buffer_info
[i
];
4469 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
4473 if (!adapter
->rx_ps_hdr_size
) {
4474 pci_unmap_single(pdev
, buffer_info
->dma
,
4475 adapter
->rx_buffer_len
+
4477 PCI_DMA_FROMDEVICE
);
4478 skb_put(skb
, length
);
4482 /* HW will not DMA in data larger than the given buffer, even
4483 * if it parses the (NFS, of course) header to be larger. In
4484 * that case, it fills the header buffer and spills the rest
4487 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
4488 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
4489 if (hlen
> adapter
->rx_ps_hdr_size
)
4490 hlen
= adapter
->rx_ps_hdr_size
;
4492 if (!skb_shinfo(skb
)->nr_frags
) {
4493 pci_unmap_single(pdev
, buffer_info
->dma
,
4494 adapter
->rx_ps_hdr_size
+ NET_IP_ALIGN
,
4495 PCI_DMA_FROMDEVICE
);
4500 pci_unmap_page(pdev
, buffer_info
->page_dma
,
4501 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
4502 buffer_info
->page_dma
= 0;
4504 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
4506 buffer_info
->page_offset
,
4509 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
4510 (page_count(buffer_info
->page
) != 1))
4511 buffer_info
->page
= NULL
;
4513 get_page(buffer_info
->page
);
4516 skb
->data_len
+= length
;
4518 skb
->truesize
+= length
;
4521 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
4522 buffer_info
->skb
= next_buffer
->skb
;
4523 buffer_info
->dma
= next_buffer
->dma
;
4524 next_buffer
->skb
= skb
;
4525 next_buffer
->dma
= 0;
4530 * If this bit is set, then the RX registers contain
4531 * the time stamp. No other packet will be time
4532 * stamped until we read these registers, so read the
4533 * registers to make them available again. Because
4534 * only one packet can be time stamped at a time, we
4535 * know that the register values must belong to this
4536 * one here and therefore we don't need to compare
4537 * any of the additional attributes stored for it.
4539 * If nothing went wrong, then it should have a
4540 * skb_shared_tx that we can turn into a
4541 * skb_shared_hwtstamps.
4543 * TODO: can time stamping be triggered (thus locking
4544 * the registers) without the packet reaching this point
4545 * here? In that case RX time stamping would get stuck.
4547 * TODO: in "time stamp all packets" mode this bit is
4548 * not set. Need a global flag for this mode and then
4549 * always read the registers. Cannot be done without
4552 if (unlikely(staterr
& E1000_RXD_STAT_TS
)) {
4555 struct skb_shared_hwtstamps
*shhwtstamps
=
4558 WARN(!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
),
4559 "igb: no RX time stamp available for time stamped packet");
4560 regval
= rd32(E1000_RXSTMPL
);
4561 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
4562 ns
= timecounter_cyc2time(&adapter
->clock
, regval
);
4563 timecompare_update(&adapter
->compare
, ns
);
4564 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
4565 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
4566 shhwtstamps
->syststamp
=
4567 timecompare_transform(&adapter
->compare
, ns
);
4570 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
4571 dev_kfree_skb_irq(skb
);
4575 total_bytes
+= skb
->len
;
4578 igb_rx_checksum_adv(adapter
, staterr
, skb
);
4580 skb
->protocol
= eth_type_trans(skb
, netdev
);
4582 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
4585 rx_desc
->wb
.upper
.status_error
= 0;
4587 /* return some buffers to hardware, one at a time is too slow */
4588 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
4589 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4593 /* use prefetched values */
4595 buffer_info
= next_buffer
;
4596 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4599 rx_ring
->next_to_clean
= i
;
4600 cleaned_count
= igb_desc_unused(rx_ring
);
4603 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4605 rx_ring
->total_packets
+= total_packets
;
4606 rx_ring
->total_bytes
+= total_bytes
;
4607 rx_ring
->rx_stats
.packets
+= total_packets
;
4608 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4609 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4610 adapter
->net_stats
.rx_packets
+= total_packets
;
4615 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4616 * @adapter: address of board private structure
4618 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4621 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4622 struct net_device
*netdev
= adapter
->netdev
;
4623 struct pci_dev
*pdev
= adapter
->pdev
;
4624 union e1000_adv_rx_desc
*rx_desc
;
4625 struct igb_buffer
*buffer_info
;
4626 struct sk_buff
*skb
;
4630 i
= rx_ring
->next_to_use
;
4631 buffer_info
= &rx_ring
->buffer_info
[i
];
4633 if (adapter
->rx_ps_hdr_size
)
4634 bufsz
= adapter
->rx_ps_hdr_size
;
4636 bufsz
= adapter
->rx_buffer_len
;
4637 bufsz
+= NET_IP_ALIGN
;
4639 while (cleaned_count
--) {
4640 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4642 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4643 if (!buffer_info
->page
) {
4644 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4645 if (!buffer_info
->page
) {
4646 adapter
->alloc_rx_buff_failed
++;
4649 buffer_info
->page_offset
= 0;
4651 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4653 buffer_info
->page_dma
=
4654 pci_map_page(pdev
, buffer_info
->page
,
4655 buffer_info
->page_offset
,
4657 PCI_DMA_FROMDEVICE
);
4660 if (!buffer_info
->skb
) {
4661 skb
= netdev_alloc_skb(netdev
, bufsz
);
4663 adapter
->alloc_rx_buff_failed
++;
4667 /* Make buffer alignment 2 beyond a 16 byte boundary
4668 * this will result in a 16 byte aligned IP header after
4669 * the 14 byte MAC header is removed
4671 skb_reserve(skb
, NET_IP_ALIGN
);
4673 buffer_info
->skb
= skb
;
4674 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4676 PCI_DMA_FROMDEVICE
);
4678 /* Refresh the desc even if buffer_addrs didn't change because
4679 * each write-back erases this info. */
4680 if (adapter
->rx_ps_hdr_size
) {
4681 rx_desc
->read
.pkt_addr
=
4682 cpu_to_le64(buffer_info
->page_dma
);
4683 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4685 rx_desc
->read
.pkt_addr
=
4686 cpu_to_le64(buffer_info
->dma
);
4687 rx_desc
->read
.hdr_addr
= 0;
4691 if (i
== rx_ring
->count
)
4693 buffer_info
= &rx_ring
->buffer_info
[i
];
4697 if (rx_ring
->next_to_use
!= i
) {
4698 rx_ring
->next_to_use
= i
;
4700 i
= (rx_ring
->count
- 1);
4704 /* Force memory writes to complete before letting h/w
4705 * know there are new descriptors to fetch. (Only
4706 * applicable for weak-ordered memory model archs,
4707 * such as IA-64). */
4709 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4719 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4721 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4722 struct mii_ioctl_data
*data
= if_mii(ifr
);
4724 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4729 data
->phy_id
= adapter
->hw
.phy
.addr
;
4732 if (!capable(CAP_NET_ADMIN
))
4734 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4746 * igb_hwtstamp_ioctl - control hardware time stamping
4751 * Outgoing time stamping can be enabled and disabled. Play nice and
4752 * disable it when requested, although it shouldn't case any overhead
4753 * when no packet needs it. At most one packet in the queue may be
4754 * marked for time stamping, otherwise it would be impossible to tell
4755 * for sure to which packet the hardware time stamp belongs.
4757 * Incoming time stamping has to be configured via the hardware
4758 * filters. Not all combinations are supported, in particular event
4759 * type has to be specified. Matching the kind of event packet is
4760 * not supported, with the exception of "all V2 events regardless of
4764 static int igb_hwtstamp_ioctl(struct net_device
*netdev
,
4765 struct ifreq
*ifr
, int cmd
)
4767 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4768 struct e1000_hw
*hw
= &adapter
->hw
;
4769 struct hwtstamp_config config
;
4770 u32 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4771 u32 tsync_rx_ctl_bit
= E1000_TSYNCRXCTL_ENABLED
;
4772 u32 tsync_rx_ctl_type
= 0;
4773 u32 tsync_rx_cfg
= 0;
4776 short port
= 319; /* PTP */
4779 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
4782 /* reserved for future extensions */
4786 switch (config
.tx_type
) {
4787 case HWTSTAMP_TX_OFF
:
4788 tsync_tx_ctl_bit
= 0;
4790 case HWTSTAMP_TX_ON
:
4791 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4797 switch (config
.rx_filter
) {
4798 case HWTSTAMP_FILTER_NONE
:
4799 tsync_rx_ctl_bit
= 0;
4801 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
4802 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
4803 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
4804 case HWTSTAMP_FILTER_ALL
:
4806 * register TSYNCRXCFG must be set, therefore it is not
4807 * possible to time stamp both Sync and Delay_Req messages
4808 * => fall back to time stamping all packets
4810 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_ALL
;
4811 config
.rx_filter
= HWTSTAMP_FILTER_ALL
;
4813 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
4814 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4815 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
4818 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
4819 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4820 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
4823 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
4824 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
4825 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4826 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
;
4829 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4831 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
4832 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
4833 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4834 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
;
4837 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4839 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
4840 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
4841 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
4842 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
4843 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
4850 /* enable/disable TX */
4851 regval
= rd32(E1000_TSYNCTXCTL
);
4852 regval
= (regval
& ~E1000_TSYNCTXCTL_ENABLED
) | tsync_tx_ctl_bit
;
4853 wr32(E1000_TSYNCTXCTL
, regval
);
4855 /* enable/disable RX, define which PTP packets are time stamped */
4856 regval
= rd32(E1000_TSYNCRXCTL
);
4857 regval
= (regval
& ~E1000_TSYNCRXCTL_ENABLED
) | tsync_rx_ctl_bit
;
4858 regval
= (regval
& ~0xE) | tsync_rx_ctl_type
;
4859 wr32(E1000_TSYNCRXCTL
, regval
);
4860 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
4863 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
4864 * (Ethertype to filter on)
4865 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
4866 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
4868 wr32(E1000_ETQF0
, is_l2
? 0x440088f7 : 0);
4870 /* L4 Queue Filter[0]: only filter by source and destination port */
4871 wr32(E1000_SPQF0
, htons(port
));
4872 wr32(E1000_IMIREXT(0), is_l4
?
4873 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
4874 wr32(E1000_IMIR(0), is_l4
?
4876 | (0<<16) /* immediate interrupt disabled */
4877 | 0 /* (1<<17) bit cleared: do not bypass
4878 destination port check */)
4880 wr32(E1000_FTQF0
, is_l4
?
4882 | (1<<15) /* VF not compared */
4883 | (1<<27) /* Enable Timestamping */
4884 | (7<<28) /* only source port filter enabled,
4885 source/target address and protocol
4887 : ((1<<15) | (15<<28) /* all mask bits set = filter not
4892 adapter
->hwtstamp_config
= config
;
4894 /* clear TX/RX time stamp registers, just to be sure */
4895 regval
= rd32(E1000_TXSTMPH
);
4896 regval
= rd32(E1000_RXSTMPH
);
4898 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
4908 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4914 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4916 return igb_hwtstamp_ioctl(netdev
, ifr
, cmd
);
4922 static void igb_vlan_rx_register(struct net_device
*netdev
,
4923 struct vlan_group
*grp
)
4925 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4926 struct e1000_hw
*hw
= &adapter
->hw
;
4929 igb_irq_disable(adapter
);
4930 adapter
->vlgrp
= grp
;
4933 /* enable VLAN tag insert/strip */
4934 ctrl
= rd32(E1000_CTRL
);
4935 ctrl
|= E1000_CTRL_VME
;
4936 wr32(E1000_CTRL
, ctrl
);
4938 /* enable VLAN receive filtering */
4939 rctl
= rd32(E1000_RCTL
);
4940 rctl
&= ~E1000_RCTL_CFIEN
;
4941 wr32(E1000_RCTL
, rctl
);
4942 igb_update_mng_vlan(adapter
);
4944 /* disable VLAN tag insert/strip */
4945 ctrl
= rd32(E1000_CTRL
);
4946 ctrl
&= ~E1000_CTRL_VME
;
4947 wr32(E1000_CTRL
, ctrl
);
4949 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4950 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4951 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4955 igb_rlpml_set(adapter
);
4957 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4958 igb_irq_enable(adapter
);
4961 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4963 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4964 struct e1000_hw
*hw
= &adapter
->hw
;
4965 int pf_id
= adapter
->vfs_allocated_count
;
4967 if ((hw
->mng_cookie
.status
&
4968 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4969 (vid
== adapter
->mng_vlan_id
))
4972 /* add vid to vlvf if sr-iov is enabled,
4973 * if that fails add directly to filter table */
4974 if (igb_vlvf_set(adapter
, vid
, true, pf_id
))
4975 igb_vfta_set(hw
, vid
, true);
4979 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4981 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4982 struct e1000_hw
*hw
= &adapter
->hw
;
4983 int pf_id
= adapter
->vfs_allocated_count
;
4985 igb_irq_disable(adapter
);
4986 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4988 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4989 igb_irq_enable(adapter
);
4991 if ((adapter
->hw
.mng_cookie
.status
&
4992 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4993 (vid
== adapter
->mng_vlan_id
)) {
4994 /* release control to f/w */
4995 igb_release_hw_control(adapter
);
4999 /* remove vid from vlvf if sr-iov is enabled,
5000 * if not in vlvf remove from vfta */
5001 if (igb_vlvf_set(adapter
, vid
, false, pf_id
))
5002 igb_vfta_set(hw
, vid
, false);
5005 static void igb_restore_vlan(struct igb_adapter
*adapter
)
5007 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
5009 if (adapter
->vlgrp
) {
5011 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
5012 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
5014 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
5019 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
5021 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
5025 /* Fiber NICs only allow 1000 gbps Full duplex */
5026 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
5027 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
5028 dev_err(&adapter
->pdev
->dev
,
5029 "Unsupported Speed/Duplex configuration\n");
5034 case SPEED_10
+ DUPLEX_HALF
:
5035 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
5037 case SPEED_10
+ DUPLEX_FULL
:
5038 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
5040 case SPEED_100
+ DUPLEX_HALF
:
5041 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
5043 case SPEED_100
+ DUPLEX_FULL
:
5044 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
5046 case SPEED_1000
+ DUPLEX_FULL
:
5048 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
5050 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
5052 dev_err(&adapter
->pdev
->dev
,
5053 "Unsupported Speed/Duplex configuration\n");
5059 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5061 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5062 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5063 struct e1000_hw
*hw
= &adapter
->hw
;
5064 u32 ctrl
, rctl
, status
;
5065 u32 wufc
= adapter
->wol
;
5070 netif_device_detach(netdev
);
5072 if (netif_running(netdev
))
5075 igb_reset_interrupt_capability(adapter
);
5077 igb_free_queues(adapter
);
5080 retval
= pci_save_state(pdev
);
5085 status
= rd32(E1000_STATUS
);
5086 if (status
& E1000_STATUS_LU
)
5087 wufc
&= ~E1000_WUFC_LNKC
;
5090 igb_setup_rctl(adapter
);
5091 igb_set_multi(netdev
);
5093 /* turn on all-multi mode if wake on multicast is enabled */
5094 if (wufc
& E1000_WUFC_MC
) {
5095 rctl
= rd32(E1000_RCTL
);
5096 rctl
|= E1000_RCTL_MPE
;
5097 wr32(E1000_RCTL
, rctl
);
5100 ctrl
= rd32(E1000_CTRL
);
5101 /* advertise wake from D3Cold */
5102 #define E1000_CTRL_ADVD3WUC 0x00100000
5103 /* phy power management enable */
5104 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5105 ctrl
|= E1000_CTRL_ADVD3WUC
;
5106 wr32(E1000_CTRL
, ctrl
);
5108 /* Allow time for pending master requests to run */
5109 igb_disable_pcie_master(&adapter
->hw
);
5111 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
5112 wr32(E1000_WUFC
, wufc
);
5115 wr32(E1000_WUFC
, 0);
5118 /* make sure adapter isn't asleep if manageability/wol is enabled */
5119 if (wufc
|| adapter
->en_mng_pt
) {
5120 pci_enable_wake(pdev
, PCI_D3hot
, 1);
5121 pci_enable_wake(pdev
, PCI_D3cold
, 1);
5123 igb_shutdown_fiber_serdes_link_82575(hw
);
5124 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5125 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5128 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5129 * would have already happened in close and is redundant. */
5130 igb_release_hw_control(adapter
);
5132 pci_disable_device(pdev
);
5134 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
5140 static int igb_resume(struct pci_dev
*pdev
)
5142 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5143 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5144 struct e1000_hw
*hw
= &adapter
->hw
;
5147 pci_set_power_state(pdev
, PCI_D0
);
5148 pci_restore_state(pdev
);
5150 err
= pci_enable_device_mem(pdev
);
5153 "igb: Cannot enable PCI device from suspend\n");
5156 pci_set_master(pdev
);
5158 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5159 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5161 igb_set_interrupt_capability(adapter
);
5163 if (igb_alloc_queues(adapter
)) {
5164 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
5168 /* e1000_power_up_phy(adapter); */
5172 /* let the f/w know that the h/w is now under the control of the
5174 igb_get_hw_control(adapter
);
5176 wr32(E1000_WUS
, ~0);
5178 if (netif_running(netdev
)) {
5179 err
= igb_open(netdev
);
5184 netif_device_attach(netdev
);
5190 static void igb_shutdown(struct pci_dev
*pdev
)
5192 igb_suspend(pdev
, PMSG_SUSPEND
);
5195 #ifdef CONFIG_NET_POLL_CONTROLLER
5197 * Polling 'interrupt' - used by things like netconsole to send skbs
5198 * without having to re-enable interrupts. It's not called while
5199 * the interrupt routine is executing.
5201 static void igb_netpoll(struct net_device
*netdev
)
5203 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5204 struct e1000_hw
*hw
= &adapter
->hw
;
5207 if (!adapter
->msix_entries
) {
5208 igb_irq_disable(adapter
);
5209 napi_schedule(&adapter
->rx_ring
[0].napi
);
5213 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5214 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
5215 wr32(E1000_EIMC
, tx_ring
->eims_value
);
5216 igb_clean_tx_irq(tx_ring
);
5217 wr32(E1000_EIMS
, tx_ring
->eims_value
);
5220 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5221 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
5222 wr32(E1000_EIMC
, rx_ring
->eims_value
);
5223 napi_schedule(&rx_ring
->napi
);
5226 #endif /* CONFIG_NET_POLL_CONTROLLER */
5229 * igb_io_error_detected - called when PCI error is detected
5230 * @pdev: Pointer to PCI device
5231 * @state: The current pci connection state
5233 * This function is called after a PCI bus error affecting
5234 * this device has been detected.
5236 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
5237 pci_channel_state_t state
)
5239 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5240 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5242 netif_device_detach(netdev
);
5244 if (netif_running(netdev
))
5246 pci_disable_device(pdev
);
5248 /* Request a slot slot reset. */
5249 return PCI_ERS_RESULT_NEED_RESET
;
5253 * igb_io_slot_reset - called after the pci bus has been reset.
5254 * @pdev: Pointer to PCI device
5256 * Restart the card from scratch, as if from a cold-boot. Implementation
5257 * resembles the first-half of the igb_resume routine.
5259 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
5261 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5262 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5263 struct e1000_hw
*hw
= &adapter
->hw
;
5264 pci_ers_result_t result
;
5267 if (pci_enable_device_mem(pdev
)) {
5269 "Cannot re-enable PCI device after reset.\n");
5270 result
= PCI_ERS_RESULT_DISCONNECT
;
5272 pci_set_master(pdev
);
5273 pci_restore_state(pdev
);
5275 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5276 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5279 wr32(E1000_WUS
, ~0);
5280 result
= PCI_ERS_RESULT_RECOVERED
;
5283 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
5285 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
5286 "failed 0x%0x\n", err
);
5287 /* non-fatal, continue */
5294 * igb_io_resume - called when traffic can start flowing again.
5295 * @pdev: Pointer to PCI device
5297 * This callback is called when the error recovery driver tells us that
5298 * its OK to resume normal operation. Implementation resembles the
5299 * second-half of the igb_resume routine.
5301 static void igb_io_resume(struct pci_dev
*pdev
)
5303 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5304 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5306 if (netif_running(netdev
)) {
5307 if (igb_up(adapter
)) {
5308 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
5313 netif_device_attach(netdev
);
5315 /* let the f/w know that the h/w is now under the control of the
5317 igb_get_hw_control(adapter
);
5320 static inline void igb_set_vmolr(struct e1000_hw
*hw
, int vfn
)
5324 reg_data
= rd32(E1000_VMOLR(vfn
));
5325 reg_data
|= E1000_VMOLR_BAM
| /* Accept broadcast */
5326 E1000_VMOLR_ROPE
| /* Accept packets matched in UTA */
5327 E1000_VMOLR_ROMPE
| /* Accept packets matched in MTA */
5328 E1000_VMOLR_AUPE
| /* Accept untagged packets */
5329 E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
5330 wr32(E1000_VMOLR(vfn
), reg_data
);
5333 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
5336 struct e1000_hw
*hw
= &adapter
->hw
;
5339 vmolr
= rd32(E1000_VMOLR(vfn
));
5340 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
5341 vmolr
|= size
| E1000_VMOLR_LPE
;
5342 wr32(E1000_VMOLR(vfn
), vmolr
);
5347 static inline void igb_set_rah_pool(struct e1000_hw
*hw
, int pool
, int entry
)
5351 reg_data
= rd32(E1000_RAH(entry
));
5352 reg_data
&= ~E1000_RAH_POOL_MASK
;
5353 reg_data
|= E1000_RAH_POOL_1
<< pool
;;
5354 wr32(E1000_RAH(entry
), reg_data
);
5357 static void igb_set_mc_list_pools(struct igb_adapter
*adapter
,
5358 int entry_count
, u16 total_rar_filters
)
5360 struct e1000_hw
*hw
= &adapter
->hw
;
5361 int i
= adapter
->vfs_allocated_count
+ 1;
5363 if ((i
+ entry_count
) < total_rar_filters
)
5364 total_rar_filters
= i
+ entry_count
;
5366 for (; i
< total_rar_filters
; i
++)
5367 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, i
);
5370 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
5371 int vf
, unsigned char *mac_addr
)
5373 struct e1000_hw
*hw
= &adapter
->hw
;
5374 int rar_entry
= vf
+ 1; /* VF MAC addresses start at entry 1 */
5376 igb_rar_set(hw
, mac_addr
, rar_entry
);
5378 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
5380 igb_set_rah_pool(hw
, vf
, rar_entry
);
5385 static void igb_vmm_control(struct igb_adapter
*adapter
)
5387 struct e1000_hw
*hw
= &adapter
->hw
;
5390 if (!adapter
->vfs_allocated_count
)
5393 /* VF's need PF reset indication before they
5394 * can send/receive mail */
5395 reg_data
= rd32(E1000_CTRL_EXT
);
5396 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
5397 wr32(E1000_CTRL_EXT
, reg_data
);
5399 igb_vmdq_set_loopback_pf(hw
, true);
5400 igb_vmdq_set_replication_pf(hw
, true);
5403 #ifdef CONFIG_PCI_IOV
5404 static ssize_t
igb_show_num_vfs(struct device
*dev
,
5405 struct device_attribute
*attr
, char *buf
)
5407 struct igb_adapter
*adapter
= netdev_priv(to_net_dev(dev
));
5409 return sprintf(buf
, "%d\n", adapter
->vfs_allocated_count
);
5412 static ssize_t
igb_set_num_vfs(struct device
*dev
,
5413 struct device_attribute
*attr
,
5414 const char *buf
, size_t count
)
5416 struct net_device
*netdev
= to_net_dev(dev
);
5417 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5418 struct e1000_hw
*hw
= &adapter
->hw
;
5419 struct pci_dev
*pdev
= adapter
->pdev
;
5420 unsigned int num_vfs
, i
;
5421 unsigned char mac_addr
[ETH_ALEN
];
5424 sscanf(buf
, "%u", &num_vfs
);
5429 /* value unchanged do nothing */
5430 if (num_vfs
== adapter
->vfs_allocated_count
)
5433 if (netdev
->flags
& IFF_UP
)
5436 igb_reset_interrupt_capability(adapter
);
5437 igb_free_queues(adapter
);
5438 adapter
->tx_ring
= NULL
;
5439 adapter
->rx_ring
= NULL
;
5440 adapter
->vfs_allocated_count
= 0;
5442 /* reclaim resources allocated to VFs since we are changing count */
5443 if (adapter
->vf_data
) {
5444 /* disable iov and allow time for transactions to clear */
5445 pci_disable_sriov(pdev
);
5448 kfree(adapter
->vf_data
);
5449 adapter
->vf_data
= NULL
;
5450 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
5452 dev_info(&pdev
->dev
, "IOV Disabled\n");
5456 adapter
->vf_data
= kcalloc(num_vfs
,
5457 sizeof(struct vf_data_storage
),
5459 if (!adapter
->vf_data
) {
5460 dev_err(&pdev
->dev
, "Could not allocate VF private "
5461 "data - IOV enable failed\n");
5463 err
= pci_enable_sriov(pdev
, num_vfs
);
5465 adapter
->vfs_allocated_count
= num_vfs
;
5466 dev_info(&pdev
->dev
, "%d vfs allocated\n", num_vfs
);
5467 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5468 random_ether_addr(mac_addr
);
5469 igb_set_vf_mac(adapter
, i
, mac_addr
);
5472 kfree(adapter
->vf_data
);
5473 adapter
->vf_data
= NULL
;
5478 igb_set_interrupt_capability(adapter
);
5479 igb_alloc_queues(adapter
);
5482 if (netdev
->flags
& IFF_UP
)
5487 #endif /* CONFIG_PCI_IOV */