1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
45 #include <linux/aer.h>
47 #include <linux/dca.h>
51 #define DRV_VERSION "1.2.45-k2"
52 char igb_driver_name
[] = "igb";
53 char igb_driver_version
[] = DRV_VERSION
;
54 static const char igb_driver_string
[] =
55 "Intel(R) Gigabit Ethernet Network Driver";
56 static const char igb_copyright
[] = "Copyright (c) 2008 Intel Corporation.";
58 static const struct e1000_info
*igb_info_tbl
[] = {
59 [board_82575
] = &e1000_82575_info
,
62 static struct pci_device_id igb_pci_tbl
[] = {
63 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
69 /* required last entry */
73 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
75 void igb_reset(struct igb_adapter
*);
76 static int igb_setup_all_tx_resources(struct igb_adapter
*);
77 static int igb_setup_all_rx_resources(struct igb_adapter
*);
78 static void igb_free_all_tx_resources(struct igb_adapter
*);
79 static void igb_free_all_rx_resources(struct igb_adapter
*);
80 void igb_update_stats(struct igb_adapter
*);
81 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
82 static void __devexit
igb_remove(struct pci_dev
*pdev
);
83 static int igb_sw_init(struct igb_adapter
*);
84 static int igb_open(struct net_device
*);
85 static int igb_close(struct net_device
*);
86 static void igb_configure_tx(struct igb_adapter
*);
87 static void igb_configure_rx(struct igb_adapter
*);
88 static void igb_setup_rctl(struct igb_adapter
*);
89 static void igb_clean_all_tx_rings(struct igb_adapter
*);
90 static void igb_clean_all_rx_rings(struct igb_adapter
*);
91 static void igb_clean_tx_ring(struct igb_ring
*);
92 static void igb_clean_rx_ring(struct igb_ring
*);
93 static void igb_set_multi(struct net_device
*);
94 static void igb_update_phy_info(unsigned long);
95 static void igb_watchdog(unsigned long);
96 static void igb_watchdog_task(struct work_struct
*);
97 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
99 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
100 static struct net_device_stats
*igb_get_stats(struct net_device
*);
101 static int igb_change_mtu(struct net_device
*, int);
102 static int igb_set_mac(struct net_device
*, void *);
103 static irqreturn_t
igb_intr(int irq
, void *);
104 static irqreturn_t
igb_intr_msi(int irq
, void *);
105 static irqreturn_t
igb_msix_other(int irq
, void *);
106 static irqreturn_t
igb_msix_rx(int irq
, void *);
107 static irqreturn_t
igb_msix_tx(int irq
, void *);
108 static int igb_clean_rx_ring_msix(struct napi_struct
*, int);
109 #ifdef CONFIG_IGB_DCA
110 static void igb_update_rx_dca(struct igb_ring
*);
111 static void igb_update_tx_dca(struct igb_ring
*);
112 static void igb_setup_dca(struct igb_adapter
*);
113 #endif /* CONFIG_IGB_DCA */
114 static bool igb_clean_tx_irq(struct igb_ring
*);
115 static int igb_poll(struct napi_struct
*, int);
116 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
117 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
118 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
119 static void igb_tx_timeout(struct net_device
*);
120 static void igb_reset_task(struct work_struct
*);
121 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
122 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
123 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
124 static void igb_restore_vlan(struct igb_adapter
*);
126 static int igb_suspend(struct pci_dev
*, pm_message_t
);
128 static int igb_resume(struct pci_dev
*);
130 static void igb_shutdown(struct pci_dev
*);
131 #ifdef CONFIG_IGB_DCA
132 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
133 static struct notifier_block dca_notifier
= {
134 .notifier_call
= igb_notify_dca
,
140 #ifdef CONFIG_NET_POLL_CONTROLLER
141 /* for netdump / net console */
142 static void igb_netpoll(struct net_device
*);
145 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
146 pci_channel_state_t
);
147 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
148 static void igb_io_resume(struct pci_dev
*);
150 static struct pci_error_handlers igb_err_handler
= {
151 .error_detected
= igb_io_error_detected
,
152 .slot_reset
= igb_io_slot_reset
,
153 .resume
= igb_io_resume
,
157 static struct pci_driver igb_driver
= {
158 .name
= igb_driver_name
,
159 .id_table
= igb_pci_tbl
,
161 .remove
= __devexit_p(igb_remove
),
163 /* Power Managment Hooks */
164 .suspend
= igb_suspend
,
165 .resume
= igb_resume
,
167 .shutdown
= igb_shutdown
,
168 .err_handler
= &igb_err_handler
171 static int global_quad_port_a
; /* global quad port a indication */
173 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
174 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION
);
180 * igb_get_hw_dev_name - return device name string
181 * used by hardware layer to print debugging information
183 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
185 struct igb_adapter
*adapter
= hw
->back
;
186 return adapter
->netdev
->name
;
191 * igb_init_module - Driver Registration Routine
193 * igb_init_module is the first routine called when the driver is
194 * loaded. All it does is register with the PCI subsystem.
196 static int __init
igb_init_module(void)
199 printk(KERN_INFO
"%s - version %s\n",
200 igb_driver_string
, igb_driver_version
);
202 printk(KERN_INFO
"%s\n", igb_copyright
);
204 global_quad_port_a
= 0;
206 ret
= pci_register_driver(&igb_driver
);
207 #ifdef CONFIG_IGB_DCA
208 dca_register_notify(&dca_notifier
);
213 module_init(igb_init_module
);
216 * igb_exit_module - Driver Exit Cleanup Routine
218 * igb_exit_module is called just before the driver is removed
221 static void __exit
igb_exit_module(void)
223 #ifdef CONFIG_IGB_DCA
224 dca_unregister_notify(&dca_notifier
);
226 pci_unregister_driver(&igb_driver
);
229 module_exit(igb_exit_module
);
231 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
233 * igb_cache_ring_register - Descriptor ring to register mapping
234 * @adapter: board private structure to initialize
236 * Once we know the feature-set enabled for the device, we'll cache
237 * the register offset the descriptor ring is assigned to.
239 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
243 switch (adapter
->hw
.mac
.type
) {
245 /* The queues are allocated for virtualization such that VF 0
246 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
247 * In order to avoid collision we start at the first free queue
248 * and continue consuming queues in the same sequence
250 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
251 adapter
->rx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
252 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
253 adapter
->tx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
257 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
258 adapter
->rx_ring
[i
].reg_idx
= i
;
259 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
260 adapter
->tx_ring
[i
].reg_idx
= i
;
266 * igb_alloc_queues - Allocate memory for all rings
267 * @adapter: board private structure to initialize
269 * We allocate one ring per queue at run-time since we don't know the
270 * number of queues at compile-time.
272 static int igb_alloc_queues(struct igb_adapter
*adapter
)
276 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
277 sizeof(struct igb_ring
), GFP_KERNEL
);
278 if (!adapter
->tx_ring
)
281 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
282 sizeof(struct igb_ring
), GFP_KERNEL
);
283 if (!adapter
->rx_ring
) {
284 kfree(adapter
->tx_ring
);
288 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
290 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
291 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
292 ring
->count
= adapter
->tx_ring_count
;
293 ring
->adapter
= adapter
;
294 ring
->queue_index
= i
;
296 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
297 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
298 ring
->count
= adapter
->rx_ring_count
;
299 ring
->adapter
= adapter
;
300 ring
->queue_index
= i
;
301 ring
->itr_register
= E1000_ITR
;
303 /* set a default napi handler for each rx_ring */
304 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
307 igb_cache_ring_register(adapter
);
311 static void igb_free_queues(struct igb_adapter
*adapter
)
315 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
316 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
318 kfree(adapter
->tx_ring
);
319 kfree(adapter
->rx_ring
);
322 #define IGB_N0_QUEUE -1
323 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
324 int tx_queue
, int msix_vector
)
327 struct e1000_hw
*hw
= &adapter
->hw
;
330 switch (hw
->mac
.type
) {
332 /* The 82575 assigns vectors using a bitmask, which matches the
333 bitmask for the EICR/EIMS/EIMC registers. To assign one
334 or more queues to a vector, we write the appropriate bits
335 into the MSIXBM register for that vector. */
336 if (rx_queue
> IGB_N0_QUEUE
) {
337 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
338 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
340 if (tx_queue
> IGB_N0_QUEUE
) {
341 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
342 adapter
->tx_ring
[tx_queue
].eims_value
=
343 E1000_EICR_TX_QUEUE0
<< tx_queue
;
345 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
348 /* 82576 uses a table-based method for assigning vectors.
349 Each queue has a single entry in the table to which we write
350 a vector number along with a "valid" bit. Sadly, the layout
351 of the table is somewhat counterintuitive. */
352 if (rx_queue
> IGB_N0_QUEUE
) {
353 index
= (rx_queue
>> 1);
354 ivar
= array_rd32(E1000_IVAR0
, index
);
355 if (rx_queue
& 0x1) {
356 /* vector goes into third byte of register */
357 ivar
= ivar
& 0xFF00FFFF;
358 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
360 /* vector goes into low byte of register */
361 ivar
= ivar
& 0xFFFFFF00;
362 ivar
|= msix_vector
| E1000_IVAR_VALID
;
364 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
365 array_wr32(E1000_IVAR0
, index
, ivar
);
367 if (tx_queue
> IGB_N0_QUEUE
) {
368 index
= (tx_queue
>> 1);
369 ivar
= array_rd32(E1000_IVAR0
, index
);
370 if (tx_queue
& 0x1) {
371 /* vector goes into high byte of register */
372 ivar
= ivar
& 0x00FFFFFF;
373 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
375 /* vector goes into second byte of register */
376 ivar
= ivar
& 0xFFFF00FF;
377 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
379 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
380 array_wr32(E1000_IVAR0
, index
, ivar
);
390 * igb_configure_msix - Configure MSI-X hardware
392 * igb_configure_msix sets up the hardware to properly
393 * generate MSI-X interrupts.
395 static void igb_configure_msix(struct igb_adapter
*adapter
)
399 struct e1000_hw
*hw
= &adapter
->hw
;
401 adapter
->eims_enable_mask
= 0;
402 if (hw
->mac
.type
== e1000_82576
)
403 /* Turn on MSI-X capability first, or our settings
404 * won't stick. And it will take days to debug. */
405 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
406 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
409 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
410 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
411 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
412 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
413 if (tx_ring
->itr_val
)
414 writel(tx_ring
->itr_val
,
415 hw
->hw_addr
+ tx_ring
->itr_register
);
417 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
420 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
421 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
422 rx_ring
->buddy
= NULL
;
423 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
424 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
425 if (rx_ring
->itr_val
)
426 writel(rx_ring
->itr_val
,
427 hw
->hw_addr
+ rx_ring
->itr_register
);
429 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
433 /* set vector for other causes, i.e. link changes */
434 switch (hw
->mac
.type
) {
436 array_wr32(E1000_MSIXBM(0), vector
++,
439 tmp
= rd32(E1000_CTRL_EXT
);
440 /* enable MSI-X PBA support*/
441 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
443 /* Auto-Mask interrupts upon ICR read. */
444 tmp
|= E1000_CTRL_EXT_EIAME
;
445 tmp
|= E1000_CTRL_EXT_IRCA
;
447 wr32(E1000_CTRL_EXT
, tmp
);
448 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
449 adapter
->eims_other
= E1000_EIMS_OTHER
;
454 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
455 wr32(E1000_IVAR_MISC
, tmp
);
457 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
458 adapter
->eims_other
= 1 << (vector
- 1);
461 /* do nothing, since nothing else supports MSI-X */
463 } /* switch (hw->mac.type) */
468 * igb_request_msix - Initialize MSI-X interrupts
470 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
473 static int igb_request_msix(struct igb_adapter
*adapter
)
475 struct net_device
*netdev
= adapter
->netdev
;
476 int i
, err
= 0, vector
= 0;
480 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
481 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
482 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
483 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
484 &igb_msix_tx
, 0, ring
->name
,
485 &(adapter
->tx_ring
[i
]));
488 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
489 ring
->itr_val
= 976; /* ~4000 ints/sec */
492 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
493 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
494 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
495 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
497 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
498 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
499 &igb_msix_rx
, 0, ring
->name
,
500 &(adapter
->rx_ring
[i
]));
503 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
504 ring
->itr_val
= adapter
->itr
;
505 /* overwrite the poll routine for MSIX, we've already done
507 ring
->napi
.poll
= &igb_clean_rx_ring_msix
;
511 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
512 &igb_msix_other
, 0, netdev
->name
, netdev
);
516 igb_configure_msix(adapter
);
522 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
524 if (adapter
->msix_entries
) {
525 pci_disable_msix(adapter
->pdev
);
526 kfree(adapter
->msix_entries
);
527 adapter
->msix_entries
= NULL
;
528 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
529 pci_disable_msi(adapter
->pdev
);
535 * igb_set_interrupt_capability - set MSI or MSI-X if supported
537 * Attempt to configure interrupts using the best available
538 * capabilities of the hardware and kernel.
540 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
545 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
546 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
548 if (!adapter
->msix_entries
)
551 for (i
= 0; i
< numvecs
; i
++)
552 adapter
->msix_entries
[i
].entry
= i
;
554 err
= pci_enable_msix(adapter
->pdev
,
555 adapter
->msix_entries
,
560 igb_reset_interrupt_capability(adapter
);
562 /* If we can't do MSI-X, try MSI */
564 adapter
->num_rx_queues
= 1;
565 adapter
->num_tx_queues
= 1;
566 if (!pci_enable_msi(adapter
->pdev
))
567 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
569 /* Notify the stack of the (possibly) reduced Tx Queue count. */
570 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
575 * igb_request_irq - initialize interrupts
577 * Attempts to configure interrupts using the best available
578 * capabilities of the hardware and kernel.
580 static int igb_request_irq(struct igb_adapter
*adapter
)
582 struct net_device
*netdev
= adapter
->netdev
;
583 struct e1000_hw
*hw
= &adapter
->hw
;
586 if (adapter
->msix_entries
) {
587 err
= igb_request_msix(adapter
);
590 /* fall back to MSI */
591 igb_reset_interrupt_capability(adapter
);
592 if (!pci_enable_msi(adapter
->pdev
))
593 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
594 igb_free_all_tx_resources(adapter
);
595 igb_free_all_rx_resources(adapter
);
596 adapter
->num_rx_queues
= 1;
597 igb_alloc_queues(adapter
);
599 switch (hw
->mac
.type
) {
601 wr32(E1000_MSIXBM(0),
602 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
605 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
612 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
613 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
614 netdev
->name
, netdev
);
617 /* fall back to legacy interrupts */
618 igb_reset_interrupt_capability(adapter
);
619 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
622 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
623 netdev
->name
, netdev
);
626 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
633 static void igb_free_irq(struct igb_adapter
*adapter
)
635 struct net_device
*netdev
= adapter
->netdev
;
637 if (adapter
->msix_entries
) {
640 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
641 free_irq(adapter
->msix_entries
[vector
++].vector
,
642 &(adapter
->tx_ring
[i
]));
643 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
644 free_irq(adapter
->msix_entries
[vector
++].vector
,
645 &(adapter
->rx_ring
[i
]));
647 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
651 free_irq(adapter
->pdev
->irq
, netdev
);
655 * igb_irq_disable - Mask off interrupt generation on the NIC
656 * @adapter: board private structure
658 static void igb_irq_disable(struct igb_adapter
*adapter
)
660 struct e1000_hw
*hw
= &adapter
->hw
;
662 if (adapter
->msix_entries
) {
664 wr32(E1000_EIMC
, ~0);
671 synchronize_irq(adapter
->pdev
->irq
);
675 * igb_irq_enable - Enable default interrupt generation settings
676 * @adapter: board private structure
678 static void igb_irq_enable(struct igb_adapter
*adapter
)
680 struct e1000_hw
*hw
= &adapter
->hw
;
682 if (adapter
->msix_entries
) {
683 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
684 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
685 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
686 wr32(E1000_IMS
, E1000_IMS_LSC
);
688 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
689 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
693 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
695 struct net_device
*netdev
= adapter
->netdev
;
696 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
697 u16 old_vid
= adapter
->mng_vlan_id
;
698 if (adapter
->vlgrp
) {
699 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
700 if (adapter
->hw
.mng_cookie
.status
&
701 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
702 igb_vlan_rx_add_vid(netdev
, vid
);
703 adapter
->mng_vlan_id
= vid
;
705 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
707 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
709 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
710 igb_vlan_rx_kill_vid(netdev
, old_vid
);
712 adapter
->mng_vlan_id
= vid
;
717 * igb_release_hw_control - release control of the h/w to f/w
718 * @adapter: address of board private structure
720 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
721 * For ASF and Pass Through versions of f/w this means that the
722 * driver is no longer loaded.
725 static void igb_release_hw_control(struct igb_adapter
*adapter
)
727 struct e1000_hw
*hw
= &adapter
->hw
;
730 /* Let firmware take over control of h/w */
731 ctrl_ext
= rd32(E1000_CTRL_EXT
);
733 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
738 * igb_get_hw_control - get control of the h/w from f/w
739 * @adapter: address of board private structure
741 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
742 * For ASF and Pass Through versions of f/w this means that
743 * the driver is loaded.
746 static void igb_get_hw_control(struct igb_adapter
*adapter
)
748 struct e1000_hw
*hw
= &adapter
->hw
;
751 /* Let firmware know the driver has taken over */
752 ctrl_ext
= rd32(E1000_CTRL_EXT
);
754 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
758 * igb_configure - configure the hardware for RX and TX
759 * @adapter: private board structure
761 static void igb_configure(struct igb_adapter
*adapter
)
763 struct net_device
*netdev
= adapter
->netdev
;
766 igb_get_hw_control(adapter
);
767 igb_set_multi(netdev
);
769 igb_restore_vlan(adapter
);
771 igb_configure_tx(adapter
);
772 igb_setup_rctl(adapter
);
773 igb_configure_rx(adapter
);
775 igb_rx_fifo_flush_82575(&adapter
->hw
);
777 /* call IGB_DESC_UNUSED which always leaves
778 * at least 1 descriptor unused to make sure
779 * next_to_use != next_to_clean */
780 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
781 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
782 igb_alloc_rx_buffers_adv(ring
, IGB_DESC_UNUSED(ring
));
786 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
791 * igb_up - Open the interface and prepare it to handle traffic
792 * @adapter: board private structure
795 int igb_up(struct igb_adapter
*adapter
)
797 struct e1000_hw
*hw
= &adapter
->hw
;
800 /* hardware has been reset, we need to reload some things */
801 igb_configure(adapter
);
803 clear_bit(__IGB_DOWN
, &adapter
->state
);
805 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
806 napi_enable(&adapter
->rx_ring
[i
].napi
);
807 if (adapter
->msix_entries
)
808 igb_configure_msix(adapter
);
810 /* Clear any pending interrupts. */
812 igb_irq_enable(adapter
);
814 /* Fire a link change interrupt to start the watchdog. */
815 wr32(E1000_ICS
, E1000_ICS_LSC
);
819 void igb_down(struct igb_adapter
*adapter
)
821 struct e1000_hw
*hw
= &adapter
->hw
;
822 struct net_device
*netdev
= adapter
->netdev
;
826 /* signal that we're down so the interrupt handler does not
827 * reschedule our watchdog timer */
828 set_bit(__IGB_DOWN
, &adapter
->state
);
830 /* disable receives in the hardware */
831 rctl
= rd32(E1000_RCTL
);
832 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
833 /* flush and sleep below */
835 netif_tx_stop_all_queues(netdev
);
837 /* disable transmits in the hardware */
838 tctl
= rd32(E1000_TCTL
);
839 tctl
&= ~E1000_TCTL_EN
;
840 wr32(E1000_TCTL
, tctl
);
841 /* flush both disables and wait for them to finish */
845 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
846 napi_disable(&adapter
->rx_ring
[i
].napi
);
848 igb_irq_disable(adapter
);
850 del_timer_sync(&adapter
->watchdog_timer
);
851 del_timer_sync(&adapter
->phy_info_timer
);
853 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
854 netif_carrier_off(netdev
);
855 adapter
->link_speed
= 0;
856 adapter
->link_duplex
= 0;
858 if (!pci_channel_offline(adapter
->pdev
))
860 igb_clean_all_tx_rings(adapter
);
861 igb_clean_all_rx_rings(adapter
);
864 void igb_reinit_locked(struct igb_adapter
*adapter
)
866 WARN_ON(in_interrupt());
867 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
871 clear_bit(__IGB_RESETTING
, &adapter
->state
);
874 void igb_reset(struct igb_adapter
*adapter
)
876 struct e1000_hw
*hw
= &adapter
->hw
;
877 struct e1000_mac_info
*mac
= &hw
->mac
;
878 struct e1000_fc_info
*fc
= &hw
->fc
;
879 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
882 /* Repartition Pba for greater than 9k mtu
883 * To take effect CTRL.RST is required.
885 if (mac
->type
!= e1000_82576
) {
892 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
893 (mac
->type
< e1000_82576
)) {
894 /* adjust PBA for jumbo frames */
895 wr32(E1000_PBA
, pba
);
897 /* To maintain wire speed transmits, the Tx FIFO should be
898 * large enough to accommodate two full transmit packets,
899 * rounded up to the next 1KB and expressed in KB. Likewise,
900 * the Rx FIFO should be large enough to accommodate at least
901 * one full receive packet and is similarly rounded up and
902 * expressed in KB. */
903 pba
= rd32(E1000_PBA
);
904 /* upper 16 bits has Tx packet buffer allocation size in KB */
905 tx_space
= pba
>> 16;
906 /* lower 16 bits has Rx packet buffer allocation size in KB */
908 /* the tx fifo also stores 16 bytes of information about the tx
909 * but don't include ethernet FCS because hardware appends it */
910 min_tx_space
= (adapter
->max_frame_size
+
911 sizeof(struct e1000_tx_desc
) -
913 min_tx_space
= ALIGN(min_tx_space
, 1024);
915 /* software strips receive CRC, so leave room for it */
916 min_rx_space
= adapter
->max_frame_size
;
917 min_rx_space
= ALIGN(min_rx_space
, 1024);
920 /* If current Tx allocation is less than the min Tx FIFO size,
921 * and the min Tx FIFO size is less than the current Rx FIFO
922 * allocation, take space away from current Rx allocation */
923 if (tx_space
< min_tx_space
&&
924 ((min_tx_space
- tx_space
) < pba
)) {
925 pba
= pba
- (min_tx_space
- tx_space
);
927 /* if short on rx space, rx wins and must trump tx
929 if (pba
< min_rx_space
)
932 wr32(E1000_PBA
, pba
);
935 /* flow control settings */
936 /* The high water mark must be low enough to fit one full frame
937 * (or the size used for early receive) above it in the Rx FIFO.
938 * Set it to the lower of:
939 * - 90% of the Rx FIFO size, or
940 * - the full Rx FIFO size minus one full frame */
941 hwm
= min(((pba
<< 10) * 9 / 10),
942 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
944 if (mac
->type
< e1000_82576
) {
945 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
946 fc
->low_water
= fc
->high_water
- 8;
948 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
949 fc
->low_water
= fc
->high_water
- 16;
951 fc
->pause_time
= 0xFFFF;
953 fc
->type
= fc
->original_type
;
955 /* Allow time for pending master requests to run */
956 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
959 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
960 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
962 igb_update_mng_vlan(adapter
);
964 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
965 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
967 igb_reset_adaptive(&adapter
->hw
);
968 igb_get_phy_info(&adapter
->hw
);
972 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
973 * @pdev: PCI device information struct
975 * Returns true if an adapter needs ioport resources
977 static int igb_is_need_ioport(struct pci_dev
*pdev
)
979 switch (pdev
->device
) {
980 /* Currently there are no adapters that need ioport resources */
986 static const struct net_device_ops igb_netdev_ops
= {
987 .ndo_open
= igb_open
,
988 .ndo_stop
= igb_close
,
989 .ndo_start_xmit
= igb_xmit_frame_adv
,
990 .ndo_get_stats
= igb_get_stats
,
991 .ndo_set_multicast_list
= igb_set_multi
,
992 .ndo_set_mac_address
= igb_set_mac
,
993 .ndo_change_mtu
= igb_change_mtu
,
994 .ndo_do_ioctl
= igb_ioctl
,
995 .ndo_tx_timeout
= igb_tx_timeout
,
996 .ndo_validate_addr
= eth_validate_addr
,
997 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
998 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
999 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1000 #ifdef CONFIG_NET_POLL_CONTROLLER
1001 .ndo_poll_controller
= igb_netpoll
,
1006 * igb_probe - Device Initialization Routine
1007 * @pdev: PCI device information struct
1008 * @ent: entry in igb_pci_tbl
1010 * Returns 0 on success, negative on failure
1012 * igb_probe initializes an adapter identified by a pci_dev structure.
1013 * The OS initialization, configuring of the adapter private structure,
1014 * and a hardware reset occur.
1016 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1017 const struct pci_device_id
*ent
)
1019 struct net_device
*netdev
;
1020 struct igb_adapter
*adapter
;
1021 struct e1000_hw
*hw
;
1022 struct pci_dev
*us_dev
;
1023 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1024 unsigned long mmio_start
, mmio_len
;
1025 int i
, err
, pci_using_dac
, pos
;
1026 u16 eeprom_data
= 0, state
= 0;
1027 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1029 int bars
, need_ioport
;
1031 /* do not allocate ioport bars when not needed */
1032 need_ioport
= igb_is_need_ioport(pdev
);
1034 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
1035 err
= pci_enable_device(pdev
);
1037 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
1038 err
= pci_enable_device_mem(pdev
);
1044 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1046 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1050 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1052 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1054 dev_err(&pdev
->dev
, "No usable DMA "
1055 "configuration, aborting\n");
1061 /* 82575 requires that the pci-e link partner disable the L0s state */
1062 switch (pdev
->device
) {
1063 case E1000_DEV_ID_82575EB_COPPER
:
1064 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1065 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1066 us_dev
= pdev
->bus
->self
;
1067 pos
= pci_find_capability(us_dev
, PCI_CAP_ID_EXP
);
1069 pci_read_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1071 state
&= ~PCIE_LINK_STATE_L0S
;
1072 pci_write_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1074 dev_info(&pdev
->dev
,
1075 "Disabling ASPM L0s upstream switch port %s\n",
1082 err
= pci_request_selected_regions(pdev
, bars
, igb_driver_name
);
1086 err
= pci_enable_pcie_error_reporting(pdev
);
1088 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1090 /* non-fatal, continue */
1093 pci_set_master(pdev
);
1094 pci_save_state(pdev
);
1097 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
), IGB_MAX_TX_QUEUES
);
1099 goto err_alloc_etherdev
;
1101 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1103 pci_set_drvdata(pdev
, netdev
);
1104 adapter
= netdev_priv(netdev
);
1105 adapter
->netdev
= netdev
;
1106 adapter
->pdev
= pdev
;
1109 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1110 adapter
->bars
= bars
;
1111 adapter
->need_ioport
= need_ioport
;
1113 mmio_start
= pci_resource_start(pdev
, 0);
1114 mmio_len
= pci_resource_len(pdev
, 0);
1117 adapter
->hw
.hw_addr
= ioremap(mmio_start
, mmio_len
);
1118 if (!adapter
->hw
.hw_addr
)
1121 netdev
->netdev_ops
= &igb_netdev_ops
;
1122 igb_set_ethtool_ops(netdev
);
1123 netdev
->watchdog_timeo
= 5 * HZ
;
1125 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1127 netdev
->mem_start
= mmio_start
;
1128 netdev
->mem_end
= mmio_start
+ mmio_len
;
1130 /* PCI config space info */
1131 hw
->vendor_id
= pdev
->vendor
;
1132 hw
->device_id
= pdev
->device
;
1133 hw
->revision_id
= pdev
->revision
;
1134 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1135 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1137 /* setup the private structure */
1139 /* Copy the default MAC, PHY and NVM function pointers */
1140 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1141 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1142 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1143 /* Initialize skew-specific constants */
1144 err
= ei
->get_invariants(hw
);
1148 err
= igb_sw_init(adapter
);
1152 igb_get_bus_info_pcie(hw
);
1155 switch (hw
->mac
.type
) {
1158 adapter
->flags
|= IGB_FLAG_HAS_DCA
;
1159 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1165 hw
->phy
.autoneg_wait_to_complete
= false;
1166 hw
->mac
.adaptive_ifs
= true;
1168 /* Copper options */
1169 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1170 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1171 hw
->phy
.disable_polarity_correction
= false;
1172 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1175 if (igb_check_reset_block(hw
))
1176 dev_info(&pdev
->dev
,
1177 "PHY reset is blocked due to SOL/IDER session.\n");
1179 netdev
->features
= NETIF_F_SG
|
1181 NETIF_F_HW_VLAN_TX
|
1182 NETIF_F_HW_VLAN_RX
|
1183 NETIF_F_HW_VLAN_FILTER
;
1185 netdev
->features
|= NETIF_F_TSO
;
1186 netdev
->features
|= NETIF_F_TSO6
;
1188 #ifdef CONFIG_IGB_LRO
1189 netdev
->features
|= NETIF_F_GRO
;
1192 netdev
->vlan_features
|= NETIF_F_TSO
;
1193 netdev
->vlan_features
|= NETIF_F_TSO6
;
1194 netdev
->vlan_features
|= NETIF_F_HW_CSUM
;
1195 netdev
->vlan_features
|= NETIF_F_SG
;
1198 netdev
->features
|= NETIF_F_HIGHDMA
;
1200 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1202 /* before reading the NVM, reset the controller to put the device in a
1203 * known good starting state */
1204 hw
->mac
.ops
.reset_hw(hw
);
1206 /* make sure the NVM is good */
1207 if (igb_validate_nvm_checksum(hw
) < 0) {
1208 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1213 /* copy the MAC address out of the NVM */
1214 if (hw
->mac
.ops
.read_mac_addr(hw
))
1215 dev_err(&pdev
->dev
, "NVM Read Error\n");
1217 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1218 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1220 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1221 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1226 init_timer(&adapter
->watchdog_timer
);
1227 adapter
->watchdog_timer
.function
= &igb_watchdog
;
1228 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1230 init_timer(&adapter
->phy_info_timer
);
1231 adapter
->phy_info_timer
.function
= &igb_update_phy_info
;
1232 adapter
->phy_info_timer
.data
= (unsigned long) adapter
;
1234 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1235 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1237 /* Initialize link & ring properties that are user-changeable */
1238 adapter
->tx_ring
->count
= 256;
1239 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
1240 adapter
->tx_ring
[i
].count
= adapter
->tx_ring
->count
;
1241 adapter
->rx_ring
->count
= 256;
1242 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1243 adapter
->rx_ring
[i
].count
= adapter
->rx_ring
->count
;
1245 adapter
->fc_autoneg
= true;
1246 hw
->mac
.autoneg
= true;
1247 hw
->phy
.autoneg_advertised
= 0x2f;
1249 hw
->fc
.original_type
= e1000_fc_default
;
1250 hw
->fc
.type
= e1000_fc_default
;
1252 adapter
->itr_setting
= 3;
1253 adapter
->itr
= IGB_START_ITR
;
1255 igb_validate_mdi_setting(hw
);
1257 adapter
->rx_csum
= 1;
1259 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1260 * enable the ACPI Magic Packet filter
1263 if (hw
->bus
.func
== 0 ||
1264 hw
->device_id
== E1000_DEV_ID_82575EB_COPPER
)
1265 hw
->nvm
.ops
.read_nvm(hw
, NVM_INIT_CONTROL3_PORT_A
, 1,
1268 if (eeprom_data
& eeprom_apme_mask
)
1269 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1271 /* now that we have the eeprom settings, apply the special cases where
1272 * the eeprom may be wrong or the board simply won't support wake on
1273 * lan on a particular port */
1274 switch (pdev
->device
) {
1275 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1276 adapter
->eeprom_wol
= 0;
1278 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1279 case E1000_DEV_ID_82576_FIBER
:
1280 case E1000_DEV_ID_82576_SERDES
:
1281 /* Wake events only supported on port A for dual fiber
1282 * regardless of eeprom setting */
1283 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1284 adapter
->eeprom_wol
= 0;
1288 /* initialize the wol settings based on the eeprom settings */
1289 adapter
->wol
= adapter
->eeprom_wol
;
1290 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1292 /* reset the hardware with the new settings */
1295 /* let the f/w know that the h/w is now under the control of the
1297 igb_get_hw_control(adapter
);
1299 /* tell the stack to leave us alone until igb_open() is called */
1300 netif_carrier_off(netdev
);
1301 netif_tx_stop_all_queues(netdev
);
1303 strcpy(netdev
->name
, "eth%d");
1304 err
= register_netdev(netdev
);
1308 #ifdef CONFIG_IGB_DCA
1309 if ((adapter
->flags
& IGB_FLAG_HAS_DCA
) &&
1310 (dca_add_requester(&pdev
->dev
) == 0)) {
1311 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1312 dev_info(&pdev
->dev
, "DCA enabled\n");
1313 /* Always use CB2 mode, difference is masked
1314 * in the CB driver. */
1315 wr32(E1000_DCA_CTRL
, 2);
1316 igb_setup_dca(adapter
);
1320 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1321 /* print bus type/speed/width info */
1322 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1324 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1325 ? "2.5Gb/s" : "unknown"),
1326 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1327 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1328 ? "Width x1" : "unknown"),
1331 igb_read_part_num(hw
, &part_num
);
1332 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1333 (part_num
>> 8), (part_num
& 0xff));
1335 dev_info(&pdev
->dev
,
1336 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1337 adapter
->msix_entries
? "MSI-X" :
1338 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1339 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1344 igb_release_hw_control(adapter
);
1346 if (!igb_check_reset_block(hw
))
1349 if (hw
->flash_address
)
1350 iounmap(hw
->flash_address
);
1352 igb_remove_device(hw
);
1353 igb_free_queues(adapter
);
1356 iounmap(hw
->hw_addr
);
1358 free_netdev(netdev
);
1360 pci_release_selected_regions(pdev
, bars
);
1363 pci_disable_device(pdev
);
1368 * igb_remove - Device Removal Routine
1369 * @pdev: PCI device information struct
1371 * igb_remove is called by the PCI subsystem to alert the driver
1372 * that it should release a PCI device. The could be caused by a
1373 * Hot-Plug event, or because the driver is going to be removed from
1376 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1378 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1379 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1380 #ifdef CONFIG_IGB_DCA
1381 struct e1000_hw
*hw
= &adapter
->hw
;
1385 /* flush_scheduled work may reschedule our watchdog task, so
1386 * explicitly disable watchdog tasks from being rescheduled */
1387 set_bit(__IGB_DOWN
, &adapter
->state
);
1388 del_timer_sync(&adapter
->watchdog_timer
);
1389 del_timer_sync(&adapter
->phy_info_timer
);
1391 flush_scheduled_work();
1393 #ifdef CONFIG_IGB_DCA
1394 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1395 dev_info(&pdev
->dev
, "DCA disabled\n");
1396 dca_remove_requester(&pdev
->dev
);
1397 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1398 wr32(E1000_DCA_CTRL
, 1);
1402 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1403 * would have already happened in close and is redundant. */
1404 igb_release_hw_control(adapter
);
1406 unregister_netdev(netdev
);
1408 if (!igb_check_reset_block(&adapter
->hw
))
1409 igb_reset_phy(&adapter
->hw
);
1411 igb_remove_device(&adapter
->hw
);
1412 igb_reset_interrupt_capability(adapter
);
1414 igb_free_queues(adapter
);
1416 iounmap(adapter
->hw
.hw_addr
);
1417 if (adapter
->hw
.flash_address
)
1418 iounmap(adapter
->hw
.flash_address
);
1419 pci_release_selected_regions(pdev
, adapter
->bars
);
1421 free_netdev(netdev
);
1423 err
= pci_disable_pcie_error_reporting(pdev
);
1426 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1428 pci_disable_device(pdev
);
1432 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1433 * @adapter: board private structure to initialize
1435 * igb_sw_init initializes the Adapter private data structure.
1436 * Fields are initialized based on PCI device information and
1437 * OS network device settings (MTU size).
1439 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1441 struct e1000_hw
*hw
= &adapter
->hw
;
1442 struct net_device
*netdev
= adapter
->netdev
;
1443 struct pci_dev
*pdev
= adapter
->pdev
;
1445 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1447 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1448 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1449 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1450 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1451 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1452 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1454 /* Number of supported queues. */
1455 /* Having more queues than CPUs doesn't make sense. */
1456 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
1457 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
1459 /* This call may decrease the number of queues depending on
1460 * interrupt mode. */
1461 igb_set_interrupt_capability(adapter
);
1463 if (igb_alloc_queues(adapter
)) {
1464 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1468 /* Explicitly disable IRQ since the NIC can be in any state. */
1469 igb_irq_disable(adapter
);
1471 set_bit(__IGB_DOWN
, &adapter
->state
);
1476 * igb_open - Called when a network interface is made active
1477 * @netdev: network interface device structure
1479 * Returns 0 on success, negative value on failure
1481 * The open entry point is called when a network interface is made
1482 * active by the system (IFF_UP). At this point all resources needed
1483 * for transmit and receive operations are allocated, the interrupt
1484 * handler is registered with the OS, the watchdog timer is started,
1485 * and the stack is notified that the interface is ready.
1487 static int igb_open(struct net_device
*netdev
)
1489 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1490 struct e1000_hw
*hw
= &adapter
->hw
;
1494 /* disallow open during test */
1495 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1498 /* allocate transmit descriptors */
1499 err
= igb_setup_all_tx_resources(adapter
);
1503 /* allocate receive descriptors */
1504 err
= igb_setup_all_rx_resources(adapter
);
1508 /* e1000_power_up_phy(adapter); */
1510 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1511 if ((adapter
->hw
.mng_cookie
.status
&
1512 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1513 igb_update_mng_vlan(adapter
);
1515 /* before we allocate an interrupt, we must be ready to handle it.
1516 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1517 * as soon as we call pci_request_irq, so we have to setup our
1518 * clean_rx handler before we do so. */
1519 igb_configure(adapter
);
1521 err
= igb_request_irq(adapter
);
1525 /* From here on the code is the same as igb_up() */
1526 clear_bit(__IGB_DOWN
, &adapter
->state
);
1528 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1529 napi_enable(&adapter
->rx_ring
[i
].napi
);
1531 /* Clear any pending interrupts. */
1534 igb_irq_enable(adapter
);
1536 netif_tx_start_all_queues(netdev
);
1538 /* Fire a link status change interrupt to start the watchdog. */
1539 wr32(E1000_ICS
, E1000_ICS_LSC
);
1544 igb_release_hw_control(adapter
);
1545 /* e1000_power_down_phy(adapter); */
1546 igb_free_all_rx_resources(adapter
);
1548 igb_free_all_tx_resources(adapter
);
1556 * igb_close - Disables a network interface
1557 * @netdev: network interface device structure
1559 * Returns 0, this is not allowed to fail
1561 * The close entry point is called when an interface is de-activated
1562 * by the OS. The hardware is still under the driver's control, but
1563 * needs to be disabled. A global MAC reset is issued to stop the
1564 * hardware, and all transmit and receive resources are freed.
1566 static int igb_close(struct net_device
*netdev
)
1568 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1570 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1573 igb_free_irq(adapter
);
1575 igb_free_all_tx_resources(adapter
);
1576 igb_free_all_rx_resources(adapter
);
1578 /* kill manageability vlan ID if supported, but not if a vlan with
1579 * the same ID is registered on the host OS (let 8021q kill it) */
1580 if ((adapter
->hw
.mng_cookie
.status
&
1581 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1583 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1584 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1590 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1591 * @adapter: board private structure
1592 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1594 * Return 0 on success, negative on failure
1597 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1598 struct igb_ring
*tx_ring
)
1600 struct pci_dev
*pdev
= adapter
->pdev
;
1603 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1604 tx_ring
->buffer_info
= vmalloc(size
);
1605 if (!tx_ring
->buffer_info
)
1607 memset(tx_ring
->buffer_info
, 0, size
);
1609 /* round up to nearest 4K */
1610 tx_ring
->size
= tx_ring
->count
* sizeof(struct e1000_tx_desc
);
1611 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1613 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1619 tx_ring
->adapter
= adapter
;
1620 tx_ring
->next_to_use
= 0;
1621 tx_ring
->next_to_clean
= 0;
1625 vfree(tx_ring
->buffer_info
);
1626 dev_err(&adapter
->pdev
->dev
,
1627 "Unable to allocate memory for the transmit descriptor ring\n");
1632 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1633 * (Descriptors) for all queues
1634 * @adapter: board private structure
1636 * Return 0 on success, negative on failure
1638 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1643 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1644 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1646 dev_err(&adapter
->pdev
->dev
,
1647 "Allocation for Tx Queue %u failed\n", i
);
1648 for (i
--; i
>= 0; i
--)
1649 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1654 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1655 r_idx
= i
% adapter
->num_tx_queues
;
1656 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1662 * igb_configure_tx - Configure transmit Unit after Reset
1663 * @adapter: board private structure
1665 * Configure the Tx unit of the MAC after a reset.
1667 static void igb_configure_tx(struct igb_adapter
*adapter
)
1670 struct e1000_hw
*hw
= &adapter
->hw
;
1675 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1676 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
1678 wr32(E1000_TDLEN(j
),
1679 ring
->count
* sizeof(struct e1000_tx_desc
));
1681 wr32(E1000_TDBAL(j
),
1682 tdba
& 0x00000000ffffffffULL
);
1683 wr32(E1000_TDBAH(j
), tdba
>> 32);
1685 ring
->head
= E1000_TDH(j
);
1686 ring
->tail
= E1000_TDT(j
);
1687 writel(0, hw
->hw_addr
+ ring
->tail
);
1688 writel(0, hw
->hw_addr
+ ring
->head
);
1689 txdctl
= rd32(E1000_TXDCTL(j
));
1690 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1691 wr32(E1000_TXDCTL(j
), txdctl
);
1693 /* Turn off Relaxed Ordering on head write-backs. The
1694 * writebacks MUST be delivered in order or it will
1695 * completely screw up our bookeeping.
1697 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1698 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1699 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1704 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1706 /* Program the Transmit Control Register */
1708 tctl
= rd32(E1000_TCTL
);
1709 tctl
&= ~E1000_TCTL_CT
;
1710 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1711 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1713 igb_config_collision_dist(hw
);
1715 /* Setup Transmit Descriptor Settings for eop descriptor */
1716 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1718 /* Enable transmits */
1719 tctl
|= E1000_TCTL_EN
;
1721 wr32(E1000_TCTL
, tctl
);
1725 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1726 * @adapter: board private structure
1727 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1729 * Returns 0 on success, negative on failure
1732 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1733 struct igb_ring
*rx_ring
)
1735 struct pci_dev
*pdev
= adapter
->pdev
;
1738 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1739 rx_ring
->buffer_info
= vmalloc(size
);
1740 if (!rx_ring
->buffer_info
)
1742 memset(rx_ring
->buffer_info
, 0, size
);
1744 desc_len
= sizeof(union e1000_adv_rx_desc
);
1746 /* Round up to nearest 4K */
1747 rx_ring
->size
= rx_ring
->count
* desc_len
;
1748 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1750 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1756 rx_ring
->next_to_clean
= 0;
1757 rx_ring
->next_to_use
= 0;
1759 rx_ring
->adapter
= adapter
;
1764 vfree(rx_ring
->buffer_info
);
1765 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1766 "the receive descriptor ring\n");
1771 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1772 * (Descriptors) for all queues
1773 * @adapter: board private structure
1775 * Return 0 on success, negative on failure
1777 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1781 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1782 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1784 dev_err(&adapter
->pdev
->dev
,
1785 "Allocation for Rx Queue %u failed\n", i
);
1786 for (i
--; i
>= 0; i
--)
1787 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1796 * igb_setup_rctl - configure the receive control registers
1797 * @adapter: Board private structure
1799 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1801 struct e1000_hw
*hw
= &adapter
->hw
;
1806 rctl
= rd32(E1000_RCTL
);
1808 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1809 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1811 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1812 (adapter
->hw
.mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1815 * enable stripping of CRC. It's unlikely this will break BMC
1816 * redirection as it did with e1000. Newer features require
1817 * that the HW strips the CRC.
1819 rctl
|= E1000_RCTL_SECRC
;
1822 * disable store bad packets, long packet enable, and clear size bits.
1824 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_LPE
| E1000_RCTL_SZ_256
);
1826 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
)
1827 rctl
|= E1000_RCTL_LPE
;
1829 /* Setup buffer sizes */
1830 switch (adapter
->rx_buffer_len
) {
1831 case IGB_RXBUFFER_256
:
1832 rctl
|= E1000_RCTL_SZ_256
;
1834 case IGB_RXBUFFER_512
:
1835 rctl
|= E1000_RCTL_SZ_512
;
1838 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
1839 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
1843 /* 82575 and greater support packet-split where the protocol
1844 * header is placed in skb->data and the packet data is
1845 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1846 * In the case of a non-split, skb->data is linearly filled,
1847 * followed by the page buffers. Therefore, skb->data is
1848 * sized to hold the largest protocol header.
1850 /* allocations using alloc_page take too long for regular MTU
1851 * so only enable packet split for jumbo frames */
1852 if (rctl
& E1000_RCTL_LPE
) {
1853 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
1854 srrctl
|= adapter
->rx_ps_hdr_size
<<
1855 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
1856 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1858 adapter
->rx_ps_hdr_size
= 0;
1859 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1862 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1863 j
= adapter
->rx_ring
[i
].reg_idx
;
1864 wr32(E1000_SRRCTL(j
), srrctl
);
1867 wr32(E1000_RCTL
, rctl
);
1871 * igb_configure_rx - Configure receive Unit after Reset
1872 * @adapter: board private structure
1874 * Configure the Rx unit of the MAC after a reset.
1876 static void igb_configure_rx(struct igb_adapter
*adapter
)
1879 struct e1000_hw
*hw
= &adapter
->hw
;
1884 /* disable receives while setting up the descriptors */
1885 rctl
= rd32(E1000_RCTL
);
1886 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1890 if (adapter
->itr_setting
> 3)
1891 wr32(E1000_ITR
, adapter
->itr
);
1893 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1894 * the Base and Length of the Rx Descriptor Ring */
1895 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1896 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
1899 wr32(E1000_RDBAL(j
),
1900 rdba
& 0x00000000ffffffffULL
);
1901 wr32(E1000_RDBAH(j
), rdba
>> 32);
1902 wr32(E1000_RDLEN(j
),
1903 ring
->count
* sizeof(union e1000_adv_rx_desc
));
1905 ring
->head
= E1000_RDH(j
);
1906 ring
->tail
= E1000_RDT(j
);
1907 writel(0, hw
->hw_addr
+ ring
->tail
);
1908 writel(0, hw
->hw_addr
+ ring
->head
);
1910 rxdctl
= rd32(E1000_RXDCTL(j
));
1911 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
1912 rxdctl
&= 0xFFF00000;
1913 rxdctl
|= IGB_RX_PTHRESH
;
1914 rxdctl
|= IGB_RX_HTHRESH
<< 8;
1915 rxdctl
|= IGB_RX_WTHRESH
<< 16;
1916 wr32(E1000_RXDCTL(j
), rxdctl
);
1919 if (adapter
->num_rx_queues
> 1) {
1928 get_random_bytes(&random
[0], 40);
1930 if (hw
->mac
.type
>= e1000_82576
)
1934 for (j
= 0; j
< (32 * 4); j
++) {
1936 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
1939 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
1941 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
1943 /* Fill out hash function seeds */
1944 for (j
= 0; j
< 10; j
++)
1945 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
1947 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
1948 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
1949 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
1950 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
1951 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
1952 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
1953 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
1954 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
1957 wr32(E1000_MRQC
, mrqc
);
1959 /* Multiqueue and raw packet checksumming are mutually
1960 * exclusive. Note that this not the same as TCP/IP
1961 * checksumming, which works fine. */
1962 rxcsum
= rd32(E1000_RXCSUM
);
1963 rxcsum
|= E1000_RXCSUM_PCSD
;
1964 wr32(E1000_RXCSUM
, rxcsum
);
1966 /* Enable Receive Checksum Offload for TCP and UDP */
1967 rxcsum
= rd32(E1000_RXCSUM
);
1968 if (adapter
->rx_csum
) {
1969 rxcsum
|= E1000_RXCSUM_TUOFL
;
1971 /* Enable IPv4 payload checksum for UDP fragments
1972 * Must be used in conjunction with packet-split. */
1973 if (adapter
->rx_ps_hdr_size
)
1974 rxcsum
|= E1000_RXCSUM_IPPCSE
;
1976 rxcsum
&= ~E1000_RXCSUM_TUOFL
;
1977 /* don't need to clear IPPCSE as it defaults to 0 */
1979 wr32(E1000_RXCSUM
, rxcsum
);
1984 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
1986 wr32(E1000_RLPML
, adapter
->max_frame_size
);
1988 /* Enable Receives */
1989 wr32(E1000_RCTL
, rctl
);
1993 * igb_free_tx_resources - Free Tx Resources per Queue
1994 * @tx_ring: Tx descriptor ring for a specific queue
1996 * Free all transmit software resources
1998 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2000 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2002 igb_clean_tx_ring(tx_ring
);
2004 vfree(tx_ring
->buffer_info
);
2005 tx_ring
->buffer_info
= NULL
;
2007 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2009 tx_ring
->desc
= NULL
;
2013 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2014 * @adapter: board private structure
2016 * Free all transmit software resources
2018 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2022 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2023 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2026 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2027 struct igb_buffer
*buffer_info
)
2029 if (buffer_info
->dma
) {
2030 pci_unmap_page(adapter
->pdev
,
2032 buffer_info
->length
,
2034 buffer_info
->dma
= 0;
2036 if (buffer_info
->skb
) {
2037 dev_kfree_skb_any(buffer_info
->skb
);
2038 buffer_info
->skb
= NULL
;
2040 buffer_info
->time_stamp
= 0;
2041 /* buffer_info must be completely set up in the transmit path */
2045 * igb_clean_tx_ring - Free Tx Buffers
2046 * @tx_ring: ring to be cleaned
2048 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2050 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2051 struct igb_buffer
*buffer_info
;
2055 if (!tx_ring
->buffer_info
)
2057 /* Free all the Tx ring sk_buffs */
2059 for (i
= 0; i
< tx_ring
->count
; i
++) {
2060 buffer_info
= &tx_ring
->buffer_info
[i
];
2061 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2064 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2065 memset(tx_ring
->buffer_info
, 0, size
);
2067 /* Zero out the descriptor ring */
2069 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2071 tx_ring
->next_to_use
= 0;
2072 tx_ring
->next_to_clean
= 0;
2074 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2075 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2079 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2080 * @adapter: board private structure
2082 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2086 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2087 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2091 * igb_free_rx_resources - Free Rx Resources
2092 * @rx_ring: ring to clean the resources from
2094 * Free all receive software resources
2096 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2098 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2100 igb_clean_rx_ring(rx_ring
);
2102 vfree(rx_ring
->buffer_info
);
2103 rx_ring
->buffer_info
= NULL
;
2105 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2107 rx_ring
->desc
= NULL
;
2111 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2112 * @adapter: board private structure
2114 * Free all receive software resources
2116 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2120 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2121 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2125 * igb_clean_rx_ring - Free Rx Buffers per Queue
2126 * @rx_ring: ring to free buffers from
2128 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2130 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2131 struct igb_buffer
*buffer_info
;
2132 struct pci_dev
*pdev
= adapter
->pdev
;
2136 if (!rx_ring
->buffer_info
)
2138 /* Free all the Rx ring sk_buffs */
2139 for (i
= 0; i
< rx_ring
->count
; i
++) {
2140 buffer_info
= &rx_ring
->buffer_info
[i
];
2141 if (buffer_info
->dma
) {
2142 if (adapter
->rx_ps_hdr_size
)
2143 pci_unmap_single(pdev
, buffer_info
->dma
,
2144 adapter
->rx_ps_hdr_size
,
2145 PCI_DMA_FROMDEVICE
);
2147 pci_unmap_single(pdev
, buffer_info
->dma
,
2148 adapter
->rx_buffer_len
,
2149 PCI_DMA_FROMDEVICE
);
2150 buffer_info
->dma
= 0;
2153 if (buffer_info
->skb
) {
2154 dev_kfree_skb(buffer_info
->skb
);
2155 buffer_info
->skb
= NULL
;
2157 if (buffer_info
->page
) {
2158 if (buffer_info
->page_dma
)
2159 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2161 PCI_DMA_FROMDEVICE
);
2162 put_page(buffer_info
->page
);
2163 buffer_info
->page
= NULL
;
2164 buffer_info
->page_dma
= 0;
2165 buffer_info
->page_offset
= 0;
2169 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2170 memset(rx_ring
->buffer_info
, 0, size
);
2172 /* Zero out the descriptor ring */
2173 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2175 rx_ring
->next_to_clean
= 0;
2176 rx_ring
->next_to_use
= 0;
2178 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2179 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2183 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2184 * @adapter: board private structure
2186 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2190 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2191 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2195 * igb_set_mac - Change the Ethernet Address of the NIC
2196 * @netdev: network interface device structure
2197 * @p: pointer to an address structure
2199 * Returns 0 on success, negative on failure
2201 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2203 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2204 struct sockaddr
*addr
= p
;
2206 if (!is_valid_ether_addr(addr
->sa_data
))
2207 return -EADDRNOTAVAIL
;
2209 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2210 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2212 adapter
->hw
.mac
.ops
.rar_set(&adapter
->hw
, adapter
->hw
.mac
.addr
, 0);
2218 * igb_set_multi - Multicast and Promiscuous mode set
2219 * @netdev: network interface device structure
2221 * The set_multi entry point is called whenever the multicast address
2222 * list or the network interface flags are updated. This routine is
2223 * responsible for configuring the hardware for proper multicast,
2224 * promiscuous mode, and all-multi behavior.
2226 static void igb_set_multi(struct net_device
*netdev
)
2228 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2229 struct e1000_hw
*hw
= &adapter
->hw
;
2230 struct e1000_mac_info
*mac
= &hw
->mac
;
2231 struct dev_mc_list
*mc_ptr
;
2236 /* Check for Promiscuous and All Multicast modes */
2238 rctl
= rd32(E1000_RCTL
);
2240 if (netdev
->flags
& IFF_PROMISC
) {
2241 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2242 rctl
&= ~E1000_RCTL_VFE
;
2244 if (netdev
->flags
& IFF_ALLMULTI
) {
2245 rctl
|= E1000_RCTL_MPE
;
2246 rctl
&= ~E1000_RCTL_UPE
;
2248 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2249 rctl
|= E1000_RCTL_VFE
;
2251 wr32(E1000_RCTL
, rctl
);
2253 if (!netdev
->mc_count
) {
2254 /* nothing to program, so clear mc list */
2255 igb_update_mc_addr_list_82575(hw
, NULL
, 0, 1,
2256 mac
->rar_entry_count
);
2260 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2264 /* The shared function expects a packed array of only addresses. */
2265 mc_ptr
= netdev
->mc_list
;
2267 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2270 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2271 mc_ptr
= mc_ptr
->next
;
2273 igb_update_mc_addr_list_82575(hw
, mta_list
, i
, 1,
2274 mac
->rar_entry_count
);
2278 /* Need to wait a few seconds after link up to get diagnostic information from
2280 static void igb_update_phy_info(unsigned long data
)
2282 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2283 igb_get_phy_info(&adapter
->hw
);
2287 * igb_watchdog - Timer Call-back
2288 * @data: pointer to adapter cast into an unsigned long
2290 static void igb_watchdog(unsigned long data
)
2292 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2293 /* Do the rest outside of interrupt context */
2294 schedule_work(&adapter
->watchdog_task
);
2297 static void igb_watchdog_task(struct work_struct
*work
)
2299 struct igb_adapter
*adapter
= container_of(work
,
2300 struct igb_adapter
, watchdog_task
);
2301 struct e1000_hw
*hw
= &adapter
->hw
;
2303 struct net_device
*netdev
= adapter
->netdev
;
2304 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2305 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
2311 if ((netif_carrier_ok(netdev
)) &&
2312 (rd32(E1000_STATUS
) & E1000_STATUS_LU
))
2315 ret_val
= hw
->mac
.ops
.check_for_link(&adapter
->hw
);
2316 if ((ret_val
== E1000_ERR_PHY
) &&
2317 (hw
->phy
.type
== e1000_phy_igp_3
) &&
2319 E1000_PHY_CTRL_GBE_DISABLE
))
2320 dev_info(&adapter
->pdev
->dev
,
2321 "Gigabit has been disabled, downgrading speed\n");
2323 if ((hw
->phy
.media_type
== e1000_media_type_internal_serdes
) &&
2324 !(rd32(E1000_TXCW
) & E1000_TXCW_ANE
))
2325 link
= mac
->serdes_has_link
;
2327 link
= rd32(E1000_STATUS
) &
2331 if (!netif_carrier_ok(netdev
)) {
2333 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2334 &adapter
->link_speed
,
2335 &adapter
->link_duplex
);
2337 ctrl
= rd32(E1000_CTRL
);
2338 /* Links status message must follow this format */
2339 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2340 "Flow Control: %s\n",
2342 adapter
->link_speed
,
2343 adapter
->link_duplex
== FULL_DUPLEX
?
2344 "Full Duplex" : "Half Duplex",
2345 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2346 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2347 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2348 E1000_CTRL_TFCE
) ? "TX" : "None")));
2350 /* tweak tx_queue_len according to speed/duplex and
2351 * adjust the timeout factor */
2352 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2353 adapter
->tx_timeout_factor
= 1;
2354 switch (adapter
->link_speed
) {
2356 netdev
->tx_queue_len
= 10;
2357 adapter
->tx_timeout_factor
= 14;
2360 netdev
->tx_queue_len
= 100;
2361 /* maybe add some timeout factor ? */
2365 netif_carrier_on(netdev
);
2366 netif_tx_wake_all_queues(netdev
);
2368 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2369 mod_timer(&adapter
->phy_info_timer
,
2370 round_jiffies(jiffies
+ 2 * HZ
));
2373 if (netif_carrier_ok(netdev
)) {
2374 adapter
->link_speed
= 0;
2375 adapter
->link_duplex
= 0;
2376 /* Links status message must follow this format */
2377 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2379 netif_carrier_off(netdev
);
2380 netif_tx_stop_all_queues(netdev
);
2381 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2382 mod_timer(&adapter
->phy_info_timer
,
2383 round_jiffies(jiffies
+ 2 * HZ
));
2388 igb_update_stats(adapter
);
2390 mac
->tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2391 adapter
->tpt_old
= adapter
->stats
.tpt
;
2392 mac
->collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2393 adapter
->colc_old
= adapter
->stats
.colc
;
2395 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2396 adapter
->gorc_old
= adapter
->stats
.gorc
;
2397 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2398 adapter
->gotc_old
= adapter
->stats
.gotc
;
2400 igb_update_adaptive(&adapter
->hw
);
2402 if (!netif_carrier_ok(netdev
)) {
2403 if (IGB_DESC_UNUSED(tx_ring
) + 1 < tx_ring
->count
) {
2404 /* We've lost link, so the controller stops DMA,
2405 * but we've got queued Tx work that's never going
2406 * to get done, so reset controller to flush Tx.
2407 * (Do the reset outside of interrupt context). */
2408 adapter
->tx_timeout_count
++;
2409 schedule_work(&adapter
->reset_task
);
2413 /* Cause software interrupt to ensure rx ring is cleaned */
2414 if (adapter
->msix_entries
) {
2415 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2416 eics
|= adapter
->rx_ring
[i
].eims_value
;
2417 wr32(E1000_EICS
, eics
);
2419 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2422 /* Force detection of hung controller every watchdog period */
2423 tx_ring
->detect_tx_hung
= true;
2425 /* Reset the timer */
2426 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2427 mod_timer(&adapter
->watchdog_timer
,
2428 round_jiffies(jiffies
+ 2 * HZ
));
2431 enum latency_range
{
2435 latency_invalid
= 255
2440 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2442 * Stores a new ITR value based on strictly on packet size. This
2443 * algorithm is less sophisticated than that used in igb_update_itr,
2444 * due to the difficulty of synchronizing statistics across multiple
2445 * receive rings. The divisors and thresholds used by this fuction
2446 * were determined based on theoretical maximum wire speed and testing
2447 * data, in order to minimize response time while increasing bulk
2449 * This functionality is controlled by the InterruptThrottleRate module
2450 * parameter (see igb_param.c)
2451 * NOTE: This function is called only when operating in a multiqueue
2452 * receive environment.
2453 * @rx_ring: pointer to ring
2455 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2457 int new_val
= rx_ring
->itr_val
;
2458 int avg_wire_size
= 0;
2459 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2461 if (!rx_ring
->total_packets
)
2462 goto clear_counts
; /* no packets, so don't do anything */
2464 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2465 * ints/sec - ITR timer value of 120 ticks.
2467 if (adapter
->link_speed
!= SPEED_1000
) {
2471 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2473 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2474 avg_wire_size
+= 24;
2476 /* Don't starve jumbo frames */
2477 avg_wire_size
= min(avg_wire_size
, 3000);
2479 /* Give a little boost to mid-size frames */
2480 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2481 new_val
= avg_wire_size
/ 3;
2483 new_val
= avg_wire_size
/ 2;
2486 if (new_val
!= rx_ring
->itr_val
) {
2487 rx_ring
->itr_val
= new_val
;
2488 rx_ring
->set_itr
= 1;
2491 rx_ring
->total_bytes
= 0;
2492 rx_ring
->total_packets
= 0;
2496 * igb_update_itr - update the dynamic ITR value based on statistics
2497 * Stores a new ITR value based on packets and byte
2498 * counts during the last interrupt. The advantage of per interrupt
2499 * computation is faster updates and more accurate ITR for the current
2500 * traffic pattern. Constants in this function were computed
2501 * based on theoretical maximum wire speed and thresholds were set based
2502 * on testing data as well as attempting to minimize response time
2503 * while increasing bulk throughput.
2504 * this functionality is controlled by the InterruptThrottleRate module
2505 * parameter (see igb_param.c)
2506 * NOTE: These calculations are only valid when operating in a single-
2507 * queue environment.
2508 * @adapter: pointer to adapter
2509 * @itr_setting: current adapter->itr
2510 * @packets: the number of packets during this measurement interval
2511 * @bytes: the number of bytes during this measurement interval
2513 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2514 int packets
, int bytes
)
2516 unsigned int retval
= itr_setting
;
2519 goto update_itr_done
;
2521 switch (itr_setting
) {
2522 case lowest_latency
:
2523 /* handle TSO and jumbo frames */
2524 if (bytes
/packets
> 8000)
2525 retval
= bulk_latency
;
2526 else if ((packets
< 5) && (bytes
> 512))
2527 retval
= low_latency
;
2529 case low_latency
: /* 50 usec aka 20000 ints/s */
2530 if (bytes
> 10000) {
2531 /* this if handles the TSO accounting */
2532 if (bytes
/packets
> 8000) {
2533 retval
= bulk_latency
;
2534 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2535 retval
= bulk_latency
;
2536 } else if ((packets
> 35)) {
2537 retval
= lowest_latency
;
2539 } else if (bytes
/packets
> 2000) {
2540 retval
= bulk_latency
;
2541 } else if (packets
<= 2 && bytes
< 512) {
2542 retval
= lowest_latency
;
2545 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2546 if (bytes
> 25000) {
2548 retval
= low_latency
;
2549 } else if (bytes
< 6000) {
2550 retval
= low_latency
;
2559 static void igb_set_itr(struct igb_adapter
*adapter
)
2562 u32 new_itr
= adapter
->itr
;
2564 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2565 if (adapter
->link_speed
!= SPEED_1000
) {
2571 adapter
->rx_itr
= igb_update_itr(adapter
,
2573 adapter
->rx_ring
->total_packets
,
2574 adapter
->rx_ring
->total_bytes
);
2576 if (adapter
->rx_ring
->buddy
) {
2577 adapter
->tx_itr
= igb_update_itr(adapter
,
2579 adapter
->tx_ring
->total_packets
,
2580 adapter
->tx_ring
->total_bytes
);
2582 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2584 current_itr
= adapter
->rx_itr
;
2587 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2588 if (adapter
->itr_setting
== 3 &&
2589 current_itr
== lowest_latency
)
2590 current_itr
= low_latency
;
2592 switch (current_itr
) {
2593 /* counts and packets in update_itr are dependent on these numbers */
2594 case lowest_latency
:
2598 new_itr
= 20000; /* aka hwitr = ~200 */
2608 adapter
->rx_ring
->total_bytes
= 0;
2609 adapter
->rx_ring
->total_packets
= 0;
2610 if (adapter
->rx_ring
->buddy
) {
2611 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2612 adapter
->rx_ring
->buddy
->total_packets
= 0;
2615 if (new_itr
!= adapter
->itr
) {
2616 /* this attempts to bias the interrupt rate towards Bulk
2617 * by adding intermediate steps when interrupt rate is
2619 new_itr
= new_itr
> adapter
->itr
?
2620 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2622 /* Don't write the value here; it resets the adapter's
2623 * internal timer, and causes us to delay far longer than
2624 * we should between interrupts. Instead, we write the ITR
2625 * value at the beginning of the next interrupt so the timing
2626 * ends up being correct.
2628 adapter
->itr
= new_itr
;
2629 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2630 adapter
->rx_ring
->set_itr
= 1;
2637 #define IGB_TX_FLAGS_CSUM 0x00000001
2638 #define IGB_TX_FLAGS_VLAN 0x00000002
2639 #define IGB_TX_FLAGS_TSO 0x00000004
2640 #define IGB_TX_FLAGS_IPV4 0x00000008
2641 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2642 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2644 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2645 struct igb_ring
*tx_ring
,
2646 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2648 struct e1000_adv_tx_context_desc
*context_desc
;
2651 struct igb_buffer
*buffer_info
;
2652 u32 info
= 0, tu_cmd
= 0;
2653 u32 mss_l4len_idx
, l4len
;
2656 if (skb_header_cloned(skb
)) {
2657 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2662 l4len
= tcp_hdrlen(skb
);
2665 if (skb
->protocol
== htons(ETH_P_IP
)) {
2666 struct iphdr
*iph
= ip_hdr(skb
);
2669 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2673 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2674 ipv6_hdr(skb
)->payload_len
= 0;
2675 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2676 &ipv6_hdr(skb
)->daddr
,
2680 i
= tx_ring
->next_to_use
;
2682 buffer_info
= &tx_ring
->buffer_info
[i
];
2683 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2684 /* VLAN MACLEN IPLEN */
2685 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2686 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2687 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2688 *hdr_len
+= skb_network_offset(skb
);
2689 info
|= skb_network_header_len(skb
);
2690 *hdr_len
+= skb_network_header_len(skb
);
2691 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2693 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2694 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2696 if (skb
->protocol
== htons(ETH_P_IP
))
2697 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2698 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2700 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2703 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2704 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2706 /* Context index must be unique per ring. */
2707 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2708 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2710 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2711 context_desc
->seqnum_seed
= 0;
2713 buffer_info
->time_stamp
= jiffies
;
2714 buffer_info
->next_to_watch
= i
;
2715 buffer_info
->dma
= 0;
2717 if (i
== tx_ring
->count
)
2720 tx_ring
->next_to_use
= i
;
2725 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2726 struct igb_ring
*tx_ring
,
2727 struct sk_buff
*skb
, u32 tx_flags
)
2729 struct e1000_adv_tx_context_desc
*context_desc
;
2731 struct igb_buffer
*buffer_info
;
2732 u32 info
= 0, tu_cmd
= 0;
2734 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
2735 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
2736 i
= tx_ring
->next_to_use
;
2737 buffer_info
= &tx_ring
->buffer_info
[i
];
2738 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2740 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2741 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2742 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2743 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2744 info
|= skb_network_header_len(skb
);
2746 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2748 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2750 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2751 switch (skb
->protocol
) {
2752 case cpu_to_be16(ETH_P_IP
):
2753 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2754 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
2755 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2757 case cpu_to_be16(ETH_P_IPV6
):
2758 /* XXX what about other V6 headers?? */
2759 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
2760 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2763 if (unlikely(net_ratelimit()))
2764 dev_warn(&adapter
->pdev
->dev
,
2765 "partial checksum but proto=%x!\n",
2771 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2772 context_desc
->seqnum_seed
= 0;
2773 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2774 context_desc
->mss_l4len_idx
=
2775 cpu_to_le32(tx_ring
->queue_index
<< 4);
2777 buffer_info
->time_stamp
= jiffies
;
2778 buffer_info
->next_to_watch
= i
;
2779 buffer_info
->dma
= 0;
2782 if (i
== tx_ring
->count
)
2784 tx_ring
->next_to_use
= i
;
2793 #define IGB_MAX_TXD_PWR 16
2794 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2796 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
2797 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
2800 struct igb_buffer
*buffer_info
;
2801 unsigned int len
= skb_headlen(skb
);
2802 unsigned int count
= 0, i
;
2805 i
= tx_ring
->next_to_use
;
2807 buffer_info
= &tx_ring
->buffer_info
[i
];
2808 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2809 buffer_info
->length
= len
;
2810 /* set time_stamp *before* dma to help avoid a possible race */
2811 buffer_info
->time_stamp
= jiffies
;
2812 buffer_info
->next_to_watch
= i
;
2813 buffer_info
->dma
= pci_map_single(adapter
->pdev
, skb
->data
, len
,
2817 if (i
== tx_ring
->count
)
2820 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
2821 struct skb_frag_struct
*frag
;
2823 frag
= &skb_shinfo(skb
)->frags
[f
];
2826 buffer_info
= &tx_ring
->buffer_info
[i
];
2827 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2828 buffer_info
->length
= len
;
2829 buffer_info
->time_stamp
= jiffies
;
2830 buffer_info
->next_to_watch
= i
;
2831 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2839 if (i
== tx_ring
->count
)
2843 i
= ((i
== 0) ? tx_ring
->count
- 1 : i
- 1);
2844 tx_ring
->buffer_info
[i
].skb
= skb
;
2845 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
2850 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
2851 struct igb_ring
*tx_ring
,
2852 int tx_flags
, int count
, u32 paylen
,
2855 union e1000_adv_tx_desc
*tx_desc
= NULL
;
2856 struct igb_buffer
*buffer_info
;
2857 u32 olinfo_status
= 0, cmd_type_len
;
2860 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
2861 E1000_ADVTXD_DCMD_DEXT
);
2863 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2864 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
2866 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
2867 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
2869 /* insert tcp checksum */
2870 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2872 /* insert ip checksum */
2873 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
2874 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
2876 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
2877 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2880 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
2881 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
2882 IGB_TX_FLAGS_VLAN
)))
2883 olinfo_status
|= tx_ring
->queue_index
<< 4;
2885 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
2887 i
= tx_ring
->next_to_use
;
2889 buffer_info
= &tx_ring
->buffer_info
[i
];
2890 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
2891 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
2892 tx_desc
->read
.cmd_type_len
=
2893 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
2894 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
2896 if (i
== tx_ring
->count
)
2900 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
2901 /* Force memory writes to complete before letting h/w
2902 * know there are new descriptors to fetch. (Only
2903 * applicable for weak-ordered memory model archs,
2904 * such as IA-64). */
2907 tx_ring
->next_to_use
= i
;
2908 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2909 /* we need this if more than one processor can write to our tail
2910 * at a time, it syncronizes IO on IA64/Altix systems */
2914 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
2915 struct igb_ring
*tx_ring
, int size
)
2917 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2919 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
2921 /* Herbert's original patch had:
2922 * smp_mb__after_netif_stop_queue();
2923 * but since that doesn't exist yet, just open code it. */
2926 /* We need to check again in a case another CPU has just
2927 * made room available. */
2928 if (IGB_DESC_UNUSED(tx_ring
) < size
)
2932 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
2933 ++adapter
->restart_queue
;
2937 static int igb_maybe_stop_tx(struct net_device
*netdev
,
2938 struct igb_ring
*tx_ring
, int size
)
2940 if (IGB_DESC_UNUSED(tx_ring
) >= size
)
2942 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
2945 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2947 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
2948 struct net_device
*netdev
,
2949 struct igb_ring
*tx_ring
)
2951 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2953 unsigned int tx_flags
= 0;
2958 len
= skb_headlen(skb
);
2960 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
2961 dev_kfree_skb_any(skb
);
2962 return NETDEV_TX_OK
;
2965 if (skb
->len
<= 0) {
2966 dev_kfree_skb_any(skb
);
2967 return NETDEV_TX_OK
;
2970 /* need: 1 descriptor per page,
2971 * + 2 desc gap to keep tail from touching head,
2972 * + 1 desc for skb->data,
2973 * + 1 desc for context descriptor,
2974 * otherwise try next time */
2975 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
2976 /* this is a hard error */
2977 return NETDEV_TX_BUSY
;
2981 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
2982 tx_flags
|= IGB_TX_FLAGS_VLAN
;
2983 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
2986 if (skb
->protocol
== htons(ETH_P_IP
))
2987 tx_flags
|= IGB_TX_FLAGS_IPV4
;
2989 first
= tx_ring
->next_to_use
;
2991 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
2995 dev_kfree_skb_any(skb
);
2996 return NETDEV_TX_OK
;
3000 tx_flags
|= IGB_TX_FLAGS_TSO
;
3001 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
))
3002 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3003 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3005 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
,
3006 igb_tx_map_adv(adapter
, tx_ring
, skb
, first
),
3009 netdev
->trans_start
= jiffies
;
3011 /* Make sure there is space in the ring for the next send. */
3012 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3014 return NETDEV_TX_OK
;
3017 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3019 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3020 struct igb_ring
*tx_ring
;
3023 r_idx
= skb
->queue_mapping
& (IGB_MAX_TX_QUEUES
- 1);
3024 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3026 /* This goes back to the question of how to logically map a tx queue
3027 * to a flow. Right now, performance is impacted slightly negatively
3028 * if using multiple tx queues. If the stack breaks away from a
3029 * single qdisc implementation, we can look at this again. */
3030 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3034 * igb_tx_timeout - Respond to a Tx Hang
3035 * @netdev: network interface device structure
3037 static void igb_tx_timeout(struct net_device
*netdev
)
3039 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3040 struct e1000_hw
*hw
= &adapter
->hw
;
3042 /* Do the reset outside of interrupt context */
3043 adapter
->tx_timeout_count
++;
3044 schedule_work(&adapter
->reset_task
);
3045 wr32(E1000_EICS
, adapter
->eims_enable_mask
&
3046 ~(E1000_EIMS_TCP_TIMER
| E1000_EIMS_OTHER
));
3049 static void igb_reset_task(struct work_struct
*work
)
3051 struct igb_adapter
*adapter
;
3052 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3054 igb_reinit_locked(adapter
);
3058 * igb_get_stats - Get System Network Statistics
3059 * @netdev: network interface device structure
3061 * Returns the address of the device statistics structure.
3062 * The statistics are actually updated from the timer callback.
3064 static struct net_device_stats
*
3065 igb_get_stats(struct net_device
*netdev
)
3067 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3069 /* only return the current stats */
3070 return &adapter
->net_stats
;
3074 * igb_change_mtu - Change the Maximum Transfer Unit
3075 * @netdev: network interface device structure
3076 * @new_mtu: new value for maximum frame size
3078 * Returns 0 on success, negative on failure
3080 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3082 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3083 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3085 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3086 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3087 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3091 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3092 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3093 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3097 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3099 /* igb_down has a dependency on max_frame_size */
3100 adapter
->max_frame_size
= max_frame
;
3101 if (netif_running(netdev
))
3104 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3105 * means we reserve 2 more, this pushes us to allocate from the next
3107 * i.e. RXBUFFER_2048 --> size-4096 slab
3110 if (max_frame
<= IGB_RXBUFFER_256
)
3111 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3112 else if (max_frame
<= IGB_RXBUFFER_512
)
3113 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3114 else if (max_frame
<= IGB_RXBUFFER_1024
)
3115 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3116 else if (max_frame
<= IGB_RXBUFFER_2048
)
3117 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3119 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3120 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3122 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3124 /* adjust allocation if LPE protects us, and we aren't using SBP */
3125 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3126 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3127 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3129 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3130 netdev
->mtu
, new_mtu
);
3131 netdev
->mtu
= new_mtu
;
3133 if (netif_running(netdev
))
3138 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3144 * igb_update_stats - Update the board statistics counters
3145 * @adapter: board private structure
3148 void igb_update_stats(struct igb_adapter
*adapter
)
3150 struct e1000_hw
*hw
= &adapter
->hw
;
3151 struct pci_dev
*pdev
= adapter
->pdev
;
3154 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3157 * Prevent stats update while adapter is being reset, or if the pci
3158 * connection is down.
3160 if (adapter
->link_speed
== 0)
3162 if (pci_channel_offline(pdev
))
3165 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3166 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3167 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3168 rd32(E1000_GORCH
); /* clear GORCL */
3169 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3170 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3171 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3173 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3174 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3175 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3176 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3177 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3178 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3179 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3180 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3182 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3183 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3184 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3185 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3186 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3187 adapter
->stats
.dc
+= rd32(E1000_DC
);
3188 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3189 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3190 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3191 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3192 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3193 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3194 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3195 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3196 rd32(E1000_GOTCH
); /* clear GOTCL */
3197 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3198 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3199 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3200 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3201 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3202 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3203 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3205 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3206 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3207 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3208 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3209 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3210 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3212 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3213 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3215 /* used for adaptive IFS */
3217 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3218 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3219 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3220 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3222 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3223 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3224 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3225 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3226 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3228 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3229 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3230 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3231 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3232 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3233 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3234 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3235 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3236 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3238 /* Fill out the OS statistics structure */
3239 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3240 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3244 /* RLEC on some newer hardware can be incorrect so build
3245 * our own version based on RUC and ROC */
3246 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3247 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3248 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3249 adapter
->stats
.cexterr
;
3250 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3252 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3253 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3254 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3257 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3258 adapter
->stats
.latecol
;
3259 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3260 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3261 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3263 /* Tx Dropped needs to be maintained elsewhere */
3266 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3267 if ((adapter
->link_speed
== SPEED_1000
) &&
3268 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
,
3270 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3271 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3275 /* Management Stats */
3276 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3277 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3278 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3282 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3284 struct net_device
*netdev
= data
;
3285 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3286 struct e1000_hw
*hw
= &adapter
->hw
;
3287 u32 icr
= rd32(E1000_ICR
);
3289 /* reading ICR causes bit 31 of EICR to be cleared */
3290 if (!(icr
& E1000_ICR_LSC
))
3291 goto no_link_interrupt
;
3292 hw
->mac
.get_link_status
= 1;
3293 /* guard against interrupt when we're going down */
3294 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3295 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3298 wr32(E1000_IMS
, E1000_IMS_LSC
);
3299 wr32(E1000_EIMS
, adapter
->eims_other
);
3304 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3306 struct igb_ring
*tx_ring
= data
;
3307 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3308 struct e1000_hw
*hw
= &adapter
->hw
;
3310 #ifdef CONFIG_IGB_DCA
3311 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3312 igb_update_tx_dca(tx_ring
);
3314 tx_ring
->total_bytes
= 0;
3315 tx_ring
->total_packets
= 0;
3317 /* auto mask will automatically reenable the interrupt when we write
3319 if (!igb_clean_tx_irq(tx_ring
))
3320 /* Ring was not completely cleaned, so fire another interrupt */
3321 wr32(E1000_EICS
, tx_ring
->eims_value
);
3323 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3328 static void igb_write_itr(struct igb_ring
*ring
)
3330 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3331 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3332 switch (hw
->mac
.type
) {
3334 wr32(ring
->itr_register
,
3339 wr32(ring
->itr_register
,
3341 (ring
->itr_val
<< 16));
3348 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3350 struct igb_ring
*rx_ring
= data
;
3352 /* Write the ITR value calculated at the end of the
3353 * previous interrupt.
3356 igb_write_itr(rx_ring
);
3358 if (napi_schedule_prep(&rx_ring
->napi
))
3359 __napi_schedule(&rx_ring
->napi
);
3361 #ifdef CONFIG_IGB_DCA
3362 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3363 igb_update_rx_dca(rx_ring
);
3368 #ifdef CONFIG_IGB_DCA
3369 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3372 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3373 struct e1000_hw
*hw
= &adapter
->hw
;
3374 int cpu
= get_cpu();
3375 int q
= rx_ring
->reg_idx
;
3377 if (rx_ring
->cpu
!= cpu
) {
3378 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3379 if (hw
->mac
.type
== e1000_82576
) {
3380 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3381 dca_rxctrl
|= dca_get_tag(cpu
) <<
3382 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3384 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3385 dca_rxctrl
|= dca_get_tag(cpu
);
3387 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3388 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3389 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3390 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3396 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3399 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3400 struct e1000_hw
*hw
= &adapter
->hw
;
3401 int cpu
= get_cpu();
3402 int q
= tx_ring
->reg_idx
;
3404 if (tx_ring
->cpu
!= cpu
) {
3405 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3406 if (hw
->mac
.type
== e1000_82576
) {
3407 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3408 dca_txctrl
|= dca_get_tag(cpu
) <<
3409 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3411 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3412 dca_txctrl
|= dca_get_tag(cpu
);
3414 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3415 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3421 static void igb_setup_dca(struct igb_adapter
*adapter
)
3425 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3428 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3429 adapter
->tx_ring
[i
].cpu
= -1;
3430 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3432 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3433 adapter
->rx_ring
[i
].cpu
= -1;
3434 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3438 static int __igb_notify_dca(struct device
*dev
, void *data
)
3440 struct net_device
*netdev
= dev_get_drvdata(dev
);
3441 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3442 struct e1000_hw
*hw
= &adapter
->hw
;
3443 unsigned long event
= *(unsigned long *)data
;
3445 if (!(adapter
->flags
& IGB_FLAG_HAS_DCA
))
3449 case DCA_PROVIDER_ADD
:
3450 /* if already enabled, don't do it again */
3451 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3453 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3454 /* Always use CB2 mode, difference is masked
3455 * in the CB driver. */
3456 wr32(E1000_DCA_CTRL
, 2);
3457 if (dca_add_requester(dev
) == 0) {
3458 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3459 igb_setup_dca(adapter
);
3462 /* Fall Through since DCA is disabled. */
3463 case DCA_PROVIDER_REMOVE
:
3464 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3465 /* without this a class_device is left
3466 * hanging around in the sysfs model */
3467 dca_remove_requester(dev
);
3468 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3469 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3470 wr32(E1000_DCA_CTRL
, 1);
3478 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3483 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3486 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3488 #endif /* CONFIG_IGB_DCA */
3491 * igb_intr_msi - Interrupt Handler
3492 * @irq: interrupt number
3493 * @data: pointer to a network interface device structure
3495 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
3497 struct net_device
*netdev
= data
;
3498 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3499 struct e1000_hw
*hw
= &adapter
->hw
;
3500 /* read ICR disables interrupts using IAM */
3501 u32 icr
= rd32(E1000_ICR
);
3503 igb_write_itr(adapter
->rx_ring
);
3505 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3506 hw
->mac
.get_link_status
= 1;
3507 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3508 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3511 napi_schedule(&adapter
->rx_ring
[0].napi
);
3517 * igb_intr - Interrupt Handler
3518 * @irq: interrupt number
3519 * @data: pointer to a network interface device structure
3521 static irqreturn_t
igb_intr(int irq
, void *data
)
3523 struct net_device
*netdev
= data
;
3524 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3525 struct e1000_hw
*hw
= &adapter
->hw
;
3526 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3527 * need for the IMC write */
3528 u32 icr
= rd32(E1000_ICR
);
3531 return IRQ_NONE
; /* Not our interrupt */
3533 igb_write_itr(adapter
->rx_ring
);
3535 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3536 * not set, then the adapter didn't send an interrupt */
3537 if (!(icr
& E1000_ICR_INT_ASSERTED
))
3540 eicr
= rd32(E1000_EICR
);
3542 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3543 hw
->mac
.get_link_status
= 1;
3544 /* guard against interrupt when we're going down */
3545 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3546 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3549 napi_schedule(&adapter
->rx_ring
[0].napi
);
3555 * igb_poll - NAPI Rx polling callback
3556 * @napi: napi polling structure
3557 * @budget: count of how many packets we should handle
3559 static int igb_poll(struct napi_struct
*napi
, int budget
)
3561 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3562 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3563 struct net_device
*netdev
= adapter
->netdev
;
3564 int tx_clean_complete
, work_done
= 0;
3566 /* this poll routine only supports one tx and one rx queue */
3567 #ifdef CONFIG_IGB_DCA
3568 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3569 igb_update_tx_dca(&adapter
->tx_ring
[0]);
3571 tx_clean_complete
= igb_clean_tx_irq(&adapter
->tx_ring
[0]);
3573 #ifdef CONFIG_IGB_DCA
3574 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3575 igb_update_rx_dca(&adapter
->rx_ring
[0]);
3577 igb_clean_rx_irq_adv(&adapter
->rx_ring
[0], &work_done
, budget
);
3579 /* If no Tx and not enough Rx work done, exit the polling mode */
3580 if ((tx_clean_complete
&& (work_done
< budget
)) ||
3581 !netif_running(netdev
)) {
3582 if (adapter
->itr_setting
& 3)
3583 igb_set_itr(adapter
);
3584 napi_complete(napi
);
3585 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3586 igb_irq_enable(adapter
);
3593 static int igb_clean_rx_ring_msix(struct napi_struct
*napi
, int budget
)
3595 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3596 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3597 struct e1000_hw
*hw
= &adapter
->hw
;
3598 struct net_device
*netdev
= adapter
->netdev
;
3601 #ifdef CONFIG_IGB_DCA
3602 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3603 igb_update_rx_dca(rx_ring
);
3605 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
3608 /* If not enough Rx work done, exit the polling mode */
3609 if ((work_done
== 0) || !netif_running(netdev
)) {
3610 napi_complete(napi
);
3612 if (adapter
->itr_setting
& 3) {
3613 if (adapter
->num_rx_queues
== 1)
3614 igb_set_itr(adapter
);
3616 igb_update_ring_itr(rx_ring
);
3619 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3620 wr32(E1000_EIMS
, rx_ring
->eims_value
);
3629 * igb_clean_tx_irq - Reclaim resources after transmit completes
3630 * @adapter: board private structure
3631 * returns true if ring is completely cleaned
3633 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
3635 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3636 struct net_device
*netdev
= adapter
->netdev
;
3637 struct e1000_hw
*hw
= &adapter
->hw
;
3638 struct igb_buffer
*buffer_info
;
3639 struct sk_buff
*skb
;
3640 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
3641 unsigned int total_bytes
= 0, total_packets
= 0;
3642 unsigned int i
, eop
, count
= 0;
3643 bool cleaned
= false;
3645 i
= tx_ring
->next_to_clean
;
3646 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3647 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3649 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
3650 (count
< tx_ring
->count
)) {
3651 for (cleaned
= false; !cleaned
; count
++) {
3652 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3653 buffer_info
= &tx_ring
->buffer_info
[i
];
3654 cleaned
= (i
== eop
);
3655 skb
= buffer_info
->skb
;
3658 unsigned int segs
, bytecount
;
3659 /* gso_segs is currently only valid for tcp */
3660 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
3661 /* multiply data chunks by size of headers */
3662 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
3664 total_packets
+= segs
;
3665 total_bytes
+= bytecount
;
3668 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
3669 tx_desc
->wb
.status
= 0;
3672 if (i
== tx_ring
->count
)
3676 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3677 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3680 tx_ring
->next_to_clean
= i
;
3682 if (unlikely(count
&&
3683 netif_carrier_ok(netdev
) &&
3684 IGB_DESC_UNUSED(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
3685 /* Make sure that anybody stopping the queue after this
3686 * sees the new next_to_clean.
3689 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
3690 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
3691 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3692 ++adapter
->restart_queue
;
3696 if (tx_ring
->detect_tx_hung
) {
3697 /* Detect a transmit hang in hardware, this serializes the
3698 * check with the clearing of time_stamp and movement of i */
3699 tx_ring
->detect_tx_hung
= false;
3700 if (tx_ring
->buffer_info
[i
].time_stamp
&&
3701 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
3702 (adapter
->tx_timeout_factor
* HZ
))
3703 && !(rd32(E1000_STATUS
) &
3704 E1000_STATUS_TXOFF
)) {
3706 /* detected Tx unit hang */
3707 dev_err(&adapter
->pdev
->dev
,
3708 "Detected Tx Unit Hang\n"
3712 " next_to_use <%x>\n"
3713 " next_to_clean <%x>\n"
3714 "buffer_info[next_to_clean]\n"
3715 " time_stamp <%lx>\n"
3716 " next_to_watch <%x>\n"
3718 " desc.status <%x>\n",
3719 tx_ring
->queue_index
,
3720 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
3721 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
3722 tx_ring
->next_to_use
,
3723 tx_ring
->next_to_clean
,
3724 tx_ring
->buffer_info
[i
].time_stamp
,
3727 eop_desc
->wb
.status
);
3728 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3731 tx_ring
->total_bytes
+= total_bytes
;
3732 tx_ring
->total_packets
+= total_packets
;
3733 tx_ring
->tx_stats
.bytes
+= total_bytes
;
3734 tx_ring
->tx_stats
.packets
+= total_packets
;
3735 adapter
->net_stats
.tx_bytes
+= total_bytes
;
3736 adapter
->net_stats
.tx_packets
+= total_packets
;
3737 return (count
< tx_ring
->count
);
3741 * igb_receive_skb - helper function to handle rx indications
3742 * @ring: pointer to receive ring receving this packet
3743 * @status: descriptor status field as written by hardware
3744 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3745 * @skb: pointer to sk_buff to be indicated to stack
3747 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
3748 union e1000_adv_rx_desc
* rx_desc
,
3749 struct sk_buff
*skb
)
3751 struct igb_adapter
* adapter
= ring
->adapter
;
3752 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
3754 skb_record_rx_queue(skb
, ring
->queue_index
);
3755 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
3757 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
3758 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
3761 napi_gro_receive(&ring
->napi
, skb
);
3764 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
3765 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
3767 netif_receive_skb(skb
);
3772 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
3773 u32 status_err
, struct sk_buff
*skb
)
3775 skb
->ip_summed
= CHECKSUM_NONE
;
3777 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3778 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
3780 /* TCP/UDP checksum error bit is set */
3782 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
3783 /* let the stack verify checksum errors */
3784 adapter
->hw_csum_err
++;
3787 /* It must be a TCP or UDP packet with a valid checksum */
3788 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
3789 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
3791 adapter
->hw_csum_good
++;
3794 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
3795 int *work_done
, int budget
)
3797 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3798 struct net_device
*netdev
= adapter
->netdev
;
3799 struct pci_dev
*pdev
= adapter
->pdev
;
3800 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
3801 struct igb_buffer
*buffer_info
, *next_buffer
;
3802 struct sk_buff
*skb
;
3804 u32 length
, hlen
, staterr
;
3805 bool cleaned
= false;
3806 int cleaned_count
= 0;
3807 unsigned int total_bytes
= 0, total_packets
= 0;
3809 i
= rx_ring
->next_to_clean
;
3810 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3811 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3813 while (staterr
& E1000_RXD_STAT_DD
) {
3814 if (*work_done
>= budget
)
3817 buffer_info
= &rx_ring
->buffer_info
[i
];
3819 /* HW will not DMA in data larger than the given buffer, even
3820 * if it parses the (NFS, of course) header to be larger. In
3821 * that case, it fills the header buffer and spills the rest
3824 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
3825 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
3826 if (hlen
> adapter
->rx_ps_hdr_size
)
3827 hlen
= adapter
->rx_ps_hdr_size
;
3829 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
3833 skb
= buffer_info
->skb
;
3834 prefetch(skb
->data
- NET_IP_ALIGN
);
3835 buffer_info
->skb
= NULL
;
3836 if (!adapter
->rx_ps_hdr_size
) {
3837 pci_unmap_single(pdev
, buffer_info
->dma
,
3838 adapter
->rx_buffer_len
+
3840 PCI_DMA_FROMDEVICE
);
3841 skb_put(skb
, length
);
3845 if (!skb_shinfo(skb
)->nr_frags
) {
3846 pci_unmap_single(pdev
, buffer_info
->dma
,
3847 adapter
->rx_ps_hdr_size
+
3849 PCI_DMA_FROMDEVICE
);
3854 pci_unmap_page(pdev
, buffer_info
->page_dma
,
3855 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
3856 buffer_info
->page_dma
= 0;
3858 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
3860 buffer_info
->page_offset
,
3863 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
3864 (page_count(buffer_info
->page
) != 1))
3865 buffer_info
->page
= NULL
;
3867 get_page(buffer_info
->page
);
3870 skb
->data_len
+= length
;
3872 skb
->truesize
+= length
;
3876 if (i
== rx_ring
->count
)
3878 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3880 next_buffer
= &rx_ring
->buffer_info
[i
];
3882 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
3883 buffer_info
->skb
= next_buffer
->skb
;
3884 buffer_info
->dma
= next_buffer
->dma
;
3885 next_buffer
->skb
= skb
;
3886 next_buffer
->dma
= 0;
3890 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
3891 dev_kfree_skb_irq(skb
);
3895 total_bytes
+= skb
->len
;
3898 igb_rx_checksum_adv(adapter
, staterr
, skb
);
3900 skb
->protocol
= eth_type_trans(skb
, netdev
);
3902 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
3905 rx_desc
->wb
.upper
.status_error
= 0;
3907 /* return some buffers to hardware, one at a time is too slow */
3908 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
3909 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
3913 /* use prefetched values */
3915 buffer_info
= next_buffer
;
3917 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3920 rx_ring
->next_to_clean
= i
;
3921 cleaned_count
= IGB_DESC_UNUSED(rx_ring
);
3924 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
3926 rx_ring
->total_packets
+= total_packets
;
3927 rx_ring
->total_bytes
+= total_bytes
;
3928 rx_ring
->rx_stats
.packets
+= total_packets
;
3929 rx_ring
->rx_stats
.bytes
+= total_bytes
;
3930 adapter
->net_stats
.rx_bytes
+= total_bytes
;
3931 adapter
->net_stats
.rx_packets
+= total_packets
;
3937 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3938 * @adapter: address of board private structure
3940 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
3943 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3944 struct net_device
*netdev
= adapter
->netdev
;
3945 struct pci_dev
*pdev
= adapter
->pdev
;
3946 union e1000_adv_rx_desc
*rx_desc
;
3947 struct igb_buffer
*buffer_info
;
3948 struct sk_buff
*skb
;
3951 i
= rx_ring
->next_to_use
;
3952 buffer_info
= &rx_ring
->buffer_info
[i
];
3954 while (cleaned_count
--) {
3955 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3957 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
3958 if (!buffer_info
->page
) {
3959 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
3960 if (!buffer_info
->page
) {
3961 adapter
->alloc_rx_buff_failed
++;
3964 buffer_info
->page_offset
= 0;
3966 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
3968 buffer_info
->page_dma
=
3971 buffer_info
->page_offset
,
3973 PCI_DMA_FROMDEVICE
);
3976 if (!buffer_info
->skb
) {
3979 if (adapter
->rx_ps_hdr_size
)
3980 bufsz
= adapter
->rx_ps_hdr_size
;
3982 bufsz
= adapter
->rx_buffer_len
;
3983 bufsz
+= NET_IP_ALIGN
;
3984 skb
= netdev_alloc_skb(netdev
, bufsz
);
3987 adapter
->alloc_rx_buff_failed
++;
3991 /* Make buffer alignment 2 beyond a 16 byte boundary
3992 * this will result in a 16 byte aligned IP header after
3993 * the 14 byte MAC header is removed
3995 skb_reserve(skb
, NET_IP_ALIGN
);
3997 buffer_info
->skb
= skb
;
3998 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4000 PCI_DMA_FROMDEVICE
);
4003 /* Refresh the desc even if buffer_addrs didn't change because
4004 * each write-back erases this info. */
4005 if (adapter
->rx_ps_hdr_size
) {
4006 rx_desc
->read
.pkt_addr
=
4007 cpu_to_le64(buffer_info
->page_dma
);
4008 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4010 rx_desc
->read
.pkt_addr
=
4011 cpu_to_le64(buffer_info
->dma
);
4012 rx_desc
->read
.hdr_addr
= 0;
4016 if (i
== rx_ring
->count
)
4018 buffer_info
= &rx_ring
->buffer_info
[i
];
4022 if (rx_ring
->next_to_use
!= i
) {
4023 rx_ring
->next_to_use
= i
;
4025 i
= (rx_ring
->count
- 1);
4029 /* Force memory writes to complete before letting h/w
4030 * know there are new descriptors to fetch. (Only
4031 * applicable for weak-ordered memory model archs,
4032 * such as IA-64). */
4034 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4044 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4046 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4047 struct mii_ioctl_data
*data
= if_mii(ifr
);
4049 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4054 data
->phy_id
= adapter
->hw
.phy
.addr
;
4057 if (!capable(CAP_NET_ADMIN
))
4059 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4076 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4082 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4088 static void igb_vlan_rx_register(struct net_device
*netdev
,
4089 struct vlan_group
*grp
)
4091 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4092 struct e1000_hw
*hw
= &adapter
->hw
;
4095 igb_irq_disable(adapter
);
4096 adapter
->vlgrp
= grp
;
4099 /* enable VLAN tag insert/strip */
4100 ctrl
= rd32(E1000_CTRL
);
4101 ctrl
|= E1000_CTRL_VME
;
4102 wr32(E1000_CTRL
, ctrl
);
4104 /* enable VLAN receive filtering */
4105 rctl
= rd32(E1000_RCTL
);
4106 rctl
&= ~E1000_RCTL_CFIEN
;
4107 wr32(E1000_RCTL
, rctl
);
4108 igb_update_mng_vlan(adapter
);
4110 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
4112 /* disable VLAN tag insert/strip */
4113 ctrl
= rd32(E1000_CTRL
);
4114 ctrl
&= ~E1000_CTRL_VME
;
4115 wr32(E1000_CTRL
, ctrl
);
4117 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4118 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4119 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4122 adapter
->max_frame_size
);
4125 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4126 igb_irq_enable(adapter
);
4129 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4131 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4132 struct e1000_hw
*hw
= &adapter
->hw
;
4135 if ((adapter
->hw
.mng_cookie
.status
&
4136 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4137 (vid
== adapter
->mng_vlan_id
))
4139 /* add VID to filter table */
4140 index
= (vid
>> 5) & 0x7F;
4141 vfta
= array_rd32(E1000_VFTA
, index
);
4142 vfta
|= (1 << (vid
& 0x1F));
4143 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4146 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4148 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4149 struct e1000_hw
*hw
= &adapter
->hw
;
4152 igb_irq_disable(adapter
);
4153 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4155 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4156 igb_irq_enable(adapter
);
4158 if ((adapter
->hw
.mng_cookie
.status
&
4159 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4160 (vid
== adapter
->mng_vlan_id
)) {
4161 /* release control to f/w */
4162 igb_release_hw_control(adapter
);
4166 /* remove VID from filter table */
4167 index
= (vid
>> 5) & 0x7F;
4168 vfta
= array_rd32(E1000_VFTA
, index
);
4169 vfta
&= ~(1 << (vid
& 0x1F));
4170 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4173 static void igb_restore_vlan(struct igb_adapter
*adapter
)
4175 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
4177 if (adapter
->vlgrp
) {
4179 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
4180 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
4182 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
4187 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
4189 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
4193 /* Fiber NICs only allow 1000 gbps Full duplex */
4194 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
4195 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
4196 dev_err(&adapter
->pdev
->dev
,
4197 "Unsupported Speed/Duplex configuration\n");
4202 case SPEED_10
+ DUPLEX_HALF
:
4203 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
4205 case SPEED_10
+ DUPLEX_FULL
:
4206 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
4208 case SPEED_100
+ DUPLEX_HALF
:
4209 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
4211 case SPEED_100
+ DUPLEX_FULL
:
4212 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
4214 case SPEED_1000
+ DUPLEX_FULL
:
4216 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
4218 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
4220 dev_err(&adapter
->pdev
->dev
,
4221 "Unsupported Speed/Duplex configuration\n");
4228 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4230 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4231 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4232 struct e1000_hw
*hw
= &adapter
->hw
;
4233 u32 ctrl
, rctl
, status
;
4234 u32 wufc
= adapter
->wol
;
4239 netif_device_detach(netdev
);
4241 if (netif_running(netdev
))
4244 igb_reset_interrupt_capability(adapter
);
4246 igb_free_queues(adapter
);
4249 retval
= pci_save_state(pdev
);
4254 status
= rd32(E1000_STATUS
);
4255 if (status
& E1000_STATUS_LU
)
4256 wufc
&= ~E1000_WUFC_LNKC
;
4259 igb_setup_rctl(adapter
);
4260 igb_set_multi(netdev
);
4262 /* turn on all-multi mode if wake on multicast is enabled */
4263 if (wufc
& E1000_WUFC_MC
) {
4264 rctl
= rd32(E1000_RCTL
);
4265 rctl
|= E1000_RCTL_MPE
;
4266 wr32(E1000_RCTL
, rctl
);
4269 ctrl
= rd32(E1000_CTRL
);
4270 /* advertise wake from D3Cold */
4271 #define E1000_CTRL_ADVD3WUC 0x00100000
4272 /* phy power management enable */
4273 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4274 ctrl
|= E1000_CTRL_ADVD3WUC
;
4275 wr32(E1000_CTRL
, ctrl
);
4277 /* Allow time for pending master requests to run */
4278 igb_disable_pcie_master(&adapter
->hw
);
4280 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
4281 wr32(E1000_WUFC
, wufc
);
4284 wr32(E1000_WUFC
, 0);
4287 /* make sure adapter isn't asleep if manageability/wol is enabled */
4288 if (wufc
|| adapter
->en_mng_pt
) {
4289 pci_enable_wake(pdev
, PCI_D3hot
, 1);
4290 pci_enable_wake(pdev
, PCI_D3cold
, 1);
4292 igb_shutdown_fiber_serdes_link_82575(hw
);
4293 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4294 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4297 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4298 * would have already happened in close and is redundant. */
4299 igb_release_hw_control(adapter
);
4301 pci_disable_device(pdev
);
4303 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
4309 static int igb_resume(struct pci_dev
*pdev
)
4311 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4312 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4313 struct e1000_hw
*hw
= &adapter
->hw
;
4316 pci_set_power_state(pdev
, PCI_D0
);
4317 pci_restore_state(pdev
);
4319 if (adapter
->need_ioport
)
4320 err
= pci_enable_device(pdev
);
4322 err
= pci_enable_device_mem(pdev
);
4325 "igb: Cannot enable PCI device from suspend\n");
4328 pci_set_master(pdev
);
4330 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4331 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4333 igb_set_interrupt_capability(adapter
);
4335 if (igb_alloc_queues(adapter
)) {
4336 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
4340 /* e1000_power_up_phy(adapter); */
4343 wr32(E1000_WUS
, ~0);
4345 if (netif_running(netdev
)) {
4346 err
= igb_open(netdev
);
4351 netif_device_attach(netdev
);
4353 /* let the f/w know that the h/w is now under the control of the
4355 igb_get_hw_control(adapter
);
4361 static void igb_shutdown(struct pci_dev
*pdev
)
4363 igb_suspend(pdev
, PMSG_SUSPEND
);
4366 #ifdef CONFIG_NET_POLL_CONTROLLER
4368 * Polling 'interrupt' - used by things like netconsole to send skbs
4369 * without having to re-enable interrupts. It's not called while
4370 * the interrupt routine is executing.
4372 static void igb_netpoll(struct net_device
*netdev
)
4374 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4378 igb_irq_disable(adapter
);
4379 adapter
->flags
|= IGB_FLAG_IN_NETPOLL
;
4381 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4382 igb_clean_tx_irq(&adapter
->tx_ring
[i
]);
4384 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4385 igb_clean_rx_irq_adv(&adapter
->rx_ring
[i
],
4387 adapter
->rx_ring
[i
].napi
.weight
);
4389 adapter
->flags
&= ~IGB_FLAG_IN_NETPOLL
;
4390 igb_irq_enable(adapter
);
4392 #endif /* CONFIG_NET_POLL_CONTROLLER */
4395 * igb_io_error_detected - called when PCI error is detected
4396 * @pdev: Pointer to PCI device
4397 * @state: The current pci connection state
4399 * This function is called after a PCI bus error affecting
4400 * this device has been detected.
4402 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
4403 pci_channel_state_t state
)
4405 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4406 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4408 netif_device_detach(netdev
);
4410 if (netif_running(netdev
))
4412 pci_disable_device(pdev
);
4414 /* Request a slot slot reset. */
4415 return PCI_ERS_RESULT_NEED_RESET
;
4419 * igb_io_slot_reset - called after the pci bus has been reset.
4420 * @pdev: Pointer to PCI device
4422 * Restart the card from scratch, as if from a cold-boot. Implementation
4423 * resembles the first-half of the igb_resume routine.
4425 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
4427 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4428 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4429 struct e1000_hw
*hw
= &adapter
->hw
;
4430 pci_ers_result_t result
;
4433 if (adapter
->need_ioport
)
4434 err
= pci_enable_device(pdev
);
4436 err
= pci_enable_device_mem(pdev
);
4440 "Cannot re-enable PCI device after reset.\n");
4441 result
= PCI_ERS_RESULT_DISCONNECT
;
4443 pci_set_master(pdev
);
4444 pci_restore_state(pdev
);
4446 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4447 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4450 wr32(E1000_WUS
, ~0);
4451 result
= PCI_ERS_RESULT_RECOVERED
;
4454 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4456 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
4457 "failed 0x%0x\n", err
);
4458 /* non-fatal, continue */
4465 * igb_io_resume - called when traffic can start flowing again.
4466 * @pdev: Pointer to PCI device
4468 * This callback is called when the error recovery driver tells us that
4469 * its OK to resume normal operation. Implementation resembles the
4470 * second-half of the igb_resume routine.
4472 static void igb_io_resume(struct pci_dev
*pdev
)
4474 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4475 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4477 if (netif_running(netdev
)) {
4478 if (igb_up(adapter
)) {
4479 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
4484 netif_device_attach(netdev
);
4486 /* let the f/w know that the h/w is now under the control of the
4488 igb_get_hw_control(adapter
);