1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
45 #include <linux/aer.h>
47 #include <linux/dca.h>
51 #define DRV_VERSION "1.3.16-k2"
52 char igb_driver_name
[] = "igb";
53 char igb_driver_version
[] = DRV_VERSION
;
54 static const char igb_driver_string
[] =
55 "Intel(R) Gigabit Ethernet Network Driver";
56 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
58 static const struct e1000_info
*igb_info_tbl
[] = {
59 [board_82575
] = &e1000_82575_info
,
62 static struct pci_device_id igb_pci_tbl
[] = {
63 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
69 /* required last entry */
73 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
75 void igb_reset(struct igb_adapter
*);
76 static int igb_setup_all_tx_resources(struct igb_adapter
*);
77 static int igb_setup_all_rx_resources(struct igb_adapter
*);
78 static void igb_free_all_tx_resources(struct igb_adapter
*);
79 static void igb_free_all_rx_resources(struct igb_adapter
*);
80 void igb_update_stats(struct igb_adapter
*);
81 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
82 static void __devexit
igb_remove(struct pci_dev
*pdev
);
83 static int igb_sw_init(struct igb_adapter
*);
84 static int igb_open(struct net_device
*);
85 static int igb_close(struct net_device
*);
86 static void igb_configure_tx(struct igb_adapter
*);
87 static void igb_configure_rx(struct igb_adapter
*);
88 static void igb_setup_rctl(struct igb_adapter
*);
89 static void igb_clean_all_tx_rings(struct igb_adapter
*);
90 static void igb_clean_all_rx_rings(struct igb_adapter
*);
91 static void igb_clean_tx_ring(struct igb_ring
*);
92 static void igb_clean_rx_ring(struct igb_ring
*);
93 static void igb_set_multi(struct net_device
*);
94 static void igb_update_phy_info(unsigned long);
95 static void igb_watchdog(unsigned long);
96 static void igb_watchdog_task(struct work_struct
*);
97 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
99 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
100 static struct net_device_stats
*igb_get_stats(struct net_device
*);
101 static int igb_change_mtu(struct net_device
*, int);
102 static int igb_set_mac(struct net_device
*, void *);
103 static irqreturn_t
igb_intr(int irq
, void *);
104 static irqreturn_t
igb_intr_msi(int irq
, void *);
105 static irqreturn_t
igb_msix_other(int irq
, void *);
106 static irqreturn_t
igb_msix_rx(int irq
, void *);
107 static irqreturn_t
igb_msix_tx(int irq
, void *);
108 static int igb_clean_rx_ring_msix(struct napi_struct
*, int);
109 #ifdef CONFIG_IGB_DCA
110 static void igb_update_rx_dca(struct igb_ring
*);
111 static void igb_update_tx_dca(struct igb_ring
*);
112 static void igb_setup_dca(struct igb_adapter
*);
113 #endif /* CONFIG_IGB_DCA */
114 static bool igb_clean_tx_irq(struct igb_ring
*);
115 static int igb_poll(struct napi_struct
*, int);
116 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
117 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
118 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
119 static void igb_tx_timeout(struct net_device
*);
120 static void igb_reset_task(struct work_struct
*);
121 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
122 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
123 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
124 static void igb_restore_vlan(struct igb_adapter
*);
126 static int igb_suspend(struct pci_dev
*, pm_message_t
);
128 static int igb_resume(struct pci_dev
*);
130 static void igb_shutdown(struct pci_dev
*);
131 #ifdef CONFIG_IGB_DCA
132 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
133 static struct notifier_block dca_notifier
= {
134 .notifier_call
= igb_notify_dca
,
140 #ifdef CONFIG_NET_POLL_CONTROLLER
141 /* for netdump / net console */
142 static void igb_netpoll(struct net_device
*);
145 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
146 pci_channel_state_t
);
147 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
148 static void igb_io_resume(struct pci_dev
*);
150 static struct pci_error_handlers igb_err_handler
= {
151 .error_detected
= igb_io_error_detected
,
152 .slot_reset
= igb_io_slot_reset
,
153 .resume
= igb_io_resume
,
157 static struct pci_driver igb_driver
= {
158 .name
= igb_driver_name
,
159 .id_table
= igb_pci_tbl
,
161 .remove
= __devexit_p(igb_remove
),
163 /* Power Managment Hooks */
164 .suspend
= igb_suspend
,
165 .resume
= igb_resume
,
167 .shutdown
= igb_shutdown
,
168 .err_handler
= &igb_err_handler
171 static int global_quad_port_a
; /* global quad port a indication */
173 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
174 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION
);
180 * igb_get_hw_dev_name - return device name string
181 * used by hardware layer to print debugging information
183 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
185 struct igb_adapter
*adapter
= hw
->back
;
186 return adapter
->netdev
->name
;
191 * igb_init_module - Driver Registration Routine
193 * igb_init_module is the first routine called when the driver is
194 * loaded. All it does is register with the PCI subsystem.
196 static int __init
igb_init_module(void)
199 printk(KERN_INFO
"%s - version %s\n",
200 igb_driver_string
, igb_driver_version
);
202 printk(KERN_INFO
"%s\n", igb_copyright
);
204 global_quad_port_a
= 0;
206 #ifdef CONFIG_IGB_DCA
207 dca_register_notify(&dca_notifier
);
210 ret
= pci_register_driver(&igb_driver
);
214 module_init(igb_init_module
);
217 * igb_exit_module - Driver Exit Cleanup Routine
219 * igb_exit_module is called just before the driver is removed
222 static void __exit
igb_exit_module(void)
224 #ifdef CONFIG_IGB_DCA
225 dca_unregister_notify(&dca_notifier
);
227 pci_unregister_driver(&igb_driver
);
230 module_exit(igb_exit_module
);
232 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
234 * igb_cache_ring_register - Descriptor ring to register mapping
235 * @adapter: board private structure to initialize
237 * Once we know the feature-set enabled for the device, we'll cache
238 * the register offset the descriptor ring is assigned to.
240 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
244 switch (adapter
->hw
.mac
.type
) {
246 /* The queues are allocated for virtualization such that VF 0
247 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
248 * In order to avoid collision we start at the first free queue
249 * and continue consuming queues in the same sequence
251 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
252 adapter
->rx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
253 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
254 adapter
->tx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
258 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
259 adapter
->rx_ring
[i
].reg_idx
= i
;
260 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
261 adapter
->tx_ring
[i
].reg_idx
= i
;
267 * igb_alloc_queues - Allocate memory for all rings
268 * @adapter: board private structure to initialize
270 * We allocate one ring per queue at run-time since we don't know the
271 * number of queues at compile-time.
273 static int igb_alloc_queues(struct igb_adapter
*adapter
)
277 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
278 sizeof(struct igb_ring
), GFP_KERNEL
);
279 if (!adapter
->tx_ring
)
282 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
283 sizeof(struct igb_ring
), GFP_KERNEL
);
284 if (!adapter
->rx_ring
) {
285 kfree(adapter
->tx_ring
);
289 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
291 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
292 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
293 ring
->count
= adapter
->tx_ring_count
;
294 ring
->adapter
= adapter
;
295 ring
->queue_index
= i
;
297 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
298 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
299 ring
->count
= adapter
->rx_ring_count
;
300 ring
->adapter
= adapter
;
301 ring
->queue_index
= i
;
302 ring
->itr_register
= E1000_ITR
;
304 /* set a default napi handler for each rx_ring */
305 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
308 igb_cache_ring_register(adapter
);
312 static void igb_free_queues(struct igb_adapter
*adapter
)
316 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
317 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
319 kfree(adapter
->tx_ring
);
320 kfree(adapter
->rx_ring
);
323 #define IGB_N0_QUEUE -1
324 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
325 int tx_queue
, int msix_vector
)
328 struct e1000_hw
*hw
= &adapter
->hw
;
331 switch (hw
->mac
.type
) {
333 /* The 82575 assigns vectors using a bitmask, which matches the
334 bitmask for the EICR/EIMS/EIMC registers. To assign one
335 or more queues to a vector, we write the appropriate bits
336 into the MSIXBM register for that vector. */
337 if (rx_queue
> IGB_N0_QUEUE
) {
338 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
339 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
341 if (tx_queue
> IGB_N0_QUEUE
) {
342 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
343 adapter
->tx_ring
[tx_queue
].eims_value
=
344 E1000_EICR_TX_QUEUE0
<< tx_queue
;
346 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
349 /* 82576 uses a table-based method for assigning vectors.
350 Each queue has a single entry in the table to which we write
351 a vector number along with a "valid" bit. Sadly, the layout
352 of the table is somewhat counterintuitive. */
353 if (rx_queue
> IGB_N0_QUEUE
) {
354 index
= (rx_queue
>> 1);
355 ivar
= array_rd32(E1000_IVAR0
, index
);
356 if (rx_queue
& 0x1) {
357 /* vector goes into third byte of register */
358 ivar
= ivar
& 0xFF00FFFF;
359 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
361 /* vector goes into low byte of register */
362 ivar
= ivar
& 0xFFFFFF00;
363 ivar
|= msix_vector
| E1000_IVAR_VALID
;
365 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
366 array_wr32(E1000_IVAR0
, index
, ivar
);
368 if (tx_queue
> IGB_N0_QUEUE
) {
369 index
= (tx_queue
>> 1);
370 ivar
= array_rd32(E1000_IVAR0
, index
);
371 if (tx_queue
& 0x1) {
372 /* vector goes into high byte of register */
373 ivar
= ivar
& 0x00FFFFFF;
374 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
376 /* vector goes into second byte of register */
377 ivar
= ivar
& 0xFFFF00FF;
378 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
380 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
381 array_wr32(E1000_IVAR0
, index
, ivar
);
391 * igb_configure_msix - Configure MSI-X hardware
393 * igb_configure_msix sets up the hardware to properly
394 * generate MSI-X interrupts.
396 static void igb_configure_msix(struct igb_adapter
*adapter
)
400 struct e1000_hw
*hw
= &adapter
->hw
;
402 adapter
->eims_enable_mask
= 0;
403 if (hw
->mac
.type
== e1000_82576
)
404 /* Turn on MSI-X capability first, or our settings
405 * won't stick. And it will take days to debug. */
406 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
407 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
410 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
411 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
412 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
413 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
414 if (tx_ring
->itr_val
)
415 writel(tx_ring
->itr_val
,
416 hw
->hw_addr
+ tx_ring
->itr_register
);
418 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
421 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
422 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
423 rx_ring
->buddy
= NULL
;
424 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
425 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
426 if (rx_ring
->itr_val
)
427 writel(rx_ring
->itr_val
,
428 hw
->hw_addr
+ rx_ring
->itr_register
);
430 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
434 /* set vector for other causes, i.e. link changes */
435 switch (hw
->mac
.type
) {
437 array_wr32(E1000_MSIXBM(0), vector
++,
440 tmp
= rd32(E1000_CTRL_EXT
);
441 /* enable MSI-X PBA support*/
442 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
444 /* Auto-Mask interrupts upon ICR read. */
445 tmp
|= E1000_CTRL_EXT_EIAME
;
446 tmp
|= E1000_CTRL_EXT_IRCA
;
448 wr32(E1000_CTRL_EXT
, tmp
);
449 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
450 adapter
->eims_other
= E1000_EIMS_OTHER
;
455 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
456 wr32(E1000_IVAR_MISC
, tmp
);
458 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
459 adapter
->eims_other
= 1 << (vector
- 1);
462 /* do nothing, since nothing else supports MSI-X */
464 } /* switch (hw->mac.type) */
469 * igb_request_msix - Initialize MSI-X interrupts
471 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
474 static int igb_request_msix(struct igb_adapter
*adapter
)
476 struct net_device
*netdev
= adapter
->netdev
;
477 int i
, err
= 0, vector
= 0;
481 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
482 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
483 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
484 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
485 &igb_msix_tx
, 0, ring
->name
,
486 &(adapter
->tx_ring
[i
]));
489 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
490 ring
->itr_val
= 976; /* ~4000 ints/sec */
493 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
494 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
495 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
496 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
498 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
499 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
500 &igb_msix_rx
, 0, ring
->name
,
501 &(adapter
->rx_ring
[i
]));
504 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
505 ring
->itr_val
= adapter
->itr
;
506 /* overwrite the poll routine for MSIX, we've already done
508 ring
->napi
.poll
= &igb_clean_rx_ring_msix
;
512 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
513 &igb_msix_other
, 0, netdev
->name
, netdev
);
517 igb_configure_msix(adapter
);
523 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
525 if (adapter
->msix_entries
) {
526 pci_disable_msix(adapter
->pdev
);
527 kfree(adapter
->msix_entries
);
528 adapter
->msix_entries
= NULL
;
529 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
530 pci_disable_msi(adapter
->pdev
);
536 * igb_set_interrupt_capability - set MSI or MSI-X if supported
538 * Attempt to configure interrupts using the best available
539 * capabilities of the hardware and kernel.
541 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
546 /* Number of supported queues. */
547 /* Having more queues than CPUs doesn't make sense. */
548 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
549 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
551 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
552 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
554 if (!adapter
->msix_entries
)
557 for (i
= 0; i
< numvecs
; i
++)
558 adapter
->msix_entries
[i
].entry
= i
;
560 err
= pci_enable_msix(adapter
->pdev
,
561 adapter
->msix_entries
,
566 igb_reset_interrupt_capability(adapter
);
568 /* If we can't do MSI-X, try MSI */
570 adapter
->num_rx_queues
= 1;
571 adapter
->num_tx_queues
= 1;
572 if (!pci_enable_msi(adapter
->pdev
))
573 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
575 /* Notify the stack of the (possibly) reduced Tx Queue count. */
576 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
581 * igb_request_irq - initialize interrupts
583 * Attempts to configure interrupts using the best available
584 * capabilities of the hardware and kernel.
586 static int igb_request_irq(struct igb_adapter
*adapter
)
588 struct net_device
*netdev
= adapter
->netdev
;
589 struct e1000_hw
*hw
= &adapter
->hw
;
592 if (adapter
->msix_entries
) {
593 err
= igb_request_msix(adapter
);
596 /* fall back to MSI */
597 igb_reset_interrupt_capability(adapter
);
598 if (!pci_enable_msi(adapter
->pdev
))
599 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
600 igb_free_all_tx_resources(adapter
);
601 igb_free_all_rx_resources(adapter
);
602 adapter
->num_rx_queues
= 1;
603 igb_alloc_queues(adapter
);
605 switch (hw
->mac
.type
) {
607 wr32(E1000_MSIXBM(0),
608 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
611 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
618 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
619 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
620 netdev
->name
, netdev
);
623 /* fall back to legacy interrupts */
624 igb_reset_interrupt_capability(adapter
);
625 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
628 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
629 netdev
->name
, netdev
);
632 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
639 static void igb_free_irq(struct igb_adapter
*adapter
)
641 struct net_device
*netdev
= adapter
->netdev
;
643 if (adapter
->msix_entries
) {
646 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
647 free_irq(adapter
->msix_entries
[vector
++].vector
,
648 &(adapter
->tx_ring
[i
]));
649 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
650 free_irq(adapter
->msix_entries
[vector
++].vector
,
651 &(adapter
->rx_ring
[i
]));
653 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
657 free_irq(adapter
->pdev
->irq
, netdev
);
661 * igb_irq_disable - Mask off interrupt generation on the NIC
662 * @adapter: board private structure
664 static void igb_irq_disable(struct igb_adapter
*adapter
)
666 struct e1000_hw
*hw
= &adapter
->hw
;
668 if (adapter
->msix_entries
) {
670 wr32(E1000_EIMC
, ~0);
677 synchronize_irq(adapter
->pdev
->irq
);
681 * igb_irq_enable - Enable default interrupt generation settings
682 * @adapter: board private structure
684 static void igb_irq_enable(struct igb_adapter
*adapter
)
686 struct e1000_hw
*hw
= &adapter
->hw
;
688 if (adapter
->msix_entries
) {
689 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
690 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
691 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
692 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
);
694 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
695 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
699 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
701 struct net_device
*netdev
= adapter
->netdev
;
702 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
703 u16 old_vid
= adapter
->mng_vlan_id
;
704 if (adapter
->vlgrp
) {
705 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
706 if (adapter
->hw
.mng_cookie
.status
&
707 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
708 igb_vlan_rx_add_vid(netdev
, vid
);
709 adapter
->mng_vlan_id
= vid
;
711 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
713 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
715 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
716 igb_vlan_rx_kill_vid(netdev
, old_vid
);
718 adapter
->mng_vlan_id
= vid
;
723 * igb_release_hw_control - release control of the h/w to f/w
724 * @adapter: address of board private structure
726 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
727 * For ASF and Pass Through versions of f/w this means that the
728 * driver is no longer loaded.
731 static void igb_release_hw_control(struct igb_adapter
*adapter
)
733 struct e1000_hw
*hw
= &adapter
->hw
;
736 /* Let firmware take over control of h/w */
737 ctrl_ext
= rd32(E1000_CTRL_EXT
);
739 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
744 * igb_get_hw_control - get control of the h/w from f/w
745 * @adapter: address of board private structure
747 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
748 * For ASF and Pass Through versions of f/w this means that
749 * the driver is loaded.
752 static void igb_get_hw_control(struct igb_adapter
*adapter
)
754 struct e1000_hw
*hw
= &adapter
->hw
;
757 /* Let firmware know the driver has taken over */
758 ctrl_ext
= rd32(E1000_CTRL_EXT
);
760 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
764 * igb_configure - configure the hardware for RX and TX
765 * @adapter: private board structure
767 static void igb_configure(struct igb_adapter
*adapter
)
769 struct net_device
*netdev
= adapter
->netdev
;
772 igb_get_hw_control(adapter
);
773 igb_set_multi(netdev
);
775 igb_restore_vlan(adapter
);
777 igb_configure_tx(adapter
);
778 igb_setup_rctl(adapter
);
779 igb_configure_rx(adapter
);
781 igb_rx_fifo_flush_82575(&adapter
->hw
);
783 /* call IGB_DESC_UNUSED which always leaves
784 * at least 1 descriptor unused to make sure
785 * next_to_use != next_to_clean */
786 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
787 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
788 igb_alloc_rx_buffers_adv(ring
, IGB_DESC_UNUSED(ring
));
792 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
797 * igb_up - Open the interface and prepare it to handle traffic
798 * @adapter: board private structure
801 int igb_up(struct igb_adapter
*adapter
)
803 struct e1000_hw
*hw
= &adapter
->hw
;
806 /* hardware has been reset, we need to reload some things */
807 igb_configure(adapter
);
809 clear_bit(__IGB_DOWN
, &adapter
->state
);
811 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
812 napi_enable(&adapter
->rx_ring
[i
].napi
);
813 if (adapter
->msix_entries
)
814 igb_configure_msix(adapter
);
816 /* Clear any pending interrupts. */
818 igb_irq_enable(adapter
);
820 /* Fire a link change interrupt to start the watchdog. */
821 wr32(E1000_ICS
, E1000_ICS_LSC
);
825 void igb_down(struct igb_adapter
*adapter
)
827 struct e1000_hw
*hw
= &adapter
->hw
;
828 struct net_device
*netdev
= adapter
->netdev
;
832 /* signal that we're down so the interrupt handler does not
833 * reschedule our watchdog timer */
834 set_bit(__IGB_DOWN
, &adapter
->state
);
836 /* disable receives in the hardware */
837 rctl
= rd32(E1000_RCTL
);
838 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
839 /* flush and sleep below */
841 netif_tx_stop_all_queues(netdev
);
843 /* disable transmits in the hardware */
844 tctl
= rd32(E1000_TCTL
);
845 tctl
&= ~E1000_TCTL_EN
;
846 wr32(E1000_TCTL
, tctl
);
847 /* flush both disables and wait for them to finish */
851 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
852 napi_disable(&adapter
->rx_ring
[i
].napi
);
854 igb_irq_disable(adapter
);
856 del_timer_sync(&adapter
->watchdog_timer
);
857 del_timer_sync(&adapter
->phy_info_timer
);
859 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
860 netif_carrier_off(netdev
);
862 /* record the stats before reset*/
863 igb_update_stats(adapter
);
865 adapter
->link_speed
= 0;
866 adapter
->link_duplex
= 0;
868 if (!pci_channel_offline(adapter
->pdev
))
870 igb_clean_all_tx_rings(adapter
);
871 igb_clean_all_rx_rings(adapter
);
874 void igb_reinit_locked(struct igb_adapter
*adapter
)
876 WARN_ON(in_interrupt());
877 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
881 clear_bit(__IGB_RESETTING
, &adapter
->state
);
884 void igb_reset(struct igb_adapter
*adapter
)
886 struct e1000_hw
*hw
= &adapter
->hw
;
887 struct e1000_mac_info
*mac
= &hw
->mac
;
888 struct e1000_fc_info
*fc
= &hw
->fc
;
889 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
892 /* Repartition Pba for greater than 9k mtu
893 * To take effect CTRL.RST is required.
905 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
906 (mac
->type
< e1000_82576
)) {
907 /* adjust PBA for jumbo frames */
908 wr32(E1000_PBA
, pba
);
910 /* To maintain wire speed transmits, the Tx FIFO should be
911 * large enough to accommodate two full transmit packets,
912 * rounded up to the next 1KB and expressed in KB. Likewise,
913 * the Rx FIFO should be large enough to accommodate at least
914 * one full receive packet and is similarly rounded up and
915 * expressed in KB. */
916 pba
= rd32(E1000_PBA
);
917 /* upper 16 bits has Tx packet buffer allocation size in KB */
918 tx_space
= pba
>> 16;
919 /* lower 16 bits has Rx packet buffer allocation size in KB */
921 /* the tx fifo also stores 16 bytes of information about the tx
922 * but don't include ethernet FCS because hardware appends it */
923 min_tx_space
= (adapter
->max_frame_size
+
924 sizeof(struct e1000_tx_desc
) -
926 min_tx_space
= ALIGN(min_tx_space
, 1024);
928 /* software strips receive CRC, so leave room for it */
929 min_rx_space
= adapter
->max_frame_size
;
930 min_rx_space
= ALIGN(min_rx_space
, 1024);
933 /* If current Tx allocation is less than the min Tx FIFO size,
934 * and the min Tx FIFO size is less than the current Rx FIFO
935 * allocation, take space away from current Rx allocation */
936 if (tx_space
< min_tx_space
&&
937 ((min_tx_space
- tx_space
) < pba
)) {
938 pba
= pba
- (min_tx_space
- tx_space
);
940 /* if short on rx space, rx wins and must trump tx
942 if (pba
< min_rx_space
)
945 wr32(E1000_PBA
, pba
);
948 /* flow control settings */
949 /* The high water mark must be low enough to fit one full frame
950 * (or the size used for early receive) above it in the Rx FIFO.
951 * Set it to the lower of:
952 * - 90% of the Rx FIFO size, or
953 * - the full Rx FIFO size minus one full frame */
954 hwm
= min(((pba
<< 10) * 9 / 10),
955 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
957 if (mac
->type
< e1000_82576
) {
958 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
959 fc
->low_water
= fc
->high_water
- 8;
961 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
962 fc
->low_water
= fc
->high_water
- 16;
964 fc
->pause_time
= 0xFFFF;
966 fc
->type
= fc
->original_type
;
968 /* Allow time for pending master requests to run */
969 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
972 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
973 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
975 igb_update_mng_vlan(adapter
);
977 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
978 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
980 igb_reset_adaptive(&adapter
->hw
);
981 igb_get_phy_info(&adapter
->hw
);
984 static const struct net_device_ops igb_netdev_ops
= {
985 .ndo_open
= igb_open
,
986 .ndo_stop
= igb_close
,
987 .ndo_start_xmit
= igb_xmit_frame_adv
,
988 .ndo_get_stats
= igb_get_stats
,
989 .ndo_set_multicast_list
= igb_set_multi
,
990 .ndo_set_mac_address
= igb_set_mac
,
991 .ndo_change_mtu
= igb_change_mtu
,
992 .ndo_do_ioctl
= igb_ioctl
,
993 .ndo_tx_timeout
= igb_tx_timeout
,
994 .ndo_validate_addr
= eth_validate_addr
,
995 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
996 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
997 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
998 #ifdef CONFIG_NET_POLL_CONTROLLER
999 .ndo_poll_controller
= igb_netpoll
,
1004 * igb_probe - Device Initialization Routine
1005 * @pdev: PCI device information struct
1006 * @ent: entry in igb_pci_tbl
1008 * Returns 0 on success, negative on failure
1010 * igb_probe initializes an adapter identified by a pci_dev structure.
1011 * The OS initialization, configuring of the adapter private structure,
1012 * and a hardware reset occur.
1014 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1015 const struct pci_device_id
*ent
)
1017 struct net_device
*netdev
;
1018 struct igb_adapter
*adapter
;
1019 struct e1000_hw
*hw
;
1020 struct pci_dev
*us_dev
;
1021 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1022 unsigned long mmio_start
, mmio_len
;
1023 int err
, pci_using_dac
, pos
;
1024 u16 eeprom_data
= 0, state
= 0;
1025 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1028 err
= pci_enable_device_mem(pdev
);
1033 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1035 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1039 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1041 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1043 dev_err(&pdev
->dev
, "No usable DMA "
1044 "configuration, aborting\n");
1050 /* 82575 requires that the pci-e link partner disable the L0s state */
1051 switch (pdev
->device
) {
1052 case E1000_DEV_ID_82575EB_COPPER
:
1053 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1054 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1055 us_dev
= pdev
->bus
->self
;
1056 pos
= pci_find_capability(us_dev
, PCI_CAP_ID_EXP
);
1058 pci_read_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1060 state
&= ~PCIE_LINK_STATE_L0S
;
1061 pci_write_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1063 dev_info(&pdev
->dev
,
1064 "Disabling ASPM L0s upstream switch port %s\n",
1071 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1077 err
= pci_enable_pcie_error_reporting(pdev
);
1079 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1081 /* non-fatal, continue */
1084 pci_set_master(pdev
);
1085 pci_save_state(pdev
);
1088 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
), IGB_MAX_TX_QUEUES
);
1090 goto err_alloc_etherdev
;
1092 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1094 pci_set_drvdata(pdev
, netdev
);
1095 adapter
= netdev_priv(netdev
);
1096 adapter
->netdev
= netdev
;
1097 adapter
->pdev
= pdev
;
1100 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1102 mmio_start
= pci_resource_start(pdev
, 0);
1103 mmio_len
= pci_resource_len(pdev
, 0);
1106 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1110 netdev
->netdev_ops
= &igb_netdev_ops
;
1111 igb_set_ethtool_ops(netdev
);
1112 netdev
->watchdog_timeo
= 5 * HZ
;
1114 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1116 netdev
->mem_start
= mmio_start
;
1117 netdev
->mem_end
= mmio_start
+ mmio_len
;
1119 /* PCI config space info */
1120 hw
->vendor_id
= pdev
->vendor
;
1121 hw
->device_id
= pdev
->device
;
1122 hw
->revision_id
= pdev
->revision
;
1123 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1124 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1126 /* setup the private structure */
1128 /* Copy the default MAC, PHY and NVM function pointers */
1129 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1130 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1131 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1132 /* Initialize skew-specific constants */
1133 err
= ei
->get_invariants(hw
);
1137 /* setup the private structure */
1138 err
= igb_sw_init(adapter
);
1142 igb_get_bus_info_pcie(hw
);
1145 switch (hw
->mac
.type
) {
1147 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1154 hw
->phy
.autoneg_wait_to_complete
= false;
1155 hw
->mac
.adaptive_ifs
= true;
1157 /* Copper options */
1158 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1159 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1160 hw
->phy
.disable_polarity_correction
= false;
1161 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1164 if (igb_check_reset_block(hw
))
1165 dev_info(&pdev
->dev
,
1166 "PHY reset is blocked due to SOL/IDER session.\n");
1168 netdev
->features
= NETIF_F_SG
|
1170 NETIF_F_HW_VLAN_TX
|
1171 NETIF_F_HW_VLAN_RX
|
1172 NETIF_F_HW_VLAN_FILTER
;
1174 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1175 netdev
->features
|= NETIF_F_TSO
;
1176 netdev
->features
|= NETIF_F_TSO6
;
1178 #ifdef CONFIG_IGB_LRO
1179 netdev
->features
|= NETIF_F_GRO
;
1182 netdev
->vlan_features
|= NETIF_F_TSO
;
1183 netdev
->vlan_features
|= NETIF_F_TSO6
;
1184 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1185 netdev
->vlan_features
|= NETIF_F_SG
;
1188 netdev
->features
|= NETIF_F_HIGHDMA
;
1190 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1192 /* before reading the NVM, reset the controller to put the device in a
1193 * known good starting state */
1194 hw
->mac
.ops
.reset_hw(hw
);
1196 /* make sure the NVM is good */
1197 if (igb_validate_nvm_checksum(hw
) < 0) {
1198 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1203 /* copy the MAC address out of the NVM */
1204 if (hw
->mac
.ops
.read_mac_addr(hw
))
1205 dev_err(&pdev
->dev
, "NVM Read Error\n");
1207 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1208 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1210 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1211 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1216 init_timer(&adapter
->watchdog_timer
);
1217 adapter
->watchdog_timer
.function
= &igb_watchdog
;
1218 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1220 init_timer(&adapter
->phy_info_timer
);
1221 adapter
->phy_info_timer
.function
= &igb_update_phy_info
;
1222 adapter
->phy_info_timer
.data
= (unsigned long) adapter
;
1224 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1225 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1227 /* Initialize link properties that are user-changeable */
1228 adapter
->fc_autoneg
= true;
1229 hw
->mac
.autoneg
= true;
1230 hw
->phy
.autoneg_advertised
= 0x2f;
1232 hw
->fc
.original_type
= e1000_fc_default
;
1233 hw
->fc
.type
= e1000_fc_default
;
1235 adapter
->itr_setting
= 3;
1236 adapter
->itr
= IGB_START_ITR
;
1238 igb_validate_mdi_setting(hw
);
1240 adapter
->rx_csum
= 1;
1242 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1243 * enable the ACPI Magic Packet filter
1246 if (hw
->bus
.func
== 0 ||
1247 hw
->device_id
== E1000_DEV_ID_82575EB_COPPER
)
1248 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1250 if (eeprom_data
& eeprom_apme_mask
)
1251 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1253 /* now that we have the eeprom settings, apply the special cases where
1254 * the eeprom may be wrong or the board simply won't support wake on
1255 * lan on a particular port */
1256 switch (pdev
->device
) {
1257 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1258 adapter
->eeprom_wol
= 0;
1260 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1261 case E1000_DEV_ID_82576_FIBER
:
1262 case E1000_DEV_ID_82576_SERDES
:
1263 /* Wake events only supported on port A for dual fiber
1264 * regardless of eeprom setting */
1265 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1266 adapter
->eeprom_wol
= 0;
1270 /* initialize the wol settings based on the eeprom settings */
1271 adapter
->wol
= adapter
->eeprom_wol
;
1272 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1274 /* reset the hardware with the new settings */
1277 /* let the f/w know that the h/w is now under the control of the
1279 igb_get_hw_control(adapter
);
1281 /* tell the stack to leave us alone until igb_open() is called */
1282 netif_carrier_off(netdev
);
1283 netif_tx_stop_all_queues(netdev
);
1285 strcpy(netdev
->name
, "eth%d");
1286 err
= register_netdev(netdev
);
1290 #ifdef CONFIG_IGB_DCA
1291 if (dca_add_requester(&pdev
->dev
) == 0) {
1292 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1293 dev_info(&pdev
->dev
, "DCA enabled\n");
1294 /* Always use CB2 mode, difference is masked
1295 * in the CB driver. */
1296 wr32(E1000_DCA_CTRL
, 2);
1297 igb_setup_dca(adapter
);
1301 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1302 /* print bus type/speed/width info */
1303 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1305 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1306 ? "2.5Gb/s" : "unknown"),
1307 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1308 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1309 ? "Width x1" : "unknown"),
1312 igb_read_part_num(hw
, &part_num
);
1313 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1314 (part_num
>> 8), (part_num
& 0xff));
1316 dev_info(&pdev
->dev
,
1317 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1318 adapter
->msix_entries
? "MSI-X" :
1319 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1320 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1325 igb_release_hw_control(adapter
);
1327 if (!igb_check_reset_block(hw
))
1330 if (hw
->flash_address
)
1331 iounmap(hw
->flash_address
);
1333 igb_free_queues(adapter
);
1335 iounmap(hw
->hw_addr
);
1337 free_netdev(netdev
);
1339 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1343 pci_disable_device(pdev
);
1348 * igb_remove - Device Removal Routine
1349 * @pdev: PCI device information struct
1351 * igb_remove is called by the PCI subsystem to alert the driver
1352 * that it should release a PCI device. The could be caused by a
1353 * Hot-Plug event, or because the driver is going to be removed from
1356 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1358 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1359 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1360 struct e1000_hw
*hw
= &adapter
->hw
;
1363 /* flush_scheduled work may reschedule our watchdog task, so
1364 * explicitly disable watchdog tasks from being rescheduled */
1365 set_bit(__IGB_DOWN
, &adapter
->state
);
1366 del_timer_sync(&adapter
->watchdog_timer
);
1367 del_timer_sync(&adapter
->phy_info_timer
);
1369 flush_scheduled_work();
1371 #ifdef CONFIG_IGB_DCA
1372 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1373 dev_info(&pdev
->dev
, "DCA disabled\n");
1374 dca_remove_requester(&pdev
->dev
);
1375 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1376 wr32(E1000_DCA_CTRL
, 1);
1380 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1381 * would have already happened in close and is redundant. */
1382 igb_release_hw_control(adapter
);
1384 unregister_netdev(netdev
);
1386 if (!igb_check_reset_block(&adapter
->hw
))
1387 igb_reset_phy(&adapter
->hw
);
1389 igb_reset_interrupt_capability(adapter
);
1391 igb_free_queues(adapter
);
1393 iounmap(hw
->hw_addr
);
1394 if (hw
->flash_address
)
1395 iounmap(hw
->flash_address
);
1396 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1399 free_netdev(netdev
);
1401 err
= pci_disable_pcie_error_reporting(pdev
);
1404 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1406 pci_disable_device(pdev
);
1410 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1411 * @adapter: board private structure to initialize
1413 * igb_sw_init initializes the Adapter private data structure.
1414 * Fields are initialized based on PCI device information and
1415 * OS network device settings (MTU size).
1417 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1419 struct e1000_hw
*hw
= &adapter
->hw
;
1420 struct net_device
*netdev
= adapter
->netdev
;
1421 struct pci_dev
*pdev
= adapter
->pdev
;
1423 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1425 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1426 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1427 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1428 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1429 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1430 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1432 /* This call may decrease the number of queues depending on
1433 * interrupt mode. */
1434 igb_set_interrupt_capability(adapter
);
1436 if (igb_alloc_queues(adapter
)) {
1437 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1441 /* Explicitly disable IRQ since the NIC can be in any state. */
1442 igb_irq_disable(adapter
);
1444 set_bit(__IGB_DOWN
, &adapter
->state
);
1449 * igb_open - Called when a network interface is made active
1450 * @netdev: network interface device structure
1452 * Returns 0 on success, negative value on failure
1454 * The open entry point is called when a network interface is made
1455 * active by the system (IFF_UP). At this point all resources needed
1456 * for transmit and receive operations are allocated, the interrupt
1457 * handler is registered with the OS, the watchdog timer is started,
1458 * and the stack is notified that the interface is ready.
1460 static int igb_open(struct net_device
*netdev
)
1462 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1463 struct e1000_hw
*hw
= &adapter
->hw
;
1467 /* disallow open during test */
1468 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1471 /* allocate transmit descriptors */
1472 err
= igb_setup_all_tx_resources(adapter
);
1476 /* allocate receive descriptors */
1477 err
= igb_setup_all_rx_resources(adapter
);
1481 /* e1000_power_up_phy(adapter); */
1483 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1484 if ((adapter
->hw
.mng_cookie
.status
&
1485 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1486 igb_update_mng_vlan(adapter
);
1488 /* before we allocate an interrupt, we must be ready to handle it.
1489 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1490 * as soon as we call pci_request_irq, so we have to setup our
1491 * clean_rx handler before we do so. */
1492 igb_configure(adapter
);
1494 err
= igb_request_irq(adapter
);
1498 /* From here on the code is the same as igb_up() */
1499 clear_bit(__IGB_DOWN
, &adapter
->state
);
1501 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1502 napi_enable(&adapter
->rx_ring
[i
].napi
);
1504 /* Clear any pending interrupts. */
1507 igb_irq_enable(adapter
);
1509 netif_tx_start_all_queues(netdev
);
1511 /* Fire a link status change interrupt to start the watchdog. */
1512 wr32(E1000_ICS
, E1000_ICS_LSC
);
1517 igb_release_hw_control(adapter
);
1518 /* e1000_power_down_phy(adapter); */
1519 igb_free_all_rx_resources(adapter
);
1521 igb_free_all_tx_resources(adapter
);
1529 * igb_close - Disables a network interface
1530 * @netdev: network interface device structure
1532 * Returns 0, this is not allowed to fail
1534 * The close entry point is called when an interface is de-activated
1535 * by the OS. The hardware is still under the driver's control, but
1536 * needs to be disabled. A global MAC reset is issued to stop the
1537 * hardware, and all transmit and receive resources are freed.
1539 static int igb_close(struct net_device
*netdev
)
1541 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1543 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1546 igb_free_irq(adapter
);
1548 igb_free_all_tx_resources(adapter
);
1549 igb_free_all_rx_resources(adapter
);
1551 /* kill manageability vlan ID if supported, but not if a vlan with
1552 * the same ID is registered on the host OS (let 8021q kill it) */
1553 if ((adapter
->hw
.mng_cookie
.status
&
1554 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1556 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1557 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1563 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1564 * @adapter: board private structure
1565 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1567 * Return 0 on success, negative on failure
1570 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1571 struct igb_ring
*tx_ring
)
1573 struct pci_dev
*pdev
= adapter
->pdev
;
1576 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1577 tx_ring
->buffer_info
= vmalloc(size
);
1578 if (!tx_ring
->buffer_info
)
1580 memset(tx_ring
->buffer_info
, 0, size
);
1582 /* round up to nearest 4K */
1583 tx_ring
->size
= tx_ring
->count
* sizeof(struct e1000_tx_desc
);
1584 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1586 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1592 tx_ring
->adapter
= adapter
;
1593 tx_ring
->next_to_use
= 0;
1594 tx_ring
->next_to_clean
= 0;
1598 vfree(tx_ring
->buffer_info
);
1599 dev_err(&adapter
->pdev
->dev
,
1600 "Unable to allocate memory for the transmit descriptor ring\n");
1605 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1606 * (Descriptors) for all queues
1607 * @adapter: board private structure
1609 * Return 0 on success, negative on failure
1611 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1616 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1617 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1619 dev_err(&adapter
->pdev
->dev
,
1620 "Allocation for Tx Queue %u failed\n", i
);
1621 for (i
--; i
>= 0; i
--)
1622 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1627 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1628 r_idx
= i
% adapter
->num_tx_queues
;
1629 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1635 * igb_configure_tx - Configure transmit Unit after Reset
1636 * @adapter: board private structure
1638 * Configure the Tx unit of the MAC after a reset.
1640 static void igb_configure_tx(struct igb_adapter
*adapter
)
1643 struct e1000_hw
*hw
= &adapter
->hw
;
1648 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1649 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
1651 wr32(E1000_TDLEN(j
),
1652 ring
->count
* sizeof(struct e1000_tx_desc
));
1654 wr32(E1000_TDBAL(j
),
1655 tdba
& 0x00000000ffffffffULL
);
1656 wr32(E1000_TDBAH(j
), tdba
>> 32);
1658 ring
->head
= E1000_TDH(j
);
1659 ring
->tail
= E1000_TDT(j
);
1660 writel(0, hw
->hw_addr
+ ring
->tail
);
1661 writel(0, hw
->hw_addr
+ ring
->head
);
1662 txdctl
= rd32(E1000_TXDCTL(j
));
1663 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1664 wr32(E1000_TXDCTL(j
), txdctl
);
1666 /* Turn off Relaxed Ordering on head write-backs. The
1667 * writebacks MUST be delivered in order or it will
1668 * completely screw up our bookeeping.
1670 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1671 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1672 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1677 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1679 /* Program the Transmit Control Register */
1681 tctl
= rd32(E1000_TCTL
);
1682 tctl
&= ~E1000_TCTL_CT
;
1683 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1684 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1686 igb_config_collision_dist(hw
);
1688 /* Setup Transmit Descriptor Settings for eop descriptor */
1689 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1691 /* Enable transmits */
1692 tctl
|= E1000_TCTL_EN
;
1694 wr32(E1000_TCTL
, tctl
);
1698 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1699 * @adapter: board private structure
1700 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1702 * Returns 0 on success, negative on failure
1705 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1706 struct igb_ring
*rx_ring
)
1708 struct pci_dev
*pdev
= adapter
->pdev
;
1711 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1712 rx_ring
->buffer_info
= vmalloc(size
);
1713 if (!rx_ring
->buffer_info
)
1715 memset(rx_ring
->buffer_info
, 0, size
);
1717 desc_len
= sizeof(union e1000_adv_rx_desc
);
1719 /* Round up to nearest 4K */
1720 rx_ring
->size
= rx_ring
->count
* desc_len
;
1721 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1723 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1729 rx_ring
->next_to_clean
= 0;
1730 rx_ring
->next_to_use
= 0;
1732 rx_ring
->adapter
= adapter
;
1737 vfree(rx_ring
->buffer_info
);
1738 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1739 "the receive descriptor ring\n");
1744 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1745 * (Descriptors) for all queues
1746 * @adapter: board private structure
1748 * Return 0 on success, negative on failure
1750 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1754 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1755 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1757 dev_err(&adapter
->pdev
->dev
,
1758 "Allocation for Rx Queue %u failed\n", i
);
1759 for (i
--; i
>= 0; i
--)
1760 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1769 * igb_setup_rctl - configure the receive control registers
1770 * @adapter: Board private structure
1772 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1774 struct e1000_hw
*hw
= &adapter
->hw
;
1779 rctl
= rd32(E1000_RCTL
);
1781 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1782 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1784 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1785 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1788 * enable stripping of CRC. It's unlikely this will break BMC
1789 * redirection as it did with e1000. Newer features require
1790 * that the HW strips the CRC.
1792 rctl
|= E1000_RCTL_SECRC
;
1795 * disable store bad packets and clear size bits.
1797 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
1799 /* enable LPE when to prevent packets larger than max_frame_size */
1800 rctl
|= E1000_RCTL_LPE
;
1802 /* Setup buffer sizes */
1803 switch (adapter
->rx_buffer_len
) {
1804 case IGB_RXBUFFER_256
:
1805 rctl
|= E1000_RCTL_SZ_256
;
1807 case IGB_RXBUFFER_512
:
1808 rctl
|= E1000_RCTL_SZ_512
;
1811 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
1812 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
1816 /* 82575 and greater support packet-split where the protocol
1817 * header is placed in skb->data and the packet data is
1818 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1819 * In the case of a non-split, skb->data is linearly filled,
1820 * followed by the page buffers. Therefore, skb->data is
1821 * sized to hold the largest protocol header.
1823 /* allocations using alloc_page take too long for regular MTU
1824 * so only enable packet split for jumbo frames */
1825 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
1826 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
1827 srrctl
|= adapter
->rx_ps_hdr_size
<<
1828 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
1829 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1831 adapter
->rx_ps_hdr_size
= 0;
1832 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1835 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1836 j
= adapter
->rx_ring
[i
].reg_idx
;
1837 wr32(E1000_SRRCTL(j
), srrctl
);
1840 wr32(E1000_RCTL
, rctl
);
1844 * igb_configure_rx - Configure receive Unit after Reset
1845 * @adapter: board private structure
1847 * Configure the Rx unit of the MAC after a reset.
1849 static void igb_configure_rx(struct igb_adapter
*adapter
)
1852 struct e1000_hw
*hw
= &adapter
->hw
;
1857 /* disable receives while setting up the descriptors */
1858 rctl
= rd32(E1000_RCTL
);
1859 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1863 if (adapter
->itr_setting
> 3)
1864 wr32(E1000_ITR
, adapter
->itr
);
1866 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1867 * the Base and Length of the Rx Descriptor Ring */
1868 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1869 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
1872 wr32(E1000_RDBAL(j
),
1873 rdba
& 0x00000000ffffffffULL
);
1874 wr32(E1000_RDBAH(j
), rdba
>> 32);
1875 wr32(E1000_RDLEN(j
),
1876 ring
->count
* sizeof(union e1000_adv_rx_desc
));
1878 ring
->head
= E1000_RDH(j
);
1879 ring
->tail
= E1000_RDT(j
);
1880 writel(0, hw
->hw_addr
+ ring
->tail
);
1881 writel(0, hw
->hw_addr
+ ring
->head
);
1883 rxdctl
= rd32(E1000_RXDCTL(j
));
1884 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
1885 rxdctl
&= 0xFFF00000;
1886 rxdctl
|= IGB_RX_PTHRESH
;
1887 rxdctl
|= IGB_RX_HTHRESH
<< 8;
1888 rxdctl
|= IGB_RX_WTHRESH
<< 16;
1889 wr32(E1000_RXDCTL(j
), rxdctl
);
1892 if (adapter
->num_rx_queues
> 1) {
1901 get_random_bytes(&random
[0], 40);
1903 if (hw
->mac
.type
>= e1000_82576
)
1907 for (j
= 0; j
< (32 * 4); j
++) {
1909 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
1912 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
1914 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
1916 /* Fill out hash function seeds */
1917 for (j
= 0; j
< 10; j
++)
1918 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
1920 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
1921 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
1922 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
1923 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
1924 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
1925 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
1926 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
1927 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
1930 wr32(E1000_MRQC
, mrqc
);
1932 /* Multiqueue and raw packet checksumming are mutually
1933 * exclusive. Note that this not the same as TCP/IP
1934 * checksumming, which works fine. */
1935 rxcsum
= rd32(E1000_RXCSUM
);
1936 rxcsum
|= E1000_RXCSUM_PCSD
;
1937 wr32(E1000_RXCSUM
, rxcsum
);
1939 /* Enable Receive Checksum Offload for TCP and UDP */
1940 rxcsum
= rd32(E1000_RXCSUM
);
1941 if (adapter
->rx_csum
) {
1942 rxcsum
|= E1000_RXCSUM_TUOFL
;
1944 /* Enable IPv4 payload checksum for UDP fragments
1945 * Must be used in conjunction with packet-split. */
1946 if (adapter
->rx_ps_hdr_size
)
1947 rxcsum
|= E1000_RXCSUM_IPPCSE
;
1949 rxcsum
&= ~E1000_RXCSUM_TUOFL
;
1950 /* don't need to clear IPPCSE as it defaults to 0 */
1952 wr32(E1000_RXCSUM
, rxcsum
);
1957 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
1959 wr32(E1000_RLPML
, adapter
->max_frame_size
);
1961 /* Enable Receives */
1962 wr32(E1000_RCTL
, rctl
);
1966 * igb_free_tx_resources - Free Tx Resources per Queue
1967 * @tx_ring: Tx descriptor ring for a specific queue
1969 * Free all transmit software resources
1971 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
1973 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
1975 igb_clean_tx_ring(tx_ring
);
1977 vfree(tx_ring
->buffer_info
);
1978 tx_ring
->buffer_info
= NULL
;
1980 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
1982 tx_ring
->desc
= NULL
;
1986 * igb_free_all_tx_resources - Free Tx Resources for All Queues
1987 * @adapter: board private structure
1989 * Free all transmit software resources
1991 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
1995 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
1996 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1999 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2000 struct igb_buffer
*buffer_info
)
2002 if (buffer_info
->dma
) {
2003 pci_unmap_page(adapter
->pdev
,
2005 buffer_info
->length
,
2007 buffer_info
->dma
= 0;
2009 if (buffer_info
->skb
) {
2010 dev_kfree_skb_any(buffer_info
->skb
);
2011 buffer_info
->skb
= NULL
;
2013 buffer_info
->time_stamp
= 0;
2014 /* buffer_info must be completely set up in the transmit path */
2018 * igb_clean_tx_ring - Free Tx Buffers
2019 * @tx_ring: ring to be cleaned
2021 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2023 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2024 struct igb_buffer
*buffer_info
;
2028 if (!tx_ring
->buffer_info
)
2030 /* Free all the Tx ring sk_buffs */
2032 for (i
= 0; i
< tx_ring
->count
; i
++) {
2033 buffer_info
= &tx_ring
->buffer_info
[i
];
2034 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2037 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2038 memset(tx_ring
->buffer_info
, 0, size
);
2040 /* Zero out the descriptor ring */
2042 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2044 tx_ring
->next_to_use
= 0;
2045 tx_ring
->next_to_clean
= 0;
2047 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2048 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2052 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2053 * @adapter: board private structure
2055 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2059 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2060 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2064 * igb_free_rx_resources - Free Rx Resources
2065 * @rx_ring: ring to clean the resources from
2067 * Free all receive software resources
2069 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2071 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2073 igb_clean_rx_ring(rx_ring
);
2075 vfree(rx_ring
->buffer_info
);
2076 rx_ring
->buffer_info
= NULL
;
2078 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2080 rx_ring
->desc
= NULL
;
2084 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2085 * @adapter: board private structure
2087 * Free all receive software resources
2089 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2093 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2094 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2098 * igb_clean_rx_ring - Free Rx Buffers per Queue
2099 * @rx_ring: ring to free buffers from
2101 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2103 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2104 struct igb_buffer
*buffer_info
;
2105 struct pci_dev
*pdev
= adapter
->pdev
;
2109 if (!rx_ring
->buffer_info
)
2111 /* Free all the Rx ring sk_buffs */
2112 for (i
= 0; i
< rx_ring
->count
; i
++) {
2113 buffer_info
= &rx_ring
->buffer_info
[i
];
2114 if (buffer_info
->dma
) {
2115 if (adapter
->rx_ps_hdr_size
)
2116 pci_unmap_single(pdev
, buffer_info
->dma
,
2117 adapter
->rx_ps_hdr_size
,
2118 PCI_DMA_FROMDEVICE
);
2120 pci_unmap_single(pdev
, buffer_info
->dma
,
2121 adapter
->rx_buffer_len
,
2122 PCI_DMA_FROMDEVICE
);
2123 buffer_info
->dma
= 0;
2126 if (buffer_info
->skb
) {
2127 dev_kfree_skb(buffer_info
->skb
);
2128 buffer_info
->skb
= NULL
;
2130 if (buffer_info
->page
) {
2131 if (buffer_info
->page_dma
)
2132 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2134 PCI_DMA_FROMDEVICE
);
2135 put_page(buffer_info
->page
);
2136 buffer_info
->page
= NULL
;
2137 buffer_info
->page_dma
= 0;
2138 buffer_info
->page_offset
= 0;
2142 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2143 memset(rx_ring
->buffer_info
, 0, size
);
2145 /* Zero out the descriptor ring */
2146 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2148 rx_ring
->next_to_clean
= 0;
2149 rx_ring
->next_to_use
= 0;
2151 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2152 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2156 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2157 * @adapter: board private structure
2159 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2163 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2164 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2168 * igb_set_mac - Change the Ethernet Address of the NIC
2169 * @netdev: network interface device structure
2170 * @p: pointer to an address structure
2172 * Returns 0 on success, negative on failure
2174 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2176 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2177 struct e1000_hw
*hw
= &adapter
->hw
;
2178 struct sockaddr
*addr
= p
;
2180 if (!is_valid_ether_addr(addr
->sa_data
))
2181 return -EADDRNOTAVAIL
;
2183 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2184 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2186 hw
->mac
.ops
.rar_set(hw
, hw
->mac
.addr
, 0);
2192 * igb_set_multi - Multicast and Promiscuous mode set
2193 * @netdev: network interface device structure
2195 * The set_multi entry point is called whenever the multicast address
2196 * list or the network interface flags are updated. This routine is
2197 * responsible for configuring the hardware for proper multicast,
2198 * promiscuous mode, and all-multi behavior.
2200 static void igb_set_multi(struct net_device
*netdev
)
2202 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2203 struct e1000_hw
*hw
= &adapter
->hw
;
2204 struct e1000_mac_info
*mac
= &hw
->mac
;
2205 struct dev_mc_list
*mc_ptr
;
2210 /* Check for Promiscuous and All Multicast modes */
2212 rctl
= rd32(E1000_RCTL
);
2214 if (netdev
->flags
& IFF_PROMISC
) {
2215 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2216 rctl
&= ~E1000_RCTL_VFE
;
2218 if (netdev
->flags
& IFF_ALLMULTI
) {
2219 rctl
|= E1000_RCTL_MPE
;
2220 rctl
&= ~E1000_RCTL_UPE
;
2222 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2223 rctl
|= E1000_RCTL_VFE
;
2225 wr32(E1000_RCTL
, rctl
);
2227 if (!netdev
->mc_count
) {
2228 /* nothing to program, so clear mc list */
2229 igb_update_mc_addr_list(hw
, NULL
, 0, 1,
2230 mac
->rar_entry_count
);
2234 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2238 /* The shared function expects a packed array of only addresses. */
2239 mc_ptr
= netdev
->mc_list
;
2241 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2244 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2245 mc_ptr
= mc_ptr
->next
;
2247 igb_update_mc_addr_list(hw
, mta_list
, i
, 1, mac
->rar_entry_count
);
2251 /* Need to wait a few seconds after link up to get diagnostic information from
2253 static void igb_update_phy_info(unsigned long data
)
2255 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2256 igb_get_phy_info(&adapter
->hw
);
2260 * igb_has_link - check shared code for link and determine up/down
2261 * @adapter: pointer to driver private info
2263 static bool igb_has_link(struct igb_adapter
*adapter
)
2265 struct e1000_hw
*hw
= &adapter
->hw
;
2266 bool link_active
= false;
2269 /* get_link_status is set on LSC (link status) interrupt or
2270 * rx sequence error interrupt. get_link_status will stay
2271 * false until the e1000_check_for_link establishes link
2272 * for copper adapters ONLY
2274 switch (hw
->phy
.media_type
) {
2275 case e1000_media_type_copper
:
2276 if (hw
->mac
.get_link_status
) {
2277 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2278 link_active
= !hw
->mac
.get_link_status
;
2283 case e1000_media_type_fiber
:
2284 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2285 link_active
= !!(rd32(E1000_STATUS
) & E1000_STATUS_LU
);
2287 case e1000_media_type_internal_serdes
:
2288 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2289 link_active
= hw
->mac
.serdes_has_link
;
2292 case e1000_media_type_unknown
:
2300 * igb_watchdog - Timer Call-back
2301 * @data: pointer to adapter cast into an unsigned long
2303 static void igb_watchdog(unsigned long data
)
2305 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2306 /* Do the rest outside of interrupt context */
2307 schedule_work(&adapter
->watchdog_task
);
2310 static void igb_watchdog_task(struct work_struct
*work
)
2312 struct igb_adapter
*adapter
= container_of(work
,
2313 struct igb_adapter
, watchdog_task
);
2314 struct e1000_hw
*hw
= &adapter
->hw
;
2315 struct net_device
*netdev
= adapter
->netdev
;
2316 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2321 link
= igb_has_link(adapter
);
2322 if ((netif_carrier_ok(netdev
)) && link
)
2326 if (!netif_carrier_ok(netdev
)) {
2328 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2329 &adapter
->link_speed
,
2330 &adapter
->link_duplex
);
2332 ctrl
= rd32(E1000_CTRL
);
2333 /* Links status message must follow this format */
2334 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2335 "Flow Control: %s\n",
2337 adapter
->link_speed
,
2338 adapter
->link_duplex
== FULL_DUPLEX
?
2339 "Full Duplex" : "Half Duplex",
2340 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2341 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2342 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2343 E1000_CTRL_TFCE
) ? "TX" : "None")));
2345 /* tweak tx_queue_len according to speed/duplex and
2346 * adjust the timeout factor */
2347 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2348 adapter
->tx_timeout_factor
= 1;
2349 switch (adapter
->link_speed
) {
2351 netdev
->tx_queue_len
= 10;
2352 adapter
->tx_timeout_factor
= 14;
2355 netdev
->tx_queue_len
= 100;
2356 /* maybe add some timeout factor ? */
2360 netif_carrier_on(netdev
);
2361 netif_tx_wake_all_queues(netdev
);
2363 /* link state has changed, schedule phy info update */
2364 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2365 mod_timer(&adapter
->phy_info_timer
,
2366 round_jiffies(jiffies
+ 2 * HZ
));
2369 if (netif_carrier_ok(netdev
)) {
2370 adapter
->link_speed
= 0;
2371 adapter
->link_duplex
= 0;
2372 /* Links status message must follow this format */
2373 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2375 netif_carrier_off(netdev
);
2376 netif_tx_stop_all_queues(netdev
);
2378 /* link state has changed, schedule phy info update */
2379 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2380 mod_timer(&adapter
->phy_info_timer
,
2381 round_jiffies(jiffies
+ 2 * HZ
));
2386 igb_update_stats(adapter
);
2388 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2389 adapter
->tpt_old
= adapter
->stats
.tpt
;
2390 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2391 adapter
->colc_old
= adapter
->stats
.colc
;
2393 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2394 adapter
->gorc_old
= adapter
->stats
.gorc
;
2395 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2396 adapter
->gotc_old
= adapter
->stats
.gotc
;
2398 igb_update_adaptive(&adapter
->hw
);
2400 if (!netif_carrier_ok(netdev
)) {
2401 if (IGB_DESC_UNUSED(tx_ring
) + 1 < tx_ring
->count
) {
2402 /* We've lost link, so the controller stops DMA,
2403 * but we've got queued Tx work that's never going
2404 * to get done, so reset controller to flush Tx.
2405 * (Do the reset outside of interrupt context). */
2406 adapter
->tx_timeout_count
++;
2407 schedule_work(&adapter
->reset_task
);
2411 /* Cause software interrupt to ensure rx ring is cleaned */
2412 if (adapter
->msix_entries
) {
2413 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2414 eics
|= adapter
->rx_ring
[i
].eims_value
;
2415 wr32(E1000_EICS
, eics
);
2417 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2420 /* Force detection of hung controller every watchdog period */
2421 tx_ring
->detect_tx_hung
= true;
2423 /* Reset the timer */
2424 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2425 mod_timer(&adapter
->watchdog_timer
,
2426 round_jiffies(jiffies
+ 2 * HZ
));
2429 enum latency_range
{
2433 latency_invalid
= 255
2438 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2440 * Stores a new ITR value based on strictly on packet size. This
2441 * algorithm is less sophisticated than that used in igb_update_itr,
2442 * due to the difficulty of synchronizing statistics across multiple
2443 * receive rings. The divisors and thresholds used by this fuction
2444 * were determined based on theoretical maximum wire speed and testing
2445 * data, in order to minimize response time while increasing bulk
2447 * This functionality is controlled by the InterruptThrottleRate module
2448 * parameter (see igb_param.c)
2449 * NOTE: This function is called only when operating in a multiqueue
2450 * receive environment.
2451 * @rx_ring: pointer to ring
2453 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2455 int new_val
= rx_ring
->itr_val
;
2456 int avg_wire_size
= 0;
2457 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2459 if (!rx_ring
->total_packets
)
2460 goto clear_counts
; /* no packets, so don't do anything */
2462 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2463 * ints/sec - ITR timer value of 120 ticks.
2465 if (adapter
->link_speed
!= SPEED_1000
) {
2469 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2471 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2472 avg_wire_size
+= 24;
2474 /* Don't starve jumbo frames */
2475 avg_wire_size
= min(avg_wire_size
, 3000);
2477 /* Give a little boost to mid-size frames */
2478 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2479 new_val
= avg_wire_size
/ 3;
2481 new_val
= avg_wire_size
/ 2;
2484 if (new_val
!= rx_ring
->itr_val
) {
2485 rx_ring
->itr_val
= new_val
;
2486 rx_ring
->set_itr
= 1;
2489 rx_ring
->total_bytes
= 0;
2490 rx_ring
->total_packets
= 0;
2494 * igb_update_itr - update the dynamic ITR value based on statistics
2495 * Stores a new ITR value based on packets and byte
2496 * counts during the last interrupt. The advantage of per interrupt
2497 * computation is faster updates and more accurate ITR for the current
2498 * traffic pattern. Constants in this function were computed
2499 * based on theoretical maximum wire speed and thresholds were set based
2500 * on testing data as well as attempting to minimize response time
2501 * while increasing bulk throughput.
2502 * this functionality is controlled by the InterruptThrottleRate module
2503 * parameter (see igb_param.c)
2504 * NOTE: These calculations are only valid when operating in a single-
2505 * queue environment.
2506 * @adapter: pointer to adapter
2507 * @itr_setting: current adapter->itr
2508 * @packets: the number of packets during this measurement interval
2509 * @bytes: the number of bytes during this measurement interval
2511 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2512 int packets
, int bytes
)
2514 unsigned int retval
= itr_setting
;
2517 goto update_itr_done
;
2519 switch (itr_setting
) {
2520 case lowest_latency
:
2521 /* handle TSO and jumbo frames */
2522 if (bytes
/packets
> 8000)
2523 retval
= bulk_latency
;
2524 else if ((packets
< 5) && (bytes
> 512))
2525 retval
= low_latency
;
2527 case low_latency
: /* 50 usec aka 20000 ints/s */
2528 if (bytes
> 10000) {
2529 /* this if handles the TSO accounting */
2530 if (bytes
/packets
> 8000) {
2531 retval
= bulk_latency
;
2532 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2533 retval
= bulk_latency
;
2534 } else if ((packets
> 35)) {
2535 retval
= lowest_latency
;
2537 } else if (bytes
/packets
> 2000) {
2538 retval
= bulk_latency
;
2539 } else if (packets
<= 2 && bytes
< 512) {
2540 retval
= lowest_latency
;
2543 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2544 if (bytes
> 25000) {
2546 retval
= low_latency
;
2547 } else if (bytes
< 6000) {
2548 retval
= low_latency
;
2557 static void igb_set_itr(struct igb_adapter
*adapter
)
2560 u32 new_itr
= adapter
->itr
;
2562 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2563 if (adapter
->link_speed
!= SPEED_1000
) {
2569 adapter
->rx_itr
= igb_update_itr(adapter
,
2571 adapter
->rx_ring
->total_packets
,
2572 adapter
->rx_ring
->total_bytes
);
2574 if (adapter
->rx_ring
->buddy
) {
2575 adapter
->tx_itr
= igb_update_itr(adapter
,
2577 adapter
->tx_ring
->total_packets
,
2578 adapter
->tx_ring
->total_bytes
);
2580 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2582 current_itr
= adapter
->rx_itr
;
2585 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2586 if (adapter
->itr_setting
== 3 &&
2587 current_itr
== lowest_latency
)
2588 current_itr
= low_latency
;
2590 switch (current_itr
) {
2591 /* counts and packets in update_itr are dependent on these numbers */
2592 case lowest_latency
:
2596 new_itr
= 20000; /* aka hwitr = ~200 */
2606 adapter
->rx_ring
->total_bytes
= 0;
2607 adapter
->rx_ring
->total_packets
= 0;
2608 if (adapter
->rx_ring
->buddy
) {
2609 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2610 adapter
->rx_ring
->buddy
->total_packets
= 0;
2613 if (new_itr
!= adapter
->itr
) {
2614 /* this attempts to bias the interrupt rate towards Bulk
2615 * by adding intermediate steps when interrupt rate is
2617 new_itr
= new_itr
> adapter
->itr
?
2618 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2620 /* Don't write the value here; it resets the adapter's
2621 * internal timer, and causes us to delay far longer than
2622 * we should between interrupts. Instead, we write the ITR
2623 * value at the beginning of the next interrupt so the timing
2624 * ends up being correct.
2626 adapter
->itr
= new_itr
;
2627 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2628 adapter
->rx_ring
->set_itr
= 1;
2635 #define IGB_TX_FLAGS_CSUM 0x00000001
2636 #define IGB_TX_FLAGS_VLAN 0x00000002
2637 #define IGB_TX_FLAGS_TSO 0x00000004
2638 #define IGB_TX_FLAGS_IPV4 0x00000008
2639 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2640 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2642 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2643 struct igb_ring
*tx_ring
,
2644 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2646 struct e1000_adv_tx_context_desc
*context_desc
;
2649 struct igb_buffer
*buffer_info
;
2650 u32 info
= 0, tu_cmd
= 0;
2651 u32 mss_l4len_idx
, l4len
;
2654 if (skb_header_cloned(skb
)) {
2655 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2660 l4len
= tcp_hdrlen(skb
);
2663 if (skb
->protocol
== htons(ETH_P_IP
)) {
2664 struct iphdr
*iph
= ip_hdr(skb
);
2667 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2671 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2672 ipv6_hdr(skb
)->payload_len
= 0;
2673 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2674 &ipv6_hdr(skb
)->daddr
,
2678 i
= tx_ring
->next_to_use
;
2680 buffer_info
= &tx_ring
->buffer_info
[i
];
2681 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2682 /* VLAN MACLEN IPLEN */
2683 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2684 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2685 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2686 *hdr_len
+= skb_network_offset(skb
);
2687 info
|= skb_network_header_len(skb
);
2688 *hdr_len
+= skb_network_header_len(skb
);
2689 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2691 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2692 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2694 if (skb
->protocol
== htons(ETH_P_IP
))
2695 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2696 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2698 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2701 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2702 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2704 /* Context index must be unique per ring. */
2705 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2706 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2708 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2709 context_desc
->seqnum_seed
= 0;
2711 buffer_info
->time_stamp
= jiffies
;
2712 buffer_info
->next_to_watch
= i
;
2713 buffer_info
->dma
= 0;
2715 if (i
== tx_ring
->count
)
2718 tx_ring
->next_to_use
= i
;
2723 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2724 struct igb_ring
*tx_ring
,
2725 struct sk_buff
*skb
, u32 tx_flags
)
2727 struct e1000_adv_tx_context_desc
*context_desc
;
2729 struct igb_buffer
*buffer_info
;
2730 u32 info
= 0, tu_cmd
= 0;
2732 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
2733 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
2734 i
= tx_ring
->next_to_use
;
2735 buffer_info
= &tx_ring
->buffer_info
[i
];
2736 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2738 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2739 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2740 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2741 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2742 info
|= skb_network_header_len(skb
);
2744 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2746 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2748 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2749 switch (skb
->protocol
) {
2750 case cpu_to_be16(ETH_P_IP
):
2751 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2752 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
2753 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2755 case cpu_to_be16(ETH_P_IPV6
):
2756 /* XXX what about other V6 headers?? */
2757 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
2758 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2761 if (unlikely(net_ratelimit()))
2762 dev_warn(&adapter
->pdev
->dev
,
2763 "partial checksum but proto=%x!\n",
2769 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2770 context_desc
->seqnum_seed
= 0;
2771 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2772 context_desc
->mss_l4len_idx
=
2773 cpu_to_le32(tx_ring
->queue_index
<< 4);
2775 context_desc
->mss_l4len_idx
= 0;
2777 buffer_info
->time_stamp
= jiffies
;
2778 buffer_info
->next_to_watch
= i
;
2779 buffer_info
->dma
= 0;
2782 if (i
== tx_ring
->count
)
2784 tx_ring
->next_to_use
= i
;
2793 #define IGB_MAX_TXD_PWR 16
2794 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2796 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
2797 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
2800 struct igb_buffer
*buffer_info
;
2801 unsigned int len
= skb_headlen(skb
);
2802 unsigned int count
= 0, i
;
2805 i
= tx_ring
->next_to_use
;
2807 buffer_info
= &tx_ring
->buffer_info
[i
];
2808 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2809 buffer_info
->length
= len
;
2810 /* set time_stamp *before* dma to help avoid a possible race */
2811 buffer_info
->time_stamp
= jiffies
;
2812 buffer_info
->next_to_watch
= i
;
2813 buffer_info
->dma
= pci_map_single(adapter
->pdev
, skb
->data
, len
,
2817 if (i
== tx_ring
->count
)
2820 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
2821 struct skb_frag_struct
*frag
;
2823 frag
= &skb_shinfo(skb
)->frags
[f
];
2826 buffer_info
= &tx_ring
->buffer_info
[i
];
2827 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2828 buffer_info
->length
= len
;
2829 buffer_info
->time_stamp
= jiffies
;
2830 buffer_info
->next_to_watch
= i
;
2831 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2839 if (i
== tx_ring
->count
)
2843 i
= ((i
== 0) ? tx_ring
->count
- 1 : i
- 1);
2844 tx_ring
->buffer_info
[i
].skb
= skb
;
2845 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
2850 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
2851 struct igb_ring
*tx_ring
,
2852 int tx_flags
, int count
, u32 paylen
,
2855 union e1000_adv_tx_desc
*tx_desc
= NULL
;
2856 struct igb_buffer
*buffer_info
;
2857 u32 olinfo_status
= 0, cmd_type_len
;
2860 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
2861 E1000_ADVTXD_DCMD_DEXT
);
2863 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2864 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
2866 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
2867 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
2869 /* insert tcp checksum */
2870 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2872 /* insert ip checksum */
2873 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
2874 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
2876 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
2877 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2880 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
2881 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
2882 IGB_TX_FLAGS_VLAN
)))
2883 olinfo_status
|= tx_ring
->queue_index
<< 4;
2885 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
2887 i
= tx_ring
->next_to_use
;
2889 buffer_info
= &tx_ring
->buffer_info
[i
];
2890 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
2891 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
2892 tx_desc
->read
.cmd_type_len
=
2893 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
2894 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
2896 if (i
== tx_ring
->count
)
2900 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
2901 /* Force memory writes to complete before letting h/w
2902 * know there are new descriptors to fetch. (Only
2903 * applicable for weak-ordered memory model archs,
2904 * such as IA-64). */
2907 tx_ring
->next_to_use
= i
;
2908 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2909 /* we need this if more than one processor can write to our tail
2910 * at a time, it syncronizes IO on IA64/Altix systems */
2914 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
2915 struct igb_ring
*tx_ring
, int size
)
2917 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2919 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
2921 /* Herbert's original patch had:
2922 * smp_mb__after_netif_stop_queue();
2923 * but since that doesn't exist yet, just open code it. */
2926 /* We need to check again in a case another CPU has just
2927 * made room available. */
2928 if (IGB_DESC_UNUSED(tx_ring
) < size
)
2932 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
2933 ++adapter
->restart_queue
;
2937 static int igb_maybe_stop_tx(struct net_device
*netdev
,
2938 struct igb_ring
*tx_ring
, int size
)
2940 if (IGB_DESC_UNUSED(tx_ring
) >= size
)
2942 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
2945 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2947 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
2948 struct net_device
*netdev
,
2949 struct igb_ring
*tx_ring
)
2951 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2953 unsigned int tx_flags
= 0;
2957 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
2958 dev_kfree_skb_any(skb
);
2959 return NETDEV_TX_OK
;
2962 if (skb
->len
<= 0) {
2963 dev_kfree_skb_any(skb
);
2964 return NETDEV_TX_OK
;
2967 /* need: 1 descriptor per page,
2968 * + 2 desc gap to keep tail from touching head,
2969 * + 1 desc for skb->data,
2970 * + 1 desc for context descriptor,
2971 * otherwise try next time */
2972 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
2973 /* this is a hard error */
2974 return NETDEV_TX_BUSY
;
2978 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
2979 tx_flags
|= IGB_TX_FLAGS_VLAN
;
2980 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
2983 if (skb
->protocol
== htons(ETH_P_IP
))
2984 tx_flags
|= IGB_TX_FLAGS_IPV4
;
2986 first
= tx_ring
->next_to_use
;
2988 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
2992 dev_kfree_skb_any(skb
);
2993 return NETDEV_TX_OK
;
2997 tx_flags
|= IGB_TX_FLAGS_TSO
;
2998 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
))
2999 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3000 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3002 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
,
3003 igb_tx_map_adv(adapter
, tx_ring
, skb
, first
),
3006 netdev
->trans_start
= jiffies
;
3008 /* Make sure there is space in the ring for the next send. */
3009 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3011 return NETDEV_TX_OK
;
3014 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3016 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3017 struct igb_ring
*tx_ring
;
3020 r_idx
= skb
->queue_mapping
& (IGB_MAX_TX_QUEUES
- 1);
3021 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3023 /* This goes back to the question of how to logically map a tx queue
3024 * to a flow. Right now, performance is impacted slightly negatively
3025 * if using multiple tx queues. If the stack breaks away from a
3026 * single qdisc implementation, we can look at this again. */
3027 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3031 * igb_tx_timeout - Respond to a Tx Hang
3032 * @netdev: network interface device structure
3034 static void igb_tx_timeout(struct net_device
*netdev
)
3036 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3037 struct e1000_hw
*hw
= &adapter
->hw
;
3039 /* Do the reset outside of interrupt context */
3040 adapter
->tx_timeout_count
++;
3041 schedule_work(&adapter
->reset_task
);
3043 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3046 static void igb_reset_task(struct work_struct
*work
)
3048 struct igb_adapter
*adapter
;
3049 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3051 igb_reinit_locked(adapter
);
3055 * igb_get_stats - Get System Network Statistics
3056 * @netdev: network interface device structure
3058 * Returns the address of the device statistics structure.
3059 * The statistics are actually updated from the timer callback.
3061 static struct net_device_stats
*
3062 igb_get_stats(struct net_device
*netdev
)
3064 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3066 /* only return the current stats */
3067 return &adapter
->net_stats
;
3071 * igb_change_mtu - Change the Maximum Transfer Unit
3072 * @netdev: network interface device structure
3073 * @new_mtu: new value for maximum frame size
3075 * Returns 0 on success, negative on failure
3077 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3079 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3080 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3082 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3083 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3084 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3088 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3089 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3090 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3094 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3096 /* igb_down has a dependency on max_frame_size */
3097 adapter
->max_frame_size
= max_frame
;
3098 if (netif_running(netdev
))
3101 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3102 * means we reserve 2 more, this pushes us to allocate from the next
3104 * i.e. RXBUFFER_2048 --> size-4096 slab
3107 if (max_frame
<= IGB_RXBUFFER_256
)
3108 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3109 else if (max_frame
<= IGB_RXBUFFER_512
)
3110 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3111 else if (max_frame
<= IGB_RXBUFFER_1024
)
3112 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3113 else if (max_frame
<= IGB_RXBUFFER_2048
)
3114 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3116 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3117 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3119 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3121 /* adjust allocation if LPE protects us, and we aren't using SBP */
3122 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3123 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3124 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3126 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3127 netdev
->mtu
, new_mtu
);
3128 netdev
->mtu
= new_mtu
;
3130 if (netif_running(netdev
))
3135 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3141 * igb_update_stats - Update the board statistics counters
3142 * @adapter: board private structure
3145 void igb_update_stats(struct igb_adapter
*adapter
)
3147 struct e1000_hw
*hw
= &adapter
->hw
;
3148 struct pci_dev
*pdev
= adapter
->pdev
;
3151 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3154 * Prevent stats update while adapter is being reset, or if the pci
3155 * connection is down.
3157 if (adapter
->link_speed
== 0)
3159 if (pci_channel_offline(pdev
))
3162 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3163 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3164 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3165 rd32(E1000_GORCH
); /* clear GORCL */
3166 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3167 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3168 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3170 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3171 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3172 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3173 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3174 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3175 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3176 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3177 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3179 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3180 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3181 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3182 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3183 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3184 adapter
->stats
.dc
+= rd32(E1000_DC
);
3185 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3186 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3187 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3188 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3189 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3190 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3191 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3192 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3193 rd32(E1000_GOTCH
); /* clear GOTCL */
3194 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3195 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3196 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3197 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3198 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3199 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3200 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3202 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3203 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3204 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3205 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3206 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3207 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3209 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3210 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3212 /* used for adaptive IFS */
3214 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3215 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3216 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3217 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3219 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3220 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3221 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3222 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3223 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3225 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3226 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3227 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3228 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3229 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3230 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3231 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3232 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3233 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3235 /* Fill out the OS statistics structure */
3236 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3237 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3241 /* RLEC on some newer hardware can be incorrect so build
3242 * our own version based on RUC and ROC */
3243 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3244 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3245 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3246 adapter
->stats
.cexterr
;
3247 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3249 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3250 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3251 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3254 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3255 adapter
->stats
.latecol
;
3256 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3257 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3258 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3260 /* Tx Dropped needs to be maintained elsewhere */
3263 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3264 if ((adapter
->link_speed
== SPEED_1000
) &&
3265 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
,
3267 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3268 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3272 /* Management Stats */
3273 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3274 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3275 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3279 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3281 struct net_device
*netdev
= data
;
3282 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3283 struct e1000_hw
*hw
= &adapter
->hw
;
3284 u32 icr
= rd32(E1000_ICR
);
3286 /* reading ICR causes bit 31 of EICR to be cleared */
3288 if(icr
& E1000_ICR_DOUTSYNC
) {
3289 /* HW is reporting DMA is out of sync */
3290 adapter
->stats
.doosync
++;
3292 if (!(icr
& E1000_ICR_LSC
))
3293 goto no_link_interrupt
;
3294 hw
->mac
.get_link_status
= 1;
3295 /* guard against interrupt when we're going down */
3296 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3297 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3300 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
);
3301 wr32(E1000_EIMS
, adapter
->eims_other
);
3306 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3308 struct igb_ring
*tx_ring
= data
;
3309 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3310 struct e1000_hw
*hw
= &adapter
->hw
;
3312 #ifdef CONFIG_IGB_DCA
3313 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3314 igb_update_tx_dca(tx_ring
);
3316 tx_ring
->total_bytes
= 0;
3317 tx_ring
->total_packets
= 0;
3319 /* auto mask will automatically reenable the interrupt when we write
3321 if (!igb_clean_tx_irq(tx_ring
))
3322 /* Ring was not completely cleaned, so fire another interrupt */
3323 wr32(E1000_EICS
, tx_ring
->eims_value
);
3325 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3330 static void igb_write_itr(struct igb_ring
*ring
)
3332 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3333 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3334 switch (hw
->mac
.type
) {
3336 wr32(ring
->itr_register
,
3341 wr32(ring
->itr_register
,
3343 (ring
->itr_val
<< 16));
3350 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3352 struct igb_ring
*rx_ring
= data
;
3354 /* Write the ITR value calculated at the end of the
3355 * previous interrupt.
3358 igb_write_itr(rx_ring
);
3360 if (napi_schedule_prep(&rx_ring
->napi
))
3361 __napi_schedule(&rx_ring
->napi
);
3363 #ifdef CONFIG_IGB_DCA
3364 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3365 igb_update_rx_dca(rx_ring
);
3370 #ifdef CONFIG_IGB_DCA
3371 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3374 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3375 struct e1000_hw
*hw
= &adapter
->hw
;
3376 int cpu
= get_cpu();
3377 int q
= rx_ring
->reg_idx
;
3379 if (rx_ring
->cpu
!= cpu
) {
3380 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3381 if (hw
->mac
.type
== e1000_82576
) {
3382 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3383 dca_rxctrl
|= dca_get_tag(cpu
) <<
3384 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3386 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3387 dca_rxctrl
|= dca_get_tag(cpu
);
3389 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3390 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3391 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3392 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3398 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3401 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3402 struct e1000_hw
*hw
= &adapter
->hw
;
3403 int cpu
= get_cpu();
3404 int q
= tx_ring
->reg_idx
;
3406 if (tx_ring
->cpu
!= cpu
) {
3407 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3408 if (hw
->mac
.type
== e1000_82576
) {
3409 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3410 dca_txctrl
|= dca_get_tag(cpu
) <<
3411 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3413 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3414 dca_txctrl
|= dca_get_tag(cpu
);
3416 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3417 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3423 static void igb_setup_dca(struct igb_adapter
*adapter
)
3427 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3430 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3431 adapter
->tx_ring
[i
].cpu
= -1;
3432 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3434 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3435 adapter
->rx_ring
[i
].cpu
= -1;
3436 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3440 static int __igb_notify_dca(struct device
*dev
, void *data
)
3442 struct net_device
*netdev
= dev_get_drvdata(dev
);
3443 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3444 struct e1000_hw
*hw
= &adapter
->hw
;
3445 unsigned long event
= *(unsigned long *)data
;
3448 case DCA_PROVIDER_ADD
:
3449 /* if already enabled, don't do it again */
3450 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3452 /* Always use CB2 mode, difference is masked
3453 * in the CB driver. */
3454 wr32(E1000_DCA_CTRL
, 2);
3455 if (dca_add_requester(dev
) == 0) {
3456 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3457 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3458 igb_setup_dca(adapter
);
3461 /* Fall Through since DCA is disabled. */
3462 case DCA_PROVIDER_REMOVE
:
3463 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3464 /* without this a class_device is left
3465 * hanging around in the sysfs model */
3466 dca_remove_requester(dev
);
3467 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3468 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3469 wr32(E1000_DCA_CTRL
, 1);
3477 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3482 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3485 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3487 #endif /* CONFIG_IGB_DCA */
3490 * igb_intr_msi - Interrupt Handler
3491 * @irq: interrupt number
3492 * @data: pointer to a network interface device structure
3494 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
3496 struct net_device
*netdev
= data
;
3497 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3498 struct e1000_hw
*hw
= &adapter
->hw
;
3499 /* read ICR disables interrupts using IAM */
3500 u32 icr
= rd32(E1000_ICR
);
3502 igb_write_itr(adapter
->rx_ring
);
3504 if(icr
& E1000_ICR_DOUTSYNC
) {
3505 /* HW is reporting DMA is out of sync */
3506 adapter
->stats
.doosync
++;
3509 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3510 hw
->mac
.get_link_status
= 1;
3511 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3512 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3515 napi_schedule(&adapter
->rx_ring
[0].napi
);
3521 * igb_intr - Legacy Interrupt Handler
3522 * @irq: interrupt number
3523 * @data: pointer to a network interface device structure
3525 static irqreturn_t
igb_intr(int irq
, void *data
)
3527 struct net_device
*netdev
= data
;
3528 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3529 struct e1000_hw
*hw
= &adapter
->hw
;
3530 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3531 * need for the IMC write */
3532 u32 icr
= rd32(E1000_ICR
);
3534 return IRQ_NONE
; /* Not our interrupt */
3536 igb_write_itr(adapter
->rx_ring
);
3538 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3539 * not set, then the adapter didn't send an interrupt */
3540 if (!(icr
& E1000_ICR_INT_ASSERTED
))
3543 if(icr
& E1000_ICR_DOUTSYNC
) {
3544 /* HW is reporting DMA is out of sync */
3545 adapter
->stats
.doosync
++;
3548 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3549 hw
->mac
.get_link_status
= 1;
3550 /* guard against interrupt when we're going down */
3551 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3552 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3555 napi_schedule(&adapter
->rx_ring
[0].napi
);
3561 * igb_poll - NAPI Rx polling callback
3562 * @napi: napi polling structure
3563 * @budget: count of how many packets we should handle
3565 static int igb_poll(struct napi_struct
*napi
, int budget
)
3567 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3568 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3569 struct net_device
*netdev
= adapter
->netdev
;
3570 int tx_clean_complete
, work_done
= 0;
3572 /* this poll routine only supports one tx and one rx queue */
3573 #ifdef CONFIG_IGB_DCA
3574 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3575 igb_update_tx_dca(&adapter
->tx_ring
[0]);
3577 tx_clean_complete
= igb_clean_tx_irq(&adapter
->tx_ring
[0]);
3579 #ifdef CONFIG_IGB_DCA
3580 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3581 igb_update_rx_dca(&adapter
->rx_ring
[0]);
3583 igb_clean_rx_irq_adv(&adapter
->rx_ring
[0], &work_done
, budget
);
3585 /* If no Tx and not enough Rx work done, exit the polling mode */
3586 if ((tx_clean_complete
&& (work_done
< budget
)) ||
3587 !netif_running(netdev
)) {
3588 if (adapter
->itr_setting
& 3)
3589 igb_set_itr(adapter
);
3590 napi_complete(napi
);
3591 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3592 igb_irq_enable(adapter
);
3599 static int igb_clean_rx_ring_msix(struct napi_struct
*napi
, int budget
)
3601 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3602 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3603 struct e1000_hw
*hw
= &adapter
->hw
;
3604 struct net_device
*netdev
= adapter
->netdev
;
3607 #ifdef CONFIG_IGB_DCA
3608 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3609 igb_update_rx_dca(rx_ring
);
3611 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
3614 /* If not enough Rx work done, exit the polling mode */
3615 if ((work_done
== 0) || !netif_running(netdev
)) {
3616 napi_complete(napi
);
3618 if (adapter
->itr_setting
& 3) {
3619 if (adapter
->num_rx_queues
== 1)
3620 igb_set_itr(adapter
);
3622 igb_update_ring_itr(rx_ring
);
3625 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3626 wr32(E1000_EIMS
, rx_ring
->eims_value
);
3635 * igb_clean_tx_irq - Reclaim resources after transmit completes
3636 * @adapter: board private structure
3637 * returns true if ring is completely cleaned
3639 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
3641 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3642 struct net_device
*netdev
= adapter
->netdev
;
3643 struct e1000_hw
*hw
= &adapter
->hw
;
3644 struct igb_buffer
*buffer_info
;
3645 struct sk_buff
*skb
;
3646 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
3647 unsigned int total_bytes
= 0, total_packets
= 0;
3648 unsigned int i
, eop
, count
= 0;
3649 bool cleaned
= false;
3651 i
= tx_ring
->next_to_clean
;
3652 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3653 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3655 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
3656 (count
< tx_ring
->count
)) {
3657 for (cleaned
= false; !cleaned
; count
++) {
3658 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3659 buffer_info
= &tx_ring
->buffer_info
[i
];
3660 cleaned
= (i
== eop
);
3661 skb
= buffer_info
->skb
;
3664 unsigned int segs
, bytecount
;
3665 /* gso_segs is currently only valid for tcp */
3666 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
3667 /* multiply data chunks by size of headers */
3668 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
3670 total_packets
+= segs
;
3671 total_bytes
+= bytecount
;
3674 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
3675 tx_desc
->wb
.status
= 0;
3678 if (i
== tx_ring
->count
)
3682 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3683 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3686 tx_ring
->next_to_clean
= i
;
3688 if (unlikely(count
&&
3689 netif_carrier_ok(netdev
) &&
3690 IGB_DESC_UNUSED(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
3691 /* Make sure that anybody stopping the queue after this
3692 * sees the new next_to_clean.
3695 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
3696 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
3697 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3698 ++adapter
->restart_queue
;
3702 if (tx_ring
->detect_tx_hung
) {
3703 /* Detect a transmit hang in hardware, this serializes the
3704 * check with the clearing of time_stamp and movement of i */
3705 tx_ring
->detect_tx_hung
= false;
3706 if (tx_ring
->buffer_info
[i
].time_stamp
&&
3707 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
3708 (adapter
->tx_timeout_factor
* HZ
))
3709 && !(rd32(E1000_STATUS
) &
3710 E1000_STATUS_TXOFF
)) {
3712 /* detected Tx unit hang */
3713 dev_err(&adapter
->pdev
->dev
,
3714 "Detected Tx Unit Hang\n"
3718 " next_to_use <%x>\n"
3719 " next_to_clean <%x>\n"
3720 "buffer_info[next_to_clean]\n"
3721 " time_stamp <%lx>\n"
3722 " next_to_watch <%x>\n"
3724 " desc.status <%x>\n",
3725 tx_ring
->queue_index
,
3726 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
3727 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
3728 tx_ring
->next_to_use
,
3729 tx_ring
->next_to_clean
,
3730 tx_ring
->buffer_info
[i
].time_stamp
,
3733 eop_desc
->wb
.status
);
3734 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3737 tx_ring
->total_bytes
+= total_bytes
;
3738 tx_ring
->total_packets
+= total_packets
;
3739 tx_ring
->tx_stats
.bytes
+= total_bytes
;
3740 tx_ring
->tx_stats
.packets
+= total_packets
;
3741 adapter
->net_stats
.tx_bytes
+= total_bytes
;
3742 adapter
->net_stats
.tx_packets
+= total_packets
;
3743 return (count
< tx_ring
->count
);
3747 * igb_receive_skb - helper function to handle rx indications
3748 * @ring: pointer to receive ring receving this packet
3749 * @status: descriptor status field as written by hardware
3750 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3751 * @skb: pointer to sk_buff to be indicated to stack
3753 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
3754 union e1000_adv_rx_desc
* rx_desc
,
3755 struct sk_buff
*skb
)
3757 struct igb_adapter
* adapter
= ring
->adapter
;
3758 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
3760 skb_record_rx_queue(skb
, ring
->queue_index
);
3761 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
3763 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
3764 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
3767 napi_gro_receive(&ring
->napi
, skb
);
3770 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
3771 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
3773 netif_receive_skb(skb
);
3778 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
3779 u32 status_err
, struct sk_buff
*skb
)
3781 skb
->ip_summed
= CHECKSUM_NONE
;
3783 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3784 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
3786 /* TCP/UDP checksum error bit is set */
3788 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
3789 /* let the stack verify checksum errors */
3790 adapter
->hw_csum_err
++;
3793 /* It must be a TCP or UDP packet with a valid checksum */
3794 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
3795 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
3797 adapter
->hw_csum_good
++;
3800 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
3801 int *work_done
, int budget
)
3803 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3804 struct net_device
*netdev
= adapter
->netdev
;
3805 struct pci_dev
*pdev
= adapter
->pdev
;
3806 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
3807 struct igb_buffer
*buffer_info
, *next_buffer
;
3808 struct sk_buff
*skb
;
3810 u32 length
, hlen
, staterr
;
3811 bool cleaned
= false;
3812 int cleaned_count
= 0;
3813 unsigned int total_bytes
= 0, total_packets
= 0;
3815 i
= rx_ring
->next_to_clean
;
3816 buffer_info
= &rx_ring
->buffer_info
[i
];
3817 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3818 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3820 while (staterr
& E1000_RXD_STAT_DD
) {
3821 if (*work_done
>= budget
)
3825 skb
= buffer_info
->skb
;
3826 prefetch(skb
->data
- NET_IP_ALIGN
);
3827 buffer_info
->skb
= NULL
;
3830 if (i
== rx_ring
->count
)
3832 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3834 next_buffer
= &rx_ring
->buffer_info
[i
];
3836 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
3840 if (!adapter
->rx_ps_hdr_size
) {
3841 pci_unmap_single(pdev
, buffer_info
->dma
,
3842 adapter
->rx_buffer_len
+
3844 PCI_DMA_FROMDEVICE
);
3845 skb_put(skb
, length
);
3849 /* HW will not DMA in data larger than the given buffer, even
3850 * if it parses the (NFS, of course) header to be larger. In
3851 * that case, it fills the header buffer and spills the rest
3854 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
3855 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
3856 if (hlen
> adapter
->rx_ps_hdr_size
)
3857 hlen
= adapter
->rx_ps_hdr_size
;
3859 if (!skb_shinfo(skb
)->nr_frags
) {
3860 pci_unmap_single(pdev
, buffer_info
->dma
,
3861 adapter
->rx_ps_hdr_size
+
3863 PCI_DMA_FROMDEVICE
);
3868 pci_unmap_page(pdev
, buffer_info
->page_dma
,
3869 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
3870 buffer_info
->page_dma
= 0;
3872 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
3874 buffer_info
->page_offset
,
3877 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
3878 (page_count(buffer_info
->page
) != 1))
3879 buffer_info
->page
= NULL
;
3881 get_page(buffer_info
->page
);
3884 skb
->data_len
+= length
;
3886 skb
->truesize
+= length
;
3889 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
3890 buffer_info
->skb
= next_buffer
->skb
;
3891 buffer_info
->dma
= next_buffer
->dma
;
3892 next_buffer
->skb
= skb
;
3893 next_buffer
->dma
= 0;
3897 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
3898 dev_kfree_skb_irq(skb
);
3902 total_bytes
+= skb
->len
;
3905 igb_rx_checksum_adv(adapter
, staterr
, skb
);
3907 skb
->protocol
= eth_type_trans(skb
, netdev
);
3909 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
3912 rx_desc
->wb
.upper
.status_error
= 0;
3914 /* return some buffers to hardware, one at a time is too slow */
3915 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
3916 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
3920 /* use prefetched values */
3922 buffer_info
= next_buffer
;
3923 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3926 rx_ring
->next_to_clean
= i
;
3927 cleaned_count
= IGB_DESC_UNUSED(rx_ring
);
3930 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
3932 rx_ring
->total_packets
+= total_packets
;
3933 rx_ring
->total_bytes
+= total_bytes
;
3934 rx_ring
->rx_stats
.packets
+= total_packets
;
3935 rx_ring
->rx_stats
.bytes
+= total_bytes
;
3936 adapter
->net_stats
.rx_bytes
+= total_bytes
;
3937 adapter
->net_stats
.rx_packets
+= total_packets
;
3943 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3944 * @adapter: address of board private structure
3946 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
3949 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3950 struct net_device
*netdev
= adapter
->netdev
;
3951 struct pci_dev
*pdev
= adapter
->pdev
;
3952 union e1000_adv_rx_desc
*rx_desc
;
3953 struct igb_buffer
*buffer_info
;
3954 struct sk_buff
*skb
;
3958 i
= rx_ring
->next_to_use
;
3959 buffer_info
= &rx_ring
->buffer_info
[i
];
3961 if (adapter
->rx_ps_hdr_size
)
3962 bufsz
= adapter
->rx_ps_hdr_size
;
3964 bufsz
= adapter
->rx_buffer_len
;
3965 bufsz
+= NET_IP_ALIGN
;
3967 while (cleaned_count
--) {
3968 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3970 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
3971 if (!buffer_info
->page
) {
3972 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
3973 if (!buffer_info
->page
) {
3974 adapter
->alloc_rx_buff_failed
++;
3977 buffer_info
->page_offset
= 0;
3979 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
3981 buffer_info
->page_dma
=
3982 pci_map_page(pdev
, buffer_info
->page
,
3983 buffer_info
->page_offset
,
3985 PCI_DMA_FROMDEVICE
);
3988 if (!buffer_info
->skb
) {
3989 skb
= netdev_alloc_skb(netdev
, bufsz
);
3991 adapter
->alloc_rx_buff_failed
++;
3995 /* Make buffer alignment 2 beyond a 16 byte boundary
3996 * this will result in a 16 byte aligned IP header after
3997 * the 14 byte MAC header is removed
3999 skb_reserve(skb
, NET_IP_ALIGN
);
4001 buffer_info
->skb
= skb
;
4002 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4004 PCI_DMA_FROMDEVICE
);
4006 /* Refresh the desc even if buffer_addrs didn't change because
4007 * each write-back erases this info. */
4008 if (adapter
->rx_ps_hdr_size
) {
4009 rx_desc
->read
.pkt_addr
=
4010 cpu_to_le64(buffer_info
->page_dma
);
4011 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4013 rx_desc
->read
.pkt_addr
=
4014 cpu_to_le64(buffer_info
->dma
);
4015 rx_desc
->read
.hdr_addr
= 0;
4019 if (i
== rx_ring
->count
)
4021 buffer_info
= &rx_ring
->buffer_info
[i
];
4025 if (rx_ring
->next_to_use
!= i
) {
4026 rx_ring
->next_to_use
= i
;
4028 i
= (rx_ring
->count
- 1);
4032 /* Force memory writes to complete before letting h/w
4033 * know there are new descriptors to fetch. (Only
4034 * applicable for weak-ordered memory model archs,
4035 * such as IA-64). */
4037 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4047 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4049 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4050 struct mii_ioctl_data
*data
= if_mii(ifr
);
4052 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4057 data
->phy_id
= adapter
->hw
.phy
.addr
;
4060 if (!capable(CAP_NET_ADMIN
))
4062 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4079 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4085 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4091 static void igb_vlan_rx_register(struct net_device
*netdev
,
4092 struct vlan_group
*grp
)
4094 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4095 struct e1000_hw
*hw
= &adapter
->hw
;
4098 igb_irq_disable(adapter
);
4099 adapter
->vlgrp
= grp
;
4102 /* enable VLAN tag insert/strip */
4103 ctrl
= rd32(E1000_CTRL
);
4104 ctrl
|= E1000_CTRL_VME
;
4105 wr32(E1000_CTRL
, ctrl
);
4107 /* enable VLAN receive filtering */
4108 rctl
= rd32(E1000_RCTL
);
4109 rctl
&= ~E1000_RCTL_CFIEN
;
4110 wr32(E1000_RCTL
, rctl
);
4111 igb_update_mng_vlan(adapter
);
4113 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
4115 /* disable VLAN tag insert/strip */
4116 ctrl
= rd32(E1000_CTRL
);
4117 ctrl
&= ~E1000_CTRL_VME
;
4118 wr32(E1000_CTRL
, ctrl
);
4120 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4121 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4122 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4125 adapter
->max_frame_size
);
4128 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4129 igb_irq_enable(adapter
);
4132 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4134 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4135 struct e1000_hw
*hw
= &adapter
->hw
;
4138 if ((hw
->mng_cookie
.status
&
4139 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4140 (vid
== adapter
->mng_vlan_id
))
4142 /* add VID to filter table */
4143 index
= (vid
>> 5) & 0x7F;
4144 vfta
= array_rd32(E1000_VFTA
, index
);
4145 vfta
|= (1 << (vid
& 0x1F));
4146 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4149 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4151 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4152 struct e1000_hw
*hw
= &adapter
->hw
;
4155 igb_irq_disable(adapter
);
4156 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4158 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4159 igb_irq_enable(adapter
);
4161 if ((adapter
->hw
.mng_cookie
.status
&
4162 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4163 (vid
== adapter
->mng_vlan_id
)) {
4164 /* release control to f/w */
4165 igb_release_hw_control(adapter
);
4169 /* remove VID from filter table */
4170 index
= (vid
>> 5) & 0x7F;
4171 vfta
= array_rd32(E1000_VFTA
, index
);
4172 vfta
&= ~(1 << (vid
& 0x1F));
4173 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4176 static void igb_restore_vlan(struct igb_adapter
*adapter
)
4178 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
4180 if (adapter
->vlgrp
) {
4182 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
4183 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
4185 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
4190 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
4192 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
4196 /* Fiber NICs only allow 1000 gbps Full duplex */
4197 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
4198 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
4199 dev_err(&adapter
->pdev
->dev
,
4200 "Unsupported Speed/Duplex configuration\n");
4205 case SPEED_10
+ DUPLEX_HALF
:
4206 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
4208 case SPEED_10
+ DUPLEX_FULL
:
4209 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
4211 case SPEED_100
+ DUPLEX_HALF
:
4212 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
4214 case SPEED_100
+ DUPLEX_FULL
:
4215 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
4217 case SPEED_1000
+ DUPLEX_FULL
:
4219 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
4221 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
4223 dev_err(&adapter
->pdev
->dev
,
4224 "Unsupported Speed/Duplex configuration\n");
4231 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4233 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4234 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4235 struct e1000_hw
*hw
= &adapter
->hw
;
4236 u32 ctrl
, rctl
, status
;
4237 u32 wufc
= adapter
->wol
;
4242 netif_device_detach(netdev
);
4244 if (netif_running(netdev
))
4247 igb_reset_interrupt_capability(adapter
);
4249 igb_free_queues(adapter
);
4252 retval
= pci_save_state(pdev
);
4257 status
= rd32(E1000_STATUS
);
4258 if (status
& E1000_STATUS_LU
)
4259 wufc
&= ~E1000_WUFC_LNKC
;
4262 igb_setup_rctl(adapter
);
4263 igb_set_multi(netdev
);
4265 /* turn on all-multi mode if wake on multicast is enabled */
4266 if (wufc
& E1000_WUFC_MC
) {
4267 rctl
= rd32(E1000_RCTL
);
4268 rctl
|= E1000_RCTL_MPE
;
4269 wr32(E1000_RCTL
, rctl
);
4272 ctrl
= rd32(E1000_CTRL
);
4273 /* advertise wake from D3Cold */
4274 #define E1000_CTRL_ADVD3WUC 0x00100000
4275 /* phy power management enable */
4276 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4277 ctrl
|= E1000_CTRL_ADVD3WUC
;
4278 wr32(E1000_CTRL
, ctrl
);
4280 /* Allow time for pending master requests to run */
4281 igb_disable_pcie_master(&adapter
->hw
);
4283 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
4284 wr32(E1000_WUFC
, wufc
);
4287 wr32(E1000_WUFC
, 0);
4290 /* make sure adapter isn't asleep if manageability/wol is enabled */
4291 if (wufc
|| adapter
->en_mng_pt
) {
4292 pci_enable_wake(pdev
, PCI_D3hot
, 1);
4293 pci_enable_wake(pdev
, PCI_D3cold
, 1);
4295 igb_shutdown_fiber_serdes_link_82575(hw
);
4296 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4297 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4300 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4301 * would have already happened in close and is redundant. */
4302 igb_release_hw_control(adapter
);
4304 pci_disable_device(pdev
);
4306 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
4312 static int igb_resume(struct pci_dev
*pdev
)
4314 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4315 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4316 struct e1000_hw
*hw
= &adapter
->hw
;
4319 pci_set_power_state(pdev
, PCI_D0
);
4320 pci_restore_state(pdev
);
4322 err
= pci_enable_device_mem(pdev
);
4325 "igb: Cannot enable PCI device from suspend\n");
4328 pci_set_master(pdev
);
4330 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4331 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4333 igb_set_interrupt_capability(adapter
);
4335 if (igb_alloc_queues(adapter
)) {
4336 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
4340 /* e1000_power_up_phy(adapter); */
4344 /* let the f/w know that the h/w is now under the control of the
4346 igb_get_hw_control(adapter
);
4348 wr32(E1000_WUS
, ~0);
4350 if (netif_running(netdev
)) {
4351 err
= igb_open(netdev
);
4356 netif_device_attach(netdev
);
4362 static void igb_shutdown(struct pci_dev
*pdev
)
4364 igb_suspend(pdev
, PMSG_SUSPEND
);
4367 #ifdef CONFIG_NET_POLL_CONTROLLER
4369 * Polling 'interrupt' - used by things like netconsole to send skbs
4370 * without having to re-enable interrupts. It's not called while
4371 * the interrupt routine is executing.
4373 static void igb_netpoll(struct net_device
*netdev
)
4375 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4376 struct e1000_hw
*hw
= &adapter
->hw
;
4379 if (!adapter
->msix_entries
) {
4380 igb_irq_disable(adapter
);
4381 napi_schedule(&adapter
->rx_ring
[0].napi
);
4385 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4386 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
4387 wr32(E1000_EIMC
, tx_ring
->eims_value
);
4388 igb_clean_tx_irq(tx_ring
);
4389 wr32(E1000_EIMS
, tx_ring
->eims_value
);
4392 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4393 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
4394 wr32(E1000_EIMC
, rx_ring
->eims_value
);
4395 napi_schedule(&rx_ring
->napi
);
4398 #endif /* CONFIG_NET_POLL_CONTROLLER */
4401 * igb_io_error_detected - called when PCI error is detected
4402 * @pdev: Pointer to PCI device
4403 * @state: The current pci connection state
4405 * This function is called after a PCI bus error affecting
4406 * this device has been detected.
4408 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
4409 pci_channel_state_t state
)
4411 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4412 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4414 netif_device_detach(netdev
);
4416 if (netif_running(netdev
))
4418 pci_disable_device(pdev
);
4420 /* Request a slot slot reset. */
4421 return PCI_ERS_RESULT_NEED_RESET
;
4425 * igb_io_slot_reset - called after the pci bus has been reset.
4426 * @pdev: Pointer to PCI device
4428 * Restart the card from scratch, as if from a cold-boot. Implementation
4429 * resembles the first-half of the igb_resume routine.
4431 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
4433 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4434 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4435 struct e1000_hw
*hw
= &adapter
->hw
;
4436 pci_ers_result_t result
;
4439 if (pci_enable_device_mem(pdev
)) {
4441 "Cannot re-enable PCI device after reset.\n");
4442 result
= PCI_ERS_RESULT_DISCONNECT
;
4444 pci_set_master(pdev
);
4445 pci_restore_state(pdev
);
4447 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4448 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4451 wr32(E1000_WUS
, ~0);
4452 result
= PCI_ERS_RESULT_RECOVERED
;
4455 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4457 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
4458 "failed 0x%0x\n", err
);
4459 /* non-fatal, continue */
4466 * igb_io_resume - called when traffic can start flowing again.
4467 * @pdev: Pointer to PCI device
4469 * This callback is called when the error recovery driver tells us that
4470 * its OK to resume normal operation. Implementation resembles the
4471 * second-half of the igb_resume routine.
4473 static void igb_io_resume(struct pci_dev
*pdev
)
4475 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4476 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4478 if (netif_running(netdev
)) {
4479 if (igb_up(adapter
)) {
4480 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
4485 netif_device_attach(netdev
);
4487 /* let the f/w know that the h/w is now under the control of the
4489 igb_get_hw_control(adapter
);