1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/pci-aspm.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/if_ether.h>
46 #include <linux/aer.h>
48 #include <linux/dca.h>
52 #define DRV_VERSION "1.3.16-k2"
53 char igb_driver_name
[] = "igb";
54 char igb_driver_version
[] = DRV_VERSION
;
55 static const char igb_driver_string
[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
57 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
59 static const struct e1000_info
*igb_info_tbl
[] = {
60 [board_82575
] = &e1000_82575_info
,
63 static struct pci_device_id igb_pci_tbl
[] = {
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
69 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
70 /* required last entry */
74 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
76 void igb_reset(struct igb_adapter
*);
77 static int igb_setup_all_tx_resources(struct igb_adapter
*);
78 static int igb_setup_all_rx_resources(struct igb_adapter
*);
79 static void igb_free_all_tx_resources(struct igb_adapter
*);
80 static void igb_free_all_rx_resources(struct igb_adapter
*);
81 void igb_update_stats(struct igb_adapter
*);
82 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
83 static void __devexit
igb_remove(struct pci_dev
*pdev
);
84 static int igb_sw_init(struct igb_adapter
*);
85 static int igb_open(struct net_device
*);
86 static int igb_close(struct net_device
*);
87 static void igb_configure_tx(struct igb_adapter
*);
88 static void igb_configure_rx(struct igb_adapter
*);
89 static void igb_setup_rctl(struct igb_adapter
*);
90 static void igb_clean_all_tx_rings(struct igb_adapter
*);
91 static void igb_clean_all_rx_rings(struct igb_adapter
*);
92 static void igb_clean_tx_ring(struct igb_ring
*);
93 static void igb_clean_rx_ring(struct igb_ring
*);
94 static void igb_set_multi(struct net_device
*);
95 static void igb_update_phy_info(unsigned long);
96 static void igb_watchdog(unsigned long);
97 static void igb_watchdog_task(struct work_struct
*);
98 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
100 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
101 static struct net_device_stats
*igb_get_stats(struct net_device
*);
102 static int igb_change_mtu(struct net_device
*, int);
103 static int igb_set_mac(struct net_device
*, void *);
104 static irqreturn_t
igb_intr(int irq
, void *);
105 static irqreturn_t
igb_intr_msi(int irq
, void *);
106 static irqreturn_t
igb_msix_other(int irq
, void *);
107 static irqreturn_t
igb_msix_rx(int irq
, void *);
108 static irqreturn_t
igb_msix_tx(int irq
, void *);
109 static int igb_clean_rx_ring_msix(struct napi_struct
*, int);
110 #ifdef CONFIG_IGB_DCA
111 static void igb_update_rx_dca(struct igb_ring
*);
112 static void igb_update_tx_dca(struct igb_ring
*);
113 static void igb_setup_dca(struct igb_adapter
*);
114 #endif /* CONFIG_IGB_DCA */
115 static bool igb_clean_tx_irq(struct igb_ring
*);
116 static int igb_poll(struct napi_struct
*, int);
117 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
118 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
119 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
120 static void igb_tx_timeout(struct net_device
*);
121 static void igb_reset_task(struct work_struct
*);
122 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
123 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
124 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
125 static void igb_restore_vlan(struct igb_adapter
*);
127 static int igb_suspend(struct pci_dev
*, pm_message_t
);
129 static int igb_resume(struct pci_dev
*);
131 static void igb_shutdown(struct pci_dev
*);
132 #ifdef CONFIG_IGB_DCA
133 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
134 static struct notifier_block dca_notifier
= {
135 .notifier_call
= igb_notify_dca
,
141 #ifdef CONFIG_NET_POLL_CONTROLLER
142 /* for netdump / net console */
143 static void igb_netpoll(struct net_device
*);
146 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
147 pci_channel_state_t
);
148 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
149 static void igb_io_resume(struct pci_dev
*);
151 static struct pci_error_handlers igb_err_handler
= {
152 .error_detected
= igb_io_error_detected
,
153 .slot_reset
= igb_io_slot_reset
,
154 .resume
= igb_io_resume
,
158 static struct pci_driver igb_driver
= {
159 .name
= igb_driver_name
,
160 .id_table
= igb_pci_tbl
,
162 .remove
= __devexit_p(igb_remove
),
164 /* Power Managment Hooks */
165 .suspend
= igb_suspend
,
166 .resume
= igb_resume
,
168 .shutdown
= igb_shutdown
,
169 .err_handler
= &igb_err_handler
172 static int global_quad_port_a
; /* global quad port a indication */
174 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
175 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
176 MODULE_LICENSE("GPL");
177 MODULE_VERSION(DRV_VERSION
);
180 * Scale the NIC clock cycle by a large factor so that
181 * relatively small clock corrections can be added or
182 * substracted at each clock tick. The drawbacks of a
183 * large factor are a) that the clock register overflows
184 * more quickly (not such a big deal) and b) that the
185 * increment per tick has to fit into 24 bits.
188 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
190 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
192 * The base scale factor is intentionally a power of two
193 * so that the division in %struct timecounter can be done with
196 #define IGB_TSYNC_SHIFT (19)
197 #define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
200 * The duration of one clock cycle of the NIC.
202 * @todo This hard-coded value is part of the specification and might change
203 * in future hardware revisions. Add revision check.
205 #define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
207 #if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
208 # error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
212 * igb_read_clock - read raw cycle counter (to be used by time counter)
214 static cycle_t
igb_read_clock(const struct cyclecounter
*tc
)
216 struct igb_adapter
*adapter
=
217 container_of(tc
, struct igb_adapter
, cycles
);
218 struct e1000_hw
*hw
= &adapter
->hw
;
221 stamp
= rd32(E1000_SYSTIML
);
222 stamp
|= (u64
)rd32(E1000_SYSTIMH
) << 32ULL;
229 * igb_get_hw_dev_name - return device name string
230 * used by hardware layer to print debugging information
232 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
234 struct igb_adapter
*adapter
= hw
->back
;
235 return adapter
->netdev
->name
;
239 * igb_get_time_str - format current NIC and system time as string
241 static char *igb_get_time_str(struct igb_adapter
*adapter
,
244 cycle_t hw
= adapter
->cycles
.read(&adapter
->cycles
);
245 struct timespec nic
= ns_to_timespec(timecounter_read(&adapter
->clock
));
247 struct timespec delta
;
248 getnstimeofday(&sys
);
250 delta
= timespec_sub(nic
, sys
);
253 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
255 (long)nic
.tv_sec
, nic
.tv_nsec
,
256 (long)sys
.tv_sec
, sys
.tv_nsec
,
257 (long)delta
.tv_sec
, delta
.tv_nsec
);
264 * igb_init_module - Driver Registration Routine
266 * igb_init_module is the first routine called when the driver is
267 * loaded. All it does is register with the PCI subsystem.
269 static int __init
igb_init_module(void)
272 printk(KERN_INFO
"%s - version %s\n",
273 igb_driver_string
, igb_driver_version
);
275 printk(KERN_INFO
"%s\n", igb_copyright
);
277 global_quad_port_a
= 0;
279 #ifdef CONFIG_IGB_DCA
280 dca_register_notify(&dca_notifier
);
283 ret
= pci_register_driver(&igb_driver
);
287 module_init(igb_init_module
);
290 * igb_exit_module - Driver Exit Cleanup Routine
292 * igb_exit_module is called just before the driver is removed
295 static void __exit
igb_exit_module(void)
297 #ifdef CONFIG_IGB_DCA
298 dca_unregister_notify(&dca_notifier
);
300 pci_unregister_driver(&igb_driver
);
303 module_exit(igb_exit_module
);
305 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
307 * igb_cache_ring_register - Descriptor ring to register mapping
308 * @adapter: board private structure to initialize
310 * Once we know the feature-set enabled for the device, we'll cache
311 * the register offset the descriptor ring is assigned to.
313 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
317 switch (adapter
->hw
.mac
.type
) {
319 /* The queues are allocated for virtualization such that VF 0
320 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
321 * In order to avoid collision we start at the first free queue
322 * and continue consuming queues in the same sequence
324 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
325 adapter
->rx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
326 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
327 adapter
->tx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
331 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
332 adapter
->rx_ring
[i
].reg_idx
= i
;
333 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
334 adapter
->tx_ring
[i
].reg_idx
= i
;
340 * igb_alloc_queues - Allocate memory for all rings
341 * @adapter: board private structure to initialize
343 * We allocate one ring per queue at run-time since we don't know the
344 * number of queues at compile-time.
346 static int igb_alloc_queues(struct igb_adapter
*adapter
)
350 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
351 sizeof(struct igb_ring
), GFP_KERNEL
);
352 if (!adapter
->tx_ring
)
355 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
356 sizeof(struct igb_ring
), GFP_KERNEL
);
357 if (!adapter
->rx_ring
) {
358 kfree(adapter
->tx_ring
);
362 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
364 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
365 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
366 ring
->count
= adapter
->tx_ring_count
;
367 ring
->adapter
= adapter
;
368 ring
->queue_index
= i
;
370 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
371 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
372 ring
->count
= adapter
->rx_ring_count
;
373 ring
->adapter
= adapter
;
374 ring
->queue_index
= i
;
375 ring
->itr_register
= E1000_ITR
;
377 /* set a default napi handler for each rx_ring */
378 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
381 igb_cache_ring_register(adapter
);
385 static void igb_free_queues(struct igb_adapter
*adapter
)
389 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
390 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
392 kfree(adapter
->tx_ring
);
393 kfree(adapter
->rx_ring
);
396 #define IGB_N0_QUEUE -1
397 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
398 int tx_queue
, int msix_vector
)
401 struct e1000_hw
*hw
= &adapter
->hw
;
404 switch (hw
->mac
.type
) {
406 /* The 82575 assigns vectors using a bitmask, which matches the
407 bitmask for the EICR/EIMS/EIMC registers. To assign one
408 or more queues to a vector, we write the appropriate bits
409 into the MSIXBM register for that vector. */
410 if (rx_queue
> IGB_N0_QUEUE
) {
411 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
412 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
414 if (tx_queue
> IGB_N0_QUEUE
) {
415 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
416 adapter
->tx_ring
[tx_queue
].eims_value
=
417 E1000_EICR_TX_QUEUE0
<< tx_queue
;
419 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
422 /* 82576 uses a table-based method for assigning vectors.
423 Each queue has a single entry in the table to which we write
424 a vector number along with a "valid" bit. Sadly, the layout
425 of the table is somewhat counterintuitive. */
426 if (rx_queue
> IGB_N0_QUEUE
) {
427 index
= (rx_queue
>> 1);
428 ivar
= array_rd32(E1000_IVAR0
, index
);
429 if (rx_queue
& 0x1) {
430 /* vector goes into third byte of register */
431 ivar
= ivar
& 0xFF00FFFF;
432 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
434 /* vector goes into low byte of register */
435 ivar
= ivar
& 0xFFFFFF00;
436 ivar
|= msix_vector
| E1000_IVAR_VALID
;
438 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
439 array_wr32(E1000_IVAR0
, index
, ivar
);
441 if (tx_queue
> IGB_N0_QUEUE
) {
442 index
= (tx_queue
>> 1);
443 ivar
= array_rd32(E1000_IVAR0
, index
);
444 if (tx_queue
& 0x1) {
445 /* vector goes into high byte of register */
446 ivar
= ivar
& 0x00FFFFFF;
447 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
449 /* vector goes into second byte of register */
450 ivar
= ivar
& 0xFFFF00FF;
451 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
453 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
454 array_wr32(E1000_IVAR0
, index
, ivar
);
464 * igb_configure_msix - Configure MSI-X hardware
466 * igb_configure_msix sets up the hardware to properly
467 * generate MSI-X interrupts.
469 static void igb_configure_msix(struct igb_adapter
*adapter
)
473 struct e1000_hw
*hw
= &adapter
->hw
;
475 adapter
->eims_enable_mask
= 0;
476 if (hw
->mac
.type
== e1000_82576
)
477 /* Turn on MSI-X capability first, or our settings
478 * won't stick. And it will take days to debug. */
479 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
480 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
483 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
484 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
485 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
486 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
487 if (tx_ring
->itr_val
)
488 writel(tx_ring
->itr_val
,
489 hw
->hw_addr
+ tx_ring
->itr_register
);
491 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
494 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
495 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
496 rx_ring
->buddy
= NULL
;
497 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
498 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
499 if (rx_ring
->itr_val
)
500 writel(rx_ring
->itr_val
,
501 hw
->hw_addr
+ rx_ring
->itr_register
);
503 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
507 /* set vector for other causes, i.e. link changes */
508 switch (hw
->mac
.type
) {
510 array_wr32(E1000_MSIXBM(0), vector
++,
513 tmp
= rd32(E1000_CTRL_EXT
);
514 /* enable MSI-X PBA support*/
515 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
517 /* Auto-Mask interrupts upon ICR read. */
518 tmp
|= E1000_CTRL_EXT_EIAME
;
519 tmp
|= E1000_CTRL_EXT_IRCA
;
521 wr32(E1000_CTRL_EXT
, tmp
);
522 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
523 adapter
->eims_other
= E1000_EIMS_OTHER
;
528 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
529 wr32(E1000_IVAR_MISC
, tmp
);
531 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
532 adapter
->eims_other
= 1 << (vector
- 1);
535 /* do nothing, since nothing else supports MSI-X */
537 } /* switch (hw->mac.type) */
542 * igb_request_msix - Initialize MSI-X interrupts
544 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
547 static int igb_request_msix(struct igb_adapter
*adapter
)
549 struct net_device
*netdev
= adapter
->netdev
;
550 int i
, err
= 0, vector
= 0;
554 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
555 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
556 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
557 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
558 &igb_msix_tx
, 0, ring
->name
,
559 &(adapter
->tx_ring
[i
]));
562 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
563 ring
->itr_val
= 976; /* ~4000 ints/sec */
566 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
567 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
568 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
569 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
571 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
572 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
573 &igb_msix_rx
, 0, ring
->name
,
574 &(adapter
->rx_ring
[i
]));
577 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
578 ring
->itr_val
= adapter
->itr
;
579 /* overwrite the poll routine for MSIX, we've already done
581 ring
->napi
.poll
= &igb_clean_rx_ring_msix
;
585 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
586 &igb_msix_other
, 0, netdev
->name
, netdev
);
590 igb_configure_msix(adapter
);
596 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
598 if (adapter
->msix_entries
) {
599 pci_disable_msix(adapter
->pdev
);
600 kfree(adapter
->msix_entries
);
601 adapter
->msix_entries
= NULL
;
602 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
603 pci_disable_msi(adapter
->pdev
);
609 * igb_set_interrupt_capability - set MSI or MSI-X if supported
611 * Attempt to configure interrupts using the best available
612 * capabilities of the hardware and kernel.
614 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
619 /* Number of supported queues. */
620 /* Having more queues than CPUs doesn't make sense. */
621 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
622 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
624 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
625 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
627 if (!adapter
->msix_entries
)
630 for (i
= 0; i
< numvecs
; i
++)
631 adapter
->msix_entries
[i
].entry
= i
;
633 err
= pci_enable_msix(adapter
->pdev
,
634 adapter
->msix_entries
,
639 igb_reset_interrupt_capability(adapter
);
641 /* If we can't do MSI-X, try MSI */
643 adapter
->num_rx_queues
= 1;
644 adapter
->num_tx_queues
= 1;
645 if (!pci_enable_msi(adapter
->pdev
))
646 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
648 /* Notify the stack of the (possibly) reduced Tx Queue count. */
649 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
654 * igb_request_irq - initialize interrupts
656 * Attempts to configure interrupts using the best available
657 * capabilities of the hardware and kernel.
659 static int igb_request_irq(struct igb_adapter
*adapter
)
661 struct net_device
*netdev
= adapter
->netdev
;
662 struct e1000_hw
*hw
= &adapter
->hw
;
665 if (adapter
->msix_entries
) {
666 err
= igb_request_msix(adapter
);
669 /* fall back to MSI */
670 igb_reset_interrupt_capability(adapter
);
671 if (!pci_enable_msi(adapter
->pdev
))
672 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
673 igb_free_all_tx_resources(adapter
);
674 igb_free_all_rx_resources(adapter
);
675 adapter
->num_rx_queues
= 1;
676 igb_alloc_queues(adapter
);
678 switch (hw
->mac
.type
) {
680 wr32(E1000_MSIXBM(0),
681 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
684 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
691 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
692 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
693 netdev
->name
, netdev
);
696 /* fall back to legacy interrupts */
697 igb_reset_interrupt_capability(adapter
);
698 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
701 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
702 netdev
->name
, netdev
);
705 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
712 static void igb_free_irq(struct igb_adapter
*adapter
)
714 struct net_device
*netdev
= adapter
->netdev
;
716 if (adapter
->msix_entries
) {
719 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
720 free_irq(adapter
->msix_entries
[vector
++].vector
,
721 &(adapter
->tx_ring
[i
]));
722 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
723 free_irq(adapter
->msix_entries
[vector
++].vector
,
724 &(adapter
->rx_ring
[i
]));
726 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
730 free_irq(adapter
->pdev
->irq
, netdev
);
734 * igb_irq_disable - Mask off interrupt generation on the NIC
735 * @adapter: board private structure
737 static void igb_irq_disable(struct igb_adapter
*adapter
)
739 struct e1000_hw
*hw
= &adapter
->hw
;
741 if (adapter
->msix_entries
) {
743 wr32(E1000_EIMC
, ~0);
750 synchronize_irq(adapter
->pdev
->irq
);
754 * igb_irq_enable - Enable default interrupt generation settings
755 * @adapter: board private structure
757 static void igb_irq_enable(struct igb_adapter
*adapter
)
759 struct e1000_hw
*hw
= &adapter
->hw
;
761 if (adapter
->msix_entries
) {
762 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
763 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
764 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
765 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
);
767 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
768 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
772 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
774 struct net_device
*netdev
= adapter
->netdev
;
775 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
776 u16 old_vid
= adapter
->mng_vlan_id
;
777 if (adapter
->vlgrp
) {
778 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
779 if (adapter
->hw
.mng_cookie
.status
&
780 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
781 igb_vlan_rx_add_vid(netdev
, vid
);
782 adapter
->mng_vlan_id
= vid
;
784 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
786 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
788 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
789 igb_vlan_rx_kill_vid(netdev
, old_vid
);
791 adapter
->mng_vlan_id
= vid
;
796 * igb_release_hw_control - release control of the h/w to f/w
797 * @adapter: address of board private structure
799 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
800 * For ASF and Pass Through versions of f/w this means that the
801 * driver is no longer loaded.
804 static void igb_release_hw_control(struct igb_adapter
*adapter
)
806 struct e1000_hw
*hw
= &adapter
->hw
;
809 /* Let firmware take over control of h/w */
810 ctrl_ext
= rd32(E1000_CTRL_EXT
);
812 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
817 * igb_get_hw_control - get control of the h/w from f/w
818 * @adapter: address of board private structure
820 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
821 * For ASF and Pass Through versions of f/w this means that
822 * the driver is loaded.
825 static void igb_get_hw_control(struct igb_adapter
*adapter
)
827 struct e1000_hw
*hw
= &adapter
->hw
;
830 /* Let firmware know the driver has taken over */
831 ctrl_ext
= rd32(E1000_CTRL_EXT
);
833 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
837 * igb_configure - configure the hardware for RX and TX
838 * @adapter: private board structure
840 static void igb_configure(struct igb_adapter
*adapter
)
842 struct net_device
*netdev
= adapter
->netdev
;
845 igb_get_hw_control(adapter
);
846 igb_set_multi(netdev
);
848 igb_restore_vlan(adapter
);
850 igb_configure_tx(adapter
);
851 igb_setup_rctl(adapter
);
852 igb_configure_rx(adapter
);
854 igb_rx_fifo_flush_82575(&adapter
->hw
);
856 /* call IGB_DESC_UNUSED which always leaves
857 * at least 1 descriptor unused to make sure
858 * next_to_use != next_to_clean */
859 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
860 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
861 igb_alloc_rx_buffers_adv(ring
, IGB_DESC_UNUSED(ring
));
865 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
870 * igb_up - Open the interface and prepare it to handle traffic
871 * @adapter: board private structure
874 int igb_up(struct igb_adapter
*adapter
)
876 struct e1000_hw
*hw
= &adapter
->hw
;
879 /* hardware has been reset, we need to reload some things */
880 igb_configure(adapter
);
882 clear_bit(__IGB_DOWN
, &adapter
->state
);
884 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
885 napi_enable(&adapter
->rx_ring
[i
].napi
);
886 if (adapter
->msix_entries
)
887 igb_configure_msix(adapter
);
889 /* Clear any pending interrupts. */
891 igb_irq_enable(adapter
);
893 /* Fire a link change interrupt to start the watchdog. */
894 wr32(E1000_ICS
, E1000_ICS_LSC
);
898 void igb_down(struct igb_adapter
*adapter
)
900 struct e1000_hw
*hw
= &adapter
->hw
;
901 struct net_device
*netdev
= adapter
->netdev
;
905 /* signal that we're down so the interrupt handler does not
906 * reschedule our watchdog timer */
907 set_bit(__IGB_DOWN
, &adapter
->state
);
909 /* disable receives in the hardware */
910 rctl
= rd32(E1000_RCTL
);
911 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
912 /* flush and sleep below */
914 netif_tx_stop_all_queues(netdev
);
916 /* disable transmits in the hardware */
917 tctl
= rd32(E1000_TCTL
);
918 tctl
&= ~E1000_TCTL_EN
;
919 wr32(E1000_TCTL
, tctl
);
920 /* flush both disables and wait for them to finish */
924 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
925 napi_disable(&adapter
->rx_ring
[i
].napi
);
927 igb_irq_disable(adapter
);
929 del_timer_sync(&adapter
->watchdog_timer
);
930 del_timer_sync(&adapter
->phy_info_timer
);
932 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
933 netif_carrier_off(netdev
);
935 /* record the stats before reset*/
936 igb_update_stats(adapter
);
938 adapter
->link_speed
= 0;
939 adapter
->link_duplex
= 0;
941 if (!pci_channel_offline(adapter
->pdev
))
943 igb_clean_all_tx_rings(adapter
);
944 igb_clean_all_rx_rings(adapter
);
947 void igb_reinit_locked(struct igb_adapter
*adapter
)
949 WARN_ON(in_interrupt());
950 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
954 clear_bit(__IGB_RESETTING
, &adapter
->state
);
957 void igb_reset(struct igb_adapter
*adapter
)
959 struct e1000_hw
*hw
= &adapter
->hw
;
960 struct e1000_mac_info
*mac
= &hw
->mac
;
961 struct e1000_fc_info
*fc
= &hw
->fc
;
962 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
965 /* Repartition Pba for greater than 9k mtu
966 * To take effect CTRL.RST is required.
978 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
979 (mac
->type
< e1000_82576
)) {
980 /* adjust PBA for jumbo frames */
981 wr32(E1000_PBA
, pba
);
983 /* To maintain wire speed transmits, the Tx FIFO should be
984 * large enough to accommodate two full transmit packets,
985 * rounded up to the next 1KB and expressed in KB. Likewise,
986 * the Rx FIFO should be large enough to accommodate at least
987 * one full receive packet and is similarly rounded up and
988 * expressed in KB. */
989 pba
= rd32(E1000_PBA
);
990 /* upper 16 bits has Tx packet buffer allocation size in KB */
991 tx_space
= pba
>> 16;
992 /* lower 16 bits has Rx packet buffer allocation size in KB */
994 /* the tx fifo also stores 16 bytes of information about the tx
995 * but don't include ethernet FCS because hardware appends it */
996 min_tx_space
= (adapter
->max_frame_size
+
997 sizeof(union e1000_adv_tx_desc
) -
999 min_tx_space
= ALIGN(min_tx_space
, 1024);
1000 min_tx_space
>>= 10;
1001 /* software strips receive CRC, so leave room for it */
1002 min_rx_space
= adapter
->max_frame_size
;
1003 min_rx_space
= ALIGN(min_rx_space
, 1024);
1004 min_rx_space
>>= 10;
1006 /* If current Tx allocation is less than the min Tx FIFO size,
1007 * and the min Tx FIFO size is less than the current Rx FIFO
1008 * allocation, take space away from current Rx allocation */
1009 if (tx_space
< min_tx_space
&&
1010 ((min_tx_space
- tx_space
) < pba
)) {
1011 pba
= pba
- (min_tx_space
- tx_space
);
1013 /* if short on rx space, rx wins and must trump tx
1015 if (pba
< min_rx_space
)
1018 wr32(E1000_PBA
, pba
);
1021 /* flow control settings */
1022 /* The high water mark must be low enough to fit one full frame
1023 * (or the size used for early receive) above it in the Rx FIFO.
1024 * Set it to the lower of:
1025 * - 90% of the Rx FIFO size, or
1026 * - the full Rx FIFO size minus one full frame */
1027 hwm
= min(((pba
<< 10) * 9 / 10),
1028 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1030 if (mac
->type
< e1000_82576
) {
1031 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
1032 fc
->low_water
= fc
->high_water
- 8;
1034 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
1035 fc
->low_water
= fc
->high_water
- 16;
1037 fc
->pause_time
= 0xFFFF;
1039 fc
->type
= fc
->original_type
;
1041 /* Allow time for pending master requests to run */
1042 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
1045 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
1046 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
1048 igb_update_mng_vlan(adapter
);
1050 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1051 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1053 igb_reset_adaptive(&adapter
->hw
);
1054 igb_get_phy_info(&adapter
->hw
);
1057 static const struct net_device_ops igb_netdev_ops
= {
1058 .ndo_open
= igb_open
,
1059 .ndo_stop
= igb_close
,
1060 .ndo_start_xmit
= igb_xmit_frame_adv
,
1061 .ndo_get_stats
= igb_get_stats
,
1062 .ndo_set_multicast_list
= igb_set_multi
,
1063 .ndo_set_mac_address
= igb_set_mac
,
1064 .ndo_change_mtu
= igb_change_mtu
,
1065 .ndo_do_ioctl
= igb_ioctl
,
1066 .ndo_tx_timeout
= igb_tx_timeout
,
1067 .ndo_validate_addr
= eth_validate_addr
,
1068 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1069 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1070 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1071 #ifdef CONFIG_NET_POLL_CONTROLLER
1072 .ndo_poll_controller
= igb_netpoll
,
1077 * igb_probe - Device Initialization Routine
1078 * @pdev: PCI device information struct
1079 * @ent: entry in igb_pci_tbl
1081 * Returns 0 on success, negative on failure
1083 * igb_probe initializes an adapter identified by a pci_dev structure.
1084 * The OS initialization, configuring of the adapter private structure,
1085 * and a hardware reset occur.
1087 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1088 const struct pci_device_id
*ent
)
1090 struct net_device
*netdev
;
1091 struct igb_adapter
*adapter
;
1092 struct e1000_hw
*hw
;
1093 struct pci_dev
*us_dev
;
1094 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1095 unsigned long mmio_start
, mmio_len
;
1096 int err
, pci_using_dac
, pos
;
1097 u16 eeprom_data
= 0, state
= 0;
1098 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1101 err
= pci_enable_device_mem(pdev
);
1106 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1108 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1112 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1114 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1116 dev_err(&pdev
->dev
, "No usable DMA "
1117 "configuration, aborting\n");
1123 /* 82575 requires that the pci-e link partner disable the L0s state */
1124 switch (pdev
->device
) {
1125 case E1000_DEV_ID_82575EB_COPPER
:
1126 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1127 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1128 us_dev
= pdev
->bus
->self
;
1129 pos
= pci_find_capability(us_dev
, PCI_CAP_ID_EXP
);
1131 pci_read_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1133 state
&= ~PCIE_LINK_STATE_L0S
;
1134 pci_write_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1136 dev_info(&pdev
->dev
,
1137 "Disabling ASPM L0s upstream switch port %s\n",
1144 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1150 err
= pci_enable_pcie_error_reporting(pdev
);
1152 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1154 /* non-fatal, continue */
1157 pci_set_master(pdev
);
1158 pci_save_state(pdev
);
1161 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
), IGB_MAX_TX_QUEUES
);
1163 goto err_alloc_etherdev
;
1165 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1167 pci_set_drvdata(pdev
, netdev
);
1168 adapter
= netdev_priv(netdev
);
1169 adapter
->netdev
= netdev
;
1170 adapter
->pdev
= pdev
;
1173 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1175 mmio_start
= pci_resource_start(pdev
, 0);
1176 mmio_len
= pci_resource_len(pdev
, 0);
1179 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1183 netdev
->netdev_ops
= &igb_netdev_ops
;
1184 igb_set_ethtool_ops(netdev
);
1185 netdev
->watchdog_timeo
= 5 * HZ
;
1187 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1189 netdev
->mem_start
= mmio_start
;
1190 netdev
->mem_end
= mmio_start
+ mmio_len
;
1192 /* PCI config space info */
1193 hw
->vendor_id
= pdev
->vendor
;
1194 hw
->device_id
= pdev
->device
;
1195 hw
->revision_id
= pdev
->revision
;
1196 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1197 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1199 /* setup the private structure */
1201 /* Copy the default MAC, PHY and NVM function pointers */
1202 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1203 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1204 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1205 /* Initialize skew-specific constants */
1206 err
= ei
->get_invariants(hw
);
1210 /* setup the private structure */
1211 err
= igb_sw_init(adapter
);
1215 igb_get_bus_info_pcie(hw
);
1218 switch (hw
->mac
.type
) {
1220 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1227 hw
->phy
.autoneg_wait_to_complete
= false;
1228 hw
->mac
.adaptive_ifs
= true;
1230 /* Copper options */
1231 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1232 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1233 hw
->phy
.disable_polarity_correction
= false;
1234 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1237 if (igb_check_reset_block(hw
))
1238 dev_info(&pdev
->dev
,
1239 "PHY reset is blocked due to SOL/IDER session.\n");
1241 netdev
->features
= NETIF_F_SG
|
1243 NETIF_F_HW_VLAN_TX
|
1244 NETIF_F_HW_VLAN_RX
|
1245 NETIF_F_HW_VLAN_FILTER
;
1247 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1248 netdev
->features
|= NETIF_F_TSO
;
1249 netdev
->features
|= NETIF_F_TSO6
;
1251 netdev
->features
|= NETIF_F_GRO
;
1253 netdev
->vlan_features
|= NETIF_F_TSO
;
1254 netdev
->vlan_features
|= NETIF_F_TSO6
;
1255 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1256 netdev
->vlan_features
|= NETIF_F_SG
;
1259 netdev
->features
|= NETIF_F_HIGHDMA
;
1261 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1263 /* before reading the NVM, reset the controller to put the device in a
1264 * known good starting state */
1265 hw
->mac
.ops
.reset_hw(hw
);
1267 /* make sure the NVM is good */
1268 if (igb_validate_nvm_checksum(hw
) < 0) {
1269 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1274 /* copy the MAC address out of the NVM */
1275 if (hw
->mac
.ops
.read_mac_addr(hw
))
1276 dev_err(&pdev
->dev
, "NVM Read Error\n");
1278 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1279 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1281 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1282 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1287 init_timer(&adapter
->watchdog_timer
);
1288 adapter
->watchdog_timer
.function
= &igb_watchdog
;
1289 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1291 init_timer(&adapter
->phy_info_timer
);
1292 adapter
->phy_info_timer
.function
= &igb_update_phy_info
;
1293 adapter
->phy_info_timer
.data
= (unsigned long) adapter
;
1295 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1296 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1298 /* Initialize link properties that are user-changeable */
1299 adapter
->fc_autoneg
= true;
1300 hw
->mac
.autoneg
= true;
1301 hw
->phy
.autoneg_advertised
= 0x2f;
1303 hw
->fc
.original_type
= e1000_fc_default
;
1304 hw
->fc
.type
= e1000_fc_default
;
1306 adapter
->itr_setting
= IGB_DEFAULT_ITR
;
1307 adapter
->itr
= IGB_START_ITR
;
1309 igb_validate_mdi_setting(hw
);
1311 adapter
->rx_csum
= 1;
1313 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1314 * enable the ACPI Magic Packet filter
1317 if (hw
->bus
.func
== 0 ||
1318 hw
->device_id
== E1000_DEV_ID_82575EB_COPPER
)
1319 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1321 if (eeprom_data
& eeprom_apme_mask
)
1322 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1324 /* now that we have the eeprom settings, apply the special cases where
1325 * the eeprom may be wrong or the board simply won't support wake on
1326 * lan on a particular port */
1327 switch (pdev
->device
) {
1328 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1329 adapter
->eeprom_wol
= 0;
1331 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1332 case E1000_DEV_ID_82576_FIBER
:
1333 case E1000_DEV_ID_82576_SERDES
:
1334 /* Wake events only supported on port A for dual fiber
1335 * regardless of eeprom setting */
1336 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1337 adapter
->eeprom_wol
= 0;
1341 /* initialize the wol settings based on the eeprom settings */
1342 adapter
->wol
= adapter
->eeprom_wol
;
1343 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1345 /* reset the hardware with the new settings */
1348 /* let the f/w know that the h/w is now under the control of the
1350 igb_get_hw_control(adapter
);
1352 /* tell the stack to leave us alone until igb_open() is called */
1353 netif_carrier_off(netdev
);
1354 netif_tx_stop_all_queues(netdev
);
1356 strcpy(netdev
->name
, "eth%d");
1357 err
= register_netdev(netdev
);
1361 #ifdef CONFIG_IGB_DCA
1362 if (dca_add_requester(&pdev
->dev
) == 0) {
1363 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1364 dev_info(&pdev
->dev
, "DCA enabled\n");
1365 /* Always use CB2 mode, difference is masked
1366 * in the CB driver. */
1367 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
1368 igb_setup_dca(adapter
);
1373 * Initialize hardware timer: we keep it running just in case
1374 * that some program needs it later on.
1376 memset(&adapter
->cycles
, 0, sizeof(adapter
->cycles
));
1377 adapter
->cycles
.read
= igb_read_clock
;
1378 adapter
->cycles
.mask
= CLOCKSOURCE_MASK(64);
1379 adapter
->cycles
.mult
= 1;
1380 adapter
->cycles
.shift
= IGB_TSYNC_SHIFT
;
1383 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS
* IGB_TSYNC_SCALE
);
1386 * Avoid rollover while we initialize by resetting the time counter.
1388 wr32(E1000_SYSTIML
, 0x00000000);
1389 wr32(E1000_SYSTIMH
, 0x00000000);
1392 * Set registers so that rollover occurs soon to test this.
1394 wr32(E1000_SYSTIML
, 0x00000000);
1395 wr32(E1000_SYSTIMH
, 0xFF800000);
1398 timecounter_init(&adapter
->clock
,
1400 ktime_to_ns(ktime_get_real()));
1403 * Synchronize our NIC clock against system wall clock. NIC
1404 * time stamp reading requires ~3us per sample, each sample
1405 * was pretty stable even under load => only require 10
1406 * samples for each offset comparison.
1408 memset(&adapter
->compare
, 0, sizeof(adapter
->compare
));
1409 adapter
->compare
.source
= &adapter
->clock
;
1410 adapter
->compare
.target
= ktime_get_real
;
1411 adapter
->compare
.num_samples
= 10;
1412 timecompare_update(&adapter
->compare
, 0);
1418 "igb: %s: hw %p initialized timer\n",
1419 igb_get_time_str(adapter
, buffer
),
1424 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1425 /* print bus type/speed/width info */
1426 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1428 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1429 ? "2.5Gb/s" : "unknown"),
1430 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1431 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1432 ? "Width x1" : "unknown"),
1435 igb_read_part_num(hw
, &part_num
);
1436 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1437 (part_num
>> 8), (part_num
& 0xff));
1439 dev_info(&pdev
->dev
,
1440 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1441 adapter
->msix_entries
? "MSI-X" :
1442 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1443 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1448 igb_release_hw_control(adapter
);
1450 if (!igb_check_reset_block(hw
))
1453 if (hw
->flash_address
)
1454 iounmap(hw
->flash_address
);
1456 igb_free_queues(adapter
);
1458 iounmap(hw
->hw_addr
);
1460 free_netdev(netdev
);
1462 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1466 pci_disable_device(pdev
);
1471 * igb_remove - Device Removal Routine
1472 * @pdev: PCI device information struct
1474 * igb_remove is called by the PCI subsystem to alert the driver
1475 * that it should release a PCI device. The could be caused by a
1476 * Hot-Plug event, or because the driver is going to be removed from
1479 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1481 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1482 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1483 struct e1000_hw
*hw
= &adapter
->hw
;
1486 /* flush_scheduled work may reschedule our watchdog task, so
1487 * explicitly disable watchdog tasks from being rescheduled */
1488 set_bit(__IGB_DOWN
, &adapter
->state
);
1489 del_timer_sync(&adapter
->watchdog_timer
);
1490 del_timer_sync(&adapter
->phy_info_timer
);
1492 flush_scheduled_work();
1494 #ifdef CONFIG_IGB_DCA
1495 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1496 dev_info(&pdev
->dev
, "DCA disabled\n");
1497 dca_remove_requester(&pdev
->dev
);
1498 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1499 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
1503 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1504 * would have already happened in close and is redundant. */
1505 igb_release_hw_control(adapter
);
1507 unregister_netdev(netdev
);
1509 if (!igb_check_reset_block(&adapter
->hw
))
1510 igb_reset_phy(&adapter
->hw
);
1512 igb_reset_interrupt_capability(adapter
);
1514 igb_free_queues(adapter
);
1516 iounmap(hw
->hw_addr
);
1517 if (hw
->flash_address
)
1518 iounmap(hw
->flash_address
);
1519 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1522 free_netdev(netdev
);
1524 err
= pci_disable_pcie_error_reporting(pdev
);
1527 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1529 pci_disable_device(pdev
);
1533 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1534 * @adapter: board private structure to initialize
1536 * igb_sw_init initializes the Adapter private data structure.
1537 * Fields are initialized based on PCI device information and
1538 * OS network device settings (MTU size).
1540 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1542 struct e1000_hw
*hw
= &adapter
->hw
;
1543 struct net_device
*netdev
= adapter
->netdev
;
1544 struct pci_dev
*pdev
= adapter
->pdev
;
1546 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1548 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1549 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1550 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1551 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1552 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1553 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1555 /* This call may decrease the number of queues depending on
1556 * interrupt mode. */
1557 igb_set_interrupt_capability(adapter
);
1559 if (igb_alloc_queues(adapter
)) {
1560 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1564 /* Explicitly disable IRQ since the NIC can be in any state. */
1565 igb_irq_disable(adapter
);
1567 set_bit(__IGB_DOWN
, &adapter
->state
);
1572 * igb_open - Called when a network interface is made active
1573 * @netdev: network interface device structure
1575 * Returns 0 on success, negative value on failure
1577 * The open entry point is called when a network interface is made
1578 * active by the system (IFF_UP). At this point all resources needed
1579 * for transmit and receive operations are allocated, the interrupt
1580 * handler is registered with the OS, the watchdog timer is started,
1581 * and the stack is notified that the interface is ready.
1583 static int igb_open(struct net_device
*netdev
)
1585 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1586 struct e1000_hw
*hw
= &adapter
->hw
;
1590 /* disallow open during test */
1591 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1594 /* allocate transmit descriptors */
1595 err
= igb_setup_all_tx_resources(adapter
);
1599 /* allocate receive descriptors */
1600 err
= igb_setup_all_rx_resources(adapter
);
1604 /* e1000_power_up_phy(adapter); */
1606 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1607 if ((adapter
->hw
.mng_cookie
.status
&
1608 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1609 igb_update_mng_vlan(adapter
);
1611 /* before we allocate an interrupt, we must be ready to handle it.
1612 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1613 * as soon as we call pci_request_irq, so we have to setup our
1614 * clean_rx handler before we do so. */
1615 igb_configure(adapter
);
1617 err
= igb_request_irq(adapter
);
1621 /* From here on the code is the same as igb_up() */
1622 clear_bit(__IGB_DOWN
, &adapter
->state
);
1624 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1625 napi_enable(&adapter
->rx_ring
[i
].napi
);
1627 /* Clear any pending interrupts. */
1630 igb_irq_enable(adapter
);
1632 netif_tx_start_all_queues(netdev
);
1634 /* Fire a link status change interrupt to start the watchdog. */
1635 wr32(E1000_ICS
, E1000_ICS_LSC
);
1640 igb_release_hw_control(adapter
);
1641 /* e1000_power_down_phy(adapter); */
1642 igb_free_all_rx_resources(adapter
);
1644 igb_free_all_tx_resources(adapter
);
1652 * igb_close - Disables a network interface
1653 * @netdev: network interface device structure
1655 * Returns 0, this is not allowed to fail
1657 * The close entry point is called when an interface is de-activated
1658 * by the OS. The hardware is still under the driver's control, but
1659 * needs to be disabled. A global MAC reset is issued to stop the
1660 * hardware, and all transmit and receive resources are freed.
1662 static int igb_close(struct net_device
*netdev
)
1664 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1666 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1669 igb_free_irq(adapter
);
1671 igb_free_all_tx_resources(adapter
);
1672 igb_free_all_rx_resources(adapter
);
1674 /* kill manageability vlan ID if supported, but not if a vlan with
1675 * the same ID is registered on the host OS (let 8021q kill it) */
1676 if ((adapter
->hw
.mng_cookie
.status
&
1677 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1679 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1680 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1686 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1687 * @adapter: board private structure
1688 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1690 * Return 0 on success, negative on failure
1692 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1693 struct igb_ring
*tx_ring
)
1695 struct pci_dev
*pdev
= adapter
->pdev
;
1698 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1699 tx_ring
->buffer_info
= vmalloc(size
);
1700 if (!tx_ring
->buffer_info
)
1702 memset(tx_ring
->buffer_info
, 0, size
);
1704 /* round up to nearest 4K */
1705 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1706 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1708 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1714 tx_ring
->adapter
= adapter
;
1715 tx_ring
->next_to_use
= 0;
1716 tx_ring
->next_to_clean
= 0;
1720 vfree(tx_ring
->buffer_info
);
1721 dev_err(&adapter
->pdev
->dev
,
1722 "Unable to allocate memory for the transmit descriptor ring\n");
1727 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1728 * (Descriptors) for all queues
1729 * @adapter: board private structure
1731 * Return 0 on success, negative on failure
1733 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1738 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1739 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1741 dev_err(&adapter
->pdev
->dev
,
1742 "Allocation for Tx Queue %u failed\n", i
);
1743 for (i
--; i
>= 0; i
--)
1744 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1749 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1750 r_idx
= i
% adapter
->num_tx_queues
;
1751 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1757 * igb_configure_tx - Configure transmit Unit after Reset
1758 * @adapter: board private structure
1760 * Configure the Tx unit of the MAC after a reset.
1762 static void igb_configure_tx(struct igb_adapter
*adapter
)
1765 struct e1000_hw
*hw
= &adapter
->hw
;
1770 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1771 struct igb_ring
*ring
= &adapter
->tx_ring
[i
];
1773 wr32(E1000_TDLEN(j
),
1774 ring
->count
* sizeof(union e1000_adv_tx_desc
));
1776 wr32(E1000_TDBAL(j
),
1777 tdba
& 0x00000000ffffffffULL
);
1778 wr32(E1000_TDBAH(j
), tdba
>> 32);
1780 ring
->head
= E1000_TDH(j
);
1781 ring
->tail
= E1000_TDT(j
);
1782 writel(0, hw
->hw_addr
+ ring
->tail
);
1783 writel(0, hw
->hw_addr
+ ring
->head
);
1784 txdctl
= rd32(E1000_TXDCTL(j
));
1785 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1786 wr32(E1000_TXDCTL(j
), txdctl
);
1788 /* Turn off Relaxed Ordering on head write-backs. The
1789 * writebacks MUST be delivered in order or it will
1790 * completely screw up our bookeeping.
1792 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1793 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1794 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1797 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1799 /* Program the Transmit Control Register */
1801 tctl
= rd32(E1000_TCTL
);
1802 tctl
&= ~E1000_TCTL_CT
;
1803 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1804 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1806 igb_config_collision_dist(hw
);
1808 /* Setup Transmit Descriptor Settings for eop descriptor */
1809 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1811 /* Enable transmits */
1812 tctl
|= E1000_TCTL_EN
;
1814 wr32(E1000_TCTL
, tctl
);
1818 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1819 * @adapter: board private structure
1820 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1822 * Returns 0 on success, negative on failure
1824 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1825 struct igb_ring
*rx_ring
)
1827 struct pci_dev
*pdev
= adapter
->pdev
;
1830 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1831 rx_ring
->buffer_info
= vmalloc(size
);
1832 if (!rx_ring
->buffer_info
)
1834 memset(rx_ring
->buffer_info
, 0, size
);
1836 desc_len
= sizeof(union e1000_adv_rx_desc
);
1838 /* Round up to nearest 4K */
1839 rx_ring
->size
= rx_ring
->count
* desc_len
;
1840 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1842 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1848 rx_ring
->next_to_clean
= 0;
1849 rx_ring
->next_to_use
= 0;
1851 rx_ring
->adapter
= adapter
;
1856 vfree(rx_ring
->buffer_info
);
1857 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1858 "the receive descriptor ring\n");
1863 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1864 * (Descriptors) for all queues
1865 * @adapter: board private structure
1867 * Return 0 on success, negative on failure
1869 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1873 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1874 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1876 dev_err(&adapter
->pdev
->dev
,
1877 "Allocation for Rx Queue %u failed\n", i
);
1878 for (i
--; i
>= 0; i
--)
1879 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1888 * igb_setup_rctl - configure the receive control registers
1889 * @adapter: Board private structure
1891 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1893 struct e1000_hw
*hw
= &adapter
->hw
;
1898 rctl
= rd32(E1000_RCTL
);
1900 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1901 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1903 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1904 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1907 * enable stripping of CRC. It's unlikely this will break BMC
1908 * redirection as it did with e1000. Newer features require
1909 * that the HW strips the CRC.
1911 rctl
|= E1000_RCTL_SECRC
;
1914 * disable store bad packets and clear size bits.
1916 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
1918 /* enable LPE when to prevent packets larger than max_frame_size */
1919 rctl
|= E1000_RCTL_LPE
;
1921 /* Setup buffer sizes */
1922 switch (adapter
->rx_buffer_len
) {
1923 case IGB_RXBUFFER_256
:
1924 rctl
|= E1000_RCTL_SZ_256
;
1926 case IGB_RXBUFFER_512
:
1927 rctl
|= E1000_RCTL_SZ_512
;
1930 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
1931 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
1935 /* 82575 and greater support packet-split where the protocol
1936 * header is placed in skb->data and the packet data is
1937 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1938 * In the case of a non-split, skb->data is linearly filled,
1939 * followed by the page buffers. Therefore, skb->data is
1940 * sized to hold the largest protocol header.
1942 /* allocations using alloc_page take too long for regular MTU
1943 * so only enable packet split for jumbo frames */
1944 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
1945 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
1946 srrctl
|= adapter
->rx_ps_hdr_size
<<
1947 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
1948 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1950 adapter
->rx_ps_hdr_size
= 0;
1951 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1954 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1955 j
= adapter
->rx_ring
[i
].reg_idx
;
1956 wr32(E1000_SRRCTL(j
), srrctl
);
1959 wr32(E1000_RCTL
, rctl
);
1963 * igb_configure_rx - Configure receive Unit after Reset
1964 * @adapter: board private structure
1966 * Configure the Rx unit of the MAC after a reset.
1968 static void igb_configure_rx(struct igb_adapter
*adapter
)
1971 struct e1000_hw
*hw
= &adapter
->hw
;
1976 /* disable receives while setting up the descriptors */
1977 rctl
= rd32(E1000_RCTL
);
1978 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1982 if (adapter
->itr_setting
> 3)
1983 wr32(E1000_ITR
, adapter
->itr
);
1985 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1986 * the Base and Length of the Rx Descriptor Ring */
1987 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1988 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
1991 wr32(E1000_RDBAL(j
),
1992 rdba
& 0x00000000ffffffffULL
);
1993 wr32(E1000_RDBAH(j
), rdba
>> 32);
1994 wr32(E1000_RDLEN(j
),
1995 ring
->count
* sizeof(union e1000_adv_rx_desc
));
1997 ring
->head
= E1000_RDH(j
);
1998 ring
->tail
= E1000_RDT(j
);
1999 writel(0, hw
->hw_addr
+ ring
->tail
);
2000 writel(0, hw
->hw_addr
+ ring
->head
);
2002 rxdctl
= rd32(E1000_RXDCTL(j
));
2003 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
2004 rxdctl
&= 0xFFF00000;
2005 rxdctl
|= IGB_RX_PTHRESH
;
2006 rxdctl
|= IGB_RX_HTHRESH
<< 8;
2007 rxdctl
|= IGB_RX_WTHRESH
<< 16;
2008 wr32(E1000_RXDCTL(j
), rxdctl
);
2011 if (adapter
->num_rx_queues
> 1) {
2020 get_random_bytes(&random
[0], 40);
2022 if (hw
->mac
.type
>= e1000_82576
)
2026 for (j
= 0; j
< (32 * 4); j
++) {
2028 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
2031 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
2033 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
2035 /* Fill out hash function seeds */
2036 for (j
= 0; j
< 10; j
++)
2037 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
2039 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
2040 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
2041 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
2042 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
2043 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2044 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2045 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
2046 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
2049 wr32(E1000_MRQC
, mrqc
);
2051 /* Multiqueue and raw packet checksumming are mutually
2052 * exclusive. Note that this not the same as TCP/IP
2053 * checksumming, which works fine. */
2054 rxcsum
= rd32(E1000_RXCSUM
);
2055 rxcsum
|= E1000_RXCSUM_PCSD
;
2056 wr32(E1000_RXCSUM
, rxcsum
);
2058 /* Enable Receive Checksum Offload for TCP and UDP */
2059 rxcsum
= rd32(E1000_RXCSUM
);
2060 if (adapter
->rx_csum
)
2061 rxcsum
|= E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
;
2063 rxcsum
&= ~(E1000_RXCSUM_TUOFL
| E1000_RXCSUM_IPPCSE
);
2065 wr32(E1000_RXCSUM
, rxcsum
);
2070 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
2072 wr32(E1000_RLPML
, adapter
->max_frame_size
);
2074 /* Enable Receives */
2075 wr32(E1000_RCTL
, rctl
);
2079 * igb_free_tx_resources - Free Tx Resources per Queue
2080 * @tx_ring: Tx descriptor ring for a specific queue
2082 * Free all transmit software resources
2084 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2086 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2088 igb_clean_tx_ring(tx_ring
);
2090 vfree(tx_ring
->buffer_info
);
2091 tx_ring
->buffer_info
= NULL
;
2093 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2095 tx_ring
->desc
= NULL
;
2099 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2100 * @adapter: board private structure
2102 * Free all transmit software resources
2104 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2108 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2109 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2112 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2113 struct igb_buffer
*buffer_info
)
2115 if (buffer_info
->dma
) {
2116 pci_unmap_page(adapter
->pdev
,
2118 buffer_info
->length
,
2120 buffer_info
->dma
= 0;
2122 if (buffer_info
->skb
) {
2123 dev_kfree_skb_any(buffer_info
->skb
);
2124 buffer_info
->skb
= NULL
;
2126 buffer_info
->time_stamp
= 0;
2127 buffer_info
->next_to_watch
= 0;
2128 /* buffer_info must be completely set up in the transmit path */
2132 * igb_clean_tx_ring - Free Tx Buffers
2133 * @tx_ring: ring to be cleaned
2135 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2137 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2138 struct igb_buffer
*buffer_info
;
2142 if (!tx_ring
->buffer_info
)
2144 /* Free all the Tx ring sk_buffs */
2146 for (i
= 0; i
< tx_ring
->count
; i
++) {
2147 buffer_info
= &tx_ring
->buffer_info
[i
];
2148 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2151 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2152 memset(tx_ring
->buffer_info
, 0, size
);
2154 /* Zero out the descriptor ring */
2156 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2158 tx_ring
->next_to_use
= 0;
2159 tx_ring
->next_to_clean
= 0;
2161 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2162 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2166 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2167 * @adapter: board private structure
2169 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2173 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2174 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2178 * igb_free_rx_resources - Free Rx Resources
2179 * @rx_ring: ring to clean the resources from
2181 * Free all receive software resources
2183 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2185 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2187 igb_clean_rx_ring(rx_ring
);
2189 vfree(rx_ring
->buffer_info
);
2190 rx_ring
->buffer_info
= NULL
;
2192 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2194 rx_ring
->desc
= NULL
;
2198 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2199 * @adapter: board private structure
2201 * Free all receive software resources
2203 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2207 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2208 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2212 * igb_clean_rx_ring - Free Rx Buffers per Queue
2213 * @rx_ring: ring to free buffers from
2215 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2217 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2218 struct igb_buffer
*buffer_info
;
2219 struct pci_dev
*pdev
= adapter
->pdev
;
2223 if (!rx_ring
->buffer_info
)
2225 /* Free all the Rx ring sk_buffs */
2226 for (i
= 0; i
< rx_ring
->count
; i
++) {
2227 buffer_info
= &rx_ring
->buffer_info
[i
];
2228 if (buffer_info
->dma
) {
2229 if (adapter
->rx_ps_hdr_size
)
2230 pci_unmap_single(pdev
, buffer_info
->dma
,
2231 adapter
->rx_ps_hdr_size
,
2232 PCI_DMA_FROMDEVICE
);
2234 pci_unmap_single(pdev
, buffer_info
->dma
,
2235 adapter
->rx_buffer_len
,
2236 PCI_DMA_FROMDEVICE
);
2237 buffer_info
->dma
= 0;
2240 if (buffer_info
->skb
) {
2241 dev_kfree_skb(buffer_info
->skb
);
2242 buffer_info
->skb
= NULL
;
2244 if (buffer_info
->page
) {
2245 if (buffer_info
->page_dma
)
2246 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2248 PCI_DMA_FROMDEVICE
);
2249 put_page(buffer_info
->page
);
2250 buffer_info
->page
= NULL
;
2251 buffer_info
->page_dma
= 0;
2252 buffer_info
->page_offset
= 0;
2256 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2257 memset(rx_ring
->buffer_info
, 0, size
);
2259 /* Zero out the descriptor ring */
2260 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2262 rx_ring
->next_to_clean
= 0;
2263 rx_ring
->next_to_use
= 0;
2265 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2266 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2270 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2271 * @adapter: board private structure
2273 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2277 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2278 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2282 * igb_set_mac - Change the Ethernet Address of the NIC
2283 * @netdev: network interface device structure
2284 * @p: pointer to an address structure
2286 * Returns 0 on success, negative on failure
2288 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2290 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2291 struct e1000_hw
*hw
= &adapter
->hw
;
2292 struct sockaddr
*addr
= p
;
2294 if (!is_valid_ether_addr(addr
->sa_data
))
2295 return -EADDRNOTAVAIL
;
2297 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2298 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2300 hw
->mac
.ops
.rar_set(hw
, hw
->mac
.addr
, 0);
2306 * igb_set_multi - Multicast and Promiscuous mode set
2307 * @netdev: network interface device structure
2309 * The set_multi entry point is called whenever the multicast address
2310 * list or the network interface flags are updated. This routine is
2311 * responsible for configuring the hardware for proper multicast,
2312 * promiscuous mode, and all-multi behavior.
2314 static void igb_set_multi(struct net_device
*netdev
)
2316 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2317 struct e1000_hw
*hw
= &adapter
->hw
;
2318 struct e1000_mac_info
*mac
= &hw
->mac
;
2319 struct dev_mc_list
*mc_ptr
;
2324 /* Check for Promiscuous and All Multicast modes */
2326 rctl
= rd32(E1000_RCTL
);
2328 if (netdev
->flags
& IFF_PROMISC
) {
2329 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2330 rctl
&= ~E1000_RCTL_VFE
;
2332 if (netdev
->flags
& IFF_ALLMULTI
) {
2333 rctl
|= E1000_RCTL_MPE
;
2334 rctl
&= ~E1000_RCTL_UPE
;
2336 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2337 rctl
|= E1000_RCTL_VFE
;
2339 wr32(E1000_RCTL
, rctl
);
2341 if (!netdev
->mc_count
) {
2342 /* nothing to program, so clear mc list */
2343 igb_update_mc_addr_list(hw
, NULL
, 0, 1,
2344 mac
->rar_entry_count
);
2348 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2352 /* The shared function expects a packed array of only addresses. */
2353 mc_ptr
= netdev
->mc_list
;
2355 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2358 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2359 mc_ptr
= mc_ptr
->next
;
2361 igb_update_mc_addr_list(hw
, mta_list
, i
, 1, mac
->rar_entry_count
);
2365 /* Need to wait a few seconds after link up to get diagnostic information from
2367 static void igb_update_phy_info(unsigned long data
)
2369 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2370 igb_get_phy_info(&adapter
->hw
);
2374 * igb_has_link - check shared code for link and determine up/down
2375 * @adapter: pointer to driver private info
2377 static bool igb_has_link(struct igb_adapter
*adapter
)
2379 struct e1000_hw
*hw
= &adapter
->hw
;
2380 bool link_active
= false;
2383 /* get_link_status is set on LSC (link status) interrupt or
2384 * rx sequence error interrupt. get_link_status will stay
2385 * false until the e1000_check_for_link establishes link
2386 * for copper adapters ONLY
2388 switch (hw
->phy
.media_type
) {
2389 case e1000_media_type_copper
:
2390 if (hw
->mac
.get_link_status
) {
2391 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2392 link_active
= !hw
->mac
.get_link_status
;
2397 case e1000_media_type_fiber
:
2398 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2399 link_active
= !!(rd32(E1000_STATUS
) & E1000_STATUS_LU
);
2401 case e1000_media_type_internal_serdes
:
2402 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2403 link_active
= hw
->mac
.serdes_has_link
;
2406 case e1000_media_type_unknown
:
2414 * igb_watchdog - Timer Call-back
2415 * @data: pointer to adapter cast into an unsigned long
2417 static void igb_watchdog(unsigned long data
)
2419 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2420 /* Do the rest outside of interrupt context */
2421 schedule_work(&adapter
->watchdog_task
);
2424 static void igb_watchdog_task(struct work_struct
*work
)
2426 struct igb_adapter
*adapter
= container_of(work
,
2427 struct igb_adapter
, watchdog_task
);
2428 struct e1000_hw
*hw
= &adapter
->hw
;
2429 struct net_device
*netdev
= adapter
->netdev
;
2430 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2435 link
= igb_has_link(adapter
);
2436 if ((netif_carrier_ok(netdev
)) && link
)
2440 if (!netif_carrier_ok(netdev
)) {
2442 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2443 &adapter
->link_speed
,
2444 &adapter
->link_duplex
);
2446 ctrl
= rd32(E1000_CTRL
);
2447 /* Links status message must follow this format */
2448 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2449 "Flow Control: %s\n",
2451 adapter
->link_speed
,
2452 adapter
->link_duplex
== FULL_DUPLEX
?
2453 "Full Duplex" : "Half Duplex",
2454 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2455 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2456 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2457 E1000_CTRL_TFCE
) ? "TX" : "None")));
2459 /* tweak tx_queue_len according to speed/duplex and
2460 * adjust the timeout factor */
2461 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2462 adapter
->tx_timeout_factor
= 1;
2463 switch (adapter
->link_speed
) {
2465 netdev
->tx_queue_len
= 10;
2466 adapter
->tx_timeout_factor
= 14;
2469 netdev
->tx_queue_len
= 100;
2470 /* maybe add some timeout factor ? */
2474 netif_carrier_on(netdev
);
2475 netif_tx_wake_all_queues(netdev
);
2477 /* link state has changed, schedule phy info update */
2478 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2479 mod_timer(&adapter
->phy_info_timer
,
2480 round_jiffies(jiffies
+ 2 * HZ
));
2483 if (netif_carrier_ok(netdev
)) {
2484 adapter
->link_speed
= 0;
2485 adapter
->link_duplex
= 0;
2486 /* Links status message must follow this format */
2487 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2489 netif_carrier_off(netdev
);
2490 netif_tx_stop_all_queues(netdev
);
2492 /* link state has changed, schedule phy info update */
2493 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2494 mod_timer(&adapter
->phy_info_timer
,
2495 round_jiffies(jiffies
+ 2 * HZ
));
2500 igb_update_stats(adapter
);
2502 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2503 adapter
->tpt_old
= adapter
->stats
.tpt
;
2504 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2505 adapter
->colc_old
= adapter
->stats
.colc
;
2507 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2508 adapter
->gorc_old
= adapter
->stats
.gorc
;
2509 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2510 adapter
->gotc_old
= adapter
->stats
.gotc
;
2512 igb_update_adaptive(&adapter
->hw
);
2514 if (!netif_carrier_ok(netdev
)) {
2515 if (IGB_DESC_UNUSED(tx_ring
) + 1 < tx_ring
->count
) {
2516 /* We've lost link, so the controller stops DMA,
2517 * but we've got queued Tx work that's never going
2518 * to get done, so reset controller to flush Tx.
2519 * (Do the reset outside of interrupt context). */
2520 adapter
->tx_timeout_count
++;
2521 schedule_work(&adapter
->reset_task
);
2525 /* Cause software interrupt to ensure rx ring is cleaned */
2526 if (adapter
->msix_entries
) {
2527 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2528 eics
|= adapter
->rx_ring
[i
].eims_value
;
2529 wr32(E1000_EICS
, eics
);
2531 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2534 /* Force detection of hung controller every watchdog period */
2535 tx_ring
->detect_tx_hung
= true;
2537 /* Reset the timer */
2538 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2539 mod_timer(&adapter
->watchdog_timer
,
2540 round_jiffies(jiffies
+ 2 * HZ
));
2543 enum latency_range
{
2547 latency_invalid
= 255
2552 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2554 * Stores a new ITR value based on strictly on packet size. This
2555 * algorithm is less sophisticated than that used in igb_update_itr,
2556 * due to the difficulty of synchronizing statistics across multiple
2557 * receive rings. The divisors and thresholds used by this fuction
2558 * were determined based on theoretical maximum wire speed and testing
2559 * data, in order to minimize response time while increasing bulk
2561 * This functionality is controlled by the InterruptThrottleRate module
2562 * parameter (see igb_param.c)
2563 * NOTE: This function is called only when operating in a multiqueue
2564 * receive environment.
2565 * @rx_ring: pointer to ring
2567 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2569 int new_val
= rx_ring
->itr_val
;
2570 int avg_wire_size
= 0;
2571 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2573 if (!rx_ring
->total_packets
)
2574 goto clear_counts
; /* no packets, so don't do anything */
2576 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2577 * ints/sec - ITR timer value of 120 ticks.
2579 if (adapter
->link_speed
!= SPEED_1000
) {
2583 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2585 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2586 avg_wire_size
+= 24;
2588 /* Don't starve jumbo frames */
2589 avg_wire_size
= min(avg_wire_size
, 3000);
2591 /* Give a little boost to mid-size frames */
2592 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2593 new_val
= avg_wire_size
/ 3;
2595 new_val
= avg_wire_size
/ 2;
2598 if (new_val
!= rx_ring
->itr_val
) {
2599 rx_ring
->itr_val
= new_val
;
2600 rx_ring
->set_itr
= 1;
2603 rx_ring
->total_bytes
= 0;
2604 rx_ring
->total_packets
= 0;
2608 * igb_update_itr - update the dynamic ITR value based on statistics
2609 * Stores a new ITR value based on packets and byte
2610 * counts during the last interrupt. The advantage of per interrupt
2611 * computation is faster updates and more accurate ITR for the current
2612 * traffic pattern. Constants in this function were computed
2613 * based on theoretical maximum wire speed and thresholds were set based
2614 * on testing data as well as attempting to minimize response time
2615 * while increasing bulk throughput.
2616 * this functionality is controlled by the InterruptThrottleRate module
2617 * parameter (see igb_param.c)
2618 * NOTE: These calculations are only valid when operating in a single-
2619 * queue environment.
2620 * @adapter: pointer to adapter
2621 * @itr_setting: current adapter->itr
2622 * @packets: the number of packets during this measurement interval
2623 * @bytes: the number of bytes during this measurement interval
2625 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2626 int packets
, int bytes
)
2628 unsigned int retval
= itr_setting
;
2631 goto update_itr_done
;
2633 switch (itr_setting
) {
2634 case lowest_latency
:
2635 /* handle TSO and jumbo frames */
2636 if (bytes
/packets
> 8000)
2637 retval
= bulk_latency
;
2638 else if ((packets
< 5) && (bytes
> 512))
2639 retval
= low_latency
;
2641 case low_latency
: /* 50 usec aka 20000 ints/s */
2642 if (bytes
> 10000) {
2643 /* this if handles the TSO accounting */
2644 if (bytes
/packets
> 8000) {
2645 retval
= bulk_latency
;
2646 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2647 retval
= bulk_latency
;
2648 } else if ((packets
> 35)) {
2649 retval
= lowest_latency
;
2651 } else if (bytes
/packets
> 2000) {
2652 retval
= bulk_latency
;
2653 } else if (packets
<= 2 && bytes
< 512) {
2654 retval
= lowest_latency
;
2657 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2658 if (bytes
> 25000) {
2660 retval
= low_latency
;
2661 } else if (bytes
< 1500) {
2662 retval
= low_latency
;
2671 static void igb_set_itr(struct igb_adapter
*adapter
)
2674 u32 new_itr
= adapter
->itr
;
2676 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2677 if (adapter
->link_speed
!= SPEED_1000
) {
2683 adapter
->rx_itr
= igb_update_itr(adapter
,
2685 adapter
->rx_ring
->total_packets
,
2686 adapter
->rx_ring
->total_bytes
);
2688 if (adapter
->rx_ring
->buddy
) {
2689 adapter
->tx_itr
= igb_update_itr(adapter
,
2691 adapter
->tx_ring
->total_packets
,
2692 adapter
->tx_ring
->total_bytes
);
2693 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2695 current_itr
= adapter
->rx_itr
;
2698 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2699 if (adapter
->itr_setting
== 3 && current_itr
== lowest_latency
)
2700 current_itr
= low_latency
;
2702 switch (current_itr
) {
2703 /* counts and packets in update_itr are dependent on these numbers */
2704 case lowest_latency
:
2708 new_itr
= 20000; /* aka hwitr = ~200 */
2718 adapter
->rx_ring
->total_bytes
= 0;
2719 adapter
->rx_ring
->total_packets
= 0;
2720 if (adapter
->rx_ring
->buddy
) {
2721 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2722 adapter
->rx_ring
->buddy
->total_packets
= 0;
2725 if (new_itr
!= adapter
->itr
) {
2726 /* this attempts to bias the interrupt rate towards Bulk
2727 * by adding intermediate steps when interrupt rate is
2729 new_itr
= new_itr
> adapter
->itr
?
2730 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2732 /* Don't write the value here; it resets the adapter's
2733 * internal timer, and causes us to delay far longer than
2734 * we should between interrupts. Instead, we write the ITR
2735 * value at the beginning of the next interrupt so the timing
2736 * ends up being correct.
2738 adapter
->itr
= new_itr
;
2739 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2740 adapter
->rx_ring
->set_itr
= 1;
2747 #define IGB_TX_FLAGS_CSUM 0x00000001
2748 #define IGB_TX_FLAGS_VLAN 0x00000002
2749 #define IGB_TX_FLAGS_TSO 0x00000004
2750 #define IGB_TX_FLAGS_IPV4 0x00000008
2751 #define IGB_TX_FLAGS_TSTAMP 0x00000010
2752 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2753 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2755 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2756 struct igb_ring
*tx_ring
,
2757 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2759 struct e1000_adv_tx_context_desc
*context_desc
;
2762 struct igb_buffer
*buffer_info
;
2763 u32 info
= 0, tu_cmd
= 0;
2764 u32 mss_l4len_idx
, l4len
;
2767 if (skb_header_cloned(skb
)) {
2768 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2773 l4len
= tcp_hdrlen(skb
);
2776 if (skb
->protocol
== htons(ETH_P_IP
)) {
2777 struct iphdr
*iph
= ip_hdr(skb
);
2780 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2784 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2785 ipv6_hdr(skb
)->payload_len
= 0;
2786 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2787 &ipv6_hdr(skb
)->daddr
,
2791 i
= tx_ring
->next_to_use
;
2793 buffer_info
= &tx_ring
->buffer_info
[i
];
2794 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2795 /* VLAN MACLEN IPLEN */
2796 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2797 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2798 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2799 *hdr_len
+= skb_network_offset(skb
);
2800 info
|= skb_network_header_len(skb
);
2801 *hdr_len
+= skb_network_header_len(skb
);
2802 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2804 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2805 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2807 if (skb
->protocol
== htons(ETH_P_IP
))
2808 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2809 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2811 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2814 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2815 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2817 /* For 82575, context index must be unique per ring. */
2818 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2819 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2821 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2822 context_desc
->seqnum_seed
= 0;
2824 buffer_info
->time_stamp
= jiffies
;
2825 buffer_info
->next_to_watch
= i
;
2826 buffer_info
->dma
= 0;
2828 if (i
== tx_ring
->count
)
2831 tx_ring
->next_to_use
= i
;
2836 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2837 struct igb_ring
*tx_ring
,
2838 struct sk_buff
*skb
, u32 tx_flags
)
2840 struct e1000_adv_tx_context_desc
*context_desc
;
2842 struct igb_buffer
*buffer_info
;
2843 u32 info
= 0, tu_cmd
= 0;
2845 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
2846 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
2847 i
= tx_ring
->next_to_use
;
2848 buffer_info
= &tx_ring
->buffer_info
[i
];
2849 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2851 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2852 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2853 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2854 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2855 info
|= skb_network_header_len(skb
);
2857 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2859 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2861 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2862 switch (skb
->protocol
) {
2863 case cpu_to_be16(ETH_P_IP
):
2864 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2865 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
2866 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2868 case cpu_to_be16(ETH_P_IPV6
):
2869 /* XXX what about other V6 headers?? */
2870 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
2871 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2874 if (unlikely(net_ratelimit()))
2875 dev_warn(&adapter
->pdev
->dev
,
2876 "partial checksum but proto=%x!\n",
2882 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2883 context_desc
->seqnum_seed
= 0;
2884 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2885 context_desc
->mss_l4len_idx
=
2886 cpu_to_le32(tx_ring
->queue_index
<< 4);
2888 context_desc
->mss_l4len_idx
= 0;
2890 buffer_info
->time_stamp
= jiffies
;
2891 buffer_info
->next_to_watch
= i
;
2892 buffer_info
->dma
= 0;
2895 if (i
== tx_ring
->count
)
2897 tx_ring
->next_to_use
= i
;
2904 #define IGB_MAX_TXD_PWR 16
2905 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2907 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
2908 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
2911 struct igb_buffer
*buffer_info
;
2912 unsigned int len
= skb_headlen(skb
);
2913 unsigned int count
= 0, i
;
2916 i
= tx_ring
->next_to_use
;
2918 buffer_info
= &tx_ring
->buffer_info
[i
];
2919 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2920 buffer_info
->length
= len
;
2921 /* set time_stamp *before* dma to help avoid a possible race */
2922 buffer_info
->time_stamp
= jiffies
;
2923 buffer_info
->next_to_watch
= i
;
2924 buffer_info
->dma
= pci_map_single(adapter
->pdev
, skb
->data
, len
,
2928 if (i
== tx_ring
->count
)
2931 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
2932 struct skb_frag_struct
*frag
;
2934 frag
= &skb_shinfo(skb
)->frags
[f
];
2937 buffer_info
= &tx_ring
->buffer_info
[i
];
2938 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2939 buffer_info
->length
= len
;
2940 buffer_info
->time_stamp
= jiffies
;
2941 buffer_info
->next_to_watch
= i
;
2942 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2950 if (i
== tx_ring
->count
)
2954 i
= ((i
== 0) ? tx_ring
->count
- 1 : i
- 1);
2955 tx_ring
->buffer_info
[i
].skb
= skb
;
2956 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
2961 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
2962 struct igb_ring
*tx_ring
,
2963 int tx_flags
, int count
, u32 paylen
,
2966 union e1000_adv_tx_desc
*tx_desc
= NULL
;
2967 struct igb_buffer
*buffer_info
;
2968 u32 olinfo_status
= 0, cmd_type_len
;
2971 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
2972 E1000_ADVTXD_DCMD_DEXT
);
2974 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2975 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
2977 if (tx_flags
& IGB_TX_FLAGS_TSTAMP
)
2978 cmd_type_len
|= E1000_ADVTXD_MAC_TSTAMP
;
2980 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
2981 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
2983 /* insert tcp checksum */
2984 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2986 /* insert ip checksum */
2987 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
2988 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
2990 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
2991 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2994 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
2995 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
2996 IGB_TX_FLAGS_VLAN
)))
2997 olinfo_status
|= tx_ring
->queue_index
<< 4;
2999 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
3001 i
= tx_ring
->next_to_use
;
3003 buffer_info
= &tx_ring
->buffer_info
[i
];
3004 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3005 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
3006 tx_desc
->read
.cmd_type_len
=
3007 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
3008 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3010 if (i
== tx_ring
->count
)
3014 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
3015 /* Force memory writes to complete before letting h/w
3016 * know there are new descriptors to fetch. (Only
3017 * applicable for weak-ordered memory model archs,
3018 * such as IA-64). */
3021 tx_ring
->next_to_use
= i
;
3022 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3023 /* we need this if more than one processor can write to our tail
3024 * at a time, it syncronizes IO on IA64/Altix systems */
3028 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
3029 struct igb_ring
*tx_ring
, int size
)
3031 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3033 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3035 /* Herbert's original patch had:
3036 * smp_mb__after_netif_stop_queue();
3037 * but since that doesn't exist yet, just open code it. */
3040 /* We need to check again in a case another CPU has just
3041 * made room available. */
3042 if (IGB_DESC_UNUSED(tx_ring
) < size
)
3046 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3047 ++adapter
->restart_queue
;
3051 static int igb_maybe_stop_tx(struct net_device
*netdev
,
3052 struct igb_ring
*tx_ring
, int size
)
3054 if (IGB_DESC_UNUSED(tx_ring
) >= size
)
3056 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
3059 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
3060 struct net_device
*netdev
,
3061 struct igb_ring
*tx_ring
)
3063 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3065 unsigned int tx_flags
= 0;
3068 union skb_shared_tx
*shtx
;
3070 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
3071 dev_kfree_skb_any(skb
);
3072 return NETDEV_TX_OK
;
3075 if (skb
->len
<= 0) {
3076 dev_kfree_skb_any(skb
);
3077 return NETDEV_TX_OK
;
3080 /* need: 1 descriptor per page,
3081 * + 2 desc gap to keep tail from touching head,
3082 * + 1 desc for skb->data,
3083 * + 1 desc for context descriptor,
3084 * otherwise try next time */
3085 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3086 /* this is a hard error */
3087 return NETDEV_TX_BUSY
;
3091 * TODO: check that there currently is no other packet with
3092 * time stamping in the queue
3094 * When doing time stamping, keep the connection to the socket
3095 * a while longer: it is still needed by skb_hwtstamp_tx(),
3096 * called either in igb_tx_hwtstamp() or by our caller when
3097 * doing software time stamping.
3100 if (unlikely(shtx
->hardware
)) {
3101 shtx
->in_progress
= 1;
3102 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
3103 } else if (likely(!shtx
->software
)) {
3105 * TODO: can this be solved in dev.c:dev_hard_start_xmit()?
3106 * There are probably unmodified driver which do something
3107 * like this and thus don't work in combination with
3108 * SOF_TIMESTAMPING_TX_SOFTWARE.
3113 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3114 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3115 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3118 if (skb
->protocol
== htons(ETH_P_IP
))
3119 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3121 first
= tx_ring
->next_to_use
;
3122 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3126 dev_kfree_skb_any(skb
);
3127 return NETDEV_TX_OK
;
3131 tx_flags
|= IGB_TX_FLAGS_TSO
;
3132 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
) &&
3133 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3134 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3136 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
,
3137 igb_tx_map_adv(adapter
, tx_ring
, skb
, first
),
3140 netdev
->trans_start
= jiffies
;
3142 /* Make sure there is space in the ring for the next send. */
3143 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3145 return NETDEV_TX_OK
;
3148 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3150 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3151 struct igb_ring
*tx_ring
;
3154 r_idx
= skb
->queue_mapping
& (IGB_MAX_TX_QUEUES
- 1);
3155 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3157 /* This goes back to the question of how to logically map a tx queue
3158 * to a flow. Right now, performance is impacted slightly negatively
3159 * if using multiple tx queues. If the stack breaks away from a
3160 * single qdisc implementation, we can look at this again. */
3161 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3165 * igb_tx_timeout - Respond to a Tx Hang
3166 * @netdev: network interface device structure
3168 static void igb_tx_timeout(struct net_device
*netdev
)
3170 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3171 struct e1000_hw
*hw
= &adapter
->hw
;
3173 /* Do the reset outside of interrupt context */
3174 adapter
->tx_timeout_count
++;
3175 schedule_work(&adapter
->reset_task
);
3177 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3180 static void igb_reset_task(struct work_struct
*work
)
3182 struct igb_adapter
*adapter
;
3183 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3185 igb_reinit_locked(adapter
);
3189 * igb_get_stats - Get System Network Statistics
3190 * @netdev: network interface device structure
3192 * Returns the address of the device statistics structure.
3193 * The statistics are actually updated from the timer callback.
3195 static struct net_device_stats
*igb_get_stats(struct net_device
*netdev
)
3197 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3199 /* only return the current stats */
3200 return &adapter
->net_stats
;
3204 * igb_change_mtu - Change the Maximum Transfer Unit
3205 * @netdev: network interface device structure
3206 * @new_mtu: new value for maximum frame size
3208 * Returns 0 on success, negative on failure
3210 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3212 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3213 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3215 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3216 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3217 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3221 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3222 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3223 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3227 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3230 /* igb_down has a dependency on max_frame_size */
3231 adapter
->max_frame_size
= max_frame
;
3232 if (netif_running(netdev
))
3235 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3236 * means we reserve 2 more, this pushes us to allocate from the next
3238 * i.e. RXBUFFER_2048 --> size-4096 slab
3241 if (max_frame
<= IGB_RXBUFFER_256
)
3242 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3243 else if (max_frame
<= IGB_RXBUFFER_512
)
3244 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3245 else if (max_frame
<= IGB_RXBUFFER_1024
)
3246 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3247 else if (max_frame
<= IGB_RXBUFFER_2048
)
3248 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3250 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3251 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3253 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3255 /* adjust allocation if LPE protects us, and we aren't using SBP */
3256 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3257 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3258 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3260 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3261 netdev
->mtu
, new_mtu
);
3262 netdev
->mtu
= new_mtu
;
3264 if (netif_running(netdev
))
3269 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3275 * igb_update_stats - Update the board statistics counters
3276 * @adapter: board private structure
3279 void igb_update_stats(struct igb_adapter
*adapter
)
3281 struct e1000_hw
*hw
= &adapter
->hw
;
3282 struct pci_dev
*pdev
= adapter
->pdev
;
3285 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3288 * Prevent stats update while adapter is being reset, or if the pci
3289 * connection is down.
3291 if (adapter
->link_speed
== 0)
3293 if (pci_channel_offline(pdev
))
3296 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3297 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3298 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3299 rd32(E1000_GORCH
); /* clear GORCL */
3300 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3301 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3302 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3304 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3305 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3306 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3307 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3308 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3309 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3310 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3311 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3313 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3314 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3315 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3316 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3317 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3318 adapter
->stats
.dc
+= rd32(E1000_DC
);
3319 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3320 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3321 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3322 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3323 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3324 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3325 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3326 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3327 rd32(E1000_GOTCH
); /* clear GOTCL */
3328 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3329 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3330 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3331 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3332 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3333 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3334 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3336 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3337 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3338 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3339 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3340 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3341 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3343 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3344 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3346 /* used for adaptive IFS */
3348 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3349 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3350 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3351 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3353 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3354 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3355 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3356 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3357 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3359 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3360 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3361 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3362 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3363 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3364 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3365 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3366 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3367 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3369 /* Fill out the OS statistics structure */
3370 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3371 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3375 /* RLEC on some newer hardware can be incorrect so build
3376 * our own version based on RUC and ROC */
3377 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3378 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3379 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3380 adapter
->stats
.cexterr
;
3381 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3383 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3384 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3385 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3388 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3389 adapter
->stats
.latecol
;
3390 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3391 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3392 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3394 /* Tx Dropped needs to be maintained elsewhere */
3397 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3398 if ((adapter
->link_speed
== SPEED_1000
) &&
3399 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
3400 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3401 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3405 /* Management Stats */
3406 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3407 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3408 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3411 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3413 struct net_device
*netdev
= data
;
3414 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3415 struct e1000_hw
*hw
= &adapter
->hw
;
3416 u32 icr
= rd32(E1000_ICR
);
3418 /* reading ICR causes bit 31 of EICR to be cleared */
3420 if(icr
& E1000_ICR_DOUTSYNC
) {
3421 /* HW is reporting DMA is out of sync */
3422 adapter
->stats
.doosync
++;
3424 if (!(icr
& E1000_ICR_LSC
))
3425 goto no_link_interrupt
;
3426 hw
->mac
.get_link_status
= 1;
3427 /* guard against interrupt when we're going down */
3428 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3429 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3432 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
);
3433 wr32(E1000_EIMS
, adapter
->eims_other
);
3438 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3440 struct igb_ring
*tx_ring
= data
;
3441 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3442 struct e1000_hw
*hw
= &adapter
->hw
;
3444 #ifdef CONFIG_IGB_DCA
3445 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3446 igb_update_tx_dca(tx_ring
);
3449 tx_ring
->total_bytes
= 0;
3450 tx_ring
->total_packets
= 0;
3452 /* auto mask will automatically reenable the interrupt when we write
3454 if (!igb_clean_tx_irq(tx_ring
))
3455 /* Ring was not completely cleaned, so fire another interrupt */
3456 wr32(E1000_EICS
, tx_ring
->eims_value
);
3458 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3463 static void igb_write_itr(struct igb_ring
*ring
)
3465 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3466 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3467 switch (hw
->mac
.type
) {
3469 wr32(ring
->itr_register
, ring
->itr_val
|
3473 wr32(ring
->itr_register
, ring
->itr_val
|
3474 (ring
->itr_val
<< 16));
3481 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3483 struct igb_ring
*rx_ring
= data
;
3485 /* Write the ITR value calculated at the end of the
3486 * previous interrupt.
3489 igb_write_itr(rx_ring
);
3491 if (napi_schedule_prep(&rx_ring
->napi
))
3492 __napi_schedule(&rx_ring
->napi
);
3494 #ifdef CONFIG_IGB_DCA
3495 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3496 igb_update_rx_dca(rx_ring
);
3501 #ifdef CONFIG_IGB_DCA
3502 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3505 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3506 struct e1000_hw
*hw
= &adapter
->hw
;
3507 int cpu
= get_cpu();
3508 int q
= rx_ring
->reg_idx
;
3510 if (rx_ring
->cpu
!= cpu
) {
3511 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3512 if (hw
->mac
.type
== e1000_82576
) {
3513 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3514 dca_rxctrl
|= dca_get_tag(cpu
) <<
3515 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3517 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3518 dca_rxctrl
|= dca_get_tag(cpu
);
3520 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3521 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3522 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3523 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3529 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3532 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3533 struct e1000_hw
*hw
= &adapter
->hw
;
3534 int cpu
= get_cpu();
3535 int q
= tx_ring
->reg_idx
;
3537 if (tx_ring
->cpu
!= cpu
) {
3538 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3539 if (hw
->mac
.type
== e1000_82576
) {
3540 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3541 dca_txctrl
|= dca_get_tag(cpu
) <<
3542 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3544 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3545 dca_txctrl
|= dca_get_tag(cpu
);
3547 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3548 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3554 static void igb_setup_dca(struct igb_adapter
*adapter
)
3558 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3561 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3562 adapter
->tx_ring
[i
].cpu
= -1;
3563 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3565 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3566 adapter
->rx_ring
[i
].cpu
= -1;
3567 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3571 static int __igb_notify_dca(struct device
*dev
, void *data
)
3573 struct net_device
*netdev
= dev_get_drvdata(dev
);
3574 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3575 struct e1000_hw
*hw
= &adapter
->hw
;
3576 unsigned long event
= *(unsigned long *)data
;
3579 case DCA_PROVIDER_ADD
:
3580 /* if already enabled, don't do it again */
3581 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3583 /* Always use CB2 mode, difference is masked
3584 * in the CB driver. */
3585 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3586 if (dca_add_requester(dev
) == 0) {
3587 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3588 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3589 igb_setup_dca(adapter
);
3592 /* Fall Through since DCA is disabled. */
3593 case DCA_PROVIDER_REMOVE
:
3594 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3595 /* without this a class_device is left
3596 * hanging around in the sysfs model */
3597 dca_remove_requester(dev
);
3598 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3599 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3600 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
3608 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3613 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3616 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3618 #endif /* CONFIG_IGB_DCA */
3621 * igb_intr_msi - Interrupt Handler
3622 * @irq: interrupt number
3623 * @data: pointer to a network interface device structure
3625 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
3627 struct net_device
*netdev
= data
;
3628 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3629 struct e1000_hw
*hw
= &adapter
->hw
;
3630 /* read ICR disables interrupts using IAM */
3631 u32 icr
= rd32(E1000_ICR
);
3633 igb_write_itr(adapter
->rx_ring
);
3635 if(icr
& E1000_ICR_DOUTSYNC
) {
3636 /* HW is reporting DMA is out of sync */
3637 adapter
->stats
.doosync
++;
3640 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3641 hw
->mac
.get_link_status
= 1;
3642 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3643 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3646 napi_schedule(&adapter
->rx_ring
[0].napi
);
3652 * igb_intr - Legacy Interrupt Handler
3653 * @irq: interrupt number
3654 * @data: pointer to a network interface device structure
3656 static irqreturn_t
igb_intr(int irq
, void *data
)
3658 struct net_device
*netdev
= data
;
3659 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3660 struct e1000_hw
*hw
= &adapter
->hw
;
3661 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3662 * need for the IMC write */
3663 u32 icr
= rd32(E1000_ICR
);
3665 return IRQ_NONE
; /* Not our interrupt */
3667 igb_write_itr(adapter
->rx_ring
);
3669 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3670 * not set, then the adapter didn't send an interrupt */
3671 if (!(icr
& E1000_ICR_INT_ASSERTED
))
3674 if(icr
& E1000_ICR_DOUTSYNC
) {
3675 /* HW is reporting DMA is out of sync */
3676 adapter
->stats
.doosync
++;
3679 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3680 hw
->mac
.get_link_status
= 1;
3681 /* guard against interrupt when we're going down */
3682 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3683 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3686 napi_schedule(&adapter
->rx_ring
[0].napi
);
3692 * igb_poll - NAPI Rx polling callback
3693 * @napi: napi polling structure
3694 * @budget: count of how many packets we should handle
3696 static int igb_poll(struct napi_struct
*napi
, int budget
)
3698 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3699 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3700 struct net_device
*netdev
= adapter
->netdev
;
3701 int tx_clean_complete
, work_done
= 0;
3703 /* this poll routine only supports one tx and one rx queue */
3704 #ifdef CONFIG_IGB_DCA
3705 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3706 igb_update_tx_dca(&adapter
->tx_ring
[0]);
3708 tx_clean_complete
= igb_clean_tx_irq(&adapter
->tx_ring
[0]);
3710 #ifdef CONFIG_IGB_DCA
3711 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3712 igb_update_rx_dca(&adapter
->rx_ring
[0]);
3714 igb_clean_rx_irq_adv(&adapter
->rx_ring
[0], &work_done
, budget
);
3716 /* If no Tx and not enough Rx work done, exit the polling mode */
3717 if ((tx_clean_complete
&& (work_done
< budget
)) ||
3718 !netif_running(netdev
)) {
3719 if (adapter
->itr_setting
& 3)
3720 igb_set_itr(adapter
);
3721 napi_complete(napi
);
3722 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3723 igb_irq_enable(adapter
);
3730 static int igb_clean_rx_ring_msix(struct napi_struct
*napi
, int budget
)
3732 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3733 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3734 struct e1000_hw
*hw
= &adapter
->hw
;
3735 struct net_device
*netdev
= adapter
->netdev
;
3738 #ifdef CONFIG_IGB_DCA
3739 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3740 igb_update_rx_dca(rx_ring
);
3742 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
3744 /* If not enough Rx work done, exit the polling mode */
3745 if ((work_done
== 0) || !netif_running(netdev
)) {
3746 napi_complete(napi
);
3748 if (adapter
->itr_setting
& 3) {
3749 if (adapter
->num_rx_queues
== 1)
3750 igb_set_itr(adapter
);
3752 igb_update_ring_itr(rx_ring
);
3754 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3755 wr32(E1000_EIMS
, rx_ring
->eims_value
);
3764 * igb_hwtstamp - utility function which checks for TX time stamp
3765 * @adapter: board private structure
3766 * @skb: packet that was just sent
3768 * If we were asked to do hardware stamping and such a time stamp is
3769 * available, then it must have been for this skb here because we only
3770 * allow only one such packet into the queue.
3772 static void igb_tx_hwtstamp(struct igb_adapter
*adapter
, struct sk_buff
*skb
)
3774 union skb_shared_tx
*shtx
= skb_tx(skb
);
3775 struct e1000_hw
*hw
= &adapter
->hw
;
3777 if (unlikely(shtx
->hardware
)) {
3778 u32 valid
= rd32(E1000_TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
;
3780 u64 regval
= rd32(E1000_TXSTMPL
);
3782 struct skb_shared_hwtstamps shhwtstamps
;
3784 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
3785 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
3786 ns
= timecounter_cyc2time(&adapter
->clock
,
3788 timecompare_update(&adapter
->compare
, ns
);
3789 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
3790 shhwtstamps
.syststamp
=
3791 timecompare_transform(&adapter
->compare
, ns
);
3792 skb_tstamp_tx(skb
, &shhwtstamps
);
3795 /* delayed orphaning: skb_tstamp_tx() needs the socket */
3801 * igb_clean_tx_irq - Reclaim resources after transmit completes
3802 * @adapter: board private structure
3803 * returns true if ring is completely cleaned
3805 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
3807 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3808 struct net_device
*netdev
= adapter
->netdev
;
3809 struct e1000_hw
*hw
= &adapter
->hw
;
3810 struct igb_buffer
*buffer_info
;
3811 struct sk_buff
*skb
;
3812 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
3813 unsigned int total_bytes
= 0, total_packets
= 0;
3814 unsigned int i
, eop
, count
= 0;
3815 bool cleaned
= false;
3817 i
= tx_ring
->next_to_clean
;
3818 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3819 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3821 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
3822 (count
< tx_ring
->count
)) {
3823 for (cleaned
= false; !cleaned
; count
++) {
3824 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3825 buffer_info
= &tx_ring
->buffer_info
[i
];
3826 cleaned
= (i
== eop
);
3827 skb
= buffer_info
->skb
;
3830 unsigned int segs
, bytecount
;
3831 /* gso_segs is currently only valid for tcp */
3832 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
3833 /* multiply data chunks by size of headers */
3834 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
3836 total_packets
+= segs
;
3837 total_bytes
+= bytecount
;
3839 igb_tx_hwtstamp(adapter
, skb
);
3842 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
3843 tx_desc
->wb
.status
= 0;
3846 if (i
== tx_ring
->count
)
3849 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3850 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3853 tx_ring
->next_to_clean
= i
;
3855 if (unlikely(count
&&
3856 netif_carrier_ok(netdev
) &&
3857 IGB_DESC_UNUSED(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
3858 /* Make sure that anybody stopping the queue after this
3859 * sees the new next_to_clean.
3862 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
3863 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
3864 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3865 ++adapter
->restart_queue
;
3869 if (tx_ring
->detect_tx_hung
) {
3870 /* Detect a transmit hang in hardware, this serializes the
3871 * check with the clearing of time_stamp and movement of i */
3872 tx_ring
->detect_tx_hung
= false;
3873 if (tx_ring
->buffer_info
[i
].time_stamp
&&
3874 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
3875 (adapter
->tx_timeout_factor
* HZ
))
3876 && !(rd32(E1000_STATUS
) &
3877 E1000_STATUS_TXOFF
)) {
3879 /* detected Tx unit hang */
3880 dev_err(&adapter
->pdev
->dev
,
3881 "Detected Tx Unit Hang\n"
3885 " next_to_use <%x>\n"
3886 " next_to_clean <%x>\n"
3887 "buffer_info[next_to_clean]\n"
3888 " time_stamp <%lx>\n"
3889 " next_to_watch <%x>\n"
3891 " desc.status <%x>\n",
3892 tx_ring
->queue_index
,
3893 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
3894 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
3895 tx_ring
->next_to_use
,
3896 tx_ring
->next_to_clean
,
3897 tx_ring
->buffer_info
[i
].time_stamp
,
3900 eop_desc
->wb
.status
);
3901 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3904 tx_ring
->total_bytes
+= total_bytes
;
3905 tx_ring
->total_packets
+= total_packets
;
3906 tx_ring
->tx_stats
.bytes
+= total_bytes
;
3907 tx_ring
->tx_stats
.packets
+= total_packets
;
3908 adapter
->net_stats
.tx_bytes
+= total_bytes
;
3909 adapter
->net_stats
.tx_packets
+= total_packets
;
3910 return (count
< tx_ring
->count
);
3914 * igb_receive_skb - helper function to handle rx indications
3915 * @ring: pointer to receive ring receving this packet
3916 * @status: descriptor status field as written by hardware
3917 * @rx_desc: receive descriptor containing vlan and type information.
3918 * @skb: pointer to sk_buff to be indicated to stack
3920 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
3921 union e1000_adv_rx_desc
* rx_desc
,
3922 struct sk_buff
*skb
)
3924 struct igb_adapter
* adapter
= ring
->adapter
;
3925 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
3927 skb_record_rx_queue(skb
, ring
->queue_index
);
3928 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
3930 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
3931 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
3934 napi_gro_receive(&ring
->napi
, skb
);
3937 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
3938 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
3940 netif_receive_skb(skb
);
3944 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
3945 u32 status_err
, struct sk_buff
*skb
)
3947 skb
->ip_summed
= CHECKSUM_NONE
;
3949 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3950 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
3952 /* TCP/UDP checksum error bit is set */
3954 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
3955 /* let the stack verify checksum errors */
3956 adapter
->hw_csum_err
++;
3959 /* It must be a TCP or UDP packet with a valid checksum */
3960 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
3961 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
3963 adapter
->hw_csum_good
++;
3966 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
3967 int *work_done
, int budget
)
3969 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3970 struct net_device
*netdev
= adapter
->netdev
;
3971 struct e1000_hw
*hw
= &adapter
->hw
;
3972 struct pci_dev
*pdev
= adapter
->pdev
;
3973 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
3974 struct igb_buffer
*buffer_info
, *next_buffer
;
3975 struct sk_buff
*skb
;
3976 bool cleaned
= false;
3977 int cleaned_count
= 0;
3978 unsigned int total_bytes
= 0, total_packets
= 0;
3980 u32 length
, hlen
, staterr
;
3982 i
= rx_ring
->next_to_clean
;
3983 buffer_info
= &rx_ring
->buffer_info
[i
];
3984 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3985 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3987 while (staterr
& E1000_RXD_STAT_DD
) {
3988 if (*work_done
>= budget
)
3992 skb
= buffer_info
->skb
;
3993 prefetch(skb
->data
- NET_IP_ALIGN
);
3994 buffer_info
->skb
= NULL
;
3997 if (i
== rx_ring
->count
)
3999 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4001 next_buffer
= &rx_ring
->buffer_info
[i
];
4003 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
4007 if (!adapter
->rx_ps_hdr_size
) {
4008 pci_unmap_single(pdev
, buffer_info
->dma
,
4009 adapter
->rx_buffer_len
+
4011 PCI_DMA_FROMDEVICE
);
4012 skb_put(skb
, length
);
4016 /* HW will not DMA in data larger than the given buffer, even
4017 * if it parses the (NFS, of course) header to be larger. In
4018 * that case, it fills the header buffer and spills the rest
4021 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
4022 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
4023 if (hlen
> adapter
->rx_ps_hdr_size
)
4024 hlen
= adapter
->rx_ps_hdr_size
;
4026 if (!skb_shinfo(skb
)->nr_frags
) {
4027 pci_unmap_single(pdev
, buffer_info
->dma
,
4028 adapter
->rx_ps_hdr_size
+ NET_IP_ALIGN
,
4029 PCI_DMA_FROMDEVICE
);
4034 pci_unmap_page(pdev
, buffer_info
->page_dma
,
4035 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
4036 buffer_info
->page_dma
= 0;
4038 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
4040 buffer_info
->page_offset
,
4043 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
4044 (page_count(buffer_info
->page
) != 1))
4045 buffer_info
->page
= NULL
;
4047 get_page(buffer_info
->page
);
4050 skb
->data_len
+= length
;
4052 skb
->truesize
+= length
;
4055 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
4056 buffer_info
->skb
= next_buffer
->skb
;
4057 buffer_info
->dma
= next_buffer
->dma
;
4058 next_buffer
->skb
= skb
;
4059 next_buffer
->dma
= 0;
4064 * If this bit is set, then the RX registers contain
4065 * the time stamp. No other packet will be time
4066 * stamped until we read these registers, so read the
4067 * registers to make them available again. Because
4068 * only one packet can be time stamped at a time, we
4069 * know that the register values must belong to this
4070 * one here and therefore we don't need to compare
4071 * any of the additional attributes stored for it.
4073 * If nothing went wrong, then it should have a
4074 * skb_shared_tx that we can turn into a
4075 * skb_shared_hwtstamps.
4077 * TODO: can time stamping be triggered (thus locking
4078 * the registers) without the packet reaching this point
4079 * here? In that case RX time stamping would get stuck.
4081 * TODO: in "time stamp all packets" mode this bit is
4082 * not set. Need a global flag for this mode and then
4083 * always read the registers. Cannot be done without
4086 if (unlikely(staterr
& E1000_RXD_STAT_TS
)) {
4089 struct skb_shared_hwtstamps
*shhwtstamps
=
4092 WARN(!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
),
4093 "igb: no RX time stamp available for time stamped packet");
4094 regval
= rd32(E1000_RXSTMPL
);
4095 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
4096 ns
= timecounter_cyc2time(&adapter
->clock
, regval
);
4097 timecompare_update(&adapter
->compare
, ns
);
4098 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
4099 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
4100 shhwtstamps
->syststamp
=
4101 timecompare_transform(&adapter
->compare
, ns
);
4104 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
4105 dev_kfree_skb_irq(skb
);
4109 total_bytes
+= skb
->len
;
4112 igb_rx_checksum_adv(adapter
, staterr
, skb
);
4114 skb
->protocol
= eth_type_trans(skb
, netdev
);
4116 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
4119 rx_desc
->wb
.upper
.status_error
= 0;
4121 /* return some buffers to hardware, one at a time is too slow */
4122 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
4123 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4127 /* use prefetched values */
4129 buffer_info
= next_buffer
;
4130 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4133 rx_ring
->next_to_clean
= i
;
4134 cleaned_count
= IGB_DESC_UNUSED(rx_ring
);
4137 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4139 rx_ring
->total_packets
+= total_packets
;
4140 rx_ring
->total_bytes
+= total_bytes
;
4141 rx_ring
->rx_stats
.packets
+= total_packets
;
4142 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4143 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4144 adapter
->net_stats
.rx_packets
+= total_packets
;
4149 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4150 * @adapter: address of board private structure
4152 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4155 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4156 struct net_device
*netdev
= adapter
->netdev
;
4157 struct pci_dev
*pdev
= adapter
->pdev
;
4158 union e1000_adv_rx_desc
*rx_desc
;
4159 struct igb_buffer
*buffer_info
;
4160 struct sk_buff
*skb
;
4164 i
= rx_ring
->next_to_use
;
4165 buffer_info
= &rx_ring
->buffer_info
[i
];
4167 if (adapter
->rx_ps_hdr_size
)
4168 bufsz
= adapter
->rx_ps_hdr_size
;
4170 bufsz
= adapter
->rx_buffer_len
;
4171 bufsz
+= NET_IP_ALIGN
;
4173 while (cleaned_count
--) {
4174 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4176 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4177 if (!buffer_info
->page
) {
4178 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4179 if (!buffer_info
->page
) {
4180 adapter
->alloc_rx_buff_failed
++;
4183 buffer_info
->page_offset
= 0;
4185 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4187 buffer_info
->page_dma
=
4188 pci_map_page(pdev
, buffer_info
->page
,
4189 buffer_info
->page_offset
,
4191 PCI_DMA_FROMDEVICE
);
4194 if (!buffer_info
->skb
) {
4195 skb
= netdev_alloc_skb(netdev
, bufsz
);
4197 adapter
->alloc_rx_buff_failed
++;
4201 /* Make buffer alignment 2 beyond a 16 byte boundary
4202 * this will result in a 16 byte aligned IP header after
4203 * the 14 byte MAC header is removed
4205 skb_reserve(skb
, NET_IP_ALIGN
);
4207 buffer_info
->skb
= skb
;
4208 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4210 PCI_DMA_FROMDEVICE
);
4212 /* Refresh the desc even if buffer_addrs didn't change because
4213 * each write-back erases this info. */
4214 if (adapter
->rx_ps_hdr_size
) {
4215 rx_desc
->read
.pkt_addr
=
4216 cpu_to_le64(buffer_info
->page_dma
);
4217 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4219 rx_desc
->read
.pkt_addr
=
4220 cpu_to_le64(buffer_info
->dma
);
4221 rx_desc
->read
.hdr_addr
= 0;
4225 if (i
== rx_ring
->count
)
4227 buffer_info
= &rx_ring
->buffer_info
[i
];
4231 if (rx_ring
->next_to_use
!= i
) {
4232 rx_ring
->next_to_use
= i
;
4234 i
= (rx_ring
->count
- 1);
4238 /* Force memory writes to complete before letting h/w
4239 * know there are new descriptors to fetch. (Only
4240 * applicable for weak-ordered memory model archs,
4241 * such as IA-64). */
4243 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4253 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4255 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4256 struct mii_ioctl_data
*data
= if_mii(ifr
);
4258 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4263 data
->phy_id
= adapter
->hw
.phy
.addr
;
4266 if (!capable(CAP_NET_ADMIN
))
4268 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4280 * igb_hwtstamp_ioctl - control hardware time stamping
4285 * Outgoing time stamping can be enabled and disabled. Play nice and
4286 * disable it when requested, although it shouldn't case any overhead
4287 * when no packet needs it. At most one packet in the queue may be
4288 * marked for time stamping, otherwise it would be impossible to tell
4289 * for sure to which packet the hardware time stamp belongs.
4291 * Incoming time stamping has to be configured via the hardware
4292 * filters. Not all combinations are supported, in particular event
4293 * type has to be specified. Matching the kind of event packet is
4294 * not supported, with the exception of "all V2 events regardless of
4298 static int igb_hwtstamp_ioctl(struct net_device
*netdev
,
4299 struct ifreq
*ifr
, int cmd
)
4301 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4302 struct e1000_hw
*hw
= &adapter
->hw
;
4303 struct hwtstamp_config config
;
4304 u32 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4305 u32 tsync_rx_ctl_bit
= E1000_TSYNCRXCTL_ENABLED
;
4306 u32 tsync_rx_ctl_type
= 0;
4307 u32 tsync_rx_cfg
= 0;
4310 short port
= 319; /* PTP */
4313 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
4316 /* reserved for future extensions */
4320 switch (config
.tx_type
) {
4321 case HWTSTAMP_TX_OFF
:
4322 tsync_tx_ctl_bit
= 0;
4324 case HWTSTAMP_TX_ON
:
4325 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4331 switch (config
.rx_filter
) {
4332 case HWTSTAMP_FILTER_NONE
:
4333 tsync_rx_ctl_bit
= 0;
4335 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
4336 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
4337 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
4338 case HWTSTAMP_FILTER_ALL
:
4340 * register TSYNCRXCFG must be set, therefore it is not
4341 * possible to time stamp both Sync and Delay_Req messages
4342 * => fall back to time stamping all packets
4344 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_ALL
;
4345 config
.rx_filter
= HWTSTAMP_FILTER_ALL
;
4347 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
4348 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4349 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
4352 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
4353 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4354 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
4357 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
4358 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
4359 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4360 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
;
4363 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4365 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
4366 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
4367 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4368 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
;
4371 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4373 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
4374 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
4375 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
4376 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
4377 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
4384 /* enable/disable TX */
4385 regval
= rd32(E1000_TSYNCTXCTL
);
4386 regval
= (regval
& ~E1000_TSYNCTXCTL_ENABLED
) | tsync_tx_ctl_bit
;
4387 wr32(E1000_TSYNCTXCTL
, regval
);
4389 /* enable/disable RX, define which PTP packets are time stamped */
4390 regval
= rd32(E1000_TSYNCRXCTL
);
4391 regval
= (regval
& ~E1000_TSYNCRXCTL_ENABLED
) | tsync_rx_ctl_bit
;
4392 regval
= (regval
& ~0xE) | tsync_rx_ctl_type
;
4393 wr32(E1000_TSYNCRXCTL
, regval
);
4394 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
4397 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
4398 * (Ethertype to filter on)
4399 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
4400 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
4402 wr32(E1000_ETQF0
, is_l2
? 0x440088f7 : 0);
4404 /* L4 Queue Filter[0]: only filter by source and destination port */
4405 wr32(E1000_SPQF0
, htons(port
));
4406 wr32(E1000_IMIREXT(0), is_l4
?
4407 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
4408 wr32(E1000_IMIR(0), is_l4
?
4410 | (0<<16) /* immediate interrupt disabled */
4411 | 0 /* (1<<17) bit cleared: do not bypass
4412 destination port check */)
4414 wr32(E1000_FTQF0
, is_l4
?
4416 | (1<<15) /* VF not compared */
4417 | (1<<27) /* Enable Timestamping */
4418 | (7<<28) /* only source port filter enabled,
4419 source/target address and protocol
4421 : ((1<<15) | (15<<28) /* all mask bits set = filter not
4426 adapter
->hwtstamp_config
= config
;
4428 /* clear TX/RX time stamp registers, just to be sure */
4429 regval
= rd32(E1000_TXSTMPH
);
4430 regval
= rd32(E1000_RXSTMPH
);
4432 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
4442 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4448 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4450 return igb_hwtstamp_ioctl(netdev
, ifr
, cmd
);
4456 static void igb_vlan_rx_register(struct net_device
*netdev
,
4457 struct vlan_group
*grp
)
4459 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4460 struct e1000_hw
*hw
= &adapter
->hw
;
4463 igb_irq_disable(adapter
);
4464 adapter
->vlgrp
= grp
;
4467 /* enable VLAN tag insert/strip */
4468 ctrl
= rd32(E1000_CTRL
);
4469 ctrl
|= E1000_CTRL_VME
;
4470 wr32(E1000_CTRL
, ctrl
);
4472 /* enable VLAN receive filtering */
4473 rctl
= rd32(E1000_RCTL
);
4474 rctl
&= ~E1000_RCTL_CFIEN
;
4475 wr32(E1000_RCTL
, rctl
);
4476 igb_update_mng_vlan(adapter
);
4478 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
4480 /* disable VLAN tag insert/strip */
4481 ctrl
= rd32(E1000_CTRL
);
4482 ctrl
&= ~E1000_CTRL_VME
;
4483 wr32(E1000_CTRL
, ctrl
);
4485 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4486 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4487 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4490 adapter
->max_frame_size
);
4493 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4494 igb_irq_enable(adapter
);
4497 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4499 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4500 struct e1000_hw
*hw
= &adapter
->hw
;
4503 if ((hw
->mng_cookie
.status
&
4504 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4505 (vid
== adapter
->mng_vlan_id
))
4507 /* add VID to filter table */
4508 index
= (vid
>> 5) & 0x7F;
4509 vfta
= array_rd32(E1000_VFTA
, index
);
4510 vfta
|= (1 << (vid
& 0x1F));
4511 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4514 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4516 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4517 struct e1000_hw
*hw
= &adapter
->hw
;
4520 igb_irq_disable(adapter
);
4521 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4523 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4524 igb_irq_enable(adapter
);
4526 if ((adapter
->hw
.mng_cookie
.status
&
4527 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4528 (vid
== adapter
->mng_vlan_id
)) {
4529 /* release control to f/w */
4530 igb_release_hw_control(adapter
);
4534 /* remove VID from filter table */
4535 index
= (vid
>> 5) & 0x7F;
4536 vfta
= array_rd32(E1000_VFTA
, index
);
4537 vfta
&= ~(1 << (vid
& 0x1F));
4538 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4541 static void igb_restore_vlan(struct igb_adapter
*adapter
)
4543 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
4545 if (adapter
->vlgrp
) {
4547 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
4548 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
4550 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
4555 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
4557 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
4561 /* Fiber NICs only allow 1000 gbps Full duplex */
4562 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
4563 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
4564 dev_err(&adapter
->pdev
->dev
,
4565 "Unsupported Speed/Duplex configuration\n");
4570 case SPEED_10
+ DUPLEX_HALF
:
4571 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
4573 case SPEED_10
+ DUPLEX_FULL
:
4574 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
4576 case SPEED_100
+ DUPLEX_HALF
:
4577 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
4579 case SPEED_100
+ DUPLEX_FULL
:
4580 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
4582 case SPEED_1000
+ DUPLEX_FULL
:
4584 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
4586 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
4588 dev_err(&adapter
->pdev
->dev
,
4589 "Unsupported Speed/Duplex configuration\n");
4595 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4597 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4598 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4599 struct e1000_hw
*hw
= &adapter
->hw
;
4600 u32 ctrl
, rctl
, status
;
4601 u32 wufc
= adapter
->wol
;
4606 netif_device_detach(netdev
);
4608 if (netif_running(netdev
))
4611 igb_reset_interrupt_capability(adapter
);
4613 igb_free_queues(adapter
);
4616 retval
= pci_save_state(pdev
);
4621 status
= rd32(E1000_STATUS
);
4622 if (status
& E1000_STATUS_LU
)
4623 wufc
&= ~E1000_WUFC_LNKC
;
4626 igb_setup_rctl(adapter
);
4627 igb_set_multi(netdev
);
4629 /* turn on all-multi mode if wake on multicast is enabled */
4630 if (wufc
& E1000_WUFC_MC
) {
4631 rctl
= rd32(E1000_RCTL
);
4632 rctl
|= E1000_RCTL_MPE
;
4633 wr32(E1000_RCTL
, rctl
);
4636 ctrl
= rd32(E1000_CTRL
);
4637 /* advertise wake from D3Cold */
4638 #define E1000_CTRL_ADVD3WUC 0x00100000
4639 /* phy power management enable */
4640 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4641 ctrl
|= E1000_CTRL_ADVD3WUC
;
4642 wr32(E1000_CTRL
, ctrl
);
4644 /* Allow time for pending master requests to run */
4645 igb_disable_pcie_master(&adapter
->hw
);
4647 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
4648 wr32(E1000_WUFC
, wufc
);
4651 wr32(E1000_WUFC
, 0);
4654 /* make sure adapter isn't asleep if manageability/wol is enabled */
4655 if (wufc
|| adapter
->en_mng_pt
) {
4656 pci_enable_wake(pdev
, PCI_D3hot
, 1);
4657 pci_enable_wake(pdev
, PCI_D3cold
, 1);
4659 igb_shutdown_fiber_serdes_link_82575(hw
);
4660 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4661 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4664 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4665 * would have already happened in close and is redundant. */
4666 igb_release_hw_control(adapter
);
4668 pci_disable_device(pdev
);
4670 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
4676 static int igb_resume(struct pci_dev
*pdev
)
4678 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4679 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4680 struct e1000_hw
*hw
= &adapter
->hw
;
4683 pci_set_power_state(pdev
, PCI_D0
);
4684 pci_restore_state(pdev
);
4686 err
= pci_enable_device_mem(pdev
);
4689 "igb: Cannot enable PCI device from suspend\n");
4692 pci_set_master(pdev
);
4694 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4695 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4697 igb_set_interrupt_capability(adapter
);
4699 if (igb_alloc_queues(adapter
)) {
4700 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
4704 /* e1000_power_up_phy(adapter); */
4708 /* let the f/w know that the h/w is now under the control of the
4710 igb_get_hw_control(adapter
);
4712 wr32(E1000_WUS
, ~0);
4714 if (netif_running(netdev
)) {
4715 err
= igb_open(netdev
);
4720 netif_device_attach(netdev
);
4726 static void igb_shutdown(struct pci_dev
*pdev
)
4728 igb_suspend(pdev
, PMSG_SUSPEND
);
4731 #ifdef CONFIG_NET_POLL_CONTROLLER
4733 * Polling 'interrupt' - used by things like netconsole to send skbs
4734 * without having to re-enable interrupts. It's not called while
4735 * the interrupt routine is executing.
4737 static void igb_netpoll(struct net_device
*netdev
)
4739 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4740 struct e1000_hw
*hw
= &adapter
->hw
;
4743 if (!adapter
->msix_entries
) {
4744 igb_irq_disable(adapter
);
4745 napi_schedule(&adapter
->rx_ring
[0].napi
);
4749 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4750 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
4751 wr32(E1000_EIMC
, tx_ring
->eims_value
);
4752 igb_clean_tx_irq(tx_ring
);
4753 wr32(E1000_EIMS
, tx_ring
->eims_value
);
4756 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4757 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
4758 wr32(E1000_EIMC
, rx_ring
->eims_value
);
4759 napi_schedule(&rx_ring
->napi
);
4762 #endif /* CONFIG_NET_POLL_CONTROLLER */
4765 * igb_io_error_detected - called when PCI error is detected
4766 * @pdev: Pointer to PCI device
4767 * @state: The current pci connection state
4769 * This function is called after a PCI bus error affecting
4770 * this device has been detected.
4772 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
4773 pci_channel_state_t state
)
4775 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4776 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4778 netif_device_detach(netdev
);
4780 if (netif_running(netdev
))
4782 pci_disable_device(pdev
);
4784 /* Request a slot slot reset. */
4785 return PCI_ERS_RESULT_NEED_RESET
;
4789 * igb_io_slot_reset - called after the pci bus has been reset.
4790 * @pdev: Pointer to PCI device
4792 * Restart the card from scratch, as if from a cold-boot. Implementation
4793 * resembles the first-half of the igb_resume routine.
4795 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
4797 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4798 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4799 struct e1000_hw
*hw
= &adapter
->hw
;
4800 pci_ers_result_t result
;
4803 if (pci_enable_device_mem(pdev
)) {
4805 "Cannot re-enable PCI device after reset.\n");
4806 result
= PCI_ERS_RESULT_DISCONNECT
;
4808 pci_set_master(pdev
);
4809 pci_restore_state(pdev
);
4811 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4812 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4815 wr32(E1000_WUS
, ~0);
4816 result
= PCI_ERS_RESULT_RECOVERED
;
4819 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4821 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
4822 "failed 0x%0x\n", err
);
4823 /* non-fatal, continue */
4830 * igb_io_resume - called when traffic can start flowing again.
4831 * @pdev: Pointer to PCI device
4833 * This callback is called when the error recovery driver tells us that
4834 * its OK to resume normal operation. Implementation resembles the
4835 * second-half of the igb_resume routine.
4837 static void igb_io_resume(struct pci_dev
*pdev
)
4839 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4840 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4842 if (netif_running(netdev
)) {
4843 if (igb_up(adapter
)) {
4844 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
4849 netif_device_attach(netdev
);
4851 /* let the f/w know that the h/w is now under the control of the
4853 igb_get_hw_control(adapter
);