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irda: New device ID for nsc-ircc
[deliverable/linux.git] / drivers / net / irda / nsc-ircc.c
1 /*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
16 * All Rights Reserved
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * Neither Dag Brattli nor University of Tromsø admit liability nor
24 * provide warranty for any of this software. This material is
25 * provided "AS-IS" and at no charge.
26 *
27 * Notice that all functions that needs to access the chip in _any_
28 * way, must save BSR register on entry, and restore it on exit.
29 * It is _very_ important to follow this policy!
30 *
31 * __u8 bank;
32 *
33 * bank = inb(iobase+BSR);
34 *
35 * do_your_stuff_here();
36 *
37 * outb(bank, iobase+BSR);
38 *
39 * If you find bugs in this file, its very likely that the same bug
40 * will also be in w83977af_ir.c since the implementations are quite
41 * similar.
42 *
43 ********************************************************************/
44
45 #include <linux/module.h>
46
47 #include <linux/kernel.h>
48 #include <linux/types.h>
49 #include <linux/skbuff.h>
50 #include <linux/netdevice.h>
51 #include <linux/ioport.h>
52 #include <linux/delay.h>
53 #include <linux/slab.h>
54 #include <linux/init.h>
55 #include <linux/rtnetlink.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/pnp.h>
58 #include <linux/platform_device.h>
59
60 #include <asm/io.h>
61 #include <asm/dma.h>
62 #include <asm/byteorder.h>
63
64 #include <net/irda/wrapper.h>
65 #include <net/irda/irda.h>
66 #include <net/irda/irda_device.h>
67
68 #include "nsc-ircc.h"
69
70 #define CHIP_IO_EXTENT 8
71 #define BROKEN_DONGLE_ID
72
73 static char *driver_name = "nsc-ircc";
74
75 /* Power Management */
76 #define NSC_IRCC_DRIVER_NAME "nsc-ircc"
77 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78 static int nsc_ircc_resume(struct platform_device *dev);
79
80 static struct platform_driver nsc_ircc_driver = {
81 .suspend = nsc_ircc_suspend,
82 .resume = nsc_ircc_resume,
83 .driver = {
84 .name = NSC_IRCC_DRIVER_NAME,
85 },
86 };
87
88 /* Module parameters */
89 static int qos_mtt_bits = 0x07; /* 1 ms or more */
90 static int dongle_id;
91
92 /* Use BIOS settions by default, but user may supply module parameters */
93 static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 };
94 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
95 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
96
97 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
98 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
99 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
103 #ifdef CONFIG_PNP
104 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
105 #endif
106
107 /* These are the known NSC chips */
108 static nsc_chip_t chips[] = {
109 /* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
110 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
111 nsc_ircc_probe_108, nsc_ircc_init_108 },
112 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
113 nsc_ircc_probe_338, nsc_ircc_init_338 },
114 /* Contributed by Steffen Pingel - IBM X40 */
115 { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
116 nsc_ircc_probe_39x, nsc_ircc_init_39x },
117 /* Contributed by Jan Frey - IBM A30/A31 */
118 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
119 nsc_ircc_probe_39x, nsc_ircc_init_39x },
120 /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
121 { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
122 nsc_ircc_probe_39x, nsc_ircc_init_39x },
123 /* IBM ThinkPads using PC8394T (T43/R52/?) */
124 { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
125 nsc_ircc_probe_39x, nsc_ircc_init_39x },
126 { NULL }
127 };
128
129 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
130
131 static char *dongle_types[] = {
132 "Differential serial interface",
133 "Differential serial interface",
134 "Reserved",
135 "Reserved",
136 "Sharp RY5HD01",
137 "Reserved",
138 "Single-ended serial interface",
139 "Consumer-IR only",
140 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
141 "IBM31T1100 or Temic TFDS6000/TFDS6500",
142 "Reserved",
143 "Reserved",
144 "HP HSDL-1100/HSDL-2100",
145 "HP HSDL-1100/HSDL-2100",
146 "Supports SIR Mode only",
147 "No dongle connected",
148 };
149
150 /* PNP probing */
151 static chipio_t pnp_info;
152 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
153 { .id = "NSC6001", .driver_data = 0 },
154 { .id = "IBM0071", .driver_data = 0 },
155 { .id = "HWPC224", .driver_data = 0 },
156 { }
157 };
158
159 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
160
161 static struct pnp_driver nsc_ircc_pnp_driver = {
162 #ifdef CONFIG_PNP
163 .name = "nsc-ircc",
164 .id_table = nsc_ircc_pnp_table,
165 .probe = nsc_ircc_pnp_probe,
166 #endif
167 };
168
169 /* Some prototypes */
170 static int nsc_ircc_open(chipio_t *info);
171 static int nsc_ircc_close(struct nsc_ircc_cb *self);
172 static int nsc_ircc_setup(chipio_t *info);
173 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
174 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
175 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
176 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
177 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
178 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
179 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
180 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
181 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
182 static int nsc_ircc_read_dongle_id (int iobase);
183 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
184
185 static int nsc_ircc_net_open(struct net_device *dev);
186 static int nsc_ircc_net_close(struct net_device *dev);
187 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
188 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
189
190 /* Globals */
191 static int pnp_registered;
192 static int pnp_succeeded;
193
194 /*
195 * Function nsc_ircc_init ()
196 *
197 * Initialize chip. Just try to find out how many chips we are dealing with
198 * and where they are
199 */
200 static int __init nsc_ircc_init(void)
201 {
202 chipio_t info;
203 nsc_chip_t *chip;
204 int ret;
205 int cfg_base;
206 int cfg, id;
207 int reg;
208 int i = 0;
209
210 ret = platform_driver_register(&nsc_ircc_driver);
211 if (ret) {
212 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
213 return ret;
214 }
215
216 /* Register with PnP subsystem to detect disable ports */
217 ret = pnp_register_driver(&nsc_ircc_pnp_driver);
218
219 if (!ret)
220 pnp_registered = 1;
221
222 ret = -ENODEV;
223
224 /* Probe for all the NSC chipsets we know about */
225 for (chip = chips; chip->name ; chip++) {
226 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
227 chip->name);
228
229 /* Try all config registers for this chip */
230 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
231 cfg_base = chip->cfg[cfg];
232 if (!cfg_base)
233 continue;
234
235 /* Read index register */
236 reg = inb(cfg_base);
237 if (reg == 0xff) {
238 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
239 continue;
240 }
241
242 /* Read chip identification register */
243 outb(chip->cid_index, cfg_base);
244 id = inb(cfg_base+1);
245 if ((id & chip->cid_mask) == chip->cid_value) {
246 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
247 __FUNCTION__, chip->name, id & ~chip->cid_mask);
248
249 /*
250 * If we found a correct PnP setting,
251 * we first try it.
252 */
253 if (pnp_succeeded) {
254 memset(&info, 0, sizeof(chipio_t));
255 info.cfg_base = cfg_base;
256 info.fir_base = pnp_info.fir_base;
257 info.dma = pnp_info.dma;
258 info.irq = pnp_info.irq;
259
260 if (info.fir_base < 0x2000) {
261 IRDA_MESSAGE("%s, chip->init\n", driver_name);
262 chip->init(chip, &info);
263 } else
264 chip->probe(chip, &info);
265
266 if (nsc_ircc_open(&info) >= 0)
267 ret = 0;
268 }
269
270 /*
271 * Opening based on PnP values failed.
272 * Let's fallback to user values, or probe
273 * the chip.
274 */
275 if (ret) {
276 IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
277 memset(&info, 0, sizeof(chipio_t));
278 info.cfg_base = cfg_base;
279 info.fir_base = io[i];
280 info.dma = dma[i];
281 info.irq = irq[i];
282
283 /*
284 * If the user supplies the base address, then
285 * we init the chip, if not we probe the values
286 * set by the BIOS
287 */
288 if (io[i] < 0x2000) {
289 chip->init(chip, &info);
290 } else
291 chip->probe(chip, &info);
292
293 if (nsc_ircc_open(&info) >= 0)
294 ret = 0;
295 }
296 i++;
297 } else {
298 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
299 }
300 }
301 }
302
303 if (ret) {
304 platform_driver_unregister(&nsc_ircc_driver);
305 pnp_unregister_driver(&nsc_ircc_pnp_driver);
306 pnp_registered = 0;
307 }
308
309 return ret;
310 }
311
312 /*
313 * Function nsc_ircc_cleanup ()
314 *
315 * Close all configured chips
316 *
317 */
318 static void __exit nsc_ircc_cleanup(void)
319 {
320 int i;
321
322 for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
323 if (dev_self[i])
324 nsc_ircc_close(dev_self[i]);
325 }
326
327 platform_driver_unregister(&nsc_ircc_driver);
328
329 if (pnp_registered)
330 pnp_unregister_driver(&nsc_ircc_pnp_driver);
331
332 pnp_registered = 0;
333 }
334
335 /*
336 * Function nsc_ircc_open (iobase, irq)
337 *
338 * Open driver instance
339 *
340 */
341 static int __init nsc_ircc_open(chipio_t *info)
342 {
343 struct net_device *dev;
344 struct nsc_ircc_cb *self;
345 void *ret;
346 int err, chip_index;
347
348 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
349
350
351 for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
352 if (!dev_self[chip_index])
353 break;
354 }
355
356 if (chip_index == ARRAY_SIZE(dev_self)) {
357 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__);
358 return -ENOMEM;
359 }
360
361 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
362 info->cfg_base);
363
364 if ((nsc_ircc_setup(info)) == -1)
365 return -1;
366
367 IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
368
369 dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
370 if (dev == NULL) {
371 IRDA_ERROR("%s(), can't allocate memory for "
372 "control block!\n", __FUNCTION__);
373 return -ENOMEM;
374 }
375
376 self = dev->priv;
377 self->netdev = dev;
378 spin_lock_init(&self->lock);
379
380 /* Need to store self somewhere */
381 dev_self[chip_index] = self;
382 self->index = chip_index;
383
384 /* Initialize IO */
385 self->io.cfg_base = info->cfg_base;
386 self->io.fir_base = info->fir_base;
387 self->io.irq = info->irq;
388 self->io.fir_ext = CHIP_IO_EXTENT;
389 self->io.dma = info->dma;
390 self->io.fifo_size = 32;
391
392 /* Reserve the ioports that we need */
393 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
394 if (!ret) {
395 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
396 __FUNCTION__, self->io.fir_base);
397 err = -ENODEV;
398 goto out1;
399 }
400
401 /* Initialize QoS for this device */
402 irda_init_max_qos_capabilies(&self->qos);
403
404 /* The only value we must override it the baudrate */
405 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
406 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
407
408 self->qos.min_turn_time.bits = qos_mtt_bits;
409 irda_qos_bits_to_value(&self->qos);
410
411 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
412 self->rx_buff.truesize = 14384;
413 self->tx_buff.truesize = 14384;
414
415 /* Allocate memory if needed */
416 self->rx_buff.head =
417 dma_alloc_coherent(NULL, self->rx_buff.truesize,
418 &self->rx_buff_dma, GFP_KERNEL);
419 if (self->rx_buff.head == NULL) {
420 err = -ENOMEM;
421 goto out2;
422
423 }
424 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
425
426 self->tx_buff.head =
427 dma_alloc_coherent(NULL, self->tx_buff.truesize,
428 &self->tx_buff_dma, GFP_KERNEL);
429 if (self->tx_buff.head == NULL) {
430 err = -ENOMEM;
431 goto out3;
432 }
433 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
434
435 self->rx_buff.in_frame = FALSE;
436 self->rx_buff.state = OUTSIDE_FRAME;
437 self->tx_buff.data = self->tx_buff.head;
438 self->rx_buff.data = self->rx_buff.head;
439
440 /* Reset Tx queue info */
441 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
442 self->tx_fifo.tail = self->tx_buff.head;
443
444 /* Override the network functions we need to use */
445 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
446 dev->open = nsc_ircc_net_open;
447 dev->stop = nsc_ircc_net_close;
448 dev->do_ioctl = nsc_ircc_net_ioctl;
449 dev->get_stats = nsc_ircc_net_get_stats;
450
451 err = register_netdev(dev);
452 if (err) {
453 IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
454 goto out4;
455 }
456 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
457
458 /* Check if user has supplied a valid dongle id or not */
459 if ((dongle_id <= 0) ||
460 (dongle_id >= ARRAY_SIZE(dongle_types))) {
461 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
462
463 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
464 dongle_types[dongle_id]);
465 } else {
466 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
467 dongle_types[dongle_id]);
468 }
469
470 self->io.dongle_id = dongle_id;
471 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
472
473 self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
474 self->index, NULL, 0);
475 if (IS_ERR(self->pldev)) {
476 err = PTR_ERR(self->pldev);
477 goto out5;
478 }
479 platform_set_drvdata(self->pldev, self);
480
481 return chip_index;
482
483 out5:
484 unregister_netdev(dev);
485 out4:
486 dma_free_coherent(NULL, self->tx_buff.truesize,
487 self->tx_buff.head, self->tx_buff_dma);
488 out3:
489 dma_free_coherent(NULL, self->rx_buff.truesize,
490 self->rx_buff.head, self->rx_buff_dma);
491 out2:
492 release_region(self->io.fir_base, self->io.fir_ext);
493 out1:
494 free_netdev(dev);
495 dev_self[chip_index] = NULL;
496 return err;
497 }
498
499 /*
500 * Function nsc_ircc_close (self)
501 *
502 * Close driver instance
503 *
504 */
505 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
506 {
507 int iobase;
508
509 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
510
511 IRDA_ASSERT(self != NULL, return -1;);
512
513 iobase = self->io.fir_base;
514
515 platform_device_unregister(self->pldev);
516
517 /* Remove netdevice */
518 unregister_netdev(self->netdev);
519
520 /* Release the PORT that this driver is using */
521 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
522 __FUNCTION__, self->io.fir_base);
523 release_region(self->io.fir_base, self->io.fir_ext);
524
525 if (self->tx_buff.head)
526 dma_free_coherent(NULL, self->tx_buff.truesize,
527 self->tx_buff.head, self->tx_buff_dma);
528
529 if (self->rx_buff.head)
530 dma_free_coherent(NULL, self->rx_buff.truesize,
531 self->rx_buff.head, self->rx_buff_dma);
532
533 dev_self[self->index] = NULL;
534 free_netdev(self->netdev);
535
536 return 0;
537 }
538
539 /*
540 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
541 *
542 * Initialize the NSC '108 chip
543 *
544 */
545 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
546 {
547 int cfg_base = info->cfg_base;
548 __u8 temp=0;
549
550 outb(2, cfg_base); /* Mode Control Register (MCTL) */
551 outb(0x00, cfg_base+1); /* Disable device */
552
553 /* Base Address and Interrupt Control Register (BAIC) */
554 outb(CFG_108_BAIC, cfg_base);
555 switch (info->fir_base) {
556 case 0x3e8: outb(0x14, cfg_base+1); break;
557 case 0x2e8: outb(0x15, cfg_base+1); break;
558 case 0x3f8: outb(0x16, cfg_base+1); break;
559 case 0x2f8: outb(0x17, cfg_base+1); break;
560 default: IRDA_ERROR("%s(), invalid base_address", __FUNCTION__);
561 }
562
563 /* Control Signal Routing Register (CSRT) */
564 switch (info->irq) {
565 case 3: temp = 0x01; break;
566 case 4: temp = 0x02; break;
567 case 5: temp = 0x03; break;
568 case 7: temp = 0x04; break;
569 case 9: temp = 0x05; break;
570 case 11: temp = 0x06; break;
571 case 15: temp = 0x07; break;
572 default: IRDA_ERROR("%s(), invalid irq", __FUNCTION__);
573 }
574 outb(CFG_108_CSRT, cfg_base);
575
576 switch (info->dma) {
577 case 0: outb(0x08+temp, cfg_base+1); break;
578 case 1: outb(0x10+temp, cfg_base+1); break;
579 case 3: outb(0x18+temp, cfg_base+1); break;
580 default: IRDA_ERROR("%s(), invalid dma", __FUNCTION__);
581 }
582
583 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
584 outb(0x03, cfg_base+1); /* Enable device */
585
586 return 0;
587 }
588
589 /*
590 * Function nsc_ircc_probe_108 (chip, info)
591 *
592 *
593 *
594 */
595 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
596 {
597 int cfg_base = info->cfg_base;
598 int reg;
599
600 /* Read address and interrupt control register (BAIC) */
601 outb(CFG_108_BAIC, cfg_base);
602 reg = inb(cfg_base+1);
603
604 switch (reg & 0x03) {
605 case 0:
606 info->fir_base = 0x3e8;
607 break;
608 case 1:
609 info->fir_base = 0x2e8;
610 break;
611 case 2:
612 info->fir_base = 0x3f8;
613 break;
614 case 3:
615 info->fir_base = 0x2f8;
616 break;
617 }
618 info->sir_base = info->fir_base;
619 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
620 info->fir_base);
621
622 /* Read control signals routing register (CSRT) */
623 outb(CFG_108_CSRT, cfg_base);
624 reg = inb(cfg_base+1);
625
626 switch (reg & 0x07) {
627 case 0:
628 info->irq = -1;
629 break;
630 case 1:
631 info->irq = 3;
632 break;
633 case 2:
634 info->irq = 4;
635 break;
636 case 3:
637 info->irq = 5;
638 break;
639 case 4:
640 info->irq = 7;
641 break;
642 case 5:
643 info->irq = 9;
644 break;
645 case 6:
646 info->irq = 11;
647 break;
648 case 7:
649 info->irq = 15;
650 break;
651 }
652 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
653
654 /* Currently we only read Rx DMA but it will also be used for Tx */
655 switch ((reg >> 3) & 0x03) {
656 case 0:
657 info->dma = -1;
658 break;
659 case 1:
660 info->dma = 0;
661 break;
662 case 2:
663 info->dma = 1;
664 break;
665 case 3:
666 info->dma = 3;
667 break;
668 }
669 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
670
671 /* Read mode control register (MCTL) */
672 outb(CFG_108_MCTL, cfg_base);
673 reg = inb(cfg_base+1);
674
675 info->enabled = reg & 0x01;
676 info->suspended = !((reg >> 1) & 0x01);
677
678 return 0;
679 }
680
681 /*
682 * Function nsc_ircc_init_338 (chip, info)
683 *
684 * Initialize the NSC '338 chip. Remember that the 87338 needs two
685 * consecutive writes to the data registers while CPU interrupts are
686 * disabled. The 97338 does not require this, but shouldn't be any
687 * harm if we do it anyway.
688 */
689 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
690 {
691 /* No init yet */
692
693 return 0;
694 }
695
696 /*
697 * Function nsc_ircc_probe_338 (chip, info)
698 *
699 *
700 *
701 */
702 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
703 {
704 int cfg_base = info->cfg_base;
705 int reg, com = 0;
706 int pnp;
707
708 /* Read funtion enable register (FER) */
709 outb(CFG_338_FER, cfg_base);
710 reg = inb(cfg_base+1);
711
712 info->enabled = (reg >> 2) & 0x01;
713
714 /* Check if we are in Legacy or PnP mode */
715 outb(CFG_338_PNP0, cfg_base);
716 reg = inb(cfg_base+1);
717
718 pnp = (reg >> 3) & 0x01;
719 if (pnp) {
720 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
721 outb(0x46, cfg_base);
722 reg = (inb(cfg_base+1) & 0xfe) << 2;
723
724 outb(0x47, cfg_base);
725 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
726
727 info->fir_base = reg;
728 } else {
729 /* Read function address register (FAR) */
730 outb(CFG_338_FAR, cfg_base);
731 reg = inb(cfg_base+1);
732
733 switch ((reg >> 4) & 0x03) {
734 case 0:
735 info->fir_base = 0x3f8;
736 break;
737 case 1:
738 info->fir_base = 0x2f8;
739 break;
740 case 2:
741 com = 3;
742 break;
743 case 3:
744 com = 4;
745 break;
746 }
747
748 if (com) {
749 switch ((reg >> 6) & 0x03) {
750 case 0:
751 if (com == 3)
752 info->fir_base = 0x3e8;
753 else
754 info->fir_base = 0x2e8;
755 break;
756 case 1:
757 if (com == 3)
758 info->fir_base = 0x338;
759 else
760 info->fir_base = 0x238;
761 break;
762 case 2:
763 if (com == 3)
764 info->fir_base = 0x2e8;
765 else
766 info->fir_base = 0x2e0;
767 break;
768 case 3:
769 if (com == 3)
770 info->fir_base = 0x220;
771 else
772 info->fir_base = 0x228;
773 break;
774 }
775 }
776 }
777 info->sir_base = info->fir_base;
778
779 /* Read PnP register 1 (PNP1) */
780 outb(CFG_338_PNP1, cfg_base);
781 reg = inb(cfg_base+1);
782
783 info->irq = reg >> 4;
784
785 /* Read PnP register 3 (PNP3) */
786 outb(CFG_338_PNP3, cfg_base);
787 reg = inb(cfg_base+1);
788
789 info->dma = (reg & 0x07) - 1;
790
791 /* Read power and test register (PTR) */
792 outb(CFG_338_PTR, cfg_base);
793 reg = inb(cfg_base+1);
794
795 info->suspended = reg & 0x01;
796
797 return 0;
798 }
799
800
801 /*
802 * Function nsc_ircc_init_39x (chip, info)
803 *
804 * Now that we know it's a '39x (see probe below), we need to
805 * configure it so we can use it.
806 *
807 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
808 * the configuration of the different functionality (serial, parallel,
809 * floppy...) are each in a different bank (Logical Device Number).
810 * The base address, irq and dma configuration registers are common
811 * to all functionalities (index 0x30 to 0x7F).
812 * There is only one configuration register specific to the
813 * serial port, CFG_39X_SPC.
814 * JeanII
815 *
816 * Note : this code was written by Jan Frey <janfrey@web.de>
817 */
818 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
819 {
820 int cfg_base = info->cfg_base;
821 int enabled;
822
823 /* User is sure about his config... accept it. */
824 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
825 "io=0x%04x, irq=%d, dma=%d\n",
826 __FUNCTION__, info->fir_base, info->irq, info->dma);
827
828 /* Access bank for SP2 */
829 outb(CFG_39X_LDN, cfg_base);
830 outb(0x02, cfg_base+1);
831
832 /* Configure SP2 */
833
834 /* We want to enable the device if not enabled */
835 outb(CFG_39X_ACT, cfg_base);
836 enabled = inb(cfg_base+1) & 0x01;
837
838 if (!enabled) {
839 /* Enable the device */
840 outb(CFG_39X_SIOCF1, cfg_base);
841 outb(0x01, cfg_base+1);
842 /* May want to update info->enabled. Jean II */
843 }
844
845 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
846 * power mode (wake up from sleep mode) (bit 1) */
847 outb(CFG_39X_SPC, cfg_base);
848 outb(0x82, cfg_base+1);
849
850 return 0;
851 }
852
853 /*
854 * Function nsc_ircc_probe_39x (chip, info)
855 *
856 * Test if we really have a '39x chip at the given address
857 *
858 * Note : this code was written by Jan Frey <janfrey@web.de>
859 */
860 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
861 {
862 int cfg_base = info->cfg_base;
863 int reg1, reg2, irq, irqt, dma1, dma2;
864 int enabled, susp;
865
866 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
867 __FUNCTION__, cfg_base);
868
869 /* This function should be executed with irq off to avoid
870 * another driver messing with the Super I/O bank - Jean II */
871
872 /* Access bank for SP2 */
873 outb(CFG_39X_LDN, cfg_base);
874 outb(0x02, cfg_base+1);
875
876 /* Read infos about SP2 ; store in info struct */
877 outb(CFG_39X_BASEH, cfg_base);
878 reg1 = inb(cfg_base+1);
879 outb(CFG_39X_BASEL, cfg_base);
880 reg2 = inb(cfg_base+1);
881 info->fir_base = (reg1 << 8) | reg2;
882
883 outb(CFG_39X_IRQNUM, cfg_base);
884 irq = inb(cfg_base+1);
885 outb(CFG_39X_IRQSEL, cfg_base);
886 irqt = inb(cfg_base+1);
887 info->irq = irq;
888
889 outb(CFG_39X_DMA0, cfg_base);
890 dma1 = inb(cfg_base+1);
891 outb(CFG_39X_DMA1, cfg_base);
892 dma2 = inb(cfg_base+1);
893 info->dma = dma1 -1;
894
895 outb(CFG_39X_ACT, cfg_base);
896 info->enabled = enabled = inb(cfg_base+1) & 0x01;
897
898 outb(CFG_39X_SPC, cfg_base);
899 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
900
901 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
902
903 /* Configure SP2 */
904
905 /* We want to enable the device if not enabled */
906 outb(CFG_39X_ACT, cfg_base);
907 enabled = inb(cfg_base+1) & 0x01;
908
909 if (!enabled) {
910 /* Enable the device */
911 outb(CFG_39X_SIOCF1, cfg_base);
912 outb(0x01, cfg_base+1);
913 /* May want to update info->enabled. Jean II */
914 }
915
916 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
917 * power mode (wake up from sleep mode) (bit 1) */
918 outb(CFG_39X_SPC, cfg_base);
919 outb(0x82, cfg_base+1);
920
921 return 0;
922 }
923
924 #ifdef CONFIG_PNP
925 /* PNP probing */
926 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
927 {
928 memset(&pnp_info, 0, sizeof(chipio_t));
929 pnp_info.irq = -1;
930 pnp_info.dma = -1;
931 pnp_succeeded = 1;
932
933 /* There don't seem to be any way to get the cfg_base.
934 * On my box, cfg_base is in the PnP descriptor of the
935 * motherboard. Oh well... Jean II */
936
937 if (pnp_port_valid(dev, 0) &&
938 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
939 pnp_info.fir_base = pnp_port_start(dev, 0);
940
941 if (pnp_irq_valid(dev, 0) &&
942 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
943 pnp_info.irq = pnp_irq(dev, 0);
944
945 if (pnp_dma_valid(dev, 0) &&
946 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
947 pnp_info.dma = pnp_dma(dev, 0);
948
949 IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
950 __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
951
952 if((pnp_info.fir_base == 0) ||
953 (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
954 /* Returning an error will disable the device. Yuck ! */
955 //return -EINVAL;
956 pnp_succeeded = 0;
957 }
958
959 return 0;
960 }
961 #endif
962
963 /*
964 * Function nsc_ircc_setup (info)
965 *
966 * Returns non-negative on success.
967 *
968 */
969 static int nsc_ircc_setup(chipio_t *info)
970 {
971 int version;
972 int iobase = info->fir_base;
973
974 /* Read the Module ID */
975 switch_bank(iobase, BANK3);
976 version = inb(iobase+MID);
977
978 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
979 __FUNCTION__, driver_name, version);
980
981 /* Should be 0x2? */
982 if (0x20 != (version & 0xf0)) {
983 IRDA_ERROR("%s, Wrong chip version %02x\n",
984 driver_name, version);
985 return -1;
986 }
987
988 /* Switch to advanced mode */
989 switch_bank(iobase, BANK2);
990 outb(ECR1_EXT_SL, iobase+ECR1);
991 switch_bank(iobase, BANK0);
992
993 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
994 switch_bank(iobase, BANK0);
995 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
996
997 outb(0x03, iobase+LCR); /* 8 bit word length */
998 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
999
1000 /* Set FIFO size to 32 */
1001 switch_bank(iobase, BANK2);
1002 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1003
1004 /* IRCR2: FEND_MD is not set */
1005 switch_bank(iobase, BANK5);
1006 outb(0x02, iobase+4);
1007
1008 /* Make sure that some defaults are OK */
1009 switch_bank(iobase, BANK6);
1010 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1011 outb(0x0a, iobase+1); /* Set MIR pulse width */
1012 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1013 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1014
1015 /* Enable receive interrupts */
1016 switch_bank(iobase, BANK0);
1017 outb(IER_RXHDL_IE, iobase+IER);
1018
1019 return 0;
1020 }
1021
1022 /*
1023 * Function nsc_ircc_read_dongle_id (void)
1024 *
1025 * Try to read dongle indentification. This procedure needs to be executed
1026 * once after power-on/reset. It also needs to be used whenever you suspect
1027 * that the user may have plugged/unplugged the IrDA Dongle.
1028 */
1029 static int nsc_ircc_read_dongle_id (int iobase)
1030 {
1031 int dongle_id;
1032 __u8 bank;
1033
1034 bank = inb(iobase+BSR);
1035
1036 /* Select Bank 7 */
1037 switch_bank(iobase, BANK7);
1038
1039 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1040 outb(0x00, iobase+7);
1041
1042 /* ID0, 1, and 2 are pulled up/down very slowly */
1043 udelay(50);
1044
1045 /* IRCFG1: read the ID bits */
1046 dongle_id = inb(iobase+4) & 0x0f;
1047
1048 #ifdef BROKEN_DONGLE_ID
1049 if (dongle_id == 0x0a)
1050 dongle_id = 0x09;
1051 #endif
1052 /* Go back to bank 0 before returning */
1053 switch_bank(iobase, BANK0);
1054
1055 outb(bank, iobase+BSR);
1056
1057 return dongle_id;
1058 }
1059
1060 /*
1061 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1062 *
1063 * This function initializes the dongle for the transceiver that is
1064 * used. This procedure needs to be executed once after
1065 * power-on/reset. It also needs to be used whenever you suspect that
1066 * the dongle is changed.
1067 */
1068 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1069 {
1070 int bank;
1071
1072 /* Save current bank */
1073 bank = inb(iobase+BSR);
1074
1075 /* Select Bank 7 */
1076 switch_bank(iobase, BANK7);
1077
1078 /* IRCFG4: set according to dongle_id */
1079 switch (dongle_id) {
1080 case 0x00: /* same as */
1081 case 0x01: /* Differential serial interface */
1082 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1083 __FUNCTION__, dongle_types[dongle_id]);
1084 break;
1085 case 0x02: /* same as */
1086 case 0x03: /* Reserved */
1087 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1088 __FUNCTION__, dongle_types[dongle_id]);
1089 break;
1090 case 0x04: /* Sharp RY5HD01 */
1091 break;
1092 case 0x05: /* Reserved, but this is what the Thinkpad reports */
1093 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1094 __FUNCTION__, dongle_types[dongle_id]);
1095 break;
1096 case 0x06: /* Single-ended serial interface */
1097 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1098 __FUNCTION__, dongle_types[dongle_id]);
1099 break;
1100 case 0x07: /* Consumer-IR only */
1101 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1102 __FUNCTION__, dongle_types[dongle_id]);
1103 break;
1104 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1105 IRDA_DEBUG(0, "%s(), %s\n",
1106 __FUNCTION__, dongle_types[dongle_id]);
1107 break;
1108 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1109 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1110 break;
1111 case 0x0A: /* same as */
1112 case 0x0B: /* Reserved */
1113 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1114 __FUNCTION__, dongle_types[dongle_id]);
1115 break;
1116 case 0x0C: /* same as */
1117 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1118 /*
1119 * Set irsl0 as input, irsl[1-2] as output, and separate
1120 * inputs are used for SIR and MIR/FIR
1121 */
1122 outb(0x48, iobase+7);
1123 break;
1124 case 0x0E: /* Supports SIR Mode only */
1125 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1126 break;
1127 case 0x0F: /* No dongle connected */
1128 IRDA_DEBUG(0, "%s(), %s\n",
1129 __FUNCTION__, dongle_types[dongle_id]);
1130
1131 switch_bank(iobase, BANK0);
1132 outb(0x62, iobase+MCR);
1133 break;
1134 default:
1135 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1136 __FUNCTION__, dongle_id);
1137 }
1138
1139 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1140 outb(0x00, iobase+4);
1141
1142 /* Restore bank register */
1143 outb(bank, iobase+BSR);
1144
1145 } /* set_up_dongle_interface */
1146
1147 /*
1148 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1149 *
1150 * Change speed of the attach dongle
1151 *
1152 */
1153 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1154 {
1155 __u8 bank;
1156
1157 /* Save current bank */
1158 bank = inb(iobase+BSR);
1159
1160 /* Select Bank 7 */
1161 switch_bank(iobase, BANK7);
1162
1163 /* IRCFG1: set according to dongle_id */
1164 switch (dongle_id) {
1165 case 0x00: /* same as */
1166 case 0x01: /* Differential serial interface */
1167 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1168 __FUNCTION__, dongle_types[dongle_id]);
1169 break;
1170 case 0x02: /* same as */
1171 case 0x03: /* Reserved */
1172 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1173 __FUNCTION__, dongle_types[dongle_id]);
1174 break;
1175 case 0x04: /* Sharp RY5HD01 */
1176 break;
1177 case 0x05: /* Reserved */
1178 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1179 __FUNCTION__, dongle_types[dongle_id]);
1180 break;
1181 case 0x06: /* Single-ended serial interface */
1182 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1183 __FUNCTION__, dongle_types[dongle_id]);
1184 break;
1185 case 0x07: /* Consumer-IR only */
1186 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1187 __FUNCTION__, dongle_types[dongle_id]);
1188 break;
1189 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1190 IRDA_DEBUG(0, "%s(), %s\n",
1191 __FUNCTION__, dongle_types[dongle_id]);
1192 outb(0x00, iobase+4);
1193 if (speed > 115200)
1194 outb(0x01, iobase+4);
1195 break;
1196 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1197 outb(0x01, iobase+4);
1198
1199 if (speed == 4000000) {
1200 /* There was a cli() there, but we now are already
1201 * under spin_lock_irqsave() - JeanII */
1202 outb(0x81, iobase+4);
1203 outb(0x80, iobase+4);
1204 } else
1205 outb(0x00, iobase+4);
1206 break;
1207 case 0x0A: /* same as */
1208 case 0x0B: /* Reserved */
1209 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1210 __FUNCTION__, dongle_types[dongle_id]);
1211 break;
1212 case 0x0C: /* same as */
1213 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1214 break;
1215 case 0x0E: /* Supports SIR Mode only */
1216 break;
1217 case 0x0F: /* No dongle connected */
1218 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1219 __FUNCTION__, dongle_types[dongle_id]);
1220
1221 switch_bank(iobase, BANK0);
1222 outb(0x62, iobase+MCR);
1223 break;
1224 default:
1225 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1226 }
1227 /* Restore bank register */
1228 outb(bank, iobase+BSR);
1229 }
1230
1231 /*
1232 * Function nsc_ircc_change_speed (self, baud)
1233 *
1234 * Change the speed of the device
1235 *
1236 * This function *must* be called with irq off and spin-lock.
1237 */
1238 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1239 {
1240 struct net_device *dev = self->netdev;
1241 __u8 mcr = MCR_SIR;
1242 int iobase;
1243 __u8 bank;
1244 __u8 ier; /* Interrupt enable register */
1245
1246 IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1247
1248 IRDA_ASSERT(self != NULL, return 0;);
1249
1250 iobase = self->io.fir_base;
1251
1252 /* Update accounting for new speed */
1253 self->io.speed = speed;
1254
1255 /* Save current bank */
1256 bank = inb(iobase+BSR);
1257
1258 /* Disable interrupts */
1259 switch_bank(iobase, BANK0);
1260 outb(0, iobase+IER);
1261
1262 /* Select Bank 2 */
1263 switch_bank(iobase, BANK2);
1264
1265 outb(0x00, iobase+BGDH);
1266 switch (speed) {
1267 case 9600: outb(0x0c, iobase+BGDL); break;
1268 case 19200: outb(0x06, iobase+BGDL); break;
1269 case 38400: outb(0x03, iobase+BGDL); break;
1270 case 57600: outb(0x02, iobase+BGDL); break;
1271 case 115200: outb(0x01, iobase+BGDL); break;
1272 case 576000:
1273 switch_bank(iobase, BANK5);
1274
1275 /* IRCR2: MDRS is set */
1276 outb(inb(iobase+4) | 0x04, iobase+4);
1277
1278 mcr = MCR_MIR;
1279 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1280 break;
1281 case 1152000:
1282 mcr = MCR_MIR;
1283 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1284 break;
1285 case 4000000:
1286 mcr = MCR_FIR;
1287 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1288 break;
1289 default:
1290 mcr = MCR_FIR;
1291 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1292 __FUNCTION__, speed);
1293 break;
1294 }
1295
1296 /* Set appropriate speed mode */
1297 switch_bank(iobase, BANK0);
1298 outb(mcr | MCR_TX_DFR, iobase+MCR);
1299
1300 /* Give some hits to the transceiver */
1301 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1302
1303 /* Set FIFO threshold to TX17, RX16 */
1304 switch_bank(iobase, BANK0);
1305 outb(0x00, iobase+FCR);
1306 outb(FCR_FIFO_EN, iobase+FCR);
1307 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1308 FCR_TXTH| /* Set Tx FIFO threshold */
1309 FCR_TXSR| /* Reset Tx FIFO */
1310 FCR_RXSR| /* Reset Rx FIFO */
1311 FCR_FIFO_EN, /* Enable FIFOs */
1312 iobase+FCR);
1313
1314 /* Set FIFO size to 32 */
1315 switch_bank(iobase, BANK2);
1316 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1317
1318 /* Enable some interrupts so we can receive frames */
1319 switch_bank(iobase, BANK0);
1320 if (speed > 115200) {
1321 /* Install FIR xmit handler */
1322 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1323 ier = IER_SFIF_IE;
1324 nsc_ircc_dma_receive(self);
1325 } else {
1326 /* Install SIR xmit handler */
1327 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1328 ier = IER_RXHDL_IE;
1329 }
1330 /* Set our current interrupt mask */
1331 outb(ier, iobase+IER);
1332
1333 /* Restore BSR */
1334 outb(bank, iobase+BSR);
1335
1336 /* Make sure interrupt handlers keep the proper interrupt mask */
1337 return(ier);
1338 }
1339
1340 /*
1341 * Function nsc_ircc_hard_xmit (skb, dev)
1342 *
1343 * Transmit the frame!
1344 *
1345 */
1346 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1347 {
1348 struct nsc_ircc_cb *self;
1349 unsigned long flags;
1350 int iobase;
1351 __s32 speed;
1352 __u8 bank;
1353
1354 self = (struct nsc_ircc_cb *) dev->priv;
1355
1356 IRDA_ASSERT(self != NULL, return 0;);
1357
1358 iobase = self->io.fir_base;
1359
1360 netif_stop_queue(dev);
1361
1362 /* Make sure tests *& speed change are atomic */
1363 spin_lock_irqsave(&self->lock, flags);
1364
1365 /* Check if we need to change the speed */
1366 speed = irda_get_next_speed(skb);
1367 if ((speed != self->io.speed) && (speed != -1)) {
1368 /* Check for empty frame. */
1369 if (!skb->len) {
1370 /* If we just sent a frame, we get called before
1371 * the last bytes get out (because of the SIR FIFO).
1372 * If this is the case, let interrupt handler change
1373 * the speed itself... Jean II */
1374 if (self->io.direction == IO_RECV) {
1375 nsc_ircc_change_speed(self, speed);
1376 /* TODO : For SIR->SIR, the next packet
1377 * may get corrupted - Jean II */
1378 netif_wake_queue(dev);
1379 } else {
1380 self->new_speed = speed;
1381 /* Queue will be restarted after speed change
1382 * to make sure packets gets through the
1383 * proper xmit handler - Jean II */
1384 }
1385 dev->trans_start = jiffies;
1386 spin_unlock_irqrestore(&self->lock, flags);
1387 dev_kfree_skb(skb);
1388 return 0;
1389 } else
1390 self->new_speed = speed;
1391 }
1392
1393 /* Save current bank */
1394 bank = inb(iobase+BSR);
1395
1396 self->tx_buff.data = self->tx_buff.head;
1397
1398 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1399 self->tx_buff.truesize);
1400
1401 self->stats.tx_bytes += self->tx_buff.len;
1402
1403 /* Add interrupt on tx low level (will fire immediately) */
1404 switch_bank(iobase, BANK0);
1405 outb(IER_TXLDL_IE, iobase+IER);
1406
1407 /* Restore bank register */
1408 outb(bank, iobase+BSR);
1409
1410 dev->trans_start = jiffies;
1411 spin_unlock_irqrestore(&self->lock, flags);
1412
1413 dev_kfree_skb(skb);
1414
1415 return 0;
1416 }
1417
1418 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1419 {
1420 struct nsc_ircc_cb *self;
1421 unsigned long flags;
1422 int iobase;
1423 __s32 speed;
1424 __u8 bank;
1425 int mtt, diff;
1426
1427 self = (struct nsc_ircc_cb *) dev->priv;
1428 iobase = self->io.fir_base;
1429
1430 netif_stop_queue(dev);
1431
1432 /* Make sure tests *& speed change are atomic */
1433 spin_lock_irqsave(&self->lock, flags);
1434
1435 /* Check if we need to change the speed */
1436 speed = irda_get_next_speed(skb);
1437 if ((speed != self->io.speed) && (speed != -1)) {
1438 /* Check for empty frame. */
1439 if (!skb->len) {
1440 /* If we are currently transmitting, defer to
1441 * interrupt handler. - Jean II */
1442 if(self->tx_fifo.len == 0) {
1443 nsc_ircc_change_speed(self, speed);
1444 netif_wake_queue(dev);
1445 } else {
1446 self->new_speed = speed;
1447 /* Keep queue stopped :
1448 * the speed change operation may change the
1449 * xmit handler, and we want to make sure
1450 * the next packet get through the proper
1451 * Tx path, so block the Tx queue until
1452 * the speed change has been done.
1453 * Jean II */
1454 }
1455 dev->trans_start = jiffies;
1456 spin_unlock_irqrestore(&self->lock, flags);
1457 dev_kfree_skb(skb);
1458 return 0;
1459 } else {
1460 /* Change speed after current frame */
1461 self->new_speed = speed;
1462 }
1463 }
1464
1465 /* Save current bank */
1466 bank = inb(iobase+BSR);
1467
1468 /* Register and copy this frame to DMA memory */
1469 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1470 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1471 self->tx_fifo.tail += skb->len;
1472
1473 self->stats.tx_bytes += skb->len;
1474
1475 skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1476 skb->len);
1477 self->tx_fifo.len++;
1478 self->tx_fifo.free++;
1479
1480 /* Start transmit only if there is currently no transmit going on */
1481 if (self->tx_fifo.len == 1) {
1482 /* Check if we must wait the min turn time or not */
1483 mtt = irda_get_mtt(skb);
1484 if (mtt) {
1485 /* Check how much time we have used already */
1486 do_gettimeofday(&self->now);
1487 diff = self->now.tv_usec - self->stamp.tv_usec;
1488 if (diff < 0)
1489 diff += 1000000;
1490
1491 /* Check if the mtt is larger than the time we have
1492 * already used by all the protocol processing
1493 */
1494 if (mtt > diff) {
1495 mtt -= diff;
1496
1497 /*
1498 * Use timer if delay larger than 125 us, and
1499 * use udelay for smaller values which should
1500 * be acceptable
1501 */
1502 if (mtt > 125) {
1503 /* Adjust for timer resolution */
1504 mtt = mtt / 125;
1505
1506 /* Setup timer */
1507 switch_bank(iobase, BANK4);
1508 outb(mtt & 0xff, iobase+TMRL);
1509 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1510
1511 /* Start timer */
1512 outb(IRCR1_TMR_EN, iobase+IRCR1);
1513 self->io.direction = IO_XMIT;
1514
1515 /* Enable timer interrupt */
1516 switch_bank(iobase, BANK0);
1517 outb(IER_TMR_IE, iobase+IER);
1518
1519 /* Timer will take care of the rest */
1520 goto out;
1521 } else
1522 udelay(mtt);
1523 }
1524 }
1525 /* Enable DMA interrupt */
1526 switch_bank(iobase, BANK0);
1527 outb(IER_DMA_IE, iobase+IER);
1528
1529 /* Transmit frame */
1530 nsc_ircc_dma_xmit(self, iobase);
1531 }
1532 out:
1533 /* Not busy transmitting anymore if window is not full,
1534 * and if we don't need to change speed */
1535 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1536 netif_wake_queue(self->netdev);
1537
1538 /* Restore bank register */
1539 outb(bank, iobase+BSR);
1540
1541 dev->trans_start = jiffies;
1542 spin_unlock_irqrestore(&self->lock, flags);
1543 dev_kfree_skb(skb);
1544
1545 return 0;
1546 }
1547
1548 /*
1549 * Function nsc_ircc_dma_xmit (self, iobase)
1550 *
1551 * Transmit data using DMA
1552 *
1553 */
1554 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1555 {
1556 int bsr;
1557
1558 /* Save current bank */
1559 bsr = inb(iobase+BSR);
1560
1561 /* Disable DMA */
1562 switch_bank(iobase, BANK0);
1563 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1564
1565 self->io.direction = IO_XMIT;
1566
1567 /* Choose transmit DMA channel */
1568 switch_bank(iobase, BANK2);
1569 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1570
1571 irda_setup_dma(self->io.dma,
1572 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1573 self->tx_buff.head) + self->tx_buff_dma,
1574 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1575 DMA_TX_MODE);
1576
1577 /* Enable DMA and SIR interaction pulse */
1578 switch_bank(iobase, BANK0);
1579 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1580
1581 /* Restore bank register */
1582 outb(bsr, iobase+BSR);
1583 }
1584
1585 /*
1586 * Function nsc_ircc_pio_xmit (self, iobase)
1587 *
1588 * Transmit data using PIO. Returns the number of bytes that actually
1589 * got transferred
1590 *
1591 */
1592 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1593 {
1594 int actual = 0;
1595 __u8 bank;
1596
1597 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1598
1599 /* Save current bank */
1600 bank = inb(iobase+BSR);
1601
1602 switch_bank(iobase, BANK0);
1603 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1604 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1605 __FUNCTION__);
1606
1607 /* FIFO may still be filled to the Tx interrupt threshold */
1608 fifo_size -= 17;
1609 }
1610
1611 /* Fill FIFO with current frame */
1612 while ((fifo_size-- > 0) && (actual < len)) {
1613 /* Transmit next byte */
1614 outb(buf[actual++], iobase+TXD);
1615 }
1616
1617 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1618 __FUNCTION__, fifo_size, actual, len);
1619
1620 /* Restore bank */
1621 outb(bank, iobase+BSR);
1622
1623 return actual;
1624 }
1625
1626 /*
1627 * Function nsc_ircc_dma_xmit_complete (self)
1628 *
1629 * The transfer of a frame in finished. This function will only be called
1630 * by the interrupt handler
1631 *
1632 */
1633 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1634 {
1635 int iobase;
1636 __u8 bank;
1637 int ret = TRUE;
1638
1639 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1640
1641 iobase = self->io.fir_base;
1642
1643 /* Save current bank */
1644 bank = inb(iobase+BSR);
1645
1646 /* Disable DMA */
1647 switch_bank(iobase, BANK0);
1648 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1649
1650 /* Check for underrrun! */
1651 if (inb(iobase+ASCR) & ASCR_TXUR) {
1652 self->stats.tx_errors++;
1653 self->stats.tx_fifo_errors++;
1654
1655 /* Clear bit, by writing 1 into it */
1656 outb(ASCR_TXUR, iobase+ASCR);
1657 } else {
1658 self->stats.tx_packets++;
1659 }
1660
1661 /* Finished with this frame, so prepare for next */
1662 self->tx_fifo.ptr++;
1663 self->tx_fifo.len--;
1664
1665 /* Any frames to be sent back-to-back? */
1666 if (self->tx_fifo.len) {
1667 nsc_ircc_dma_xmit(self, iobase);
1668
1669 /* Not finished yet! */
1670 ret = FALSE;
1671 } else {
1672 /* Reset Tx FIFO info */
1673 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1674 self->tx_fifo.tail = self->tx_buff.head;
1675 }
1676
1677 /* Make sure we have room for more frames and
1678 * that we don't need to change speed */
1679 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1680 /* Not busy transmitting anymore */
1681 /* Tell the network layer, that we can accept more frames */
1682 netif_wake_queue(self->netdev);
1683 }
1684
1685 /* Restore bank */
1686 outb(bank, iobase+BSR);
1687
1688 return ret;
1689 }
1690
1691 /*
1692 * Function nsc_ircc_dma_receive (self)
1693 *
1694 * Get ready for receiving a frame. The device will initiate a DMA
1695 * if it starts to receive a frame.
1696 *
1697 */
1698 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1699 {
1700 int iobase;
1701 __u8 bsr;
1702
1703 iobase = self->io.fir_base;
1704
1705 /* Reset Tx FIFO info */
1706 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1707 self->tx_fifo.tail = self->tx_buff.head;
1708
1709 /* Save current bank */
1710 bsr = inb(iobase+BSR);
1711
1712 /* Disable DMA */
1713 switch_bank(iobase, BANK0);
1714 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1715
1716 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1717 switch_bank(iobase, BANK2);
1718 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1719
1720 self->io.direction = IO_RECV;
1721 self->rx_buff.data = self->rx_buff.head;
1722
1723 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1724 switch_bank(iobase, BANK0);
1725 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1726
1727 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1728 self->st_fifo.tail = self->st_fifo.head = 0;
1729
1730 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1731 DMA_RX_MODE);
1732
1733 /* Enable DMA */
1734 switch_bank(iobase, BANK0);
1735 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1736
1737 /* Restore bank register */
1738 outb(bsr, iobase+BSR);
1739
1740 return 0;
1741 }
1742
1743 /*
1744 * Function nsc_ircc_dma_receive_complete (self)
1745 *
1746 * Finished with receiving frames
1747 *
1748 *
1749 */
1750 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1751 {
1752 struct st_fifo *st_fifo;
1753 struct sk_buff *skb;
1754 __u8 status;
1755 __u8 bank;
1756 int len;
1757
1758 st_fifo = &self->st_fifo;
1759
1760 /* Save current bank */
1761 bank = inb(iobase+BSR);
1762
1763 /* Read all entries in status FIFO */
1764 switch_bank(iobase, BANK5);
1765 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1766 /* We must empty the status FIFO no matter what */
1767 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1768
1769 if (st_fifo->tail >= MAX_RX_WINDOW) {
1770 IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1771 continue;
1772 }
1773
1774 st_fifo->entries[st_fifo->tail].status = status;
1775 st_fifo->entries[st_fifo->tail].len = len;
1776 st_fifo->pending_bytes += len;
1777 st_fifo->tail++;
1778 st_fifo->len++;
1779 }
1780 /* Try to process all entries in status FIFO */
1781 while (st_fifo->len > 0) {
1782 /* Get first entry */
1783 status = st_fifo->entries[st_fifo->head].status;
1784 len = st_fifo->entries[st_fifo->head].len;
1785 st_fifo->pending_bytes -= len;
1786 st_fifo->head++;
1787 st_fifo->len--;
1788
1789 /* Check for errors */
1790 if (status & FRM_ST_ERR_MSK) {
1791 if (status & FRM_ST_LOST_FR) {
1792 /* Add number of lost frames to stats */
1793 self->stats.rx_errors += len;
1794 } else {
1795 /* Skip frame */
1796 self->stats.rx_errors++;
1797
1798 self->rx_buff.data += len;
1799
1800 if (status & FRM_ST_MAX_LEN)
1801 self->stats.rx_length_errors++;
1802
1803 if (status & FRM_ST_PHY_ERR)
1804 self->stats.rx_frame_errors++;
1805
1806 if (status & FRM_ST_BAD_CRC)
1807 self->stats.rx_crc_errors++;
1808 }
1809 /* The errors below can be reported in both cases */
1810 if (status & FRM_ST_OVR1)
1811 self->stats.rx_fifo_errors++;
1812
1813 if (status & FRM_ST_OVR2)
1814 self->stats.rx_fifo_errors++;
1815 } else {
1816 /*
1817 * First we must make sure that the frame we
1818 * want to deliver is all in main memory. If we
1819 * cannot tell, then we check if the Rx FIFO is
1820 * empty. If not then we will have to take a nap
1821 * and try again later.
1822 */
1823 if (st_fifo->pending_bytes < self->io.fifo_size) {
1824 switch_bank(iobase, BANK0);
1825 if (inb(iobase+LSR) & LSR_RXDA) {
1826 /* Put this entry back in fifo */
1827 st_fifo->head--;
1828 st_fifo->len++;
1829 st_fifo->pending_bytes += len;
1830 st_fifo->entries[st_fifo->head].status = status;
1831 st_fifo->entries[st_fifo->head].len = len;
1832 /*
1833 * DMA not finished yet, so try again
1834 * later, set timer value, resolution
1835 * 125 us
1836 */
1837 switch_bank(iobase, BANK4);
1838 outb(0x02, iobase+TMRL); /* x 125 us */
1839 outb(0x00, iobase+TMRH);
1840
1841 /* Start timer */
1842 outb(IRCR1_TMR_EN, iobase+IRCR1);
1843
1844 /* Restore bank register */
1845 outb(bank, iobase+BSR);
1846
1847 return FALSE; /* I'll be back! */
1848 }
1849 }
1850
1851 /*
1852 * Remember the time we received this frame, so we can
1853 * reduce the min turn time a bit since we will know
1854 * how much time we have used for protocol processing
1855 */
1856 do_gettimeofday(&self->stamp);
1857
1858 skb = dev_alloc_skb(len+1);
1859 if (skb == NULL) {
1860 IRDA_WARNING("%s(), memory squeeze, "
1861 "dropping frame.\n",
1862 __FUNCTION__);
1863 self->stats.rx_dropped++;
1864
1865 /* Restore bank register */
1866 outb(bank, iobase+BSR);
1867
1868 return FALSE;
1869 }
1870
1871 /* Make sure IP header gets aligned */
1872 skb_reserve(skb, 1);
1873
1874 /* Copy frame without CRC */
1875 if (self->io.speed < 4000000) {
1876 skb_put(skb, len-2);
1877 skb_copy_to_linear_data(skb,
1878 self->rx_buff.data,
1879 len - 2);
1880 } else {
1881 skb_put(skb, len-4);
1882 skb_copy_to_linear_data(skb,
1883 self->rx_buff.data,
1884 len - 4);
1885 }
1886
1887 /* Move to next frame */
1888 self->rx_buff.data += len;
1889 self->stats.rx_bytes += len;
1890 self->stats.rx_packets++;
1891
1892 skb->dev = self->netdev;
1893 skb_reset_mac_header(skb);
1894 skb->protocol = htons(ETH_P_IRDA);
1895 netif_rx(skb);
1896 self->netdev->last_rx = jiffies;
1897 }
1898 }
1899 /* Restore bank register */
1900 outb(bank, iobase+BSR);
1901
1902 return TRUE;
1903 }
1904
1905 /*
1906 * Function nsc_ircc_pio_receive (self)
1907 *
1908 * Receive all data in receiver FIFO
1909 *
1910 */
1911 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1912 {
1913 __u8 byte;
1914 int iobase;
1915
1916 iobase = self->io.fir_base;
1917
1918 /* Receive all characters in Rx FIFO */
1919 do {
1920 byte = inb(iobase+RXD);
1921 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1922 byte);
1923 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1924 }
1925
1926 /*
1927 * Function nsc_ircc_sir_interrupt (self, eir)
1928 *
1929 * Handle SIR interrupt
1930 *
1931 */
1932 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1933 {
1934 int actual;
1935
1936 /* Check if transmit FIFO is low on data */
1937 if (eir & EIR_TXLDL_EV) {
1938 /* Write data left in transmit buffer */
1939 actual = nsc_ircc_pio_write(self->io.fir_base,
1940 self->tx_buff.data,
1941 self->tx_buff.len,
1942 self->io.fifo_size);
1943 self->tx_buff.data += actual;
1944 self->tx_buff.len -= actual;
1945
1946 self->io.direction = IO_XMIT;
1947
1948 /* Check if finished */
1949 if (self->tx_buff.len > 0)
1950 self->ier = IER_TXLDL_IE;
1951 else {
1952
1953 self->stats.tx_packets++;
1954 netif_wake_queue(self->netdev);
1955 self->ier = IER_TXEMP_IE;
1956 }
1957
1958 }
1959 /* Check if transmission has completed */
1960 if (eir & EIR_TXEMP_EV) {
1961 /* Turn around and get ready to receive some data */
1962 self->io.direction = IO_RECV;
1963 self->ier = IER_RXHDL_IE;
1964 /* Check if we need to change the speed?
1965 * Need to be after self->io.direction to avoid race with
1966 * nsc_ircc_hard_xmit_sir() - Jean II */
1967 if (self->new_speed) {
1968 IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1969 self->ier = nsc_ircc_change_speed(self,
1970 self->new_speed);
1971 self->new_speed = 0;
1972 netif_wake_queue(self->netdev);
1973
1974 /* Check if we are going to FIR */
1975 if (self->io.speed > 115200) {
1976 /* No need to do anymore SIR stuff */
1977 return;
1978 }
1979 }
1980 }
1981
1982 /* Rx FIFO threshold or timeout */
1983 if (eir & EIR_RXHDL_EV) {
1984 nsc_ircc_pio_receive(self);
1985
1986 /* Keep receiving */
1987 self->ier = IER_RXHDL_IE;
1988 }
1989 }
1990
1991 /*
1992 * Function nsc_ircc_fir_interrupt (self, eir)
1993 *
1994 * Handle MIR/FIR interrupt
1995 *
1996 */
1997 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1998 int eir)
1999 {
2000 __u8 bank;
2001
2002 bank = inb(iobase+BSR);
2003
2004 /* Status FIFO event*/
2005 if (eir & EIR_SFIF_EV) {
2006 /* Check if DMA has finished */
2007 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2008 /* Wait for next status FIFO interrupt */
2009 self->ier = IER_SFIF_IE;
2010 } else {
2011 self->ier = IER_SFIF_IE | IER_TMR_IE;
2012 }
2013 } else if (eir & EIR_TMR_EV) { /* Timer finished */
2014 /* Disable timer */
2015 switch_bank(iobase, BANK4);
2016 outb(0, iobase+IRCR1);
2017
2018 /* Clear timer event */
2019 switch_bank(iobase, BANK0);
2020 outb(ASCR_CTE, iobase+ASCR);
2021
2022 /* Check if this is a Tx timer interrupt */
2023 if (self->io.direction == IO_XMIT) {
2024 nsc_ircc_dma_xmit(self, iobase);
2025
2026 /* Interrupt on DMA */
2027 self->ier = IER_DMA_IE;
2028 } else {
2029 /* Check (again) if DMA has finished */
2030 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2031 self->ier = IER_SFIF_IE;
2032 } else {
2033 self->ier = IER_SFIF_IE | IER_TMR_IE;
2034 }
2035 }
2036 } else if (eir & EIR_DMA_EV) {
2037 /* Finished with all transmissions? */
2038 if (nsc_ircc_dma_xmit_complete(self)) {
2039 if(self->new_speed != 0) {
2040 /* As we stop the Tx queue, the speed change
2041 * need to be done when the Tx fifo is
2042 * empty. Ask for a Tx done interrupt */
2043 self->ier = IER_TXEMP_IE;
2044 } else {
2045 /* Check if there are more frames to be
2046 * transmitted */
2047 if (irda_device_txqueue_empty(self->netdev)) {
2048 /* Prepare for receive */
2049 nsc_ircc_dma_receive(self);
2050 self->ier = IER_SFIF_IE;
2051 } else
2052 IRDA_WARNING("%s(), potential "
2053 "Tx queue lockup !\n",
2054 __FUNCTION__);
2055 }
2056 } else {
2057 /* Not finished yet, so interrupt on DMA again */
2058 self->ier = IER_DMA_IE;
2059 }
2060 } else if (eir & EIR_TXEMP_EV) {
2061 /* The Tx FIFO has totally drained out, so now we can change
2062 * the speed... - Jean II */
2063 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2064 self->new_speed = 0;
2065 netif_wake_queue(self->netdev);
2066 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2067 }
2068
2069 outb(bank, iobase+BSR);
2070 }
2071
2072 /*
2073 * Function nsc_ircc_interrupt (irq, dev_id, regs)
2074 *
2075 * An interrupt from the chip has arrived. Time to do some work
2076 *
2077 */
2078 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
2079 {
2080 struct net_device *dev = dev_id;
2081 struct nsc_ircc_cb *self;
2082 __u8 bsr, eir;
2083 int iobase;
2084
2085 self = dev->priv;
2086
2087 spin_lock(&self->lock);
2088
2089 iobase = self->io.fir_base;
2090
2091 bsr = inb(iobase+BSR); /* Save current bank */
2092
2093 switch_bank(iobase, BANK0);
2094 self->ier = inb(iobase+IER);
2095 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2096
2097 outb(0, iobase+IER); /* Disable interrupts */
2098
2099 if (eir) {
2100 /* Dispatch interrupt handler for the current speed */
2101 if (self->io.speed > 115200)
2102 nsc_ircc_fir_interrupt(self, iobase, eir);
2103 else
2104 nsc_ircc_sir_interrupt(self, eir);
2105 }
2106
2107 outb(self->ier, iobase+IER); /* Restore interrupts */
2108 outb(bsr, iobase+BSR); /* Restore bank register */
2109
2110 spin_unlock(&self->lock);
2111 return IRQ_RETVAL(eir);
2112 }
2113
2114 /*
2115 * Function nsc_ircc_is_receiving (self)
2116 *
2117 * Return TRUE is we are currently receiving a frame
2118 *
2119 */
2120 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2121 {
2122 unsigned long flags;
2123 int status = FALSE;
2124 int iobase;
2125 __u8 bank;
2126
2127 IRDA_ASSERT(self != NULL, return FALSE;);
2128
2129 spin_lock_irqsave(&self->lock, flags);
2130
2131 if (self->io.speed > 115200) {
2132 iobase = self->io.fir_base;
2133
2134 /* Check if rx FIFO is not empty */
2135 bank = inb(iobase+BSR);
2136 switch_bank(iobase, BANK2);
2137 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2138 /* We are receiving something */
2139 status = TRUE;
2140 }
2141 outb(bank, iobase+BSR);
2142 } else
2143 status = (self->rx_buff.state != OUTSIDE_FRAME);
2144
2145 spin_unlock_irqrestore(&self->lock, flags);
2146
2147 return status;
2148 }
2149
2150 /*
2151 * Function nsc_ircc_net_open (dev)
2152 *
2153 * Start the device
2154 *
2155 */
2156 static int nsc_ircc_net_open(struct net_device *dev)
2157 {
2158 struct nsc_ircc_cb *self;
2159 int iobase;
2160 char hwname[32];
2161 __u8 bank;
2162
2163 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2164
2165 IRDA_ASSERT(dev != NULL, return -1;);
2166 self = (struct nsc_ircc_cb *) dev->priv;
2167
2168 IRDA_ASSERT(self != NULL, return 0;);
2169
2170 iobase = self->io.fir_base;
2171
2172 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2173 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2174 driver_name, self->io.irq);
2175 return -EAGAIN;
2176 }
2177 /*
2178 * Always allocate the DMA channel after the IRQ, and clean up on
2179 * failure.
2180 */
2181 if (request_dma(self->io.dma, dev->name)) {
2182 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2183 driver_name, self->io.dma);
2184 free_irq(self->io.irq, dev);
2185 return -EAGAIN;
2186 }
2187
2188 /* Save current bank */
2189 bank = inb(iobase+BSR);
2190
2191 /* turn on interrupts */
2192 switch_bank(iobase, BANK0);
2193 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2194
2195 /* Restore bank register */
2196 outb(bank, iobase+BSR);
2197
2198 /* Ready to play! */
2199 netif_start_queue(dev);
2200
2201 /* Give self a hardware name */
2202 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2203
2204 /*
2205 * Open new IrLAP layer instance, now that everything should be
2206 * initialized properly
2207 */
2208 self->irlap = irlap_open(dev, &self->qos, hwname);
2209
2210 return 0;
2211 }
2212
2213 /*
2214 * Function nsc_ircc_net_close (dev)
2215 *
2216 * Stop the device
2217 *
2218 */
2219 static int nsc_ircc_net_close(struct net_device *dev)
2220 {
2221 struct nsc_ircc_cb *self;
2222 int iobase;
2223 __u8 bank;
2224
2225 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2226
2227 IRDA_ASSERT(dev != NULL, return -1;);
2228
2229 self = (struct nsc_ircc_cb *) dev->priv;
2230 IRDA_ASSERT(self != NULL, return 0;);
2231
2232 /* Stop device */
2233 netif_stop_queue(dev);
2234
2235 /* Stop and remove instance of IrLAP */
2236 if (self->irlap)
2237 irlap_close(self->irlap);
2238 self->irlap = NULL;
2239
2240 iobase = self->io.fir_base;
2241
2242 disable_dma(self->io.dma);
2243
2244 /* Save current bank */
2245 bank = inb(iobase+BSR);
2246
2247 /* Disable interrupts */
2248 switch_bank(iobase, BANK0);
2249 outb(0, iobase+IER);
2250
2251 free_irq(self->io.irq, dev);
2252 free_dma(self->io.dma);
2253
2254 /* Restore bank register */
2255 outb(bank, iobase+BSR);
2256
2257 return 0;
2258 }
2259
2260 /*
2261 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2262 *
2263 * Process IOCTL commands for this device
2264 *
2265 */
2266 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2267 {
2268 struct if_irda_req *irq = (struct if_irda_req *) rq;
2269 struct nsc_ircc_cb *self;
2270 unsigned long flags;
2271 int ret = 0;
2272
2273 IRDA_ASSERT(dev != NULL, return -1;);
2274
2275 self = dev->priv;
2276
2277 IRDA_ASSERT(self != NULL, return -1;);
2278
2279 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2280
2281 switch (cmd) {
2282 case SIOCSBANDWIDTH: /* Set bandwidth */
2283 if (!capable(CAP_NET_ADMIN)) {
2284 ret = -EPERM;
2285 break;
2286 }
2287 spin_lock_irqsave(&self->lock, flags);
2288 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2289 spin_unlock_irqrestore(&self->lock, flags);
2290 break;
2291 case SIOCSMEDIABUSY: /* Set media busy */
2292 if (!capable(CAP_NET_ADMIN)) {
2293 ret = -EPERM;
2294 break;
2295 }
2296 irda_device_set_media_busy(self->netdev, TRUE);
2297 break;
2298 case SIOCGRECEIVING: /* Check if we are receiving right now */
2299 /* This is already protected */
2300 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2301 break;
2302 default:
2303 ret = -EOPNOTSUPP;
2304 }
2305 return ret;
2306 }
2307
2308 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2309 {
2310 struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2311
2312 return &self->stats;
2313 }
2314
2315 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2316 {
2317 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2318 int bank;
2319 unsigned long flags;
2320 int iobase = self->io.fir_base;
2321
2322 if (self->io.suspended)
2323 return 0;
2324
2325 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2326
2327 rtnl_lock();
2328 if (netif_running(self->netdev)) {
2329 netif_device_detach(self->netdev);
2330 spin_lock_irqsave(&self->lock, flags);
2331 /* Save current bank */
2332 bank = inb(iobase+BSR);
2333
2334 /* Disable interrupts */
2335 switch_bank(iobase, BANK0);
2336 outb(0, iobase+IER);
2337
2338 /* Restore bank register */
2339 outb(bank, iobase+BSR);
2340
2341 spin_unlock_irqrestore(&self->lock, flags);
2342 free_irq(self->io.irq, self->netdev);
2343 disable_dma(self->io.dma);
2344 }
2345 self->io.suspended = 1;
2346 rtnl_unlock();
2347
2348 return 0;
2349 }
2350
2351 static int nsc_ircc_resume(struct platform_device *dev)
2352 {
2353 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2354 unsigned long flags;
2355
2356 if (!self->io.suspended)
2357 return 0;
2358
2359 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2360
2361 rtnl_lock();
2362 nsc_ircc_setup(&self->io);
2363 nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2364
2365 if (netif_running(self->netdev)) {
2366 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2367 self->netdev->name, self->netdev)) {
2368 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2369 driver_name, self->io.irq);
2370
2371 /*
2372 * Don't fail resume process, just kill this
2373 * network interface
2374 */
2375 unregister_netdevice(self->netdev);
2376 } else {
2377 spin_lock_irqsave(&self->lock, flags);
2378 nsc_ircc_change_speed(self, self->io.speed);
2379 spin_unlock_irqrestore(&self->lock, flags);
2380 netif_device_attach(self->netdev);
2381 }
2382
2383 } else {
2384 spin_lock_irqsave(&self->lock, flags);
2385 nsc_ircc_change_speed(self, 9600);
2386 spin_unlock_irqrestore(&self->lock, flags);
2387 }
2388 self->io.suspended = 0;
2389 rtnl_unlock();
2390
2391 return 0;
2392 }
2393
2394 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2395 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2396 MODULE_LICENSE("GPL");
2397
2398
2399 module_param(qos_mtt_bits, int, 0);
2400 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2401 module_param_array(io, int, NULL, 0);
2402 MODULE_PARM_DESC(io, "Base I/O addresses");
2403 module_param_array(irq, int, NULL, 0);
2404 MODULE_PARM_DESC(irq, "IRQ lines");
2405 module_param_array(dma, int, NULL, 0);
2406 MODULE_PARM_DESC(dma, "DMA channels");
2407 module_param(dongle_id, int, 0);
2408 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2409
2410 module_init(nsc_ircc_init);
2411 module_exit(nsc_ircc_cleanup);
2412
Linux kernel - Deliverables
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