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ixgbe: Add 82598 support for BX mezzanine devices
[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_ethtool.c
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 /* ethtool support for ixgbe */
29
30 #include <linux/types.h>
31 #include <linux/module.h>
32 #include <linux/pci.h>
33 #include <linux/netdevice.h>
34 #include <linux/ethtool.h>
35 #include <linux/vmalloc.h>
36 #include <linux/uaccess.h>
37
38 #include "ixgbe.h"
39
40
41 #define IXGBE_ALL_RAR_ENTRIES 16
42
43 struct ixgbe_stats {
44 char stat_string[ETH_GSTRING_LEN];
45 int sizeof_stat;
46 int stat_offset;
47 };
48
49 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
50 offsetof(struct ixgbe_adapter, m)
51 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
52 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
53 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
54 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
55 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
56 {"lsc_int", IXGBE_STAT(lsc_int)},
57 {"tx_busy", IXGBE_STAT(tx_busy)},
58 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
59 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
60 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
61 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
62 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
63 {"multicast", IXGBE_STAT(net_stats.multicast)},
64 {"broadcast", IXGBE_STAT(stats.bprc)},
65 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
66 {"collisions", IXGBE_STAT(net_stats.collisions)},
67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
73 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
74 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
75 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
76 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
77 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
78 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
79 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
80 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
81 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
82 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
83 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
84 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
85 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
86 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
87 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
88 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
89 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
92 };
93
94 #define IXGBE_QUEUE_STATS_LEN \
95 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
96 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
97 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
98 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
99 #define IXGBE_PB_STATS_LEN ( \
100 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
101 IXGBE_FLAG_DCB_ENABLED) ? \
102 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
103 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
104 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
105 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
106 / sizeof(u64) : 0)
107 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
108 IXGBE_PB_STATS_LEN + \
109 IXGBE_QUEUE_STATS_LEN)
110
111 static int ixgbe_get_settings(struct net_device *netdev,
112 struct ethtool_cmd *ecmd)
113 {
114 struct ixgbe_adapter *adapter = netdev_priv(netdev);
115 struct ixgbe_hw *hw = &adapter->hw;
116 u32 link_speed = 0;
117 bool link_up;
118
119 ecmd->supported = SUPPORTED_10000baseT_Full;
120 ecmd->autoneg = AUTONEG_ENABLE;
121 ecmd->transceiver = XCVR_EXTERNAL;
122 if (hw->phy.media_type == ixgbe_media_type_copper) {
123 ecmd->supported |= (SUPPORTED_1000baseT_Full |
124 SUPPORTED_TP | SUPPORTED_Autoneg);
125
126 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
127 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
128 ecmd->advertising |= ADVERTISED_10000baseT_Full;
129 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
130 ecmd->advertising |= ADVERTISED_1000baseT_Full;
131
132 ecmd->port = PORT_TP;
133 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
134 /* Set as FIBRE until SERDES defined in kernel */
135 switch (hw->device_id) {
136 case IXGBE_DEV_ID_82598:
137 ecmd->supported |= (SUPPORTED_1000baseT_Full |
138 SUPPORTED_FIBRE);
139 ecmd->advertising = (ADVERTISED_10000baseT_Full |
140 ADVERTISED_1000baseT_Full |
141 ADVERTISED_FIBRE);
142 ecmd->port = PORT_FIBRE;
143 break;
144 case IXGBE_DEV_ID_82598_BX:
145 ecmd->supported = (SUPPORTED_1000baseT_Full |
146 SUPPORTED_FIBRE);
147 ecmd->advertising = (ADVERTISED_1000baseT_Full |
148 ADVERTISED_FIBRE);
149 ecmd->port = PORT_FIBRE;
150 ecmd->autoneg = AUTONEG_DISABLE;
151 break;
152 }
153 } else {
154 ecmd->supported |= SUPPORTED_FIBRE;
155 ecmd->advertising = (ADVERTISED_10000baseT_Full |
156 ADVERTISED_FIBRE);
157 ecmd->port = PORT_FIBRE;
158 ecmd->autoneg = AUTONEG_DISABLE;
159 }
160
161 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
162 if (link_up) {
163 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
164 SPEED_10000 : SPEED_1000;
165 ecmd->duplex = DUPLEX_FULL;
166 } else {
167 ecmd->speed = -1;
168 ecmd->duplex = -1;
169 }
170
171 return 0;
172 }
173
174 static int ixgbe_set_settings(struct net_device *netdev,
175 struct ethtool_cmd *ecmd)
176 {
177 struct ixgbe_adapter *adapter = netdev_priv(netdev);
178 struct ixgbe_hw *hw = &adapter->hw;
179 u32 advertised, old;
180 s32 err;
181
182 switch (hw->phy.media_type) {
183 case ixgbe_media_type_fiber:
184 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
185 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
186 return -EINVAL;
187 /* in this case we currently only support 10Gb/FULL */
188 break;
189 case ixgbe_media_type_copper:
190 /* 10000/copper and 1000/copper must autoneg
191 * this function does not support any duplex forcing, but can
192 * limit the advertising of the adapter to only 10000 or 1000 */
193 if (ecmd->autoneg == AUTONEG_DISABLE)
194 return -EINVAL;
195
196 old = hw->phy.autoneg_advertised;
197 advertised = 0;
198 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
199 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
200
201 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
202 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
203
204 if (old == advertised)
205 break;
206 /* this sets the link speed and restarts auto-neg */
207 err = hw->mac.ops.setup_link_speed(hw, advertised, true, true);
208 if (err) {
209 DPRINTK(PROBE, INFO,
210 "setup link failed with code %d\n", err);
211 hw->mac.ops.setup_link_speed(hw, old, true, true);
212 }
213 break;
214 default:
215 break;
216 }
217
218 return 0;
219 }
220
221 static void ixgbe_get_pauseparam(struct net_device *netdev,
222 struct ethtool_pauseparam *pause)
223 {
224 struct ixgbe_adapter *adapter = netdev_priv(netdev);
225 struct ixgbe_hw *hw = &adapter->hw;
226
227 pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0);
228
229 if (hw->fc.type == ixgbe_fc_rx_pause) {
230 pause->rx_pause = 1;
231 } else if (hw->fc.type == ixgbe_fc_tx_pause) {
232 pause->tx_pause = 1;
233 } else if (hw->fc.type == ixgbe_fc_full) {
234 pause->rx_pause = 1;
235 pause->tx_pause = 1;
236 }
237 }
238
239 static int ixgbe_set_pauseparam(struct net_device *netdev,
240 struct ethtool_pauseparam *pause)
241 {
242 struct ixgbe_adapter *adapter = netdev_priv(netdev);
243 struct ixgbe_hw *hw = &adapter->hw;
244
245 if ((pause->autoneg == AUTONEG_ENABLE) ||
246 (pause->rx_pause && pause->tx_pause))
247 hw->fc.type = ixgbe_fc_full;
248 else if (pause->rx_pause && !pause->tx_pause)
249 hw->fc.type = ixgbe_fc_rx_pause;
250 else if (!pause->rx_pause && pause->tx_pause)
251 hw->fc.type = ixgbe_fc_tx_pause;
252 else if (!pause->rx_pause && !pause->tx_pause)
253 hw->fc.type = ixgbe_fc_none;
254 else
255 return -EINVAL;
256
257 hw->fc.original_type = hw->fc.type;
258
259 if (netif_running(netdev))
260 ixgbe_reinit_locked(adapter);
261 else
262 ixgbe_reset(adapter);
263
264 return 0;
265 }
266
267 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
268 {
269 struct ixgbe_adapter *adapter = netdev_priv(netdev);
270 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
271 }
272
273 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
274 {
275 struct ixgbe_adapter *adapter = netdev_priv(netdev);
276 if (data)
277 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
278 else
279 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
280
281 if (netif_running(netdev))
282 ixgbe_reinit_locked(adapter);
283 else
284 ixgbe_reset(adapter);
285
286 return 0;
287 }
288
289 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
290 {
291 return (netdev->features & NETIF_F_IP_CSUM) != 0;
292 }
293
294 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
295 {
296 if (data)
297 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
298 else
299 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
300
301 return 0;
302 }
303
304 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
305 {
306 if (data) {
307 netdev->features |= NETIF_F_TSO;
308 netdev->features |= NETIF_F_TSO6;
309 } else {
310 netif_tx_stop_all_queues(netdev);
311 netdev->features &= ~NETIF_F_TSO;
312 netdev->features &= ~NETIF_F_TSO6;
313 netif_tx_start_all_queues(netdev);
314 }
315 return 0;
316 }
317
318 static u32 ixgbe_get_msglevel(struct net_device *netdev)
319 {
320 struct ixgbe_adapter *adapter = netdev_priv(netdev);
321 return adapter->msg_enable;
322 }
323
324 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
325 {
326 struct ixgbe_adapter *adapter = netdev_priv(netdev);
327 adapter->msg_enable = data;
328 }
329
330 static int ixgbe_get_regs_len(struct net_device *netdev)
331 {
332 #define IXGBE_REGS_LEN 1128
333 return IXGBE_REGS_LEN * sizeof(u32);
334 }
335
336 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
337
338 static void ixgbe_get_regs(struct net_device *netdev,
339 struct ethtool_regs *regs, void *p)
340 {
341 struct ixgbe_adapter *adapter = netdev_priv(netdev);
342 struct ixgbe_hw *hw = &adapter->hw;
343 u32 *regs_buff = p;
344 u8 i;
345
346 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
347
348 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
349
350 /* General Registers */
351 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
352 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
353 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
354 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
355 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
356 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
357 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
358 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
359
360 /* NVM Register */
361 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
362 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
363 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
364 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
365 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
366 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
367 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
368 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
369 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
370 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
371
372 /* Interrupt */
373 /* don't read EICR because it can clear interrupt causes, instead
374 * read EICS which is a shadow but doesn't clear EICR */
375 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
376 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
377 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
378 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
379 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
380 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
381 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
382 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
383 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
384 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
385 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
386 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
387
388 /* Flow Control */
389 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
390 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
391 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
392 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
393 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
394 for (i = 0; i < 8; i++)
395 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
396 for (i = 0; i < 8; i++)
397 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
398 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
399 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
400
401 /* Receive DMA */
402 for (i = 0; i < 64; i++)
403 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
404 for (i = 0; i < 64; i++)
405 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
406 for (i = 0; i < 64; i++)
407 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
408 for (i = 0; i < 64; i++)
409 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
410 for (i = 0; i < 64; i++)
411 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
412 for (i = 0; i < 64; i++)
413 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
414 for (i = 0; i < 16; i++)
415 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
416 for (i = 0; i < 16; i++)
417 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
418 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
419 for (i = 0; i < 8; i++)
420 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
421 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
422 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
423
424 /* Receive */
425 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
426 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
427 for (i = 0; i < 16; i++)
428 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
429 for (i = 0; i < 16; i++)
430 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
431 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
432 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
433 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
434 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
435 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
436 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
437 for (i = 0; i < 8; i++)
438 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
439 for (i = 0; i < 8; i++)
440 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
441 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
442
443 /* Transmit */
444 for (i = 0; i < 32; i++)
445 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
446 for (i = 0; i < 32; i++)
447 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
448 for (i = 0; i < 32; i++)
449 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
450 for (i = 0; i < 32; i++)
451 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
452 for (i = 0; i < 32; i++)
453 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
454 for (i = 0; i < 32; i++)
455 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
456 for (i = 0; i < 32; i++)
457 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
458 for (i = 0; i < 32; i++)
459 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
460 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
461 for (i = 0; i < 16; i++)
462 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
463 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
464 for (i = 0; i < 8; i++)
465 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
466 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
467
468 /* Wake Up */
469 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
470 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
471 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
472 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
473 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
474 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
475 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
476 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
477 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
478
479 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
480 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
481 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
482 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
483 for (i = 0; i < 8; i++)
484 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
485 for (i = 0; i < 8; i++)
486 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
487 for (i = 0; i < 8; i++)
488 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
489 for (i = 0; i < 8; i++)
490 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
491 for (i = 0; i < 8; i++)
492 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
493 for (i = 0; i < 8; i++)
494 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
495
496 /* Statistics */
497 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
498 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
499 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
500 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
501 for (i = 0; i < 8; i++)
502 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
503 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
504 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
505 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
506 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
507 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
508 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
509 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
510 for (i = 0; i < 8; i++)
511 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
512 for (i = 0; i < 8; i++)
513 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
514 for (i = 0; i < 8; i++)
515 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
516 for (i = 0; i < 8; i++)
517 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
518 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
519 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
520 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
521 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
522 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
523 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
524 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
525 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
526 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
527 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
528 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
529 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
530 for (i = 0; i < 8; i++)
531 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
532 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
533 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
534 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
535 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
536 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
537 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
538 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
539 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
540 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
541 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
542 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
543 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
544 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
545 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
546 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
547 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
548 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
549 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
550 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
551 for (i = 0; i < 16; i++)
552 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
553 for (i = 0; i < 16; i++)
554 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
555 for (i = 0; i < 16; i++)
556 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
557 for (i = 0; i < 16; i++)
558 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
559
560 /* MAC */
561 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
562 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
563 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
564 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
565 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
566 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
567 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
568 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
569 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
570 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
571 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
572 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
573 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
574 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
575 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
576 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
577 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
578 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
579 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
580 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
581 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
582 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
583 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
584 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
585 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
586 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
587 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
588 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
589 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
590 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
591 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
592 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
593 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
594
595 /* Diagnostic */
596 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
597 for (i = 0; i < 8; i++)
598 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
599 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
600 for (i = 0; i < 4; i++)
601 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
602 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
603 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
604 for (i = 0; i < 8; i++)
605 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
606 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
607 for (i = 0; i < 4; i++)
608 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
609 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
610 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
611 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
612 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
613 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
614 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
615 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
616 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
617 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
618 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
619 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
620 for (i = 0; i < 8; i++)
621 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
622 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
623 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
624 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
625 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
626 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
627 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
628 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
629 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
630 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
631 }
632
633 static int ixgbe_get_eeprom_len(struct net_device *netdev)
634 {
635 struct ixgbe_adapter *adapter = netdev_priv(netdev);
636 return adapter->hw.eeprom.word_size * 2;
637 }
638
639 static int ixgbe_get_eeprom(struct net_device *netdev,
640 struct ethtool_eeprom *eeprom, u8 *bytes)
641 {
642 struct ixgbe_adapter *adapter = netdev_priv(netdev);
643 struct ixgbe_hw *hw = &adapter->hw;
644 u16 *eeprom_buff;
645 int first_word, last_word, eeprom_len;
646 int ret_val = 0;
647 u16 i;
648
649 if (eeprom->len == 0)
650 return -EINVAL;
651
652 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
653
654 first_word = eeprom->offset >> 1;
655 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
656 eeprom_len = last_word - first_word + 1;
657
658 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
659 if (!eeprom_buff)
660 return -ENOMEM;
661
662 for (i = 0; i < eeprom_len; i++) {
663 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
664 &eeprom_buff[i])))
665 break;
666 }
667
668 /* Device's eeprom is always little-endian, word addressable */
669 for (i = 0; i < eeprom_len; i++)
670 le16_to_cpus(&eeprom_buff[i]);
671
672 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
673 kfree(eeprom_buff);
674
675 return ret_val;
676 }
677
678 static void ixgbe_get_drvinfo(struct net_device *netdev,
679 struct ethtool_drvinfo *drvinfo)
680 {
681 struct ixgbe_adapter *adapter = netdev_priv(netdev);
682
683 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
684 strncpy(drvinfo->version, ixgbe_driver_version, 32);
685 strncpy(drvinfo->fw_version, "N/A", 32);
686 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
687 drvinfo->n_stats = IXGBE_STATS_LEN;
688 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
689 }
690
691 static void ixgbe_get_ringparam(struct net_device *netdev,
692 struct ethtool_ringparam *ring)
693 {
694 struct ixgbe_adapter *adapter = netdev_priv(netdev);
695 struct ixgbe_ring *tx_ring = adapter->tx_ring;
696 struct ixgbe_ring *rx_ring = adapter->rx_ring;
697
698 ring->rx_max_pending = IXGBE_MAX_RXD;
699 ring->tx_max_pending = IXGBE_MAX_TXD;
700 ring->rx_mini_max_pending = 0;
701 ring->rx_jumbo_max_pending = 0;
702 ring->rx_pending = rx_ring->count;
703 ring->tx_pending = tx_ring->count;
704 ring->rx_mini_pending = 0;
705 ring->rx_jumbo_pending = 0;
706 }
707
708 static int ixgbe_set_ringparam(struct net_device *netdev,
709 struct ethtool_ringparam *ring)
710 {
711 struct ixgbe_adapter *adapter = netdev_priv(netdev);
712 struct ixgbe_ring *temp_ring;
713 int i, err;
714 u32 new_rx_count, new_tx_count;
715
716 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
717 return -EINVAL;
718
719 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
720 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
721 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
722
723 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
724 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
725 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
726
727 if ((new_tx_count == adapter->tx_ring->count) &&
728 (new_rx_count == adapter->rx_ring->count)) {
729 /* nothing to do */
730 return 0;
731 }
732
733 temp_ring = kcalloc(adapter->num_tx_queues,
734 sizeof(struct ixgbe_ring), GFP_KERNEL);
735 if (!temp_ring)
736 return -ENOMEM;
737
738 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
739 msleep(1);
740
741 if (new_tx_count != adapter->tx_ring->count) {
742 for (i = 0; i < adapter->num_tx_queues; i++) {
743 temp_ring[i].count = new_tx_count;
744 err = ixgbe_setup_tx_resources(adapter, &temp_ring[i]);
745 if (err) {
746 while (i) {
747 i--;
748 ixgbe_free_tx_resources(adapter,
749 &temp_ring[i]);
750 }
751 goto err_setup;
752 }
753 temp_ring[i].v_idx = adapter->tx_ring[i].v_idx;
754 }
755 if (netif_running(netdev))
756 netdev->netdev_ops->ndo_stop(netdev);
757 ixgbe_reset_interrupt_capability(adapter);
758 ixgbe_napi_del_all(adapter);
759 INIT_LIST_HEAD(&netdev->napi_list);
760 kfree(adapter->tx_ring);
761 adapter->tx_ring = temp_ring;
762 temp_ring = NULL;
763 adapter->tx_ring_count = new_tx_count;
764 }
765
766 temp_ring = kcalloc(adapter->num_rx_queues,
767 sizeof(struct ixgbe_ring), GFP_KERNEL);
768 if (!temp_ring) {
769 if (netif_running(netdev))
770 netdev->netdev_ops->ndo_open(netdev);
771 return -ENOMEM;
772 }
773
774 if (new_rx_count != adapter->rx_ring->count) {
775 for (i = 0; i < adapter->num_rx_queues; i++) {
776 temp_ring[i].count = new_rx_count;
777 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
778 if (err) {
779 while (i) {
780 i--;
781 ixgbe_free_rx_resources(adapter,
782 &temp_ring[i]);
783 }
784 goto err_setup;
785 }
786 temp_ring[i].v_idx = adapter->rx_ring[i].v_idx;
787 }
788 if (netif_running(netdev))
789 netdev->netdev_ops->ndo_stop(netdev);
790 ixgbe_reset_interrupt_capability(adapter);
791 ixgbe_napi_del_all(adapter);
792 INIT_LIST_HEAD(&netdev->napi_list);
793 kfree(adapter->rx_ring);
794 adapter->rx_ring = temp_ring;
795 temp_ring = NULL;
796
797 adapter->rx_ring_count = new_rx_count;
798 }
799
800 /* success! */
801 err = 0;
802 err_setup:
803 ixgbe_init_interrupt_scheme(adapter);
804 if (netif_running(netdev))
805 netdev->netdev_ops->ndo_open(netdev);
806
807 clear_bit(__IXGBE_RESETTING, &adapter->state);
808 return err;
809 }
810
811 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
812 {
813 switch (sset) {
814 case ETH_SS_STATS:
815 return IXGBE_STATS_LEN;
816 default:
817 return -EOPNOTSUPP;
818 }
819 }
820
821 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
822 struct ethtool_stats *stats, u64 *data)
823 {
824 struct ixgbe_adapter *adapter = netdev_priv(netdev);
825 u64 *queue_stat;
826 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
827 int j, k;
828 int i;
829
830 ixgbe_update_stats(adapter);
831 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
832 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
833 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
834 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
835 }
836 for (j = 0; j < adapter->num_tx_queues; j++) {
837 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
838 for (k = 0; k < stat_count; k++)
839 data[i + k] = queue_stat[k];
840 i += k;
841 }
842 for (j = 0; j < adapter->num_rx_queues; j++) {
843 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
844 for (k = 0; k < stat_count; k++)
845 data[i + k] = queue_stat[k];
846 i += k;
847 }
848 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
849 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
850 data[i++] = adapter->stats.pxontxc[j];
851 data[i++] = adapter->stats.pxofftxc[j];
852 }
853 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
854 data[i++] = adapter->stats.pxonrxc[j];
855 data[i++] = adapter->stats.pxoffrxc[j];
856 }
857 }
858 }
859
860 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
861 u8 *data)
862 {
863 struct ixgbe_adapter *adapter = netdev_priv(netdev);
864 char *p = (char *)data;
865 int i;
866
867 switch (stringset) {
868 case ETH_SS_STATS:
869 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
870 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
871 ETH_GSTRING_LEN);
872 p += ETH_GSTRING_LEN;
873 }
874 for (i = 0; i < adapter->num_tx_queues; i++) {
875 sprintf(p, "tx_queue_%u_packets", i);
876 p += ETH_GSTRING_LEN;
877 sprintf(p, "tx_queue_%u_bytes", i);
878 p += ETH_GSTRING_LEN;
879 }
880 for (i = 0; i < adapter->num_rx_queues; i++) {
881 sprintf(p, "rx_queue_%u_packets", i);
882 p += ETH_GSTRING_LEN;
883 sprintf(p, "rx_queue_%u_bytes", i);
884 p += ETH_GSTRING_LEN;
885 }
886 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
887 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
888 sprintf(p, "tx_pb_%u_pxon", i);
889 p += ETH_GSTRING_LEN;
890 sprintf(p, "tx_pb_%u_pxoff", i);
891 p += ETH_GSTRING_LEN;
892 }
893 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
894 sprintf(p, "rx_pb_%u_pxon", i);
895 p += ETH_GSTRING_LEN;
896 sprintf(p, "rx_pb_%u_pxoff", i);
897 p += ETH_GSTRING_LEN;
898 }
899 }
900 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
901 break;
902 }
903 }
904
905
906 static void ixgbe_get_wol(struct net_device *netdev,
907 struct ethtool_wolinfo *wol)
908 {
909 wol->supported = 0;
910 wol->wolopts = 0;
911
912 return;
913 }
914
915 static int ixgbe_nway_reset(struct net_device *netdev)
916 {
917 struct ixgbe_adapter *adapter = netdev_priv(netdev);
918
919 if (netif_running(netdev))
920 ixgbe_reinit_locked(adapter);
921
922 return 0;
923 }
924
925 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
926 {
927 struct ixgbe_adapter *adapter = netdev_priv(netdev);
928 struct ixgbe_hw *hw = &adapter->hw;
929 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
930 u32 i;
931
932 if (!data || data > 300)
933 data = 300;
934
935 for (i = 0; i < (data * 1000); i += 400) {
936 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
937 msleep_interruptible(200);
938 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
939 msleep_interruptible(200);
940 }
941
942 /* Restore LED settings */
943 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
944
945 return 0;
946 }
947
948 static int ixgbe_get_coalesce(struct net_device *netdev,
949 struct ethtool_coalesce *ec)
950 {
951 struct ixgbe_adapter *adapter = netdev_priv(netdev);
952
953 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
954
955 /* only valid if in constant ITR mode */
956 switch (adapter->itr_setting) {
957 case 0:
958 /* throttling disabled */
959 ec->rx_coalesce_usecs = 0;
960 break;
961 case 1:
962 /* dynamic ITR mode */
963 ec->rx_coalesce_usecs = 1;
964 break;
965 default:
966 /* fixed interrupt rate mode */
967 ec->rx_coalesce_usecs = 1000000/adapter->eitr_param;
968 break;
969 }
970 return 0;
971 }
972
973 static int ixgbe_set_coalesce(struct net_device *netdev,
974 struct ethtool_coalesce *ec)
975 {
976 struct ixgbe_adapter *adapter = netdev_priv(netdev);
977 struct ixgbe_hw *hw = &adapter->hw;
978 int i;
979
980 if (ec->tx_max_coalesced_frames_irq)
981 adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq;
982
983 if (ec->rx_coalesce_usecs > 1) {
984 /* store the value in ints/second */
985 adapter->eitr_param = 1000000/ec->rx_coalesce_usecs;
986
987 /* static value of interrupt rate */
988 adapter->itr_setting = adapter->eitr_param;
989 /* clear the lower bit */
990 adapter->itr_setting &= ~1;
991 } else if (ec->rx_coalesce_usecs == 1) {
992 /* 1 means dynamic mode */
993 adapter->eitr_param = 20000;
994 adapter->itr_setting = 1;
995 } else {
996 /* any other value means disable eitr, which is best
997 * served by setting the interrupt rate very high */
998 adapter->eitr_param = 3000000;
999 adapter->itr_setting = 0;
1000 }
1001
1002 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
1003 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1004 if (q_vector->txr_count && !q_vector->rxr_count)
1005 q_vector->eitr = (adapter->eitr_param >> 1);
1006 else
1007 /* rx only or mixed */
1008 q_vector->eitr = adapter->eitr_param;
1009 IXGBE_WRITE_REG(hw, IXGBE_EITR(i),
1010 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
1011 }
1012
1013 return 0;
1014 }
1015
1016
1017 static const struct ethtool_ops ixgbe_ethtool_ops = {
1018 .get_settings = ixgbe_get_settings,
1019 .set_settings = ixgbe_set_settings,
1020 .get_drvinfo = ixgbe_get_drvinfo,
1021 .get_regs_len = ixgbe_get_regs_len,
1022 .get_regs = ixgbe_get_regs,
1023 .get_wol = ixgbe_get_wol,
1024 .nway_reset = ixgbe_nway_reset,
1025 .get_link = ethtool_op_get_link,
1026 .get_eeprom_len = ixgbe_get_eeprom_len,
1027 .get_eeprom = ixgbe_get_eeprom,
1028 .get_ringparam = ixgbe_get_ringparam,
1029 .set_ringparam = ixgbe_set_ringparam,
1030 .get_pauseparam = ixgbe_get_pauseparam,
1031 .set_pauseparam = ixgbe_set_pauseparam,
1032 .get_rx_csum = ixgbe_get_rx_csum,
1033 .set_rx_csum = ixgbe_set_rx_csum,
1034 .get_tx_csum = ixgbe_get_tx_csum,
1035 .set_tx_csum = ixgbe_set_tx_csum,
1036 .get_sg = ethtool_op_get_sg,
1037 .set_sg = ethtool_op_set_sg,
1038 .get_msglevel = ixgbe_get_msglevel,
1039 .set_msglevel = ixgbe_set_msglevel,
1040 .get_tso = ethtool_op_get_tso,
1041 .set_tso = ixgbe_set_tso,
1042 .get_strings = ixgbe_get_strings,
1043 .phys_id = ixgbe_phys_id,
1044 .get_sset_count = ixgbe_get_sset_count,
1045 .get_ethtool_stats = ixgbe_get_ethtool_stats,
1046 .get_coalesce = ixgbe_get_coalesce,
1047 .set_coalesce = ixgbe_set_coalesce,
1048 .get_flags = ethtool_op_get_flags,
1049 .set_flags = ethtool_op_set_flags,
1050 };
1051
1052 void ixgbe_set_ethtool_ops(struct net_device *netdev)
1053 {
1054 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
1055 }
Linux kernel - Deliverables
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