1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name
[] = "ixgbe";
47 static const char ixgbe_driver_string
[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "2.0.8-k2"
51 const char ixgbe_driver_version
[] = DRV_VERSION
;
52 static char ixgbe_copyright
[] = "Copyright (c) 1999-2009 Intel Corporation.";
54 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
55 [board_82598
] = &ixgbe_82598_info
,
56 [board_82599
] = &ixgbe_82599_info
,
59 /* ixgbe_pci_tbl - PCI Device ID Table
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
67 static struct pci_device_id ixgbe_pci_tbl
[] = {
68 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
),
70 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
72 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
74 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
76 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
78 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
80 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
82 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
84 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
86 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
88 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
),
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
),
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
),
95 /* required last entry */
98 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
100 #ifdef CONFIG_IXGBE_DCA
101 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
103 static struct notifier_block dca_notifier
= {
104 .notifier_call
= ixgbe_notify_dca
,
110 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
111 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
112 MODULE_LICENSE("GPL");
113 MODULE_VERSION(DRV_VERSION
);
115 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
117 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
121 /* Let firmware take over control of h/w */
122 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
123 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
124 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
127 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
131 /* Let firmware know the driver has taken over */
132 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
133 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
134 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
138 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
139 * @adapter: pointer to adapter struct
140 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
141 * @queue: queue to map the corresponding interrupt to
142 * @msix_vector: the vector to map to the corresponding queue
145 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
146 u8 queue
, u8 msix_vector
)
149 struct ixgbe_hw
*hw
= &adapter
->hw
;
150 switch (hw
->mac
.type
) {
151 case ixgbe_mac_82598EB
:
152 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
155 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
156 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
157 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
158 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
159 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
161 case ixgbe_mac_82599EB
:
162 if (direction
== -1) {
164 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
165 index
= ((queue
& 1) * 8);
166 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
167 ivar
&= ~(0xFF << index
);
168 ivar
|= (msix_vector
<< index
);
169 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
172 /* tx or rx causes */
173 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
174 index
= ((16 * (queue
& 1)) + (8 * direction
));
175 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
176 ivar
&= ~(0xFF << index
);
177 ivar
|= (msix_vector
<< index
);
178 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
186 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
187 struct ixgbe_tx_buffer
190 if (tx_buffer_info
->dma
) {
191 pci_unmap_page(adapter
->pdev
, tx_buffer_info
->dma
,
192 tx_buffer_info
->length
, PCI_DMA_TODEVICE
);
193 tx_buffer_info
->dma
= 0;
195 if (tx_buffer_info
->skb
) {
196 dev_kfree_skb_any(tx_buffer_info
->skb
);
197 tx_buffer_info
->skb
= NULL
;
199 /* tx_buffer_info must be completely set up in the transmit path */
202 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
203 struct ixgbe_ring
*tx_ring
,
206 struct ixgbe_hw
*hw
= &adapter
->hw
;
209 /* Detect a transmit hang in hardware, this serializes the
210 * check with the clearing of time_stamp and movement of eop */
211 head
= IXGBE_READ_REG(hw
, tx_ring
->head
);
212 tail
= IXGBE_READ_REG(hw
, tx_ring
->tail
);
213 adapter
->detect_tx_hung
= false;
214 if ((head
!= tail
) &&
215 tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
216 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
217 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
218 /* detected Tx unit hang */
219 union ixgbe_adv_tx_desc
*tx_desc
;
220 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
221 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
223 " TDH, TDT <%x>, <%x>\n"
224 " next_to_use <%x>\n"
225 " next_to_clean <%x>\n"
226 "tx_buffer_info[next_to_clean]\n"
227 " time_stamp <%lx>\n"
229 tx_ring
->queue_index
,
231 tx_ring
->next_to_use
, eop
,
232 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
239 #define IXGBE_MAX_TXD_PWR 14
240 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
242 /* Tx Descriptors needed, worst case */
243 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
244 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
245 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
246 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
248 static void ixgbe_tx_timeout(struct net_device
*netdev
);
251 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
252 * @adapter: board private structure
253 * @tx_ring: tx ring to clean
255 * returns true if transmit work is done
257 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
258 struct ixgbe_ring
*tx_ring
)
260 struct net_device
*netdev
= adapter
->netdev
;
261 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
262 struct ixgbe_tx_buffer
*tx_buffer_info
;
263 unsigned int i
, eop
, count
= 0;
264 unsigned int total_bytes
= 0, total_packets
= 0;
266 i
= tx_ring
->next_to_clean
;
267 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
268 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
270 while ((eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) &&
271 (count
< tx_ring
->work_limit
)) {
272 bool cleaned
= false;
273 for ( ; !cleaned
; count
++) {
275 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
276 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
277 cleaned
= (i
== eop
);
278 skb
= tx_buffer_info
->skb
;
280 if (cleaned
&& skb
) {
281 unsigned int segs
, bytecount
;
283 /* gso_segs is currently only valid for tcp */
284 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
285 /* multiply data chunks by size of headers */
286 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
288 total_packets
+= segs
;
289 total_bytes
+= bytecount
;
292 ixgbe_unmap_and_free_tx_resource(adapter
,
295 tx_desc
->wb
.status
= 0;
298 if (i
== tx_ring
->count
)
302 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
303 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
306 tx_ring
->next_to_clean
= i
;
308 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
309 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
310 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
311 /* Make sure that anybody stopping the queue after this
312 * sees the new next_to_clean.
315 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
316 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
317 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
318 ++adapter
->restart_queue
;
322 if (adapter
->detect_tx_hung
) {
323 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
324 /* schedule immediate reset if we believe we hung */
326 "tx hang %d detected, resetting adapter\n",
327 adapter
->tx_timeout_count
+ 1);
328 ixgbe_tx_timeout(adapter
->netdev
);
332 /* re-arm the interrupt */
333 if (count
>= tx_ring
->work_limit
)
334 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->v_idx
);
336 tx_ring
->total_bytes
+= total_bytes
;
337 tx_ring
->total_packets
+= total_packets
;
338 tx_ring
->stats
.packets
+= total_packets
;
339 tx_ring
->stats
.bytes
+= total_bytes
;
340 adapter
->net_stats
.tx_bytes
+= total_bytes
;
341 adapter
->net_stats
.tx_packets
+= total_packets
;
342 return (count
< tx_ring
->work_limit
);
345 #ifdef CONFIG_IXGBE_DCA
346 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
347 struct ixgbe_ring
*rx_ring
)
351 int q
= rx_ring
- adapter
->rx_ring
;
353 if (rx_ring
->cpu
!= cpu
) {
354 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
355 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
356 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
357 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
358 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
359 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599
;
360 rxctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
361 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
);
363 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
364 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
365 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN
);
366 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN
|
367 IXGBE_DCA_RXCTRL_DESC_HSRO_EN
);
368 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
374 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
375 struct ixgbe_ring
*tx_ring
)
379 int q
= tx_ring
- adapter
->tx_ring
;
381 if (tx_ring
->cpu
!= cpu
) {
382 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
383 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
384 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
385 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
386 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
387 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599
;
388 txctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
389 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
);
391 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
392 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
398 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
402 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
405 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
406 adapter
->tx_ring
[i
].cpu
= -1;
407 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
409 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
410 adapter
->rx_ring
[i
].cpu
= -1;
411 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
415 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
417 struct net_device
*netdev
= dev_get_drvdata(dev
);
418 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
419 unsigned long event
= *(unsigned long *)data
;
422 case DCA_PROVIDER_ADD
:
423 /* if we're already enabled, don't do it again */
424 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
426 /* Always use CB2 mode, difference is masked
427 * in the CB driver. */
428 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
429 if (dca_add_requester(dev
) == 0) {
430 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
431 ixgbe_setup_dca(adapter
);
434 /* Fall Through since DCA is disabled. */
435 case DCA_PROVIDER_REMOVE
:
436 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
437 dca_remove_requester(dev
);
438 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
439 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
447 #endif /* CONFIG_IXGBE_DCA */
449 * ixgbe_receive_skb - Send a completed packet up the stack
450 * @adapter: board private structure
451 * @skb: packet to send up
452 * @status: hardware indication of status of receive
453 * @rx_ring: rx descriptor ring (for a specific queue) to setup
454 * @rx_desc: rx descriptor
456 static void ixgbe_receive_skb(struct ixgbe_q_vector
*q_vector
,
457 struct sk_buff
*skb
, u8 status
,
458 union ixgbe_adv_rx_desc
*rx_desc
)
460 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
461 struct napi_struct
*napi
= &q_vector
->napi
;
462 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
463 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
465 skb_record_rx_queue(skb
, q_vector
- &adapter
->q_vector
[0]);
466 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
467 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
468 vlan_gro_receive(napi
, adapter
->vlgrp
, tag
, skb
);
470 napi_gro_receive(napi
, skb
);
472 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
473 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
474 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
476 netif_receive_skb(skb
);
478 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
479 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
487 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
488 * @adapter: address of board private structure
489 * @status_err: hardware indication of status of receive
490 * @skb: skb currently being received and modified
492 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
493 u32 status_err
, struct sk_buff
*skb
)
495 skb
->ip_summed
= CHECKSUM_NONE
;
497 /* Rx csum disabled */
498 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
501 /* if IP and error */
502 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
503 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
504 adapter
->hw_csum_rx_error
++;
508 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
511 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
512 adapter
->hw_csum_rx_error
++;
516 /* It must be a TCP or UDP packet with a valid checksum */
517 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
518 adapter
->hw_csum_rx_good
++;
521 static inline void ixgbe_release_rx_desc(struct ixgbe_hw
*hw
,
522 struct ixgbe_ring
*rx_ring
, u32 val
)
525 * Force memory writes to complete before letting h/w
526 * know there are new descriptors to fetch. (Only
527 * applicable for weak-ordered memory model archs,
531 IXGBE_WRITE_REG(hw
, IXGBE_RDT(rx_ring
->reg_idx
), val
);
535 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
536 * @adapter: address of board private structure
538 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
539 struct ixgbe_ring
*rx_ring
,
542 struct pci_dev
*pdev
= adapter
->pdev
;
543 union ixgbe_adv_rx_desc
*rx_desc
;
544 struct ixgbe_rx_buffer
*bi
;
546 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
548 i
= rx_ring
->next_to_use
;
549 bi
= &rx_ring
->rx_buffer_info
[i
];
551 while (cleaned_count
--) {
552 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
555 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
557 bi
->page
= alloc_page(GFP_ATOMIC
);
559 adapter
->alloc_rx_page_failed
++;
564 /* use a half page if we're re-using */
565 bi
->page_offset
^= (PAGE_SIZE
/ 2);
568 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
576 skb
= netdev_alloc_skb(adapter
->netdev
, bufsz
);
579 adapter
->alloc_rx_buff_failed
++;
584 * Make buffer alignment 2 beyond a 16 byte boundary
585 * this will result in a 16 byte aligned IP header after
586 * the 14 byte MAC header is removed
588 skb_reserve(skb
, NET_IP_ALIGN
);
591 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
594 /* Refresh the desc even if buffer_addrs didn't change because
595 * each write-back erases this info. */
596 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
597 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
598 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
600 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
604 if (i
== rx_ring
->count
)
606 bi
= &rx_ring
->rx_buffer_info
[i
];
610 if (rx_ring
->next_to_use
!= i
) {
611 rx_ring
->next_to_use
= i
;
613 i
= (rx_ring
->count
- 1);
615 ixgbe_release_rx_desc(&adapter
->hw
, rx_ring
, i
);
619 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
621 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
624 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
626 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
629 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
630 struct ixgbe_ring
*rx_ring
,
631 int *work_done
, int work_to_do
)
633 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
634 struct pci_dev
*pdev
= adapter
->pdev
;
635 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
636 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
641 bool cleaned
= false;
642 int cleaned_count
= 0;
643 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
645 i
= rx_ring
->next_to_clean
;
646 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
647 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
648 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
650 while (staterr
& IXGBE_RXD_STAT_DD
) {
652 if (*work_done
>= work_to_do
)
656 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
657 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
658 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
659 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
660 if (hdr_info
& IXGBE_RXDADV_SPH
)
661 adapter
->rx_hdr_split
++;
662 if (len
> IXGBE_RX_HDR_SIZE
)
663 len
= IXGBE_RX_HDR_SIZE
;
664 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
666 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
670 skb
= rx_buffer_info
->skb
;
671 prefetch(skb
->data
- NET_IP_ALIGN
);
672 rx_buffer_info
->skb
= NULL
;
674 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
675 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
682 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
683 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
684 rx_buffer_info
->page_dma
= 0;
685 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
686 rx_buffer_info
->page
,
687 rx_buffer_info
->page_offset
,
690 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
691 (page_count(rx_buffer_info
->page
) != 1))
692 rx_buffer_info
->page
= NULL
;
694 get_page(rx_buffer_info
->page
);
696 skb
->len
+= upper_len
;
697 skb
->data_len
+= upper_len
;
698 skb
->truesize
+= upper_len
;
702 if (i
== rx_ring
->count
)
704 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
706 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
710 if (staterr
& IXGBE_RXD_STAT_EOP
) {
711 rx_ring
->stats
.packets
++;
712 rx_ring
->stats
.bytes
+= skb
->len
;
714 rx_buffer_info
->skb
= next_buffer
->skb
;
715 rx_buffer_info
->dma
= next_buffer
->dma
;
716 next_buffer
->skb
= skb
;
717 next_buffer
->dma
= 0;
718 adapter
->non_eop_descs
++;
722 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
723 dev_kfree_skb_irq(skb
);
727 ixgbe_rx_checksum(adapter
, staterr
, skb
);
729 /* probably a little skewed due to removing CRC */
730 total_rx_bytes
+= skb
->len
;
733 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
734 ixgbe_receive_skb(q_vector
, skb
, staterr
, rx_desc
);
737 rx_desc
->wb
.upper
.status_error
= 0;
739 /* return some buffers to hardware, one at a time is too slow */
740 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
741 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
745 /* use prefetched values */
747 rx_buffer_info
= next_buffer
;
749 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
752 rx_ring
->next_to_clean
= i
;
753 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
756 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
758 rx_ring
->total_packets
+= total_rx_packets
;
759 rx_ring
->total_bytes
+= total_rx_bytes
;
760 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
761 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
766 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
768 * ixgbe_configure_msix - Configure MSI-X hardware
769 * @adapter: board private structure
771 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
774 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
776 struct ixgbe_q_vector
*q_vector
;
777 int i
, j
, q_vectors
, v_idx
, r_idx
;
780 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
783 * Populate the IVAR table and set the ITR values to the
784 * corresponding register.
786 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
787 q_vector
= &adapter
->q_vector
[v_idx
];
788 /* XXX for_each_bit(...) */
789 r_idx
= find_first_bit(q_vector
->rxr_idx
,
790 adapter
->num_rx_queues
);
792 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
793 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
794 ixgbe_set_ivar(adapter
, 0, j
, v_idx
);
795 r_idx
= find_next_bit(q_vector
->rxr_idx
,
796 adapter
->num_rx_queues
,
799 r_idx
= find_first_bit(q_vector
->txr_idx
,
800 adapter
->num_tx_queues
);
802 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
803 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
804 ixgbe_set_ivar(adapter
, 1, j
, v_idx
);
805 r_idx
= find_next_bit(q_vector
->txr_idx
,
806 adapter
->num_tx_queues
,
810 /* if this is a tx only vector halve the interrupt rate */
811 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
812 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
813 else if (q_vector
->rxr_count
)
815 q_vector
->eitr
= adapter
->eitr_param
;
818 * since this is initial set up don't need to call
819 * ixgbe_write_eitr helper
821 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
822 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
825 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
826 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
828 else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
829 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
830 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
832 /* set up to autoclear timer, and the vectors */
833 mask
= IXGBE_EIMS_ENABLE_MASK
;
834 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
835 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
842 latency_invalid
= 255
846 * ixgbe_update_itr - update the dynamic ITR value based on statistics
847 * @adapter: pointer to adapter
848 * @eitr: eitr setting (ints per sec) to give last timeslice
849 * @itr_setting: current throttle rate in ints/second
850 * @packets: the number of packets during this measurement interval
851 * @bytes: the number of bytes during this measurement interval
853 * Stores a new ITR value based on packets and byte
854 * counts during the last interrupt. The advantage of per interrupt
855 * computation is faster updates and more accurate ITR for the current
856 * traffic pattern. Constants in this function were computed
857 * based on theoretical maximum wire speed and thresholds were set based
858 * on testing data as well as attempting to minimize response time
859 * while increasing bulk throughput.
860 * this functionality is controlled by the InterruptThrottleRate module
861 * parameter (see ixgbe_param.c)
863 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
864 u32 eitr
, u8 itr_setting
,
865 int packets
, int bytes
)
867 unsigned int retval
= itr_setting
;
872 goto update_itr_done
;
875 /* simple throttlerate management
876 * 0-20MB/s lowest (100000 ints/s)
877 * 20-100MB/s low (20000 ints/s)
878 * 100-1249MB/s bulk (8000 ints/s)
880 /* what was last interrupt timeslice? */
881 timepassed_us
= 1000000/eitr
;
882 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
884 switch (itr_setting
) {
886 if (bytes_perint
> adapter
->eitr_low
)
887 retval
= low_latency
;
890 if (bytes_perint
> adapter
->eitr_high
)
891 retval
= bulk_latency
;
892 else if (bytes_perint
<= adapter
->eitr_low
)
893 retval
= lowest_latency
;
896 if (bytes_perint
<= adapter
->eitr_high
)
897 retval
= low_latency
;
906 * ixgbe_write_eitr - write EITR register in hardware specific way
907 * @adapter: pointer to adapter struct
908 * @v_idx: vector index into q_vector array
909 * @itr_reg: new value to be written in *register* format, not ints/s
911 * This function is made to be called by ethtool and by the driver
912 * when it needs to update EITR registers at runtime. Hardware
913 * specific quirks/differences are taken care of here.
915 void ixgbe_write_eitr(struct ixgbe_adapter
*adapter
, int v_idx
, u32 itr_reg
)
917 struct ixgbe_hw
*hw
= &adapter
->hw
;
918 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
919 /* must write high and low 16 bits to reset counter */
920 itr_reg
|= (itr_reg
<< 16);
921 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
923 * set the WDIS bit to not clear the timer bits and cause an
924 * immediate assertion of the interrupt
926 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
928 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
931 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
933 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
935 u8 current_itr
, ret_itr
;
936 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
937 sizeof(struct ixgbe_q_vector
);
938 struct ixgbe_ring
*rx_ring
, *tx_ring
;
940 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
941 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
942 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
943 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
945 tx_ring
->total_packets
,
946 tx_ring
->total_bytes
);
947 /* if the result for this queue would decrease interrupt
948 * rate for this vector then use that result */
949 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
950 q_vector
->tx_itr
- 1 : ret_itr
);
951 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
955 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
956 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
957 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
958 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
960 rx_ring
->total_packets
,
961 rx_ring
->total_bytes
);
962 /* if the result for this queue would decrease interrupt
963 * rate for this vector then use that result */
964 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
965 q_vector
->rx_itr
- 1 : ret_itr
);
966 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
970 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
972 switch (current_itr
) {
973 /* counts and packets in update_itr are dependent on these numbers */
978 new_itr
= 20000; /* aka hwitr = ~200 */
986 if (new_itr
!= q_vector
->eitr
) {
989 /* save the algorithm value here, not the smoothed one */
990 q_vector
->eitr
= new_itr
;
991 /* do an exponential smoothing */
992 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
993 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
994 ixgbe_write_eitr(adapter
, v_idx
, itr_reg
);
1000 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
1002 struct ixgbe_hw
*hw
= &adapter
->hw
;
1004 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
1005 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
1006 DPRINTK(PROBE
, CRIT
, "Fan has stopped, replace the adapter\n");
1007 /* write to clear the interrupt */
1008 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1012 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
1014 struct ixgbe_hw
*hw
= &adapter
->hw
;
1016 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
1017 /* Clear the interrupt */
1018 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1019 schedule_work(&adapter
->multispeed_fiber_task
);
1020 } else if (eicr
& IXGBE_EICR_GPI_SDP2
) {
1021 /* Clear the interrupt */
1022 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
1023 schedule_work(&adapter
->sfp_config_module_task
);
1025 /* Interrupt isn't for us... */
1030 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
1032 struct ixgbe_hw
*hw
= &adapter
->hw
;
1035 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1036 adapter
->link_check_timeout
= jiffies
;
1037 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1038 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
1039 schedule_work(&adapter
->watchdog_task
);
1043 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
1045 struct net_device
*netdev
= data
;
1046 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1047 struct ixgbe_hw
*hw
= &adapter
->hw
;
1051 * Workaround for Silicon errata. Use clear-by-write instead
1052 * of clear-by-read. Reading with EICS will return the
1053 * interrupt causes without clearing, which later be done
1054 * with the write to EICR.
1056 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
1057 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
1059 if (eicr
& IXGBE_EICR_LSC
)
1060 ixgbe_check_lsc(adapter
);
1062 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1063 ixgbe_check_fan_failure(adapter
, eicr
);
1065 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
1066 ixgbe_check_sfp_event(adapter
, eicr
);
1067 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1068 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
1073 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
1075 struct ixgbe_q_vector
*q_vector
= data
;
1076 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1077 struct ixgbe_ring
*tx_ring
;
1080 if (!q_vector
->txr_count
)
1083 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1084 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1085 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1086 #ifdef CONFIG_IXGBE_DCA
1087 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1088 ixgbe_update_tx_dca(adapter
, tx_ring
);
1090 tx_ring
->total_bytes
= 0;
1091 tx_ring
->total_packets
= 0;
1092 ixgbe_clean_tx_irq(adapter
, tx_ring
);
1093 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1101 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1103 * @data: pointer to our q_vector struct for this interrupt vector
1105 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
1107 struct ixgbe_q_vector
*q_vector
= data
;
1108 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1109 struct ixgbe_ring
*rx_ring
;
1113 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1114 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1115 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1116 rx_ring
->total_bytes
= 0;
1117 rx_ring
->total_packets
= 0;
1118 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1122 if (!q_vector
->rxr_count
)
1125 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1126 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1127 /* disable interrupts on this vector only */
1128 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
1129 napi_schedule(&q_vector
->napi
);
1134 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1136 ixgbe_msix_clean_rx(irq
, data
);
1137 ixgbe_msix_clean_tx(irq
, data
);
1143 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1144 * @napi: napi struct with our devices info in it
1145 * @budget: amount of work driver is allowed to do this pass, in packets
1147 * This function is optimized for cleaning one queue only on a single
1150 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1152 struct ixgbe_q_vector
*q_vector
=
1153 container_of(napi
, struct ixgbe_q_vector
, napi
);
1154 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1155 struct ixgbe_ring
*rx_ring
= NULL
;
1159 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1160 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1161 #ifdef CONFIG_IXGBE_DCA
1162 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1163 ixgbe_update_rx_dca(adapter
, rx_ring
);
1166 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1168 /* If all Rx work done, exit the polling mode */
1169 if (work_done
< budget
) {
1170 napi_complete(napi
);
1171 if (adapter
->itr_setting
& 1)
1172 ixgbe_set_itr_msix(q_vector
);
1173 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1174 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
1181 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1182 * @napi: napi struct with our devices info in it
1183 * @budget: amount of work driver is allowed to do this pass, in packets
1185 * This function will clean more than one rx queue associated with a
1188 static int ixgbe_clean_rxonly_many(struct napi_struct
*napi
, int budget
)
1190 struct ixgbe_q_vector
*q_vector
=
1191 container_of(napi
, struct ixgbe_q_vector
, napi
);
1192 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1193 struct ixgbe_ring
*rx_ring
= NULL
;
1194 int work_done
= 0, i
;
1196 u16 enable_mask
= 0;
1198 /* attempt to distribute budget to each queue fairly, but don't allow
1199 * the budget to go below 1 because we'll exit polling */
1200 budget
/= (q_vector
->rxr_count
?: 1);
1201 budget
= max(budget
, 1);
1202 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1203 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1204 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1205 #ifdef CONFIG_IXGBE_DCA
1206 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1207 ixgbe_update_rx_dca(adapter
, rx_ring
);
1209 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1210 enable_mask
|= rx_ring
->v_idx
;
1211 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1215 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1216 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1217 /* If all Rx work done, exit the polling mode */
1218 if (work_done
< budget
) {
1219 napi_complete(napi
);
1220 if (adapter
->itr_setting
& 1)
1221 ixgbe_set_itr_msix(q_vector
);
1222 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1223 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, enable_mask
);
1229 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1232 a
->q_vector
[v_idx
].adapter
= a
;
1233 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
1234 a
->q_vector
[v_idx
].rxr_count
++;
1235 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1238 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1241 a
->q_vector
[v_idx
].adapter
= a
;
1242 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1243 a
->q_vector
[v_idx
].txr_count
++;
1244 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1248 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1249 * @adapter: board private structure to initialize
1250 * @vectors: allotted vector count for descriptor rings
1252 * This function maps descriptor rings to the queue-specific vectors
1253 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1254 * one vector per ring/queue, but on a constrained vector budget, we
1255 * group the rings as "efficiently" as possible. You would add new
1256 * mapping configurations in here.
1258 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1262 int rxr_idx
= 0, txr_idx
= 0;
1263 int rxr_remaining
= adapter
->num_rx_queues
;
1264 int txr_remaining
= adapter
->num_tx_queues
;
1269 /* No mapping required if MSI-X is disabled. */
1270 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1274 * The ideal configuration...
1275 * We have enough vectors to map one per queue.
1277 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1278 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1279 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1281 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1282 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1288 * If we don't have enough vectors for a 1-to-1
1289 * mapping, we'll have to group them so there are
1290 * multiple queues per vector.
1292 /* Re-adjusting *qpv takes care of the remainder. */
1293 for (i
= v_start
; i
< vectors
; i
++) {
1294 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1295 for (j
= 0; j
< rqpv
; j
++) {
1296 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1301 for (i
= v_start
; i
< vectors
; i
++) {
1302 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1303 for (j
= 0; j
< tqpv
; j
++) {
1304 map_vector_to_txq(adapter
, i
, txr_idx
);
1315 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1316 * @adapter: board private structure
1318 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1319 * interrupts from the kernel.
1321 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1323 struct net_device
*netdev
= adapter
->netdev
;
1324 irqreturn_t (*handler
)(int, void *);
1325 int i
, vector
, q_vectors
, err
;
1328 /* Decrement for Other and TCP Timer vectors */
1329 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1331 /* Map the Tx/Rx rings to the vectors we were allotted. */
1332 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1336 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1337 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1338 &ixgbe_msix_clean_many)
1339 for (vector
= 0; vector
< q_vectors
; vector
++) {
1340 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1342 if(handler
== &ixgbe_msix_clean_rx
) {
1343 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1344 netdev
->name
, "rx", ri
++);
1346 else if(handler
== &ixgbe_msix_clean_tx
) {
1347 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1348 netdev
->name
, "tx", ti
++);
1351 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1352 netdev
->name
, "TxRx", vector
);
1354 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1355 handler
, 0, adapter
->name
[vector
],
1356 &(adapter
->q_vector
[vector
]));
1359 "request_irq failed for MSIX interrupt "
1360 "Error: %d\n", err
);
1361 goto free_queue_irqs
;
1365 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1366 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1367 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1370 "request_irq for msix_lsc failed: %d\n", err
);
1371 goto free_queue_irqs
;
1377 for (i
= vector
- 1; i
>= 0; i
--)
1378 free_irq(adapter
->msix_entries
[--vector
].vector
,
1379 &(adapter
->q_vector
[i
]));
1380 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1381 pci_disable_msix(adapter
->pdev
);
1382 kfree(adapter
->msix_entries
);
1383 adapter
->msix_entries
= NULL
;
1388 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1390 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1392 u32 new_itr
= q_vector
->eitr
;
1393 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1394 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1396 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1398 tx_ring
->total_packets
,
1399 tx_ring
->total_bytes
);
1400 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1402 rx_ring
->total_packets
,
1403 rx_ring
->total_bytes
);
1405 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1407 switch (current_itr
) {
1408 /* counts and packets in update_itr are dependent on these numbers */
1409 case lowest_latency
:
1413 new_itr
= 20000; /* aka hwitr = ~200 */
1422 if (new_itr
!= q_vector
->eitr
) {
1425 /* save the algorithm value here, not the smoothed one */
1426 q_vector
->eitr
= new_itr
;
1427 /* do an exponential smoothing */
1428 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1429 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1430 ixgbe_write_eitr(adapter
, 0, itr_reg
);
1437 * ixgbe_irq_enable - Enable default interrupt generation settings
1438 * @adapter: board private structure
1440 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1443 mask
= IXGBE_EIMS_ENABLE_MASK
;
1444 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
1445 mask
|= IXGBE_EIMS_GPI_SDP1
;
1446 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1447 mask
|= IXGBE_EIMS_ECC
;
1448 mask
|= IXGBE_EIMS_GPI_SDP1
;
1449 mask
|= IXGBE_EIMS_GPI_SDP2
;
1452 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1453 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1454 /* enable the rest of the queue vectors */
1455 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1),
1456 (IXGBE_EIMS_RTX_QUEUE
<< 16));
1457 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(2),
1458 ((IXGBE_EIMS_RTX_QUEUE
<< 16) |
1459 IXGBE_EIMS_RTX_QUEUE
));
1461 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1465 * ixgbe_intr - legacy mode Interrupt Handler
1466 * @irq: interrupt number
1467 * @data: pointer to a network interface device structure
1469 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1471 struct net_device
*netdev
= data
;
1472 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1473 struct ixgbe_hw
*hw
= &adapter
->hw
;
1477 * Workaround for silicon errata. Mask the interrupts
1478 * before the read of EICR.
1480 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
1482 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1483 * therefore no explict interrupt disable is necessary */
1484 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1486 /* shared interrupt alert!
1487 * make sure interrupts are enabled because the read will
1488 * have disabled interrupts due to EIAM */
1489 ixgbe_irq_enable(adapter
);
1490 return IRQ_NONE
; /* Not our interrupt */
1493 if (eicr
& IXGBE_EICR_LSC
)
1494 ixgbe_check_lsc(adapter
);
1496 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
1497 ixgbe_check_sfp_event(adapter
, eicr
);
1499 ixgbe_check_fan_failure(adapter
, eicr
);
1501 if (napi_schedule_prep(&adapter
->q_vector
[0].napi
)) {
1502 adapter
->tx_ring
[0].total_packets
= 0;
1503 adapter
->tx_ring
[0].total_bytes
= 0;
1504 adapter
->rx_ring
[0].total_packets
= 0;
1505 adapter
->rx_ring
[0].total_bytes
= 0;
1506 /* would disable interrupts here but EIAM disabled it */
1507 __napi_schedule(&adapter
->q_vector
[0].napi
);
1513 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1515 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1517 for (i
= 0; i
< q_vectors
; i
++) {
1518 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1519 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1520 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1521 q_vector
->rxr_count
= 0;
1522 q_vector
->txr_count
= 0;
1527 * ixgbe_request_irq - initialize interrupts
1528 * @adapter: board private structure
1530 * Attempts to configure interrupts using the best available
1531 * capabilities of the hardware and kernel.
1533 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1535 struct net_device
*netdev
= adapter
->netdev
;
1538 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1539 err
= ixgbe_request_msix_irqs(adapter
);
1540 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1541 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1542 netdev
->name
, netdev
);
1544 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1545 netdev
->name
, netdev
);
1549 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1554 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1556 struct net_device
*netdev
= adapter
->netdev
;
1558 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1561 q_vectors
= adapter
->num_msix_vectors
;
1564 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1567 for (; i
>= 0; i
--) {
1568 free_irq(adapter
->msix_entries
[i
].vector
,
1569 &(adapter
->q_vector
[i
]));
1572 ixgbe_reset_q_vectors(adapter
);
1574 free_irq(adapter
->pdev
->irq
, netdev
);
1579 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1580 * @adapter: board private structure
1582 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1584 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1585 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1586 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
1587 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(2), ~0);
1589 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1590 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1592 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1593 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1595 synchronize_irq(adapter
->pdev
->irq
);
1599 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
)
1601 u32 mask
= IXGBE_EIMS_RTX_QUEUE
;
1602 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1603 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1604 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1), mask
<< 16);
1605 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(2),
1606 (mask
<< 16 | mask
));
1608 /* skip the flush */
1612 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1615 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1617 struct ixgbe_hw
*hw
= &adapter
->hw
;
1619 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1620 EITR_INTS_PER_SEC_TO_REG(adapter
->eitr_param
));
1622 ixgbe_set_ivar(adapter
, 0, 0, 0);
1623 ixgbe_set_ivar(adapter
, 1, 0, 0);
1625 map_vector_to_rxq(adapter
, 0, 0);
1626 map_vector_to_txq(adapter
, 0, 0);
1628 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1632 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1633 * @adapter: board private structure
1635 * Configure the Tx unit of the MAC after a reset.
1637 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1640 struct ixgbe_hw
*hw
= &adapter
->hw
;
1641 u32 i
, j
, tdlen
, txctrl
;
1643 /* Setup the HW Tx Head and Tail descriptor pointers */
1644 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1645 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1648 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1649 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1650 (tdba
& DMA_32BIT_MASK
));
1651 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1652 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1653 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1654 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1655 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1656 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1657 /* Disable Tx Head Writeback RO bit, since this hoses
1658 * bookkeeping if things aren't delivered in order.
1660 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1661 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1662 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1664 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1665 /* We enable 8 traffic classes, DCB only */
1666 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
1667 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, (IXGBE_MTQC_RT_ENA
|
1668 IXGBE_MTQC_8TC_8TQ
));
1672 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1674 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1676 struct ixgbe_ring
*rx_ring
;
1681 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1684 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1685 queue0
= index
& mask
;
1686 index
= index
& mask
;
1689 rx_ring
= &adapter
->rx_ring
[queue0
];
1691 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1693 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1694 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1696 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1697 u16 bufsz
= IXGBE_RXBUFFER_2048
;
1698 /* grow the amount we can receive on large page machines */
1699 if (bufsz
< (PAGE_SIZE
/ 2))
1700 bufsz
= (PAGE_SIZE
/ 2);
1701 /* cap the bufsz at our largest descriptor size */
1702 bufsz
= min((u16
)IXGBE_MAX_RXBUFFER
, bufsz
);
1704 srrctl
|= bufsz
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1705 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1706 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1707 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1708 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1710 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1712 if (rx_ring
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1713 srrctl
|= IXGBE_RXBUFFER_2048
>>
1714 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1716 srrctl
|= rx_ring
->rx_buf_len
>>
1717 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1720 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1724 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1725 * @adapter: board private structure
1727 * Configure the Rx unit of the MAC after a reset.
1729 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1732 struct ixgbe_hw
*hw
= &adapter
->hw
;
1733 struct net_device
*netdev
= adapter
->netdev
;
1734 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1736 u32 rdlen
, rxctrl
, rxcsum
;
1737 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1738 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1739 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1741 u32 reta
= 0, mrqc
= 0;
1745 /* Decide whether to use packet split mode or not */
1746 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1748 /* Set the RX buffer length according to the mode */
1749 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1750 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1751 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1752 /* PSRTYPE must be initialized in 82599 */
1753 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
1754 IXGBE_PSRTYPE_UDPHDR
|
1755 IXGBE_PSRTYPE_IPV4HDR
|
1756 IXGBE_PSRTYPE_IPV6HDR
;
1757 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(0), psrtype
);
1760 if (netdev
->mtu
<= ETH_DATA_LEN
)
1761 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1763 rx_buf_len
= ALIGN(max_frame
, 1024);
1766 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1767 fctrl
|= IXGBE_FCTRL_BAM
;
1768 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1769 fctrl
|= IXGBE_FCTRL_PMCF
;
1770 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1772 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1773 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1774 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1776 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1777 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1779 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1780 /* disable receives while setting up the descriptors */
1781 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1782 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1784 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1785 * the Base and Length of the Rx Descriptor Ring */
1786 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1787 rdba
= adapter
->rx_ring
[i
].dma
;
1788 j
= adapter
->rx_ring
[i
].reg_idx
;
1789 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_32BIT_MASK
));
1790 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
1791 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
1792 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
1793 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
1794 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
1795 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
1796 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
1798 ixgbe_configure_srrctl(adapter
, j
);
1801 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
1803 * For VMDq support of different descriptor types or
1804 * buffer sizes through the use of multiple SRRCTL
1805 * registers, RDRXCTL.MVMEN must be set to 1
1807 * also, the manual doesn't mention it clearly but DCA hints
1808 * will only use queue 0's tags unless this bit is set. Side
1809 * effects of setting this bit are only that SRRCTL must be
1810 * fully programmed [0..15]
1812 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1813 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
1814 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1817 /* Program MRQC for the distribution of queues */
1818 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1819 int mask
= adapter
->flags
& (
1820 IXGBE_FLAG_RSS_ENABLED
1821 | IXGBE_FLAG_DCB_ENABLED
1825 case (IXGBE_FLAG_RSS_ENABLED
):
1826 mrqc
= IXGBE_MRQC_RSSEN
;
1828 case (IXGBE_FLAG_DCB_ENABLED
):
1829 mrqc
= IXGBE_MRQC_RT8TCEN
;
1835 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1836 /* Fill out redirection table */
1837 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1838 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1840 /* reta = 4-byte sliding window of
1841 * 0x00..(indices-1)(indices-1)00..etc. */
1842 reta
= (reta
<< 8) | (j
* 0x11);
1844 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1847 /* Fill out hash function seeds */
1848 for (i
= 0; i
< 10; i
++)
1849 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
1851 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1852 mrqc
|= IXGBE_MRQC_RSSEN
;
1853 /* Perform hash on these packet types */
1854 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
1855 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1856 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1857 | IXGBE_MRQC_RSS_FIELD_IPV6
1858 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1859 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
1861 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1863 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1865 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1866 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1867 /* Disable indicating checksum in descriptor, enables
1869 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1871 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1872 /* Enable IPv4 payload checksum for UDP fragments
1873 * if PCSD is not set */
1874 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1877 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1879 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1880 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1881 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
1882 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1886 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1888 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1889 struct ixgbe_hw
*hw
= &adapter
->hw
;
1891 /* add VID to filter table */
1892 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
1895 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1897 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1898 struct ixgbe_hw
*hw
= &adapter
->hw
;
1900 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1901 ixgbe_irq_disable(adapter
);
1903 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1905 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1906 ixgbe_irq_enable(adapter
);
1908 /* remove VID from filter table */
1909 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
1912 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1913 struct vlan_group
*grp
)
1915 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1919 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1920 ixgbe_irq_disable(adapter
);
1921 adapter
->vlgrp
= grp
;
1924 * For a DCB driver, always enable VLAN tag stripping so we can
1925 * still receive traffic from a DCB-enabled host even if we're
1928 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1929 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1930 ctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
1931 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1932 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1933 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1934 ctrl
|= IXGBE_VLNCTRL_VFE
;
1935 /* enable VLAN tag insert/strip */
1936 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1937 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1938 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1939 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1940 j
= adapter
->rx_ring
[i
].reg_idx
;
1941 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RXDCTL(j
));
1942 ctrl
|= IXGBE_RXDCTL_VME
;
1943 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXDCTL(j
), ctrl
);
1946 ixgbe_vlan_rx_add_vid(netdev
, 0);
1948 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1949 ixgbe_irq_enable(adapter
);
1952 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1954 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1956 if (adapter
->vlgrp
) {
1958 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1959 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1961 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1966 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1968 struct dev_mc_list
*mc_ptr
;
1969 u8
*addr
= *mc_addr_ptr
;
1972 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1974 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1976 *mc_addr_ptr
= NULL
;
1982 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1983 * @netdev: network interface device structure
1985 * The set_rx_method entry point is called whenever the unicast/multicast
1986 * address list or the network interface flags are updated. This routine is
1987 * responsible for configuring the hardware for proper unicast, multicast and
1990 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1992 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1993 struct ixgbe_hw
*hw
= &adapter
->hw
;
1995 u8
*addr_list
= NULL
;
1998 /* Check for Promiscuous and All Multicast modes */
2000 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
2001 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2003 if (netdev
->flags
& IFF_PROMISC
) {
2004 hw
->addr_ctrl
.user_set_promisc
= 1;
2005 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2006 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
2008 if (netdev
->flags
& IFF_ALLMULTI
) {
2009 fctrl
|= IXGBE_FCTRL_MPE
;
2010 fctrl
&= ~IXGBE_FCTRL_UPE
;
2012 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2014 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2015 hw
->addr_ctrl
.user_set_promisc
= 0;
2018 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
2019 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2021 /* reprogram secondary unicast list */
2022 addr_count
= netdev
->uc_count
;
2024 addr_list
= netdev
->uc_list
->dmi_addr
;
2025 hw
->mac
.ops
.update_uc_addr_list(hw
, addr_list
, addr_count
,
2026 ixgbe_addr_list_itr
);
2028 /* reprogram multicast list */
2029 addr_count
= netdev
->mc_count
;
2031 addr_list
= netdev
->mc_list
->dmi_addr
;
2032 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
2033 ixgbe_addr_list_itr
);
2036 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
2039 struct ixgbe_q_vector
*q_vector
;
2040 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2042 /* legacy and MSI only use one vector */
2043 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2046 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2047 struct napi_struct
*napi
;
2048 q_vector
= &adapter
->q_vector
[q_idx
];
2049 if (!q_vector
->rxr_count
)
2051 napi
= &q_vector
->napi
;
2052 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) &&
2053 (q_vector
->rxr_count
> 1))
2054 napi
->poll
= &ixgbe_clean_rxonly_many
;
2060 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
2063 struct ixgbe_q_vector
*q_vector
;
2064 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2066 /* legacy and MSI only use one vector */
2067 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2070 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2071 q_vector
= &adapter
->q_vector
[q_idx
];
2072 if (!q_vector
->rxr_count
)
2074 napi_disable(&q_vector
->napi
);
2078 #ifdef CONFIG_IXGBE_DCB
2080 * ixgbe_configure_dcb - Configure DCB hardware
2081 * @adapter: ixgbe adapter struct
2083 * This is called by the driver on open to configure the DCB hardware.
2084 * This is also called by the gennetlink interface when reconfiguring
2087 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
2089 struct ixgbe_hw
*hw
= &adapter
->hw
;
2090 u32 txdctl
, vlnctrl
;
2093 ixgbe_dcb_check_config(&adapter
->dcb_cfg
);
2094 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_TX_CONFIG
);
2095 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_RX_CONFIG
);
2097 /* reconfigure the hardware */
2098 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
2100 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2101 j
= adapter
->tx_ring
[i
].reg_idx
;
2102 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2103 /* PThresh workaround for Tx hang with DFP enabled. */
2105 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2107 /* Enable VLAN tag insert/strip */
2108 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2109 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2110 vlnctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
2111 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2112 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2113 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2114 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2115 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2116 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2117 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2118 j
= adapter
->rx_ring
[i
].reg_idx
;
2119 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2120 vlnctrl
|= IXGBE_RXDCTL_VME
;
2121 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
2124 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
2128 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
2130 struct net_device
*netdev
= adapter
->netdev
;
2133 ixgbe_set_rx_mode(netdev
);
2135 ixgbe_restore_vlan(adapter
);
2136 #ifdef CONFIG_IXGBE_DCB
2137 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2138 netif_set_gso_max_size(netdev
, 32768);
2139 ixgbe_configure_dcb(adapter
);
2141 netif_set_gso_max_size(netdev
, 65536);
2144 netif_set_gso_max_size(netdev
, 65536);
2147 ixgbe_configure_tx(adapter
);
2148 ixgbe_configure_rx(adapter
);
2149 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2150 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
2151 (adapter
->rx_ring
[i
].count
- 1));
2154 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2156 switch (hw
->phy
.type
) {
2157 case ixgbe_phy_sfp_avago
:
2158 case ixgbe_phy_sfp_ftl
:
2159 case ixgbe_phy_sfp_intel
:
2160 case ixgbe_phy_sfp_unknown
:
2161 case ixgbe_phy_tw_tyco
:
2162 case ixgbe_phy_tw_unknown
:
2170 * ixgbe_sfp_link_config - set up SFP+ link
2171 * @adapter: pointer to private adapter struct
2173 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
2175 struct ixgbe_hw
*hw
= &adapter
->hw
;
2177 if (hw
->phy
.multispeed_fiber
) {
2179 * In multispeed fiber setups, the device may not have
2180 * had a physical connection when the driver loaded.
2181 * If that's the case, the initial link configuration
2182 * couldn't get the MAC into 10G or 1G mode, so we'll
2183 * never have a link status change interrupt fire.
2184 * We need to try and force an autonegotiation
2185 * session, then bring up link.
2187 hw
->mac
.ops
.setup_sfp(hw
);
2188 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
2189 schedule_work(&adapter
->multispeed_fiber_task
);
2192 * Direct Attach Cu and non-multispeed fiber modules
2193 * still need to be configured properly prior to
2196 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_MOD_TASK
))
2197 schedule_work(&adapter
->sfp_config_module_task
);
2202 * ixgbe_non_sfp_link_config - set up non-SFP+ link
2203 * @hw: pointer to private hardware struct
2205 * Returns 0 on success, negative on failure
2207 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
2210 bool link_up
= false;
2211 u32 ret
= IXGBE_ERR_LINK_SETUP
;
2213 if (hw
->mac
.ops
.check_link
)
2214 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2219 if (hw
->mac
.ops
.get_link_capabilities
)
2220 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
2225 if (hw
->mac
.ops
.setup_link_speed
)
2226 ret
= hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, link_up
);
2231 #define IXGBE_MAX_RX_DESC_POLL 10
2232 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2235 int j
= adapter
->rx_ring
[rxr
].reg_idx
;
2238 for (k
= 0; k
< IXGBE_MAX_RX_DESC_POLL
; k
++) {
2239 if (IXGBE_READ_REG(&adapter
->hw
,
2240 IXGBE_RXDCTL(j
)) & IXGBE_RXDCTL_ENABLE
)
2245 if (k
>= IXGBE_MAX_RX_DESC_POLL
) {
2246 DPRINTK(DRV
, ERR
, "RXDCTL.ENABLE on Rx queue %d "
2247 "not set within the polling period\n", rxr
);
2249 ixgbe_release_rx_desc(&adapter
->hw
, &adapter
->rx_ring
[rxr
],
2250 (adapter
->rx_ring
[rxr
].count
- 1));
2253 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
2255 struct net_device
*netdev
= adapter
->netdev
;
2256 struct ixgbe_hw
*hw
= &adapter
->hw
;
2258 int num_rx_rings
= adapter
->num_rx_queues
;
2260 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2261 u32 txdctl
, rxdctl
, mhadd
;
2265 ixgbe_get_hw_control(adapter
);
2267 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
2268 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
2269 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2270 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
2271 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
2276 /* XXX: to interrupt immediately for EICS writes, enable this */
2277 /* gpie |= IXGBE_GPIE_EIMEN; */
2278 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2281 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2282 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2283 * specifically only auto mask tx and rx interrupts */
2284 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
2287 /* Enable fan failure interrupt if media type is copper */
2288 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
2289 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2290 gpie
|= IXGBE_SDP1_GPIEN
;
2291 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2294 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2295 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2296 gpie
|= IXGBE_SDP1_GPIEN
;
2297 gpie
|= IXGBE_SDP2_GPIEN
;
2298 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2301 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
2302 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
2303 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
2304 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
2306 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
2309 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2310 j
= adapter
->tx_ring
[i
].reg_idx
;
2311 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2312 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2313 txdctl
|= (8 << 16);
2314 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2317 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2318 /* DMATXCTL.EN must be set after all Tx queue config is done */
2319 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2320 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2321 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2323 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2324 j
= adapter
->tx_ring
[i
].reg_idx
;
2325 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2326 txdctl
|= IXGBE_TXDCTL_ENABLE
;
2327 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2330 for (i
= 0; i
< num_rx_rings
; i
++) {
2331 j
= adapter
->rx_ring
[i
].reg_idx
;
2332 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2333 /* enable PTHRESH=32 descriptors (half the internal cache)
2334 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2335 * this also removes a pesky rx_no_buffer_count increment */
2337 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
2338 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
2339 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2340 ixgbe_rx_desc_queue_enable(adapter
, i
);
2342 /* enable all receives */
2343 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2344 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2345 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
2347 rxdctl
|= IXGBE_RXCTRL_RXEN
;
2348 hw
->mac
.ops
.enable_rx_dma(hw
, rxdctl
);
2350 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2351 ixgbe_configure_msix(adapter
);
2353 ixgbe_configure_msi_and_legacy(adapter
);
2355 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
2356 ixgbe_napi_enable_all(adapter
);
2358 /* clear any pending interrupts, may auto mask */
2359 IXGBE_READ_REG(hw
, IXGBE_EICR
);
2361 ixgbe_irq_enable(adapter
);
2364 * For hot-pluggable SFP+ devices, a new SFP+ module may have
2365 * arrived before interrupts were enabled. We need to kick off
2366 * the SFP+ module setup first, then try to bring up link.
2367 * If we're not hot-pluggable SFP+, we just need to configure link
2370 err
= hw
->phy
.ops
.identify(hw
);
2371 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
2372 DPRINTK(PROBE
, ERR
, "PHY not supported on this NIC %d\n", err
);
2373 ixgbe_down(adapter
);
2377 if (ixgbe_is_sfp(hw
)) {
2378 ixgbe_sfp_link_config(adapter
);
2380 err
= ixgbe_non_sfp_link_config(hw
);
2382 DPRINTK(PROBE
, ERR
, "link_config FAILED %d\n", err
);
2385 /* enable transmits */
2386 netif_tx_start_all_queues(netdev
);
2388 /* bring the link up in the watchdog, this could race with our first
2389 * link up interrupt but shouldn't be a problem */
2390 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2391 adapter
->link_check_timeout
= jiffies
;
2392 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2396 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2398 WARN_ON(in_interrupt());
2399 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2401 ixgbe_down(adapter
);
2403 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2406 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2408 /* hardware has been reset, we need to reload some things */
2409 ixgbe_configure(adapter
);
2411 ixgbe_napi_add_all(adapter
);
2413 return ixgbe_up_complete(adapter
);
2416 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2418 struct ixgbe_hw
*hw
= &adapter
->hw
;
2419 if (hw
->mac
.ops
.init_hw(hw
))
2420 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
2422 /* reprogram the RAR[0] in case user changed it. */
2423 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2428 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2429 * @adapter: board private structure
2430 * @rx_ring: ring to free buffers from
2432 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2433 struct ixgbe_ring
*rx_ring
)
2435 struct pci_dev
*pdev
= adapter
->pdev
;
2439 /* Free all the Rx ring sk_buffs */
2441 for (i
= 0; i
< rx_ring
->count
; i
++) {
2442 struct ixgbe_rx_buffer
*rx_buffer_info
;
2444 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2445 if (rx_buffer_info
->dma
) {
2446 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2447 rx_ring
->rx_buf_len
,
2448 PCI_DMA_FROMDEVICE
);
2449 rx_buffer_info
->dma
= 0;
2451 if (rx_buffer_info
->skb
) {
2452 dev_kfree_skb(rx_buffer_info
->skb
);
2453 rx_buffer_info
->skb
= NULL
;
2455 if (!rx_buffer_info
->page
)
2457 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
/ 2,
2458 PCI_DMA_FROMDEVICE
);
2459 rx_buffer_info
->page_dma
= 0;
2460 put_page(rx_buffer_info
->page
);
2461 rx_buffer_info
->page
= NULL
;
2462 rx_buffer_info
->page_offset
= 0;
2465 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2466 memset(rx_ring
->rx_buffer_info
, 0, size
);
2468 /* Zero out the descriptor ring */
2469 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2471 rx_ring
->next_to_clean
= 0;
2472 rx_ring
->next_to_use
= 0;
2475 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2477 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2481 * ixgbe_clean_tx_ring - Free Tx Buffers
2482 * @adapter: board private structure
2483 * @tx_ring: ring to be cleaned
2485 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2486 struct ixgbe_ring
*tx_ring
)
2488 struct ixgbe_tx_buffer
*tx_buffer_info
;
2492 /* Free all the Tx ring sk_buffs */
2494 for (i
= 0; i
< tx_ring
->count
; i
++) {
2495 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2496 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2499 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2500 memset(tx_ring
->tx_buffer_info
, 0, size
);
2502 /* Zero out the descriptor ring */
2503 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2505 tx_ring
->next_to_use
= 0;
2506 tx_ring
->next_to_clean
= 0;
2509 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2511 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2515 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2516 * @adapter: board private structure
2518 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2522 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2523 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2527 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2528 * @adapter: board private structure
2530 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2534 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2535 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2538 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2540 struct net_device
*netdev
= adapter
->netdev
;
2541 struct ixgbe_hw
*hw
= &adapter
->hw
;
2546 /* signal that we are down to the interrupt handler */
2547 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2549 /* disable receives */
2550 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2551 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2553 netif_tx_disable(netdev
);
2555 IXGBE_WRITE_FLUSH(hw
);
2558 netif_tx_stop_all_queues(netdev
);
2560 ixgbe_irq_disable(adapter
);
2562 ixgbe_napi_disable_all(adapter
);
2564 del_timer_sync(&adapter
->watchdog_timer
);
2565 cancel_work_sync(&adapter
->watchdog_task
);
2567 /* disable transmits in the hardware now that interrupts are off */
2568 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2569 j
= adapter
->tx_ring
[i
].reg_idx
;
2570 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2571 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
2572 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
2574 /* Disable the Tx DMA engine on 82599 */
2575 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2576 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
2577 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
2578 ~IXGBE_DMATXCTL_TE
));
2580 netif_carrier_off(netdev
);
2582 #ifdef CONFIG_IXGBE_DCA
2583 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2584 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
2585 dca_remove_requester(&adapter
->pdev
->dev
);
2589 if (!pci_channel_offline(adapter
->pdev
))
2590 ixgbe_reset(adapter
);
2591 ixgbe_clean_all_tx_rings(adapter
);
2592 ixgbe_clean_all_rx_rings(adapter
);
2594 #ifdef CONFIG_IXGBE_DCA
2595 /* since we reset the hardware DCA settings were cleared */
2596 if (dca_add_requester(&adapter
->pdev
->dev
) == 0) {
2597 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
2598 /* always use CB2 mode, difference is masked
2599 * in the CB driver */
2600 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
2601 ixgbe_setup_dca(adapter
);
2607 * ixgbe_poll - NAPI Rx polling callback
2608 * @napi: structure for representing this polling device
2609 * @budget: how many packets driver is allowed to clean
2611 * This function is used for legacy and MSI, NAPI mode
2613 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2615 struct ixgbe_q_vector
*q_vector
=
2616 container_of(napi
, struct ixgbe_q_vector
, napi
);
2617 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2618 int tx_clean_complete
, work_done
= 0;
2620 #ifdef CONFIG_IXGBE_DCA
2621 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2622 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2623 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2627 tx_clean_complete
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2628 ixgbe_clean_rx_irq(q_vector
, adapter
->rx_ring
, &work_done
, budget
);
2630 if (!tx_clean_complete
)
2633 /* If budget not fully consumed, exit the polling mode */
2634 if (work_done
< budget
) {
2635 napi_complete(napi
);
2636 if (adapter
->itr_setting
& 1)
2637 ixgbe_set_itr(adapter
);
2638 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2639 ixgbe_irq_enable_queues(adapter
);
2645 * ixgbe_tx_timeout - Respond to a Tx Hang
2646 * @netdev: network interface device structure
2648 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2650 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2652 /* Do the reset outside of interrupt context */
2653 schedule_work(&adapter
->reset_task
);
2656 static void ixgbe_reset_task(struct work_struct
*work
)
2658 struct ixgbe_adapter
*adapter
;
2659 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2661 /* If we're already down or resetting, just bail */
2662 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
2663 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
2666 adapter
->tx_timeout_count
++;
2668 ixgbe_reinit_locked(adapter
);
2671 #ifdef CONFIG_IXGBE_DCB
2672 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter
*adapter
)
2676 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2677 adapter
->ring_feature
[RING_F_DCB
].mask
= 0x7 << 3;
2678 adapter
->num_rx_queues
=
2679 adapter
->ring_feature
[RING_F_DCB
].indices
;
2680 adapter
->num_tx_queues
=
2681 adapter
->ring_feature
[RING_F_DCB
].indices
;
2692 * ixgbe_set_rss_queues: Allocate queues for RSS
2693 * @adapter: board private structure to initialize
2695 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
2696 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
2699 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter
*adapter
)
2703 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
2704 adapter
->ring_feature
[RING_F_RSS
].mask
= 0xF;
2705 adapter
->num_rx_queues
=
2706 adapter
->ring_feature
[RING_F_RSS
].indices
;
2707 adapter
->num_tx_queues
=
2708 adapter
->ring_feature
[RING_F_RSS
].indices
;
2718 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
2719 * @adapter: board private structure to initialize
2721 * This is the top level queue allocation routine. The order here is very
2722 * important, starting with the "most" number of features turned on at once,
2723 * and ending with the smallest set of features. This way large combinations
2724 * can be allocated if they're turned on, and smaller combinations are the
2725 * fallthrough conditions.
2728 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2730 /* Start with base case */
2731 adapter
->num_rx_queues
= 1;
2732 adapter
->num_tx_queues
= 1;
2734 #ifdef CONFIG_IXGBE_DCB
2735 if (ixgbe_set_dcb_queues(adapter
))
2739 if (ixgbe_set_rss_queues(adapter
))
2743 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2746 int err
, vector_threshold
;
2748 /* We'll want at least 3 (vector_threshold):
2751 * 3) Other (Link Status Change, etc.)
2752 * 4) TCP Timer (optional)
2754 vector_threshold
= MIN_MSIX_COUNT
;
2756 /* The more we get, the more we will assign to Tx/Rx Cleanup
2757 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2758 * Right now, we simply care about how many we'll get; we'll
2759 * set them up later while requesting irq's.
2761 while (vectors
>= vector_threshold
) {
2762 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2764 if (!err
) /* Success in acquiring all requested vectors. */
2767 vectors
= 0; /* Nasty failure, quit now */
2768 else /* err == number of vectors we should try again with */
2772 if (vectors
< vector_threshold
) {
2773 /* Can't allocate enough MSI-X interrupts? Oh well.
2774 * This just means we'll go with either a single MSI
2775 * vector or fall back to legacy interrupts.
2777 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2778 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2779 kfree(adapter
->msix_entries
);
2780 adapter
->msix_entries
= NULL
;
2781 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
2782 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2783 ixgbe_set_num_queues(adapter
);
2785 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2787 * Adjust for only the vectors we'll use, which is minimum
2788 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2789 * vectors we were allocated.
2791 adapter
->num_msix_vectors
= min(vectors
,
2792 adapter
->max_msix_q_vectors
+ NON_Q_VECTORS
);
2797 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
2798 * @adapter: board private structure to initialize
2800 * Cache the descriptor ring offsets for RSS to the assigned rings.
2803 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter
*adapter
)
2808 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
2809 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2810 adapter
->rx_ring
[i
].reg_idx
= i
;
2811 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2812 adapter
->tx_ring
[i
].reg_idx
= i
;
2821 #ifdef CONFIG_IXGBE_DCB
2823 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
2824 * @adapter: board private structure to initialize
2826 * Cache the descriptor ring offsets for DCB to the assigned rings.
2829 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter
*adapter
)
2833 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
2835 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2836 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2837 /* the number of queues is assumed to be symmetric */
2838 for (i
= 0; i
< dcb_i
; i
++) {
2839 adapter
->rx_ring
[i
].reg_idx
= i
<< 3;
2840 adapter
->tx_ring
[i
].reg_idx
= i
<< 2;
2843 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
2844 for (i
= 0; i
< dcb_i
; i
++) {
2845 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
2846 adapter
->tx_ring
[i
].reg_idx
= i
<< 4;
2861 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2862 * @adapter: board private structure to initialize
2864 * Once we know the feature-set enabled for the device, we'll cache
2865 * the register offset the descriptor ring is assigned to.
2867 * Note, the order the various feature calls is important. It must start with
2868 * the "most" features enabled at the same time, then trickle down to the
2869 * least amount of features turned on at once.
2871 static void ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2873 /* start with default case */
2874 adapter
->rx_ring
[0].reg_idx
= 0;
2875 adapter
->tx_ring
[0].reg_idx
= 0;
2877 #ifdef CONFIG_IXGBE_DCB
2878 if (ixgbe_cache_ring_dcb(adapter
))
2882 if (ixgbe_cache_ring_rss(adapter
))
2887 * ixgbe_alloc_queues - Allocate memory for all rings
2888 * @adapter: board private structure to initialize
2890 * We allocate one ring per queue at run-time since we don't know the
2891 * number of queues at compile-time. The polling_netdev array is
2892 * intended for Multiqueue, but should work fine with a single queue.
2894 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2898 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2899 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2900 if (!adapter
->tx_ring
)
2901 goto err_tx_ring_allocation
;
2903 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2904 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2905 if (!adapter
->rx_ring
)
2906 goto err_rx_ring_allocation
;
2908 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2909 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
2910 adapter
->tx_ring
[i
].queue_index
= i
;
2913 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2914 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
2915 adapter
->rx_ring
[i
].queue_index
= i
;
2918 ixgbe_cache_ring_register(adapter
);
2922 err_rx_ring_allocation
:
2923 kfree(adapter
->tx_ring
);
2924 err_tx_ring_allocation
:
2929 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2930 * @adapter: board private structure to initialize
2932 * Attempt to configure the interrupts using the best available
2933 * capabilities of the hardware and the kernel.
2935 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter
*adapter
)
2938 int vector
, v_budget
;
2941 * It's easy to be greedy for MSI-X vectors, but it really
2942 * doesn't do us much good if we have a lot more vectors
2943 * than CPU's. So let's be conservative and only ask for
2944 * (roughly) twice the number of vectors as there are CPU's.
2946 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2947 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2950 * At the same time, hardware can only support a maximum of
2951 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2952 * we can easily reach upwards of 64 Rx descriptor queues and
2953 * 32 Tx queues. Thus, we cap it off in those rare cases where
2954 * the cpu count also exceeds our vector limit.
2956 v_budget
= min(v_budget
, MAX_MSIX_COUNT
);
2958 /* A failure in MSI-X entry allocation isn't fatal, but it does
2959 * mean we disable MSI-X capabilities of the adapter. */
2960 adapter
->msix_entries
= kcalloc(v_budget
,
2961 sizeof(struct msix_entry
), GFP_KERNEL
);
2962 if (!adapter
->msix_entries
) {
2963 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
2964 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2965 ixgbe_set_num_queues(adapter
);
2966 kfree(adapter
->tx_ring
);
2967 kfree(adapter
->rx_ring
);
2968 err
= ixgbe_alloc_queues(adapter
);
2970 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
2978 for (vector
= 0; vector
< v_budget
; vector
++)
2979 adapter
->msix_entries
[vector
].entry
= vector
;
2981 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
2983 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2987 err
= pci_enable_msi(adapter
->pdev
);
2989 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
2991 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
2992 "falling back to legacy. Error: %d\n", err
);
2998 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2999 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
3004 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
3006 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3007 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3008 pci_disable_msix(adapter
->pdev
);
3009 kfree(adapter
->msix_entries
);
3010 adapter
->msix_entries
= NULL
;
3011 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
3012 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
3013 pci_disable_msi(adapter
->pdev
);
3019 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
3020 * @adapter: board private structure to initialize
3022 * We determine which interrupt scheme to use based on...
3023 * - Kernel support (MSI, MSI-X)
3024 * - which can be user-defined (via MODULE_PARAM)
3025 * - Hardware queue count (num_*_queues)
3026 * - defined by miscellaneous hardware support/features (RSS, etc.)
3028 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
3032 /* Number of supported queues */
3033 ixgbe_set_num_queues(adapter
);
3035 err
= ixgbe_alloc_queues(adapter
);
3037 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
3038 goto err_alloc_queues
;
3041 err
= ixgbe_set_interrupt_capability(adapter
);
3043 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
3044 goto err_set_interrupt
;
3047 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
3048 "Tx Queue count = %u\n",
3049 (adapter
->num_rx_queues
> 1) ? "Enabled" :
3050 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
3052 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3057 kfree(adapter
->tx_ring
);
3058 kfree(adapter
->rx_ring
);
3064 * ixgbe_sfp_timer - worker thread to find a missing module
3065 * @data: pointer to our adapter struct
3067 static void ixgbe_sfp_timer(unsigned long data
)
3069 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3072 * Do the sfp_timer outside of interrupt context due to the
3073 * delays that sfp+ detection requires
3075 schedule_work(&adapter
->sfp_task
);
3079 * ixgbe_sfp_task - worker thread to find a missing module
3080 * @work: pointer to work_struct containing our data
3082 static void ixgbe_sfp_task(struct work_struct
*work
)
3084 struct ixgbe_adapter
*adapter
= container_of(work
,
3085 struct ixgbe_adapter
,
3087 struct ixgbe_hw
*hw
= &adapter
->hw
;
3089 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
3090 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
3091 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
3094 ret
= hw
->phy
.ops
.reset(hw
);
3095 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3096 DPRINTK(PROBE
, ERR
, "failed to initialize because an "
3097 "unsupported SFP+ module type was detected.\n"
3098 "Reload the driver after installing a "
3099 "supported module.\n");
3100 unregister_netdev(adapter
->netdev
);
3102 DPRINTK(PROBE
, INFO
, "detected SFP+: %d\n",
3105 /* don't need this routine any more */
3106 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3110 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
3111 mod_timer(&adapter
->sfp_timer
,
3112 round_jiffies(jiffies
+ (2 * HZ
)));
3116 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
3117 * @adapter: board private structure to initialize
3119 * ixgbe_sw_init initializes the Adapter private data structure.
3120 * Fields are initialized based on PCI device information and
3121 * OS network device settings (MTU size).
3123 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
3125 struct ixgbe_hw
*hw
= &adapter
->hw
;
3126 struct pci_dev
*pdev
= adapter
->pdev
;
3128 #ifdef CONFIG_IXGBE_DCB
3130 struct tc_configuration
*tc
;
3133 /* PCI config space info */
3135 hw
->vendor_id
= pdev
->vendor
;
3136 hw
->device_id
= pdev
->device
;
3137 hw
->revision_id
= pdev
->revision
;
3138 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
3139 hw
->subsystem_device_id
= pdev
->subsystem_device
;
3141 /* Set capability flags */
3142 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
3143 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
3144 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
3145 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
3146 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3147 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
3148 else if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3149 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
3151 #ifdef CONFIG_IXGBE_DCB
3152 /* Configure DCB traffic classes */
3153 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
3154 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
3155 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
3156 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3157 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
3158 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3159 tc
->dcb_pfc
= pfc_disabled
;
3161 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
3162 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
3163 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
3164 adapter
->dcb_cfg
.round_robin_enable
= false;
3165 adapter
->dcb_set_bitmap
= 0x00;
3166 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
3167 adapter
->ring_feature
[RING_F_DCB
].indices
);
3171 /* default flow control settings */
3172 hw
->fc
.requested_mode
= ixgbe_fc_full
;
3173 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
3174 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
3175 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
3176 hw
->fc
.send_xon
= true;
3178 /* enable itr by default in dynamic mode */
3179 adapter
->itr_setting
= 1;
3180 adapter
->eitr_param
= 20000;
3182 /* set defaults for eitr in MegaBytes */
3183 adapter
->eitr_low
= 10;
3184 adapter
->eitr_high
= 20;
3186 /* set default ring sizes */
3187 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
3188 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
3190 /* initialize eeprom parameters */
3191 if (ixgbe_init_eeprom_params_generic(hw
)) {
3192 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
3196 /* enable rx csum by default */
3197 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
3199 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3205 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
3206 * @adapter: board private structure
3207 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3209 * Return 0 on success, negative on failure
3211 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
3212 struct ixgbe_ring
*tx_ring
)
3214 struct pci_dev
*pdev
= adapter
->pdev
;
3217 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
3218 tx_ring
->tx_buffer_info
= vmalloc(size
);
3219 if (!tx_ring
->tx_buffer_info
)
3221 memset(tx_ring
->tx_buffer_info
, 0, size
);
3223 /* round up to nearest 4K */
3224 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
3225 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3227 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
3232 tx_ring
->next_to_use
= 0;
3233 tx_ring
->next_to_clean
= 0;
3234 tx_ring
->work_limit
= tx_ring
->count
;
3238 vfree(tx_ring
->tx_buffer_info
);
3239 tx_ring
->tx_buffer_info
= NULL
;
3240 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
3241 "descriptor ring\n");
3246 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
3247 * @adapter: board private structure
3249 * If this function returns with an error, then it's possible one or
3250 * more of the rings is populated (while the rest are not). It is the
3251 * callers duty to clean those orphaned rings.
3253 * Return 0 on success, negative on failure
3255 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
3259 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3260 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
3263 DPRINTK(PROBE
, ERR
, "Allocation for Tx Queue %u failed\n", i
);
3271 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
3272 * @adapter: board private structure
3273 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3275 * Returns 0 on success, negative on failure
3277 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
3278 struct ixgbe_ring
*rx_ring
)
3280 struct pci_dev
*pdev
= adapter
->pdev
;
3283 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
3284 rx_ring
->rx_buffer_info
= vmalloc(size
);
3285 if (!rx_ring
->rx_buffer_info
) {
3287 "vmalloc allocation failed for the rx desc ring\n");
3290 memset(rx_ring
->rx_buffer_info
, 0, size
);
3292 /* Round up to nearest 4K */
3293 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
3294 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3296 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
3298 if (!rx_ring
->desc
) {
3300 "Memory allocation failed for the rx desc ring\n");
3301 vfree(rx_ring
->rx_buffer_info
);
3305 rx_ring
->next_to_clean
= 0;
3306 rx_ring
->next_to_use
= 0;
3315 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
3316 * @adapter: board private structure
3318 * If this function returns with an error, then it's possible one or
3319 * more of the rings is populated (while the rest are not). It is the
3320 * callers duty to clean those orphaned rings.
3322 * Return 0 on success, negative on failure
3325 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
3329 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3330 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
3333 DPRINTK(PROBE
, ERR
, "Allocation for Rx Queue %u failed\n", i
);
3341 * ixgbe_free_tx_resources - Free Tx Resources per Queue
3342 * @adapter: board private structure
3343 * @tx_ring: Tx descriptor ring for a specific queue
3345 * Free all transmit software resources
3347 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
3348 struct ixgbe_ring
*tx_ring
)
3350 struct pci_dev
*pdev
= adapter
->pdev
;
3352 ixgbe_clean_tx_ring(adapter
, tx_ring
);
3354 vfree(tx_ring
->tx_buffer_info
);
3355 tx_ring
->tx_buffer_info
= NULL
;
3357 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
3359 tx_ring
->desc
= NULL
;
3363 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3364 * @adapter: board private structure
3366 * Free all transmit software resources
3368 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
3372 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3373 if (adapter
->tx_ring
[i
].desc
)
3374 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
3378 * ixgbe_free_rx_resources - Free Rx Resources
3379 * @adapter: board private structure
3380 * @rx_ring: ring to clean the resources from
3382 * Free all receive software resources
3384 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
3385 struct ixgbe_ring
*rx_ring
)
3387 struct pci_dev
*pdev
= adapter
->pdev
;
3389 ixgbe_clean_rx_ring(adapter
, rx_ring
);
3391 vfree(rx_ring
->rx_buffer_info
);
3392 rx_ring
->rx_buffer_info
= NULL
;
3394 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
3396 rx_ring
->desc
= NULL
;
3400 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3401 * @adapter: board private structure
3403 * Free all receive software resources
3405 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
3409 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3410 if (adapter
->rx_ring
[i
].desc
)
3411 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
3415 * ixgbe_change_mtu - Change the Maximum Transfer Unit
3416 * @netdev: network interface device structure
3417 * @new_mtu: new value for maximum frame size
3419 * Returns 0 on success, negative on failure
3421 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
3423 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3424 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3426 /* MTU < 68 is an error and causes problems on some kernels */
3427 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
3430 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
3431 netdev
->mtu
, new_mtu
);
3432 /* must set new MTU before calling down or up */
3433 netdev
->mtu
= new_mtu
;
3435 if (netif_running(netdev
))
3436 ixgbe_reinit_locked(adapter
);
3442 * ixgbe_open - Called when a network interface is made active
3443 * @netdev: network interface device structure
3445 * Returns 0 on success, negative value on failure
3447 * The open entry point is called when a network interface is made
3448 * active by the system (IFF_UP). At this point all resources needed
3449 * for transmit and receive operations are allocated, the interrupt
3450 * handler is registered with the OS, the watchdog timer is started,
3451 * and the stack is notified that the interface is ready.
3453 static int ixgbe_open(struct net_device
*netdev
)
3455 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3458 /* disallow open during test */
3459 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
3462 /* allocate transmit descriptors */
3463 err
= ixgbe_setup_all_tx_resources(adapter
);
3467 /* allocate receive descriptors */
3468 err
= ixgbe_setup_all_rx_resources(adapter
);
3472 ixgbe_configure(adapter
);
3474 ixgbe_napi_add_all(adapter
);
3476 err
= ixgbe_request_irq(adapter
);
3480 err
= ixgbe_up_complete(adapter
);
3484 netif_tx_start_all_queues(netdev
);
3489 ixgbe_release_hw_control(adapter
);
3490 ixgbe_free_irq(adapter
);
3492 ixgbe_free_all_rx_resources(adapter
);
3494 ixgbe_free_all_tx_resources(adapter
);
3496 ixgbe_reset(adapter
);
3502 * ixgbe_close - Disables a network interface
3503 * @netdev: network interface device structure
3505 * Returns 0, this is not allowed to fail
3507 * The close entry point is called when an interface is de-activated
3508 * by the OS. The hardware is still under the drivers control, but
3509 * needs to be disabled. A global MAC reset is issued to stop the
3510 * hardware, and all transmit and receive resources are freed.
3512 static int ixgbe_close(struct net_device
*netdev
)
3514 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3516 ixgbe_down(adapter
);
3517 ixgbe_free_irq(adapter
);
3519 ixgbe_free_all_tx_resources(adapter
);
3520 ixgbe_free_all_rx_resources(adapter
);
3522 ixgbe_release_hw_control(adapter
);
3528 * ixgbe_napi_add_all - prep napi structs for use
3529 * @adapter: private struct
3531 * helper function to napi_add each possible q_vector->napi
3533 void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
3535 int q_idx
, q_vectors
;
3536 struct net_device
*netdev
= adapter
->netdev
;
3537 int (*poll
)(struct napi_struct
*, int);
3539 /* check if we already have our netdev->napi_list populated */
3540 if (&netdev
->napi_list
!= netdev
->napi_list
.next
)
3543 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3544 poll
= &ixgbe_clean_rxonly
;
3545 /* Only enable as many vectors as we have rx queues. */
3546 q_vectors
= adapter
->num_rx_queues
;
3549 /* only one q_vector for legacy modes */
3553 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3554 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
3555 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
3559 void ixgbe_napi_del_all(struct ixgbe_adapter
*adapter
)
3562 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3564 /* legacy and MSI only use one vector */
3565 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3568 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3569 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
3570 if (!q_vector
->rxr_count
)
3572 netif_napi_del(&q_vector
->napi
);
3577 static int ixgbe_resume(struct pci_dev
*pdev
)
3579 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3580 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3583 pci_set_power_state(pdev
, PCI_D0
);
3584 pci_restore_state(pdev
);
3585 err
= pci_enable_device(pdev
);
3587 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from "
3591 pci_set_master(pdev
);
3593 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3594 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3596 err
= ixgbe_init_interrupt_scheme(adapter
);
3598 printk(KERN_ERR
"ixgbe: Cannot initialize interrupts for "
3603 ixgbe_reset(adapter
);
3605 if (netif_running(netdev
)) {
3606 err
= ixgbe_open(adapter
->netdev
);
3611 netif_device_attach(netdev
);
3616 #endif /* CONFIG_PM */
3617 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
3619 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3620 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3621 struct ixgbe_hw
*hw
= &adapter
->hw
;
3623 u32 wufc
= adapter
->wol
;
3628 netif_device_detach(netdev
);
3630 if (netif_running(netdev
)) {
3631 ixgbe_down(adapter
);
3632 ixgbe_free_irq(adapter
);
3633 ixgbe_free_all_tx_resources(adapter
);
3634 ixgbe_free_all_rx_resources(adapter
);
3636 ixgbe_reset_interrupt_capability(adapter
);
3637 ixgbe_napi_del_all(adapter
);
3638 INIT_LIST_HEAD(&netdev
->napi_list
);
3639 kfree(adapter
->tx_ring
);
3640 kfree(adapter
->rx_ring
);
3643 retval
= pci_save_state(pdev
);
3649 ixgbe_set_rx_mode(netdev
);
3651 /* turn on all-multi mode if wake on multicast is enabled */
3652 if (wufc
& IXGBE_WUFC_MC
) {
3653 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3654 fctrl
|= IXGBE_FCTRL_MPE
;
3655 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3658 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
3659 ctrl
|= IXGBE_CTRL_GIO_DIS
;
3660 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
3662 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
3664 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
3665 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
3668 if (wufc
&& hw
->mac
.type
== ixgbe_mac_82599EB
) {
3669 pci_enable_wake(pdev
, PCI_D3hot
, 1);
3670 pci_enable_wake(pdev
, PCI_D3cold
, 1);
3672 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3673 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3676 ixgbe_release_hw_control(adapter
);
3678 pci_disable_device(pdev
);
3680 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
3685 static void ixgbe_shutdown(struct pci_dev
*pdev
)
3687 ixgbe_suspend(pdev
, PMSG_SUSPEND
);
3691 * ixgbe_update_stats - Update the board statistics counters.
3692 * @adapter: board private structure
3694 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
3696 struct ixgbe_hw
*hw
= &adapter
->hw
;
3698 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
3700 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3701 for (i
= 0; i
< 16; i
++)
3702 adapter
->hw_rx_no_dma_resources
+=
3703 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
3706 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
3707 for (i
= 0; i
< 8; i
++) {
3708 /* for packet buffers not used, the register should read 0 */
3709 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
3711 adapter
->stats
.mpc
[i
] += mpc
;
3712 total_mpc
+= adapter
->stats
.mpc
[i
];
3713 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3714 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
3715 adapter
->stats
.qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
3716 adapter
->stats
.qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
3717 adapter
->stats
.qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
3718 adapter
->stats
.qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
3719 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3720 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
3721 IXGBE_PXONRXCNT(i
));
3722 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
3723 IXGBE_PXOFFRXCNT(i
));
3724 adapter
->stats
.qprdc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
3726 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
3728 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
3731 adapter
->stats
.pxontxc
[i
] += IXGBE_READ_REG(hw
,
3733 adapter
->stats
.pxofftxc
[i
] += IXGBE_READ_REG(hw
,
3736 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
3737 /* work around hardware counting issue */
3738 adapter
->stats
.gprc
-= missed_rx
;
3740 /* 82598 hardware only has a 32 bit counter in the high register */
3741 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3742 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
3743 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
3744 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
3745 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
3746 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
3747 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
3748 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
3749 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
3751 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
3752 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
3753 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
3754 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
3755 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
3757 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
3758 adapter
->stats
.bprc
+= bprc
;
3759 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
3760 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3761 adapter
->stats
.mprc
-= bprc
;
3762 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
3763 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
3764 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
3765 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
3766 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
3767 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
3768 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
3769 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
3770 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
3771 adapter
->stats
.lxontxc
+= lxon
;
3772 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
3773 adapter
->stats
.lxofftxc
+= lxoff
;
3774 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3775 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
3776 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
3778 * 82598 errata - tx of flow control packets is included in tx counters
3780 xon_off_tot
= lxon
+ lxoff
;
3781 adapter
->stats
.gptc
-= xon_off_tot
;
3782 adapter
->stats
.mptc
-= xon_off_tot
;
3783 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
3784 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3785 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
3786 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
3787 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
3788 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
3789 adapter
->stats
.ptc64
-= xon_off_tot
;
3790 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
3791 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
3792 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
3793 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
3794 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
3795 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
3797 /* Fill out the OS statistics structure */
3798 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3801 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
3802 adapter
->stats
.rlec
;
3803 adapter
->net_stats
.rx_dropped
= 0;
3804 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
3805 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3806 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
3810 * ixgbe_watchdog - Timer Call-back
3811 * @data: pointer to adapter cast into an unsigned long
3813 static void ixgbe_watchdog(unsigned long data
)
3815 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3816 struct ixgbe_hw
*hw
= &adapter
->hw
;
3818 /* Do the watchdog outside of interrupt context due to the lovely
3819 * delays that some of the newer hardware requires */
3820 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
3824 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++)
3827 /* Cause software interrupt to ensure rx rings are cleaned */
3828 switch (hw
->mac
.type
) {
3829 case ixgbe_mac_82598EB
:
3830 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3831 IXGBE_WRITE_REG(hw
, IXGBE_EICS
, (u32
)eics
);
3834 * for legacy and MSI interrupts don't set any
3835 * bits that are enabled for EIAM, because this
3836 * operation would set *both* EIMS and EICS for
3839 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3840 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3843 case ixgbe_mac_82599EB
:
3844 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3846 * EICS(0..15) first 0-15 q vectors
3847 * EICS[1] (16..31) q vectors 16-31
3848 * EICS[2] (0..31) q vectors 32-63
3850 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3851 (u32
)(eics
& 0xFFFF));
3852 IXGBE_WRITE_REG(hw
, IXGBE_EICS_EX(1),
3853 (u32
)(eics
& 0xFFFF0000));
3854 IXGBE_WRITE_REG(hw
, IXGBE_EICS_EX(2),
3858 * for legacy and MSI interrupts don't set any
3859 * bits that are enabled for EIAM, because this
3860 * operation would set *both* EIMS and EICS for
3863 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3864 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3870 /* Reset the timer */
3871 mod_timer(&adapter
->watchdog_timer
,
3872 round_jiffies(jiffies
+ 2 * HZ
));
3875 schedule_work(&adapter
->watchdog_task
);
3879 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
3880 * @work: pointer to work_struct containing our data
3882 static void ixgbe_multispeed_fiber_task(struct work_struct
*work
)
3884 struct ixgbe_adapter
*adapter
= container_of(work
,
3885 struct ixgbe_adapter
,
3886 multispeed_fiber_task
);
3887 struct ixgbe_hw
*hw
= &adapter
->hw
;
3890 adapter
->flags
|= IXGBE_FLAG_IN_SFP_LINK_TASK
;
3891 if (hw
->mac
.ops
.get_link_capabilities
)
3892 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3894 if (hw
->mac
.ops
.setup_link_speed
)
3895 hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, true);
3896 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
3897 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_LINK_TASK
;
3901 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
3902 * @work: pointer to work_struct containing our data
3904 static void ixgbe_sfp_config_module_task(struct work_struct
*work
)
3906 struct ixgbe_adapter
*adapter
= container_of(work
,
3907 struct ixgbe_adapter
,
3908 sfp_config_module_task
);
3909 struct ixgbe_hw
*hw
= &adapter
->hw
;
3912 adapter
->flags
|= IXGBE_FLAG_IN_SFP_MOD_TASK
;
3913 err
= hw
->phy
.ops
.identify_sfp(hw
);
3914 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3915 DPRINTK(PROBE
, ERR
, "PHY not supported on this NIC %d\n", err
);
3916 ixgbe_down(adapter
);
3919 hw
->mac
.ops
.setup_sfp(hw
);
3921 if (!adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
)
3922 /* This will also work for DA Twinax connections */
3923 schedule_work(&adapter
->multispeed_fiber_task
);
3924 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_MOD_TASK
;
3928 * ixgbe_watchdog_task - worker thread to bring link up
3929 * @work: pointer to work_struct containing our data
3931 static void ixgbe_watchdog_task(struct work_struct
*work
)
3933 struct ixgbe_adapter
*adapter
= container_of(work
,
3934 struct ixgbe_adapter
,
3936 struct net_device
*netdev
= adapter
->netdev
;
3937 struct ixgbe_hw
*hw
= &adapter
->hw
;
3938 u32 link_speed
= adapter
->link_speed
;
3939 bool link_up
= adapter
->link_up
;
3941 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
3943 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
3944 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
3946 time_after(jiffies
, (adapter
->link_check_timeout
+
3947 IXGBE_TRY_LINK_TIMEOUT
))) {
3948 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
3949 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
3951 adapter
->link_up
= link_up
;
3952 adapter
->link_speed
= link_speed
;
3956 if (!netif_carrier_ok(netdev
)) {
3957 bool flow_rx
, flow_tx
;
3959 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3960 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
3961 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
3962 flow_rx
= (mflcn
& IXGBE_MFLCN_RFCE
);
3963 flow_tx
= (fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
3965 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3966 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
3967 flow_rx
= (frctl
& IXGBE_FCTRL_RFCE
);
3968 flow_tx
= (rmcs
& IXGBE_RMCS_TFCE_802_3X
);
3971 printk(KERN_INFO
"ixgbe: %s NIC Link is Up %s, "
3972 "Flow Control: %s\n",
3974 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
3976 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
3977 "1 Gbps" : "unknown speed")),
3978 ((flow_rx
&& flow_tx
) ? "RX/TX" :
3980 (flow_tx
? "TX" : "None"))));
3982 netif_carrier_on(netdev
);
3984 /* Force detection of hung controller */
3985 adapter
->detect_tx_hung
= true;
3988 adapter
->link_up
= false;
3989 adapter
->link_speed
= 0;
3990 if (netif_carrier_ok(netdev
)) {
3991 printk(KERN_INFO
"ixgbe: %s NIC Link is Down\n",
3993 netif_carrier_off(netdev
);
3997 ixgbe_update_stats(adapter
);
3998 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
4001 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
4002 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
4003 u32 tx_flags
, u8
*hdr_len
)
4005 struct ixgbe_adv_tx_context_desc
*context_desc
;
4008 struct ixgbe_tx_buffer
*tx_buffer_info
;
4009 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
4010 u32 mss_l4len_idx
, l4len
;
4012 if (skb_is_gso(skb
)) {
4013 if (skb_header_cloned(skb
)) {
4014 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
4018 l4len
= tcp_hdrlen(skb
);
4021 if (skb
->protocol
== htons(ETH_P_IP
)) {
4022 struct iphdr
*iph
= ip_hdr(skb
);
4025 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4029 adapter
->hw_tso_ctxt
++;
4030 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
4031 ipv6_hdr(skb
)->payload_len
= 0;
4032 tcp_hdr(skb
)->check
=
4033 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4034 &ipv6_hdr(skb
)->daddr
,
4036 adapter
->hw_tso6_ctxt
++;
4039 i
= tx_ring
->next_to_use
;
4041 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4042 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4044 /* VLAN MACLEN IPLEN */
4045 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4047 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4048 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
4049 IXGBE_ADVTXD_MACLEN_SHIFT
);
4050 *hdr_len
+= skb_network_offset(skb
);
4052 (skb_transport_header(skb
) - skb_network_header(skb
));
4054 (skb_transport_header(skb
) - skb_network_header(skb
));
4055 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4056 context_desc
->seqnum_seed
= 0;
4058 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4059 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
4060 IXGBE_ADVTXD_DTYP_CTXT
);
4062 if (skb
->protocol
== htons(ETH_P_IP
))
4063 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4064 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4065 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4069 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
4070 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
4071 /* use index 1 for TSO */
4072 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4073 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4075 tx_buffer_info
->time_stamp
= jiffies
;
4076 tx_buffer_info
->next_to_watch
= i
;
4079 if (i
== tx_ring
->count
)
4081 tx_ring
->next_to_use
= i
;
4088 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
4089 struct ixgbe_ring
*tx_ring
,
4090 struct sk_buff
*skb
, u32 tx_flags
)
4092 struct ixgbe_adv_tx_context_desc
*context_desc
;
4094 struct ixgbe_tx_buffer
*tx_buffer_info
;
4095 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
4097 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
4098 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
4099 i
= tx_ring
->next_to_use
;
4100 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4101 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4103 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4105 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4106 vlan_macip_lens
|= (skb_network_offset(skb
) <<
4107 IXGBE_ADVTXD_MACLEN_SHIFT
);
4108 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
4109 vlan_macip_lens
|= (skb_transport_header(skb
) -
4110 skb_network_header(skb
));
4112 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4113 context_desc
->seqnum_seed
= 0;
4115 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
4116 IXGBE_ADVTXD_DTYP_CTXT
);
4118 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
4119 switch (skb
->protocol
) {
4120 case cpu_to_be16(ETH_P_IP
):
4121 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4122 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
4124 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4126 case cpu_to_be16(ETH_P_IPV6
):
4127 /* XXX what about other V6 headers?? */
4128 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
4130 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4133 if (unlikely(net_ratelimit())) {
4134 DPRINTK(PROBE
, WARNING
,
4135 "partial checksum but proto=%x!\n",
4142 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4143 /* use index zero for tx checksum offload */
4144 context_desc
->mss_l4len_idx
= 0;
4146 tx_buffer_info
->time_stamp
= jiffies
;
4147 tx_buffer_info
->next_to_watch
= i
;
4149 adapter
->hw_csum_tx_good
++;
4151 if (i
== tx_ring
->count
)
4153 tx_ring
->next_to_use
= i
;
4161 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
4162 struct ixgbe_ring
*tx_ring
,
4163 struct sk_buff
*skb
, unsigned int first
)
4165 struct ixgbe_tx_buffer
*tx_buffer_info
;
4166 unsigned int len
= skb
->len
;
4167 unsigned int offset
= 0, size
, count
= 0, i
;
4168 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
4171 len
-= skb
->data_len
;
4173 i
= tx_ring
->next_to_use
;
4176 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4177 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
4179 tx_buffer_info
->length
= size
;
4180 tx_buffer_info
->dma
= pci_map_single(adapter
->pdev
,
4182 size
, PCI_DMA_TODEVICE
);
4183 tx_buffer_info
->time_stamp
= jiffies
;
4184 tx_buffer_info
->next_to_watch
= i
;
4190 if (i
== tx_ring
->count
)
4194 for (f
= 0; f
< nr_frags
; f
++) {
4195 struct skb_frag_struct
*frag
;
4197 frag
= &skb_shinfo(skb
)->frags
[f
];
4199 offset
= frag
->page_offset
;
4202 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4203 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
4205 tx_buffer_info
->length
= size
;
4206 tx_buffer_info
->dma
= pci_map_page(adapter
->pdev
,
4211 tx_buffer_info
->time_stamp
= jiffies
;
4212 tx_buffer_info
->next_to_watch
= i
;
4218 if (i
== tx_ring
->count
)
4223 i
= tx_ring
->count
- 1;
4226 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
4227 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
4232 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
4233 struct ixgbe_ring
*tx_ring
,
4234 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
4236 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
4237 struct ixgbe_tx_buffer
*tx_buffer_info
;
4238 u32 olinfo_status
= 0, cmd_type_len
= 0;
4240 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
4242 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
4244 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
4246 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4247 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
4249 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
4250 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
4252 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
4253 IXGBE_ADVTXD_POPTS_SHIFT
;
4255 /* use index 1 context for tso */
4256 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4257 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
4258 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
4259 IXGBE_ADVTXD_POPTS_SHIFT
;
4261 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
4262 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
4263 IXGBE_ADVTXD_POPTS_SHIFT
;
4265 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
4267 i
= tx_ring
->next_to_use
;
4269 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4270 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
4271 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
4272 tx_desc
->read
.cmd_type_len
=
4273 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
4274 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4276 if (i
== tx_ring
->count
)
4280 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
4283 * Force memory writes to complete before letting h/w
4284 * know there are new descriptors to fetch. (Only
4285 * applicable for weak-ordered memory model archs,
4290 tx_ring
->next_to_use
= i
;
4291 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
4294 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
4295 struct ixgbe_ring
*tx_ring
, int size
)
4297 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4299 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4300 /* Herbert's original patch had:
4301 * smp_mb__after_netif_stop_queue();
4302 * but since that doesn't exist yet, just open code it. */
4305 /* We need to check again in a case another CPU has just
4306 * made room available. */
4307 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
4310 /* A reprieve! - use start_queue because it doesn't call schedule */
4311 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
4312 ++adapter
->restart_queue
;
4316 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
4317 struct ixgbe_ring
*tx_ring
, int size
)
4319 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
4321 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
4324 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
4326 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
4328 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
4329 return 0; /* All traffic should default to class 0 */
4331 return skb_tx_hash(dev
, skb
);
4334 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
4336 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4337 struct ixgbe_ring
*tx_ring
;
4339 unsigned int tx_flags
= 0;
4345 r_idx
= (adapter
->num_tx_queues
- 1) & skb
->queue_mapping
;
4346 tx_ring
= &adapter
->tx_ring
[r_idx
];
4348 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
4349 tx_flags
|= vlan_tx_tag_get(skb
);
4350 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4351 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
4352 tx_flags
|= (skb
->queue_mapping
<< 13);
4354 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
4355 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
4356 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4357 tx_flags
|= (skb
->queue_mapping
<< 13);
4358 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
4359 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
4361 /* three things can cause us to need a context descriptor */
4362 if (skb_is_gso(skb
) ||
4363 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
4364 (tx_flags
& IXGBE_TX_FLAGS_VLAN
))
4367 count
+= TXD_USE_COUNT(skb_headlen(skb
));
4368 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
4369 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
4371 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
4373 return NETDEV_TX_BUSY
;
4376 if (skb
->protocol
== htons(ETH_P_IP
))
4377 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
4378 first
= tx_ring
->next_to_use
;
4379 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
4381 dev_kfree_skb_any(skb
);
4382 return NETDEV_TX_OK
;
4386 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
4387 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
4388 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
4389 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
4391 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
,
4392 ixgbe_tx_map(adapter
, tx_ring
, skb
, first
),
4395 netdev
->trans_start
= jiffies
;
4397 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
4399 return NETDEV_TX_OK
;
4403 * ixgbe_get_stats - Get System Network Statistics
4404 * @netdev: network interface device structure
4406 * Returns the address of the device statistics structure.
4407 * The statistics are actually updated from the timer callback.
4409 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
4411 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4413 /* only return the current stats */
4414 return &adapter
->net_stats
;
4418 * ixgbe_set_mac - Change the Ethernet Address of the NIC
4419 * @netdev: network interface device structure
4420 * @p: pointer to an address structure
4422 * Returns 0 on success, negative on failure
4424 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
4426 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4427 struct ixgbe_hw
*hw
= &adapter
->hw
;
4428 struct sockaddr
*addr
= p
;
4430 if (!is_valid_ether_addr(addr
->sa_data
))
4431 return -EADDRNOTAVAIL
;
4433 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
4434 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
4436 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
4441 #ifdef CONFIG_NET_POLL_CONTROLLER
4443 * Polling 'interrupt' - used by things like netconsole to send skbs
4444 * without having to re-enable interrupts. It's not called while
4445 * the interrupt routine is executing.
4447 static void ixgbe_netpoll(struct net_device
*netdev
)
4449 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4451 disable_irq(adapter
->pdev
->irq
);
4452 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
4453 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
4454 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
4455 enable_irq(adapter
->pdev
->irq
);
4459 static const struct net_device_ops ixgbe_netdev_ops
= {
4460 .ndo_open
= ixgbe_open
,
4461 .ndo_stop
= ixgbe_close
,
4462 .ndo_start_xmit
= ixgbe_xmit_frame
,
4463 .ndo_select_queue
= ixgbe_select_queue
,
4464 .ndo_get_stats
= ixgbe_get_stats
,
4465 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
4466 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
4467 .ndo_validate_addr
= eth_validate_addr
,
4468 .ndo_set_mac_address
= ixgbe_set_mac
,
4469 .ndo_change_mtu
= ixgbe_change_mtu
,
4470 .ndo_tx_timeout
= ixgbe_tx_timeout
,
4471 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
4472 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
4473 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
4474 #ifdef CONFIG_NET_POLL_CONTROLLER
4475 .ndo_poll_controller
= ixgbe_netpoll
,
4480 * ixgbe_probe - Device Initialization Routine
4481 * @pdev: PCI device information struct
4482 * @ent: entry in ixgbe_pci_tbl
4484 * Returns 0 on success, negative on failure
4486 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
4487 * The OS initialization, configuring of the adapter private structure,
4488 * and a hardware reset occur.
4490 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
4491 const struct pci_device_id
*ent
)
4493 struct net_device
*netdev
;
4494 struct ixgbe_adapter
*adapter
= NULL
;
4495 struct ixgbe_hw
*hw
;
4496 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
4497 static int cards_found
;
4498 int i
, err
, pci_using_dac
;
4502 err
= pci_enable_device(pdev
);
4506 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) &&
4507 !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
)) {
4510 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
4512 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
4514 dev_err(&pdev
->dev
, "No usable DMA "
4515 "configuration, aborting\n");
4522 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
4524 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
4528 err
= pci_enable_pcie_error_reporting(pdev
);
4530 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
4532 /* non-fatal, continue */
4535 pci_set_master(pdev
);
4536 pci_save_state(pdev
);
4538 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
4541 goto err_alloc_etherdev
;
4544 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
4546 pci_set_drvdata(pdev
, netdev
);
4547 adapter
= netdev_priv(netdev
);
4549 adapter
->netdev
= netdev
;
4550 adapter
->pdev
= pdev
;
4553 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
4555 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
4556 pci_resource_len(pdev
, 0));
4562 for (i
= 1; i
<= 5; i
++) {
4563 if (pci_resource_len(pdev
, i
) == 0)
4567 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
4568 ixgbe_set_ethtool_ops(netdev
);
4569 netdev
->watchdog_timeo
= 5 * HZ
;
4570 strcpy(netdev
->name
, pci_name(pdev
));
4572 adapter
->bd_number
= cards_found
;
4575 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
4576 hw
->mac
.type
= ii
->mac
;
4579 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
4580 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
4581 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4582 if (!(eec
& (1 << 8)))
4583 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
4586 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
4587 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
4589 /* set up this timer and work struct before calling get_invariants
4590 * which might start the timer
4592 init_timer(&adapter
->sfp_timer
);
4593 adapter
->sfp_timer
.function
= &ixgbe_sfp_timer
;
4594 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
4596 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
4598 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
4599 INIT_WORK(&adapter
->multispeed_fiber_task
, ixgbe_multispeed_fiber_task
);
4601 /* a new SFP+ module arrival, called from GPI SDP2 context */
4602 INIT_WORK(&adapter
->sfp_config_module_task
,
4603 ixgbe_sfp_config_module_task
);
4605 err
= ii
->get_invariants(hw
);
4606 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
4607 /* start a kernel thread to watch for a module to arrive */
4608 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4609 mod_timer(&adapter
->sfp_timer
,
4610 round_jiffies(jiffies
+ (2 * HZ
)));
4612 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4613 DPRINTK(PROBE
, ERR
, "failed to load because an "
4614 "unsupported SFP+ module type was detected.\n");
4620 /* setup the private structure */
4621 err
= ixgbe_sw_init(adapter
);
4625 /* reset_hw fills in the perm_addr as well */
4626 err
= hw
->mac
.ops
.reset_hw(hw
);
4628 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
4632 netdev
->features
= NETIF_F_SG
|
4634 NETIF_F_HW_VLAN_TX
|
4635 NETIF_F_HW_VLAN_RX
|
4636 NETIF_F_HW_VLAN_FILTER
;
4638 netdev
->features
|= NETIF_F_IPV6_CSUM
;
4639 netdev
->features
|= NETIF_F_TSO
;
4640 netdev
->features
|= NETIF_F_TSO6
;
4641 netdev
->features
|= NETIF_F_GRO
;
4643 netdev
->vlan_features
|= NETIF_F_TSO
;
4644 netdev
->vlan_features
|= NETIF_F_TSO6
;
4645 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
4646 netdev
->vlan_features
|= NETIF_F_SG
;
4648 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
4649 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
4651 #ifdef CONFIG_IXGBE_DCB
4652 netdev
->dcbnl_ops
= &dcbnl_ops
;
4656 netdev
->features
|= NETIF_F_HIGHDMA
;
4658 /* make sure the EEPROM is good */
4659 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
4660 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
4665 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
4666 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
4668 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
4669 dev_err(&pdev
->dev
, "invalid MAC address\n");
4674 init_timer(&adapter
->watchdog_timer
);
4675 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
4676 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
4678 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
4679 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
4681 err
= ixgbe_init_interrupt_scheme(adapter
);
4685 switch (pdev
->device
) {
4686 case IXGBE_DEV_ID_82599_KX4
:
4687 #define IXGBE_PCIE_PMCSR 0x44
4688 adapter
->wol
= IXGBE_WUFC_MAG
;
4689 pci_read_config_word(pdev
, IXGBE_PCIE_PMCSR
, &pm_value
);
4690 pci_write_config_word(pdev
, IXGBE_PCIE_PMCSR
,
4691 (pm_value
| (1 << 8)));
4697 device_init_wakeup(&adapter
->pdev
->dev
, true);
4698 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
4700 /* print bus type/speed/width info */
4701 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) %pM\n",
4702 ((hw
->bus
.speed
== ixgbe_bus_speed_5000
) ? "5.0Gb/s":
4703 (hw
->bus
.speed
== ixgbe_bus_speed_2500
) ? "2.5Gb/s":"Unknown"),
4704 ((hw
->bus
.width
== ixgbe_bus_width_pcie_x8
) ? "Width x8" :
4705 (hw
->bus
.width
== ixgbe_bus_width_pcie_x4
) ? "Width x4" :
4706 (hw
->bus
.width
== ixgbe_bus_width_pcie_x1
) ? "Width x1" :
4709 ixgbe_read_pba_num_generic(hw
, &part_num
);
4710 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
4711 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
4712 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
4713 (part_num
>> 8), (part_num
& 0xff));
4715 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4716 hw
->mac
.type
, hw
->phy
.type
,
4717 (part_num
>> 8), (part_num
& 0xff));
4719 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
4720 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
4721 "this card is not sufficient for optimal "
4723 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
4724 "PCI-Express slot is required.\n");
4727 /* save off EEPROM version number */
4728 hw
->eeprom
.ops
.read(hw
, 0x29, &adapter
->eeprom_version
);
4730 /* reset the hardware with the new settings */
4731 hw
->mac
.ops
.start_hw(hw
);
4733 netif_carrier_off(netdev
);
4735 strcpy(netdev
->name
, "eth%d");
4736 err
= register_netdev(netdev
);
4740 #ifdef CONFIG_IXGBE_DCA
4741 if (dca_add_requester(&pdev
->dev
) == 0) {
4742 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
4743 /* always use CB2 mode, difference is masked
4744 * in the CB driver */
4745 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
4746 ixgbe_setup_dca(adapter
);
4750 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
4755 ixgbe_release_hw_control(adapter
);
4758 ixgbe_reset_interrupt_capability(adapter
);
4760 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4761 del_timer_sync(&adapter
->sfp_timer
);
4762 cancel_work_sync(&adapter
->sfp_task
);
4763 cancel_work_sync(&adapter
->multispeed_fiber_task
);
4764 cancel_work_sync(&adapter
->sfp_config_module_task
);
4765 iounmap(hw
->hw_addr
);
4767 free_netdev(netdev
);
4769 pci_release_regions(pdev
);
4772 pci_disable_device(pdev
);
4777 * ixgbe_remove - Device Removal Routine
4778 * @pdev: PCI device information struct
4780 * ixgbe_remove is called by the PCI subsystem to alert the driver
4781 * that it should release a PCI device. The could be caused by a
4782 * Hot-Plug event, or because the driver is going to be removed from
4785 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
4787 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4788 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4791 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4792 /* clear the module not found bit to make sure the worker won't
4795 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4796 del_timer_sync(&adapter
->watchdog_timer
);
4798 del_timer_sync(&adapter
->sfp_timer
);
4799 cancel_work_sync(&adapter
->watchdog_task
);
4800 cancel_work_sync(&adapter
->sfp_task
);
4801 cancel_work_sync(&adapter
->multispeed_fiber_task
);
4802 cancel_work_sync(&adapter
->sfp_config_module_task
);
4803 flush_scheduled_work();
4805 #ifdef CONFIG_IXGBE_DCA
4806 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
4807 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
4808 dca_remove_requester(&pdev
->dev
);
4809 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
4813 if (netdev
->reg_state
== NETREG_REGISTERED
)
4814 unregister_netdev(netdev
);
4816 ixgbe_reset_interrupt_capability(adapter
);
4818 ixgbe_release_hw_control(adapter
);
4820 iounmap(adapter
->hw
.hw_addr
);
4821 pci_release_regions(pdev
);
4823 DPRINTK(PROBE
, INFO
, "complete\n");
4824 kfree(adapter
->tx_ring
);
4825 kfree(adapter
->rx_ring
);
4827 free_netdev(netdev
);
4829 err
= pci_disable_pcie_error_reporting(pdev
);
4832 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
4834 pci_disable_device(pdev
);
4838 * ixgbe_io_error_detected - called when PCI error is detected
4839 * @pdev: Pointer to PCI device
4840 * @state: The current pci connection state
4842 * This function is called after a PCI bus error affecting
4843 * this device has been detected.
4845 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
4846 pci_channel_state_t state
)
4848 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4849 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4851 netif_device_detach(netdev
);
4853 if (netif_running(netdev
))
4854 ixgbe_down(adapter
);
4855 pci_disable_device(pdev
);
4857 /* Request a slot reset. */
4858 return PCI_ERS_RESULT_NEED_RESET
;
4862 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4863 * @pdev: Pointer to PCI device
4865 * Restart the card from scratch, as if from a cold-boot.
4867 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
4869 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4870 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4871 pci_ers_result_t result
;
4874 if (pci_enable_device(pdev
)) {
4876 "Cannot re-enable PCI device after reset.\n");
4877 result
= PCI_ERS_RESULT_DISCONNECT
;
4879 pci_set_master(pdev
);
4880 pci_restore_state(pdev
);
4882 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4883 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4885 ixgbe_reset(adapter
);
4886 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4887 result
= PCI_ERS_RESULT_RECOVERED
;
4890 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4893 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err
);
4894 /* non-fatal, continue */
4901 * ixgbe_io_resume - called when traffic can start flowing again.
4902 * @pdev: Pointer to PCI device
4904 * This callback is called when the error recovery driver tells us that
4905 * its OK to resume normal operation.
4907 static void ixgbe_io_resume(struct pci_dev
*pdev
)
4909 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4910 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4912 if (netif_running(netdev
)) {
4913 if (ixgbe_up(adapter
)) {
4914 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
4919 netif_device_attach(netdev
);
4922 static struct pci_error_handlers ixgbe_err_handler
= {
4923 .error_detected
= ixgbe_io_error_detected
,
4924 .slot_reset
= ixgbe_io_slot_reset
,
4925 .resume
= ixgbe_io_resume
,
4928 static struct pci_driver ixgbe_driver
= {
4929 .name
= ixgbe_driver_name
,
4930 .id_table
= ixgbe_pci_tbl
,
4931 .probe
= ixgbe_probe
,
4932 .remove
= __devexit_p(ixgbe_remove
),
4934 .suspend
= ixgbe_suspend
,
4935 .resume
= ixgbe_resume
,
4937 .shutdown
= ixgbe_shutdown
,
4938 .err_handler
= &ixgbe_err_handler
4942 * ixgbe_init_module - Driver Registration Routine
4944 * ixgbe_init_module is the first routine called when the driver is
4945 * loaded. All it does is register with the PCI subsystem.
4947 static int __init
ixgbe_init_module(void)
4950 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
4951 ixgbe_driver_string
, ixgbe_driver_version
);
4953 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
4955 #ifdef CONFIG_IXGBE_DCA
4956 dca_register_notify(&dca_notifier
);
4959 ret
= pci_register_driver(&ixgbe_driver
);
4963 module_init(ixgbe_init_module
);
4966 * ixgbe_exit_module - Driver Exit Cleanup Routine
4968 * ixgbe_exit_module is called just before the driver is removed
4971 static void __exit
ixgbe_exit_module(void)
4973 #ifdef CONFIG_IXGBE_DCA
4974 dca_unregister_notify(&dca_notifier
);
4976 pci_unregister_driver(&ixgbe_driver
);
4979 #ifdef CONFIG_IXGBE_DCA
4980 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
4985 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
4986 __ixgbe_notify_dca
);
4988 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
4991 #endif /* CONFIG_IXGBE_DCA */
4994 * ixgbe_get_hw_dev_name - return device name string
4995 * used by hardware layer to print debugging information
4997 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
4999 struct ixgbe_adapter
*adapter
= hw
->back
;
5000 return adapter
->netdev
->name
;
5004 module_exit(ixgbe_exit_module
);