1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/pkt_sched.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
43 #include <scsi/fc/fc_fcoe.h>
46 #include "ixgbe_common.h"
47 #include "ixgbe_dcb_82599.h"
49 char ixgbe_driver_name
[] = "ixgbe";
50 static const char ixgbe_driver_string
[] =
51 "Intel(R) 10 Gigabit PCI Express Network Driver";
53 #define DRV_VERSION "2.0.44-k2"
54 const char ixgbe_driver_version
[] = DRV_VERSION
;
55 static char ixgbe_copyright
[] = "Copyright (c) 1999-2009 Intel Corporation.";
57 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
58 [board_82598
] = &ixgbe_82598_info
,
59 [board_82599
] = &ixgbe_82599_info
,
62 /* ixgbe_pci_tbl - PCI Device ID Table
64 * Wildcard entries (PCI_ANY_ID) should come last
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static struct pci_device_id ixgbe_pci_tbl
[] = {
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
79 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
),
81 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
83 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
85 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
87 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
),
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
),
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
),
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
),
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
),
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
),
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
),
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
),
110 /* required last entry */
113 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
115 #ifdef CONFIG_IXGBE_DCA
116 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
118 static struct notifier_block dca_notifier
= {
119 .notifier_call
= ixgbe_notify_dca
,
125 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
126 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
127 MODULE_LICENSE("GPL");
128 MODULE_VERSION(DRV_VERSION
);
130 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
132 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
136 /* Let firmware take over control of h/w */
137 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
138 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
139 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
142 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
146 /* Let firmware know the driver has taken over */
147 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
148 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
149 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
153 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
154 * @adapter: pointer to adapter struct
155 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
156 * @queue: queue to map the corresponding interrupt to
157 * @msix_vector: the vector to map to the corresponding queue
160 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
161 u8 queue
, u8 msix_vector
)
164 struct ixgbe_hw
*hw
= &adapter
->hw
;
165 switch (hw
->mac
.type
) {
166 case ixgbe_mac_82598EB
:
167 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
170 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
171 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
172 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
173 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
174 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
176 case ixgbe_mac_82599EB
:
177 if (direction
== -1) {
179 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
180 index
= ((queue
& 1) * 8);
181 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
182 ivar
&= ~(0xFF << index
);
183 ivar
|= (msix_vector
<< index
);
184 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
187 /* tx or rx causes */
188 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
189 index
= ((16 * (queue
& 1)) + (8 * direction
));
190 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
191 ivar
&= ~(0xFF << index
);
192 ivar
|= (msix_vector
<< index
);
193 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
201 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
206 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
207 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
208 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
210 mask
= (qmask
& 0xFFFFFFFF);
211 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
212 mask
= (qmask
>> 32);
213 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
217 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
218 struct ixgbe_tx_buffer
221 tx_buffer_info
->dma
= 0;
222 if (tx_buffer_info
->skb
) {
223 skb_dma_unmap(&adapter
->pdev
->dev
, tx_buffer_info
->skb
,
225 dev_kfree_skb_any(tx_buffer_info
->skb
);
226 tx_buffer_info
->skb
= NULL
;
228 tx_buffer_info
->time_stamp
= 0;
229 /* tx_buffer_info must be completely set up in the transmit path */
233 * ixgbe_tx_is_paused - check if the tx ring is paused
234 * @adapter: the ixgbe adapter
235 * @tx_ring: the corresponding tx_ring
237 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
238 * corresponding TC of this tx_ring when checking TFCS.
240 * Returns : true if paused
242 static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter
*adapter
,
243 struct ixgbe_ring
*tx_ring
)
246 u32 txoff
= IXGBE_TFCS_TXOFF
;
248 #ifdef CONFIG_IXGBE_DCB
249 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
250 int reg_idx
= tx_ring
->reg_idx
;
251 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
253 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
255 txoff
= IXGBE_TFCS_TXOFF0
;
256 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
258 txoff
= IXGBE_TFCS_TXOFF
;
262 if (tc
== 2) /* TC2, TC3 */
263 tc
+= (reg_idx
- 64) >> 4;
264 else if (tc
== 3) /* TC4, TC5, TC6, TC7 */
265 tc
+= 1 + ((reg_idx
- 96) >> 3);
266 } else if (dcb_i
== 4) {
270 tc
+= (reg_idx
- 64) >> 5;
271 if (tc
== 2) /* TC2, TC3 */
272 tc
+= (reg_idx
- 96) >> 4;
279 return IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & txoff
;
282 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
283 struct ixgbe_ring
*tx_ring
,
286 struct ixgbe_hw
*hw
= &adapter
->hw
;
288 /* Detect a transmit hang in hardware, this serializes the
289 * check with the clearing of time_stamp and movement of eop */
290 adapter
->detect_tx_hung
= false;
291 if (tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
292 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
293 !ixgbe_tx_is_paused(adapter
, tx_ring
)) {
294 /* detected Tx unit hang */
295 union ixgbe_adv_tx_desc
*tx_desc
;
296 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
297 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
299 " TDH, TDT <%x>, <%x>\n"
300 " next_to_use <%x>\n"
301 " next_to_clean <%x>\n"
302 "tx_buffer_info[next_to_clean]\n"
303 " time_stamp <%lx>\n"
305 tx_ring
->queue_index
,
306 IXGBE_READ_REG(hw
, tx_ring
->head
),
307 IXGBE_READ_REG(hw
, tx_ring
->tail
),
308 tx_ring
->next_to_use
, eop
,
309 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
316 #define IXGBE_MAX_TXD_PWR 14
317 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
319 /* Tx Descriptors needed, worst case */
320 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
321 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
322 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
323 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
325 static void ixgbe_tx_timeout(struct net_device
*netdev
);
328 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
329 * @q_vector: structure containing interrupt and ring information
330 * @tx_ring: tx ring to clean
332 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
333 struct ixgbe_ring
*tx_ring
)
335 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
336 struct net_device
*netdev
= adapter
->netdev
;
337 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
338 struct ixgbe_tx_buffer
*tx_buffer_info
;
339 unsigned int i
, eop
, count
= 0;
340 unsigned int total_bytes
= 0, total_packets
= 0;
342 i
= tx_ring
->next_to_clean
;
343 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
344 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
346 while ((eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) &&
347 (count
< tx_ring
->work_limit
)) {
348 bool cleaned
= false;
349 for ( ; !cleaned
; count
++) {
351 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
352 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
353 cleaned
= (i
== eop
);
354 skb
= tx_buffer_info
->skb
;
356 if (cleaned
&& skb
) {
357 unsigned int segs
, bytecount
;
358 unsigned int hlen
= skb_headlen(skb
);
360 /* gso_segs is currently only valid for tcp */
361 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
363 /* adjust for FCoE Sequence Offload */
364 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
365 && (skb
->protocol
== htons(ETH_P_FCOE
)) &&
367 hlen
= skb_transport_offset(skb
) +
368 sizeof(struct fc_frame_header
) +
369 sizeof(struct fcoe_crc_eof
);
370 segs
= DIV_ROUND_UP(skb
->len
- hlen
,
371 skb_shinfo(skb
)->gso_size
);
373 #endif /* IXGBE_FCOE */
374 /* multiply data chunks by size of headers */
375 bytecount
= ((segs
- 1) * hlen
) + skb
->len
;
376 total_packets
+= segs
;
377 total_bytes
+= bytecount
;
380 ixgbe_unmap_and_free_tx_resource(adapter
,
383 tx_desc
->wb
.status
= 0;
386 if (i
== tx_ring
->count
)
390 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
391 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
394 tx_ring
->next_to_clean
= i
;
396 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
397 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
398 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
399 /* Make sure that anybody stopping the queue after this
400 * sees the new next_to_clean.
403 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
404 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
405 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
406 ++adapter
->restart_queue
;
410 if (adapter
->detect_tx_hung
) {
411 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
412 /* schedule immediate reset if we believe we hung */
414 "tx hang %d detected, resetting adapter\n",
415 adapter
->tx_timeout_count
+ 1);
416 ixgbe_tx_timeout(adapter
->netdev
);
420 /* re-arm the interrupt */
421 if (count
>= tx_ring
->work_limit
)
422 ixgbe_irq_rearm_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
424 tx_ring
->total_bytes
+= total_bytes
;
425 tx_ring
->total_packets
+= total_packets
;
426 tx_ring
->stats
.packets
+= total_packets
;
427 tx_ring
->stats
.bytes
+= total_bytes
;
428 netdev
->stats
.tx_bytes
+= total_bytes
;
429 netdev
->stats
.tx_packets
+= total_packets
;
430 return (count
< tx_ring
->work_limit
);
433 #ifdef CONFIG_IXGBE_DCA
434 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
435 struct ixgbe_ring
*rx_ring
)
439 int q
= rx_ring
- adapter
->rx_ring
;
441 if (rx_ring
->cpu
!= cpu
) {
442 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
443 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
444 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
445 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
446 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
447 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599
;
448 rxctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
449 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
);
451 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
452 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
453 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN
);
454 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN
|
455 IXGBE_DCA_RXCTRL_DESC_HSRO_EN
);
456 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
462 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
463 struct ixgbe_ring
*tx_ring
)
467 int q
= tx_ring
- adapter
->tx_ring
;
468 struct ixgbe_hw
*hw
= &adapter
->hw
;
470 if (tx_ring
->cpu
!= cpu
) {
471 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
472 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(q
));
473 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
474 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
475 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
476 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
477 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
478 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
));
479 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599
;
480 txctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
481 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
);
482 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
483 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
), txctrl
);
490 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
494 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
497 /* always use CB2 mode, difference is masked in the CB driver */
498 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
500 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
501 adapter
->tx_ring
[i
].cpu
= -1;
502 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
504 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
505 adapter
->rx_ring
[i
].cpu
= -1;
506 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
510 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
512 struct net_device
*netdev
= dev_get_drvdata(dev
);
513 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
514 unsigned long event
= *(unsigned long *)data
;
517 case DCA_PROVIDER_ADD
:
518 /* if we're already enabled, don't do it again */
519 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
521 if (dca_add_requester(dev
) == 0) {
522 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
523 ixgbe_setup_dca(adapter
);
526 /* Fall Through since DCA is disabled. */
527 case DCA_PROVIDER_REMOVE
:
528 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
529 dca_remove_requester(dev
);
530 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
531 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
539 #endif /* CONFIG_IXGBE_DCA */
541 * ixgbe_receive_skb - Send a completed packet up the stack
542 * @adapter: board private structure
543 * @skb: packet to send up
544 * @status: hardware indication of status of receive
545 * @rx_ring: rx descriptor ring (for a specific queue) to setup
546 * @rx_desc: rx descriptor
548 static void ixgbe_receive_skb(struct ixgbe_q_vector
*q_vector
,
549 struct sk_buff
*skb
, u8 status
,
550 struct ixgbe_ring
*ring
,
551 union ixgbe_adv_rx_desc
*rx_desc
)
553 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
554 struct napi_struct
*napi
= &q_vector
->napi
;
555 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
556 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
558 skb_record_rx_queue(skb
, ring
->queue_index
);
559 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
560 if (adapter
->vlgrp
&& is_vlan
&& (tag
& VLAN_VID_MASK
))
561 vlan_gro_receive(napi
, adapter
->vlgrp
, tag
, skb
);
563 napi_gro_receive(napi
, skb
);
565 if (adapter
->vlgrp
&& is_vlan
&& (tag
& VLAN_VID_MASK
))
566 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
573 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
574 * @adapter: address of board private structure
575 * @status_err: hardware indication of status of receive
576 * @skb: skb currently being received and modified
578 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
579 union ixgbe_adv_rx_desc
*rx_desc
,
582 u32 status_err
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
584 skb
->ip_summed
= CHECKSUM_NONE
;
586 /* Rx csum disabled */
587 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
590 /* if IP and error */
591 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
592 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
593 adapter
->hw_csum_rx_error
++;
597 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
600 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
601 u16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
604 * 82599 errata, UDP frames with a 0 checksum can be marked as
607 if ((pkt_info
& IXGBE_RXDADV_PKTTYPE_UDP
) &&
608 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
))
611 adapter
->hw_csum_rx_error
++;
615 /* It must be a TCP or UDP packet with a valid checksum */
616 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
617 adapter
->hw_csum_rx_good
++;
620 static inline void ixgbe_release_rx_desc(struct ixgbe_hw
*hw
,
621 struct ixgbe_ring
*rx_ring
, u32 val
)
624 * Force memory writes to complete before letting h/w
625 * know there are new descriptors to fetch. (Only
626 * applicable for weak-ordered memory model archs,
630 IXGBE_WRITE_REG(hw
, IXGBE_RDT(rx_ring
->reg_idx
), val
);
634 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
635 * @adapter: address of board private structure
637 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
638 struct ixgbe_ring
*rx_ring
,
641 struct pci_dev
*pdev
= adapter
->pdev
;
642 union ixgbe_adv_rx_desc
*rx_desc
;
643 struct ixgbe_rx_buffer
*bi
;
646 i
= rx_ring
->next_to_use
;
647 bi
= &rx_ring
->rx_buffer_info
[i
];
649 while (cleaned_count
--) {
650 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
653 (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
)) {
655 bi
->page
= alloc_page(GFP_ATOMIC
);
657 adapter
->alloc_rx_page_failed
++;
662 /* use a half page if we're re-using */
663 bi
->page_offset
^= (PAGE_SIZE
/ 2);
666 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
674 skb
= netdev_alloc_skb_ip_align(adapter
->netdev
,
675 rx_ring
->rx_buf_len
);
678 adapter
->alloc_rx_buff_failed
++;
683 bi
->dma
= pci_map_single(pdev
, skb
->data
,
687 /* Refresh the desc even if buffer_addrs didn't change because
688 * each write-back erases this info. */
689 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
690 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
691 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
693 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
697 if (i
== rx_ring
->count
)
699 bi
= &rx_ring
->rx_buffer_info
[i
];
703 if (rx_ring
->next_to_use
!= i
) {
704 rx_ring
->next_to_use
= i
;
706 i
= (rx_ring
->count
- 1);
708 ixgbe_release_rx_desc(&adapter
->hw
, rx_ring
, i
);
712 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
714 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
717 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
719 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
722 static inline u32
ixgbe_get_rsc_count(union ixgbe_adv_rx_desc
*rx_desc
)
724 return (le32_to_cpu(rx_desc
->wb
.lower
.lo_dword
.data
) &
725 IXGBE_RXDADV_RSCCNT_MASK
) >>
726 IXGBE_RXDADV_RSCCNT_SHIFT
;
730 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
731 * @skb: pointer to the last skb in the rsc queue
733 * This function changes a queue full of hw rsc buffers into a completed
734 * packet. It uses the ->prev pointers to find the first packet and then
735 * turns it into the frag list owner.
737 static inline struct sk_buff
*ixgbe_transform_rsc_queue(struct sk_buff
*skb
)
739 unsigned int frag_list_size
= 0;
742 struct sk_buff
*prev
= skb
->prev
;
743 frag_list_size
+= skb
->len
;
748 skb_shinfo(skb
)->frag_list
= skb
->next
;
750 skb
->len
+= frag_list_size
;
751 skb
->data_len
+= frag_list_size
;
752 skb
->truesize
+= frag_list_size
;
756 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
757 struct ixgbe_ring
*rx_ring
,
758 int *work_done
, int work_to_do
)
760 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
761 struct net_device
*netdev
= adapter
->netdev
;
762 struct pci_dev
*pdev
= adapter
->pdev
;
763 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
764 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
766 unsigned int i
, rsc_count
= 0;
769 bool cleaned
= false;
770 int cleaned_count
= 0;
771 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
774 #endif /* IXGBE_FCOE */
776 i
= rx_ring
->next_to_clean
;
777 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
778 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
779 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
781 while (staterr
& IXGBE_RXD_STAT_DD
) {
783 if (*work_done
>= work_to_do
)
787 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
788 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
789 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
790 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
791 if (hdr_info
& IXGBE_RXDADV_SPH
)
792 adapter
->rx_hdr_split
++;
793 if (len
> IXGBE_RX_HDR_SIZE
)
794 len
= IXGBE_RX_HDR_SIZE
;
795 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
797 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
801 skb
= rx_buffer_info
->skb
;
802 prefetch(skb
->data
- NET_IP_ALIGN
);
803 rx_buffer_info
->skb
= NULL
;
805 if (rx_buffer_info
->dma
) {
806 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
809 rx_buffer_info
->dma
= 0;
814 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
815 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
816 rx_buffer_info
->page_dma
= 0;
817 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
818 rx_buffer_info
->page
,
819 rx_buffer_info
->page_offset
,
822 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
823 (page_count(rx_buffer_info
->page
) != 1))
824 rx_buffer_info
->page
= NULL
;
826 get_page(rx_buffer_info
->page
);
828 skb
->len
+= upper_len
;
829 skb
->data_len
+= upper_len
;
830 skb
->truesize
+= upper_len
;
834 if (i
== rx_ring
->count
)
837 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
841 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
842 rsc_count
= ixgbe_get_rsc_count(rx_desc
);
845 u32 nextp
= (staterr
& IXGBE_RXDADV_NEXTP_MASK
) >>
846 IXGBE_RXDADV_NEXTP_SHIFT
;
847 next_buffer
= &rx_ring
->rx_buffer_info
[nextp
];
848 rx_ring
->rsc_count
+= (rsc_count
- 1);
850 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
853 if (staterr
& IXGBE_RXD_STAT_EOP
) {
855 skb
= ixgbe_transform_rsc_queue(skb
);
856 rx_ring
->stats
.packets
++;
857 rx_ring
->stats
.bytes
+= skb
->len
;
859 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
860 rx_buffer_info
->skb
= next_buffer
->skb
;
861 rx_buffer_info
->dma
= next_buffer
->dma
;
862 next_buffer
->skb
= skb
;
863 next_buffer
->dma
= 0;
865 skb
->next
= next_buffer
->skb
;
866 skb
->next
->prev
= skb
;
868 adapter
->non_eop_descs
++;
872 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
873 dev_kfree_skb_irq(skb
);
877 ixgbe_rx_checksum(adapter
, rx_desc
, skb
);
879 /* probably a little skewed due to removing CRC */
880 total_rx_bytes
+= skb
->len
;
883 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
885 /* if ddp, not passing to ULD unless for FCP_RSP or error */
886 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
887 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
891 #endif /* IXGBE_FCOE */
892 ixgbe_receive_skb(q_vector
, skb
, staterr
, rx_ring
, rx_desc
);
895 rx_desc
->wb
.upper
.status_error
= 0;
897 /* return some buffers to hardware, one at a time is too slow */
898 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
899 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
903 /* use prefetched values */
905 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
907 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
910 rx_ring
->next_to_clean
= i
;
911 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
914 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
917 /* include DDPed FCoE data */
921 mss
= adapter
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
922 sizeof(struct fc_frame_header
) -
923 sizeof(struct fcoe_crc_eof
);
926 total_rx_bytes
+= ddp_bytes
;
927 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
929 #endif /* IXGBE_FCOE */
931 rx_ring
->total_packets
+= total_rx_packets
;
932 rx_ring
->total_bytes
+= total_rx_bytes
;
933 netdev
->stats
.rx_bytes
+= total_rx_bytes
;
934 netdev
->stats
.rx_packets
+= total_rx_packets
;
939 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
941 * ixgbe_configure_msix - Configure MSI-X hardware
942 * @adapter: board private structure
944 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
947 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
949 struct ixgbe_q_vector
*q_vector
;
950 int i
, j
, q_vectors
, v_idx
, r_idx
;
953 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
956 * Populate the IVAR table and set the ITR values to the
957 * corresponding register.
959 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
960 q_vector
= adapter
->q_vector
[v_idx
];
961 /* XXX for_each_bit(...) */
962 r_idx
= find_first_bit(q_vector
->rxr_idx
,
963 adapter
->num_rx_queues
);
965 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
966 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
967 ixgbe_set_ivar(adapter
, 0, j
, v_idx
);
968 r_idx
= find_next_bit(q_vector
->rxr_idx
,
969 adapter
->num_rx_queues
,
972 r_idx
= find_first_bit(q_vector
->txr_idx
,
973 adapter
->num_tx_queues
);
975 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
976 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
977 ixgbe_set_ivar(adapter
, 1, j
, v_idx
);
978 r_idx
= find_next_bit(q_vector
->txr_idx
,
979 adapter
->num_tx_queues
,
983 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
985 q_vector
->eitr
= adapter
->tx_eitr_param
;
986 else if (q_vector
->rxr_count
)
988 q_vector
->eitr
= adapter
->rx_eitr_param
;
990 ixgbe_write_eitr(q_vector
);
993 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
994 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
996 else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
997 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
998 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1000 /* set up to autoclear timer, and the vectors */
1001 mask
= IXGBE_EIMS_ENABLE_MASK
;
1002 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
1003 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1006 enum latency_range
{
1010 latency_invalid
= 255
1014 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1015 * @adapter: pointer to adapter
1016 * @eitr: eitr setting (ints per sec) to give last timeslice
1017 * @itr_setting: current throttle rate in ints/second
1018 * @packets: the number of packets during this measurement interval
1019 * @bytes: the number of bytes during this measurement interval
1021 * Stores a new ITR value based on packets and byte
1022 * counts during the last interrupt. The advantage of per interrupt
1023 * computation is faster updates and more accurate ITR for the current
1024 * traffic pattern. Constants in this function were computed
1025 * based on theoretical maximum wire speed and thresholds were set based
1026 * on testing data as well as attempting to minimize response time
1027 * while increasing bulk throughput.
1028 * this functionality is controlled by the InterruptThrottleRate module
1029 * parameter (see ixgbe_param.c)
1031 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
1032 u32 eitr
, u8 itr_setting
,
1033 int packets
, int bytes
)
1035 unsigned int retval
= itr_setting
;
1040 goto update_itr_done
;
1043 /* simple throttlerate management
1044 * 0-20MB/s lowest (100000 ints/s)
1045 * 20-100MB/s low (20000 ints/s)
1046 * 100-1249MB/s bulk (8000 ints/s)
1048 /* what was last interrupt timeslice? */
1049 timepassed_us
= 1000000/eitr
;
1050 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
1052 switch (itr_setting
) {
1053 case lowest_latency
:
1054 if (bytes_perint
> adapter
->eitr_low
)
1055 retval
= low_latency
;
1058 if (bytes_perint
> adapter
->eitr_high
)
1059 retval
= bulk_latency
;
1060 else if (bytes_perint
<= adapter
->eitr_low
)
1061 retval
= lowest_latency
;
1064 if (bytes_perint
<= adapter
->eitr_high
)
1065 retval
= low_latency
;
1074 * ixgbe_write_eitr - write EITR register in hardware specific way
1075 * @q_vector: structure containing interrupt and ring information
1077 * This function is made to be called by ethtool and by the driver
1078 * when it needs to update EITR registers at runtime. Hardware
1079 * specific quirks/differences are taken care of here.
1081 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1083 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1084 struct ixgbe_hw
*hw
= &adapter
->hw
;
1085 int v_idx
= q_vector
->v_idx
;
1086 u32 itr_reg
= EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
);
1088 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1089 /* must write high and low 16 bits to reset counter */
1090 itr_reg
|= (itr_reg
<< 16);
1091 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1093 * set the WDIS bit to not clear the timer bits and cause an
1094 * immediate assertion of the interrupt
1096 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1098 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1101 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
1103 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1105 u8 current_itr
, ret_itr
;
1107 struct ixgbe_ring
*rx_ring
, *tx_ring
;
1109 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1110 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1111 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1112 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1114 tx_ring
->total_packets
,
1115 tx_ring
->total_bytes
);
1116 /* if the result for this queue would decrease interrupt
1117 * rate for this vector then use that result */
1118 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
1119 q_vector
->tx_itr
- 1 : ret_itr
);
1120 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1124 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1125 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1126 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1127 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1129 rx_ring
->total_packets
,
1130 rx_ring
->total_bytes
);
1131 /* if the result for this queue would decrease interrupt
1132 * rate for this vector then use that result */
1133 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
1134 q_vector
->rx_itr
- 1 : ret_itr
);
1135 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1139 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1141 switch (current_itr
) {
1142 /* counts and packets in update_itr are dependent on these numbers */
1143 case lowest_latency
:
1147 new_itr
= 20000; /* aka hwitr = ~200 */
1155 if (new_itr
!= q_vector
->eitr
) {
1156 /* do an exponential smoothing */
1157 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1159 /* save the algorithm value here, not the smoothed one */
1160 q_vector
->eitr
= new_itr
;
1162 ixgbe_write_eitr(q_vector
);
1168 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
1170 struct ixgbe_hw
*hw
= &adapter
->hw
;
1172 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
1173 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
1174 DPRINTK(PROBE
, CRIT
, "Fan has stopped, replace the adapter\n");
1175 /* write to clear the interrupt */
1176 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1180 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
1182 struct ixgbe_hw
*hw
= &adapter
->hw
;
1184 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
1185 /* Clear the interrupt */
1186 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1187 schedule_work(&adapter
->multispeed_fiber_task
);
1188 } else if (eicr
& IXGBE_EICR_GPI_SDP2
) {
1189 /* Clear the interrupt */
1190 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
1191 schedule_work(&adapter
->sfp_config_module_task
);
1193 /* Interrupt isn't for us... */
1198 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
1200 struct ixgbe_hw
*hw
= &adapter
->hw
;
1203 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1204 adapter
->link_check_timeout
= jiffies
;
1205 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1206 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
1207 IXGBE_WRITE_FLUSH(hw
);
1208 schedule_work(&adapter
->watchdog_task
);
1212 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
1214 struct net_device
*netdev
= data
;
1215 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1216 struct ixgbe_hw
*hw
= &adapter
->hw
;
1220 * Workaround for Silicon errata. Use clear-by-write instead
1221 * of clear-by-read. Reading with EICS will return the
1222 * interrupt causes without clearing, which later be done
1223 * with the write to EICR.
1225 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
1226 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
1228 if (eicr
& IXGBE_EICR_LSC
)
1229 ixgbe_check_lsc(adapter
);
1231 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1232 ixgbe_check_fan_failure(adapter
, eicr
);
1234 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1235 ixgbe_check_sfp_event(adapter
, eicr
);
1237 /* Handle Flow Director Full threshold interrupt */
1238 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
1240 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_FLOW_DIR
);
1241 /* Disable transmits before FDIR Re-initialization */
1242 netif_tx_stop_all_queues(netdev
);
1243 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1244 struct ixgbe_ring
*tx_ring
=
1245 &adapter
->tx_ring
[i
];
1246 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE
,
1247 &tx_ring
->reinit_state
))
1248 schedule_work(&adapter
->fdir_reinit_task
);
1252 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1253 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
1258 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
1263 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1264 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1265 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1267 mask
= (qmask
& 0xFFFFFFFF);
1268 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(0), mask
);
1269 mask
= (qmask
>> 32);
1270 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1), mask
);
1272 /* skip the flush */
1275 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
1280 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1281 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1282 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, mask
);
1284 mask
= (qmask
& 0xFFFFFFFF);
1285 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), mask
);
1286 mask
= (qmask
>> 32);
1287 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), mask
);
1289 /* skip the flush */
1292 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
1294 struct ixgbe_q_vector
*q_vector
= data
;
1295 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1296 struct ixgbe_ring
*tx_ring
;
1299 if (!q_vector
->txr_count
)
1302 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1303 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1304 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1305 tx_ring
->total_bytes
= 0;
1306 tx_ring
->total_packets
= 0;
1307 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1311 /* disable interrupts on this vector only */
1312 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1313 napi_schedule(&q_vector
->napi
);
1319 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1321 * @data: pointer to our q_vector struct for this interrupt vector
1323 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
1325 struct ixgbe_q_vector
*q_vector
= data
;
1326 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1327 struct ixgbe_ring
*rx_ring
;
1331 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1332 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1333 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1334 rx_ring
->total_bytes
= 0;
1335 rx_ring
->total_packets
= 0;
1336 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1340 if (!q_vector
->rxr_count
)
1343 /* disable interrupts on this vector only */
1344 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1345 napi_schedule(&q_vector
->napi
);
1350 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1352 struct ixgbe_q_vector
*q_vector
= data
;
1353 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1354 struct ixgbe_ring
*ring
;
1358 if (!q_vector
->txr_count
&& !q_vector
->rxr_count
)
1361 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1362 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1363 ring
= &(adapter
->tx_ring
[r_idx
]);
1364 ring
->total_bytes
= 0;
1365 ring
->total_packets
= 0;
1366 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1370 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1371 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1372 ring
= &(adapter
->rx_ring
[r_idx
]);
1373 ring
->total_bytes
= 0;
1374 ring
->total_packets
= 0;
1375 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1379 /* disable interrupts on this vector only */
1380 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1381 napi_schedule(&q_vector
->napi
);
1387 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1388 * @napi: napi struct with our devices info in it
1389 * @budget: amount of work driver is allowed to do this pass, in packets
1391 * This function is optimized for cleaning one queue only on a single
1394 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1396 struct ixgbe_q_vector
*q_vector
=
1397 container_of(napi
, struct ixgbe_q_vector
, napi
);
1398 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1399 struct ixgbe_ring
*rx_ring
= NULL
;
1403 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1404 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1405 #ifdef CONFIG_IXGBE_DCA
1406 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1407 ixgbe_update_rx_dca(adapter
, rx_ring
);
1410 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1412 /* If all Rx work done, exit the polling mode */
1413 if (work_done
< budget
) {
1414 napi_complete(napi
);
1415 if (adapter
->rx_itr_setting
& 1)
1416 ixgbe_set_itr_msix(q_vector
);
1417 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1418 ixgbe_irq_enable_queues(adapter
,
1419 ((u64
)1 << q_vector
->v_idx
));
1426 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
1427 * @napi: napi struct with our devices info in it
1428 * @budget: amount of work driver is allowed to do this pass, in packets
1430 * This function will clean more than one rx queue associated with a
1433 static int ixgbe_clean_rxtx_many(struct napi_struct
*napi
, int budget
)
1435 struct ixgbe_q_vector
*q_vector
=
1436 container_of(napi
, struct ixgbe_q_vector
, napi
);
1437 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1438 struct ixgbe_ring
*ring
= NULL
;
1439 int work_done
= 0, i
;
1441 bool tx_clean_complete
= true;
1443 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1444 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1445 ring
= &(adapter
->tx_ring
[r_idx
]);
1446 #ifdef CONFIG_IXGBE_DCA
1447 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1448 ixgbe_update_tx_dca(adapter
, ring
);
1450 tx_clean_complete
&= ixgbe_clean_tx_irq(q_vector
, ring
);
1451 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1455 /* attempt to distribute budget to each queue fairly, but don't allow
1456 * the budget to go below 1 because we'll exit polling */
1457 budget
/= (q_vector
->rxr_count
?: 1);
1458 budget
= max(budget
, 1);
1459 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1460 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1461 ring
= &(adapter
->rx_ring
[r_idx
]);
1462 #ifdef CONFIG_IXGBE_DCA
1463 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1464 ixgbe_update_rx_dca(adapter
, ring
);
1466 ixgbe_clean_rx_irq(q_vector
, ring
, &work_done
, budget
);
1467 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1471 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1472 ring
= &(adapter
->rx_ring
[r_idx
]);
1473 /* If all Rx work done, exit the polling mode */
1474 if (work_done
< budget
) {
1475 napi_complete(napi
);
1476 if (adapter
->rx_itr_setting
& 1)
1477 ixgbe_set_itr_msix(q_vector
);
1478 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1479 ixgbe_irq_enable_queues(adapter
,
1480 ((u64
)1 << q_vector
->v_idx
));
1488 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1489 * @napi: napi struct with our devices info in it
1490 * @budget: amount of work driver is allowed to do this pass, in packets
1492 * This function is optimized for cleaning one queue only on a single
1495 static int ixgbe_clean_txonly(struct napi_struct
*napi
, int budget
)
1497 struct ixgbe_q_vector
*q_vector
=
1498 container_of(napi
, struct ixgbe_q_vector
, napi
);
1499 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1500 struct ixgbe_ring
*tx_ring
= NULL
;
1504 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1505 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1506 #ifdef CONFIG_IXGBE_DCA
1507 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1508 ixgbe_update_tx_dca(adapter
, tx_ring
);
1511 if (!ixgbe_clean_tx_irq(q_vector
, tx_ring
))
1514 /* If all Tx work done, exit the polling mode */
1515 if (work_done
< budget
) {
1516 napi_complete(napi
);
1517 if (adapter
->tx_itr_setting
& 1)
1518 ixgbe_set_itr_msix(q_vector
);
1519 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1520 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1526 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1529 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
1531 set_bit(r_idx
, q_vector
->rxr_idx
);
1532 q_vector
->rxr_count
++;
1535 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1538 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
1540 set_bit(t_idx
, q_vector
->txr_idx
);
1541 q_vector
->txr_count
++;
1545 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1546 * @adapter: board private structure to initialize
1547 * @vectors: allotted vector count for descriptor rings
1549 * This function maps descriptor rings to the queue-specific vectors
1550 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1551 * one vector per ring/queue, but on a constrained vector budget, we
1552 * group the rings as "efficiently" as possible. You would add new
1553 * mapping configurations in here.
1555 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1559 int rxr_idx
= 0, txr_idx
= 0;
1560 int rxr_remaining
= adapter
->num_rx_queues
;
1561 int txr_remaining
= adapter
->num_tx_queues
;
1566 /* No mapping required if MSI-X is disabled. */
1567 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1571 * The ideal configuration...
1572 * We have enough vectors to map one per queue.
1574 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1575 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1576 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1578 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1579 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1585 * If we don't have enough vectors for a 1-to-1
1586 * mapping, we'll have to group them so there are
1587 * multiple queues per vector.
1589 /* Re-adjusting *qpv takes care of the remainder. */
1590 for (i
= v_start
; i
< vectors
; i
++) {
1591 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1592 for (j
= 0; j
< rqpv
; j
++) {
1593 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1598 for (i
= v_start
; i
< vectors
; i
++) {
1599 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1600 for (j
= 0; j
< tqpv
; j
++) {
1601 map_vector_to_txq(adapter
, i
, txr_idx
);
1612 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1613 * @adapter: board private structure
1615 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1616 * interrupts from the kernel.
1618 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1620 struct net_device
*netdev
= adapter
->netdev
;
1621 irqreturn_t (*handler
)(int, void *);
1622 int i
, vector
, q_vectors
, err
;
1625 /* Decrement for Other and TCP Timer vectors */
1626 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1628 /* Map the Tx/Rx rings to the vectors we were allotted. */
1629 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1633 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1634 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1635 &ixgbe_msix_clean_many)
1636 for (vector
= 0; vector
< q_vectors
; vector
++) {
1637 handler
= SET_HANDLER(adapter
->q_vector
[vector
]);
1639 if(handler
== &ixgbe_msix_clean_rx
) {
1640 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1641 netdev
->name
, "rx", ri
++);
1643 else if(handler
== &ixgbe_msix_clean_tx
) {
1644 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1645 netdev
->name
, "tx", ti
++);
1648 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1649 netdev
->name
, "TxRx", vector
);
1651 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1652 handler
, 0, adapter
->name
[vector
],
1653 adapter
->q_vector
[vector
]);
1656 "request_irq failed for MSIX interrupt "
1657 "Error: %d\n", err
);
1658 goto free_queue_irqs
;
1662 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1663 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1664 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1667 "request_irq for msix_lsc failed: %d\n", err
);
1668 goto free_queue_irqs
;
1674 for (i
= vector
- 1; i
>= 0; i
--)
1675 free_irq(adapter
->msix_entries
[--vector
].vector
,
1676 adapter
->q_vector
[i
]);
1677 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1678 pci_disable_msix(adapter
->pdev
);
1679 kfree(adapter
->msix_entries
);
1680 adapter
->msix_entries
= NULL
;
1685 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1687 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
1689 u32 new_itr
= q_vector
->eitr
;
1690 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1691 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1693 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1695 tx_ring
->total_packets
,
1696 tx_ring
->total_bytes
);
1697 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1699 rx_ring
->total_packets
,
1700 rx_ring
->total_bytes
);
1702 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1704 switch (current_itr
) {
1705 /* counts and packets in update_itr are dependent on these numbers */
1706 case lowest_latency
:
1710 new_itr
= 20000; /* aka hwitr = ~200 */
1719 if (new_itr
!= q_vector
->eitr
) {
1720 /* do an exponential smoothing */
1721 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1723 /* save the algorithm value here, not the smoothed one */
1724 q_vector
->eitr
= new_itr
;
1726 ixgbe_write_eitr(q_vector
);
1733 * ixgbe_irq_enable - Enable default interrupt generation settings
1734 * @adapter: board private structure
1736 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1740 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
1741 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
1742 mask
|= IXGBE_EIMS_GPI_SDP1
;
1743 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1744 mask
|= IXGBE_EIMS_ECC
;
1745 mask
|= IXGBE_EIMS_GPI_SDP1
;
1746 mask
|= IXGBE_EIMS_GPI_SDP2
;
1748 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
1749 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
1750 mask
|= IXGBE_EIMS_FLOW_DIR
;
1752 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1753 ixgbe_irq_enable_queues(adapter
, ~0);
1754 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1758 * ixgbe_intr - legacy mode Interrupt Handler
1759 * @irq: interrupt number
1760 * @data: pointer to a network interface device structure
1762 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1764 struct net_device
*netdev
= data
;
1765 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1766 struct ixgbe_hw
*hw
= &adapter
->hw
;
1767 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
1771 * Workaround for silicon errata. Mask the interrupts
1772 * before the read of EICR.
1774 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
1776 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1777 * therefore no explict interrupt disable is necessary */
1778 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1780 /* shared interrupt alert!
1781 * make sure interrupts are enabled because the read will
1782 * have disabled interrupts due to EIAM */
1783 ixgbe_irq_enable(adapter
);
1784 return IRQ_NONE
; /* Not our interrupt */
1787 if (eicr
& IXGBE_EICR_LSC
)
1788 ixgbe_check_lsc(adapter
);
1790 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
1791 ixgbe_check_sfp_event(adapter
, eicr
);
1793 ixgbe_check_fan_failure(adapter
, eicr
);
1795 if (napi_schedule_prep(&(q_vector
->napi
))) {
1796 adapter
->tx_ring
[0].total_packets
= 0;
1797 adapter
->tx_ring
[0].total_bytes
= 0;
1798 adapter
->rx_ring
[0].total_packets
= 0;
1799 adapter
->rx_ring
[0].total_bytes
= 0;
1800 /* would disable interrupts here but EIAM disabled it */
1801 __napi_schedule(&(q_vector
->napi
));
1807 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1809 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1811 for (i
= 0; i
< q_vectors
; i
++) {
1812 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
1813 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1814 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1815 q_vector
->rxr_count
= 0;
1816 q_vector
->txr_count
= 0;
1821 * ixgbe_request_irq - initialize interrupts
1822 * @adapter: board private structure
1824 * Attempts to configure interrupts using the best available
1825 * capabilities of the hardware and kernel.
1827 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1829 struct net_device
*netdev
= adapter
->netdev
;
1832 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1833 err
= ixgbe_request_msix_irqs(adapter
);
1834 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1835 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1836 netdev
->name
, netdev
);
1838 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1839 netdev
->name
, netdev
);
1843 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1848 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1850 struct net_device
*netdev
= adapter
->netdev
;
1852 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1855 q_vectors
= adapter
->num_msix_vectors
;
1858 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1861 for (; i
>= 0; i
--) {
1862 free_irq(adapter
->msix_entries
[i
].vector
,
1863 adapter
->q_vector
[i
]);
1866 ixgbe_reset_q_vectors(adapter
);
1868 free_irq(adapter
->pdev
->irq
, netdev
);
1873 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1874 * @adapter: board private structure
1876 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1878 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1879 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1881 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
1882 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
1883 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
1885 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1886 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1888 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1889 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1891 synchronize_irq(adapter
->pdev
->irq
);
1896 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1899 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1901 struct ixgbe_hw
*hw
= &adapter
->hw
;
1903 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1904 EITR_INTS_PER_SEC_TO_REG(adapter
->rx_eitr_param
));
1906 ixgbe_set_ivar(adapter
, 0, 0, 0);
1907 ixgbe_set_ivar(adapter
, 1, 0, 0);
1909 map_vector_to_rxq(adapter
, 0, 0);
1910 map_vector_to_txq(adapter
, 0, 0);
1912 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1916 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1917 * @adapter: board private structure
1919 * Configure the Tx unit of the MAC after a reset.
1921 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1924 struct ixgbe_hw
*hw
= &adapter
->hw
;
1925 u32 i
, j
, tdlen
, txctrl
;
1927 /* Setup the HW Tx Head and Tail descriptor pointers */
1928 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1929 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1932 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1933 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1934 (tdba
& DMA_BIT_MASK(32)));
1935 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1936 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1937 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1938 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1939 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1940 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1942 * Disable Tx Head Writeback RO bit, since this hoses
1943 * bookkeeping if things aren't delivered in order.
1945 switch (hw
->mac
.type
) {
1946 case ixgbe_mac_82598EB
:
1947 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1949 case ixgbe_mac_82599EB
:
1951 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL_82599(j
));
1954 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1955 switch (hw
->mac
.type
) {
1956 case ixgbe_mac_82598EB
:
1957 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1959 case ixgbe_mac_82599EB
:
1961 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL_82599(j
), txctrl
);
1966 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1969 /* disable the arbiter while setting MTQC */
1970 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
1971 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
1972 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
1974 /* We enable 8 traffic classes, DCB only */
1975 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
1976 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, (IXGBE_MTQC_RT_ENA
|
1977 IXGBE_MTQC_8TC_8TQ
));
1979 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, IXGBE_MTQC_64Q_1PB
);
1981 /* re-eable the arbiter */
1982 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
1983 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
1987 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1989 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
1990 struct ixgbe_ring
*rx_ring
)
1994 struct ixgbe_ring_feature
*feature
= adapter
->ring_feature
;
1996 index
= rx_ring
->reg_idx
;
1997 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1999 mask
= (unsigned long) feature
[RING_F_RSS
].mask
;
2000 index
= index
& mask
;
2002 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
2004 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
2005 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
2007 srrctl
|= (IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
2008 IXGBE_SRRCTL_BSIZEHDR_MASK
;
2010 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2011 #if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
2012 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2014 srrctl
|= (PAGE_SIZE
/ 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2016 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2018 srrctl
|= ALIGN(rx_ring
->rx_buf_len
, 1024) >>
2019 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2020 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2023 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
2026 static u32
ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2031 if (!(adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
))
2034 mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
2035 #ifdef CONFIG_IXGBE_DCB
2036 | IXGBE_FLAG_DCB_ENABLED
2041 case (IXGBE_FLAG_RSS_ENABLED
):
2042 mrqc
= IXGBE_MRQC_RSSEN
;
2044 #ifdef CONFIG_IXGBE_DCB
2045 case (IXGBE_FLAG_DCB_ENABLED
):
2046 mrqc
= IXGBE_MRQC_RT8TCEN
;
2048 #endif /* CONFIG_IXGBE_DCB */
2057 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2058 * @adapter: address of board private structure
2059 * @index: index of ring to set
2060 * @rx_buf_len: rx buffer length
2062 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
, int index
,
2065 struct ixgbe_ring
*rx_ring
;
2066 struct ixgbe_hw
*hw
= &adapter
->hw
;
2070 rx_ring
= &adapter
->rx_ring
[index
];
2071 j
= rx_ring
->reg_idx
;
2072 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(j
));
2073 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2075 * we must limit the number of descriptors so that the
2076 * total size of max desc * buf_len is not greater
2079 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2080 #if (MAX_SKB_FRAGS > 16)
2081 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2082 #elif (MAX_SKB_FRAGS > 8)
2083 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2084 #elif (MAX_SKB_FRAGS > 4)
2085 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2087 rscctrl
|= IXGBE_RSCCTL_MAXDESC_1
;
2090 if (rx_buf_len
< IXGBE_RXBUFFER_4096
)
2091 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2092 else if (rx_buf_len
< IXGBE_RXBUFFER_8192
)
2093 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2095 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2097 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(j
), rscctrl
);
2101 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
2102 * @adapter: board private structure
2104 * Configure the Rx unit of the MAC after a reset.
2106 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
2109 struct ixgbe_hw
*hw
= &adapter
->hw
;
2110 struct ixgbe_ring
*rx_ring
;
2111 struct net_device
*netdev
= adapter
->netdev
;
2112 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2114 u32 rdlen
, rxctrl
, rxcsum
;
2115 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2116 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2117 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2119 u32 reta
= 0, mrqc
= 0;
2123 /* Decide whether to use packet split mode or not */
2124 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
2126 /* Set the RX buffer length according to the mode */
2127 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
2128 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
2129 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2130 /* PSRTYPE must be initialized in 82599 */
2131 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
2132 IXGBE_PSRTYPE_UDPHDR
|
2133 IXGBE_PSRTYPE_IPV4HDR
|
2134 IXGBE_PSRTYPE_IPV6HDR
|
2135 IXGBE_PSRTYPE_L2HDR
;
2136 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(0), psrtype
);
2139 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) &&
2140 (netdev
->mtu
<= ETH_DATA_LEN
))
2141 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
2143 rx_buf_len
= ALIGN(max_frame
, 1024);
2146 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
2147 fctrl
|= IXGBE_FCTRL_BAM
;
2148 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
2149 fctrl
|= IXGBE_FCTRL_PMCF
;
2150 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
2152 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
2153 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
2154 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
2156 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2158 if (netdev
->features
& NETIF_F_FCOE_MTU
)
2159 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2161 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
2163 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
2164 /* disable receives while setting up the descriptors */
2165 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2166 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2169 * Setup the HW Rx Head and Tail Descriptor Pointers and
2170 * the Base and Length of the Rx Descriptor Ring
2172 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2173 rx_ring
= &adapter
->rx_ring
[i
];
2174 rdba
= rx_ring
->dma
;
2175 j
= rx_ring
->reg_idx
;
2176 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_BIT_MASK(32)));
2177 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
2178 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
2179 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
2180 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
2181 rx_ring
->head
= IXGBE_RDH(j
);
2182 rx_ring
->tail
= IXGBE_RDT(j
);
2183 rx_ring
->rx_buf_len
= rx_buf_len
;
2185 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)
2186 rx_ring
->flags
|= IXGBE_RING_RX_PS_ENABLED
;
2188 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2191 if (netdev
->features
& NETIF_F_FCOE_MTU
) {
2192 struct ixgbe_ring_feature
*f
;
2193 f
= &adapter
->ring_feature
[RING_F_FCOE
];
2194 if ((i
>= f
->mask
) && (i
< f
->mask
+ f
->indices
)) {
2195 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2196 if (rx_buf_len
< IXGBE_FCOE_JUMBO_FRAME_SIZE
)
2197 rx_ring
->rx_buf_len
=
2198 IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2202 #endif /* IXGBE_FCOE */
2203 ixgbe_configure_srrctl(adapter
, rx_ring
);
2206 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2208 * For VMDq support of different descriptor types or
2209 * buffer sizes through the use of multiple SRRCTL
2210 * registers, RDRXCTL.MVMEN must be set to 1
2212 * also, the manual doesn't mention it clearly but DCA hints
2213 * will only use queue 0's tags unless this bit is set. Side
2214 * effects of setting this bit are only that SRRCTL must be
2215 * fully programmed [0..15]
2217 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2218 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
2219 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
2222 /* Program MRQC for the distribution of queues */
2223 mrqc
= ixgbe_setup_mrqc(adapter
);
2225 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
2226 /* Fill out redirection table */
2227 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2228 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
2230 /* reta = 4-byte sliding window of
2231 * 0x00..(indices-1)(indices-1)00..etc. */
2232 reta
= (reta
<< 8) | (j
* 0x11);
2234 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2237 /* Fill out hash function seeds */
2238 for (i
= 0; i
< 10; i
++)
2239 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2241 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2242 mrqc
|= IXGBE_MRQC_RSSEN
;
2243 /* Perform hash on these packet types */
2244 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2245 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2246 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
2247 | IXGBE_MRQC_RSS_FIELD_IPV6
2248 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
2249 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
2251 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2253 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2255 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
2256 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
2257 /* Disable indicating checksum in descriptor, enables
2259 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2261 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
2262 /* Enable IPv4 payload checksum for UDP fragments
2263 * if PCSD is not set */
2264 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
2267 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2269 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2270 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2271 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
2272 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
2273 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
2276 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
2277 /* Enable 82599 HW-RSC */
2278 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2279 ixgbe_configure_rscctl(adapter
, i
, rx_buf_len
);
2281 /* Disable RSC for ACK packets */
2282 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
2283 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
2287 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
2289 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2290 struct ixgbe_hw
*hw
= &adapter
->hw
;
2292 /* add VID to filter table */
2293 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
2296 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
2298 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2299 struct ixgbe_hw
*hw
= &adapter
->hw
;
2301 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2302 ixgbe_irq_disable(adapter
);
2304 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
2306 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2307 ixgbe_irq_enable(adapter
);
2309 /* remove VID from filter table */
2310 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
2313 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
2314 struct vlan_group
*grp
)
2316 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2320 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2321 ixgbe_irq_disable(adapter
);
2322 adapter
->vlgrp
= grp
;
2325 * For a DCB driver, always enable VLAN tag stripping so we can
2326 * still receive traffic from a DCB-enabled host even if we're
2329 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
2330 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2331 ctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
2332 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2333 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
2334 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
2335 ctrl
|= IXGBE_VLNCTRL_VFE
;
2336 /* enable VLAN tag insert/strip */
2337 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
2338 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2339 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
2340 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2341 j
= adapter
->rx_ring
[i
].reg_idx
;
2342 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RXDCTL(j
));
2343 ctrl
|= IXGBE_RXDCTL_VME
;
2344 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXDCTL(j
), ctrl
);
2347 ixgbe_vlan_rx_add_vid(netdev
, 0);
2349 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2350 ixgbe_irq_enable(adapter
);
2353 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
2355 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
2357 if (adapter
->vlgrp
) {
2359 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
2360 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
2362 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
2367 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
2369 struct dev_mc_list
*mc_ptr
;
2370 u8
*addr
= *mc_addr_ptr
;
2373 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
2375 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
2377 *mc_addr_ptr
= NULL
;
2383 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
2384 * @netdev: network interface device structure
2386 * The set_rx_method entry point is called whenever the unicast/multicast
2387 * address list or the network interface flags are updated. This routine is
2388 * responsible for configuring the hardware for proper unicast, multicast and
2391 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
2393 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2394 struct ixgbe_hw
*hw
= &adapter
->hw
;
2396 u8
*addr_list
= NULL
;
2399 /* Check for Promiscuous and All Multicast modes */
2401 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
2402 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2404 if (netdev
->flags
& IFF_PROMISC
) {
2405 hw
->addr_ctrl
.user_set_promisc
= 1;
2406 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2407 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
2409 if (netdev
->flags
& IFF_ALLMULTI
) {
2410 fctrl
|= IXGBE_FCTRL_MPE
;
2411 fctrl
&= ~IXGBE_FCTRL_UPE
;
2413 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2415 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2416 hw
->addr_ctrl
.user_set_promisc
= 0;
2419 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
2420 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2422 /* reprogram secondary unicast list */
2423 hw
->mac
.ops
.update_uc_addr_list(hw
, &netdev
->uc
.list
);
2425 /* reprogram multicast list */
2426 addr_count
= netdev
->mc_count
;
2428 addr_list
= netdev
->mc_list
->dmi_addr
;
2429 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
2430 ixgbe_addr_list_itr
);
2433 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
2436 struct ixgbe_q_vector
*q_vector
;
2437 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2439 /* legacy and MSI only use one vector */
2440 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2443 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2444 struct napi_struct
*napi
;
2445 q_vector
= adapter
->q_vector
[q_idx
];
2446 napi
= &q_vector
->napi
;
2447 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2448 if (!q_vector
->rxr_count
|| !q_vector
->txr_count
) {
2449 if (q_vector
->txr_count
== 1)
2450 napi
->poll
= &ixgbe_clean_txonly
;
2451 else if (q_vector
->rxr_count
== 1)
2452 napi
->poll
= &ixgbe_clean_rxonly
;
2460 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
2463 struct ixgbe_q_vector
*q_vector
;
2464 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2466 /* legacy and MSI only use one vector */
2467 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2470 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2471 q_vector
= adapter
->q_vector
[q_idx
];
2472 napi_disable(&q_vector
->napi
);
2476 #ifdef CONFIG_IXGBE_DCB
2478 * ixgbe_configure_dcb - Configure DCB hardware
2479 * @adapter: ixgbe adapter struct
2481 * This is called by the driver on open to configure the DCB hardware.
2482 * This is also called by the gennetlink interface when reconfiguring
2485 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
2487 struct ixgbe_hw
*hw
= &adapter
->hw
;
2488 u32 txdctl
, vlnctrl
;
2491 ixgbe_dcb_check_config(&adapter
->dcb_cfg
);
2492 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_TX_CONFIG
);
2493 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_RX_CONFIG
);
2495 /* reconfigure the hardware */
2496 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
2498 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2499 j
= adapter
->tx_ring
[i
].reg_idx
;
2500 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2501 /* PThresh workaround for Tx hang with DFP enabled. */
2503 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2505 /* Enable VLAN tag insert/strip */
2506 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2507 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2508 vlnctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
2509 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2510 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2511 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2512 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2513 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2514 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2515 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2516 j
= adapter
->rx_ring
[i
].reg_idx
;
2517 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2518 vlnctrl
|= IXGBE_RXDCTL_VME
;
2519 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
2522 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
2526 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
2528 struct net_device
*netdev
= adapter
->netdev
;
2529 struct ixgbe_hw
*hw
= &adapter
->hw
;
2532 ixgbe_set_rx_mode(netdev
);
2534 ixgbe_restore_vlan(adapter
);
2535 #ifdef CONFIG_IXGBE_DCB
2536 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2537 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2538 netif_set_gso_max_size(netdev
, 32768);
2540 netif_set_gso_max_size(netdev
, 65536);
2541 ixgbe_configure_dcb(adapter
);
2543 netif_set_gso_max_size(netdev
, 65536);
2546 netif_set_gso_max_size(netdev
, 65536);
2550 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
2551 ixgbe_configure_fcoe(adapter
);
2553 #endif /* IXGBE_FCOE */
2554 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2555 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2556 adapter
->tx_ring
[i
].atr_sample_rate
=
2557 adapter
->atr_sample_rate
;
2558 ixgbe_init_fdir_signature_82599(hw
, adapter
->fdir_pballoc
);
2559 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
2560 ixgbe_init_fdir_perfect_82599(hw
, adapter
->fdir_pballoc
);
2563 ixgbe_configure_tx(adapter
);
2564 ixgbe_configure_rx(adapter
);
2565 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2566 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
2567 (adapter
->rx_ring
[i
].count
- 1));
2570 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2572 switch (hw
->phy
.type
) {
2573 case ixgbe_phy_sfp_avago
:
2574 case ixgbe_phy_sfp_ftl
:
2575 case ixgbe_phy_sfp_intel
:
2576 case ixgbe_phy_sfp_unknown
:
2577 case ixgbe_phy_tw_tyco
:
2578 case ixgbe_phy_tw_unknown
:
2586 * ixgbe_sfp_link_config - set up SFP+ link
2587 * @adapter: pointer to private adapter struct
2589 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
2591 struct ixgbe_hw
*hw
= &adapter
->hw
;
2593 if (hw
->phy
.multispeed_fiber
) {
2595 * In multispeed fiber setups, the device may not have
2596 * had a physical connection when the driver loaded.
2597 * If that's the case, the initial link configuration
2598 * couldn't get the MAC into 10G or 1G mode, so we'll
2599 * never have a link status change interrupt fire.
2600 * We need to try and force an autonegotiation
2601 * session, then bring up link.
2603 hw
->mac
.ops
.setup_sfp(hw
);
2604 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
2605 schedule_work(&adapter
->multispeed_fiber_task
);
2608 * Direct Attach Cu and non-multispeed fiber modules
2609 * still need to be configured properly prior to
2612 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_MOD_TASK
))
2613 schedule_work(&adapter
->sfp_config_module_task
);
2618 * ixgbe_non_sfp_link_config - set up non-SFP+ link
2619 * @hw: pointer to private hardware struct
2621 * Returns 0 on success, negative on failure
2623 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
2626 bool negotiation
, link_up
= false;
2627 u32 ret
= IXGBE_ERR_LINK_SETUP
;
2629 if (hw
->mac
.ops
.check_link
)
2630 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2635 if (hw
->mac
.ops
.get_link_capabilities
)
2636 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
2640 if (hw
->mac
.ops
.setup_link
)
2641 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
2646 #define IXGBE_MAX_RX_DESC_POLL 10
2647 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2650 int j
= adapter
->rx_ring
[rxr
].reg_idx
;
2653 for (k
= 0; k
< IXGBE_MAX_RX_DESC_POLL
; k
++) {
2654 if (IXGBE_READ_REG(&adapter
->hw
,
2655 IXGBE_RXDCTL(j
)) & IXGBE_RXDCTL_ENABLE
)
2660 if (k
>= IXGBE_MAX_RX_DESC_POLL
) {
2661 DPRINTK(DRV
, ERR
, "RXDCTL.ENABLE on Rx queue %d "
2662 "not set within the polling period\n", rxr
);
2664 ixgbe_release_rx_desc(&adapter
->hw
, &adapter
->rx_ring
[rxr
],
2665 (adapter
->rx_ring
[rxr
].count
- 1));
2668 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
2670 struct net_device
*netdev
= adapter
->netdev
;
2671 struct ixgbe_hw
*hw
= &adapter
->hw
;
2673 int num_rx_rings
= adapter
->num_rx_queues
;
2675 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2676 u32 txdctl
, rxdctl
, mhadd
;
2680 ixgbe_get_hw_control(adapter
);
2682 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
2683 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
2684 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2685 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
2686 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
2691 /* XXX: to interrupt immediately for EICS writes, enable this */
2692 /* gpie |= IXGBE_GPIE_EIMEN; */
2693 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2696 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2697 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2698 * specifically only auto mask tx and rx interrupts */
2699 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
2702 /* Enable fan failure interrupt if media type is copper */
2703 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
2704 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2705 gpie
|= IXGBE_SDP1_GPIEN
;
2706 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2709 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2710 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2711 gpie
|= IXGBE_SDP1_GPIEN
;
2712 gpie
|= IXGBE_SDP2_GPIEN
;
2713 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2717 /* adjust max frame to be able to do baby jumbo for FCoE */
2718 if ((netdev
->features
& NETIF_F_FCOE_MTU
) &&
2719 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
2720 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2722 #endif /* IXGBE_FCOE */
2723 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
2724 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
2725 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
2726 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
2728 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
2731 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2732 j
= adapter
->tx_ring
[i
].reg_idx
;
2733 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2734 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2735 txdctl
|= (8 << 16);
2736 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2739 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2740 /* DMATXCTL.EN must be set after all Tx queue config is done */
2741 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2742 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2743 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2745 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2746 j
= adapter
->tx_ring
[i
].reg_idx
;
2747 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2748 txdctl
|= IXGBE_TXDCTL_ENABLE
;
2749 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2752 for (i
= 0; i
< num_rx_rings
; i
++) {
2753 j
= adapter
->rx_ring
[i
].reg_idx
;
2754 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2755 /* enable PTHRESH=32 descriptors (half the internal cache)
2756 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2757 * this also removes a pesky rx_no_buffer_count increment */
2759 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
2760 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
2761 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2762 ixgbe_rx_desc_queue_enable(adapter
, i
);
2764 /* enable all receives */
2765 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2766 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2767 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
2769 rxdctl
|= IXGBE_RXCTRL_RXEN
;
2770 hw
->mac
.ops
.enable_rx_dma(hw
, rxdctl
);
2772 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2773 ixgbe_configure_msix(adapter
);
2775 ixgbe_configure_msi_and_legacy(adapter
);
2777 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
2778 ixgbe_napi_enable_all(adapter
);
2780 /* clear any pending interrupts, may auto mask */
2781 IXGBE_READ_REG(hw
, IXGBE_EICR
);
2783 ixgbe_irq_enable(adapter
);
2786 * If this adapter has a fan, check to see if we had a failure
2787 * before we enabled the interrupt.
2789 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
2790 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
2791 if (esdp
& IXGBE_ESDP_SDP1
)
2793 "Fan has stopped, replace the adapter\n");
2797 * For hot-pluggable SFP+ devices, a new SFP+ module may have
2798 * arrived before interrupts were enabled but after probe. Such
2799 * devices wouldn't have their type identified yet. We need to
2800 * kick off the SFP+ module setup first, then try to bring up link.
2801 * If we're not hot-pluggable SFP+, we just need to configure link
2804 if (hw
->phy
.type
== ixgbe_phy_unknown
) {
2805 err
= hw
->phy
.ops
.identify(hw
);
2806 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
2808 * Take the device down and schedule the sfp tasklet
2809 * which will unregister_netdev and log it.
2811 ixgbe_down(adapter
);
2812 schedule_work(&adapter
->sfp_config_module_task
);
2817 if (ixgbe_is_sfp(hw
)) {
2818 ixgbe_sfp_link_config(adapter
);
2820 err
= ixgbe_non_sfp_link_config(hw
);
2822 DPRINTK(PROBE
, ERR
, "link_config FAILED %d\n", err
);
2825 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2826 set_bit(__IXGBE_FDIR_INIT_DONE
,
2827 &(adapter
->tx_ring
[i
].reinit_state
));
2829 /* enable transmits */
2830 netif_tx_start_all_queues(netdev
);
2832 /* bring the link up in the watchdog, this could race with our first
2833 * link up interrupt but shouldn't be a problem */
2834 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2835 adapter
->link_check_timeout
= jiffies
;
2836 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2840 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2842 WARN_ON(in_interrupt());
2843 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2845 ixgbe_down(adapter
);
2847 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2850 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2852 /* hardware has been reset, we need to reload some things */
2853 ixgbe_configure(adapter
);
2855 return ixgbe_up_complete(adapter
);
2858 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2860 struct ixgbe_hw
*hw
= &adapter
->hw
;
2863 err
= hw
->mac
.ops
.init_hw(hw
);
2866 case IXGBE_ERR_SFP_NOT_PRESENT
:
2868 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
2869 dev_err(&adapter
->pdev
->dev
, "master disable timed out\n");
2871 case IXGBE_ERR_EEPROM_VERSION
:
2872 /* We are running on a pre-production device, log a warning */
2873 dev_warn(&adapter
->pdev
->dev
, "This device is a pre-production "
2874 "adapter/LOM. Please be aware there may be issues "
2875 "associated with your hardware. If you are "
2876 "experiencing problems please contact your Intel or "
2877 "hardware representative who provided you with this "
2881 dev_err(&adapter
->pdev
->dev
, "Hardware Error: %d\n", err
);
2884 /* reprogram the RAR[0] in case user changed it. */
2885 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2889 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2890 * @adapter: board private structure
2891 * @rx_ring: ring to free buffers from
2893 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2894 struct ixgbe_ring
*rx_ring
)
2896 struct pci_dev
*pdev
= adapter
->pdev
;
2900 /* Free all the Rx ring sk_buffs */
2902 for (i
= 0; i
< rx_ring
->count
; i
++) {
2903 struct ixgbe_rx_buffer
*rx_buffer_info
;
2905 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2906 if (rx_buffer_info
->dma
) {
2907 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2908 rx_ring
->rx_buf_len
,
2909 PCI_DMA_FROMDEVICE
);
2910 rx_buffer_info
->dma
= 0;
2912 if (rx_buffer_info
->skb
) {
2913 struct sk_buff
*skb
= rx_buffer_info
->skb
;
2914 rx_buffer_info
->skb
= NULL
;
2916 struct sk_buff
*this = skb
;
2918 dev_kfree_skb(this);
2921 if (!rx_buffer_info
->page
)
2923 if (rx_buffer_info
->page_dma
) {
2924 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
2925 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
2926 rx_buffer_info
->page_dma
= 0;
2928 put_page(rx_buffer_info
->page
);
2929 rx_buffer_info
->page
= NULL
;
2930 rx_buffer_info
->page_offset
= 0;
2933 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2934 memset(rx_ring
->rx_buffer_info
, 0, size
);
2936 /* Zero out the descriptor ring */
2937 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2939 rx_ring
->next_to_clean
= 0;
2940 rx_ring
->next_to_use
= 0;
2943 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2945 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2949 * ixgbe_clean_tx_ring - Free Tx Buffers
2950 * @adapter: board private structure
2951 * @tx_ring: ring to be cleaned
2953 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2954 struct ixgbe_ring
*tx_ring
)
2956 struct ixgbe_tx_buffer
*tx_buffer_info
;
2960 /* Free all the Tx ring sk_buffs */
2962 for (i
= 0; i
< tx_ring
->count
; i
++) {
2963 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2964 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2967 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2968 memset(tx_ring
->tx_buffer_info
, 0, size
);
2970 /* Zero out the descriptor ring */
2971 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2973 tx_ring
->next_to_use
= 0;
2974 tx_ring
->next_to_clean
= 0;
2977 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2979 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2983 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2984 * @adapter: board private structure
2986 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2990 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2991 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2995 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2996 * @adapter: board private structure
2998 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
3002 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3003 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
3006 void ixgbe_down(struct ixgbe_adapter
*adapter
)
3008 struct net_device
*netdev
= adapter
->netdev
;
3009 struct ixgbe_hw
*hw
= &adapter
->hw
;
3014 /* signal that we are down to the interrupt handler */
3015 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3017 /* disable receives */
3018 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3019 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3021 netif_tx_disable(netdev
);
3023 IXGBE_WRITE_FLUSH(hw
);
3026 netif_tx_stop_all_queues(netdev
);
3028 ixgbe_irq_disable(adapter
);
3030 ixgbe_napi_disable_all(adapter
);
3032 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3033 del_timer_sync(&adapter
->sfp_timer
);
3034 del_timer_sync(&adapter
->watchdog_timer
);
3035 cancel_work_sync(&adapter
->watchdog_task
);
3037 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3038 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3039 cancel_work_sync(&adapter
->fdir_reinit_task
);
3041 /* disable transmits in the hardware now that interrupts are off */
3042 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3043 j
= adapter
->tx_ring
[i
].reg_idx
;
3044 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3045 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
3046 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
3048 /* Disable the Tx DMA engine on 82599 */
3049 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3050 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
3051 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
3052 ~IXGBE_DMATXCTL_TE
));
3054 netif_carrier_off(netdev
);
3056 if (!pci_channel_offline(adapter
->pdev
))
3057 ixgbe_reset(adapter
);
3058 ixgbe_clean_all_tx_rings(adapter
);
3059 ixgbe_clean_all_rx_rings(adapter
);
3061 #ifdef CONFIG_IXGBE_DCA
3062 /* since we reset the hardware DCA settings were cleared */
3063 ixgbe_setup_dca(adapter
);
3068 * ixgbe_poll - NAPI Rx polling callback
3069 * @napi: structure for representing this polling device
3070 * @budget: how many packets driver is allowed to clean
3072 * This function is used for legacy and MSI, NAPI mode
3074 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
3076 struct ixgbe_q_vector
*q_vector
=
3077 container_of(napi
, struct ixgbe_q_vector
, napi
);
3078 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
3079 int tx_clean_complete
, work_done
= 0;
3081 #ifdef CONFIG_IXGBE_DCA
3082 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3083 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
3084 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
3088 tx_clean_complete
= ixgbe_clean_tx_irq(q_vector
, adapter
->tx_ring
);
3089 ixgbe_clean_rx_irq(q_vector
, adapter
->rx_ring
, &work_done
, budget
);
3091 if (!tx_clean_complete
)
3094 /* If budget not fully consumed, exit the polling mode */
3095 if (work_done
< budget
) {
3096 napi_complete(napi
);
3097 if (adapter
->rx_itr_setting
& 1)
3098 ixgbe_set_itr(adapter
);
3099 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3100 ixgbe_irq_enable_queues(adapter
, IXGBE_EIMS_RTX_QUEUE
);
3106 * ixgbe_tx_timeout - Respond to a Tx Hang
3107 * @netdev: network interface device structure
3109 static void ixgbe_tx_timeout(struct net_device
*netdev
)
3111 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3113 /* Do the reset outside of interrupt context */
3114 schedule_work(&adapter
->reset_task
);
3117 static void ixgbe_reset_task(struct work_struct
*work
)
3119 struct ixgbe_adapter
*adapter
;
3120 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
3122 /* If we're already down or resetting, just bail */
3123 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
3124 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
3127 adapter
->tx_timeout_count
++;
3129 ixgbe_reinit_locked(adapter
);
3132 #ifdef CONFIG_IXGBE_DCB
3133 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter
*adapter
)
3136 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_DCB
];
3138 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
3142 adapter
->num_rx_queues
= f
->indices
;
3143 adapter
->num_tx_queues
= f
->indices
;
3151 * ixgbe_set_rss_queues: Allocate queues for RSS
3152 * @adapter: board private structure to initialize
3154 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3155 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3158 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter
*adapter
)
3161 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_RSS
];
3163 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3165 adapter
->num_rx_queues
= f
->indices
;
3166 adapter
->num_tx_queues
= f
->indices
;
3176 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3177 * @adapter: board private structure to initialize
3179 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3180 * to the original CPU that initiated the Tx session. This runs in addition
3181 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3182 * Rx load across CPUs using RSS.
3185 static bool inline ixgbe_set_fdir_queues(struct ixgbe_adapter
*adapter
)
3188 struct ixgbe_ring_feature
*f_fdir
= &adapter
->ring_feature
[RING_F_FDIR
];
3190 f_fdir
->indices
= min((int)num_online_cpus(), f_fdir
->indices
);
3193 /* Flow Director must have RSS enabled */
3194 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
3195 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3196 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)))) {
3197 adapter
->num_tx_queues
= f_fdir
->indices
;
3198 adapter
->num_rx_queues
= f_fdir
->indices
;
3201 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
3202 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
3209 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
3210 * @adapter: board private structure to initialize
3212 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
3213 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
3214 * rx queues out of the max number of rx queues, instead, it is used as the
3215 * index of the first rx queue used by FCoE.
3218 static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter
*adapter
)
3221 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
3223 f
->indices
= min((int)num_online_cpus(), f
->indices
);
3224 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
3225 adapter
->num_rx_queues
= 1;
3226 adapter
->num_tx_queues
= 1;
3227 #ifdef CONFIG_IXGBE_DCB
3228 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3229 DPRINTK(PROBE
, INFO
, "FCoE enabled with DCB \n");
3230 ixgbe_set_dcb_queues(adapter
);
3233 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3234 DPRINTK(PROBE
, INFO
, "FCoE enabled with RSS \n");
3235 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
3236 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
3237 ixgbe_set_fdir_queues(adapter
);
3239 ixgbe_set_rss_queues(adapter
);
3241 /* adding FCoE rx rings to the end */
3242 f
->mask
= adapter
->num_rx_queues
;
3243 adapter
->num_rx_queues
+= f
->indices
;
3244 adapter
->num_tx_queues
+= f
->indices
;
3252 #endif /* IXGBE_FCOE */
3254 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
3255 * @adapter: board private structure to initialize
3257 * This is the top level queue allocation routine. The order here is very
3258 * important, starting with the "most" number of features turned on at once,
3259 * and ending with the smallest set of features. This way large combinations
3260 * can be allocated if they're turned on, and smaller combinations are the
3261 * fallthrough conditions.
3264 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
3267 if (ixgbe_set_fcoe_queues(adapter
))
3270 #endif /* IXGBE_FCOE */
3271 #ifdef CONFIG_IXGBE_DCB
3272 if (ixgbe_set_dcb_queues(adapter
))
3276 if (ixgbe_set_fdir_queues(adapter
))
3279 if (ixgbe_set_rss_queues(adapter
))
3282 /* fallback to base case */
3283 adapter
->num_rx_queues
= 1;
3284 adapter
->num_tx_queues
= 1;
3287 /* Notify the stack of the (possibly) reduced Tx Queue count. */
3288 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
3291 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
3294 int err
, vector_threshold
;
3296 /* We'll want at least 3 (vector_threshold):
3299 * 3) Other (Link Status Change, etc.)
3300 * 4) TCP Timer (optional)
3302 vector_threshold
= MIN_MSIX_COUNT
;
3304 /* The more we get, the more we will assign to Tx/Rx Cleanup
3305 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
3306 * Right now, we simply care about how many we'll get; we'll
3307 * set them up later while requesting irq's.
3309 while (vectors
>= vector_threshold
) {
3310 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
3312 if (!err
) /* Success in acquiring all requested vectors. */
3315 vectors
= 0; /* Nasty failure, quit now */
3316 else /* err == number of vectors we should try again with */
3320 if (vectors
< vector_threshold
) {
3321 /* Can't allocate enough MSI-X interrupts? Oh well.
3322 * This just means we'll go with either a single MSI
3323 * vector or fall back to legacy interrupts.
3325 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
3326 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3327 kfree(adapter
->msix_entries
);
3328 adapter
->msix_entries
= NULL
;
3330 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
3332 * Adjust for only the vectors we'll use, which is minimum
3333 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
3334 * vectors we were allocated.
3336 adapter
->num_msix_vectors
= min(vectors
,
3337 adapter
->max_msix_q_vectors
+ NON_Q_VECTORS
);
3342 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
3343 * @adapter: board private structure to initialize
3345 * Cache the descriptor ring offsets for RSS to the assigned rings.
3348 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter
*adapter
)
3353 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3354 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3355 adapter
->rx_ring
[i
].reg_idx
= i
;
3356 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3357 adapter
->tx_ring
[i
].reg_idx
= i
;
3366 #ifdef CONFIG_IXGBE_DCB
3368 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
3369 * @adapter: board private structure to initialize
3371 * Cache the descriptor ring offsets for DCB to the assigned rings.
3374 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter
*adapter
)
3378 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
3380 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3381 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3382 /* the number of queues is assumed to be symmetric */
3383 for (i
= 0; i
< dcb_i
; i
++) {
3384 adapter
->rx_ring
[i
].reg_idx
= i
<< 3;
3385 adapter
->tx_ring
[i
].reg_idx
= i
<< 2;
3388 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
3391 * Tx TC0 starts at: descriptor queue 0
3392 * Tx TC1 starts at: descriptor queue 32
3393 * Tx TC2 starts at: descriptor queue 64
3394 * Tx TC3 starts at: descriptor queue 80
3395 * Tx TC4 starts at: descriptor queue 96
3396 * Tx TC5 starts at: descriptor queue 104
3397 * Tx TC6 starts at: descriptor queue 112
3398 * Tx TC7 starts at: descriptor queue 120
3400 * Rx TC0-TC7 are offset by 16 queues each
3402 for (i
= 0; i
< 3; i
++) {
3403 adapter
->tx_ring
[i
].reg_idx
= i
<< 5;
3404 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
3406 for ( ; i
< 5; i
++) {
3407 adapter
->tx_ring
[i
].reg_idx
=
3409 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
3411 for ( ; i
< dcb_i
; i
++) {
3412 adapter
->tx_ring
[i
].reg_idx
=
3414 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
3418 } else if (dcb_i
== 4) {
3420 * Tx TC0 starts at: descriptor queue 0
3421 * Tx TC1 starts at: descriptor queue 64
3422 * Tx TC2 starts at: descriptor queue 96
3423 * Tx TC3 starts at: descriptor queue 112
3425 * Rx TC0-TC3 are offset by 32 queues each
3427 adapter
->tx_ring
[0].reg_idx
= 0;
3428 adapter
->tx_ring
[1].reg_idx
= 64;
3429 adapter
->tx_ring
[2].reg_idx
= 96;
3430 adapter
->tx_ring
[3].reg_idx
= 112;
3431 for (i
= 0 ; i
< dcb_i
; i
++)
3432 adapter
->rx_ring
[i
].reg_idx
= i
<< 5;
3450 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
3451 * @adapter: board private structure to initialize
3453 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
3456 static bool inline ixgbe_cache_ring_fdir(struct ixgbe_adapter
*adapter
)
3461 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
3462 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
3463 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))) {
3464 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3465 adapter
->rx_ring
[i
].reg_idx
= i
;
3466 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3467 adapter
->tx_ring
[i
].reg_idx
= i
;
3476 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
3477 * @adapter: board private structure to initialize
3479 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
3482 static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter
*adapter
)
3484 int i
, fcoe_rx_i
= 0, fcoe_tx_i
= 0;
3486 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
3488 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
3489 #ifdef CONFIG_IXGBE_DCB
3490 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3491 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
3493 ixgbe_cache_ring_dcb(adapter
);
3494 /* find out queues in TC for FCoE */
3495 fcoe_rx_i
= adapter
->rx_ring
[fcoe
->tc
].reg_idx
+ 1;
3496 fcoe_tx_i
= adapter
->tx_ring
[fcoe
->tc
].reg_idx
+ 1;
3498 * In 82599, the number of Tx queues for each traffic
3499 * class for both 8-TC and 4-TC modes are:
3500 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
3501 * 8 TCs: 32 32 16 16 8 8 8 8
3502 * 4 TCs: 64 64 32 32
3503 * We have max 8 queues for FCoE, where 8 the is
3504 * FCoE redirection table size. If TC for FCoE is
3505 * less than or equal to TC3, we have enough queues
3506 * to add max of 8 queues for FCoE, so we start FCoE
3507 * tx descriptor from the next one, i.e., reg_idx + 1.
3508 * If TC for FCoE is above TC3, implying 8 TC mode,
3509 * and we need 8 for FCoE, we have to take all queues
3510 * in that traffic class for FCoE.
3512 if ((f
->indices
== IXGBE_FCRETA_SIZE
) && (fcoe
->tc
> 3))
3515 #endif /* CONFIG_IXGBE_DCB */
3516 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3517 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
3518 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
3519 ixgbe_cache_ring_fdir(adapter
);
3521 ixgbe_cache_ring_rss(adapter
);
3523 fcoe_rx_i
= f
->mask
;
3524 fcoe_tx_i
= f
->mask
;
3526 for (i
= 0; i
< f
->indices
; i
++, fcoe_rx_i
++, fcoe_tx_i
++) {
3527 adapter
->rx_ring
[f
->mask
+ i
].reg_idx
= fcoe_rx_i
;
3528 adapter
->tx_ring
[f
->mask
+ i
].reg_idx
= fcoe_tx_i
;
3535 #endif /* IXGBE_FCOE */
3537 * ixgbe_cache_ring_register - Descriptor ring to register mapping
3538 * @adapter: board private structure to initialize
3540 * Once we know the feature-set enabled for the device, we'll cache
3541 * the register offset the descriptor ring is assigned to.
3543 * Note, the order the various feature calls is important. It must start with
3544 * the "most" features enabled at the same time, then trickle down to the
3545 * least amount of features turned on at once.
3547 static void ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
3549 /* start with default case */
3550 adapter
->rx_ring
[0].reg_idx
= 0;
3551 adapter
->tx_ring
[0].reg_idx
= 0;
3554 if (ixgbe_cache_ring_fcoe(adapter
))
3557 #endif /* IXGBE_FCOE */
3558 #ifdef CONFIG_IXGBE_DCB
3559 if (ixgbe_cache_ring_dcb(adapter
))
3563 if (ixgbe_cache_ring_fdir(adapter
))
3566 if (ixgbe_cache_ring_rss(adapter
))
3571 * ixgbe_alloc_queues - Allocate memory for all rings
3572 * @adapter: board private structure to initialize
3574 * We allocate one ring per queue at run-time since we don't know the
3575 * number of queues at compile-time. The polling_netdev array is
3576 * intended for Multiqueue, but should work fine with a single queue.
3578 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
3582 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
3583 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
3584 if (!adapter
->tx_ring
)
3585 goto err_tx_ring_allocation
;
3587 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
3588 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
3589 if (!adapter
->rx_ring
)
3590 goto err_rx_ring_allocation
;
3592 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3593 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
3594 adapter
->tx_ring
[i
].queue_index
= i
;
3597 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3598 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
3599 adapter
->rx_ring
[i
].queue_index
= i
;
3602 ixgbe_cache_ring_register(adapter
);
3606 err_rx_ring_allocation
:
3607 kfree(adapter
->tx_ring
);
3608 err_tx_ring_allocation
:
3613 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
3614 * @adapter: board private structure to initialize
3616 * Attempt to configure the interrupts using the best available
3617 * capabilities of the hardware and the kernel.
3619 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter
*adapter
)
3621 struct ixgbe_hw
*hw
= &adapter
->hw
;
3623 int vector
, v_budget
;
3626 * It's easy to be greedy for MSI-X vectors, but it really
3627 * doesn't do us much good if we have a lot more vectors
3628 * than CPU's. So let's be conservative and only ask for
3629 * (roughly) the same number of vectors as there are CPU's.
3631 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
3632 (int)num_online_cpus()) + NON_Q_VECTORS
;
3635 * At the same time, hardware can only support a maximum of
3636 * hw.mac->max_msix_vectors vectors. With features
3637 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
3638 * descriptor queues supported by our device. Thus, we cap it off in
3639 * those rare cases where the cpu count also exceeds our vector limit.
3641 v_budget
= min(v_budget
, (int)hw
->mac
.max_msix_vectors
);
3643 /* A failure in MSI-X entry allocation isn't fatal, but it does
3644 * mean we disable MSI-X capabilities of the adapter. */
3645 adapter
->msix_entries
= kcalloc(v_budget
,
3646 sizeof(struct msix_entry
), GFP_KERNEL
);
3647 if (adapter
->msix_entries
) {
3648 for (vector
= 0; vector
< v_budget
; vector
++)
3649 adapter
->msix_entries
[vector
].entry
= vector
;
3651 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
3653 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3657 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
3658 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
3659 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
3660 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
3661 adapter
->atr_sample_rate
= 0;
3662 ixgbe_set_num_queues(adapter
);
3664 err
= pci_enable_msi(adapter
->pdev
);
3666 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
3668 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
3669 "falling back to legacy. Error: %d\n", err
);
3679 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
3680 * @adapter: board private structure to initialize
3682 * We allocate one q_vector per queue interrupt. If allocation fails we
3685 static int ixgbe_alloc_q_vectors(struct ixgbe_adapter
*adapter
)
3687 int q_idx
, num_q_vectors
;
3688 struct ixgbe_q_vector
*q_vector
;
3690 int (*poll
)(struct napi_struct
*, int);
3692 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3693 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3694 napi_vectors
= adapter
->num_rx_queues
;
3695 poll
= &ixgbe_clean_rxtx_many
;
3702 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
3703 q_vector
= kzalloc(sizeof(struct ixgbe_q_vector
), GFP_KERNEL
);
3706 q_vector
->adapter
= adapter
;
3707 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
3708 q_vector
->eitr
= adapter
->tx_eitr_param
;
3710 q_vector
->eitr
= adapter
->rx_eitr_param
;
3711 q_vector
->v_idx
= q_idx
;
3712 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
3713 adapter
->q_vector
[q_idx
] = q_vector
;
3721 q_vector
= adapter
->q_vector
[q_idx
];
3722 netif_napi_del(&q_vector
->napi
);
3724 adapter
->q_vector
[q_idx
] = NULL
;
3730 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
3731 * @adapter: board private structure to initialize
3733 * This function frees the memory allocated to the q_vectors. In addition if
3734 * NAPI is enabled it will delete any references to the NAPI struct prior
3735 * to freeing the q_vector.
3737 static void ixgbe_free_q_vectors(struct ixgbe_adapter
*adapter
)
3739 int q_idx
, num_q_vectors
;
3741 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3742 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3746 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
3747 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[q_idx
];
3748 adapter
->q_vector
[q_idx
] = NULL
;
3749 netif_napi_del(&q_vector
->napi
);
3754 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
3756 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3757 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3758 pci_disable_msix(adapter
->pdev
);
3759 kfree(adapter
->msix_entries
);
3760 adapter
->msix_entries
= NULL
;
3761 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
3762 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
3763 pci_disable_msi(adapter
->pdev
);
3769 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
3770 * @adapter: board private structure to initialize
3772 * We determine which interrupt scheme to use based on...
3773 * - Kernel support (MSI, MSI-X)
3774 * - which can be user-defined (via MODULE_PARAM)
3775 * - Hardware queue count (num_*_queues)
3776 * - defined by miscellaneous hardware support/features (RSS, etc.)
3778 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
3782 /* Number of supported queues */
3783 ixgbe_set_num_queues(adapter
);
3785 err
= ixgbe_set_interrupt_capability(adapter
);
3787 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
3788 goto err_set_interrupt
;
3791 err
= ixgbe_alloc_q_vectors(adapter
);
3793 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queue "
3795 goto err_alloc_q_vectors
;
3798 err
= ixgbe_alloc_queues(adapter
);
3800 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
3801 goto err_alloc_queues
;
3804 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
3805 "Tx Queue count = %u\n",
3806 (adapter
->num_rx_queues
> 1) ? "Enabled" :
3807 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
3809 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3814 ixgbe_free_q_vectors(adapter
);
3815 err_alloc_q_vectors
:
3816 ixgbe_reset_interrupt_capability(adapter
);
3822 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
3823 * @adapter: board private structure to clear interrupt scheme on
3825 * We go through and clear interrupt specific resources and reset the structure
3826 * to pre-load conditions
3828 void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter
*adapter
)
3830 kfree(adapter
->tx_ring
);
3831 kfree(adapter
->rx_ring
);
3832 adapter
->tx_ring
= NULL
;
3833 adapter
->rx_ring
= NULL
;
3835 ixgbe_free_q_vectors(adapter
);
3836 ixgbe_reset_interrupt_capability(adapter
);
3840 * ixgbe_sfp_timer - worker thread to find a missing module
3841 * @data: pointer to our adapter struct
3843 static void ixgbe_sfp_timer(unsigned long data
)
3845 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3848 * Do the sfp_timer outside of interrupt context due to the
3849 * delays that sfp+ detection requires
3851 schedule_work(&adapter
->sfp_task
);
3855 * ixgbe_sfp_task - worker thread to find a missing module
3856 * @work: pointer to work_struct containing our data
3858 static void ixgbe_sfp_task(struct work_struct
*work
)
3860 struct ixgbe_adapter
*adapter
= container_of(work
,
3861 struct ixgbe_adapter
,
3863 struct ixgbe_hw
*hw
= &adapter
->hw
;
3865 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
3866 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
3867 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
3868 if (ret
== IXGBE_ERR_SFP_NOT_PRESENT
)
3870 ret
= hw
->phy
.ops
.reset(hw
);
3871 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3872 dev_err(&adapter
->pdev
->dev
, "failed to initialize "
3873 "because an unsupported SFP+ module type "
3875 "Reload the driver after installing a "
3876 "supported module.\n");
3877 unregister_netdev(adapter
->netdev
);
3879 DPRINTK(PROBE
, INFO
, "detected SFP+: %d\n",
3882 /* don't need this routine any more */
3883 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3887 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
3888 mod_timer(&adapter
->sfp_timer
,
3889 round_jiffies(jiffies
+ (2 * HZ
)));
3893 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
3894 * @adapter: board private structure to initialize
3896 * ixgbe_sw_init initializes the Adapter private data structure.
3897 * Fields are initialized based on PCI device information and
3898 * OS network device settings (MTU size).
3900 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
3902 struct ixgbe_hw
*hw
= &adapter
->hw
;
3903 struct pci_dev
*pdev
= adapter
->pdev
;
3905 #ifdef CONFIG_IXGBE_DCB
3907 struct tc_configuration
*tc
;
3910 /* PCI config space info */
3912 hw
->vendor_id
= pdev
->vendor
;
3913 hw
->device_id
= pdev
->device
;
3914 hw
->revision_id
= pdev
->revision
;
3915 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
3916 hw
->subsystem_device_id
= pdev
->subsystem_device
;
3918 /* Set capability flags */
3919 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
3920 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
3921 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
3922 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
3923 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3924 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
3925 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
3926 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
3927 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3928 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
3929 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
3930 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
3931 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
3932 adapter
->ring_feature
[RING_F_FDIR
].indices
=
3933 IXGBE_MAX_FDIR_INDICES
;
3934 adapter
->atr_sample_rate
= 20;
3935 adapter
->fdir_pballoc
= 0;
3937 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
3938 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
3939 adapter
->ring_feature
[RING_F_FCOE
].indices
= 0;
3940 /* Default traffic class to use for FCoE */
3941 adapter
->fcoe
.tc
= IXGBE_FCOE_DEFTC
;
3942 #endif /* IXGBE_FCOE */
3945 #ifdef CONFIG_IXGBE_DCB
3946 /* Configure DCB traffic classes */
3947 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
3948 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
3949 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
3950 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3951 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
3952 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3953 tc
->dcb_pfc
= pfc_disabled
;
3955 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
3956 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
3957 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
3958 adapter
->dcb_cfg
.pfc_mode_enable
= false;
3959 adapter
->dcb_cfg
.round_robin_enable
= false;
3960 adapter
->dcb_set_bitmap
= 0x00;
3961 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
3962 adapter
->ring_feature
[RING_F_DCB
].indices
);
3966 /* default flow control settings */
3967 hw
->fc
.requested_mode
= ixgbe_fc_full
;
3968 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
3970 adapter
->last_lfc_mode
= hw
->fc
.current_mode
;
3972 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
3973 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
3974 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
3975 hw
->fc
.send_xon
= true;
3976 hw
->fc
.disable_fc_autoneg
= false;
3978 /* enable itr by default in dynamic mode */
3979 adapter
->rx_itr_setting
= 1;
3980 adapter
->rx_eitr_param
= 20000;
3981 adapter
->tx_itr_setting
= 1;
3982 adapter
->tx_eitr_param
= 10000;
3984 /* set defaults for eitr in MegaBytes */
3985 adapter
->eitr_low
= 10;
3986 adapter
->eitr_high
= 20;
3988 /* set default ring sizes */
3989 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
3990 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
3992 /* initialize eeprom parameters */
3993 if (ixgbe_init_eeprom_params_generic(hw
)) {
3994 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
3998 /* enable rx csum by default */
3999 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
4001 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4007 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4008 * @adapter: board private structure
4009 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4011 * Return 0 on success, negative on failure
4013 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
4014 struct ixgbe_ring
*tx_ring
)
4016 struct pci_dev
*pdev
= adapter
->pdev
;
4019 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4020 tx_ring
->tx_buffer_info
= vmalloc(size
);
4021 if (!tx_ring
->tx_buffer_info
)
4023 memset(tx_ring
->tx_buffer_info
, 0, size
);
4025 /* round up to nearest 4K */
4026 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4027 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4029 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
4034 tx_ring
->next_to_use
= 0;
4035 tx_ring
->next_to_clean
= 0;
4036 tx_ring
->work_limit
= tx_ring
->count
;
4040 vfree(tx_ring
->tx_buffer_info
);
4041 tx_ring
->tx_buffer_info
= NULL
;
4042 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
4043 "descriptor ring\n");
4048 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4049 * @adapter: board private structure
4051 * If this function returns with an error, then it's possible one or
4052 * more of the rings is populated (while the rest are not). It is the
4053 * callers duty to clean those orphaned rings.
4055 * Return 0 on success, negative on failure
4057 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
4061 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4062 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
4065 DPRINTK(PROBE
, ERR
, "Allocation for Tx Queue %u failed\n", i
);
4073 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4074 * @adapter: board private structure
4075 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4077 * Returns 0 on success, negative on failure
4079 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
4080 struct ixgbe_ring
*rx_ring
)
4082 struct pci_dev
*pdev
= adapter
->pdev
;
4085 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4086 rx_ring
->rx_buffer_info
= vmalloc(size
);
4087 if (!rx_ring
->rx_buffer_info
) {
4089 "vmalloc allocation failed for the rx desc ring\n");
4092 memset(rx_ring
->rx_buffer_info
, 0, size
);
4094 /* Round up to nearest 4K */
4095 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
4096 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
4098 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
4100 if (!rx_ring
->desc
) {
4102 "Memory allocation failed for the rx desc ring\n");
4103 vfree(rx_ring
->rx_buffer_info
);
4107 rx_ring
->next_to_clean
= 0;
4108 rx_ring
->next_to_use
= 0;
4117 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4118 * @adapter: board private structure
4120 * If this function returns with an error, then it's possible one or
4121 * more of the rings is populated (while the rest are not). It is the
4122 * callers duty to clean those orphaned rings.
4124 * Return 0 on success, negative on failure
4127 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
4131 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4132 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
4135 DPRINTK(PROBE
, ERR
, "Allocation for Rx Queue %u failed\n", i
);
4143 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4144 * @adapter: board private structure
4145 * @tx_ring: Tx descriptor ring for a specific queue
4147 * Free all transmit software resources
4149 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
4150 struct ixgbe_ring
*tx_ring
)
4152 struct pci_dev
*pdev
= adapter
->pdev
;
4154 ixgbe_clean_tx_ring(adapter
, tx_ring
);
4156 vfree(tx_ring
->tx_buffer_info
);
4157 tx_ring
->tx_buffer_info
= NULL
;
4159 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
4161 tx_ring
->desc
= NULL
;
4165 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4166 * @adapter: board private structure
4168 * Free all transmit software resources
4170 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
4174 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4175 if (adapter
->tx_ring
[i
].desc
)
4176 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
4180 * ixgbe_free_rx_resources - Free Rx Resources
4181 * @adapter: board private structure
4182 * @rx_ring: ring to clean the resources from
4184 * Free all receive software resources
4186 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
4187 struct ixgbe_ring
*rx_ring
)
4189 struct pci_dev
*pdev
= adapter
->pdev
;
4191 ixgbe_clean_rx_ring(adapter
, rx_ring
);
4193 vfree(rx_ring
->rx_buffer_info
);
4194 rx_ring
->rx_buffer_info
= NULL
;
4196 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
4198 rx_ring
->desc
= NULL
;
4202 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4203 * @adapter: board private structure
4205 * Free all receive software resources
4207 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
4211 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4212 if (adapter
->rx_ring
[i
].desc
)
4213 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
4217 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4218 * @netdev: network interface device structure
4219 * @new_mtu: new value for maximum frame size
4221 * Returns 0 on success, negative on failure
4223 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
4225 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4226 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4228 /* MTU < 68 is an error and causes problems on some kernels */
4229 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
4232 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
4233 netdev
->mtu
, new_mtu
);
4234 /* must set new MTU before calling down or up */
4235 netdev
->mtu
= new_mtu
;
4237 if (netif_running(netdev
))
4238 ixgbe_reinit_locked(adapter
);
4244 * ixgbe_open - Called when a network interface is made active
4245 * @netdev: network interface device structure
4247 * Returns 0 on success, negative value on failure
4249 * The open entry point is called when a network interface is made
4250 * active by the system (IFF_UP). At this point all resources needed
4251 * for transmit and receive operations are allocated, the interrupt
4252 * handler is registered with the OS, the watchdog timer is started,
4253 * and the stack is notified that the interface is ready.
4255 static int ixgbe_open(struct net_device
*netdev
)
4257 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4260 /* disallow open during test */
4261 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
4264 netif_carrier_off(netdev
);
4266 /* allocate transmit descriptors */
4267 err
= ixgbe_setup_all_tx_resources(adapter
);
4271 /* allocate receive descriptors */
4272 err
= ixgbe_setup_all_rx_resources(adapter
);
4276 ixgbe_configure(adapter
);
4278 err
= ixgbe_request_irq(adapter
);
4282 err
= ixgbe_up_complete(adapter
);
4286 netif_tx_start_all_queues(netdev
);
4291 ixgbe_release_hw_control(adapter
);
4292 ixgbe_free_irq(adapter
);
4295 ixgbe_free_all_rx_resources(adapter
);
4297 ixgbe_free_all_tx_resources(adapter
);
4298 ixgbe_reset(adapter
);
4304 * ixgbe_close - Disables a network interface
4305 * @netdev: network interface device structure
4307 * Returns 0, this is not allowed to fail
4309 * The close entry point is called when an interface is de-activated
4310 * by the OS. The hardware is still under the drivers control, but
4311 * needs to be disabled. A global MAC reset is issued to stop the
4312 * hardware, and all transmit and receive resources are freed.
4314 static int ixgbe_close(struct net_device
*netdev
)
4316 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4318 ixgbe_down(adapter
);
4319 ixgbe_free_irq(adapter
);
4321 ixgbe_free_all_tx_resources(adapter
);
4322 ixgbe_free_all_rx_resources(adapter
);
4324 ixgbe_release_hw_control(adapter
);
4330 static int ixgbe_resume(struct pci_dev
*pdev
)
4332 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4333 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4336 pci_set_power_state(pdev
, PCI_D0
);
4337 pci_restore_state(pdev
);
4339 err
= pci_enable_device_mem(pdev
);
4341 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from "
4345 pci_set_master(pdev
);
4347 pci_wake_from_d3(pdev
, false);
4349 err
= ixgbe_init_interrupt_scheme(adapter
);
4351 printk(KERN_ERR
"ixgbe: Cannot initialize interrupts for "
4356 ixgbe_reset(adapter
);
4358 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4360 if (netif_running(netdev
)) {
4361 err
= ixgbe_open(adapter
->netdev
);
4366 netif_device_attach(netdev
);
4370 #endif /* CONFIG_PM */
4372 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
4374 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4375 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4376 struct ixgbe_hw
*hw
= &adapter
->hw
;
4378 u32 wufc
= adapter
->wol
;
4383 netif_device_detach(netdev
);
4385 if (netif_running(netdev
)) {
4386 ixgbe_down(adapter
);
4387 ixgbe_free_irq(adapter
);
4388 ixgbe_free_all_tx_resources(adapter
);
4389 ixgbe_free_all_rx_resources(adapter
);
4391 ixgbe_clear_interrupt_scheme(adapter
);
4394 retval
= pci_save_state(pdev
);
4400 ixgbe_set_rx_mode(netdev
);
4402 /* turn on all-multi mode if wake on multicast is enabled */
4403 if (wufc
& IXGBE_WUFC_MC
) {
4404 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4405 fctrl
|= IXGBE_FCTRL_MPE
;
4406 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4409 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
4410 ctrl
|= IXGBE_CTRL_GIO_DIS
;
4411 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
4413 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
4415 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
4416 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
4419 if (wufc
&& hw
->mac
.type
== ixgbe_mac_82599EB
)
4420 pci_wake_from_d3(pdev
, true);
4422 pci_wake_from_d3(pdev
, false);
4424 *enable_wake
= !!wufc
;
4426 ixgbe_release_hw_control(adapter
);
4428 pci_disable_device(pdev
);
4434 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4439 retval
= __ixgbe_shutdown(pdev
, &wake
);
4444 pci_prepare_to_sleep(pdev
);
4446 pci_wake_from_d3(pdev
, false);
4447 pci_set_power_state(pdev
, PCI_D3hot
);
4452 #endif /* CONFIG_PM */
4454 static void ixgbe_shutdown(struct pci_dev
*pdev
)
4458 __ixgbe_shutdown(pdev
, &wake
);
4460 if (system_state
== SYSTEM_POWER_OFF
) {
4461 pci_wake_from_d3(pdev
, wake
);
4462 pci_set_power_state(pdev
, PCI_D3hot
);
4467 * ixgbe_update_stats - Update the board statistics counters.
4468 * @adapter: board private structure
4470 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
4472 struct net_device
*netdev
= adapter
->netdev
;
4473 struct ixgbe_hw
*hw
= &adapter
->hw
;
4475 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
4477 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4479 for (i
= 0; i
< 16; i
++)
4480 adapter
->hw_rx_no_dma_resources
+=
4481 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
4482 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4483 rsc_count
+= adapter
->rx_ring
[i
].rsc_count
;
4484 adapter
->rsc_count
= rsc_count
;
4487 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
4488 for (i
= 0; i
< 8; i
++) {
4489 /* for packet buffers not used, the register should read 0 */
4490 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
4492 adapter
->stats
.mpc
[i
] += mpc
;
4493 total_mpc
+= adapter
->stats
.mpc
[i
];
4494 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4495 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
4496 adapter
->stats
.qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
4497 adapter
->stats
.qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
4498 adapter
->stats
.qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
4499 adapter
->stats
.qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
4500 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4501 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
4502 IXGBE_PXONRXCNT(i
));
4503 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
4504 IXGBE_PXOFFRXCNT(i
));
4505 adapter
->stats
.qprdc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
4507 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
4509 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
4512 adapter
->stats
.pxontxc
[i
] += IXGBE_READ_REG(hw
,
4514 adapter
->stats
.pxofftxc
[i
] += IXGBE_READ_REG(hw
,
4517 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
4518 /* work around hardware counting issue */
4519 adapter
->stats
.gprc
-= missed_rx
;
4521 /* 82598 hardware only has a 32 bit counter in the high register */
4522 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4524 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
4525 tmp
= IXGBE_READ_REG(hw
, IXGBE_GORCH
) & 0xF; /* 4 high bits of GORC */
4526 adapter
->stats
.gorc
+= (tmp
<< 32);
4527 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
4528 tmp
= IXGBE_READ_REG(hw
, IXGBE_GOTCH
) & 0xF; /* 4 high bits of GOTC */
4529 adapter
->stats
.gotc
+= (tmp
<< 32);
4530 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
4531 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
4532 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
4533 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
4534 adapter
->stats
.fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
4535 adapter
->stats
.fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
4537 adapter
->stats
.fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
4538 adapter
->stats
.fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
4539 adapter
->stats
.fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
4540 adapter
->stats
.fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
4541 adapter
->stats
.fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
4542 adapter
->stats
.fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
4543 #endif /* IXGBE_FCOE */
4545 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
4546 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
4547 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
4548 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
4549 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
4551 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
4552 adapter
->stats
.bprc
+= bprc
;
4553 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
4554 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4555 adapter
->stats
.mprc
-= bprc
;
4556 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
4557 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
4558 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
4559 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
4560 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
4561 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
4562 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
4563 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
4564 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
4565 adapter
->stats
.lxontxc
+= lxon
;
4566 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
4567 adapter
->stats
.lxofftxc
+= lxoff
;
4568 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
4569 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
4570 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
4572 * 82598 errata - tx of flow control packets is included in tx counters
4574 xon_off_tot
= lxon
+ lxoff
;
4575 adapter
->stats
.gptc
-= xon_off_tot
;
4576 adapter
->stats
.mptc
-= xon_off_tot
;
4577 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
4578 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
4579 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
4580 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
4581 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
4582 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
4583 adapter
->stats
.ptc64
-= xon_off_tot
;
4584 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
4585 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
4586 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
4587 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
4588 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
4589 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
4591 /* Fill out the OS statistics structure */
4592 netdev
->stats
.multicast
= adapter
->stats
.mprc
;
4595 netdev
->stats
.rx_errors
= adapter
->stats
.crcerrs
+
4596 adapter
->stats
.rlec
;
4597 netdev
->stats
.rx_dropped
= 0;
4598 netdev
->stats
.rx_length_errors
= adapter
->stats
.rlec
;
4599 netdev
->stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
4600 netdev
->stats
.rx_missed_errors
= total_mpc
;
4604 * ixgbe_watchdog - Timer Call-back
4605 * @data: pointer to adapter cast into an unsigned long
4607 static void ixgbe_watchdog(unsigned long data
)
4609 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
4610 struct ixgbe_hw
*hw
= &adapter
->hw
;
4615 * Do the watchdog outside of interrupt context due to the lovely
4616 * delays that some of the newer hardware requires
4619 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
4620 goto watchdog_short_circuit
;
4622 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
4624 * for legacy and MSI interrupts don't set any bits
4625 * that are enabled for EIAM, because this operation
4626 * would set *both* EIMS and EICS for any bit in EIAM
4628 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
4629 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
4630 goto watchdog_reschedule
;
4633 /* get one bit for every active tx/rx interrupt vector */
4634 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
4635 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
4636 if (qv
->rxr_count
|| qv
->txr_count
)
4637 eics
|= ((u64
)1 << i
);
4640 /* Cause software interrupt to ensure rx rings are cleaned */
4641 ixgbe_irq_rearm_queues(adapter
, eics
);
4643 watchdog_reschedule
:
4644 /* Reset the timer */
4645 mod_timer(&adapter
->watchdog_timer
, round_jiffies(jiffies
+ 2 * HZ
));
4647 watchdog_short_circuit
:
4648 schedule_work(&adapter
->watchdog_task
);
4652 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
4653 * @work: pointer to work_struct containing our data
4655 static void ixgbe_multispeed_fiber_task(struct work_struct
*work
)
4657 struct ixgbe_adapter
*adapter
= container_of(work
,
4658 struct ixgbe_adapter
,
4659 multispeed_fiber_task
);
4660 struct ixgbe_hw
*hw
= &adapter
->hw
;
4664 adapter
->flags
|= IXGBE_FLAG_IN_SFP_LINK_TASK
;
4665 autoneg
= hw
->phy
.autoneg_advertised
;
4666 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
4667 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
4668 if (hw
->mac
.ops
.setup_link
)
4669 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
4670 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4671 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_LINK_TASK
;
4675 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
4676 * @work: pointer to work_struct containing our data
4678 static void ixgbe_sfp_config_module_task(struct work_struct
*work
)
4680 struct ixgbe_adapter
*adapter
= container_of(work
,
4681 struct ixgbe_adapter
,
4682 sfp_config_module_task
);
4683 struct ixgbe_hw
*hw
= &adapter
->hw
;
4686 adapter
->flags
|= IXGBE_FLAG_IN_SFP_MOD_TASK
;
4688 /* Time for electrical oscillations to settle down */
4690 err
= hw
->phy
.ops
.identify_sfp(hw
);
4692 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4693 dev_err(&adapter
->pdev
->dev
, "failed to initialize because "
4694 "an unsupported SFP+ module type was detected.\n"
4695 "Reload the driver after installing a supported "
4697 unregister_netdev(adapter
->netdev
);
4700 hw
->mac
.ops
.setup_sfp(hw
);
4702 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
4703 /* This will also work for DA Twinax connections */
4704 schedule_work(&adapter
->multispeed_fiber_task
);
4705 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_MOD_TASK
;
4709 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
4710 * @work: pointer to work_struct containing our data
4712 static void ixgbe_fdir_reinit_task(struct work_struct
*work
)
4714 struct ixgbe_adapter
*adapter
= container_of(work
,
4715 struct ixgbe_adapter
,
4717 struct ixgbe_hw
*hw
= &adapter
->hw
;
4720 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
4721 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4722 set_bit(__IXGBE_FDIR_INIT_DONE
,
4723 &(adapter
->tx_ring
[i
].reinit_state
));
4725 DPRINTK(PROBE
, ERR
, "failed to finish FDIR re-initialization, "
4726 "ignored adding FDIR ATR filters \n");
4728 /* Done FDIR Re-initialization, enable transmits */
4729 netif_tx_start_all_queues(adapter
->netdev
);
4733 * ixgbe_watchdog_task - worker thread to bring link up
4734 * @work: pointer to work_struct containing our data
4736 static void ixgbe_watchdog_task(struct work_struct
*work
)
4738 struct ixgbe_adapter
*adapter
= container_of(work
,
4739 struct ixgbe_adapter
,
4741 struct net_device
*netdev
= adapter
->netdev
;
4742 struct ixgbe_hw
*hw
= &adapter
->hw
;
4743 u32 link_speed
= adapter
->link_speed
;
4744 bool link_up
= adapter
->link_up
;
4746 struct ixgbe_ring
*tx_ring
;
4747 int some_tx_pending
= 0;
4749 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
4751 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
4752 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
4755 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4756 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++)
4757 hw
->mac
.ops
.fc_enable(hw
, i
);
4759 hw
->mac
.ops
.fc_enable(hw
, 0);
4762 hw
->mac
.ops
.fc_enable(hw
, 0);
4767 time_after(jiffies
, (adapter
->link_check_timeout
+
4768 IXGBE_TRY_LINK_TIMEOUT
))) {
4769 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4770 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
4772 adapter
->link_up
= link_up
;
4773 adapter
->link_speed
= link_speed
;
4777 if (!netif_carrier_ok(netdev
)) {
4778 bool flow_rx
, flow_tx
;
4780 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4781 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
4782 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
4783 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
4784 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
4786 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4787 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
4788 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
4789 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
4792 printk(KERN_INFO
"ixgbe: %s NIC Link is Up %s, "
4793 "Flow Control: %s\n",
4795 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
4797 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
4798 "1 Gbps" : "unknown speed")),
4799 ((flow_rx
&& flow_tx
) ? "RX/TX" :
4801 (flow_tx
? "TX" : "None"))));
4803 netif_carrier_on(netdev
);
4805 /* Force detection of hung controller */
4806 adapter
->detect_tx_hung
= true;
4809 adapter
->link_up
= false;
4810 adapter
->link_speed
= 0;
4811 if (netif_carrier_ok(netdev
)) {
4812 printk(KERN_INFO
"ixgbe: %s NIC Link is Down\n",
4814 netif_carrier_off(netdev
);
4818 if (!netif_carrier_ok(netdev
)) {
4819 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4820 tx_ring
= &adapter
->tx_ring
[i
];
4821 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
4822 some_tx_pending
= 1;
4827 if (some_tx_pending
) {
4828 /* We've lost link, so the controller stops DMA,
4829 * but we've got queued Tx work that's never going
4830 * to get done, so reset controller to flush Tx.
4831 * (Do the reset outside of interrupt context).
4833 schedule_work(&adapter
->reset_task
);
4837 ixgbe_update_stats(adapter
);
4838 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
4841 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
4842 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
4843 u32 tx_flags
, u8
*hdr_len
)
4845 struct ixgbe_adv_tx_context_desc
*context_desc
;
4848 struct ixgbe_tx_buffer
*tx_buffer_info
;
4849 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
4850 u32 mss_l4len_idx
, l4len
;
4852 if (skb_is_gso(skb
)) {
4853 if (skb_header_cloned(skb
)) {
4854 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
4858 l4len
= tcp_hdrlen(skb
);
4861 if (skb
->protocol
== htons(ETH_P_IP
)) {
4862 struct iphdr
*iph
= ip_hdr(skb
);
4865 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4869 adapter
->hw_tso_ctxt
++;
4870 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
4871 ipv6_hdr(skb
)->payload_len
= 0;
4872 tcp_hdr(skb
)->check
=
4873 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4874 &ipv6_hdr(skb
)->daddr
,
4876 adapter
->hw_tso6_ctxt
++;
4879 i
= tx_ring
->next_to_use
;
4881 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4882 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4884 /* VLAN MACLEN IPLEN */
4885 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4887 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4888 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
4889 IXGBE_ADVTXD_MACLEN_SHIFT
);
4890 *hdr_len
+= skb_network_offset(skb
);
4892 (skb_transport_header(skb
) - skb_network_header(skb
));
4894 (skb_transport_header(skb
) - skb_network_header(skb
));
4895 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4896 context_desc
->seqnum_seed
= 0;
4898 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4899 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
4900 IXGBE_ADVTXD_DTYP_CTXT
);
4902 if (skb
->protocol
== htons(ETH_P_IP
))
4903 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4904 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4905 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4909 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
4910 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
4911 /* use index 1 for TSO */
4912 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4913 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4915 tx_buffer_info
->time_stamp
= jiffies
;
4916 tx_buffer_info
->next_to_watch
= i
;
4919 if (i
== tx_ring
->count
)
4921 tx_ring
->next_to_use
= i
;
4928 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
4929 struct ixgbe_ring
*tx_ring
,
4930 struct sk_buff
*skb
, u32 tx_flags
)
4932 struct ixgbe_adv_tx_context_desc
*context_desc
;
4934 struct ixgbe_tx_buffer
*tx_buffer_info
;
4935 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
4937 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
4938 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
4939 i
= tx_ring
->next_to_use
;
4940 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4941 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4943 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4945 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4946 vlan_macip_lens
|= (skb_network_offset(skb
) <<
4947 IXGBE_ADVTXD_MACLEN_SHIFT
);
4948 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
4949 vlan_macip_lens
|= (skb_transport_header(skb
) -
4950 skb_network_header(skb
));
4952 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4953 context_desc
->seqnum_seed
= 0;
4955 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
4956 IXGBE_ADVTXD_DTYP_CTXT
);
4958 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
4959 switch (skb
->protocol
) {
4960 case cpu_to_be16(ETH_P_IP
):
4961 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4962 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
4964 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4965 else if (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)
4967 IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
4969 case cpu_to_be16(ETH_P_IPV6
):
4970 /* XXX what about other V6 headers?? */
4971 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
4973 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4974 else if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_SCTP
)
4976 IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
4979 if (unlikely(net_ratelimit())) {
4980 DPRINTK(PROBE
, WARNING
,
4981 "partial checksum but proto=%x!\n",
4988 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4989 /* use index zero for tx checksum offload */
4990 context_desc
->mss_l4len_idx
= 0;
4992 tx_buffer_info
->time_stamp
= jiffies
;
4993 tx_buffer_info
->next_to_watch
= i
;
4995 adapter
->hw_csum_tx_good
++;
4997 if (i
== tx_ring
->count
)
4999 tx_ring
->next_to_use
= i
;
5007 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
5008 struct ixgbe_ring
*tx_ring
,
5009 struct sk_buff
*skb
, u32 tx_flags
,
5012 struct ixgbe_tx_buffer
*tx_buffer_info
;
5014 unsigned int total
= skb
->len
;
5015 unsigned int offset
= 0, size
, count
= 0, i
;
5016 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
5020 i
= tx_ring
->next_to_use
;
5022 if (skb_dma_map(&adapter
->pdev
->dev
, skb
, DMA_TO_DEVICE
)) {
5023 dev_err(&adapter
->pdev
->dev
, "TX DMA map failed\n");
5027 map
= skb_shinfo(skb
)->dma_maps
;
5029 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
)
5030 /* excluding fcoe_crc_eof for FCoE */
5031 total
-= sizeof(struct fcoe_crc_eof
);
5033 len
= min(skb_headlen(skb
), total
);
5035 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5036 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
5038 tx_buffer_info
->length
= size
;
5039 tx_buffer_info
->dma
= skb_shinfo(skb
)->dma_head
+ offset
;
5040 tx_buffer_info
->time_stamp
= jiffies
;
5041 tx_buffer_info
->next_to_watch
= i
;
5050 if (i
== tx_ring
->count
)
5055 for (f
= 0; f
< nr_frags
; f
++) {
5056 struct skb_frag_struct
*frag
;
5058 frag
= &skb_shinfo(skb
)->frags
[f
];
5059 len
= min((unsigned int)frag
->size
, total
);
5064 if (i
== tx_ring
->count
)
5067 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5068 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
5070 tx_buffer_info
->length
= size
;
5071 tx_buffer_info
->dma
= map
[f
] + offset
;
5072 tx_buffer_info
->time_stamp
= jiffies
;
5073 tx_buffer_info
->next_to_watch
= i
;
5084 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
5085 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
5090 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
5091 struct ixgbe_ring
*tx_ring
,
5092 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
5094 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
5095 struct ixgbe_tx_buffer
*tx_buffer_info
;
5096 u32 olinfo_status
= 0, cmd_type_len
= 0;
5098 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
5100 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
5102 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
5104 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5105 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
5107 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
5108 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
5110 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
5111 IXGBE_ADVTXD_POPTS_SHIFT
;
5113 /* use index 1 context for tso */
5114 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
5115 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
5116 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
5117 IXGBE_ADVTXD_POPTS_SHIFT
;
5119 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
5120 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
5121 IXGBE_ADVTXD_POPTS_SHIFT
;
5123 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
5124 olinfo_status
|= IXGBE_ADVTXD_CC
;
5125 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
5126 if (tx_flags
& IXGBE_TX_FLAGS_FSO
)
5127 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
5130 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
5132 i
= tx_ring
->next_to_use
;
5134 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5135 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
5136 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
5137 tx_desc
->read
.cmd_type_len
=
5138 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
5139 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
5141 if (i
== tx_ring
->count
)
5145 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
5148 * Force memory writes to complete before letting h/w
5149 * know there are new descriptors to fetch. (Only
5150 * applicable for weak-ordered memory model archs,
5155 tx_ring
->next_to_use
= i
;
5156 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
5159 static void ixgbe_atr(struct ixgbe_adapter
*adapter
, struct sk_buff
*skb
,
5160 int queue
, u32 tx_flags
)
5162 /* Right now, we support IPv4 only */
5163 struct ixgbe_atr_input atr_input
;
5165 struct iphdr
*iph
= ip_hdr(skb
);
5166 struct ethhdr
*eth
= (struct ethhdr
*)skb
->data
;
5167 u16 vlan_id
, src_port
, dst_port
, flex_bytes
;
5168 u32 src_ipv4_addr
, dst_ipv4_addr
;
5171 /* check if we're UDP or TCP */
5172 if (iph
->protocol
== IPPROTO_TCP
) {
5174 src_port
= th
->source
;
5175 dst_port
= th
->dest
;
5176 l4type
|= IXGBE_ATR_L4TYPE_TCP
;
5177 /* l4type IPv4 type is 0, no need to assign */
5179 /* Unsupported L4 header, just bail here */
5183 memset(&atr_input
, 0, sizeof(struct ixgbe_atr_input
));
5185 vlan_id
= (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
) >>
5186 IXGBE_TX_FLAGS_VLAN_SHIFT
;
5187 src_ipv4_addr
= iph
->saddr
;
5188 dst_ipv4_addr
= iph
->daddr
;
5189 flex_bytes
= eth
->h_proto
;
5191 ixgbe_atr_set_vlan_id_82599(&atr_input
, vlan_id
);
5192 ixgbe_atr_set_src_port_82599(&atr_input
, dst_port
);
5193 ixgbe_atr_set_dst_port_82599(&atr_input
, src_port
);
5194 ixgbe_atr_set_flex_byte_82599(&atr_input
, flex_bytes
);
5195 ixgbe_atr_set_l4type_82599(&atr_input
, l4type
);
5196 /* src and dst are inverted, think how the receiver sees them */
5197 ixgbe_atr_set_src_ipv4_82599(&atr_input
, dst_ipv4_addr
);
5198 ixgbe_atr_set_dst_ipv4_82599(&atr_input
, src_ipv4_addr
);
5200 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
5201 ixgbe_fdir_add_signature_filter_82599(&adapter
->hw
, &atr_input
, queue
);
5204 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
5205 struct ixgbe_ring
*tx_ring
, int size
)
5207 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5209 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
5210 /* Herbert's original patch had:
5211 * smp_mb__after_netif_stop_queue();
5212 * but since that doesn't exist yet, just open code it. */
5215 /* We need to check again in a case another CPU has just
5216 * made room available. */
5217 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
5220 /* A reprieve! - use start_queue because it doesn't call schedule */
5221 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
5222 ++adapter
->restart_queue
;
5226 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
5227 struct ixgbe_ring
*tx_ring
, int size
)
5229 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
5231 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
5234 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
5236 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
5238 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
)
5239 return smp_processor_id();
5241 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
5242 return (skb
->vlan_tci
& IXGBE_TX_FLAGS_VLAN_PRIO_MASK
) >> 13;
5244 return skb_tx_hash(dev
, skb
);
5247 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
5248 struct net_device
*netdev
)
5250 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5251 struct ixgbe_ring
*tx_ring
;
5253 unsigned int tx_flags
= 0;
5259 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
5260 tx_flags
|= vlan_tx_tag_get(skb
);
5261 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5262 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
5263 tx_flags
|= (skb
->queue_mapping
<< 13);
5265 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
5266 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
5267 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5268 if (skb
->priority
!= TC_PRIO_CONTROL
) {
5269 tx_flags
|= (skb
->queue_mapping
<< 13);
5270 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
5271 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
5273 skb
->queue_mapping
=
5274 adapter
->ring_feature
[RING_F_DCB
].indices
-1;
5278 r_idx
= skb
->queue_mapping
;
5279 tx_ring
= &adapter
->tx_ring
[r_idx
];
5281 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
5282 (skb
->protocol
== htons(ETH_P_FCOE
))) {
5283 tx_flags
|= IXGBE_TX_FLAGS_FCOE
;
5285 r_idx
= smp_processor_id();
5286 r_idx
&= (adapter
->ring_feature
[RING_F_FCOE
].indices
- 1);
5287 r_idx
+= adapter
->ring_feature
[RING_F_FCOE
].mask
;
5288 tx_ring
= &adapter
->tx_ring
[r_idx
];
5291 /* four things can cause us to need a context descriptor */
5292 if (skb_is_gso(skb
) ||
5293 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
5294 (tx_flags
& IXGBE_TX_FLAGS_VLAN
) ||
5295 (tx_flags
& IXGBE_TX_FLAGS_FCOE
))
5298 count
+= TXD_USE_COUNT(skb_headlen(skb
));
5299 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
5300 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
5302 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
5304 return NETDEV_TX_BUSY
;
5307 first
= tx_ring
->next_to_use
;
5308 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
5310 /* setup tx offload for FCoE */
5311 tso
= ixgbe_fso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
5313 dev_kfree_skb_any(skb
);
5314 return NETDEV_TX_OK
;
5317 tx_flags
|= IXGBE_TX_FLAGS_FSO
;
5318 #endif /* IXGBE_FCOE */
5320 if (skb
->protocol
== htons(ETH_P_IP
))
5321 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
5322 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
5324 dev_kfree_skb_any(skb
);
5325 return NETDEV_TX_OK
;
5329 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
5330 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
5331 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
5332 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
5335 count
= ixgbe_tx_map(adapter
, tx_ring
, skb
, tx_flags
, first
);
5337 /* add the ATR filter if ATR is on */
5338 if (tx_ring
->atr_sample_rate
) {
5339 ++tx_ring
->atr_count
;
5340 if ((tx_ring
->atr_count
>= tx_ring
->atr_sample_rate
) &&
5341 test_bit(__IXGBE_FDIR_INIT_DONE
,
5342 &tx_ring
->reinit_state
)) {
5343 ixgbe_atr(adapter
, skb
, tx_ring
->queue_index
,
5345 tx_ring
->atr_count
= 0;
5348 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
, count
, skb
->len
,
5350 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
5353 dev_kfree_skb_any(skb
);
5354 tx_ring
->tx_buffer_info
[first
].time_stamp
= 0;
5355 tx_ring
->next_to_use
= first
;
5358 return NETDEV_TX_OK
;
5362 * ixgbe_get_stats - Get System Network Statistics
5363 * @netdev: network interface device structure
5365 * Returns the address of the device statistics structure.
5366 * The statistics are actually updated from the timer callback.
5368 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
5370 /* only return the current stats */
5371 return &netdev
->stats
;
5375 * ixgbe_set_mac - Change the Ethernet Address of the NIC
5376 * @netdev: network interface device structure
5377 * @p: pointer to an address structure
5379 * Returns 0 on success, negative on failure
5381 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
5383 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5384 struct ixgbe_hw
*hw
= &adapter
->hw
;
5385 struct sockaddr
*addr
= p
;
5387 if (!is_valid_ether_addr(addr
->sa_data
))
5388 return -EADDRNOTAVAIL
;
5390 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
5391 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
5393 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
5399 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
5401 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5402 struct ixgbe_hw
*hw
= &adapter
->hw
;
5406 if (prtad
!= hw
->phy
.mdio
.prtad
)
5408 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
5414 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
5415 u16 addr
, u16 value
)
5417 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5418 struct ixgbe_hw
*hw
= &adapter
->hw
;
5420 if (prtad
!= hw
->phy
.mdio
.prtad
)
5422 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
5425 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
5427 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5429 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
5433 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
5435 * @netdev: network interface device structure
5437 * Returns non-zero on failure
5439 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
5442 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
5443 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
5445 if (is_valid_ether_addr(mac
->san_addr
)) {
5447 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
5454 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
5456 * @netdev: network interface device structure
5458 * Returns non-zero on failure
5460 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
5463 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
5464 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
5466 if (is_valid_ether_addr(mac
->san_addr
)) {
5468 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
5474 #ifdef CONFIG_NET_POLL_CONTROLLER
5476 * Polling 'interrupt' - used by things like netconsole to send skbs
5477 * without having to re-enable interrupts. It's not called while
5478 * the interrupt routine is executing.
5480 static void ixgbe_netpoll(struct net_device
*netdev
)
5482 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5485 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
5486 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
5487 int num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
5488 for (i
= 0; i
< num_q_vectors
; i
++) {
5489 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
5490 ixgbe_msix_clean_many(0, q_vector
);
5493 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
5495 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
5499 static const struct net_device_ops ixgbe_netdev_ops
= {
5500 .ndo_open
= ixgbe_open
,
5501 .ndo_stop
= ixgbe_close
,
5502 .ndo_start_xmit
= ixgbe_xmit_frame
,
5503 .ndo_select_queue
= ixgbe_select_queue
,
5504 .ndo_get_stats
= ixgbe_get_stats
,
5505 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
5506 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
5507 .ndo_validate_addr
= eth_validate_addr
,
5508 .ndo_set_mac_address
= ixgbe_set_mac
,
5509 .ndo_change_mtu
= ixgbe_change_mtu
,
5510 .ndo_tx_timeout
= ixgbe_tx_timeout
,
5511 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
5512 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
5513 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
5514 .ndo_do_ioctl
= ixgbe_ioctl
,
5515 #ifdef CONFIG_NET_POLL_CONTROLLER
5516 .ndo_poll_controller
= ixgbe_netpoll
,
5519 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
5520 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
5521 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
5522 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
5523 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
5524 #endif /* IXGBE_FCOE */
5528 * ixgbe_probe - Device Initialization Routine
5529 * @pdev: PCI device information struct
5530 * @ent: entry in ixgbe_pci_tbl
5532 * Returns 0 on success, negative on failure
5534 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
5535 * The OS initialization, configuring of the adapter private structure,
5536 * and a hardware reset occur.
5538 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
5539 const struct pci_device_id
*ent
)
5541 struct net_device
*netdev
;
5542 struct ixgbe_adapter
*adapter
= NULL
;
5543 struct ixgbe_hw
*hw
;
5544 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
5545 static int cards_found
;
5546 int i
, err
, pci_using_dac
;
5552 err
= pci_enable_device_mem(pdev
);
5556 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)) &&
5557 !pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64))) {
5560 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
5562 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
5564 dev_err(&pdev
->dev
, "No usable DMA "
5565 "configuration, aborting\n");
5572 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
5573 IORESOURCE_MEM
), ixgbe_driver_name
);
5576 "pci_request_selected_regions failed 0x%x\n", err
);
5580 pci_enable_pcie_error_reporting(pdev
);
5582 pci_set_master(pdev
);
5583 pci_save_state(pdev
);
5585 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
5588 goto err_alloc_etherdev
;
5591 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
5593 pci_set_drvdata(pdev
, netdev
);
5594 adapter
= netdev_priv(netdev
);
5596 adapter
->netdev
= netdev
;
5597 adapter
->pdev
= pdev
;
5600 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
5602 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
5603 pci_resource_len(pdev
, 0));
5609 for (i
= 1; i
<= 5; i
++) {
5610 if (pci_resource_len(pdev
, i
) == 0)
5614 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
5615 ixgbe_set_ethtool_ops(netdev
);
5616 netdev
->watchdog_timeo
= 5 * HZ
;
5617 strcpy(netdev
->name
, pci_name(pdev
));
5619 adapter
->bd_number
= cards_found
;
5622 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
5623 hw
->mac
.type
= ii
->mac
;
5626 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
5627 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
5628 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
5629 if (!(eec
& (1 << 8)))
5630 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
5633 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
5634 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
5635 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
5636 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
5637 hw
->phy
.mdio
.mmds
= 0;
5638 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
5639 hw
->phy
.mdio
.dev
= netdev
;
5640 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
5641 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
5643 /* set up this timer and work struct before calling get_invariants
5644 * which might start the timer
5646 init_timer(&adapter
->sfp_timer
);
5647 adapter
->sfp_timer
.function
= &ixgbe_sfp_timer
;
5648 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
5650 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
5652 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
5653 INIT_WORK(&adapter
->multispeed_fiber_task
, ixgbe_multispeed_fiber_task
);
5655 /* a new SFP+ module arrival, called from GPI SDP2 context */
5656 INIT_WORK(&adapter
->sfp_config_module_task
,
5657 ixgbe_sfp_config_module_task
);
5659 ii
->get_invariants(hw
);
5661 /* setup the private structure */
5662 err
= ixgbe_sw_init(adapter
);
5667 * If there is a fan on this device and it has failed log the
5670 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
5671 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
5672 if (esdp
& IXGBE_ESDP_SDP1
)
5673 DPRINTK(PROBE
, CRIT
,
5674 "Fan has stopped, replace the adapter\n");
5677 /* reset_hw fills in the perm_addr as well */
5678 err
= hw
->mac
.ops
.reset_hw(hw
);
5679 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
5680 hw
->mac
.type
== ixgbe_mac_82598EB
) {
5682 * Start a kernel thread to watch for a module to arrive.
5683 * Only do this for 82598, since 82599 will generate
5684 * interrupts on module arrival.
5686 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
5687 mod_timer(&adapter
->sfp_timer
,
5688 round_jiffies(jiffies
+ (2 * HZ
)));
5690 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
5691 dev_err(&adapter
->pdev
->dev
, "failed to initialize because "
5692 "an unsupported SFP+ module type was detected.\n"
5693 "Reload the driver after installing a supported "
5697 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
5701 netdev
->features
= NETIF_F_SG
|
5703 NETIF_F_HW_VLAN_TX
|
5704 NETIF_F_HW_VLAN_RX
|
5705 NETIF_F_HW_VLAN_FILTER
;
5707 netdev
->features
|= NETIF_F_IPV6_CSUM
;
5708 netdev
->features
|= NETIF_F_TSO
;
5709 netdev
->features
|= NETIF_F_TSO6
;
5710 netdev
->features
|= NETIF_F_GRO
;
5712 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
5713 netdev
->features
|= NETIF_F_SCTP_CSUM
;
5715 netdev
->vlan_features
|= NETIF_F_TSO
;
5716 netdev
->vlan_features
|= NETIF_F_TSO6
;
5717 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
5718 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
5719 netdev
->vlan_features
|= NETIF_F_SG
;
5721 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
5722 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
5724 #ifdef CONFIG_IXGBE_DCB
5725 netdev
->dcbnl_ops
= &dcbnl_ops
;
5729 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
5730 if (hw
->mac
.ops
.get_device_caps
) {
5731 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
5732 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
5733 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
5736 #endif /* IXGBE_FCOE */
5738 netdev
->features
|= NETIF_F_HIGHDMA
;
5740 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
5741 netdev
->features
|= NETIF_F_LRO
;
5743 /* make sure the EEPROM is good */
5744 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
5745 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
5750 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
5751 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
5753 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
5754 dev_err(&pdev
->dev
, "invalid MAC address\n");
5759 init_timer(&adapter
->watchdog_timer
);
5760 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
5761 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
5763 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
5764 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
5766 err
= ixgbe_init_interrupt_scheme(adapter
);
5770 switch (pdev
->device
) {
5771 case IXGBE_DEV_ID_82599_KX4
:
5772 adapter
->wol
= (IXGBE_WUFC_MAG
| IXGBE_WUFC_EX
|
5773 IXGBE_WUFC_MC
| IXGBE_WUFC_BC
);
5774 /* Enable ACPI wakeup in GRC */
5775 IXGBE_WRITE_REG(hw
, IXGBE_GRC
,
5776 (IXGBE_READ_REG(hw
, IXGBE_GRC
) & ~IXGBE_GRC_APME
));
5782 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
5784 /* pick up the PCI bus settings for reporting later */
5785 hw
->mac
.ops
.get_bus_info(hw
);
5787 /* print bus type/speed/width info */
5788 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) %pM\n",
5789 ((hw
->bus
.speed
== ixgbe_bus_speed_5000
) ? "5.0Gb/s":
5790 (hw
->bus
.speed
== ixgbe_bus_speed_2500
) ? "2.5Gb/s":"Unknown"),
5791 ((hw
->bus
.width
== ixgbe_bus_width_pcie_x8
) ? "Width x8" :
5792 (hw
->bus
.width
== ixgbe_bus_width_pcie_x4
) ? "Width x4" :
5793 (hw
->bus
.width
== ixgbe_bus_width_pcie_x1
) ? "Width x1" :
5796 ixgbe_read_pba_num_generic(hw
, &part_num
);
5797 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
5798 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
5799 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
5800 (part_num
>> 8), (part_num
& 0xff));
5802 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5803 hw
->mac
.type
, hw
->phy
.type
,
5804 (part_num
>> 8), (part_num
& 0xff));
5806 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
5807 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
5808 "this card is not sufficient for optimal "
5810 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
5811 "PCI-Express slot is required.\n");
5814 /* save off EEPROM version number */
5815 hw
->eeprom
.ops
.read(hw
, 0x29, &adapter
->eeprom_version
);
5817 /* reset the hardware with the new settings */
5818 err
= hw
->mac
.ops
.start_hw(hw
);
5820 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
5821 /* We are running on a pre-production device, log a warning */
5822 dev_warn(&pdev
->dev
, "This device is a pre-production "
5823 "adapter/LOM. Please be aware there may be issues "
5824 "associated with your hardware. If you are "
5825 "experiencing problems please contact your Intel or "
5826 "hardware representative who provided you with this "
5829 strcpy(netdev
->name
, "eth%d");
5830 err
= register_netdev(netdev
);
5834 /* carrier off reporting is important to ethtool even BEFORE open */
5835 netif_carrier_off(netdev
);
5837 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
5838 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
5839 INIT_WORK(&adapter
->fdir_reinit_task
, ixgbe_fdir_reinit_task
);
5841 #ifdef CONFIG_IXGBE_DCA
5842 if (dca_add_requester(&pdev
->dev
) == 0) {
5843 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
5844 ixgbe_setup_dca(adapter
);
5847 /* add san mac addr to netdev */
5848 ixgbe_add_sanmac_netdev(netdev
);
5850 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
5855 ixgbe_release_hw_control(adapter
);
5856 ixgbe_clear_interrupt_scheme(adapter
);
5859 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
5860 del_timer_sync(&adapter
->sfp_timer
);
5861 cancel_work_sync(&adapter
->sfp_task
);
5862 cancel_work_sync(&adapter
->multispeed_fiber_task
);
5863 cancel_work_sync(&adapter
->sfp_config_module_task
);
5864 iounmap(hw
->hw_addr
);
5866 free_netdev(netdev
);
5868 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
5872 pci_disable_device(pdev
);
5877 * ixgbe_remove - Device Removal Routine
5878 * @pdev: PCI device information struct
5880 * ixgbe_remove is called by the PCI subsystem to alert the driver
5881 * that it should release a PCI device. The could be caused by a
5882 * Hot-Plug event, or because the driver is going to be removed from
5885 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
5887 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5888 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5890 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5891 /* clear the module not found bit to make sure the worker won't
5894 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
5895 del_timer_sync(&adapter
->watchdog_timer
);
5897 del_timer_sync(&adapter
->sfp_timer
);
5898 cancel_work_sync(&adapter
->watchdog_task
);
5899 cancel_work_sync(&adapter
->sfp_task
);
5900 cancel_work_sync(&adapter
->multispeed_fiber_task
);
5901 cancel_work_sync(&adapter
->sfp_config_module_task
);
5902 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
5903 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
5904 cancel_work_sync(&adapter
->fdir_reinit_task
);
5905 flush_scheduled_work();
5907 #ifdef CONFIG_IXGBE_DCA
5908 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
5909 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
5910 dca_remove_requester(&pdev
->dev
);
5911 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
5916 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
5917 ixgbe_cleanup_fcoe(adapter
);
5919 #endif /* IXGBE_FCOE */
5921 /* remove the added san mac */
5922 ixgbe_del_sanmac_netdev(netdev
);
5924 if (netdev
->reg_state
== NETREG_REGISTERED
)
5925 unregister_netdev(netdev
);
5927 ixgbe_clear_interrupt_scheme(adapter
);
5929 ixgbe_release_hw_control(adapter
);
5931 iounmap(adapter
->hw
.hw_addr
);
5932 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
5935 DPRINTK(PROBE
, INFO
, "complete\n");
5937 free_netdev(netdev
);
5939 pci_disable_pcie_error_reporting(pdev
);
5941 pci_disable_device(pdev
);
5945 * ixgbe_io_error_detected - called when PCI error is detected
5946 * @pdev: Pointer to PCI device
5947 * @state: The current pci connection state
5949 * This function is called after a PCI bus error affecting
5950 * this device has been detected.
5952 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
5953 pci_channel_state_t state
)
5955 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5956 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5958 netif_device_detach(netdev
);
5960 if (state
== pci_channel_io_perm_failure
)
5961 return PCI_ERS_RESULT_DISCONNECT
;
5963 if (netif_running(netdev
))
5964 ixgbe_down(adapter
);
5965 pci_disable_device(pdev
);
5967 /* Request a slot reset. */
5968 return PCI_ERS_RESULT_NEED_RESET
;
5972 * ixgbe_io_slot_reset - called after the pci bus has been reset.
5973 * @pdev: Pointer to PCI device
5975 * Restart the card from scratch, as if from a cold-boot.
5977 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
5979 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5980 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5981 pci_ers_result_t result
;
5984 if (pci_enable_device_mem(pdev
)) {
5986 "Cannot re-enable PCI device after reset.\n");
5987 result
= PCI_ERS_RESULT_DISCONNECT
;
5989 pci_set_master(pdev
);
5990 pci_restore_state(pdev
);
5991 pci_save_state(pdev
);
5993 pci_wake_from_d3(pdev
, false);
5995 ixgbe_reset(adapter
);
5996 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5997 result
= PCI_ERS_RESULT_RECOVERED
;
6000 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
6003 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err
);
6004 /* non-fatal, continue */
6011 * ixgbe_io_resume - called when traffic can start flowing again.
6012 * @pdev: Pointer to PCI device
6014 * This callback is called when the error recovery driver tells us that
6015 * its OK to resume normal operation.
6017 static void ixgbe_io_resume(struct pci_dev
*pdev
)
6019 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6020 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6022 if (netif_running(netdev
)) {
6023 if (ixgbe_up(adapter
)) {
6024 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
6029 netif_device_attach(netdev
);
6032 static struct pci_error_handlers ixgbe_err_handler
= {
6033 .error_detected
= ixgbe_io_error_detected
,
6034 .slot_reset
= ixgbe_io_slot_reset
,
6035 .resume
= ixgbe_io_resume
,
6038 static struct pci_driver ixgbe_driver
= {
6039 .name
= ixgbe_driver_name
,
6040 .id_table
= ixgbe_pci_tbl
,
6041 .probe
= ixgbe_probe
,
6042 .remove
= __devexit_p(ixgbe_remove
),
6044 .suspend
= ixgbe_suspend
,
6045 .resume
= ixgbe_resume
,
6047 .shutdown
= ixgbe_shutdown
,
6048 .err_handler
= &ixgbe_err_handler
6052 * ixgbe_init_module - Driver Registration Routine
6054 * ixgbe_init_module is the first routine called when the driver is
6055 * loaded. All it does is register with the PCI subsystem.
6057 static int __init
ixgbe_init_module(void)
6060 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
6061 ixgbe_driver_string
, ixgbe_driver_version
);
6063 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
6065 #ifdef CONFIG_IXGBE_DCA
6066 dca_register_notify(&dca_notifier
);
6069 ret
= pci_register_driver(&ixgbe_driver
);
6073 module_init(ixgbe_init_module
);
6076 * ixgbe_exit_module - Driver Exit Cleanup Routine
6078 * ixgbe_exit_module is called just before the driver is removed
6081 static void __exit
ixgbe_exit_module(void)
6083 #ifdef CONFIG_IXGBE_DCA
6084 dca_unregister_notify(&dca_notifier
);
6086 pci_unregister_driver(&ixgbe_driver
);
6089 #ifdef CONFIG_IXGBE_DCA
6090 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
6095 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
6096 __ixgbe_notify_dca
);
6098 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
6101 #endif /* CONFIG_IXGBE_DCA */
6104 * ixgbe_get_hw_dev_name - return device name string
6105 * used by hardware layer to print debugging information
6107 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
6109 struct ixgbe_adapter
*adapter
= hw
->back
;
6110 return adapter
->netdev
->name
;
6114 module_exit(ixgbe_exit_module
);