1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42 #include <scsi/fc/fc_fcoe.h>
45 #include "ixgbe_common.h"
47 char ixgbe_driver_name
[] = "ixgbe";
48 static const char ixgbe_driver_string
[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
51 #define DRV_VERSION "2.0.34-k2"
52 const char ixgbe_driver_version
[] = DRV_VERSION
;
53 static char ixgbe_copyright
[] = "Copyright (c) 1999-2009 Intel Corporation.";
55 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
56 [board_82598
] = &ixgbe_82598_info
,
57 [board_82599
] = &ixgbe_82599_info
,
60 /* ixgbe_pci_tbl - PCI Device ID Table
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static struct pci_device_id ixgbe_pci_tbl
[] = {
69 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
),
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
79 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
81 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
83 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
85 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
87 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
),
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
),
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
),
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
),
98 /* required last entry */
101 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
103 #ifdef CONFIG_IXGBE_DCA
104 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
106 static struct notifier_block dca_notifier
= {
107 .notifier_call
= ixgbe_notify_dca
,
113 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
114 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
115 MODULE_LICENSE("GPL");
116 MODULE_VERSION(DRV_VERSION
);
118 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
120 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
124 /* Let firmware take over control of h/w */
125 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
126 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
127 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
130 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
134 /* Let firmware know the driver has taken over */
135 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
136 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
137 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
141 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
142 * @adapter: pointer to adapter struct
143 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
144 * @queue: queue to map the corresponding interrupt to
145 * @msix_vector: the vector to map to the corresponding queue
148 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
149 u8 queue
, u8 msix_vector
)
152 struct ixgbe_hw
*hw
= &adapter
->hw
;
153 switch (hw
->mac
.type
) {
154 case ixgbe_mac_82598EB
:
155 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
158 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
159 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
160 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
161 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
162 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
164 case ixgbe_mac_82599EB
:
165 if (direction
== -1) {
167 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
168 index
= ((queue
& 1) * 8);
169 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
170 ivar
&= ~(0xFF << index
);
171 ivar
|= (msix_vector
<< index
);
172 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
175 /* tx or rx causes */
176 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
177 index
= ((16 * (queue
& 1)) + (8 * direction
));
178 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
179 ivar
&= ~(0xFF << index
);
180 ivar
|= (msix_vector
<< index
);
181 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
189 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
194 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
195 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
196 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
198 mask
= (qmask
& 0xFFFFFFFF);
199 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
200 mask
= (qmask
>> 32);
201 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
205 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
206 struct ixgbe_tx_buffer
209 tx_buffer_info
->dma
= 0;
210 if (tx_buffer_info
->skb
) {
211 skb_dma_unmap(&adapter
->pdev
->dev
, tx_buffer_info
->skb
,
213 dev_kfree_skb_any(tx_buffer_info
->skb
);
214 tx_buffer_info
->skb
= NULL
;
216 tx_buffer_info
->time_stamp
= 0;
217 /* tx_buffer_info must be completely set up in the transmit path */
220 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
221 struct ixgbe_ring
*tx_ring
,
224 struct ixgbe_hw
*hw
= &adapter
->hw
;
226 /* Detect a transmit hang in hardware, this serializes the
227 * check with the clearing of time_stamp and movement of eop */
228 adapter
->detect_tx_hung
= false;
229 if (tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
230 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
231 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
232 /* detected Tx unit hang */
233 union ixgbe_adv_tx_desc
*tx_desc
;
234 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
235 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
237 " TDH, TDT <%x>, <%x>\n"
238 " next_to_use <%x>\n"
239 " next_to_clean <%x>\n"
240 "tx_buffer_info[next_to_clean]\n"
241 " time_stamp <%lx>\n"
243 tx_ring
->queue_index
,
244 IXGBE_READ_REG(hw
, tx_ring
->head
),
245 IXGBE_READ_REG(hw
, tx_ring
->tail
),
246 tx_ring
->next_to_use
, eop
,
247 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
254 #define IXGBE_MAX_TXD_PWR 14
255 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
257 /* Tx Descriptors needed, worst case */
258 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
259 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
260 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
261 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
263 static void ixgbe_tx_timeout(struct net_device
*netdev
);
266 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
267 * @q_vector: structure containing interrupt and ring information
268 * @tx_ring: tx ring to clean
270 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
271 struct ixgbe_ring
*tx_ring
)
273 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
274 struct net_device
*netdev
= adapter
->netdev
;
275 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
276 struct ixgbe_tx_buffer
*tx_buffer_info
;
277 unsigned int i
, eop
, count
= 0;
278 unsigned int total_bytes
= 0, total_packets
= 0;
280 i
= tx_ring
->next_to_clean
;
281 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
282 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
284 while ((eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) &&
285 (count
< tx_ring
->work_limit
)) {
286 bool cleaned
= false;
287 for ( ; !cleaned
; count
++) {
289 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
290 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
291 cleaned
= (i
== eop
);
292 skb
= tx_buffer_info
->skb
;
294 if (cleaned
&& skb
) {
295 unsigned int segs
, bytecount
;
296 unsigned int hlen
= skb_headlen(skb
);
298 /* gso_segs is currently only valid for tcp */
299 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
301 /* adjust for FCoE Sequence Offload */
302 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
303 && (skb
->protocol
== htons(ETH_P_FCOE
)) &&
305 hlen
= skb_transport_offset(skb
) +
306 sizeof(struct fc_frame_header
) +
307 sizeof(struct fcoe_crc_eof
);
308 segs
= DIV_ROUND_UP(skb
->len
- hlen
,
309 skb_shinfo(skb
)->gso_size
);
311 #endif /* IXGBE_FCOE */
312 /* multiply data chunks by size of headers */
313 bytecount
= ((segs
- 1) * hlen
) + skb
->len
;
314 total_packets
+= segs
;
315 total_bytes
+= bytecount
;
318 ixgbe_unmap_and_free_tx_resource(adapter
,
321 tx_desc
->wb
.status
= 0;
324 if (i
== tx_ring
->count
)
328 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
329 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
332 tx_ring
->next_to_clean
= i
;
334 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
335 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
336 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
337 /* Make sure that anybody stopping the queue after this
338 * sees the new next_to_clean.
341 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
342 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
343 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
344 ++adapter
->restart_queue
;
348 if (adapter
->detect_tx_hung
) {
349 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
350 /* schedule immediate reset if we believe we hung */
352 "tx hang %d detected, resetting adapter\n",
353 adapter
->tx_timeout_count
+ 1);
354 ixgbe_tx_timeout(adapter
->netdev
);
358 /* re-arm the interrupt */
359 if (count
>= tx_ring
->work_limit
)
360 ixgbe_irq_rearm_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
362 tx_ring
->total_bytes
+= total_bytes
;
363 tx_ring
->total_packets
+= total_packets
;
364 tx_ring
->stats
.packets
+= total_packets
;
365 tx_ring
->stats
.bytes
+= total_bytes
;
366 adapter
->net_stats
.tx_bytes
+= total_bytes
;
367 adapter
->net_stats
.tx_packets
+= total_packets
;
368 return (count
< tx_ring
->work_limit
);
371 #ifdef CONFIG_IXGBE_DCA
372 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
373 struct ixgbe_ring
*rx_ring
)
377 int q
= rx_ring
- adapter
->rx_ring
;
379 if (rx_ring
->cpu
!= cpu
) {
380 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
381 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
382 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
383 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
384 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
385 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599
;
386 rxctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
387 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
);
389 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
390 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
391 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN
);
392 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN
|
393 IXGBE_DCA_RXCTRL_DESC_HSRO_EN
);
394 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
400 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
401 struct ixgbe_ring
*tx_ring
)
405 int q
= tx_ring
- adapter
->tx_ring
;
407 if (tx_ring
->cpu
!= cpu
) {
408 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
409 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
410 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
411 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
412 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
413 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599
;
414 txctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
415 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
);
417 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
418 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
424 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
428 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
431 /* always use CB2 mode, difference is masked in the CB driver */
432 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
434 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
435 adapter
->tx_ring
[i
].cpu
= -1;
436 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
438 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
439 adapter
->rx_ring
[i
].cpu
= -1;
440 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
444 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
446 struct net_device
*netdev
= dev_get_drvdata(dev
);
447 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
448 unsigned long event
= *(unsigned long *)data
;
451 case DCA_PROVIDER_ADD
:
452 /* if we're already enabled, don't do it again */
453 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
455 if (dca_add_requester(dev
) == 0) {
456 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
457 ixgbe_setup_dca(adapter
);
460 /* Fall Through since DCA is disabled. */
461 case DCA_PROVIDER_REMOVE
:
462 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
463 dca_remove_requester(dev
);
464 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
465 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
473 #endif /* CONFIG_IXGBE_DCA */
475 * ixgbe_receive_skb - Send a completed packet up the stack
476 * @adapter: board private structure
477 * @skb: packet to send up
478 * @status: hardware indication of status of receive
479 * @rx_ring: rx descriptor ring (for a specific queue) to setup
480 * @rx_desc: rx descriptor
482 static void ixgbe_receive_skb(struct ixgbe_q_vector
*q_vector
,
483 struct sk_buff
*skb
, u8 status
,
484 struct ixgbe_ring
*ring
,
485 union ixgbe_adv_rx_desc
*rx_desc
)
487 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
488 struct napi_struct
*napi
= &q_vector
->napi
;
489 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
490 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
492 skb_record_rx_queue(skb
, ring
->queue_index
);
493 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
494 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
495 vlan_gro_receive(napi
, adapter
->vlgrp
, tag
, skb
);
497 napi_gro_receive(napi
, skb
);
499 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
500 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
507 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
508 * @adapter: address of board private structure
509 * @status_err: hardware indication of status of receive
510 * @skb: skb currently being received and modified
512 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
513 u32 status_err
, struct sk_buff
*skb
)
515 skb
->ip_summed
= CHECKSUM_NONE
;
517 /* Rx csum disabled */
518 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
521 /* if IP and error */
522 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
523 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
524 adapter
->hw_csum_rx_error
++;
528 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
531 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
532 adapter
->hw_csum_rx_error
++;
536 /* It must be a TCP or UDP packet with a valid checksum */
537 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
538 adapter
->hw_csum_rx_good
++;
541 static inline void ixgbe_release_rx_desc(struct ixgbe_hw
*hw
,
542 struct ixgbe_ring
*rx_ring
, u32 val
)
545 * Force memory writes to complete before letting h/w
546 * know there are new descriptors to fetch. (Only
547 * applicable for weak-ordered memory model archs,
551 IXGBE_WRITE_REG(hw
, IXGBE_RDT(rx_ring
->reg_idx
), val
);
555 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
556 * @adapter: address of board private structure
558 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
559 struct ixgbe_ring
*rx_ring
,
562 struct pci_dev
*pdev
= adapter
->pdev
;
563 union ixgbe_adv_rx_desc
*rx_desc
;
564 struct ixgbe_rx_buffer
*bi
;
566 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
568 i
= rx_ring
->next_to_use
;
569 bi
= &rx_ring
->rx_buffer_info
[i
];
571 while (cleaned_count
--) {
572 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
575 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
577 bi
->page
= alloc_page(GFP_ATOMIC
);
579 adapter
->alloc_rx_page_failed
++;
584 /* use a half page if we're re-using */
585 bi
->page_offset
^= (PAGE_SIZE
/ 2);
588 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
596 skb
= netdev_alloc_skb(adapter
->netdev
, bufsz
);
599 adapter
->alloc_rx_buff_failed
++;
604 * Make buffer alignment 2 beyond a 16 byte boundary
605 * this will result in a 16 byte aligned IP header after
606 * the 14 byte MAC header is removed
608 skb_reserve(skb
, NET_IP_ALIGN
);
611 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
614 /* Refresh the desc even if buffer_addrs didn't change because
615 * each write-back erases this info. */
616 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
617 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
618 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
620 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
624 if (i
== rx_ring
->count
)
626 bi
= &rx_ring
->rx_buffer_info
[i
];
630 if (rx_ring
->next_to_use
!= i
) {
631 rx_ring
->next_to_use
= i
;
633 i
= (rx_ring
->count
- 1);
635 ixgbe_release_rx_desc(&adapter
->hw
, rx_ring
, i
);
639 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
641 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
644 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
646 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
649 static inline u32
ixgbe_get_rsc_count(union ixgbe_adv_rx_desc
*rx_desc
)
651 return (le32_to_cpu(rx_desc
->wb
.lower
.lo_dword
.data
) &
652 IXGBE_RXDADV_RSCCNT_MASK
) >>
653 IXGBE_RXDADV_RSCCNT_SHIFT
;
657 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
658 * @skb: pointer to the last skb in the rsc queue
660 * This function changes a queue full of hw rsc buffers into a completed
661 * packet. It uses the ->prev pointers to find the first packet and then
662 * turns it into the frag list owner.
664 static inline struct sk_buff
*ixgbe_transform_rsc_queue(struct sk_buff
*skb
)
666 unsigned int frag_list_size
= 0;
669 struct sk_buff
*prev
= skb
->prev
;
670 frag_list_size
+= skb
->len
;
675 skb_shinfo(skb
)->frag_list
= skb
->next
;
677 skb
->len
+= frag_list_size
;
678 skb
->data_len
+= frag_list_size
;
679 skb
->truesize
+= frag_list_size
;
683 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
684 struct ixgbe_ring
*rx_ring
,
685 int *work_done
, int work_to_do
)
687 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
688 struct pci_dev
*pdev
= adapter
->pdev
;
689 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
690 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
692 unsigned int i
, rsc_count
= 0;
695 bool cleaned
= false;
696 int cleaned_count
= 0;
697 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
700 #endif /* IXGBE_FCOE */
702 i
= rx_ring
->next_to_clean
;
703 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
704 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
705 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
707 while (staterr
& IXGBE_RXD_STAT_DD
) {
709 if (*work_done
>= work_to_do
)
713 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
714 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
715 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
716 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
717 if (hdr_info
& IXGBE_RXDADV_SPH
)
718 adapter
->rx_hdr_split
++;
719 if (len
> IXGBE_RX_HDR_SIZE
)
720 len
= IXGBE_RX_HDR_SIZE
;
721 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
723 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
727 skb
= rx_buffer_info
->skb
;
728 prefetch(skb
->data
- NET_IP_ALIGN
);
729 rx_buffer_info
->skb
= NULL
;
731 if (rx_buffer_info
->dma
) {
732 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
739 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
740 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
741 rx_buffer_info
->page_dma
= 0;
742 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
743 rx_buffer_info
->page
,
744 rx_buffer_info
->page_offset
,
747 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
748 (page_count(rx_buffer_info
->page
) != 1))
749 rx_buffer_info
->page
= NULL
;
751 get_page(rx_buffer_info
->page
);
753 skb
->len
+= upper_len
;
754 skb
->data_len
+= upper_len
;
755 skb
->truesize
+= upper_len
;
759 if (i
== rx_ring
->count
)
762 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
766 if (adapter
->flags
& IXGBE_FLAG2_RSC_CAPABLE
)
767 rsc_count
= ixgbe_get_rsc_count(rx_desc
);
770 u32 nextp
= (staterr
& IXGBE_RXDADV_NEXTP_MASK
) >>
771 IXGBE_RXDADV_NEXTP_SHIFT
;
772 next_buffer
= &rx_ring
->rx_buffer_info
[nextp
];
773 rx_ring
->rsc_count
+= (rsc_count
- 1);
775 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
778 if (staterr
& IXGBE_RXD_STAT_EOP
) {
780 skb
= ixgbe_transform_rsc_queue(skb
);
781 rx_ring
->stats
.packets
++;
782 rx_ring
->stats
.bytes
+= skb
->len
;
784 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
785 rx_buffer_info
->skb
= next_buffer
->skb
;
786 rx_buffer_info
->dma
= next_buffer
->dma
;
787 next_buffer
->skb
= skb
;
788 next_buffer
->dma
= 0;
790 skb
->next
= next_buffer
->skb
;
791 skb
->next
->prev
= skb
;
793 adapter
->non_eop_descs
++;
797 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
798 dev_kfree_skb_irq(skb
);
802 ixgbe_rx_checksum(adapter
, staterr
, skb
);
804 /* probably a little skewed due to removing CRC */
805 total_rx_bytes
+= skb
->len
;
808 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
810 /* if ddp, not passing to ULD unless for FCP_RSP or error */
811 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
812 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
816 #endif /* IXGBE_FCOE */
817 ixgbe_receive_skb(q_vector
, skb
, staterr
, rx_ring
, rx_desc
);
820 rx_desc
->wb
.upper
.status_error
= 0;
822 /* return some buffers to hardware, one at a time is too slow */
823 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
824 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
828 /* use prefetched values */
830 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
832 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
835 rx_ring
->next_to_clean
= i
;
836 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
839 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
842 /* include DDPed FCoE data */
846 mss
= adapter
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
847 sizeof(struct fc_frame_header
) -
848 sizeof(struct fcoe_crc_eof
);
851 total_rx_bytes
+= ddp_bytes
;
852 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
854 #endif /* IXGBE_FCOE */
856 rx_ring
->total_packets
+= total_rx_packets
;
857 rx_ring
->total_bytes
+= total_rx_bytes
;
858 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
859 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
864 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
866 * ixgbe_configure_msix - Configure MSI-X hardware
867 * @adapter: board private structure
869 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
872 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
874 struct ixgbe_q_vector
*q_vector
;
875 int i
, j
, q_vectors
, v_idx
, r_idx
;
878 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
881 * Populate the IVAR table and set the ITR values to the
882 * corresponding register.
884 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
885 q_vector
= adapter
->q_vector
[v_idx
];
886 /* XXX for_each_bit(...) */
887 r_idx
= find_first_bit(q_vector
->rxr_idx
,
888 adapter
->num_rx_queues
);
890 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
891 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
892 ixgbe_set_ivar(adapter
, 0, j
, v_idx
);
893 r_idx
= find_next_bit(q_vector
->rxr_idx
,
894 adapter
->num_rx_queues
,
897 r_idx
= find_first_bit(q_vector
->txr_idx
,
898 adapter
->num_tx_queues
);
900 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
901 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
902 ixgbe_set_ivar(adapter
, 1, j
, v_idx
);
903 r_idx
= find_next_bit(q_vector
->txr_idx
,
904 adapter
->num_tx_queues
,
908 /* if this is a tx only vector halve the interrupt rate */
909 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
910 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
911 else if (q_vector
->rxr_count
)
913 q_vector
->eitr
= adapter
->eitr_param
;
915 ixgbe_write_eitr(q_vector
);
918 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
919 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
921 else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
922 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
923 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
925 /* set up to autoclear timer, and the vectors */
926 mask
= IXGBE_EIMS_ENABLE_MASK
;
927 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
928 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
935 latency_invalid
= 255
939 * ixgbe_update_itr - update the dynamic ITR value based on statistics
940 * @adapter: pointer to adapter
941 * @eitr: eitr setting (ints per sec) to give last timeslice
942 * @itr_setting: current throttle rate in ints/second
943 * @packets: the number of packets during this measurement interval
944 * @bytes: the number of bytes during this measurement interval
946 * Stores a new ITR value based on packets and byte
947 * counts during the last interrupt. The advantage of per interrupt
948 * computation is faster updates and more accurate ITR for the current
949 * traffic pattern. Constants in this function were computed
950 * based on theoretical maximum wire speed and thresholds were set based
951 * on testing data as well as attempting to minimize response time
952 * while increasing bulk throughput.
953 * this functionality is controlled by the InterruptThrottleRate module
954 * parameter (see ixgbe_param.c)
956 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
957 u32 eitr
, u8 itr_setting
,
958 int packets
, int bytes
)
960 unsigned int retval
= itr_setting
;
965 goto update_itr_done
;
968 /* simple throttlerate management
969 * 0-20MB/s lowest (100000 ints/s)
970 * 20-100MB/s low (20000 ints/s)
971 * 100-1249MB/s bulk (8000 ints/s)
973 /* what was last interrupt timeslice? */
974 timepassed_us
= 1000000/eitr
;
975 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
977 switch (itr_setting
) {
979 if (bytes_perint
> adapter
->eitr_low
)
980 retval
= low_latency
;
983 if (bytes_perint
> adapter
->eitr_high
)
984 retval
= bulk_latency
;
985 else if (bytes_perint
<= adapter
->eitr_low
)
986 retval
= lowest_latency
;
989 if (bytes_perint
<= adapter
->eitr_high
)
990 retval
= low_latency
;
999 * ixgbe_write_eitr - write EITR register in hardware specific way
1000 * @q_vector: structure containing interrupt and ring information
1002 * This function is made to be called by ethtool and by the driver
1003 * when it needs to update EITR registers at runtime. Hardware
1004 * specific quirks/differences are taken care of here.
1006 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1008 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1009 struct ixgbe_hw
*hw
= &adapter
->hw
;
1010 int v_idx
= q_vector
->v_idx
;
1011 u32 itr_reg
= EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
);
1013 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1014 /* must write high and low 16 bits to reset counter */
1015 itr_reg
|= (itr_reg
<< 16);
1016 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1018 * set the WDIS bit to not clear the timer bits and cause an
1019 * immediate assertion of the interrupt
1021 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1023 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1026 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
1028 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1030 u8 current_itr
, ret_itr
;
1032 struct ixgbe_ring
*rx_ring
, *tx_ring
;
1034 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1035 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1036 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1037 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1039 tx_ring
->total_packets
,
1040 tx_ring
->total_bytes
);
1041 /* if the result for this queue would decrease interrupt
1042 * rate for this vector then use that result */
1043 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
1044 q_vector
->tx_itr
- 1 : ret_itr
);
1045 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1049 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1050 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1051 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1052 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1054 rx_ring
->total_packets
,
1055 rx_ring
->total_bytes
);
1056 /* if the result for this queue would decrease interrupt
1057 * rate for this vector then use that result */
1058 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
1059 q_vector
->rx_itr
- 1 : ret_itr
);
1060 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1064 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1066 switch (current_itr
) {
1067 /* counts and packets in update_itr are dependent on these numbers */
1068 case lowest_latency
:
1072 new_itr
= 20000; /* aka hwitr = ~200 */
1080 if (new_itr
!= q_vector
->eitr
) {
1081 /* do an exponential smoothing */
1082 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1084 /* save the algorithm value here, not the smoothed one */
1085 q_vector
->eitr
= new_itr
;
1087 ixgbe_write_eitr(q_vector
);
1093 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
1095 struct ixgbe_hw
*hw
= &adapter
->hw
;
1097 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
1098 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
1099 DPRINTK(PROBE
, CRIT
, "Fan has stopped, replace the adapter\n");
1100 /* write to clear the interrupt */
1101 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1105 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
1107 struct ixgbe_hw
*hw
= &adapter
->hw
;
1109 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
1110 /* Clear the interrupt */
1111 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1112 schedule_work(&adapter
->multispeed_fiber_task
);
1113 } else if (eicr
& IXGBE_EICR_GPI_SDP2
) {
1114 /* Clear the interrupt */
1115 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
1116 schedule_work(&adapter
->sfp_config_module_task
);
1118 /* Interrupt isn't for us... */
1123 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
1125 struct ixgbe_hw
*hw
= &adapter
->hw
;
1128 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1129 adapter
->link_check_timeout
= jiffies
;
1130 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1131 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
1132 schedule_work(&adapter
->watchdog_task
);
1136 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
1138 struct net_device
*netdev
= data
;
1139 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1140 struct ixgbe_hw
*hw
= &adapter
->hw
;
1144 * Workaround for Silicon errata. Use clear-by-write instead
1145 * of clear-by-read. Reading with EICS will return the
1146 * interrupt causes without clearing, which later be done
1147 * with the write to EICR.
1149 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
1150 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
1152 if (eicr
& IXGBE_EICR_LSC
)
1153 ixgbe_check_lsc(adapter
);
1155 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1156 ixgbe_check_fan_failure(adapter
, eicr
);
1158 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1159 ixgbe_check_sfp_event(adapter
, eicr
);
1161 /* Handle Flow Director Full threshold interrupt */
1162 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
1164 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_FLOW_DIR
);
1165 /* Disable transmits before FDIR Re-initialization */
1166 netif_tx_stop_all_queues(netdev
);
1167 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1168 struct ixgbe_ring
*tx_ring
=
1169 &adapter
->tx_ring
[i
];
1170 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE
,
1171 &tx_ring
->reinit_state
))
1172 schedule_work(&adapter
->fdir_reinit_task
);
1176 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1177 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
1182 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
1187 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1188 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1189 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1191 mask
= (qmask
& 0xFFFFFFFF);
1192 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(0), mask
);
1193 mask
= (qmask
>> 32);
1194 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1), mask
);
1196 /* skip the flush */
1199 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
1204 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1205 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1206 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, mask
);
1208 mask
= (qmask
& 0xFFFFFFFF);
1209 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), mask
);
1210 mask
= (qmask
>> 32);
1211 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), mask
);
1213 /* skip the flush */
1216 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
1218 struct ixgbe_q_vector
*q_vector
= data
;
1219 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1220 struct ixgbe_ring
*tx_ring
;
1223 if (!q_vector
->txr_count
)
1226 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1227 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1228 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1229 tx_ring
->total_bytes
= 0;
1230 tx_ring
->total_packets
= 0;
1231 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1235 /* disable interrupts on this vector only */
1236 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1237 napi_schedule(&q_vector
->napi
);
1243 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1245 * @data: pointer to our q_vector struct for this interrupt vector
1247 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
1249 struct ixgbe_q_vector
*q_vector
= data
;
1250 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1251 struct ixgbe_ring
*rx_ring
;
1255 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1256 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1257 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1258 rx_ring
->total_bytes
= 0;
1259 rx_ring
->total_packets
= 0;
1260 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1264 if (!q_vector
->rxr_count
)
1267 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1268 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1269 /* disable interrupts on this vector only */
1270 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1271 napi_schedule(&q_vector
->napi
);
1276 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1278 struct ixgbe_q_vector
*q_vector
= data
;
1279 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1280 struct ixgbe_ring
*ring
;
1284 if (!q_vector
->txr_count
&& !q_vector
->rxr_count
)
1287 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1288 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1289 ring
= &(adapter
->tx_ring
[r_idx
]);
1290 ring
->total_bytes
= 0;
1291 ring
->total_packets
= 0;
1292 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1296 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1297 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1298 ring
= &(adapter
->rx_ring
[r_idx
]);
1299 ring
->total_bytes
= 0;
1300 ring
->total_packets
= 0;
1301 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1305 /* disable interrupts on this vector only */
1306 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1307 napi_schedule(&q_vector
->napi
);
1313 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1314 * @napi: napi struct with our devices info in it
1315 * @budget: amount of work driver is allowed to do this pass, in packets
1317 * This function is optimized for cleaning one queue only on a single
1320 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1322 struct ixgbe_q_vector
*q_vector
=
1323 container_of(napi
, struct ixgbe_q_vector
, napi
);
1324 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1325 struct ixgbe_ring
*rx_ring
= NULL
;
1329 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1330 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1331 #ifdef CONFIG_IXGBE_DCA
1332 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1333 ixgbe_update_rx_dca(adapter
, rx_ring
);
1336 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1338 /* If all Rx work done, exit the polling mode */
1339 if (work_done
< budget
) {
1340 napi_complete(napi
);
1341 if (adapter
->itr_setting
& 1)
1342 ixgbe_set_itr_msix(q_vector
);
1343 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1344 ixgbe_irq_enable_queues(adapter
,
1345 ((u64
)1 << q_vector
->v_idx
));
1352 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
1353 * @napi: napi struct with our devices info in it
1354 * @budget: amount of work driver is allowed to do this pass, in packets
1356 * This function will clean more than one rx queue associated with a
1359 static int ixgbe_clean_rxtx_many(struct napi_struct
*napi
, int budget
)
1361 struct ixgbe_q_vector
*q_vector
=
1362 container_of(napi
, struct ixgbe_q_vector
, napi
);
1363 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1364 struct ixgbe_ring
*ring
= NULL
;
1365 int work_done
= 0, i
;
1367 bool tx_clean_complete
= true;
1369 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1370 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1371 ring
= &(adapter
->tx_ring
[r_idx
]);
1372 #ifdef CONFIG_IXGBE_DCA
1373 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1374 ixgbe_update_tx_dca(adapter
, ring
);
1376 tx_clean_complete
&= ixgbe_clean_tx_irq(q_vector
, ring
);
1377 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1381 /* attempt to distribute budget to each queue fairly, but don't allow
1382 * the budget to go below 1 because we'll exit polling */
1383 budget
/= (q_vector
->rxr_count
?: 1);
1384 budget
= max(budget
, 1);
1385 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1386 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1387 ring
= &(adapter
->rx_ring
[r_idx
]);
1388 #ifdef CONFIG_IXGBE_DCA
1389 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1390 ixgbe_update_rx_dca(adapter
, ring
);
1392 ixgbe_clean_rx_irq(q_vector
, ring
, &work_done
, budget
);
1393 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1397 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1398 ring
= &(adapter
->rx_ring
[r_idx
]);
1399 /* If all Rx work done, exit the polling mode */
1400 if (work_done
< budget
) {
1401 napi_complete(napi
);
1402 if (adapter
->itr_setting
& 1)
1403 ixgbe_set_itr_msix(q_vector
);
1404 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1405 ixgbe_irq_enable_queues(adapter
,
1406 ((u64
)1 << q_vector
->v_idx
));
1414 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1415 * @napi: napi struct with our devices info in it
1416 * @budget: amount of work driver is allowed to do this pass, in packets
1418 * This function is optimized for cleaning one queue only on a single
1421 static int ixgbe_clean_txonly(struct napi_struct
*napi
, int budget
)
1423 struct ixgbe_q_vector
*q_vector
=
1424 container_of(napi
, struct ixgbe_q_vector
, napi
);
1425 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1426 struct ixgbe_ring
*tx_ring
= NULL
;
1430 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1431 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1432 #ifdef CONFIG_IXGBE_DCA
1433 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1434 ixgbe_update_tx_dca(adapter
, tx_ring
);
1437 if (!ixgbe_clean_tx_irq(q_vector
, tx_ring
))
1440 /* If all Rx work done, exit the polling mode */
1441 if (work_done
< budget
) {
1442 napi_complete(napi
);
1443 if (adapter
->itr_setting
& 1)
1444 ixgbe_set_itr_msix(q_vector
);
1445 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1446 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
1452 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1455 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
1457 set_bit(r_idx
, q_vector
->rxr_idx
);
1458 q_vector
->rxr_count
++;
1461 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1464 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
1466 set_bit(t_idx
, q_vector
->txr_idx
);
1467 q_vector
->txr_count
++;
1471 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1472 * @adapter: board private structure to initialize
1473 * @vectors: allotted vector count for descriptor rings
1475 * This function maps descriptor rings to the queue-specific vectors
1476 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1477 * one vector per ring/queue, but on a constrained vector budget, we
1478 * group the rings as "efficiently" as possible. You would add new
1479 * mapping configurations in here.
1481 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1485 int rxr_idx
= 0, txr_idx
= 0;
1486 int rxr_remaining
= adapter
->num_rx_queues
;
1487 int txr_remaining
= adapter
->num_tx_queues
;
1492 /* No mapping required if MSI-X is disabled. */
1493 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1497 * The ideal configuration...
1498 * We have enough vectors to map one per queue.
1500 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1501 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1502 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1504 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1505 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1511 * If we don't have enough vectors for a 1-to-1
1512 * mapping, we'll have to group them so there are
1513 * multiple queues per vector.
1515 /* Re-adjusting *qpv takes care of the remainder. */
1516 for (i
= v_start
; i
< vectors
; i
++) {
1517 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1518 for (j
= 0; j
< rqpv
; j
++) {
1519 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1524 for (i
= v_start
; i
< vectors
; i
++) {
1525 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1526 for (j
= 0; j
< tqpv
; j
++) {
1527 map_vector_to_txq(adapter
, i
, txr_idx
);
1538 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1539 * @adapter: board private structure
1541 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1542 * interrupts from the kernel.
1544 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1546 struct net_device
*netdev
= adapter
->netdev
;
1547 irqreturn_t (*handler
)(int, void *);
1548 int i
, vector
, q_vectors
, err
;
1551 /* Decrement for Other and TCP Timer vectors */
1552 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1554 /* Map the Tx/Rx rings to the vectors we were allotted. */
1555 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1559 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1560 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1561 &ixgbe_msix_clean_many)
1562 for (vector
= 0; vector
< q_vectors
; vector
++) {
1563 handler
= SET_HANDLER(adapter
->q_vector
[vector
]);
1565 if(handler
== &ixgbe_msix_clean_rx
) {
1566 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1567 netdev
->name
, "rx", ri
++);
1569 else if(handler
== &ixgbe_msix_clean_tx
) {
1570 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1571 netdev
->name
, "tx", ti
++);
1574 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1575 netdev
->name
, "TxRx", vector
);
1577 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1578 handler
, 0, adapter
->name
[vector
],
1579 adapter
->q_vector
[vector
]);
1582 "request_irq failed for MSIX interrupt "
1583 "Error: %d\n", err
);
1584 goto free_queue_irqs
;
1588 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1589 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1590 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1593 "request_irq for msix_lsc failed: %d\n", err
);
1594 goto free_queue_irqs
;
1600 for (i
= vector
- 1; i
>= 0; i
--)
1601 free_irq(adapter
->msix_entries
[--vector
].vector
,
1602 adapter
->q_vector
[i
]);
1603 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1604 pci_disable_msix(adapter
->pdev
);
1605 kfree(adapter
->msix_entries
);
1606 adapter
->msix_entries
= NULL
;
1611 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1613 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
1615 u32 new_itr
= q_vector
->eitr
;
1616 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1617 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1619 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1621 tx_ring
->total_packets
,
1622 tx_ring
->total_bytes
);
1623 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1625 rx_ring
->total_packets
,
1626 rx_ring
->total_bytes
);
1628 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1630 switch (current_itr
) {
1631 /* counts and packets in update_itr are dependent on these numbers */
1632 case lowest_latency
:
1636 new_itr
= 20000; /* aka hwitr = ~200 */
1645 if (new_itr
!= q_vector
->eitr
) {
1646 /* do an exponential smoothing */
1647 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1649 /* save the algorithm value here, not the smoothed one */
1650 q_vector
->eitr
= new_itr
;
1652 ixgbe_write_eitr(q_vector
);
1659 * ixgbe_irq_enable - Enable default interrupt generation settings
1660 * @adapter: board private structure
1662 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1666 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
1667 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
1668 mask
|= IXGBE_EIMS_GPI_SDP1
;
1669 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1670 mask
|= IXGBE_EIMS_ECC
;
1671 mask
|= IXGBE_EIMS_GPI_SDP1
;
1672 mask
|= IXGBE_EIMS_GPI_SDP2
;
1674 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
1675 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
1676 mask
|= IXGBE_EIMS_FLOW_DIR
;
1678 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1679 ixgbe_irq_enable_queues(adapter
, ~0);
1680 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1684 * ixgbe_intr - legacy mode Interrupt Handler
1685 * @irq: interrupt number
1686 * @data: pointer to a network interface device structure
1688 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1690 struct net_device
*netdev
= data
;
1691 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1692 struct ixgbe_hw
*hw
= &adapter
->hw
;
1693 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
1697 * Workaround for silicon errata. Mask the interrupts
1698 * before the read of EICR.
1700 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
1702 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1703 * therefore no explict interrupt disable is necessary */
1704 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1706 /* shared interrupt alert!
1707 * make sure interrupts are enabled because the read will
1708 * have disabled interrupts due to EIAM */
1709 ixgbe_irq_enable(adapter
);
1710 return IRQ_NONE
; /* Not our interrupt */
1713 if (eicr
& IXGBE_EICR_LSC
)
1714 ixgbe_check_lsc(adapter
);
1716 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
1717 ixgbe_check_sfp_event(adapter
, eicr
);
1719 ixgbe_check_fan_failure(adapter
, eicr
);
1721 if (napi_schedule_prep(&(q_vector
->napi
))) {
1722 adapter
->tx_ring
[0].total_packets
= 0;
1723 adapter
->tx_ring
[0].total_bytes
= 0;
1724 adapter
->rx_ring
[0].total_packets
= 0;
1725 adapter
->rx_ring
[0].total_bytes
= 0;
1726 /* would disable interrupts here but EIAM disabled it */
1727 __napi_schedule(&(q_vector
->napi
));
1733 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1735 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1737 for (i
= 0; i
< q_vectors
; i
++) {
1738 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
1739 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1740 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1741 q_vector
->rxr_count
= 0;
1742 q_vector
->txr_count
= 0;
1747 * ixgbe_request_irq - initialize interrupts
1748 * @adapter: board private structure
1750 * Attempts to configure interrupts using the best available
1751 * capabilities of the hardware and kernel.
1753 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1755 struct net_device
*netdev
= adapter
->netdev
;
1758 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1759 err
= ixgbe_request_msix_irqs(adapter
);
1760 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1761 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1762 netdev
->name
, netdev
);
1764 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1765 netdev
->name
, netdev
);
1769 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1774 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1776 struct net_device
*netdev
= adapter
->netdev
;
1778 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1781 q_vectors
= adapter
->num_msix_vectors
;
1784 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1787 for (; i
>= 0; i
--) {
1788 free_irq(adapter
->msix_entries
[i
].vector
,
1789 adapter
->q_vector
[i
]);
1792 ixgbe_reset_q_vectors(adapter
);
1794 free_irq(adapter
->pdev
->irq
, netdev
);
1799 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1800 * @adapter: board private structure
1802 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1804 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1805 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1807 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
1808 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
1809 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
1811 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1812 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1814 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1815 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1817 synchronize_irq(adapter
->pdev
->irq
);
1822 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1825 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1827 struct ixgbe_hw
*hw
= &adapter
->hw
;
1829 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1830 EITR_INTS_PER_SEC_TO_REG(adapter
->eitr_param
));
1832 ixgbe_set_ivar(adapter
, 0, 0, 0);
1833 ixgbe_set_ivar(adapter
, 1, 0, 0);
1835 map_vector_to_rxq(adapter
, 0, 0);
1836 map_vector_to_txq(adapter
, 0, 0);
1838 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1842 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1843 * @adapter: board private structure
1845 * Configure the Tx unit of the MAC after a reset.
1847 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1850 struct ixgbe_hw
*hw
= &adapter
->hw
;
1851 u32 i
, j
, tdlen
, txctrl
;
1853 /* Setup the HW Tx Head and Tail descriptor pointers */
1854 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1855 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1858 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1859 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1860 (tdba
& DMA_BIT_MASK(32)));
1861 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1862 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1863 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1864 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1865 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1866 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1867 /* Disable Tx Head Writeback RO bit, since this hoses
1868 * bookkeeping if things aren't delivered in order.
1870 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1871 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1872 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1874 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1875 /* We enable 8 traffic classes, DCB only */
1876 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
1877 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, (IXGBE_MTQC_RT_ENA
|
1878 IXGBE_MTQC_8TC_8TQ
));
1882 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1884 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1886 struct ixgbe_ring
*rx_ring
;
1890 struct ixgbe_ring_feature
*feature
= adapter
->ring_feature
;
1892 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1893 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
1894 int dcb_i
= feature
[RING_F_DCB
].indices
;
1896 queue0
= index
>> 4;
1897 else if (dcb_i
== 4)
1898 queue0
= index
>> 5;
1900 dev_err(&adapter
->pdev
->dev
, "Invalid DCB "
1903 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
1904 struct ixgbe_ring_feature
*f
;
1906 rx_ring
= &adapter
->rx_ring
[queue0
];
1907 f
= &adapter
->ring_feature
[RING_F_FCOE
];
1908 if ((queue0
== 0) && (index
> rx_ring
->reg_idx
))
1909 queue0
= f
->mask
+ index
-
1910 rx_ring
->reg_idx
- 1;
1912 #endif /* IXGBE_FCOE */
1917 mask
= (unsigned long) feature
[RING_F_RSS
].mask
;
1918 queue0
= index
& mask
;
1919 index
= index
& mask
;
1922 rx_ring
= &adapter
->rx_ring
[queue0
];
1924 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1926 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1927 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1929 srrctl
|= (IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1930 IXGBE_SRRCTL_BSIZEHDR_MASK
;
1932 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1933 #if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
1934 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1936 srrctl
|= (PAGE_SIZE
/ 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1938 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1940 srrctl
|= ALIGN(rx_ring
->rx_buf_len
, 1024) >>
1941 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1942 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1945 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1948 static u32
ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
1953 if (!(adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
))
1956 mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
1957 #ifdef CONFIG_IXGBE_DCB
1958 | IXGBE_FLAG_DCB_ENABLED
1963 case (IXGBE_FLAG_RSS_ENABLED
):
1964 mrqc
= IXGBE_MRQC_RSSEN
;
1966 #ifdef CONFIG_IXGBE_DCB
1967 case (IXGBE_FLAG_DCB_ENABLED
):
1968 mrqc
= IXGBE_MRQC_RT8TCEN
;
1970 #endif /* CONFIG_IXGBE_DCB */
1979 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1980 * @adapter: board private structure
1982 * Configure the Rx unit of the MAC after a reset.
1984 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1987 struct ixgbe_hw
*hw
= &adapter
->hw
;
1988 struct net_device
*netdev
= adapter
->netdev
;
1989 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1991 u32 rdlen
, rxctrl
, rxcsum
;
1992 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1993 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1994 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1996 u32 reta
= 0, mrqc
= 0;
2001 /* Decide whether to use packet split mode or not */
2002 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
2005 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
2006 adapter
->flags
&= ~IXGBE_FLAG_RX_PS_ENABLED
;
2007 #endif /* IXGBE_FCOE */
2009 /* Set the RX buffer length according to the mode */
2010 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
2011 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
2012 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2013 /* PSRTYPE must be initialized in 82599 */
2014 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
2015 IXGBE_PSRTYPE_UDPHDR
|
2016 IXGBE_PSRTYPE_IPV4HDR
|
2017 IXGBE_PSRTYPE_IPV6HDR
|
2018 IXGBE_PSRTYPE_L2HDR
;
2019 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(0), psrtype
);
2022 if (!(adapter
->flags
& IXGBE_FLAG2_RSC_ENABLED
) &&
2023 (netdev
->mtu
<= ETH_DATA_LEN
))
2024 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
2026 rx_buf_len
= ALIGN(max_frame
, 1024);
2029 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
2030 fctrl
|= IXGBE_FCTRL_BAM
;
2031 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
2032 fctrl
|= IXGBE_FCTRL_PMCF
;
2033 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
2035 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
2036 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
2037 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
2039 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2041 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
2042 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2044 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
2046 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
2047 /* disable receives while setting up the descriptors */
2048 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2049 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2052 * Setup the HW Rx Head and Tail Descriptor Pointers and
2053 * the Base and Length of the Rx Descriptor Ring
2055 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2056 rdba
= adapter
->rx_ring
[i
].dma
;
2057 j
= adapter
->rx_ring
[i
].reg_idx
;
2058 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_BIT_MASK(32)));
2059 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
2060 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
2061 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
2062 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
2063 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
2064 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
2065 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
2068 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
2069 struct ixgbe_ring_feature
*f
;
2070 f
= &adapter
->ring_feature
[RING_F_FCOE
];
2071 if ((rx_buf_len
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
2072 (i
>= f
->mask
) && (i
< f
->mask
+ f
->indices
))
2073 adapter
->rx_ring
[i
].rx_buf_len
=
2074 IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2077 #endif /* IXGBE_FCOE */
2078 ixgbe_configure_srrctl(adapter
, j
);
2081 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2083 * For VMDq support of different descriptor types or
2084 * buffer sizes through the use of multiple SRRCTL
2085 * registers, RDRXCTL.MVMEN must be set to 1
2087 * also, the manual doesn't mention it clearly but DCA hints
2088 * will only use queue 0's tags unless this bit is set. Side
2089 * effects of setting this bit are only that SRRCTL must be
2090 * fully programmed [0..15]
2092 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2093 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
2094 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
2097 /* Program MRQC for the distribution of queues */
2098 mrqc
= ixgbe_setup_mrqc(adapter
);
2100 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
2101 /* Fill out redirection table */
2102 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2103 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
2105 /* reta = 4-byte sliding window of
2106 * 0x00..(indices-1)(indices-1)00..etc. */
2107 reta
= (reta
<< 8) | (j
* 0x11);
2109 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2112 /* Fill out hash function seeds */
2113 for (i
= 0; i
< 10; i
++)
2114 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2116 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2117 mrqc
|= IXGBE_MRQC_RSSEN
;
2118 /* Perform hash on these packet types */
2119 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2120 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2121 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
2122 | IXGBE_MRQC_RSS_FIELD_IPV6
2123 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
2124 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
2126 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2128 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2130 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
2131 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
2132 /* Disable indicating checksum in descriptor, enables
2134 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2136 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
2137 /* Enable IPv4 payload checksum for UDP fragments
2138 * if PCSD is not set */
2139 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
2142 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2144 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2145 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2146 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
2147 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
2148 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
2151 if (adapter
->flags
& IXGBE_FLAG2_RSC_ENABLED
) {
2152 /* Enable 82599 HW-RSC */
2153 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2154 j
= adapter
->rx_ring
[i
].reg_idx
;
2155 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(j
));
2156 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2158 * we must limit the number of descriptors so that the
2159 * total size of max desc * buf_len is not greater
2162 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
2163 #if (MAX_SKB_FRAGS > 16)
2164 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2165 #elif (MAX_SKB_FRAGS > 8)
2166 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2167 #elif (MAX_SKB_FRAGS > 4)
2168 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2170 rscctrl
|= IXGBE_RSCCTL_MAXDESC_1
;
2173 if (rx_buf_len
< IXGBE_RXBUFFER_4096
)
2174 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2175 else if (rx_buf_len
< IXGBE_RXBUFFER_8192
)
2176 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2178 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2180 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(j
), rscctrl
);
2182 /* Disable RSC for ACK packets */
2183 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
2184 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
2188 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
2190 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2191 struct ixgbe_hw
*hw
= &adapter
->hw
;
2193 /* add VID to filter table */
2194 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
2197 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
2199 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2200 struct ixgbe_hw
*hw
= &adapter
->hw
;
2202 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2203 ixgbe_irq_disable(adapter
);
2205 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
2207 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2208 ixgbe_irq_enable(adapter
);
2210 /* remove VID from filter table */
2211 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
2214 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
2215 struct vlan_group
*grp
)
2217 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2221 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2222 ixgbe_irq_disable(adapter
);
2223 adapter
->vlgrp
= grp
;
2226 * For a DCB driver, always enable VLAN tag stripping so we can
2227 * still receive traffic from a DCB-enabled host even if we're
2230 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
2231 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2232 ctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
2233 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2234 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
2235 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
2236 ctrl
|= IXGBE_VLNCTRL_VFE
;
2237 /* enable VLAN tag insert/strip */
2238 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
2239 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2240 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
2241 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2242 j
= adapter
->rx_ring
[i
].reg_idx
;
2243 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RXDCTL(j
));
2244 ctrl
|= IXGBE_RXDCTL_VME
;
2245 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXDCTL(j
), ctrl
);
2248 ixgbe_vlan_rx_add_vid(netdev
, 0);
2250 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2251 ixgbe_irq_enable(adapter
);
2254 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
2256 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
2258 if (adapter
->vlgrp
) {
2260 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
2261 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
2263 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
2268 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
2270 struct dev_mc_list
*mc_ptr
;
2271 u8
*addr
= *mc_addr_ptr
;
2274 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
2276 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
2278 *mc_addr_ptr
= NULL
;
2284 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
2285 * @netdev: network interface device structure
2287 * The set_rx_method entry point is called whenever the unicast/multicast
2288 * address list or the network interface flags are updated. This routine is
2289 * responsible for configuring the hardware for proper unicast, multicast and
2292 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
2294 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2295 struct ixgbe_hw
*hw
= &adapter
->hw
;
2297 u8
*addr_list
= NULL
;
2300 /* Check for Promiscuous and All Multicast modes */
2302 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
2303 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2305 if (netdev
->flags
& IFF_PROMISC
) {
2306 hw
->addr_ctrl
.user_set_promisc
= 1;
2307 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2308 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
2310 if (netdev
->flags
& IFF_ALLMULTI
) {
2311 fctrl
|= IXGBE_FCTRL_MPE
;
2312 fctrl
&= ~IXGBE_FCTRL_UPE
;
2314 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2316 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2317 hw
->addr_ctrl
.user_set_promisc
= 0;
2320 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
2321 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2323 /* reprogram secondary unicast list */
2324 hw
->mac
.ops
.update_uc_addr_list(hw
, &netdev
->uc_list
);
2326 /* reprogram multicast list */
2327 addr_count
= netdev
->mc_count
;
2329 addr_list
= netdev
->mc_list
->dmi_addr
;
2330 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
2331 ixgbe_addr_list_itr
);
2334 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
2337 struct ixgbe_q_vector
*q_vector
;
2338 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2340 /* legacy and MSI only use one vector */
2341 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2344 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2345 struct napi_struct
*napi
;
2346 q_vector
= adapter
->q_vector
[q_idx
];
2347 napi
= &q_vector
->napi
;
2348 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2349 if (!q_vector
->rxr_count
|| !q_vector
->txr_count
) {
2350 if (q_vector
->txr_count
== 1)
2351 napi
->poll
= &ixgbe_clean_txonly
;
2352 else if (q_vector
->rxr_count
== 1)
2353 napi
->poll
= &ixgbe_clean_rxonly
;
2361 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
2364 struct ixgbe_q_vector
*q_vector
;
2365 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2367 /* legacy and MSI only use one vector */
2368 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2371 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2372 q_vector
= adapter
->q_vector
[q_idx
];
2373 napi_disable(&q_vector
->napi
);
2377 #ifdef CONFIG_IXGBE_DCB
2379 * ixgbe_configure_dcb - Configure DCB hardware
2380 * @adapter: ixgbe adapter struct
2382 * This is called by the driver on open to configure the DCB hardware.
2383 * This is also called by the gennetlink interface when reconfiguring
2386 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
2388 struct ixgbe_hw
*hw
= &adapter
->hw
;
2389 u32 txdctl
, vlnctrl
;
2392 ixgbe_dcb_check_config(&adapter
->dcb_cfg
);
2393 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_TX_CONFIG
);
2394 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_RX_CONFIG
);
2396 /* reconfigure the hardware */
2397 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
2399 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2400 j
= adapter
->tx_ring
[i
].reg_idx
;
2401 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2402 /* PThresh workaround for Tx hang with DFP enabled. */
2404 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2406 /* Enable VLAN tag insert/strip */
2407 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2408 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2409 vlnctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
2410 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2411 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2412 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2413 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2414 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2415 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2416 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2417 j
= adapter
->rx_ring
[i
].reg_idx
;
2418 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2419 vlnctrl
|= IXGBE_RXDCTL_VME
;
2420 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
2423 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
2427 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
2429 struct net_device
*netdev
= adapter
->netdev
;
2430 struct ixgbe_hw
*hw
= &adapter
->hw
;
2433 ixgbe_set_rx_mode(netdev
);
2435 ixgbe_restore_vlan(adapter
);
2436 #ifdef CONFIG_IXGBE_DCB
2437 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2438 netif_set_gso_max_size(netdev
, 32768);
2439 ixgbe_configure_dcb(adapter
);
2441 netif_set_gso_max_size(netdev
, 65536);
2444 netif_set_gso_max_size(netdev
, 65536);
2448 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
2449 ixgbe_configure_fcoe(adapter
);
2451 #endif /* IXGBE_FCOE */
2452 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2453 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2454 adapter
->tx_ring
[i
].atr_sample_rate
=
2455 adapter
->atr_sample_rate
;
2456 ixgbe_init_fdir_signature_82599(hw
, adapter
->fdir_pballoc
);
2457 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
2458 ixgbe_init_fdir_perfect_82599(hw
, adapter
->fdir_pballoc
);
2461 ixgbe_configure_tx(adapter
);
2462 ixgbe_configure_rx(adapter
);
2463 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2464 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
2465 (adapter
->rx_ring
[i
].count
- 1));
2468 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2470 switch (hw
->phy
.type
) {
2471 case ixgbe_phy_sfp_avago
:
2472 case ixgbe_phy_sfp_ftl
:
2473 case ixgbe_phy_sfp_intel
:
2474 case ixgbe_phy_sfp_unknown
:
2475 case ixgbe_phy_tw_tyco
:
2476 case ixgbe_phy_tw_unknown
:
2484 * ixgbe_sfp_link_config - set up SFP+ link
2485 * @adapter: pointer to private adapter struct
2487 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
2489 struct ixgbe_hw
*hw
= &adapter
->hw
;
2491 if (hw
->phy
.multispeed_fiber
) {
2493 * In multispeed fiber setups, the device may not have
2494 * had a physical connection when the driver loaded.
2495 * If that's the case, the initial link configuration
2496 * couldn't get the MAC into 10G or 1G mode, so we'll
2497 * never have a link status change interrupt fire.
2498 * We need to try and force an autonegotiation
2499 * session, then bring up link.
2501 hw
->mac
.ops
.setup_sfp(hw
);
2502 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
2503 schedule_work(&adapter
->multispeed_fiber_task
);
2506 * Direct Attach Cu and non-multispeed fiber modules
2507 * still need to be configured properly prior to
2510 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_MOD_TASK
))
2511 schedule_work(&adapter
->sfp_config_module_task
);
2516 * ixgbe_non_sfp_link_config - set up non-SFP+ link
2517 * @hw: pointer to private hardware struct
2519 * Returns 0 on success, negative on failure
2521 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
2524 bool link_up
= false;
2525 u32 ret
= IXGBE_ERR_LINK_SETUP
;
2527 if (hw
->mac
.ops
.check_link
)
2528 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2533 if (hw
->mac
.ops
.get_link_capabilities
)
2534 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
2539 if (hw
->mac
.ops
.setup_link_speed
)
2540 ret
= hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, link_up
);
2545 #define IXGBE_MAX_RX_DESC_POLL 10
2546 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2549 int j
= adapter
->rx_ring
[rxr
].reg_idx
;
2552 for (k
= 0; k
< IXGBE_MAX_RX_DESC_POLL
; k
++) {
2553 if (IXGBE_READ_REG(&adapter
->hw
,
2554 IXGBE_RXDCTL(j
)) & IXGBE_RXDCTL_ENABLE
)
2559 if (k
>= IXGBE_MAX_RX_DESC_POLL
) {
2560 DPRINTK(DRV
, ERR
, "RXDCTL.ENABLE on Rx queue %d "
2561 "not set within the polling period\n", rxr
);
2563 ixgbe_release_rx_desc(&adapter
->hw
, &adapter
->rx_ring
[rxr
],
2564 (adapter
->rx_ring
[rxr
].count
- 1));
2567 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
2569 struct net_device
*netdev
= adapter
->netdev
;
2570 struct ixgbe_hw
*hw
= &adapter
->hw
;
2572 int num_rx_rings
= adapter
->num_rx_queues
;
2574 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2575 u32 txdctl
, rxdctl
, mhadd
;
2579 ixgbe_get_hw_control(adapter
);
2581 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
2582 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
2583 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2584 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
2585 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
2590 /* XXX: to interrupt immediately for EICS writes, enable this */
2591 /* gpie |= IXGBE_GPIE_EIMEN; */
2592 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2595 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2596 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2597 * specifically only auto mask tx and rx interrupts */
2598 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
2601 /* Enable fan failure interrupt if media type is copper */
2602 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
2603 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2604 gpie
|= IXGBE_SDP1_GPIEN
;
2605 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2608 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2609 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2610 gpie
|= IXGBE_SDP1_GPIEN
;
2611 gpie
|= IXGBE_SDP2_GPIEN
;
2612 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2616 /* adjust max frame to be able to do baby jumbo for FCoE */
2617 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
2618 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
2619 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2621 #endif /* IXGBE_FCOE */
2622 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
2623 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
2624 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
2625 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
2627 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
2630 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2631 j
= adapter
->tx_ring
[i
].reg_idx
;
2632 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2633 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2634 txdctl
|= (8 << 16);
2635 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2638 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2639 /* DMATXCTL.EN must be set after all Tx queue config is done */
2640 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2641 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2642 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2644 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2645 j
= adapter
->tx_ring
[i
].reg_idx
;
2646 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2647 txdctl
|= IXGBE_TXDCTL_ENABLE
;
2648 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2651 for (i
= 0; i
< num_rx_rings
; i
++) {
2652 j
= adapter
->rx_ring
[i
].reg_idx
;
2653 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2654 /* enable PTHRESH=32 descriptors (half the internal cache)
2655 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2656 * this also removes a pesky rx_no_buffer_count increment */
2658 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
2659 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
2660 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2661 ixgbe_rx_desc_queue_enable(adapter
, i
);
2663 /* enable all receives */
2664 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2665 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2666 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
2668 rxdctl
|= IXGBE_RXCTRL_RXEN
;
2669 hw
->mac
.ops
.enable_rx_dma(hw
, rxdctl
);
2671 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2672 ixgbe_configure_msix(adapter
);
2674 ixgbe_configure_msi_and_legacy(adapter
);
2676 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
2677 ixgbe_napi_enable_all(adapter
);
2679 /* clear any pending interrupts, may auto mask */
2680 IXGBE_READ_REG(hw
, IXGBE_EICR
);
2682 ixgbe_irq_enable(adapter
);
2685 * If this adapter has a fan, check to see if we had a failure
2686 * before we enabled the interrupt.
2688 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
2689 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
2690 if (esdp
& IXGBE_ESDP_SDP1
)
2692 "Fan has stopped, replace the adapter\n");
2696 * For hot-pluggable SFP+ devices, a new SFP+ module may have
2697 * arrived before interrupts were enabled. We need to kick off
2698 * the SFP+ module setup first, then try to bring up link.
2699 * If we're not hot-pluggable SFP+, we just need to configure link
2702 err
= hw
->phy
.ops
.identify(hw
);
2703 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
2704 DPRINTK(PROBE
, ERR
, "PHY not supported on this NIC %d\n", err
);
2705 ixgbe_down(adapter
);
2709 if (ixgbe_is_sfp(hw
)) {
2710 ixgbe_sfp_link_config(adapter
);
2712 err
= ixgbe_non_sfp_link_config(hw
);
2714 DPRINTK(PROBE
, ERR
, "link_config FAILED %d\n", err
);
2717 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2718 set_bit(__IXGBE_FDIR_INIT_DONE
,
2719 &(adapter
->tx_ring
[i
].reinit_state
));
2721 /* enable transmits */
2722 netif_tx_start_all_queues(netdev
);
2724 /* bring the link up in the watchdog, this could race with our first
2725 * link up interrupt but shouldn't be a problem */
2726 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2727 adapter
->link_check_timeout
= jiffies
;
2728 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2732 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2734 WARN_ON(in_interrupt());
2735 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2737 ixgbe_down(adapter
);
2739 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2742 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2744 /* hardware has been reset, we need to reload some things */
2745 ixgbe_configure(adapter
);
2747 return ixgbe_up_complete(adapter
);
2750 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2752 struct ixgbe_hw
*hw
= &adapter
->hw
;
2755 err
= hw
->mac
.ops
.init_hw(hw
);
2758 case IXGBE_ERR_SFP_NOT_PRESENT
:
2760 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
2761 dev_err(&adapter
->pdev
->dev
, "master disable timed out\n");
2763 case IXGBE_ERR_EEPROM_VERSION
:
2764 /* We are running on a pre-production device, log a warning */
2765 dev_warn(&adapter
->pdev
->dev
, "This device is a pre-production "
2766 "adapter/LOM. Please be aware there may be issues "
2767 "associated with your hardware. If you are "
2768 "experiencing problems please contact your Intel or "
2769 "hardware representative who provided you with this "
2773 dev_err(&adapter
->pdev
->dev
, "Hardware Error: %d\n", err
);
2776 /* reprogram the RAR[0] in case user changed it. */
2777 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2781 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2782 * @adapter: board private structure
2783 * @rx_ring: ring to free buffers from
2785 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2786 struct ixgbe_ring
*rx_ring
)
2788 struct pci_dev
*pdev
= adapter
->pdev
;
2792 /* Free all the Rx ring sk_buffs */
2794 for (i
= 0; i
< rx_ring
->count
; i
++) {
2795 struct ixgbe_rx_buffer
*rx_buffer_info
;
2797 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2798 if (rx_buffer_info
->dma
) {
2799 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2800 rx_ring
->rx_buf_len
,
2801 PCI_DMA_FROMDEVICE
);
2802 rx_buffer_info
->dma
= 0;
2804 if (rx_buffer_info
->skb
) {
2805 struct sk_buff
*skb
= rx_buffer_info
->skb
;
2806 rx_buffer_info
->skb
= NULL
;
2808 struct sk_buff
*this = skb
;
2810 dev_kfree_skb(this);
2813 if (!rx_buffer_info
->page
)
2815 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
/ 2,
2816 PCI_DMA_FROMDEVICE
);
2817 rx_buffer_info
->page_dma
= 0;
2818 put_page(rx_buffer_info
->page
);
2819 rx_buffer_info
->page
= NULL
;
2820 rx_buffer_info
->page_offset
= 0;
2823 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2824 memset(rx_ring
->rx_buffer_info
, 0, size
);
2826 /* Zero out the descriptor ring */
2827 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2829 rx_ring
->next_to_clean
= 0;
2830 rx_ring
->next_to_use
= 0;
2833 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2835 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2839 * ixgbe_clean_tx_ring - Free Tx Buffers
2840 * @adapter: board private structure
2841 * @tx_ring: ring to be cleaned
2843 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2844 struct ixgbe_ring
*tx_ring
)
2846 struct ixgbe_tx_buffer
*tx_buffer_info
;
2850 /* Free all the Tx ring sk_buffs */
2852 for (i
= 0; i
< tx_ring
->count
; i
++) {
2853 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2854 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2857 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2858 memset(tx_ring
->tx_buffer_info
, 0, size
);
2860 /* Zero out the descriptor ring */
2861 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2863 tx_ring
->next_to_use
= 0;
2864 tx_ring
->next_to_clean
= 0;
2867 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2869 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2873 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2874 * @adapter: board private structure
2876 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2880 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2881 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2885 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2886 * @adapter: board private structure
2888 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2892 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2893 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2896 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2898 struct net_device
*netdev
= adapter
->netdev
;
2899 struct ixgbe_hw
*hw
= &adapter
->hw
;
2904 /* signal that we are down to the interrupt handler */
2905 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2907 /* disable receives */
2908 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2909 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2911 netif_tx_disable(netdev
);
2913 IXGBE_WRITE_FLUSH(hw
);
2916 netif_tx_stop_all_queues(netdev
);
2918 ixgbe_irq_disable(adapter
);
2920 ixgbe_napi_disable_all(adapter
);
2922 del_timer_sync(&adapter
->watchdog_timer
);
2923 cancel_work_sync(&adapter
->watchdog_task
);
2925 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
2926 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
2927 cancel_work_sync(&adapter
->fdir_reinit_task
);
2929 /* disable transmits in the hardware now that interrupts are off */
2930 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2931 j
= adapter
->tx_ring
[i
].reg_idx
;
2932 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2933 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
2934 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
2936 /* Disable the Tx DMA engine on 82599 */
2937 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2938 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
2939 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
2940 ~IXGBE_DMATXCTL_TE
));
2942 netif_carrier_off(netdev
);
2944 if (!pci_channel_offline(adapter
->pdev
))
2945 ixgbe_reset(adapter
);
2946 ixgbe_clean_all_tx_rings(adapter
);
2947 ixgbe_clean_all_rx_rings(adapter
);
2949 #ifdef CONFIG_IXGBE_DCA
2950 /* since we reset the hardware DCA settings were cleared */
2951 ixgbe_setup_dca(adapter
);
2956 * ixgbe_poll - NAPI Rx polling callback
2957 * @napi: structure for representing this polling device
2958 * @budget: how many packets driver is allowed to clean
2960 * This function is used for legacy and MSI, NAPI mode
2962 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2964 struct ixgbe_q_vector
*q_vector
=
2965 container_of(napi
, struct ixgbe_q_vector
, napi
);
2966 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2967 int tx_clean_complete
, work_done
= 0;
2969 #ifdef CONFIG_IXGBE_DCA
2970 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2971 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2972 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2976 tx_clean_complete
= ixgbe_clean_tx_irq(q_vector
, adapter
->tx_ring
);
2977 ixgbe_clean_rx_irq(q_vector
, adapter
->rx_ring
, &work_done
, budget
);
2979 if (!tx_clean_complete
)
2982 /* If budget not fully consumed, exit the polling mode */
2983 if (work_done
< budget
) {
2984 napi_complete(napi
);
2985 if (adapter
->itr_setting
& 1)
2986 ixgbe_set_itr(adapter
);
2987 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2988 ixgbe_irq_enable_queues(adapter
, IXGBE_EIMS_RTX_QUEUE
);
2994 * ixgbe_tx_timeout - Respond to a Tx Hang
2995 * @netdev: network interface device structure
2997 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2999 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3001 /* Do the reset outside of interrupt context */
3002 schedule_work(&adapter
->reset_task
);
3005 static void ixgbe_reset_task(struct work_struct
*work
)
3007 struct ixgbe_adapter
*adapter
;
3008 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
3010 /* If we're already down or resetting, just bail */
3011 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
3012 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
3015 adapter
->tx_timeout_count
++;
3017 ixgbe_reinit_locked(adapter
);
3020 #ifdef CONFIG_IXGBE_DCB
3021 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter
*adapter
)
3024 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_DCB
];
3026 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
3030 adapter
->num_rx_queues
= f
->indices
;
3031 adapter
->num_tx_queues
= f
->indices
;
3039 * ixgbe_set_rss_queues: Allocate queues for RSS
3040 * @adapter: board private structure to initialize
3042 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3043 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3046 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter
*adapter
)
3049 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_RSS
];
3051 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3053 adapter
->num_rx_queues
= f
->indices
;
3054 adapter
->num_tx_queues
= f
->indices
;
3064 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3065 * @adapter: board private structure to initialize
3067 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3068 * to the original CPU that initiated the Tx session. This runs in addition
3069 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3070 * Rx load across CPUs using RSS.
3073 static bool inline ixgbe_set_fdir_queues(struct ixgbe_adapter
*adapter
)
3076 struct ixgbe_ring_feature
*f_fdir
= &adapter
->ring_feature
[RING_F_FDIR
];
3078 f_fdir
->indices
= min((int)num_online_cpus(), f_fdir
->indices
);
3081 /* Flow Director must have RSS enabled */
3082 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
3083 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3084 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)))) {
3085 adapter
->num_tx_queues
= f_fdir
->indices
;
3086 adapter
->num_rx_queues
= f_fdir
->indices
;
3089 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
3090 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
3097 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
3098 * @adapter: board private structure to initialize
3100 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
3101 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
3102 * rx queues out of the max number of rx queues, instead, it is used as the
3103 * index of the first rx queue used by FCoE.
3106 static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter
*adapter
)
3109 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
3111 f
->indices
= min((int)num_online_cpus(), f
->indices
);
3112 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
3113 #ifdef CONFIG_IXGBE_DCB
3114 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3115 DPRINTK(PROBE
, INFO
, "FCOE enabled with DCB \n");
3116 ixgbe_set_dcb_queues(adapter
);
3119 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3120 DPRINTK(PROBE
, INFO
, "FCOE enabled with RSS \n");
3121 ixgbe_set_rss_queues(adapter
);
3123 /* adding FCoE rx rings to the end */
3124 f
->mask
= adapter
->num_rx_queues
;
3125 adapter
->num_rx_queues
+= f
->indices
;
3126 if (adapter
->num_tx_queues
== 0)
3127 adapter
->num_tx_queues
= f
->indices
;
3135 #endif /* IXGBE_FCOE */
3137 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
3138 * @adapter: board private structure to initialize
3140 * This is the top level queue allocation routine. The order here is very
3141 * important, starting with the "most" number of features turned on at once,
3142 * and ending with the smallest set of features. This way large combinations
3143 * can be allocated if they're turned on, and smaller combinations are the
3144 * fallthrough conditions.
3147 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
3150 if (ixgbe_set_fcoe_queues(adapter
))
3153 #endif /* IXGBE_FCOE */
3154 #ifdef CONFIG_IXGBE_DCB
3155 if (ixgbe_set_dcb_queues(adapter
))
3159 if (ixgbe_set_fdir_queues(adapter
))
3162 if (ixgbe_set_rss_queues(adapter
))
3165 /* fallback to base case */
3166 adapter
->num_rx_queues
= 1;
3167 adapter
->num_tx_queues
= 1;
3170 /* Notify the stack of the (possibly) reduced Tx Queue count. */
3171 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
3174 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
3177 int err
, vector_threshold
;
3179 /* We'll want at least 3 (vector_threshold):
3182 * 3) Other (Link Status Change, etc.)
3183 * 4) TCP Timer (optional)
3185 vector_threshold
= MIN_MSIX_COUNT
;
3187 /* The more we get, the more we will assign to Tx/Rx Cleanup
3188 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
3189 * Right now, we simply care about how many we'll get; we'll
3190 * set them up later while requesting irq's.
3192 while (vectors
>= vector_threshold
) {
3193 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
3195 if (!err
) /* Success in acquiring all requested vectors. */
3198 vectors
= 0; /* Nasty failure, quit now */
3199 else /* err == number of vectors we should try again with */
3203 if (vectors
< vector_threshold
) {
3204 /* Can't allocate enough MSI-X interrupts? Oh well.
3205 * This just means we'll go with either a single MSI
3206 * vector or fall back to legacy interrupts.
3208 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
3209 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3210 kfree(adapter
->msix_entries
);
3211 adapter
->msix_entries
= NULL
;
3213 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
3215 * Adjust for only the vectors we'll use, which is minimum
3216 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
3217 * vectors we were allocated.
3219 adapter
->num_msix_vectors
= min(vectors
,
3220 adapter
->max_msix_q_vectors
+ NON_Q_VECTORS
);
3225 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
3226 * @adapter: board private structure to initialize
3228 * Cache the descriptor ring offsets for RSS to the assigned rings.
3231 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter
*adapter
)
3236 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3237 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3238 adapter
->rx_ring
[i
].reg_idx
= i
;
3239 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3240 adapter
->tx_ring
[i
].reg_idx
= i
;
3249 #ifdef CONFIG_IXGBE_DCB
3251 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
3252 * @adapter: board private structure to initialize
3254 * Cache the descriptor ring offsets for DCB to the assigned rings.
3257 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter
*adapter
)
3261 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
3263 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3264 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3265 /* the number of queues is assumed to be symmetric */
3266 for (i
= 0; i
< dcb_i
; i
++) {
3267 adapter
->rx_ring
[i
].reg_idx
= i
<< 3;
3268 adapter
->tx_ring
[i
].reg_idx
= i
<< 2;
3271 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
3274 * Tx TC0 starts at: descriptor queue 0
3275 * Tx TC1 starts at: descriptor queue 32
3276 * Tx TC2 starts at: descriptor queue 64
3277 * Tx TC3 starts at: descriptor queue 80
3278 * Tx TC4 starts at: descriptor queue 96
3279 * Tx TC5 starts at: descriptor queue 104
3280 * Tx TC6 starts at: descriptor queue 112
3281 * Tx TC7 starts at: descriptor queue 120
3283 * Rx TC0-TC7 are offset by 16 queues each
3285 for (i
= 0; i
< 3; i
++) {
3286 adapter
->tx_ring
[i
].reg_idx
= i
<< 5;
3287 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
3289 for ( ; i
< 5; i
++) {
3290 adapter
->tx_ring
[i
].reg_idx
=
3292 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
3294 for ( ; i
< dcb_i
; i
++) {
3295 adapter
->tx_ring
[i
].reg_idx
=
3297 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
3301 } else if (dcb_i
== 4) {
3303 * Tx TC0 starts at: descriptor queue 0
3304 * Tx TC1 starts at: descriptor queue 64
3305 * Tx TC2 starts at: descriptor queue 96
3306 * Tx TC3 starts at: descriptor queue 112
3308 * Rx TC0-TC3 are offset by 32 queues each
3310 adapter
->tx_ring
[0].reg_idx
= 0;
3311 adapter
->tx_ring
[1].reg_idx
= 64;
3312 adapter
->tx_ring
[2].reg_idx
= 96;
3313 adapter
->tx_ring
[3].reg_idx
= 112;
3314 for (i
= 0 ; i
< dcb_i
; i
++)
3315 adapter
->rx_ring
[i
].reg_idx
= i
<< 5;
3333 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
3334 * @adapter: board private structure to initialize
3336 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
3339 static bool inline ixgbe_cache_ring_fdir(struct ixgbe_adapter
*adapter
)
3344 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
3345 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
3346 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))) {
3347 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3348 adapter
->rx_ring
[i
].reg_idx
= i
;
3349 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3350 adapter
->tx_ring
[i
].reg_idx
= i
;
3359 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
3360 * @adapter: board private structure to initialize
3362 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
3365 static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter
*adapter
)
3369 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
3371 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
3372 #ifdef CONFIG_IXGBE_DCB
3373 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3374 ixgbe_cache_ring_dcb(adapter
);
3375 fcoe_i
= adapter
->rx_ring
[0].reg_idx
+ 1;
3377 #endif /* CONFIG_IXGBE_DCB */
3378 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
3379 ixgbe_cache_ring_rss(adapter
);
3382 for (i
= 0; i
< f
->indices
; i
++, fcoe_i
++)
3383 adapter
->rx_ring
[f
->mask
+ i
].reg_idx
= fcoe_i
;
3389 #endif /* IXGBE_FCOE */
3391 * ixgbe_cache_ring_register - Descriptor ring to register mapping
3392 * @adapter: board private structure to initialize
3394 * Once we know the feature-set enabled for the device, we'll cache
3395 * the register offset the descriptor ring is assigned to.
3397 * Note, the order the various feature calls is important. It must start with
3398 * the "most" features enabled at the same time, then trickle down to the
3399 * least amount of features turned on at once.
3401 static void ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
3403 /* start with default case */
3404 adapter
->rx_ring
[0].reg_idx
= 0;
3405 adapter
->tx_ring
[0].reg_idx
= 0;
3408 if (ixgbe_cache_ring_fcoe(adapter
))
3411 #endif /* IXGBE_FCOE */
3412 #ifdef CONFIG_IXGBE_DCB
3413 if (ixgbe_cache_ring_dcb(adapter
))
3417 if (ixgbe_cache_ring_fdir(adapter
))
3420 if (ixgbe_cache_ring_rss(adapter
))
3425 * ixgbe_alloc_queues - Allocate memory for all rings
3426 * @adapter: board private structure to initialize
3428 * We allocate one ring per queue at run-time since we don't know the
3429 * number of queues at compile-time. The polling_netdev array is
3430 * intended for Multiqueue, but should work fine with a single queue.
3432 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
3436 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
3437 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
3438 if (!adapter
->tx_ring
)
3439 goto err_tx_ring_allocation
;
3441 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
3442 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
3443 if (!adapter
->rx_ring
)
3444 goto err_rx_ring_allocation
;
3446 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3447 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
3448 adapter
->tx_ring
[i
].queue_index
= i
;
3451 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3452 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
3453 adapter
->rx_ring
[i
].queue_index
= i
;
3456 ixgbe_cache_ring_register(adapter
);
3460 err_rx_ring_allocation
:
3461 kfree(adapter
->tx_ring
);
3462 err_tx_ring_allocation
:
3467 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
3468 * @adapter: board private structure to initialize
3470 * Attempt to configure the interrupts using the best available
3471 * capabilities of the hardware and the kernel.
3473 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter
*adapter
)
3475 struct ixgbe_hw
*hw
= &adapter
->hw
;
3477 int vector
, v_budget
;
3480 * It's easy to be greedy for MSI-X vectors, but it really
3481 * doesn't do us much good if we have a lot more vectors
3482 * than CPU's. So let's be conservative and only ask for
3483 * (roughly) twice the number of vectors as there are CPU's.
3485 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
3486 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
3489 * At the same time, hardware can only support a maximum of
3490 * hw.mac->max_msix_vectors vectors. With features
3491 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
3492 * descriptor queues supported by our device. Thus, we cap it off in
3493 * those rare cases where the cpu count also exceeds our vector limit.
3495 v_budget
= min(v_budget
, (int)hw
->mac
.max_msix_vectors
);
3497 /* A failure in MSI-X entry allocation isn't fatal, but it does
3498 * mean we disable MSI-X capabilities of the adapter. */
3499 adapter
->msix_entries
= kcalloc(v_budget
,
3500 sizeof(struct msix_entry
), GFP_KERNEL
);
3501 if (adapter
->msix_entries
) {
3502 for (vector
= 0; vector
< v_budget
; vector
++)
3503 adapter
->msix_entries
[vector
].entry
= vector
;
3505 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
3507 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3511 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
3512 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
3513 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
3514 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
3515 adapter
->atr_sample_rate
= 0;
3516 ixgbe_set_num_queues(adapter
);
3518 err
= pci_enable_msi(adapter
->pdev
);
3520 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
3522 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
3523 "falling back to legacy. Error: %d\n", err
);
3533 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
3534 * @adapter: board private structure to initialize
3536 * We allocate one q_vector per queue interrupt. If allocation fails we
3539 static int ixgbe_alloc_q_vectors(struct ixgbe_adapter
*adapter
)
3541 int q_idx
, num_q_vectors
;
3542 struct ixgbe_q_vector
*q_vector
;
3544 int (*poll
)(struct napi_struct
*, int);
3546 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3547 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3548 napi_vectors
= adapter
->num_rx_queues
;
3549 poll
= &ixgbe_clean_rxtx_many
;
3556 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
3557 q_vector
= kzalloc(sizeof(struct ixgbe_q_vector
), GFP_KERNEL
);
3560 q_vector
->adapter
= adapter
;
3561 q_vector
->eitr
= adapter
->eitr_param
;
3562 q_vector
->v_idx
= q_idx
;
3563 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
3564 adapter
->q_vector
[q_idx
] = q_vector
;
3572 q_vector
= adapter
->q_vector
[q_idx
];
3573 netif_napi_del(&q_vector
->napi
);
3575 adapter
->q_vector
[q_idx
] = NULL
;
3581 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
3582 * @adapter: board private structure to initialize
3584 * This function frees the memory allocated to the q_vectors. In addition if
3585 * NAPI is enabled it will delete any references to the NAPI struct prior
3586 * to freeing the q_vector.
3588 static void ixgbe_free_q_vectors(struct ixgbe_adapter
*adapter
)
3590 int q_idx
, num_q_vectors
;
3592 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3593 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3597 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
3598 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[q_idx
];
3599 adapter
->q_vector
[q_idx
] = NULL
;
3600 netif_napi_del(&q_vector
->napi
);
3605 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
3607 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3608 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3609 pci_disable_msix(adapter
->pdev
);
3610 kfree(adapter
->msix_entries
);
3611 adapter
->msix_entries
= NULL
;
3612 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
3613 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
3614 pci_disable_msi(adapter
->pdev
);
3620 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
3621 * @adapter: board private structure to initialize
3623 * We determine which interrupt scheme to use based on...
3624 * - Kernel support (MSI, MSI-X)
3625 * - which can be user-defined (via MODULE_PARAM)
3626 * - Hardware queue count (num_*_queues)
3627 * - defined by miscellaneous hardware support/features (RSS, etc.)
3629 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
3633 /* Number of supported queues */
3634 ixgbe_set_num_queues(adapter
);
3636 err
= ixgbe_set_interrupt_capability(adapter
);
3638 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
3639 goto err_set_interrupt
;
3642 err
= ixgbe_alloc_q_vectors(adapter
);
3644 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queue "
3646 goto err_alloc_q_vectors
;
3649 err
= ixgbe_alloc_queues(adapter
);
3651 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
3652 goto err_alloc_queues
;
3655 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
3656 "Tx Queue count = %u\n",
3657 (adapter
->num_rx_queues
> 1) ? "Enabled" :
3658 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
3660 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3665 ixgbe_free_q_vectors(adapter
);
3666 err_alloc_q_vectors
:
3667 ixgbe_reset_interrupt_capability(adapter
);
3673 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
3674 * @adapter: board private structure to clear interrupt scheme on
3676 * We go through and clear interrupt specific resources and reset the structure
3677 * to pre-load conditions
3679 void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter
*adapter
)
3681 kfree(adapter
->tx_ring
);
3682 kfree(adapter
->rx_ring
);
3683 adapter
->tx_ring
= NULL
;
3684 adapter
->rx_ring
= NULL
;
3686 ixgbe_free_q_vectors(adapter
);
3687 ixgbe_reset_interrupt_capability(adapter
);
3691 * ixgbe_sfp_timer - worker thread to find a missing module
3692 * @data: pointer to our adapter struct
3694 static void ixgbe_sfp_timer(unsigned long data
)
3696 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3699 * Do the sfp_timer outside of interrupt context due to the
3700 * delays that sfp+ detection requires
3702 schedule_work(&adapter
->sfp_task
);
3706 * ixgbe_sfp_task - worker thread to find a missing module
3707 * @work: pointer to work_struct containing our data
3709 static void ixgbe_sfp_task(struct work_struct
*work
)
3711 struct ixgbe_adapter
*adapter
= container_of(work
,
3712 struct ixgbe_adapter
,
3714 struct ixgbe_hw
*hw
= &adapter
->hw
;
3716 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
3717 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
3718 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
3721 ret
= hw
->phy
.ops
.reset(hw
);
3722 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3723 DPRINTK(PROBE
, ERR
, "failed to initialize because an "
3724 "unsupported SFP+ module type was detected.\n"
3725 "Reload the driver after installing a "
3726 "supported module.\n");
3727 unregister_netdev(adapter
->netdev
);
3729 DPRINTK(PROBE
, INFO
, "detected SFP+: %d\n",
3732 /* don't need this routine any more */
3733 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3737 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
3738 mod_timer(&adapter
->sfp_timer
,
3739 round_jiffies(jiffies
+ (2 * HZ
)));
3743 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
3744 * @adapter: board private structure to initialize
3746 * ixgbe_sw_init initializes the Adapter private data structure.
3747 * Fields are initialized based on PCI device information and
3748 * OS network device settings (MTU size).
3750 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
3752 struct ixgbe_hw
*hw
= &adapter
->hw
;
3753 struct pci_dev
*pdev
= adapter
->pdev
;
3755 #ifdef CONFIG_IXGBE_DCB
3757 struct tc_configuration
*tc
;
3760 /* PCI config space info */
3762 hw
->vendor_id
= pdev
->vendor
;
3763 hw
->device_id
= pdev
->device
;
3764 hw
->revision_id
= pdev
->revision
;
3765 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
3766 hw
->subsystem_device_id
= pdev
->subsystem_device
;
3768 /* Set capability flags */
3769 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
3770 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
3771 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
3772 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
3773 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3774 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
3775 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
3776 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
3777 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3778 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
3779 adapter
->flags
|= IXGBE_FLAG2_RSC_CAPABLE
;
3780 adapter
->flags
|= IXGBE_FLAG2_RSC_ENABLED
;
3781 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
3782 adapter
->ring_feature
[RING_F_FDIR
].indices
=
3783 IXGBE_MAX_FDIR_INDICES
;
3784 adapter
->atr_sample_rate
= 20;
3785 adapter
->fdir_pballoc
= 0;
3787 adapter
->flags
|= IXGBE_FLAG_FCOE_ENABLED
;
3788 adapter
->ring_feature
[RING_F_FCOE
].indices
= IXGBE_FCRETA_SIZE
;
3789 #endif /* IXGBE_FCOE */
3792 #ifdef CONFIG_IXGBE_DCB
3793 /* Configure DCB traffic classes */
3794 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
3795 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
3796 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
3797 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3798 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
3799 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3800 tc
->dcb_pfc
= pfc_disabled
;
3802 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
3803 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
3804 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
3805 adapter
->dcb_cfg
.pfc_mode_enable
= false;
3806 adapter
->dcb_cfg
.round_robin_enable
= false;
3807 adapter
->dcb_set_bitmap
= 0x00;
3808 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
3809 adapter
->ring_feature
[RING_F_DCB
].indices
);
3813 /* default flow control settings */
3814 hw
->fc
.requested_mode
= ixgbe_fc_full
;
3815 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
3817 adapter
->last_lfc_mode
= hw
->fc
.current_mode
;
3819 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
3820 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
3821 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
3822 hw
->fc
.send_xon
= true;
3823 hw
->fc
.disable_fc_autoneg
= false;
3825 /* enable itr by default in dynamic mode */
3826 adapter
->itr_setting
= 1;
3827 adapter
->eitr_param
= 20000;
3829 /* set defaults for eitr in MegaBytes */
3830 adapter
->eitr_low
= 10;
3831 adapter
->eitr_high
= 20;
3833 /* set default ring sizes */
3834 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
3835 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
3837 /* initialize eeprom parameters */
3838 if (ixgbe_init_eeprom_params_generic(hw
)) {
3839 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
3843 /* enable rx csum by default */
3844 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
3846 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3852 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
3853 * @adapter: board private structure
3854 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3856 * Return 0 on success, negative on failure
3858 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
3859 struct ixgbe_ring
*tx_ring
)
3861 struct pci_dev
*pdev
= adapter
->pdev
;
3864 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
3865 tx_ring
->tx_buffer_info
= vmalloc(size
);
3866 if (!tx_ring
->tx_buffer_info
)
3868 memset(tx_ring
->tx_buffer_info
, 0, size
);
3870 /* round up to nearest 4K */
3871 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
3872 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3874 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
3879 tx_ring
->next_to_use
= 0;
3880 tx_ring
->next_to_clean
= 0;
3881 tx_ring
->work_limit
= tx_ring
->count
;
3885 vfree(tx_ring
->tx_buffer_info
);
3886 tx_ring
->tx_buffer_info
= NULL
;
3887 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
3888 "descriptor ring\n");
3893 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
3894 * @adapter: board private structure
3896 * If this function returns with an error, then it's possible one or
3897 * more of the rings is populated (while the rest are not). It is the
3898 * callers duty to clean those orphaned rings.
3900 * Return 0 on success, negative on failure
3902 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
3906 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3907 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
3910 DPRINTK(PROBE
, ERR
, "Allocation for Tx Queue %u failed\n", i
);
3918 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
3919 * @adapter: board private structure
3920 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3922 * Returns 0 on success, negative on failure
3924 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
3925 struct ixgbe_ring
*rx_ring
)
3927 struct pci_dev
*pdev
= adapter
->pdev
;
3930 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
3931 rx_ring
->rx_buffer_info
= vmalloc(size
);
3932 if (!rx_ring
->rx_buffer_info
) {
3934 "vmalloc allocation failed for the rx desc ring\n");
3937 memset(rx_ring
->rx_buffer_info
, 0, size
);
3939 /* Round up to nearest 4K */
3940 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
3941 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3943 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
3945 if (!rx_ring
->desc
) {
3947 "Memory allocation failed for the rx desc ring\n");
3948 vfree(rx_ring
->rx_buffer_info
);
3952 rx_ring
->next_to_clean
= 0;
3953 rx_ring
->next_to_use
= 0;
3962 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
3963 * @adapter: board private structure
3965 * If this function returns with an error, then it's possible one or
3966 * more of the rings is populated (while the rest are not). It is the
3967 * callers duty to clean those orphaned rings.
3969 * Return 0 on success, negative on failure
3972 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
3976 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3977 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
3980 DPRINTK(PROBE
, ERR
, "Allocation for Rx Queue %u failed\n", i
);
3988 * ixgbe_free_tx_resources - Free Tx Resources per Queue
3989 * @adapter: board private structure
3990 * @tx_ring: Tx descriptor ring for a specific queue
3992 * Free all transmit software resources
3994 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
3995 struct ixgbe_ring
*tx_ring
)
3997 struct pci_dev
*pdev
= adapter
->pdev
;
3999 ixgbe_clean_tx_ring(adapter
, tx_ring
);
4001 vfree(tx_ring
->tx_buffer_info
);
4002 tx_ring
->tx_buffer_info
= NULL
;
4004 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
4006 tx_ring
->desc
= NULL
;
4010 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4011 * @adapter: board private structure
4013 * Free all transmit software resources
4015 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
4019 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4020 if (adapter
->tx_ring
[i
].desc
)
4021 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
4025 * ixgbe_free_rx_resources - Free Rx Resources
4026 * @adapter: board private structure
4027 * @rx_ring: ring to clean the resources from
4029 * Free all receive software resources
4031 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
4032 struct ixgbe_ring
*rx_ring
)
4034 struct pci_dev
*pdev
= adapter
->pdev
;
4036 ixgbe_clean_rx_ring(adapter
, rx_ring
);
4038 vfree(rx_ring
->rx_buffer_info
);
4039 rx_ring
->rx_buffer_info
= NULL
;
4041 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
4043 rx_ring
->desc
= NULL
;
4047 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4048 * @adapter: board private structure
4050 * Free all receive software resources
4052 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
4056 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4057 if (adapter
->rx_ring
[i
].desc
)
4058 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
4062 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4063 * @netdev: network interface device structure
4064 * @new_mtu: new value for maximum frame size
4066 * Returns 0 on success, negative on failure
4068 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
4070 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4071 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4073 /* MTU < 68 is an error and causes problems on some kernels */
4074 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
4077 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
4078 netdev
->mtu
, new_mtu
);
4079 /* must set new MTU before calling down or up */
4080 netdev
->mtu
= new_mtu
;
4082 if (netif_running(netdev
))
4083 ixgbe_reinit_locked(adapter
);
4089 * ixgbe_open - Called when a network interface is made active
4090 * @netdev: network interface device structure
4092 * Returns 0 on success, negative value on failure
4094 * The open entry point is called when a network interface is made
4095 * active by the system (IFF_UP). At this point all resources needed
4096 * for transmit and receive operations are allocated, the interrupt
4097 * handler is registered with the OS, the watchdog timer is started,
4098 * and the stack is notified that the interface is ready.
4100 static int ixgbe_open(struct net_device
*netdev
)
4102 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4105 /* disallow open during test */
4106 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
4109 netif_carrier_off(netdev
);
4111 /* allocate transmit descriptors */
4112 err
= ixgbe_setup_all_tx_resources(adapter
);
4116 /* allocate receive descriptors */
4117 err
= ixgbe_setup_all_rx_resources(adapter
);
4121 ixgbe_configure(adapter
);
4123 err
= ixgbe_request_irq(adapter
);
4127 err
= ixgbe_up_complete(adapter
);
4131 netif_tx_start_all_queues(netdev
);
4136 ixgbe_release_hw_control(adapter
);
4137 ixgbe_free_irq(adapter
);
4140 ixgbe_free_all_rx_resources(adapter
);
4142 ixgbe_free_all_tx_resources(adapter
);
4143 ixgbe_reset(adapter
);
4149 * ixgbe_close - Disables a network interface
4150 * @netdev: network interface device structure
4152 * Returns 0, this is not allowed to fail
4154 * The close entry point is called when an interface is de-activated
4155 * by the OS. The hardware is still under the drivers control, but
4156 * needs to be disabled. A global MAC reset is issued to stop the
4157 * hardware, and all transmit and receive resources are freed.
4159 static int ixgbe_close(struct net_device
*netdev
)
4161 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4163 ixgbe_down(adapter
);
4164 ixgbe_free_irq(adapter
);
4166 ixgbe_free_all_tx_resources(adapter
);
4167 ixgbe_free_all_rx_resources(adapter
);
4169 ixgbe_release_hw_control(adapter
);
4175 static int ixgbe_resume(struct pci_dev
*pdev
)
4177 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4178 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4181 pci_set_power_state(pdev
, PCI_D0
);
4182 pci_restore_state(pdev
);
4184 err
= pci_enable_device_mem(pdev
);
4186 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from "
4190 pci_set_master(pdev
);
4192 pci_wake_from_d3(pdev
, false);
4194 err
= ixgbe_init_interrupt_scheme(adapter
);
4196 printk(KERN_ERR
"ixgbe: Cannot initialize interrupts for "
4201 ixgbe_reset(adapter
);
4203 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4205 if (netif_running(netdev
)) {
4206 err
= ixgbe_open(adapter
->netdev
);
4211 netif_device_attach(netdev
);
4215 #endif /* CONFIG_PM */
4217 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
4219 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4220 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4221 struct ixgbe_hw
*hw
= &adapter
->hw
;
4223 u32 wufc
= adapter
->wol
;
4228 netif_device_detach(netdev
);
4230 if (netif_running(netdev
)) {
4231 ixgbe_down(adapter
);
4232 ixgbe_free_irq(adapter
);
4233 ixgbe_free_all_tx_resources(adapter
);
4234 ixgbe_free_all_rx_resources(adapter
);
4236 ixgbe_clear_interrupt_scheme(adapter
);
4239 retval
= pci_save_state(pdev
);
4245 ixgbe_set_rx_mode(netdev
);
4247 /* turn on all-multi mode if wake on multicast is enabled */
4248 if (wufc
& IXGBE_WUFC_MC
) {
4249 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4250 fctrl
|= IXGBE_FCTRL_MPE
;
4251 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4254 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
4255 ctrl
|= IXGBE_CTRL_GIO_DIS
;
4256 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
4258 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
4260 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
4261 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
4264 if (wufc
&& hw
->mac
.type
== ixgbe_mac_82599EB
)
4265 pci_wake_from_d3(pdev
, true);
4267 pci_wake_from_d3(pdev
, false);
4269 *enable_wake
= !!wufc
;
4271 ixgbe_release_hw_control(adapter
);
4273 pci_disable_device(pdev
);
4279 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4284 retval
= __ixgbe_shutdown(pdev
, &wake
);
4289 pci_prepare_to_sleep(pdev
);
4291 pci_wake_from_d3(pdev
, false);
4292 pci_set_power_state(pdev
, PCI_D3hot
);
4297 #endif /* CONFIG_PM */
4299 static void ixgbe_shutdown(struct pci_dev
*pdev
)
4303 __ixgbe_shutdown(pdev
, &wake
);
4305 if (system_state
== SYSTEM_POWER_OFF
) {
4306 pci_wake_from_d3(pdev
, wake
);
4307 pci_set_power_state(pdev
, PCI_D3hot
);
4312 * ixgbe_update_stats - Update the board statistics counters.
4313 * @adapter: board private structure
4315 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
4317 struct ixgbe_hw
*hw
= &adapter
->hw
;
4319 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
4321 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4323 for (i
= 0; i
< 16; i
++)
4324 adapter
->hw_rx_no_dma_resources
+=
4325 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
4326 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4327 rsc_count
+= adapter
->rx_ring
[i
].rsc_count
;
4328 adapter
->rsc_count
= rsc_count
;
4331 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
4332 for (i
= 0; i
< 8; i
++) {
4333 /* for packet buffers not used, the register should read 0 */
4334 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
4336 adapter
->stats
.mpc
[i
] += mpc
;
4337 total_mpc
+= adapter
->stats
.mpc
[i
];
4338 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4339 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
4340 adapter
->stats
.qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
4341 adapter
->stats
.qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
4342 adapter
->stats
.qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
4343 adapter
->stats
.qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
4344 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4345 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
4346 IXGBE_PXONRXCNT(i
));
4347 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
4348 IXGBE_PXOFFRXCNT(i
));
4349 adapter
->stats
.qprdc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
4351 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
4353 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
4356 adapter
->stats
.pxontxc
[i
] += IXGBE_READ_REG(hw
,
4358 adapter
->stats
.pxofftxc
[i
] += IXGBE_READ_REG(hw
,
4361 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
4362 /* work around hardware counting issue */
4363 adapter
->stats
.gprc
-= missed_rx
;
4365 /* 82598 hardware only has a 32 bit counter in the high register */
4366 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4367 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
4368 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
4369 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
4370 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
4371 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
4372 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
4373 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
4374 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
4375 adapter
->stats
.fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
4376 adapter
->stats
.fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
4378 adapter
->stats
.fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
4379 adapter
->stats
.fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
4380 adapter
->stats
.fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
4381 adapter
->stats
.fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
4382 adapter
->stats
.fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
4383 adapter
->stats
.fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
4384 #endif /* IXGBE_FCOE */
4386 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
4387 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
4388 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
4389 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
4390 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
4392 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
4393 adapter
->stats
.bprc
+= bprc
;
4394 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
4395 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4396 adapter
->stats
.mprc
-= bprc
;
4397 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
4398 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
4399 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
4400 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
4401 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
4402 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
4403 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
4404 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
4405 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
4406 adapter
->stats
.lxontxc
+= lxon
;
4407 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
4408 adapter
->stats
.lxofftxc
+= lxoff
;
4409 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
4410 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
4411 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
4413 * 82598 errata - tx of flow control packets is included in tx counters
4415 xon_off_tot
= lxon
+ lxoff
;
4416 adapter
->stats
.gptc
-= xon_off_tot
;
4417 adapter
->stats
.mptc
-= xon_off_tot
;
4418 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
4419 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
4420 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
4421 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
4422 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
4423 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
4424 adapter
->stats
.ptc64
-= xon_off_tot
;
4425 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
4426 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
4427 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
4428 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
4429 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
4430 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
4432 /* Fill out the OS statistics structure */
4433 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
4436 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
4437 adapter
->stats
.rlec
;
4438 adapter
->net_stats
.rx_dropped
= 0;
4439 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
4440 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
4441 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
4445 * ixgbe_watchdog - Timer Call-back
4446 * @data: pointer to adapter cast into an unsigned long
4448 static void ixgbe_watchdog(unsigned long data
)
4450 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
4451 struct ixgbe_hw
*hw
= &adapter
->hw
;
4456 * Do the watchdog outside of interrupt context due to the lovely
4457 * delays that some of the newer hardware requires
4460 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
4461 goto watchdog_short_circuit
;
4463 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
4465 * for legacy and MSI interrupts don't set any bits
4466 * that are enabled for EIAM, because this operation
4467 * would set *both* EIMS and EICS for any bit in EIAM
4469 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
4470 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
4471 goto watchdog_reschedule
;
4474 /* get one bit for every active tx/rx interrupt vector */
4475 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
4476 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
4477 if (qv
->rxr_count
|| qv
->txr_count
)
4478 eics
|= ((u64
)1 << i
);
4481 /* Cause software interrupt to ensure rx rings are cleaned */
4482 ixgbe_irq_rearm_queues(adapter
, eics
);
4484 watchdog_reschedule
:
4485 /* Reset the timer */
4486 mod_timer(&adapter
->watchdog_timer
, round_jiffies(jiffies
+ 2 * HZ
));
4488 watchdog_short_circuit
:
4489 schedule_work(&adapter
->watchdog_task
);
4493 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
4494 * @work: pointer to work_struct containing our data
4496 static void ixgbe_multispeed_fiber_task(struct work_struct
*work
)
4498 struct ixgbe_adapter
*adapter
= container_of(work
,
4499 struct ixgbe_adapter
,
4500 multispeed_fiber_task
);
4501 struct ixgbe_hw
*hw
= &adapter
->hw
;
4504 adapter
->flags
|= IXGBE_FLAG_IN_SFP_LINK_TASK
;
4505 if (hw
->mac
.ops
.get_link_capabilities
)
4506 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
4508 if (hw
->mac
.ops
.setup_link_speed
)
4509 hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, true);
4510 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4511 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_LINK_TASK
;
4515 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
4516 * @work: pointer to work_struct containing our data
4518 static void ixgbe_sfp_config_module_task(struct work_struct
*work
)
4520 struct ixgbe_adapter
*adapter
= container_of(work
,
4521 struct ixgbe_adapter
,
4522 sfp_config_module_task
);
4523 struct ixgbe_hw
*hw
= &adapter
->hw
;
4526 adapter
->flags
|= IXGBE_FLAG_IN_SFP_MOD_TASK
;
4527 err
= hw
->phy
.ops
.identify_sfp(hw
);
4528 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4529 DPRINTK(PROBE
, ERR
, "PHY not supported on this NIC %d\n", err
);
4530 ixgbe_down(adapter
);
4533 hw
->mac
.ops
.setup_sfp(hw
);
4535 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
4536 /* This will also work for DA Twinax connections */
4537 schedule_work(&adapter
->multispeed_fiber_task
);
4538 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_MOD_TASK
;
4542 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
4543 * @work: pointer to work_struct containing our data
4545 static void ixgbe_fdir_reinit_task(struct work_struct
*work
)
4547 struct ixgbe_adapter
*adapter
= container_of(work
,
4548 struct ixgbe_adapter
,
4550 struct ixgbe_hw
*hw
= &adapter
->hw
;
4553 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
4554 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4555 set_bit(__IXGBE_FDIR_INIT_DONE
,
4556 &(adapter
->tx_ring
[i
].reinit_state
));
4558 DPRINTK(PROBE
, ERR
, "failed to finish FDIR re-initialization, "
4559 "ignored adding FDIR ATR filters \n");
4561 /* Done FDIR Re-initialization, enable transmits */
4562 netif_tx_start_all_queues(adapter
->netdev
);
4566 * ixgbe_watchdog_task - worker thread to bring link up
4567 * @work: pointer to work_struct containing our data
4569 static void ixgbe_watchdog_task(struct work_struct
*work
)
4571 struct ixgbe_adapter
*adapter
= container_of(work
,
4572 struct ixgbe_adapter
,
4574 struct net_device
*netdev
= adapter
->netdev
;
4575 struct ixgbe_hw
*hw
= &adapter
->hw
;
4576 u32 link_speed
= adapter
->link_speed
;
4577 bool link_up
= adapter
->link_up
;
4579 struct ixgbe_ring
*tx_ring
;
4580 int some_tx_pending
= 0;
4582 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
4584 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
4585 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
4588 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4589 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++)
4590 hw
->mac
.ops
.fc_enable(hw
, i
);
4592 hw
->mac
.ops
.fc_enable(hw
, 0);
4595 hw
->mac
.ops
.fc_enable(hw
, 0);
4600 time_after(jiffies
, (adapter
->link_check_timeout
+
4601 IXGBE_TRY_LINK_TIMEOUT
))) {
4602 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4603 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
4605 adapter
->link_up
= link_up
;
4606 adapter
->link_speed
= link_speed
;
4610 if (!netif_carrier_ok(netdev
)) {
4611 bool flow_rx
, flow_tx
;
4613 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4614 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
4615 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
4616 flow_rx
= (mflcn
& IXGBE_MFLCN_RFCE
);
4617 flow_tx
= (fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
4619 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4620 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
4621 flow_rx
= (frctl
& IXGBE_FCTRL_RFCE
);
4622 flow_tx
= (rmcs
& IXGBE_RMCS_TFCE_802_3X
);
4625 printk(KERN_INFO
"ixgbe: %s NIC Link is Up %s, "
4626 "Flow Control: %s\n",
4628 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
4630 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
4631 "1 Gbps" : "unknown speed")),
4632 ((flow_rx
&& flow_tx
) ? "RX/TX" :
4634 (flow_tx
? "TX" : "None"))));
4636 netif_carrier_on(netdev
);
4638 /* Force detection of hung controller */
4639 adapter
->detect_tx_hung
= true;
4642 adapter
->link_up
= false;
4643 adapter
->link_speed
= 0;
4644 if (netif_carrier_ok(netdev
)) {
4645 printk(KERN_INFO
"ixgbe: %s NIC Link is Down\n",
4647 netif_carrier_off(netdev
);
4651 if (!netif_carrier_ok(netdev
)) {
4652 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4653 tx_ring
= &adapter
->tx_ring
[i
];
4654 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
4655 some_tx_pending
= 1;
4660 if (some_tx_pending
) {
4661 /* We've lost link, so the controller stops DMA,
4662 * but we've got queued Tx work that's never going
4663 * to get done, so reset controller to flush Tx.
4664 * (Do the reset outside of interrupt context).
4666 schedule_work(&adapter
->reset_task
);
4670 ixgbe_update_stats(adapter
);
4671 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
4674 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
4675 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
4676 u32 tx_flags
, u8
*hdr_len
)
4678 struct ixgbe_adv_tx_context_desc
*context_desc
;
4681 struct ixgbe_tx_buffer
*tx_buffer_info
;
4682 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
4683 u32 mss_l4len_idx
, l4len
;
4685 if (skb_is_gso(skb
)) {
4686 if (skb_header_cloned(skb
)) {
4687 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
4691 l4len
= tcp_hdrlen(skb
);
4694 if (skb
->protocol
== htons(ETH_P_IP
)) {
4695 struct iphdr
*iph
= ip_hdr(skb
);
4698 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4702 adapter
->hw_tso_ctxt
++;
4703 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
4704 ipv6_hdr(skb
)->payload_len
= 0;
4705 tcp_hdr(skb
)->check
=
4706 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4707 &ipv6_hdr(skb
)->daddr
,
4709 adapter
->hw_tso6_ctxt
++;
4712 i
= tx_ring
->next_to_use
;
4714 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4715 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4717 /* VLAN MACLEN IPLEN */
4718 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4720 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4721 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
4722 IXGBE_ADVTXD_MACLEN_SHIFT
);
4723 *hdr_len
+= skb_network_offset(skb
);
4725 (skb_transport_header(skb
) - skb_network_header(skb
));
4727 (skb_transport_header(skb
) - skb_network_header(skb
));
4728 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4729 context_desc
->seqnum_seed
= 0;
4731 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4732 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
4733 IXGBE_ADVTXD_DTYP_CTXT
);
4735 if (skb
->protocol
== htons(ETH_P_IP
))
4736 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4737 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4738 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4742 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
4743 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
4744 /* use index 1 for TSO */
4745 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4746 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4748 tx_buffer_info
->time_stamp
= jiffies
;
4749 tx_buffer_info
->next_to_watch
= i
;
4752 if (i
== tx_ring
->count
)
4754 tx_ring
->next_to_use
= i
;
4761 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
4762 struct ixgbe_ring
*tx_ring
,
4763 struct sk_buff
*skb
, u32 tx_flags
)
4765 struct ixgbe_adv_tx_context_desc
*context_desc
;
4767 struct ixgbe_tx_buffer
*tx_buffer_info
;
4768 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
4770 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
4771 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
4772 i
= tx_ring
->next_to_use
;
4773 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4774 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4776 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4778 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4779 vlan_macip_lens
|= (skb_network_offset(skb
) <<
4780 IXGBE_ADVTXD_MACLEN_SHIFT
);
4781 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
4782 vlan_macip_lens
|= (skb_transport_header(skb
) -
4783 skb_network_header(skb
));
4785 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4786 context_desc
->seqnum_seed
= 0;
4788 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
4789 IXGBE_ADVTXD_DTYP_CTXT
);
4791 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
4792 switch (skb
->protocol
) {
4793 case cpu_to_be16(ETH_P_IP
):
4794 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4795 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
4797 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4798 else if (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)
4800 IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
4802 case cpu_to_be16(ETH_P_IPV6
):
4803 /* XXX what about other V6 headers?? */
4804 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
4806 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4807 else if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_SCTP
)
4809 IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
4812 if (unlikely(net_ratelimit())) {
4813 DPRINTK(PROBE
, WARNING
,
4814 "partial checksum but proto=%x!\n",
4821 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4822 /* use index zero for tx checksum offload */
4823 context_desc
->mss_l4len_idx
= 0;
4825 tx_buffer_info
->time_stamp
= jiffies
;
4826 tx_buffer_info
->next_to_watch
= i
;
4828 adapter
->hw_csum_tx_good
++;
4830 if (i
== tx_ring
->count
)
4832 tx_ring
->next_to_use
= i
;
4840 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
4841 struct ixgbe_ring
*tx_ring
,
4842 struct sk_buff
*skb
, u32 tx_flags
,
4845 struct ixgbe_tx_buffer
*tx_buffer_info
;
4847 unsigned int total
= skb
->len
;
4848 unsigned int offset
= 0, size
, count
= 0, i
;
4849 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
4853 i
= tx_ring
->next_to_use
;
4855 if (skb_dma_map(&adapter
->pdev
->dev
, skb
, DMA_TO_DEVICE
)) {
4856 dev_err(&adapter
->pdev
->dev
, "TX DMA map failed\n");
4860 map
= skb_shinfo(skb
)->dma_maps
;
4862 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
)
4863 /* excluding fcoe_crc_eof for FCoE */
4864 total
-= sizeof(struct fcoe_crc_eof
);
4866 len
= min(skb_headlen(skb
), total
);
4868 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4869 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
4871 tx_buffer_info
->length
= size
;
4872 tx_buffer_info
->dma
= skb_shinfo(skb
)->dma_head
+ offset
;
4873 tx_buffer_info
->time_stamp
= jiffies
;
4874 tx_buffer_info
->next_to_watch
= i
;
4883 if (i
== tx_ring
->count
)
4888 for (f
= 0; f
< nr_frags
; f
++) {
4889 struct skb_frag_struct
*frag
;
4891 frag
= &skb_shinfo(skb
)->frags
[f
];
4892 len
= min((unsigned int)frag
->size
, total
);
4897 if (i
== tx_ring
->count
)
4900 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4901 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
4903 tx_buffer_info
->length
= size
;
4904 tx_buffer_info
->dma
= map
[f
] + offset
;
4905 tx_buffer_info
->time_stamp
= jiffies
;
4906 tx_buffer_info
->next_to_watch
= i
;
4917 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
4918 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
4923 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
4924 struct ixgbe_ring
*tx_ring
,
4925 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
4927 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
4928 struct ixgbe_tx_buffer
*tx_buffer_info
;
4929 u32 olinfo_status
= 0, cmd_type_len
= 0;
4931 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
4933 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
4935 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
4937 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4938 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
4940 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
4941 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
4943 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
4944 IXGBE_ADVTXD_POPTS_SHIFT
;
4946 /* use index 1 context for tso */
4947 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4948 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
4949 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
4950 IXGBE_ADVTXD_POPTS_SHIFT
;
4952 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
4953 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
4954 IXGBE_ADVTXD_POPTS_SHIFT
;
4956 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
4957 olinfo_status
|= IXGBE_ADVTXD_CC
;
4958 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4959 if (tx_flags
& IXGBE_TX_FLAGS_FSO
)
4960 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
4963 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
4965 i
= tx_ring
->next_to_use
;
4967 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4968 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
4969 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
4970 tx_desc
->read
.cmd_type_len
=
4971 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
4972 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4974 if (i
== tx_ring
->count
)
4978 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
4981 * Force memory writes to complete before letting h/w
4982 * know there are new descriptors to fetch. (Only
4983 * applicable for weak-ordered memory model archs,
4988 tx_ring
->next_to_use
= i
;
4989 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
4992 static void ixgbe_atr(struct ixgbe_adapter
*adapter
, struct sk_buff
*skb
,
4993 int queue
, u32 tx_flags
)
4995 /* Right now, we support IPv4 only */
4996 struct ixgbe_atr_input atr_input
;
4999 struct iphdr
*iph
= ip_hdr(skb
);
5000 struct ethhdr
*eth
= (struct ethhdr
*)skb
->data
;
5001 u16 vlan_id
, src_port
, dst_port
, flex_bytes
;
5002 u32 src_ipv4_addr
, dst_ipv4_addr
;
5005 /* check if we're UDP or TCP */
5006 if (iph
->protocol
== IPPROTO_TCP
) {
5008 src_port
= th
->source
;
5009 dst_port
= th
->dest
;
5010 l4type
|= IXGBE_ATR_L4TYPE_TCP
;
5011 /* l4type IPv4 type is 0, no need to assign */
5012 } else if(iph
->protocol
== IPPROTO_UDP
) {
5014 src_port
= uh
->source
;
5015 dst_port
= uh
->dest
;
5016 l4type
|= IXGBE_ATR_L4TYPE_UDP
;
5017 /* l4type IPv4 type is 0, no need to assign */
5019 /* Unsupported L4 header, just bail here */
5023 memset(&atr_input
, 0, sizeof(struct ixgbe_atr_input
));
5025 vlan_id
= (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
) >>
5026 IXGBE_TX_FLAGS_VLAN_SHIFT
;
5027 src_ipv4_addr
= iph
->saddr
;
5028 dst_ipv4_addr
= iph
->daddr
;
5029 flex_bytes
= eth
->h_proto
;
5031 ixgbe_atr_set_vlan_id_82599(&atr_input
, vlan_id
);
5032 ixgbe_atr_set_src_port_82599(&atr_input
, dst_port
);
5033 ixgbe_atr_set_dst_port_82599(&atr_input
, src_port
);
5034 ixgbe_atr_set_flex_byte_82599(&atr_input
, flex_bytes
);
5035 ixgbe_atr_set_l4type_82599(&atr_input
, l4type
);
5036 /* src and dst are inverted, think how the receiver sees them */
5037 ixgbe_atr_set_src_ipv4_82599(&atr_input
, dst_ipv4_addr
);
5038 ixgbe_atr_set_dst_ipv4_82599(&atr_input
, src_ipv4_addr
);
5040 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
5041 ixgbe_fdir_add_signature_filter_82599(&adapter
->hw
, &atr_input
, queue
);
5044 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
5045 struct ixgbe_ring
*tx_ring
, int size
)
5047 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5049 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
5050 /* Herbert's original patch had:
5051 * smp_mb__after_netif_stop_queue();
5052 * but since that doesn't exist yet, just open code it. */
5055 /* We need to check again in a case another CPU has just
5056 * made room available. */
5057 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
5060 /* A reprieve! - use start_queue because it doesn't call schedule */
5061 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
5062 ++adapter
->restart_queue
;
5066 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
5067 struct ixgbe_ring
*tx_ring
, int size
)
5069 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
5071 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
5074 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
5076 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
5078 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
)
5079 return smp_processor_id();
5081 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
5082 return 0; /* All traffic should default to class 0 */
5084 return skb_tx_hash(dev
, skb
);
5087 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
5089 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5090 struct ixgbe_ring
*tx_ring
;
5092 unsigned int tx_flags
= 0;
5098 r_idx
= skb
->queue_mapping
;
5099 tx_ring
= &adapter
->tx_ring
[r_idx
];
5101 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
5102 tx_flags
|= vlan_tx_tag_get(skb
);
5103 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5104 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
5105 tx_flags
|= (skb
->queue_mapping
<< 13);
5107 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
5108 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
5109 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5110 tx_flags
|= (skb
->queue_mapping
<< 13);
5111 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
5112 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
5115 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
5116 (skb
->protocol
== htons(ETH_P_FCOE
)))
5117 tx_flags
|= IXGBE_TX_FLAGS_FCOE
;
5119 /* four things can cause us to need a context descriptor */
5120 if (skb_is_gso(skb
) ||
5121 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
5122 (tx_flags
& IXGBE_TX_FLAGS_VLAN
) ||
5123 (tx_flags
& IXGBE_TX_FLAGS_FCOE
))
5126 count
+= TXD_USE_COUNT(skb_headlen(skb
));
5127 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
5128 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
5130 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
5132 return NETDEV_TX_BUSY
;
5135 first
= tx_ring
->next_to_use
;
5136 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
5138 /* setup tx offload for FCoE */
5139 tso
= ixgbe_fso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
5141 dev_kfree_skb_any(skb
);
5142 return NETDEV_TX_OK
;
5145 tx_flags
|= IXGBE_TX_FLAGS_FSO
;
5146 #endif /* IXGBE_FCOE */
5148 if (skb
->protocol
== htons(ETH_P_IP
))
5149 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
5150 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
5152 dev_kfree_skb_any(skb
);
5153 return NETDEV_TX_OK
;
5157 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
5158 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
5159 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
5160 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
5163 count
= ixgbe_tx_map(adapter
, tx_ring
, skb
, tx_flags
, first
);
5165 /* add the ATR filter if ATR is on */
5166 if (tx_ring
->atr_sample_rate
) {
5167 ++tx_ring
->atr_count
;
5168 if ((tx_ring
->atr_count
>= tx_ring
->atr_sample_rate
) &&
5169 test_bit(__IXGBE_FDIR_INIT_DONE
,
5170 &tx_ring
->reinit_state
)) {
5171 ixgbe_atr(adapter
, skb
, tx_ring
->queue_index
,
5173 tx_ring
->atr_count
= 0;
5176 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
, count
, skb
->len
,
5178 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
5181 dev_kfree_skb_any(skb
);
5182 tx_ring
->tx_buffer_info
[first
].time_stamp
= 0;
5183 tx_ring
->next_to_use
= first
;
5186 return NETDEV_TX_OK
;
5190 * ixgbe_get_stats - Get System Network Statistics
5191 * @netdev: network interface device structure
5193 * Returns the address of the device statistics structure.
5194 * The statistics are actually updated from the timer callback.
5196 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
5198 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5200 /* only return the current stats */
5201 return &adapter
->net_stats
;
5205 * ixgbe_set_mac - Change the Ethernet Address of the NIC
5206 * @netdev: network interface device structure
5207 * @p: pointer to an address structure
5209 * Returns 0 on success, negative on failure
5211 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
5213 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5214 struct ixgbe_hw
*hw
= &adapter
->hw
;
5215 struct sockaddr
*addr
= p
;
5217 if (!is_valid_ether_addr(addr
->sa_data
))
5218 return -EADDRNOTAVAIL
;
5220 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
5221 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
5223 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
5229 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
5231 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5232 struct ixgbe_hw
*hw
= &adapter
->hw
;
5236 if (prtad
!= hw
->phy
.mdio
.prtad
)
5238 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
5244 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
5245 u16 addr
, u16 value
)
5247 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5248 struct ixgbe_hw
*hw
= &adapter
->hw
;
5250 if (prtad
!= hw
->phy
.mdio
.prtad
)
5252 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
5255 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
5257 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5259 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
5263 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
5264 * netdev->dev_addr_list
5265 * @netdev: network interface device structure
5267 * Returns non-zero on failure
5269 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
5272 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
5273 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
5275 if (is_valid_ether_addr(mac
->san_addr
)) {
5277 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
5284 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
5285 * netdev->dev_addr_list
5286 * @netdev: network interface device structure
5288 * Returns non-zero on failure
5290 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
5293 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
5294 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
5296 if (is_valid_ether_addr(mac
->san_addr
)) {
5298 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
5304 #ifdef CONFIG_NET_POLL_CONTROLLER
5306 * Polling 'interrupt' - used by things like netconsole to send skbs
5307 * without having to re-enable interrupts. It's not called while
5308 * the interrupt routine is executing.
5310 static void ixgbe_netpoll(struct net_device
*netdev
)
5312 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5314 disable_irq(adapter
->pdev
->irq
);
5315 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
5316 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
5317 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
5318 enable_irq(adapter
->pdev
->irq
);
5322 static const struct net_device_ops ixgbe_netdev_ops
= {
5323 .ndo_open
= ixgbe_open
,
5324 .ndo_stop
= ixgbe_close
,
5325 .ndo_start_xmit
= ixgbe_xmit_frame
,
5326 .ndo_select_queue
= ixgbe_select_queue
,
5327 .ndo_get_stats
= ixgbe_get_stats
,
5328 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
5329 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
5330 .ndo_validate_addr
= eth_validate_addr
,
5331 .ndo_set_mac_address
= ixgbe_set_mac
,
5332 .ndo_change_mtu
= ixgbe_change_mtu
,
5333 .ndo_tx_timeout
= ixgbe_tx_timeout
,
5334 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
5335 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
5336 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
5337 .ndo_do_ioctl
= ixgbe_ioctl
,
5338 #ifdef CONFIG_NET_POLL_CONTROLLER
5339 .ndo_poll_controller
= ixgbe_netpoll
,
5342 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
5343 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
5344 #endif /* IXGBE_FCOE */
5348 * ixgbe_probe - Device Initialization Routine
5349 * @pdev: PCI device information struct
5350 * @ent: entry in ixgbe_pci_tbl
5352 * Returns 0 on success, negative on failure
5354 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
5355 * The OS initialization, configuring of the adapter private structure,
5356 * and a hardware reset occur.
5358 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
5359 const struct pci_device_id
*ent
)
5361 struct net_device
*netdev
;
5362 struct ixgbe_adapter
*adapter
= NULL
;
5363 struct ixgbe_hw
*hw
;
5364 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
5365 static int cards_found
;
5366 int i
, err
, pci_using_dac
;
5372 err
= pci_enable_device_mem(pdev
);
5376 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)) &&
5377 !pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64))) {
5380 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
5382 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
5384 dev_err(&pdev
->dev
, "No usable DMA "
5385 "configuration, aborting\n");
5392 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
5393 IORESOURCE_MEM
), ixgbe_driver_name
);
5396 "pci_request_selected_regions failed 0x%x\n", err
);
5400 err
= pci_enable_pcie_error_reporting(pdev
);
5402 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
5404 /* non-fatal, continue */
5407 pci_set_master(pdev
);
5408 pci_save_state(pdev
);
5410 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
5413 goto err_alloc_etherdev
;
5416 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
5418 pci_set_drvdata(pdev
, netdev
);
5419 adapter
= netdev_priv(netdev
);
5421 adapter
->netdev
= netdev
;
5422 adapter
->pdev
= pdev
;
5425 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
5427 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
5428 pci_resource_len(pdev
, 0));
5434 for (i
= 1; i
<= 5; i
++) {
5435 if (pci_resource_len(pdev
, i
) == 0)
5439 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
5440 ixgbe_set_ethtool_ops(netdev
);
5441 netdev
->watchdog_timeo
= 5 * HZ
;
5442 strcpy(netdev
->name
, pci_name(pdev
));
5444 adapter
->bd_number
= cards_found
;
5447 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
5448 hw
->mac
.type
= ii
->mac
;
5451 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
5452 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
5453 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
5454 if (!(eec
& (1 << 8)))
5455 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
5458 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
5459 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
5460 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
5461 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
5462 hw
->phy
.mdio
.mmds
= 0;
5463 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
5464 hw
->phy
.mdio
.dev
= netdev
;
5465 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
5466 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
5468 /* set up this timer and work struct before calling get_invariants
5469 * which might start the timer
5471 init_timer(&adapter
->sfp_timer
);
5472 adapter
->sfp_timer
.function
= &ixgbe_sfp_timer
;
5473 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
5475 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
5477 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
5478 INIT_WORK(&adapter
->multispeed_fiber_task
, ixgbe_multispeed_fiber_task
);
5480 /* a new SFP+ module arrival, called from GPI SDP2 context */
5481 INIT_WORK(&adapter
->sfp_config_module_task
,
5482 ixgbe_sfp_config_module_task
);
5484 ii
->get_invariants(hw
);
5486 /* setup the private structure */
5487 err
= ixgbe_sw_init(adapter
);
5492 * If there is a fan on this device and it has failed log the
5495 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
5496 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
5497 if (esdp
& IXGBE_ESDP_SDP1
)
5498 DPRINTK(PROBE
, CRIT
,
5499 "Fan has stopped, replace the adapter\n");
5502 /* reset_hw fills in the perm_addr as well */
5503 err
= hw
->mac
.ops
.reset_hw(hw
);
5504 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
5505 hw
->mac
.type
== ixgbe_mac_82598EB
) {
5507 * Start a kernel thread to watch for a module to arrive.
5508 * Only do this for 82598, since 82599 will generate
5509 * interrupts on module arrival.
5511 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
5512 mod_timer(&adapter
->sfp_timer
,
5513 round_jiffies(jiffies
+ (2 * HZ
)));
5515 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
5516 dev_err(&adapter
->pdev
->dev
, "failed to load because an "
5517 "unsupported SFP+ module type was detected.\n");
5520 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
5524 netdev
->features
= NETIF_F_SG
|
5526 NETIF_F_HW_VLAN_TX
|
5527 NETIF_F_HW_VLAN_RX
|
5528 NETIF_F_HW_VLAN_FILTER
;
5530 netdev
->features
|= NETIF_F_IPV6_CSUM
;
5531 netdev
->features
|= NETIF_F_TSO
;
5532 netdev
->features
|= NETIF_F_TSO6
;
5533 netdev
->features
|= NETIF_F_GRO
;
5535 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
5536 netdev
->features
|= NETIF_F_SCTP_CSUM
;
5538 netdev
->vlan_features
|= NETIF_F_TSO
;
5539 netdev
->vlan_features
|= NETIF_F_TSO6
;
5540 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
5541 netdev
->vlan_features
|= NETIF_F_SG
;
5543 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
5544 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
5546 #ifdef CONFIG_IXGBE_DCB
5547 netdev
->dcbnl_ops
= &dcbnl_ops
;
5551 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
5552 if (hw
->mac
.ops
.get_device_caps
) {
5553 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
5554 if (!(device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)) {
5555 netdev
->features
|= NETIF_F_FCOE_CRC
;
5556 netdev
->features
|= NETIF_F_FSO
;
5557 netdev
->fcoe_ddp_xid
= IXGBE_FCOE_DDP_MAX
- 1;
5558 DPRINTK(DRV
, INFO
, "FCoE enabled, "
5559 "disabling Flow Director\n");
5560 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
5562 ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
5563 adapter
->atr_sample_rate
= 0;
5565 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5569 #endif /* IXGBE_FCOE */
5571 netdev
->features
|= NETIF_F_HIGHDMA
;
5573 if (adapter
->flags
& IXGBE_FLAG2_RSC_ENABLED
)
5574 netdev
->features
|= NETIF_F_LRO
;
5576 /* make sure the EEPROM is good */
5577 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
5578 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
5583 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
5584 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
5586 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
5587 dev_err(&pdev
->dev
, "invalid MAC address\n");
5592 init_timer(&adapter
->watchdog_timer
);
5593 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
5594 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
5596 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
5597 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
5599 err
= ixgbe_init_interrupt_scheme(adapter
);
5603 switch (pdev
->device
) {
5604 case IXGBE_DEV_ID_82599_KX4
:
5605 adapter
->wol
= (IXGBE_WUFC_MAG
| IXGBE_WUFC_EX
|
5606 IXGBE_WUFC_MC
| IXGBE_WUFC_BC
);
5607 /* Enable ACPI wakeup in GRC */
5608 IXGBE_WRITE_REG(hw
, IXGBE_GRC
,
5609 (IXGBE_READ_REG(hw
, IXGBE_GRC
) & ~IXGBE_GRC_APME
));
5615 device_init_wakeup(&adapter
->pdev
->dev
, true);
5616 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
5618 /* pick up the PCI bus settings for reporting later */
5619 hw
->mac
.ops
.get_bus_info(hw
);
5621 /* print bus type/speed/width info */
5622 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) %pM\n",
5623 ((hw
->bus
.speed
== ixgbe_bus_speed_5000
) ? "5.0Gb/s":
5624 (hw
->bus
.speed
== ixgbe_bus_speed_2500
) ? "2.5Gb/s":"Unknown"),
5625 ((hw
->bus
.width
== ixgbe_bus_width_pcie_x8
) ? "Width x8" :
5626 (hw
->bus
.width
== ixgbe_bus_width_pcie_x4
) ? "Width x4" :
5627 (hw
->bus
.width
== ixgbe_bus_width_pcie_x1
) ? "Width x1" :
5630 ixgbe_read_pba_num_generic(hw
, &part_num
);
5631 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
5632 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
5633 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
5634 (part_num
>> 8), (part_num
& 0xff));
5636 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5637 hw
->mac
.type
, hw
->phy
.type
,
5638 (part_num
>> 8), (part_num
& 0xff));
5640 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
5641 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
5642 "this card is not sufficient for optimal "
5644 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
5645 "PCI-Express slot is required.\n");
5648 /* save off EEPROM version number */
5649 hw
->eeprom
.ops
.read(hw
, 0x29, &adapter
->eeprom_version
);
5651 /* reset the hardware with the new settings */
5652 err
= hw
->mac
.ops
.start_hw(hw
);
5654 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
5655 /* We are running on a pre-production device, log a warning */
5656 dev_warn(&pdev
->dev
, "This device is a pre-production "
5657 "adapter/LOM. Please be aware there may be issues "
5658 "associated with your hardware. If you are "
5659 "experiencing problems please contact your Intel or "
5660 "hardware representative who provided you with this "
5663 strcpy(netdev
->name
, "eth%d");
5664 err
= register_netdev(netdev
);
5668 /* carrier off reporting is important to ethtool even BEFORE open */
5669 netif_carrier_off(netdev
);
5671 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
5672 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
5673 INIT_WORK(&adapter
->fdir_reinit_task
, ixgbe_fdir_reinit_task
);
5675 #ifdef CONFIG_IXGBE_DCA
5676 if (dca_add_requester(&pdev
->dev
) == 0) {
5677 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
5678 ixgbe_setup_dca(adapter
);
5681 /* add san mac addr to netdev */
5682 ixgbe_add_sanmac_netdev(netdev
);
5684 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
5689 ixgbe_release_hw_control(adapter
);
5690 ixgbe_clear_interrupt_scheme(adapter
);
5693 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
5694 del_timer_sync(&adapter
->sfp_timer
);
5695 cancel_work_sync(&adapter
->sfp_task
);
5696 cancel_work_sync(&adapter
->multispeed_fiber_task
);
5697 cancel_work_sync(&adapter
->sfp_config_module_task
);
5698 iounmap(hw
->hw_addr
);
5700 free_netdev(netdev
);
5702 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
5706 pci_disable_device(pdev
);
5711 * ixgbe_remove - Device Removal Routine
5712 * @pdev: PCI device information struct
5714 * ixgbe_remove is called by the PCI subsystem to alert the driver
5715 * that it should release a PCI device. The could be caused by a
5716 * Hot-Plug event, or because the driver is going to be removed from
5719 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
5721 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5722 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5725 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5726 /* clear the module not found bit to make sure the worker won't
5729 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
5730 del_timer_sync(&adapter
->watchdog_timer
);
5732 del_timer_sync(&adapter
->sfp_timer
);
5733 cancel_work_sync(&adapter
->watchdog_task
);
5734 cancel_work_sync(&adapter
->sfp_task
);
5735 cancel_work_sync(&adapter
->multispeed_fiber_task
);
5736 cancel_work_sync(&adapter
->sfp_config_module_task
);
5737 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
5738 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
5739 cancel_work_sync(&adapter
->fdir_reinit_task
);
5740 flush_scheduled_work();
5742 #ifdef CONFIG_IXGBE_DCA
5743 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
5744 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
5745 dca_remove_requester(&pdev
->dev
);
5746 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
5751 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
5752 ixgbe_cleanup_fcoe(adapter
);
5754 #endif /* IXGBE_FCOE */
5756 /* remove the added san mac */
5757 ixgbe_del_sanmac_netdev(netdev
);
5759 if (netdev
->reg_state
== NETREG_REGISTERED
)
5760 unregister_netdev(netdev
);
5762 ixgbe_clear_interrupt_scheme(adapter
);
5764 ixgbe_release_hw_control(adapter
);
5766 iounmap(adapter
->hw
.hw_addr
);
5767 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
5770 DPRINTK(PROBE
, INFO
, "complete\n");
5772 free_netdev(netdev
);
5774 err
= pci_disable_pcie_error_reporting(pdev
);
5777 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
5779 pci_disable_device(pdev
);
5783 * ixgbe_io_error_detected - called when PCI error is detected
5784 * @pdev: Pointer to PCI device
5785 * @state: The current pci connection state
5787 * This function is called after a PCI bus error affecting
5788 * this device has been detected.
5790 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
5791 pci_channel_state_t state
)
5793 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5794 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5796 netif_device_detach(netdev
);
5798 if (state
== pci_channel_io_perm_failure
)
5799 return PCI_ERS_RESULT_DISCONNECT
;
5801 if (netif_running(netdev
))
5802 ixgbe_down(adapter
);
5803 pci_disable_device(pdev
);
5805 /* Request a slot reset. */
5806 return PCI_ERS_RESULT_NEED_RESET
;
5810 * ixgbe_io_slot_reset - called after the pci bus has been reset.
5811 * @pdev: Pointer to PCI device
5813 * Restart the card from scratch, as if from a cold-boot.
5815 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
5817 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5818 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5819 pci_ers_result_t result
;
5822 if (pci_enable_device_mem(pdev
)) {
5824 "Cannot re-enable PCI device after reset.\n");
5825 result
= PCI_ERS_RESULT_DISCONNECT
;
5827 pci_set_master(pdev
);
5828 pci_restore_state(pdev
);
5830 pci_wake_from_d3(pdev
, false);
5832 ixgbe_reset(adapter
);
5833 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5834 result
= PCI_ERS_RESULT_RECOVERED
;
5837 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
5840 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err
);
5841 /* non-fatal, continue */
5848 * ixgbe_io_resume - called when traffic can start flowing again.
5849 * @pdev: Pointer to PCI device
5851 * This callback is called when the error recovery driver tells us that
5852 * its OK to resume normal operation.
5854 static void ixgbe_io_resume(struct pci_dev
*pdev
)
5856 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5857 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5859 if (netif_running(netdev
)) {
5860 if (ixgbe_up(adapter
)) {
5861 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
5866 netif_device_attach(netdev
);
5869 static struct pci_error_handlers ixgbe_err_handler
= {
5870 .error_detected
= ixgbe_io_error_detected
,
5871 .slot_reset
= ixgbe_io_slot_reset
,
5872 .resume
= ixgbe_io_resume
,
5875 static struct pci_driver ixgbe_driver
= {
5876 .name
= ixgbe_driver_name
,
5877 .id_table
= ixgbe_pci_tbl
,
5878 .probe
= ixgbe_probe
,
5879 .remove
= __devexit_p(ixgbe_remove
),
5881 .suspend
= ixgbe_suspend
,
5882 .resume
= ixgbe_resume
,
5884 .shutdown
= ixgbe_shutdown
,
5885 .err_handler
= &ixgbe_err_handler
5889 * ixgbe_init_module - Driver Registration Routine
5891 * ixgbe_init_module is the first routine called when the driver is
5892 * loaded. All it does is register with the PCI subsystem.
5894 static int __init
ixgbe_init_module(void)
5897 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
5898 ixgbe_driver_string
, ixgbe_driver_version
);
5900 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
5902 #ifdef CONFIG_IXGBE_DCA
5903 dca_register_notify(&dca_notifier
);
5906 ret
= pci_register_driver(&ixgbe_driver
);
5910 module_init(ixgbe_init_module
);
5913 * ixgbe_exit_module - Driver Exit Cleanup Routine
5915 * ixgbe_exit_module is called just before the driver is removed
5918 static void __exit
ixgbe_exit_module(void)
5920 #ifdef CONFIG_IXGBE_DCA
5921 dca_unregister_notify(&dca_notifier
);
5923 pci_unregister_driver(&ixgbe_driver
);
5926 #ifdef CONFIG_IXGBE_DCA
5927 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5932 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
5933 __ixgbe_notify_dca
);
5935 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5938 #endif /* CONFIG_IXGBE_DCA */
5941 * ixgbe_get_hw_dev_name - return device name string
5942 * used by hardware layer to print debugging information
5944 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
5946 struct ixgbe_adapter
*adapter
= hw
->back
;
5947 return adapter
->netdev
->name
;
5951 module_exit(ixgbe_exit_module
);