1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name
[] = "ixgbe";
47 static const char ixgbe_driver_string
[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "1.3.30-k2"
51 const char ixgbe_driver_version
[] = DRV_VERSION
;
52 static char ixgbe_copyright
[] = "Copyright (c) 1999-2007 Intel Corporation.";
54 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
55 [board_82598
] = &ixgbe_82598_info
,
58 /* ixgbe_pci_tbl - PCI Device ID Table
60 * Wildcard entries (PCI_ANY_ID) should come last
61 * Last entry must be all 0s
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
66 static struct pci_device_id ixgbe_pci_tbl
[] = {
67 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
69 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
80 /* required last entry */
83 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
85 #ifdef CONFIG_IXGBE_DCA
86 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
88 static struct notifier_block dca_notifier
= {
89 .notifier_call
= ixgbe_notify_dca
,
95 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
96 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION
);
100 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
102 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
106 /* Let firmware take over control of h/w */
107 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
108 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
109 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
112 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
116 /* Let firmware know the driver has taken over */
117 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
118 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
119 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
122 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, u16 int_alloc_entry
,
127 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
128 index
= (int_alloc_entry
>> 2) & 0x1F;
129 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR(index
));
130 ivar
&= ~(0xFF << (8 * (int_alloc_entry
& 0x3)));
131 ivar
|= (msix_vector
<< (8 * (int_alloc_entry
& 0x3)));
132 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR(index
), ivar
);
135 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
136 struct ixgbe_tx_buffer
139 if (tx_buffer_info
->dma
) {
140 pci_unmap_page(adapter
->pdev
, tx_buffer_info
->dma
,
141 tx_buffer_info
->length
, PCI_DMA_TODEVICE
);
142 tx_buffer_info
->dma
= 0;
144 if (tx_buffer_info
->skb
) {
145 dev_kfree_skb_any(tx_buffer_info
->skb
);
146 tx_buffer_info
->skb
= NULL
;
148 /* tx_buffer_info must be completely set up in the transmit path */
151 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
152 struct ixgbe_ring
*tx_ring
,
155 struct ixgbe_hw
*hw
= &adapter
->hw
;
158 /* Detect a transmit hang in hardware, this serializes the
159 * check with the clearing of time_stamp and movement of eop */
160 head
= IXGBE_READ_REG(hw
, tx_ring
->head
);
161 tail
= IXGBE_READ_REG(hw
, tx_ring
->tail
);
162 adapter
->detect_tx_hung
= false;
163 if ((head
!= tail
) &&
164 tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
165 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
166 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
167 /* detected Tx unit hang */
168 union ixgbe_adv_tx_desc
*tx_desc
;
169 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
170 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
172 " TDH, TDT <%x>, <%x>\n"
173 " next_to_use <%x>\n"
174 " next_to_clean <%x>\n"
175 "tx_buffer_info[next_to_clean]\n"
176 " time_stamp <%lx>\n"
178 tx_ring
->queue_index
,
180 tx_ring
->next_to_use
, eop
,
181 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
188 #define IXGBE_MAX_TXD_PWR 14
189 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
191 /* Tx Descriptors needed, worst case */
192 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
193 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
194 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
195 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
197 #define GET_TX_HEAD_FROM_RING(ring) (\
199 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
200 static void ixgbe_tx_timeout(struct net_device
*netdev
);
203 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
204 * @adapter: board private structure
205 * @tx_ring: tx ring to clean
207 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
208 struct ixgbe_ring
*tx_ring
)
210 union ixgbe_adv_tx_desc
*tx_desc
;
211 struct ixgbe_tx_buffer
*tx_buffer_info
;
212 struct net_device
*netdev
= adapter
->netdev
;
216 unsigned int count
= 0;
217 unsigned int total_bytes
= 0, total_packets
= 0;
220 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
221 head
= le32_to_cpu(head
);
222 i
= tx_ring
->next_to_clean
;
225 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
226 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
227 skb
= tx_buffer_info
->skb
;
230 unsigned int segs
, bytecount
;
232 /* gso_segs is currently only valid for tcp */
233 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
234 /* multiply data chunks by size of headers */
235 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
237 total_packets
+= segs
;
238 total_bytes
+= bytecount
;
241 ixgbe_unmap_and_free_tx_resource(adapter
,
245 if (i
== tx_ring
->count
)
249 if (count
== tx_ring
->count
)
254 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
255 head
= le32_to_cpu(head
);
261 tx_ring
->next_to_clean
= i
;
263 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
264 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
265 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
266 /* Make sure that anybody stopping the queue after this
267 * sees the new next_to_clean.
270 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
271 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
272 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
273 ++adapter
->restart_queue
;
277 if (adapter
->detect_tx_hung
) {
278 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
279 /* schedule immediate reset if we believe we hung */
281 "tx hang %d detected, resetting adapter\n",
282 adapter
->tx_timeout_count
+ 1);
283 ixgbe_tx_timeout(adapter
->netdev
);
287 /* re-arm the interrupt */
288 if ((total_packets
>= tx_ring
->work_limit
) ||
289 (count
== tx_ring
->count
))
290 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->v_idx
);
292 tx_ring
->total_bytes
+= total_bytes
;
293 tx_ring
->total_packets
+= total_packets
;
294 tx_ring
->stats
.bytes
+= total_bytes
;
295 tx_ring
->stats
.packets
+= total_packets
;
296 adapter
->net_stats
.tx_bytes
+= total_bytes
;
297 adapter
->net_stats
.tx_packets
+= total_packets
;
298 return (total_packets
? true : false);
301 #ifdef CONFIG_IXGBE_DCA
302 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
303 struct ixgbe_ring
*rx_ring
)
307 int q
= rx_ring
- adapter
->rx_ring
;
309 if (rx_ring
->cpu
!= cpu
) {
310 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
311 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
312 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
313 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
314 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
315 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
321 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
322 struct ixgbe_ring
*tx_ring
)
326 int q
= tx_ring
- adapter
->tx_ring
;
328 if (tx_ring
->cpu
!= cpu
) {
329 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
330 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
331 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
332 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
333 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
339 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
343 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
346 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
347 adapter
->tx_ring
[i
].cpu
= -1;
348 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
350 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
351 adapter
->rx_ring
[i
].cpu
= -1;
352 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
356 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
358 struct net_device
*netdev
= dev_get_drvdata(dev
);
359 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
360 unsigned long event
= *(unsigned long *)data
;
363 case DCA_PROVIDER_ADD
:
364 /* if we're already enabled, don't do it again */
365 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
367 /* Always use CB2 mode, difference is masked
368 * in the CB driver. */
369 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
370 if (dca_add_requester(dev
) == 0) {
371 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
372 ixgbe_setup_dca(adapter
);
375 /* Fall Through since DCA is disabled. */
376 case DCA_PROVIDER_REMOVE
:
377 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
378 dca_remove_requester(dev
);
379 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
380 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
388 #endif /* CONFIG_IXGBE_DCA */
390 * ixgbe_receive_skb - Send a completed packet up the stack
391 * @adapter: board private structure
392 * @skb: packet to send up
393 * @status: hardware indication of status of receive
394 * @rx_ring: rx descriptor ring (for a specific queue) to setup
395 * @rx_desc: rx descriptor
397 static void ixgbe_receive_skb(struct ixgbe_adapter
*adapter
,
398 struct sk_buff
*skb
, u8 status
,
399 struct ixgbe_ring
*ring
,
400 union ixgbe_adv_rx_desc
*rx_desc
)
402 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
403 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
405 if (adapter
->netdev
->features
& NETIF_F_LRO
&&
406 skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
407 if (adapter
->vlgrp
&& is_vlan
)
408 lro_vlan_hwaccel_receive_skb(&ring
->lro_mgr
, skb
,
412 lro_receive_skb(&ring
->lro_mgr
, skb
, rx_desc
);
413 ring
->lro_used
= true;
415 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
416 if (adapter
->vlgrp
&& is_vlan
)
417 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
419 netif_receive_skb(skb
);
421 if (adapter
->vlgrp
&& is_vlan
)
422 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
430 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
431 * @adapter: address of board private structure
432 * @status_err: hardware indication of status of receive
433 * @skb: skb currently being received and modified
435 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
436 u32 status_err
, struct sk_buff
*skb
)
438 skb
->ip_summed
= CHECKSUM_NONE
;
440 /* Rx csum disabled */
441 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
444 /* if IP and error */
445 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
446 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
447 adapter
->hw_csum_rx_error
++;
451 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
454 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
455 adapter
->hw_csum_rx_error
++;
459 /* It must be a TCP or UDP packet with a valid checksum */
460 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
461 adapter
->hw_csum_rx_good
++;
465 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
466 * @adapter: address of board private structure
468 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
469 struct ixgbe_ring
*rx_ring
,
472 struct pci_dev
*pdev
= adapter
->pdev
;
473 union ixgbe_adv_rx_desc
*rx_desc
;
474 struct ixgbe_rx_buffer
*bi
;
476 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
478 i
= rx_ring
->next_to_use
;
479 bi
= &rx_ring
->rx_buffer_info
[i
];
481 while (cleaned_count
--) {
482 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
485 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
487 bi
->page
= alloc_page(GFP_ATOMIC
);
489 adapter
->alloc_rx_page_failed
++;
494 /* use a half page if we're re-using */
495 bi
->page_offset
^= (PAGE_SIZE
/ 2);
498 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
505 struct sk_buff
*skb
= netdev_alloc_skb(adapter
->netdev
,
509 adapter
->alloc_rx_buff_failed
++;
514 * Make buffer alignment 2 beyond a 16 byte boundary
515 * this will result in a 16 byte aligned IP header after
516 * the 14 byte MAC header is removed
518 skb_reserve(skb
, NET_IP_ALIGN
);
521 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
524 /* Refresh the desc even if buffer_addrs didn't change because
525 * each write-back erases this info. */
526 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
527 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
528 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
530 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
534 if (i
== rx_ring
->count
)
536 bi
= &rx_ring
->rx_buffer_info
[i
];
540 if (rx_ring
->next_to_use
!= i
) {
541 rx_ring
->next_to_use
= i
;
543 i
= (rx_ring
->count
- 1);
546 * Force memory writes to complete before letting h/w
547 * know there are new descriptors to fetch. (Only
548 * applicable for weak-ordered memory model archs,
552 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
556 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
558 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
561 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
563 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
566 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter
*adapter
,
567 struct ixgbe_ring
*rx_ring
,
568 int *work_done
, int work_to_do
)
570 struct pci_dev
*pdev
= adapter
->pdev
;
571 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
572 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
577 bool cleaned
= false;
578 int cleaned_count
= 0;
579 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
581 i
= rx_ring
->next_to_clean
;
582 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
583 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
584 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
586 while (staterr
& IXGBE_RXD_STAT_DD
) {
588 if (*work_done
>= work_to_do
)
592 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
593 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
594 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
595 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
596 if (hdr_info
& IXGBE_RXDADV_SPH
)
597 adapter
->rx_hdr_split
++;
598 if (len
> IXGBE_RX_HDR_SIZE
)
599 len
= IXGBE_RX_HDR_SIZE
;
600 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
602 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
606 skb
= rx_buffer_info
->skb
;
607 prefetch(skb
->data
- NET_IP_ALIGN
);
608 rx_buffer_info
->skb
= NULL
;
610 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
611 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
612 rx_ring
->rx_buf_len
+ NET_IP_ALIGN
,
618 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
619 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
620 rx_buffer_info
->page_dma
= 0;
621 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
622 rx_buffer_info
->page
,
623 rx_buffer_info
->page_offset
,
626 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
627 (page_count(rx_buffer_info
->page
) != 1))
628 rx_buffer_info
->page
= NULL
;
630 get_page(rx_buffer_info
->page
);
632 skb
->len
+= upper_len
;
633 skb
->data_len
+= upper_len
;
634 skb
->truesize
+= upper_len
;
638 if (i
== rx_ring
->count
)
640 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
642 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
646 if (staterr
& IXGBE_RXD_STAT_EOP
) {
647 rx_ring
->stats
.packets
++;
648 rx_ring
->stats
.bytes
+= skb
->len
;
650 rx_buffer_info
->skb
= next_buffer
->skb
;
651 rx_buffer_info
->dma
= next_buffer
->dma
;
652 next_buffer
->skb
= skb
;
653 next_buffer
->dma
= 0;
654 adapter
->non_eop_descs
++;
658 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
659 dev_kfree_skb_irq(skb
);
663 ixgbe_rx_checksum(adapter
, staterr
, skb
);
665 /* probably a little skewed due to removing CRC */
666 total_rx_bytes
+= skb
->len
;
669 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
670 ixgbe_receive_skb(adapter
, skb
, staterr
, rx_ring
, rx_desc
);
673 rx_desc
->wb
.upper
.status_error
= 0;
675 /* return some buffers to hardware, one at a time is too slow */
676 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
677 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
681 /* use prefetched values */
683 rx_buffer_info
= next_buffer
;
685 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
688 if (rx_ring
->lro_used
) {
689 lro_flush_all(&rx_ring
->lro_mgr
);
690 rx_ring
->lro_used
= false;
693 rx_ring
->next_to_clean
= i
;
694 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
697 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
699 rx_ring
->total_packets
+= total_rx_packets
;
700 rx_ring
->total_bytes
+= total_rx_bytes
;
701 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
702 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
707 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
709 * ixgbe_configure_msix - Configure MSI-X hardware
710 * @adapter: board private structure
712 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
715 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
717 struct ixgbe_q_vector
*q_vector
;
718 int i
, j
, q_vectors
, v_idx
, r_idx
;
721 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
723 /* Populate the IVAR table and set the ITR values to the
724 * corresponding register.
726 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
727 q_vector
= &adapter
->q_vector
[v_idx
];
728 /* XXX for_each_bit(...) */
729 r_idx
= find_first_bit(q_vector
->rxr_idx
,
730 adapter
->num_rx_queues
);
732 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
733 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
734 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(j
), v_idx
);
735 r_idx
= find_next_bit(q_vector
->rxr_idx
,
736 adapter
->num_rx_queues
,
739 r_idx
= find_first_bit(q_vector
->txr_idx
,
740 adapter
->num_tx_queues
);
742 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
743 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
744 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(j
), v_idx
);
745 r_idx
= find_next_bit(q_vector
->txr_idx
,
746 adapter
->num_tx_queues
,
750 /* if this is a tx only vector halve the interrupt rate */
751 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
752 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
755 q_vector
->eitr
= adapter
->eitr_param
;
757 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
758 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
761 ixgbe_set_ivar(adapter
, IXGBE_IVAR_OTHER_CAUSES_INDEX
, v_idx
);
762 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
764 /* set up to autoclear timer, and the vectors */
765 mask
= IXGBE_EIMS_ENABLE_MASK
;
766 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
767 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
774 latency_invalid
= 255
778 * ixgbe_update_itr - update the dynamic ITR value based on statistics
779 * @adapter: pointer to adapter
780 * @eitr: eitr setting (ints per sec) to give last timeslice
781 * @itr_setting: current throttle rate in ints/second
782 * @packets: the number of packets during this measurement interval
783 * @bytes: the number of bytes during this measurement interval
785 * Stores a new ITR value based on packets and byte
786 * counts during the last interrupt. The advantage of per interrupt
787 * computation is faster updates and more accurate ITR for the current
788 * traffic pattern. Constants in this function were computed
789 * based on theoretical maximum wire speed and thresholds were set based
790 * on testing data as well as attempting to minimize response time
791 * while increasing bulk throughput.
792 * this functionality is controlled by the InterruptThrottleRate module
793 * parameter (see ixgbe_param.c)
795 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
796 u32 eitr
, u8 itr_setting
,
797 int packets
, int bytes
)
799 unsigned int retval
= itr_setting
;
804 goto update_itr_done
;
807 /* simple throttlerate management
808 * 0-20MB/s lowest (100000 ints/s)
809 * 20-100MB/s low (20000 ints/s)
810 * 100-1249MB/s bulk (8000 ints/s)
812 /* what was last interrupt timeslice? */
813 timepassed_us
= 1000000/eitr
;
814 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
816 switch (itr_setting
) {
818 if (bytes_perint
> adapter
->eitr_low
)
819 retval
= low_latency
;
822 if (bytes_perint
> adapter
->eitr_high
)
823 retval
= bulk_latency
;
824 else if (bytes_perint
<= adapter
->eitr_low
)
825 retval
= lowest_latency
;
828 if (bytes_perint
<= adapter
->eitr_high
)
829 retval
= low_latency
;
837 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
839 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
840 struct ixgbe_hw
*hw
= &adapter
->hw
;
842 u8 current_itr
, ret_itr
;
843 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
844 sizeof(struct ixgbe_q_vector
);
845 struct ixgbe_ring
*rx_ring
, *tx_ring
;
847 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
848 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
849 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
850 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
852 tx_ring
->total_packets
,
853 tx_ring
->total_bytes
);
854 /* if the result for this queue would decrease interrupt
855 * rate for this vector then use that result */
856 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
857 q_vector
->tx_itr
- 1 : ret_itr
);
858 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
862 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
863 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
864 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
865 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
867 rx_ring
->total_packets
,
868 rx_ring
->total_bytes
);
869 /* if the result for this queue would decrease interrupt
870 * rate for this vector then use that result */
871 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
872 q_vector
->rx_itr
- 1 : ret_itr
);
873 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
877 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
879 switch (current_itr
) {
880 /* counts and packets in update_itr are dependent on these numbers */
885 new_itr
= 20000; /* aka hwitr = ~200 */
893 if (new_itr
!= q_vector
->eitr
) {
895 /* do an exponential smoothing */
896 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
897 q_vector
->eitr
= new_itr
;
898 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
899 /* must write high and low 16 bits to reset counter */
900 DPRINTK(TX_ERR
, DEBUG
, "writing eitr(%d): %08X\n", v_idx
,
902 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
| (itr_reg
)<<16);
908 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
910 struct ixgbe_hw
*hw
= &adapter
->hw
;
912 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
913 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
914 DPRINTK(PROBE
, CRIT
, "Fan has stopped, replace the adapter\n");
915 /* write to clear the interrupt */
916 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
920 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
922 struct ixgbe_hw
*hw
= &adapter
->hw
;
925 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
926 adapter
->link_check_timeout
= jiffies
;
927 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
928 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
929 schedule_work(&adapter
->watchdog_task
);
933 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
935 struct net_device
*netdev
= data
;
936 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
937 struct ixgbe_hw
*hw
= &adapter
->hw
;
938 u32 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
940 if (eicr
& IXGBE_EICR_LSC
)
941 ixgbe_check_lsc(adapter
);
943 ixgbe_check_fan_failure(adapter
, eicr
);
945 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
946 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
951 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
953 struct ixgbe_q_vector
*q_vector
= data
;
954 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
955 struct ixgbe_ring
*tx_ring
;
958 if (!q_vector
->txr_count
)
961 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
962 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
963 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
964 #ifdef CONFIG_IXGBE_DCA
965 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
966 ixgbe_update_tx_dca(adapter
, tx_ring
);
968 tx_ring
->total_bytes
= 0;
969 tx_ring
->total_packets
= 0;
970 ixgbe_clean_tx_irq(adapter
, tx_ring
);
971 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
979 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
981 * @data: pointer to our q_vector struct for this interrupt vector
983 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
985 struct ixgbe_q_vector
*q_vector
= data
;
986 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
987 struct ixgbe_ring
*rx_ring
;
991 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
992 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
993 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
994 rx_ring
->total_bytes
= 0;
995 rx_ring
->total_packets
= 0;
996 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1000 if (!q_vector
->rxr_count
)
1003 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1004 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1005 /* disable interrupts on this vector only */
1006 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
1007 netif_rx_schedule(adapter
->netdev
, &q_vector
->napi
);
1012 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1014 ixgbe_msix_clean_rx(irq
, data
);
1015 ixgbe_msix_clean_tx(irq
, data
);
1021 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1022 * @napi: napi struct with our devices info in it
1023 * @budget: amount of work driver is allowed to do this pass, in packets
1025 * This function is optimized for cleaning one queue only on a single
1028 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1030 struct ixgbe_q_vector
*q_vector
=
1031 container_of(napi
, struct ixgbe_q_vector
, napi
);
1032 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1033 struct ixgbe_ring
*rx_ring
= NULL
;
1037 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1038 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1039 #ifdef CONFIG_IXGBE_DCA
1040 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1041 ixgbe_update_rx_dca(adapter
, rx_ring
);
1044 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1046 /* If all Rx work done, exit the polling mode */
1047 if (work_done
< budget
) {
1048 netif_rx_complete(adapter
->netdev
, napi
);
1049 if (adapter
->itr_setting
& 3)
1050 ixgbe_set_itr_msix(q_vector
);
1051 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1052 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
1059 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1060 * @napi: napi struct with our devices info in it
1061 * @budget: amount of work driver is allowed to do this pass, in packets
1063 * This function will clean more than one rx queue associated with a
1066 static int ixgbe_clean_rxonly_many(struct napi_struct
*napi
, int budget
)
1068 struct ixgbe_q_vector
*q_vector
=
1069 container_of(napi
, struct ixgbe_q_vector
, napi
);
1070 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1071 struct ixgbe_ring
*rx_ring
= NULL
;
1072 int work_done
= 0, i
;
1074 u16 enable_mask
= 0;
1076 /* attempt to distribute budget to each queue fairly, but don't allow
1077 * the budget to go below 1 because we'll exit polling */
1078 budget
/= (q_vector
->rxr_count
?: 1);
1079 budget
= max(budget
, 1);
1080 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1081 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1082 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1083 #ifdef CONFIG_IXGBE_DCA
1084 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1085 ixgbe_update_rx_dca(adapter
, rx_ring
);
1087 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1088 enable_mask
|= rx_ring
->v_idx
;
1089 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1093 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1094 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1095 /* If all Rx work done, exit the polling mode */
1096 if (work_done
< budget
) {
1097 netif_rx_complete(adapter
->netdev
, napi
);
1098 if (adapter
->itr_setting
& 3)
1099 ixgbe_set_itr_msix(q_vector
);
1100 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1101 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, enable_mask
);
1107 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1110 a
->q_vector
[v_idx
].adapter
= a
;
1111 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
1112 a
->q_vector
[v_idx
].rxr_count
++;
1113 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1116 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1119 a
->q_vector
[v_idx
].adapter
= a
;
1120 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1121 a
->q_vector
[v_idx
].txr_count
++;
1122 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1126 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1127 * @adapter: board private structure to initialize
1128 * @vectors: allotted vector count for descriptor rings
1130 * This function maps descriptor rings to the queue-specific vectors
1131 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1132 * one vector per ring/queue, but on a constrained vector budget, we
1133 * group the rings as "efficiently" as possible. You would add new
1134 * mapping configurations in here.
1136 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1140 int rxr_idx
= 0, txr_idx
= 0;
1141 int rxr_remaining
= adapter
->num_rx_queues
;
1142 int txr_remaining
= adapter
->num_tx_queues
;
1147 /* No mapping required if MSI-X is disabled. */
1148 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1152 * The ideal configuration...
1153 * We have enough vectors to map one per queue.
1155 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1156 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1157 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1159 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1160 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1166 * If we don't have enough vectors for a 1-to-1
1167 * mapping, we'll have to group them so there are
1168 * multiple queues per vector.
1170 /* Re-adjusting *qpv takes care of the remainder. */
1171 for (i
= v_start
; i
< vectors
; i
++) {
1172 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1173 for (j
= 0; j
< rqpv
; j
++) {
1174 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1179 for (i
= v_start
; i
< vectors
; i
++) {
1180 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1181 for (j
= 0; j
< tqpv
; j
++) {
1182 map_vector_to_txq(adapter
, i
, txr_idx
);
1193 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1194 * @adapter: board private structure
1196 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1197 * interrupts from the kernel.
1199 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1201 struct net_device
*netdev
= adapter
->netdev
;
1202 irqreturn_t (*handler
)(int, void *);
1203 int i
, vector
, q_vectors
, err
;
1205 /* Decrement for Other and TCP Timer vectors */
1206 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1208 /* Map the Tx/Rx rings to the vectors we were allotted. */
1209 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1213 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1214 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1215 &ixgbe_msix_clean_many)
1216 for (vector
= 0; vector
< q_vectors
; vector
++) {
1217 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1218 sprintf(adapter
->name
[vector
], "%s:v%d-%s",
1219 netdev
->name
, vector
,
1220 (handler
== &ixgbe_msix_clean_rx
) ? "Rx" :
1221 ((handler
== &ixgbe_msix_clean_tx
) ? "Tx" : "TxRx"));
1222 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1223 handler
, 0, adapter
->name
[vector
],
1224 &(adapter
->q_vector
[vector
]));
1227 "request_irq failed for MSIX interrupt "
1228 "Error: %d\n", err
);
1229 goto free_queue_irqs
;
1233 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1234 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1235 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1238 "request_irq for msix_lsc failed: %d\n", err
);
1239 goto free_queue_irqs
;
1245 for (i
= vector
- 1; i
>= 0; i
--)
1246 free_irq(adapter
->msix_entries
[--vector
].vector
,
1247 &(adapter
->q_vector
[i
]));
1248 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1249 pci_disable_msix(adapter
->pdev
);
1250 kfree(adapter
->msix_entries
);
1251 adapter
->msix_entries
= NULL
;
1256 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1258 struct ixgbe_hw
*hw
= &adapter
->hw
;
1259 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1261 u32 new_itr
= q_vector
->eitr
;
1262 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1263 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1265 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1267 tx_ring
->total_packets
,
1268 tx_ring
->total_bytes
);
1269 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1271 rx_ring
->total_packets
,
1272 rx_ring
->total_bytes
);
1274 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1276 switch (current_itr
) {
1277 /* counts and packets in update_itr are dependent on these numbers */
1278 case lowest_latency
:
1282 new_itr
= 20000; /* aka hwitr = ~200 */
1291 if (new_itr
!= q_vector
->eitr
) {
1293 /* do an exponential smoothing */
1294 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1295 q_vector
->eitr
= new_itr
;
1296 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1297 /* must write high and low 16 bits to reset counter */
1298 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0), itr_reg
| (itr_reg
)<<16);
1305 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1306 * @adapter: board private structure
1308 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1310 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1311 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1312 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1314 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1315 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1317 synchronize_irq(adapter
->pdev
->irq
);
1322 * ixgbe_irq_enable - Enable default interrupt generation settings
1323 * @adapter: board private structure
1325 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1328 mask
= IXGBE_EIMS_ENABLE_MASK
;
1329 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
1330 mask
|= IXGBE_EIMS_GPI_SDP1
;
1331 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1332 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1336 * ixgbe_intr - legacy mode Interrupt Handler
1337 * @irq: interrupt number
1338 * @data: pointer to a network interface device structure
1339 * @pt_regs: CPU registers structure
1341 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1343 struct net_device
*netdev
= data
;
1344 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1345 struct ixgbe_hw
*hw
= &adapter
->hw
;
1348 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1349 * therefore no explict interrupt disable is necessary */
1350 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1352 /* shared interrupt alert!
1353 * make sure interrupts are enabled because the read will
1354 * have disabled interrupts due to EIAM */
1355 ixgbe_irq_enable(adapter
);
1356 return IRQ_NONE
; /* Not our interrupt */
1359 if (eicr
& IXGBE_EICR_LSC
)
1360 ixgbe_check_lsc(adapter
);
1362 ixgbe_check_fan_failure(adapter
, eicr
);
1364 if (netif_rx_schedule_prep(netdev
, &adapter
->q_vector
[0].napi
)) {
1365 adapter
->tx_ring
[0].total_packets
= 0;
1366 adapter
->tx_ring
[0].total_bytes
= 0;
1367 adapter
->rx_ring
[0].total_packets
= 0;
1368 adapter
->rx_ring
[0].total_bytes
= 0;
1369 /* would disable interrupts here but EIAM disabled it */
1370 __netif_rx_schedule(netdev
, &adapter
->q_vector
[0].napi
);
1376 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1378 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1380 for (i
= 0; i
< q_vectors
; i
++) {
1381 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1382 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1383 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1384 q_vector
->rxr_count
= 0;
1385 q_vector
->txr_count
= 0;
1390 * ixgbe_request_irq - initialize interrupts
1391 * @adapter: board private structure
1393 * Attempts to configure interrupts using the best available
1394 * capabilities of the hardware and kernel.
1396 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1398 struct net_device
*netdev
= adapter
->netdev
;
1401 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1402 err
= ixgbe_request_msix_irqs(adapter
);
1403 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1404 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1405 netdev
->name
, netdev
);
1407 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1408 netdev
->name
, netdev
);
1412 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1417 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1419 struct net_device
*netdev
= adapter
->netdev
;
1421 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1424 q_vectors
= adapter
->num_msix_vectors
;
1427 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1430 for (; i
>= 0; i
--) {
1431 free_irq(adapter
->msix_entries
[i
].vector
,
1432 &(adapter
->q_vector
[i
]));
1435 ixgbe_reset_q_vectors(adapter
);
1437 free_irq(adapter
->pdev
->irq
, netdev
);
1442 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1445 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1447 struct ixgbe_hw
*hw
= &adapter
->hw
;
1449 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1450 EITR_INTS_PER_SEC_TO_REG(adapter
->eitr_param
));
1452 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(0), 0);
1453 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(0), 0);
1455 map_vector_to_rxq(adapter
, 0, 0);
1456 map_vector_to_txq(adapter
, 0, 0);
1458 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1462 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1463 * @adapter: board private structure
1465 * Configure the Tx unit of the MAC after a reset.
1467 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1470 struct ixgbe_hw
*hw
= &adapter
->hw
;
1471 u32 i
, j
, tdlen
, txctrl
;
1473 /* Setup the HW Tx Head and Tail descriptor pointers */
1474 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1475 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1478 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1479 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1480 (tdba
& DMA_32BIT_MASK
));
1481 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1483 (ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
1484 tdwba
|= IXGBE_TDWBAL_HEAD_WB_ENABLE
;
1485 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAL(j
), tdwba
& DMA_32BIT_MASK
);
1486 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAH(j
), (tdwba
>> 32));
1487 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1488 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1489 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1490 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1491 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1492 /* Disable Tx Head Writeback RO bit, since this hoses
1493 * bookkeeping if things aren't delivered in order.
1495 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1496 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1497 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1501 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1503 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1505 struct ixgbe_ring
*rx_ring
;
1510 /* program one srrctl register per VMDq index */
1511 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
) {
1513 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1514 len
= sizeof(adapter
->ring_feature
[RING_F_VMDQ
].mask
) * 8;
1515 shift
= find_first_bit(&mask
, len
);
1516 queue0
= index
& mask
;
1517 index
= (index
& mask
) >> shift
;
1518 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1520 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1521 queue0
= index
& mask
;
1522 index
= index
& mask
;
1525 rx_ring
= &adapter
->rx_ring
[queue0
];
1527 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1529 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1530 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1532 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1533 srrctl
|= IXGBE_RXBUFFER_2048
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1534 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1535 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1536 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1537 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1539 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1541 if (rx_ring
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1542 srrctl
|= IXGBE_RXBUFFER_2048
>>
1543 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1545 srrctl
|= rx_ring
->rx_buf_len
>>
1546 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1548 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1552 * ixgbe_get_skb_hdr - helper function for LRO header processing
1553 * @skb: pointer to sk_buff to be added to LRO packet
1554 * @iphdr: pointer to ip header structure
1555 * @tcph: pointer to tcp header structure
1556 * @hdr_flags: pointer to header flags
1557 * @priv: private data
1559 static int ixgbe_get_skb_hdr(struct sk_buff
*skb
, void **iphdr
, void **tcph
,
1560 u64
*hdr_flags
, void *priv
)
1562 union ixgbe_adv_rx_desc
*rx_desc
= priv
;
1564 /* Verify that this is a valid IPv4 TCP packet */
1565 if (!((ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_IPV4
) &&
1566 (ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_TCP
)))
1569 /* Set network headers */
1570 skb_reset_network_header(skb
);
1571 skb_set_transport_header(skb
, ip_hdrlen(skb
));
1572 *iphdr
= ip_hdr(skb
);
1573 *tcph
= tcp_hdr(skb
);
1574 *hdr_flags
= LRO_IPV4
| LRO_TCP
;
1578 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1579 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1582 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1583 * @adapter: board private structure
1585 * Configure the Rx unit of the MAC after a reset.
1587 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1590 struct ixgbe_hw
*hw
= &adapter
->hw
;
1591 struct net_device
*netdev
= adapter
->netdev
;
1592 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1594 u32 rdlen
, rxctrl
, rxcsum
;
1595 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1596 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1597 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1604 /* Decide whether to use packet split mode or not */
1605 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1607 /* Set the RX buffer length according to the mode */
1608 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1609 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1611 if (netdev
->mtu
<= ETH_DATA_LEN
)
1612 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1614 rx_buf_len
= ALIGN(max_frame
, 1024);
1617 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1618 fctrl
|= IXGBE_FCTRL_BAM
;
1619 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1620 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1622 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1623 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1624 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1626 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1627 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1629 pages
= PAGE_USE_COUNT(adapter
->netdev
->mtu
);
1631 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1632 /* disable receives while setting up the descriptors */
1633 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1634 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1636 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1637 * the Base and Length of the Rx Descriptor Ring */
1638 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1639 rdba
= adapter
->rx_ring
[i
].dma
;
1640 j
= adapter
->rx_ring
[i
].reg_idx
;
1641 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_32BIT_MASK
));
1642 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
1643 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
1644 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
1645 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
1646 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
1647 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
1648 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
1649 /* Intitial LRO Settings */
1650 adapter
->rx_ring
[i
].lro_mgr
.max_aggr
= IXGBE_MAX_LRO_AGGREGATE
;
1651 adapter
->rx_ring
[i
].lro_mgr
.max_desc
= IXGBE_MAX_LRO_DESCRIPTORS
;
1652 adapter
->rx_ring
[i
].lro_mgr
.get_skb_header
= ixgbe_get_skb_hdr
;
1653 adapter
->rx_ring
[i
].lro_mgr
.features
= LRO_F_EXTRACT_VLAN_ID
;
1654 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1655 adapter
->rx_ring
[i
].lro_mgr
.features
|= LRO_F_NAPI
;
1656 adapter
->rx_ring
[i
].lro_mgr
.dev
= adapter
->netdev
;
1657 adapter
->rx_ring
[i
].lro_mgr
.ip_summed
= CHECKSUM_UNNECESSARY
;
1658 adapter
->rx_ring
[i
].lro_mgr
.ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
1660 ixgbe_configure_srrctl(adapter
, j
);
1664 * For VMDq support of different descriptor types or
1665 * buffer sizes through the use of multiple SRRCTL
1666 * registers, RDRXCTL.MVMEN must be set to 1
1668 * also, the manual doesn't mention it clearly but DCA hints
1669 * will only use queue 0's tags unless this bit is set. Side
1670 * effects of setting this bit are only that SRRCTL must be
1671 * fully programmed [0..15]
1673 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1674 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
1675 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1678 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1679 /* Fill out redirection table */
1680 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1681 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1683 /* reta = 4-byte sliding window of
1684 * 0x00..(indices-1)(indices-1)00..etc. */
1685 reta
= (reta
<< 8) | (j
* 0x11);
1687 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1690 /* Fill out hash function seeds */
1691 for (i
= 0; i
< 10; i
++)
1692 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
1694 mrqc
= IXGBE_MRQC_RSSEN
1695 /* Perform hash on these packet types */
1696 | IXGBE_MRQC_RSS_FIELD_IPV4
1697 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1698 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1699 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1700 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1701 | IXGBE_MRQC_RSS_FIELD_IPV6
1702 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1703 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1704 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP
;
1705 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1708 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1710 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1711 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1712 /* Disable indicating checksum in descriptor, enables
1714 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1716 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1717 /* Enable IPv4 payload checksum for UDP fragments
1718 * if PCSD is not set */
1719 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1722 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1725 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1726 struct vlan_group
*grp
)
1728 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1731 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1732 ixgbe_irq_disable(adapter
);
1733 adapter
->vlgrp
= grp
;
1736 /* enable VLAN tag insert/strip */
1737 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1738 ctrl
|= IXGBE_VLNCTRL_VME
;
1739 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1740 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1743 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1744 ixgbe_irq_enable(adapter
);
1747 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1749 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1750 struct ixgbe_hw
*hw
= &adapter
->hw
;
1752 /* add VID to filter table */
1753 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
1756 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1758 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1759 struct ixgbe_hw
*hw
= &adapter
->hw
;
1761 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1762 ixgbe_irq_disable(adapter
);
1764 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1766 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1767 ixgbe_irq_enable(adapter
);
1769 /* remove VID from filter table */
1770 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
1773 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1775 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1777 if (adapter
->vlgrp
) {
1779 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1780 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1782 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1787 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1789 struct dev_mc_list
*mc_ptr
;
1790 u8
*addr
= *mc_addr_ptr
;
1793 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1795 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1797 *mc_addr_ptr
= NULL
;
1803 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1804 * @netdev: network interface device structure
1806 * The set_rx_method entry point is called whenever the unicast/multicast
1807 * address list or the network interface flags are updated. This routine is
1808 * responsible for configuring the hardware for proper unicast, multicast and
1811 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1813 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1814 struct ixgbe_hw
*hw
= &adapter
->hw
;
1816 u8
*addr_list
= NULL
;
1819 /* Check for Promiscuous and All Multicast modes */
1821 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1822 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1824 if (netdev
->flags
& IFF_PROMISC
) {
1825 hw
->addr_ctrl
.user_set_promisc
= 1;
1826 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1827 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
1829 if (netdev
->flags
& IFF_ALLMULTI
) {
1830 fctrl
|= IXGBE_FCTRL_MPE
;
1831 fctrl
&= ~IXGBE_FCTRL_UPE
;
1833 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1835 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
1836 hw
->addr_ctrl
.user_set_promisc
= 0;
1839 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
1840 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
1842 /* reprogram secondary unicast list */
1843 addr_count
= netdev
->uc_count
;
1845 addr_list
= netdev
->uc_list
->dmi_addr
;
1846 hw
->mac
.ops
.update_uc_addr_list(hw
, addr_list
, addr_count
,
1847 ixgbe_addr_list_itr
);
1849 /* reprogram multicast list */
1850 addr_count
= netdev
->mc_count
;
1852 addr_list
= netdev
->mc_list
->dmi_addr
;
1853 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
1854 ixgbe_addr_list_itr
);
1857 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
1860 struct ixgbe_q_vector
*q_vector
;
1861 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1863 /* legacy and MSI only use one vector */
1864 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1867 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1868 struct napi_struct
*napi
;
1869 q_vector
= &adapter
->q_vector
[q_idx
];
1870 if (!q_vector
->rxr_count
)
1872 napi
= &q_vector
->napi
;
1873 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) &&
1874 (q_vector
->rxr_count
> 1))
1875 napi
->poll
= &ixgbe_clean_rxonly_many
;
1881 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
1884 struct ixgbe_q_vector
*q_vector
;
1885 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1887 /* legacy and MSI only use one vector */
1888 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1891 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1892 q_vector
= &adapter
->q_vector
[q_idx
];
1893 if (!q_vector
->rxr_count
)
1895 napi_disable(&q_vector
->napi
);
1899 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
1901 struct net_device
*netdev
= adapter
->netdev
;
1904 ixgbe_set_rx_mode(netdev
);
1906 ixgbe_restore_vlan(adapter
);
1908 ixgbe_configure_tx(adapter
);
1909 ixgbe_configure_rx(adapter
);
1910 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1911 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
1912 (adapter
->rx_ring
[i
].count
- 1));
1915 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
1917 struct net_device
*netdev
= adapter
->netdev
;
1918 struct ixgbe_hw
*hw
= &adapter
->hw
;
1920 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1921 u32 txdctl
, rxdctl
, mhadd
;
1924 ixgbe_get_hw_control(adapter
);
1926 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
1927 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
1928 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1929 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
1930 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
1935 /* XXX: to interrupt immediately for EICS writes, enable this */
1936 /* gpie |= IXGBE_GPIE_EIMEN; */
1937 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
1940 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
1941 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1942 * specifically only auto mask tx and rx interrupts */
1943 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
1946 /* Enable fan failure interrupt if media type is copper */
1947 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
1948 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
1949 gpie
|= IXGBE_SDP1_GPIEN
;
1950 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
1953 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
1954 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
1955 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
1956 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
1958 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
1961 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1962 j
= adapter
->tx_ring
[i
].reg_idx
;
1963 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
1964 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1965 txdctl
|= (8 << 16);
1966 txdctl
|= IXGBE_TXDCTL_ENABLE
;
1967 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
1970 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1971 j
= adapter
->rx_ring
[i
].reg_idx
;
1972 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
1973 /* enable PTHRESH=32 descriptors (half the internal cache)
1974 * and HTHRESH=0 descriptors (to minimize latency on fetch),
1975 * this also removes a pesky rx_no_buffer_count increment */
1977 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
1978 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
1980 /* enable all receives */
1981 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1982 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
1983 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxdctl
);
1985 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
1986 ixgbe_configure_msix(adapter
);
1988 ixgbe_configure_msi_and_legacy(adapter
);
1990 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
1991 ixgbe_napi_enable_all(adapter
);
1993 /* clear any pending interrupts, may auto mask */
1994 IXGBE_READ_REG(hw
, IXGBE_EICR
);
1996 ixgbe_irq_enable(adapter
);
1998 /* enable transmits */
1999 netif_tx_start_all_queues(netdev
);
2001 /* bring the link up in the watchdog, this could race with our first
2002 * link up interrupt but shouldn't be a problem */
2003 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2004 adapter
->link_check_timeout
= jiffies
;
2005 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2009 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2011 WARN_ON(in_interrupt());
2012 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2014 ixgbe_down(adapter
);
2016 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2019 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2021 /* hardware has been reset, we need to reload some things */
2022 ixgbe_configure(adapter
);
2024 return ixgbe_up_complete(adapter
);
2027 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2029 struct ixgbe_hw
*hw
= &adapter
->hw
;
2030 if (hw
->mac
.ops
.init_hw(hw
))
2031 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
2033 /* reprogram the RAR[0] in case user changed it. */
2034 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2039 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2040 * @adapter: board private structure
2041 * @rx_ring: ring to free buffers from
2043 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2044 struct ixgbe_ring
*rx_ring
)
2046 struct pci_dev
*pdev
= adapter
->pdev
;
2050 /* Free all the Rx ring sk_buffs */
2052 for (i
= 0; i
< rx_ring
->count
; i
++) {
2053 struct ixgbe_rx_buffer
*rx_buffer_info
;
2055 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2056 if (rx_buffer_info
->dma
) {
2057 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2058 rx_ring
->rx_buf_len
,
2059 PCI_DMA_FROMDEVICE
);
2060 rx_buffer_info
->dma
= 0;
2062 if (rx_buffer_info
->skb
) {
2063 dev_kfree_skb(rx_buffer_info
->skb
);
2064 rx_buffer_info
->skb
= NULL
;
2066 if (!rx_buffer_info
->page
)
2068 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
/ 2,
2069 PCI_DMA_FROMDEVICE
);
2070 rx_buffer_info
->page_dma
= 0;
2071 put_page(rx_buffer_info
->page
);
2072 rx_buffer_info
->page
= NULL
;
2073 rx_buffer_info
->page_offset
= 0;
2076 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2077 memset(rx_ring
->rx_buffer_info
, 0, size
);
2079 /* Zero out the descriptor ring */
2080 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2082 rx_ring
->next_to_clean
= 0;
2083 rx_ring
->next_to_use
= 0;
2085 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2086 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2090 * ixgbe_clean_tx_ring - Free Tx Buffers
2091 * @adapter: board private structure
2092 * @tx_ring: ring to be cleaned
2094 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2095 struct ixgbe_ring
*tx_ring
)
2097 struct ixgbe_tx_buffer
*tx_buffer_info
;
2101 /* Free all the Tx ring sk_buffs */
2103 for (i
= 0; i
< tx_ring
->count
; i
++) {
2104 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2105 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2108 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2109 memset(tx_ring
->tx_buffer_info
, 0, size
);
2111 /* Zero out the descriptor ring */
2112 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2114 tx_ring
->next_to_use
= 0;
2115 tx_ring
->next_to_clean
= 0;
2117 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2118 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2122 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2123 * @adapter: board private structure
2125 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2129 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2130 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2134 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2135 * @adapter: board private structure
2137 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2141 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2142 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2145 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2147 struct net_device
*netdev
= adapter
->netdev
;
2148 struct ixgbe_hw
*hw
= &adapter
->hw
;
2153 /* signal that we are down to the interrupt handler */
2154 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2156 /* disable receives */
2157 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2158 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2160 netif_tx_disable(netdev
);
2162 IXGBE_WRITE_FLUSH(hw
);
2165 netif_tx_stop_all_queues(netdev
);
2167 ixgbe_irq_disable(adapter
);
2169 ixgbe_napi_disable_all(adapter
);
2171 del_timer_sync(&adapter
->watchdog_timer
);
2172 cancel_work_sync(&adapter
->watchdog_task
);
2174 /* disable transmits in the hardware now that interrupts are off */
2175 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2176 j
= adapter
->tx_ring
[i
].reg_idx
;
2177 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2178 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
2179 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
2182 netif_carrier_off(netdev
);
2184 #ifdef CONFIG_IXGBE_DCA
2185 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2186 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
2187 dca_remove_requester(&adapter
->pdev
->dev
);
2191 if (!pci_channel_offline(adapter
->pdev
))
2192 ixgbe_reset(adapter
);
2193 ixgbe_clean_all_tx_rings(adapter
);
2194 ixgbe_clean_all_rx_rings(adapter
);
2196 #ifdef CONFIG_IXGBE_DCA
2197 /* since we reset the hardware DCA settings were cleared */
2198 if (dca_add_requester(&adapter
->pdev
->dev
) == 0) {
2199 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
2200 /* always use CB2 mode, difference is masked
2201 * in the CB driver */
2202 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
2203 ixgbe_setup_dca(adapter
);
2209 * ixgbe_poll - NAPI Rx polling callback
2210 * @napi: structure for representing this polling device
2211 * @budget: how many packets driver is allowed to clean
2213 * This function is used for legacy and MSI, NAPI mode
2215 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2217 struct ixgbe_q_vector
*q_vector
= container_of(napi
,
2218 struct ixgbe_q_vector
, napi
);
2219 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2220 int tx_cleaned
, work_done
= 0;
2222 #ifdef CONFIG_IXGBE_DCA
2223 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2224 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2225 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2229 tx_cleaned
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2230 ixgbe_clean_rx_irq(adapter
, adapter
->rx_ring
, &work_done
, budget
);
2235 /* If budget not fully consumed, exit the polling mode */
2236 if (work_done
< budget
) {
2237 netif_rx_complete(adapter
->netdev
, napi
);
2238 if (adapter
->itr_setting
& 3)
2239 ixgbe_set_itr(adapter
);
2240 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2241 ixgbe_irq_enable(adapter
);
2247 * ixgbe_tx_timeout - Respond to a Tx Hang
2248 * @netdev: network interface device structure
2250 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2252 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2254 /* Do the reset outside of interrupt context */
2255 schedule_work(&adapter
->reset_task
);
2258 static void ixgbe_reset_task(struct work_struct
*work
)
2260 struct ixgbe_adapter
*adapter
;
2261 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2263 adapter
->tx_timeout_count
++;
2265 ixgbe_reinit_locked(adapter
);
2268 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2270 int nrq
= 1, ntq
= 1;
2271 int feature_mask
= 0, rss_i
, rss_m
;
2273 /* Number of supported queues */
2274 switch (adapter
->hw
.mac
.type
) {
2275 case ixgbe_mac_82598EB
:
2276 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2278 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2280 switch (adapter
->flags
& feature_mask
) {
2281 case (IXGBE_FLAG_RSS_ENABLED
):
2295 adapter
->ring_feature
[RING_F_RSS
].indices
= rss_i
;
2296 adapter
->ring_feature
[RING_F_RSS
].mask
= rss_m
;
2304 adapter
->num_rx_queues
= nrq
;
2305 adapter
->num_tx_queues
= ntq
;
2308 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2311 int err
, vector_threshold
;
2313 /* We'll want at least 3 (vector_threshold):
2316 * 3) Other (Link Status Change, etc.)
2317 * 4) TCP Timer (optional)
2319 vector_threshold
= MIN_MSIX_COUNT
;
2321 /* The more we get, the more we will assign to Tx/Rx Cleanup
2322 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2323 * Right now, we simply care about how many we'll get; we'll
2324 * set them up later while requesting irq's.
2326 while (vectors
>= vector_threshold
) {
2327 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2329 if (!err
) /* Success in acquiring all requested vectors. */
2332 vectors
= 0; /* Nasty failure, quit now */
2333 else /* err == number of vectors we should try again with */
2337 if (vectors
< vector_threshold
) {
2338 /* Can't allocate enough MSI-X interrupts? Oh well.
2339 * This just means we'll go with either a single MSI
2340 * vector or fall back to legacy interrupts.
2342 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2343 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2344 kfree(adapter
->msix_entries
);
2345 adapter
->msix_entries
= NULL
;
2346 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2347 ixgbe_set_num_queues(adapter
);
2349 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2350 adapter
->num_msix_vectors
= vectors
;
2355 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2356 * @adapter: board private structure to initialize
2358 * Once we know the feature-set enabled for the device, we'll cache
2359 * the register offset the descriptor ring is assigned to.
2361 static void __devinit
ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2363 int feature_mask
= 0, rss_i
;
2364 int i
, txr_idx
, rxr_idx
;
2366 /* Number of supported queues */
2367 switch (adapter
->hw
.mac
.type
) {
2368 case ixgbe_mac_82598EB
:
2369 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2372 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2373 switch (adapter
->flags
& feature_mask
) {
2374 case (IXGBE_FLAG_RSS_ENABLED
):
2375 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2376 adapter
->rx_ring
[i
].reg_idx
= i
;
2377 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2378 adapter
->tx_ring
[i
].reg_idx
= i
;
2391 * ixgbe_alloc_queues - Allocate memory for all rings
2392 * @adapter: board private structure to initialize
2394 * We allocate one ring per queue at run-time since we don't know the
2395 * number of queues at compile-time. The polling_netdev array is
2396 * intended for Multiqueue, but should work fine with a single queue.
2398 static int __devinit
ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2402 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2403 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2404 if (!adapter
->tx_ring
)
2405 goto err_tx_ring_allocation
;
2407 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2408 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2409 if (!adapter
->rx_ring
)
2410 goto err_rx_ring_allocation
;
2412 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2413 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
2414 adapter
->tx_ring
[i
].queue_index
= i
;
2417 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2418 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
2419 adapter
->rx_ring
[i
].queue_index
= i
;
2422 ixgbe_cache_ring_register(adapter
);
2426 err_rx_ring_allocation
:
2427 kfree(adapter
->tx_ring
);
2428 err_tx_ring_allocation
:
2433 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2434 * @adapter: board private structure to initialize
2436 * Attempt to configure the interrupts using the best available
2437 * capabilities of the hardware and the kernel.
2439 static int __devinit
ixgbe_set_interrupt_capability(struct ixgbe_adapter
2443 int vector
, v_budget
;
2446 * It's easy to be greedy for MSI-X vectors, but it really
2447 * doesn't do us much good if we have a lot more vectors
2448 * than CPU's. So let's be conservative and only ask for
2449 * (roughly) twice the number of vectors as there are CPU's.
2451 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2452 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2455 * At the same time, hardware can only support a maximum of
2456 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2457 * we can easily reach upwards of 64 Rx descriptor queues and
2458 * 32 Tx queues. Thus, we cap it off in those rare cases where
2459 * the cpu count also exceeds our vector limit.
2461 v_budget
= min(v_budget
, MAX_MSIX_COUNT
);
2463 /* A failure in MSI-X entry allocation isn't fatal, but it does
2464 * mean we disable MSI-X capabilities of the adapter. */
2465 adapter
->msix_entries
= kcalloc(v_budget
,
2466 sizeof(struct msix_entry
), GFP_KERNEL
);
2467 if (!adapter
->msix_entries
) {
2468 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2469 ixgbe_set_num_queues(adapter
);
2470 kfree(adapter
->tx_ring
);
2471 kfree(adapter
->rx_ring
);
2472 err
= ixgbe_alloc_queues(adapter
);
2474 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
2482 for (vector
= 0; vector
< v_budget
; vector
++)
2483 adapter
->msix_entries
[vector
].entry
= vector
;
2485 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
2487 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2491 err
= pci_enable_msi(adapter
->pdev
);
2493 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
2495 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
2496 "falling back to legacy. Error: %d\n", err
);
2502 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2503 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
2508 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
2510 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2511 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2512 pci_disable_msix(adapter
->pdev
);
2513 kfree(adapter
->msix_entries
);
2514 adapter
->msix_entries
= NULL
;
2515 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2516 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
2517 pci_disable_msi(adapter
->pdev
);
2523 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2524 * @adapter: board private structure to initialize
2526 * We determine which interrupt scheme to use based on...
2527 * - Kernel support (MSI, MSI-X)
2528 * - which can be user-defined (via MODULE_PARAM)
2529 * - Hardware queue count (num_*_queues)
2530 * - defined by miscellaneous hardware support/features (RSS, etc.)
2532 static int __devinit
ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
2536 /* Number of supported queues */
2537 ixgbe_set_num_queues(adapter
);
2539 err
= ixgbe_alloc_queues(adapter
);
2541 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
2542 goto err_alloc_queues
;
2545 err
= ixgbe_set_interrupt_capability(adapter
);
2547 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
2548 goto err_set_interrupt
;
2551 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
2552 "Tx Queue count = %u\n",
2553 (adapter
->num_rx_queues
> 1) ? "Enabled" :
2554 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2556 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2561 kfree(adapter
->tx_ring
);
2562 kfree(adapter
->rx_ring
);
2568 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2569 * @adapter: board private structure to initialize
2571 * ixgbe_sw_init initializes the Adapter private data structure.
2572 * Fields are initialized based on PCI device information and
2573 * OS network device settings (MTU size).
2575 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
2577 struct ixgbe_hw
*hw
= &adapter
->hw
;
2578 struct pci_dev
*pdev
= adapter
->pdev
;
2581 /* PCI config space info */
2583 hw
->vendor_id
= pdev
->vendor
;
2584 hw
->device_id
= pdev
->device
;
2585 hw
->revision_id
= pdev
->revision
;
2586 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2587 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2589 /* Set capability flags */
2590 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
2591 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
2592 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
2593 if (hw
->mac
.ops
.get_media_type
&&
2594 (hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_copper
))
2595 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
2597 /* default flow control settings */
2598 hw
->fc
.original_type
= ixgbe_fc_none
;
2599 hw
->fc
.type
= ixgbe_fc_none
;
2600 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
2601 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
2602 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
2603 hw
->fc
.send_xon
= true;
2605 /* select 10G link by default */
2606 hw
->mac
.link_mode_select
= IXGBE_AUTOC_LMS_10G_LINK_NO_AN
;
2608 /* enable itr by default in dynamic mode */
2609 adapter
->itr_setting
= 1;
2610 adapter
->eitr_param
= 20000;
2612 /* set defaults for eitr in MegaBytes */
2613 adapter
->eitr_low
= 10;
2614 adapter
->eitr_high
= 20;
2616 /* set default ring sizes */
2617 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
2618 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
2620 /* initialize eeprom parameters */
2621 if (ixgbe_init_eeprom_params_generic(hw
)) {
2622 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
2626 /* enable rx csum by default */
2627 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
2629 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2635 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2636 * @adapter: board private structure
2637 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2639 * Return 0 on success, negative on failure
2641 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
2642 struct ixgbe_ring
*tx_ring
)
2644 struct pci_dev
*pdev
= adapter
->pdev
;
2647 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2648 tx_ring
->tx_buffer_info
= vmalloc(size
);
2649 if (!tx_ring
->tx_buffer_info
)
2651 memset(tx_ring
->tx_buffer_info
, 0, size
);
2653 /* round up to nearest 4K */
2654 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
) +
2656 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2658 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
2663 tx_ring
->next_to_use
= 0;
2664 tx_ring
->next_to_clean
= 0;
2665 tx_ring
->work_limit
= tx_ring
->count
;
2669 vfree(tx_ring
->tx_buffer_info
);
2670 tx_ring
->tx_buffer_info
= NULL
;
2671 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
2672 "descriptor ring\n");
2677 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2678 * @adapter: board private structure
2680 * If this function returns with an error, then it's possible one or
2681 * more of the rings is populated (while the rest are not). It is the
2682 * callers duty to clean those orphaned rings.
2684 * Return 0 on success, negative on failure
2686 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
2690 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2691 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2694 DPRINTK(PROBE
, ERR
, "Allocation for Tx Queue %u failed\n", i
);
2702 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2703 * @adapter: board private structure
2704 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2706 * Returns 0 on success, negative on failure
2708 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
2709 struct ixgbe_ring
*rx_ring
)
2711 struct pci_dev
*pdev
= adapter
->pdev
;
2714 size
= sizeof(struct net_lro_desc
) * IXGBE_MAX_LRO_DESCRIPTORS
;
2715 rx_ring
->lro_mgr
.lro_arr
= vmalloc(size
);
2716 if (!rx_ring
->lro_mgr
.lro_arr
)
2718 memset(rx_ring
->lro_mgr
.lro_arr
, 0, size
);
2720 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2721 rx_ring
->rx_buffer_info
= vmalloc(size
);
2722 if (!rx_ring
->rx_buffer_info
) {
2724 "vmalloc allocation failed for the rx desc ring\n");
2727 memset(rx_ring
->rx_buffer_info
, 0, size
);
2729 /* Round up to nearest 4K */
2730 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
2731 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2733 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
2735 if (!rx_ring
->desc
) {
2737 "Memory allocation failed for the rx desc ring\n");
2738 vfree(rx_ring
->rx_buffer_info
);
2742 rx_ring
->next_to_clean
= 0;
2743 rx_ring
->next_to_use
= 0;
2748 vfree(rx_ring
->lro_mgr
.lro_arr
);
2749 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2754 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2755 * @adapter: board private structure
2757 * If this function returns with an error, then it's possible one or
2758 * more of the rings is populated (while the rest are not). It is the
2759 * callers duty to clean those orphaned rings.
2761 * Return 0 on success, negative on failure
2764 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
2768 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2769 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2772 DPRINTK(PROBE
, ERR
, "Allocation for Rx Queue %u failed\n", i
);
2780 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2781 * @adapter: board private structure
2782 * @tx_ring: Tx descriptor ring for a specific queue
2784 * Free all transmit software resources
2786 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
2787 struct ixgbe_ring
*tx_ring
)
2789 struct pci_dev
*pdev
= adapter
->pdev
;
2791 ixgbe_clean_tx_ring(adapter
, tx_ring
);
2793 vfree(tx_ring
->tx_buffer_info
);
2794 tx_ring
->tx_buffer_info
= NULL
;
2796 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2798 tx_ring
->desc
= NULL
;
2802 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2803 * @adapter: board private structure
2805 * Free all transmit software resources
2807 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
2811 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2812 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2816 * ixgbe_free_rx_resources - Free Rx Resources
2817 * @adapter: board private structure
2818 * @rx_ring: ring to clean the resources from
2820 * Free all receive software resources
2822 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
2823 struct ixgbe_ring
*rx_ring
)
2825 struct pci_dev
*pdev
= adapter
->pdev
;
2827 vfree(rx_ring
->lro_mgr
.lro_arr
);
2828 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2830 ixgbe_clean_rx_ring(adapter
, rx_ring
);
2832 vfree(rx_ring
->rx_buffer_info
);
2833 rx_ring
->rx_buffer_info
= NULL
;
2835 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2837 rx_ring
->desc
= NULL
;
2841 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2842 * @adapter: board private structure
2844 * Free all receive software resources
2846 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
2850 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2851 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2855 * ixgbe_change_mtu - Change the Maximum Transfer Unit
2856 * @netdev: network interface device structure
2857 * @new_mtu: new value for maximum frame size
2859 * Returns 0 on success, negative on failure
2861 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
2863 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2864 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2866 /* MTU < 68 is an error and causes problems on some kernels */
2867 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
2870 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
2871 netdev
->mtu
, new_mtu
);
2872 /* must set new MTU before calling down or up */
2873 netdev
->mtu
= new_mtu
;
2875 if (netif_running(netdev
))
2876 ixgbe_reinit_locked(adapter
);
2882 * ixgbe_open - Called when a network interface is made active
2883 * @netdev: network interface device structure
2885 * Returns 0 on success, negative value on failure
2887 * The open entry point is called when a network interface is made
2888 * active by the system (IFF_UP). At this point all resources needed
2889 * for transmit and receive operations are allocated, the interrupt
2890 * handler is registered with the OS, the watchdog timer is started,
2891 * and the stack is notified that the interface is ready.
2893 static int ixgbe_open(struct net_device
*netdev
)
2895 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2898 /* disallow open during test */
2899 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
2902 /* allocate transmit descriptors */
2903 err
= ixgbe_setup_all_tx_resources(adapter
);
2907 /* allocate receive descriptors */
2908 err
= ixgbe_setup_all_rx_resources(adapter
);
2912 ixgbe_configure(adapter
);
2914 err
= ixgbe_request_irq(adapter
);
2918 err
= ixgbe_up_complete(adapter
);
2922 netif_tx_start_all_queues(netdev
);
2927 ixgbe_release_hw_control(adapter
);
2928 ixgbe_free_irq(adapter
);
2930 ixgbe_free_all_rx_resources(adapter
);
2932 ixgbe_free_all_tx_resources(adapter
);
2934 ixgbe_reset(adapter
);
2940 * ixgbe_close - Disables a network interface
2941 * @netdev: network interface device structure
2943 * Returns 0, this is not allowed to fail
2945 * The close entry point is called when an interface is de-activated
2946 * by the OS. The hardware is still under the drivers control, but
2947 * needs to be disabled. A global MAC reset is issued to stop the
2948 * hardware, and all transmit and receive resources are freed.
2950 static int ixgbe_close(struct net_device
*netdev
)
2952 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2954 ixgbe_down(adapter
);
2955 ixgbe_free_irq(adapter
);
2957 ixgbe_free_all_tx_resources(adapter
);
2958 ixgbe_free_all_rx_resources(adapter
);
2960 ixgbe_release_hw_control(adapter
);
2966 * ixgbe_napi_add_all - prep napi structs for use
2967 * @adapter: private struct
2968 * helper function to napi_add each possible q_vector->napi
2970 static void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
2972 int q_idx
, q_vectors
;
2973 int (*poll
)(struct napi_struct
*, int);
2975 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2976 poll
= &ixgbe_clean_rxonly
;
2977 /* Only enable as many vectors as we have rx queues. */
2978 q_vectors
= adapter
->num_rx_queues
;
2981 /* only one q_vector for legacy modes */
2985 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2986 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
2987 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
2991 static void ixgbe_napi_del_all(struct ixgbe_adapter
*adapter
)
2994 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2996 /* legacy and MSI only use one vector */
2997 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3000 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3001 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
3002 if (!q_vector
->rxr_count
)
3004 netif_napi_del(&q_vector
->napi
);
3009 static int ixgbe_resume(struct pci_dev
*pdev
)
3011 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3012 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3015 pci_set_power_state(pdev
, PCI_D0
);
3016 pci_restore_state(pdev
);
3017 err
= pci_enable_device(pdev
);
3019 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from "
3023 pci_set_master(pdev
);
3025 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3026 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3028 err
= ixgbe_init_interrupt_scheme(adapter
);
3030 printk(KERN_ERR
"ixgbe: Cannot initialize interrupts for "
3035 ixgbe_napi_add_all(adapter
);
3036 ixgbe_reset(adapter
);
3038 if (netif_running(netdev
)) {
3039 err
= ixgbe_open(adapter
->netdev
);
3044 netif_device_attach(netdev
);
3049 #endif /* CONFIG_PM */
3050 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
3052 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3053 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3058 netif_device_detach(netdev
);
3060 if (netif_running(netdev
)) {
3061 ixgbe_down(adapter
);
3062 ixgbe_free_irq(adapter
);
3063 ixgbe_free_all_tx_resources(adapter
);
3064 ixgbe_free_all_rx_resources(adapter
);
3066 ixgbe_reset_interrupt_capability(adapter
);
3067 ixgbe_napi_del_all(adapter
);
3068 kfree(adapter
->tx_ring
);
3069 kfree(adapter
->rx_ring
);
3072 retval
= pci_save_state(pdev
);
3077 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3078 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3080 ixgbe_release_hw_control(adapter
);
3082 pci_disable_device(pdev
);
3084 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
3089 static void ixgbe_shutdown(struct pci_dev
*pdev
)
3091 ixgbe_suspend(pdev
, PMSG_SUSPEND
);
3095 * ixgbe_update_stats - Update the board statistics counters.
3096 * @adapter: board private structure
3098 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
3100 struct ixgbe_hw
*hw
= &adapter
->hw
;
3102 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
3104 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
3105 for (i
= 0; i
< 8; i
++) {
3106 /* for packet buffers not used, the register should read 0 */
3107 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
3109 adapter
->stats
.mpc
[i
] += mpc
;
3110 total_mpc
+= adapter
->stats
.mpc
[i
];
3111 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
3113 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
3114 /* work around hardware counting issue */
3115 adapter
->stats
.gprc
-= missed_rx
;
3117 /* 82598 hardware only has a 32 bit counter in the high register */
3118 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
3119 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
3120 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
3121 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
3122 adapter
->stats
.bprc
+= bprc
;
3123 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
3124 adapter
->stats
.mprc
-= bprc
;
3125 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
3126 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
3127 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
3128 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
3129 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
3130 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
3131 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
3132 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
3133 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
3134 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
3135 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
3136 adapter
->stats
.lxontxc
+= lxon
;
3137 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
3138 adapter
->stats
.lxofftxc
+= lxoff
;
3139 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3140 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
3141 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
3143 * 82598 errata - tx of flow control packets is included in tx counters
3145 xon_off_tot
= lxon
+ lxoff
;
3146 adapter
->stats
.gptc
-= xon_off_tot
;
3147 adapter
->stats
.mptc
-= xon_off_tot
;
3148 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
3149 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3150 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
3151 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
3152 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
3153 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
3154 adapter
->stats
.ptc64
-= xon_off_tot
;
3155 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
3156 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
3157 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
3158 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
3159 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
3160 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
3162 /* Fill out the OS statistics structure */
3163 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3166 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
3167 adapter
->stats
.rlec
;
3168 adapter
->net_stats
.rx_dropped
= 0;
3169 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
3170 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3171 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
3175 * ixgbe_watchdog - Timer Call-back
3176 * @data: pointer to adapter cast into an unsigned long
3178 static void ixgbe_watchdog(unsigned long data
)
3180 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3181 struct ixgbe_hw
*hw
= &adapter
->hw
;
3183 /* Do the watchdog outside of interrupt context due to the lovely
3184 * delays that some of the newer hardware requires */
3185 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
3186 /* Cause software interrupt to ensure rx rings are cleaned */
3187 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3189 (1 << (adapter
->num_msix_vectors
- NON_Q_VECTORS
)) - 1;
3190 IXGBE_WRITE_REG(hw
, IXGBE_EICS
, eics
);
3192 /* For legacy and MSI interrupts don't set any bits that
3193 * are enabled for EIAM, because this operation would
3194 * set *both* EIMS and EICS for any bit in EIAM */
3195 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3196 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3198 /* Reset the timer */
3199 mod_timer(&adapter
->watchdog_timer
,
3200 round_jiffies(jiffies
+ 2 * HZ
));
3203 schedule_work(&adapter
->watchdog_task
);
3207 * ixgbe_watchdog_task - worker thread to bring link up
3208 * @work: pointer to work_struct containing our data
3210 static void ixgbe_watchdog_task(struct work_struct
*work
)
3212 struct ixgbe_adapter
*adapter
= container_of(work
,
3213 struct ixgbe_adapter
,
3215 struct net_device
*netdev
= adapter
->netdev
;
3216 struct ixgbe_hw
*hw
= &adapter
->hw
;
3217 u32 link_speed
= adapter
->link_speed
;
3218 bool link_up
= adapter
->link_up
;
3220 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
3222 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
3223 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
3225 time_after(jiffies
, (adapter
->link_check_timeout
+
3226 IXGBE_TRY_LINK_TIMEOUT
))) {
3227 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
3228 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
3230 adapter
->link_up
= link_up
;
3231 adapter
->link_speed
= link_speed
;
3235 if (!netif_carrier_ok(netdev
)) {
3236 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3237 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
3238 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3239 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3240 DPRINTK(LINK
, INFO
, "NIC Link is Up %s, "
3241 "Flow Control: %s\n",
3242 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
3244 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
3245 "1 Gbps" : "unknown speed")),
3246 ((FLOW_RX
&& FLOW_TX
) ? "RX/TX" :
3248 (FLOW_TX
? "TX" : "None"))));
3250 netif_carrier_on(netdev
);
3252 /* Force detection of hung controller */
3253 adapter
->detect_tx_hung
= true;
3256 adapter
->link_up
= false;
3257 adapter
->link_speed
= 0;
3258 if (netif_carrier_ok(netdev
)) {
3259 DPRINTK(LINK
, INFO
, "NIC Link is Down\n");
3260 netif_carrier_off(netdev
);
3264 ixgbe_update_stats(adapter
);
3265 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
3268 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
3269 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
3270 u32 tx_flags
, u8
*hdr_len
)
3272 struct ixgbe_adv_tx_context_desc
*context_desc
;
3275 struct ixgbe_tx_buffer
*tx_buffer_info
;
3276 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
3277 u32 mss_l4len_idx
, l4len
;
3279 if (skb_is_gso(skb
)) {
3280 if (skb_header_cloned(skb
)) {
3281 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
3285 l4len
= tcp_hdrlen(skb
);
3288 if (skb
->protocol
== htons(ETH_P_IP
)) {
3289 struct iphdr
*iph
= ip_hdr(skb
);
3292 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
3296 adapter
->hw_tso_ctxt
++;
3297 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
3298 ipv6_hdr(skb
)->payload_len
= 0;
3299 tcp_hdr(skb
)->check
=
3300 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
3301 &ipv6_hdr(skb
)->daddr
,
3303 adapter
->hw_tso6_ctxt
++;
3306 i
= tx_ring
->next_to_use
;
3308 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3309 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3311 /* VLAN MACLEN IPLEN */
3312 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3314 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3315 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
3316 IXGBE_ADVTXD_MACLEN_SHIFT
);
3317 *hdr_len
+= skb_network_offset(skb
);
3319 (skb_transport_header(skb
) - skb_network_header(skb
));
3321 (skb_transport_header(skb
) - skb_network_header(skb
));
3322 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3323 context_desc
->seqnum_seed
= 0;
3325 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3326 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
3327 IXGBE_ADVTXD_DTYP_CTXT
);
3329 if (skb
->protocol
== htons(ETH_P_IP
))
3330 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3331 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3332 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3336 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
3337 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
3338 /* use index 1 for TSO */
3339 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3340 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3342 tx_buffer_info
->time_stamp
= jiffies
;
3343 tx_buffer_info
->next_to_watch
= i
;
3346 if (i
== tx_ring
->count
)
3348 tx_ring
->next_to_use
= i
;
3355 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
3356 struct ixgbe_ring
*tx_ring
,
3357 struct sk_buff
*skb
, u32 tx_flags
)
3359 struct ixgbe_adv_tx_context_desc
*context_desc
;
3361 struct ixgbe_tx_buffer
*tx_buffer_info
;
3362 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3364 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
3365 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
3366 i
= tx_ring
->next_to_use
;
3367 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3368 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3370 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3372 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3373 vlan_macip_lens
|= (skb_network_offset(skb
) <<
3374 IXGBE_ADVTXD_MACLEN_SHIFT
);
3375 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3376 vlan_macip_lens
|= (skb_transport_header(skb
) -
3377 skb_network_header(skb
));
3379 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3380 context_desc
->seqnum_seed
= 0;
3382 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3383 IXGBE_ADVTXD_DTYP_CTXT
);
3385 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3386 switch (skb
->protocol
) {
3387 case __constant_htons(ETH_P_IP
):
3388 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3389 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3391 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3393 case __constant_htons(ETH_P_IPV6
):
3394 /* XXX what about other V6 headers?? */
3395 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3397 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3400 if (unlikely(net_ratelimit())) {
3401 DPRINTK(PROBE
, WARNING
,
3402 "partial checksum but proto=%x!\n",
3409 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3410 /* use index zero for tx checksum offload */
3411 context_desc
->mss_l4len_idx
= 0;
3413 tx_buffer_info
->time_stamp
= jiffies
;
3414 tx_buffer_info
->next_to_watch
= i
;
3416 adapter
->hw_csum_tx_good
++;
3418 if (i
== tx_ring
->count
)
3420 tx_ring
->next_to_use
= i
;
3428 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
3429 struct ixgbe_ring
*tx_ring
,
3430 struct sk_buff
*skb
, unsigned int first
)
3432 struct ixgbe_tx_buffer
*tx_buffer_info
;
3433 unsigned int len
= skb
->len
;
3434 unsigned int offset
= 0, size
, count
= 0, i
;
3435 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3438 len
-= skb
->data_len
;
3440 i
= tx_ring
->next_to_use
;
3443 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3444 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3446 tx_buffer_info
->length
= size
;
3447 tx_buffer_info
->dma
= pci_map_single(adapter
->pdev
,
3449 size
, PCI_DMA_TODEVICE
);
3450 tx_buffer_info
->time_stamp
= jiffies
;
3451 tx_buffer_info
->next_to_watch
= i
;
3457 if (i
== tx_ring
->count
)
3461 for (f
= 0; f
< nr_frags
; f
++) {
3462 struct skb_frag_struct
*frag
;
3464 frag
= &skb_shinfo(skb
)->frags
[f
];
3466 offset
= frag
->page_offset
;
3469 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3470 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3472 tx_buffer_info
->length
= size
;
3473 tx_buffer_info
->dma
= pci_map_page(adapter
->pdev
,
3478 tx_buffer_info
->time_stamp
= jiffies
;
3479 tx_buffer_info
->next_to_watch
= i
;
3485 if (i
== tx_ring
->count
)
3490 i
= tx_ring
->count
- 1;
3493 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
3494 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
3499 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
3500 struct ixgbe_ring
*tx_ring
,
3501 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
3503 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
3504 struct ixgbe_tx_buffer
*tx_buffer_info
;
3505 u32 olinfo_status
= 0, cmd_type_len
= 0;
3507 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
3509 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
3511 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
3513 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3514 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
3516 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
3517 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
3519 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3520 IXGBE_ADVTXD_POPTS_SHIFT
;
3522 /* use index 1 context for tso */
3523 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3524 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
3525 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
3526 IXGBE_ADVTXD_POPTS_SHIFT
;
3528 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
3529 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3530 IXGBE_ADVTXD_POPTS_SHIFT
;
3532 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
3534 i
= tx_ring
->next_to_use
;
3536 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3537 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
3538 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
3539 tx_desc
->read
.cmd_type_len
=
3540 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
3541 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3543 if (i
== tx_ring
->count
)
3547 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
3550 * Force memory writes to complete before letting h/w
3551 * know there are new descriptors to fetch. (Only
3552 * applicable for weak-ordered memory model archs,
3557 tx_ring
->next_to_use
= i
;
3558 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3561 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3562 struct ixgbe_ring
*tx_ring
, int size
)
3564 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3566 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3567 /* Herbert's original patch had:
3568 * smp_mb__after_netif_stop_queue();
3569 * but since that doesn't exist yet, just open code it. */
3572 /* We need to check again in a case another CPU has just
3573 * made room available. */
3574 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
3577 /* A reprieve! - use start_queue because it doesn't call schedule */
3578 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
3579 ++adapter
->restart_queue
;
3583 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3584 struct ixgbe_ring
*tx_ring
, int size
)
3586 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
3588 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
3591 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
3593 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3594 struct ixgbe_ring
*tx_ring
;
3596 unsigned int tx_flags
= 0;
3602 r_idx
= (adapter
->num_tx_queues
- 1) & skb
->queue_mapping
;
3603 tx_ring
= &adapter
->tx_ring
[r_idx
];
3605 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3606 tx_flags
|= vlan_tx_tag_get(skb
);
3607 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
3608 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
3610 /* three things can cause us to need a context descriptor */
3611 if (skb_is_gso(skb
) ||
3612 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
3613 (tx_flags
& IXGBE_TX_FLAGS_VLAN
))
3616 count
+= TXD_USE_COUNT(skb_headlen(skb
));
3617 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
3618 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
3620 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
3622 return NETDEV_TX_BUSY
;
3625 if (skb
->protocol
== htons(ETH_P_IP
))
3626 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
3627 first
= tx_ring
->next_to_use
;
3628 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
3630 dev_kfree_skb_any(skb
);
3631 return NETDEV_TX_OK
;
3635 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
3636 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
3637 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3638 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
3640 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
,
3641 ixgbe_tx_map(adapter
, tx_ring
, skb
, first
),
3644 netdev
->trans_start
= jiffies
;
3646 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
3648 return NETDEV_TX_OK
;
3652 * ixgbe_get_stats - Get System Network Statistics
3653 * @netdev: network interface device structure
3655 * Returns the address of the device statistics structure.
3656 * The statistics are actually updated from the timer callback.
3658 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
3660 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3662 /* only return the current stats */
3663 return &adapter
->net_stats
;
3667 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3668 * @netdev: network interface device structure
3669 * @p: pointer to an address structure
3671 * Returns 0 on success, negative on failure
3673 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
3675 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3676 struct ixgbe_hw
*hw
= &adapter
->hw
;
3677 struct sockaddr
*addr
= p
;
3679 if (!is_valid_ether_addr(addr
->sa_data
))
3680 return -EADDRNOTAVAIL
;
3682 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3683 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3685 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
3690 #ifdef CONFIG_NET_POLL_CONTROLLER
3692 * Polling 'interrupt' - used by things like netconsole to send skbs
3693 * without having to re-enable interrupts. It's not called while
3694 * the interrupt routine is executing.
3696 static void ixgbe_netpoll(struct net_device
*netdev
)
3698 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3700 disable_irq(adapter
->pdev
->irq
);
3701 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
3702 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
3703 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
3704 enable_irq(adapter
->pdev
->irq
);
3709 * ixgbe_link_config - set up initial link with default speed and duplex
3710 * @hw: pointer to private hardware struct
3712 * Returns 0 on success, negative on failure
3714 static int ixgbe_link_config(struct ixgbe_hw
*hw
)
3716 u32 autoneg
= IXGBE_LINK_SPEED_10GB_FULL
;
3718 /* must always autoneg for both 1G and 10G link */
3719 hw
->mac
.autoneg
= true;
3721 if ((hw
->mac
.type
== ixgbe_mac_82598EB
) &&
3722 (hw
->phy
.media_type
== ixgbe_media_type_copper
))
3723 autoneg
= IXGBE_LINK_SPEED_82598_AUTONEG
;
3725 return hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, true);
3728 static const struct net_device_ops ixgbe_netdev_ops
= {
3729 .ndo_open
= ixgbe_open
,
3730 .ndo_stop
= ixgbe_close
,
3731 .ndo_get_stats
= ixgbe_get_stats
,
3732 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
3733 .ndo_validate_addr
= eth_validate_addr
,
3734 .ndo_set_mac_address
= ixgbe_set_mac
,
3735 .ndo_change_mtu
= ixgbe_change_mtu
,
3736 .ndo_tx_timeout
= ixgbe_tx_timeout
,
3737 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
3738 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
3739 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
3740 #ifdef CONFIG_NET_POLL_CONTROLLER
3741 .ndo_poll_controller
= ixgbe_netpoll
,
3746 * ixgbe_probe - Device Initialization Routine
3747 * @pdev: PCI device information struct
3748 * @ent: entry in ixgbe_pci_tbl
3750 * Returns 0 on success, negative on failure
3752 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3753 * The OS initialization, configuring of the adapter private structure,
3754 * and a hardware reset occur.
3756 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
3757 const struct pci_device_id
*ent
)
3759 struct net_device
*netdev
;
3760 struct ixgbe_adapter
*adapter
= NULL
;
3761 struct ixgbe_hw
*hw
;
3762 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
3763 static int cards_found
;
3764 int i
, err
, pci_using_dac
;
3765 u16 link_status
, link_speed
, link_width
;
3768 err
= pci_enable_device(pdev
);
3772 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) &&
3773 !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
)) {
3776 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
3778 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
3780 dev_err(&pdev
->dev
, "No usable DMA "
3781 "configuration, aborting\n");
3788 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
3790 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
3794 pci_set_master(pdev
);
3795 pci_save_state(pdev
);
3797 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
3800 goto err_alloc_etherdev
;
3803 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3805 pci_set_drvdata(pdev
, netdev
);
3806 adapter
= netdev_priv(netdev
);
3808 adapter
->netdev
= netdev
;
3809 adapter
->pdev
= pdev
;
3812 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
3814 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
3815 pci_resource_len(pdev
, 0));
3821 for (i
= 1; i
<= 5; i
++) {
3822 if (pci_resource_len(pdev
, i
) == 0)
3826 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
3827 netdev
->hard_start_xmit
= &ixgbe_xmit_frame
;
3828 ixgbe_set_ethtool_ops(netdev
);
3829 netdev
->watchdog_timeo
= 5 * HZ
;
3830 strcpy(netdev
->name
, pci_name(pdev
));
3832 adapter
->bd_number
= cards_found
;
3835 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
3836 hw
->mac
.type
= ii
->mac
;
3839 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
3840 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
3841 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
3842 if (!(eec
& (1 << 8)))
3843 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
3846 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
3847 /* phy->sfp_type = ixgbe_sfp_type_unknown; */
3849 err
= ii
->get_invariants(hw
);
3853 /* setup the private structure */
3854 err
= ixgbe_sw_init(adapter
);
3858 /* reset_hw fills in the perm_addr as well */
3859 err
= hw
->mac
.ops
.reset_hw(hw
);
3861 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
3865 netdev
->features
= NETIF_F_SG
|
3867 NETIF_F_HW_VLAN_TX
|
3868 NETIF_F_HW_VLAN_RX
|
3869 NETIF_F_HW_VLAN_FILTER
;
3871 netdev
->features
|= NETIF_F_IPV6_CSUM
;
3872 netdev
->features
|= NETIF_F_TSO
;
3873 netdev
->features
|= NETIF_F_TSO6
;
3874 netdev
->features
|= NETIF_F_LRO
;
3876 netdev
->vlan_features
|= NETIF_F_TSO
;
3877 netdev
->vlan_features
|= NETIF_F_TSO6
;
3878 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
3879 netdev
->vlan_features
|= NETIF_F_SG
;
3882 netdev
->features
|= NETIF_F_HIGHDMA
;
3884 /* make sure the EEPROM is good */
3885 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
3886 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
3891 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3892 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3894 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
3895 dev_err(&pdev
->dev
, "invalid MAC address\n");
3900 init_timer(&adapter
->watchdog_timer
);
3901 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
3902 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
3904 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
3905 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
3907 err
= ixgbe_init_interrupt_scheme(adapter
);
3911 /* print bus type/speed/width info */
3912 pci_read_config_word(pdev
, IXGBE_PCI_LINK_STATUS
, &link_status
);
3913 link_speed
= link_status
& IXGBE_PCI_LINK_SPEED
;
3914 link_width
= link_status
& IXGBE_PCI_LINK_WIDTH
;
3915 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) %pM\n",
3916 ((link_speed
== IXGBE_PCI_LINK_SPEED_5000
) ? "5.0Gb/s" :
3917 (link_speed
== IXGBE_PCI_LINK_SPEED_2500
) ? "2.5Gb/s" :
3919 ((link_width
== IXGBE_PCI_LINK_WIDTH_8
) ? "Width x8" :
3920 (link_width
== IXGBE_PCI_LINK_WIDTH_4
) ? "Width x4" :
3921 (link_width
== IXGBE_PCI_LINK_WIDTH_2
) ? "Width x2" :
3922 (link_width
== IXGBE_PCI_LINK_WIDTH_1
) ? "Width x1" :
3925 ixgbe_read_pba_num_generic(hw
, &part_num
);
3926 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3927 hw
->mac
.type
, hw
->phy
.type
,
3928 (part_num
>> 8), (part_num
& 0xff));
3930 if (link_width
<= IXGBE_PCI_LINK_WIDTH_4
) {
3931 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
3932 "this card is not sufficient for optimal "
3934 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
3935 "PCI-Express slot is required.\n");
3938 /* reset the hardware with the new settings */
3939 hw
->mac
.ops
.start_hw(hw
);
3941 /* link_config depends on start_hw being called at least once */
3942 err
= ixgbe_link_config(hw
);
3944 dev_err(&pdev
->dev
, "setup_link_speed FAILED %d\n", err
);
3948 netif_carrier_off(netdev
);
3950 ixgbe_napi_add_all(adapter
);
3952 strcpy(netdev
->name
, "eth%d");
3953 err
= register_netdev(netdev
);
3957 #ifdef CONFIG_IXGBE_DCA
3958 if (dca_add_requester(&pdev
->dev
) == 0) {
3959 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
3960 /* always use CB2 mode, difference is masked
3961 * in the CB driver */
3962 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
3963 ixgbe_setup_dca(adapter
);
3967 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
3972 ixgbe_release_hw_control(adapter
);
3975 ixgbe_reset_interrupt_capability(adapter
);
3977 iounmap(hw
->hw_addr
);
3979 free_netdev(netdev
);
3981 pci_release_regions(pdev
);
3984 pci_disable_device(pdev
);
3989 * ixgbe_remove - Device Removal Routine
3990 * @pdev: PCI device information struct
3992 * ixgbe_remove is called by the PCI subsystem to alert the driver
3993 * that it should release a PCI device. The could be caused by a
3994 * Hot-Plug event, or because the driver is going to be removed from
3997 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
3999 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4000 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4002 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4003 del_timer_sync(&adapter
->watchdog_timer
);
4005 flush_scheduled_work();
4007 #ifdef CONFIG_IXGBE_DCA
4008 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
4009 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
4010 dca_remove_requester(&pdev
->dev
);
4011 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
4015 unregister_netdev(netdev
);
4017 ixgbe_reset_interrupt_capability(adapter
);
4019 ixgbe_release_hw_control(adapter
);
4021 iounmap(adapter
->hw
.hw_addr
);
4022 pci_release_regions(pdev
);
4024 DPRINTK(PROBE
, INFO
, "complete\n");
4025 ixgbe_napi_del_all(adapter
);
4026 kfree(adapter
->tx_ring
);
4027 kfree(adapter
->rx_ring
);
4029 free_netdev(netdev
);
4031 pci_disable_device(pdev
);
4035 * ixgbe_io_error_detected - called when PCI error is detected
4036 * @pdev: Pointer to PCI device
4037 * @state: The current pci connection state
4039 * This function is called after a PCI bus error affecting
4040 * this device has been detected.
4042 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
4043 pci_channel_state_t state
)
4045 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4046 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4048 netif_device_detach(netdev
);
4050 if (netif_running(netdev
))
4051 ixgbe_down(adapter
);
4052 pci_disable_device(pdev
);
4054 /* Request a slot reset. */
4055 return PCI_ERS_RESULT_NEED_RESET
;
4059 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4060 * @pdev: Pointer to PCI device
4062 * Restart the card from scratch, as if from a cold-boot.
4064 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
4066 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4067 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4069 if (pci_enable_device(pdev
)) {
4071 "Cannot re-enable PCI device after reset.\n");
4072 return PCI_ERS_RESULT_DISCONNECT
;
4074 pci_set_master(pdev
);
4075 pci_restore_state(pdev
);
4077 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4078 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4080 ixgbe_reset(adapter
);
4082 return PCI_ERS_RESULT_RECOVERED
;
4086 * ixgbe_io_resume - called when traffic can start flowing again.
4087 * @pdev: Pointer to PCI device
4089 * This callback is called when the error recovery driver tells us that
4090 * its OK to resume normal operation.
4092 static void ixgbe_io_resume(struct pci_dev
*pdev
)
4094 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4095 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4097 if (netif_running(netdev
)) {
4098 if (ixgbe_up(adapter
)) {
4099 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
4104 netif_device_attach(netdev
);
4107 static struct pci_error_handlers ixgbe_err_handler
= {
4108 .error_detected
= ixgbe_io_error_detected
,
4109 .slot_reset
= ixgbe_io_slot_reset
,
4110 .resume
= ixgbe_io_resume
,
4113 static struct pci_driver ixgbe_driver
= {
4114 .name
= ixgbe_driver_name
,
4115 .id_table
= ixgbe_pci_tbl
,
4116 .probe
= ixgbe_probe
,
4117 .remove
= __devexit_p(ixgbe_remove
),
4119 .suspend
= ixgbe_suspend
,
4120 .resume
= ixgbe_resume
,
4122 .shutdown
= ixgbe_shutdown
,
4123 .err_handler
= &ixgbe_err_handler
4127 * ixgbe_init_module - Driver Registration Routine
4129 * ixgbe_init_module is the first routine called when the driver is
4130 * loaded. All it does is register with the PCI subsystem.
4132 static int __init
ixgbe_init_module(void)
4135 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
4136 ixgbe_driver_string
, ixgbe_driver_version
);
4138 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
4140 #ifdef CONFIG_IXGBE_DCA
4141 dca_register_notify(&dca_notifier
);
4144 ret
= pci_register_driver(&ixgbe_driver
);
4148 module_init(ixgbe_init_module
);
4151 * ixgbe_exit_module - Driver Exit Cleanup Routine
4153 * ixgbe_exit_module is called just before the driver is removed
4156 static void __exit
ixgbe_exit_module(void)
4158 #ifdef CONFIG_IXGBE_DCA
4159 dca_unregister_notify(&dca_notifier
);
4161 pci_unregister_driver(&ixgbe_driver
);
4164 #ifdef CONFIG_IXGBE_DCA
4165 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
4170 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
4171 __ixgbe_notify_dca
);
4173 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
4175 #endif /* CONFIG_IXGBE_DCA */
4177 module_exit(ixgbe_exit_module
);