1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/pkt_sched.h>
38 #include <linux/ipv6.h>
39 #include <linux/slab.h>
40 #include <net/checksum.h>
41 #include <net/ip6_checksum.h>
42 #include <linux/ethtool.h>
43 #include <linux/if_vlan.h>
44 #include <scsi/fc/fc_fcoe.h>
47 #include "ixgbe_common.h"
48 #include "ixgbe_dcb_82599.h"
49 #include "ixgbe_sriov.h"
51 char ixgbe_driver_name
[] = "ixgbe";
52 static const char ixgbe_driver_string
[] =
53 "Intel(R) 10 Gigabit PCI Express Network Driver";
55 #define DRV_VERSION "2.0.84-k2"
56 const char ixgbe_driver_version
[] = DRV_VERSION
;
57 static char ixgbe_copyright
[] = "Copyright (c) 1999-2010 Intel Corporation.";
59 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
60 [board_82598
] = &ixgbe_82598_info
,
61 [board_82599
] = &ixgbe_82599_info
,
64 /* ixgbe_pci_tbl - PCI Device ID Table
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
72 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
79 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
81 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
),
83 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
85 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
87 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
),
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
),
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
),
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
),
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
),
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
),
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
),
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
),
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
),
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
),
116 /* required last entry */
119 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
121 #ifdef CONFIG_IXGBE_DCA
122 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
124 static struct notifier_block dca_notifier
= {
125 .notifier_call
= ixgbe_notify_dca
,
131 #ifdef CONFIG_PCI_IOV
132 static unsigned int max_vfs
;
133 module_param(max_vfs
, uint
, 0);
134 MODULE_PARM_DESC(max_vfs
,
135 "Maximum number of virtual functions to allocate per physical function");
136 #endif /* CONFIG_PCI_IOV */
138 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
139 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
140 MODULE_LICENSE("GPL");
141 MODULE_VERSION(DRV_VERSION
);
143 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
145 static inline void ixgbe_disable_sriov(struct ixgbe_adapter
*adapter
)
147 struct ixgbe_hw
*hw
= &adapter
->hw
;
152 #ifdef CONFIG_PCI_IOV
153 /* disable iov and allow time for transactions to clear */
154 pci_disable_sriov(adapter
->pdev
);
157 /* turn off device IOV mode */
158 gcr
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
159 gcr
&= ~(IXGBE_GCR_EXT_SRIOV
);
160 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr
);
161 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
162 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
163 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
165 /* set default pool back to 0 */
166 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
167 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
168 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
170 /* take a breather then clean up driver data */
173 kfree(adapter
->vfinfo
);
174 adapter
->vfinfo
= NULL
;
176 adapter
->num_vfs
= 0;
177 adapter
->flags
&= ~IXGBE_FLAG_SRIOV_ENABLED
;
180 struct ixgbe_reg_info
{
185 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
187 /* General Registers */
188 {IXGBE_CTRL
, "CTRL"},
189 {IXGBE_STATUS
, "STATUS"},
190 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
192 /* Interrupt Registers */
193 {IXGBE_EICR
, "EICR"},
196 {IXGBE_SRRCTL(0), "SRRCTL"},
197 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
198 {IXGBE_RDLEN(0), "RDLEN"},
199 {IXGBE_RDH(0), "RDH"},
200 {IXGBE_RDT(0), "RDT"},
201 {IXGBE_RXDCTL(0), "RXDCTL"},
202 {IXGBE_RDBAL(0), "RDBAL"},
203 {IXGBE_RDBAH(0), "RDBAH"},
206 {IXGBE_TDBAL(0), "TDBAL"},
207 {IXGBE_TDBAH(0), "TDBAH"},
208 {IXGBE_TDLEN(0), "TDLEN"},
209 {IXGBE_TDH(0), "TDH"},
210 {IXGBE_TDT(0), "TDT"},
211 {IXGBE_TXDCTL(0), "TXDCTL"},
213 /* List Terminator */
219 * ixgbe_regdump - register printout routine
221 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
227 switch (reginfo
->ofs
) {
228 case IXGBE_SRRCTL(0):
229 for (i
= 0; i
< 64; i
++)
230 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
232 case IXGBE_DCA_RXCTRL(0):
233 for (i
= 0; i
< 64; i
++)
234 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
237 for (i
= 0; i
< 64; i
++)
238 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
241 for (i
= 0; i
< 64; i
++)
242 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
245 for (i
= 0; i
< 64; i
++)
246 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
248 case IXGBE_RXDCTL(0):
249 for (i
= 0; i
< 64; i
++)
250 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
253 for (i
= 0; i
< 64; i
++)
254 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
257 for (i
= 0; i
< 64; i
++)
258 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
261 for (i
= 0; i
< 64; i
++)
262 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
265 for (i
= 0; i
< 64; i
++)
266 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
269 for (i
= 0; i
< 64; i
++)
270 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
273 for (i
= 0; i
< 64; i
++)
274 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
277 for (i
= 0; i
< 64; i
++)
278 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
280 case IXGBE_TXDCTL(0):
281 for (i
= 0; i
< 64; i
++)
282 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
285 pr_info("%-15s %08x\n", reginfo
->name
,
286 IXGBE_READ_REG(hw
, reginfo
->ofs
));
290 for (i
= 0; i
< 8; i
++) {
291 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
292 pr_err("%-15s", rname
);
293 for (j
= 0; j
< 8; j
++)
294 pr_cont(" %08x", regs
[i
*8+j
]);
301 * ixgbe_dump - Print registers, tx-rings and rx-rings
303 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
305 struct net_device
*netdev
= adapter
->netdev
;
306 struct ixgbe_hw
*hw
= &adapter
->hw
;
307 struct ixgbe_reg_info
*reginfo
;
309 struct ixgbe_ring
*tx_ring
;
310 struct ixgbe_tx_buffer
*tx_buffer_info
;
311 union ixgbe_adv_tx_desc
*tx_desc
;
312 struct my_u0
{ u64 a
; u64 b
; } *u0
;
313 struct ixgbe_ring
*rx_ring
;
314 union ixgbe_adv_rx_desc
*rx_desc
;
315 struct ixgbe_rx_buffer
*rx_buffer_info
;
319 if (!netif_msg_hw(adapter
))
322 /* Print netdevice Info */
324 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
325 pr_info("Device Name state "
326 "trans_start last_rx\n");
327 pr_info("%-15s %016lX %016lX %016lX\n",
334 /* Print Registers */
335 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
336 pr_info(" Register Name Value\n");
337 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
338 reginfo
->name
; reginfo
++) {
339 ixgbe_regdump(hw
, reginfo
);
342 /* Print TX Ring Summary */
343 if (!netdev
|| !netif_running(netdev
))
346 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
347 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
348 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
349 tx_ring
= adapter
->tx_ring
[n
];
351 &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
352 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
353 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
354 (u64
)tx_buffer_info
->dma
,
355 tx_buffer_info
->length
,
356 tx_buffer_info
->next_to_watch
,
357 (u64
)tx_buffer_info
->time_stamp
);
361 if (!netif_msg_tx_done(adapter
))
362 goto rx_ring_summary
;
364 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
366 /* Transmit Descriptor Formats
368 * Advanced Transmit Descriptor
369 * +--------------------------------------------------------------+
370 * 0 | Buffer Address [63:0] |
371 * +--------------------------------------------------------------+
372 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
373 * +--------------------------------------------------------------+
374 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
377 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
378 tx_ring
= adapter
->tx_ring
[n
];
379 pr_info("------------------------------------\n");
380 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
381 pr_info("------------------------------------\n");
382 pr_info("T [desc] [address 63:0 ] "
383 "[PlPOIdStDDt Ln] [bi->dma ] "
384 "leng ntw timestamp bi->skb\n");
386 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
387 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, i
);
388 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
389 u0
= (struct my_u0
*)tx_desc
;
390 pr_info("T [0x%03X] %016llX %016llX %016llX"
391 " %04X %3X %016llX %p", i
,
394 (u64
)tx_buffer_info
->dma
,
395 tx_buffer_info
->length
,
396 tx_buffer_info
->next_to_watch
,
397 (u64
)tx_buffer_info
->time_stamp
,
398 tx_buffer_info
->skb
);
399 if (i
== tx_ring
->next_to_use
&&
400 i
== tx_ring
->next_to_clean
)
402 else if (i
== tx_ring
->next_to_use
)
404 else if (i
== tx_ring
->next_to_clean
)
409 if (netif_msg_pktdata(adapter
) &&
410 tx_buffer_info
->dma
!= 0)
411 print_hex_dump(KERN_INFO
, "",
412 DUMP_PREFIX_ADDRESS
, 16, 1,
413 phys_to_virt(tx_buffer_info
->dma
),
414 tx_buffer_info
->length
, true);
418 /* Print RX Rings Summary */
420 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
421 pr_info("Queue [NTU] [NTC]\n");
422 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
423 rx_ring
= adapter
->rx_ring
[n
];
424 pr_info("%5d %5X %5X\n",
425 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
429 if (!netif_msg_rx_status(adapter
))
432 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
434 /* Advanced Receive Descriptor (Read) Format
436 * +-----------------------------------------------------+
437 * 0 | Packet Buffer Address [63:1] |A0/NSE|
438 * +----------------------------------------------+------+
439 * 8 | Header Buffer Address [63:1] | DD |
440 * +-----------------------------------------------------+
443 * Advanced Receive Descriptor (Write-Back) Format
445 * 63 48 47 32 31 30 21 20 16 15 4 3 0
446 * +------------------------------------------------------+
447 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
448 * | Checksum Ident | | | | Type | Type |
449 * +------------------------------------------------------+
450 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
451 * +------------------------------------------------------+
452 * 63 48 47 32 31 20 19 0
454 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
455 rx_ring
= adapter
->rx_ring
[n
];
456 pr_info("------------------------------------\n");
457 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
458 pr_info("------------------------------------\n");
459 pr_info("R [desc] [ PktBuf A0] "
460 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
461 "<-- Adv Rx Read format\n");
462 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
463 "[vl er S cks ln] ---------------- [bi->skb] "
464 "<-- Adv Rx Write-Back format\n");
466 for (i
= 0; i
< rx_ring
->count
; i
++) {
467 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
468 rx_desc
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
469 u0
= (struct my_u0
*)rx_desc
;
470 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
471 if (staterr
& IXGBE_RXD_STAT_DD
) {
472 /* Descriptor Done */
473 pr_info("RWB[0x%03X] %016llX "
474 "%016llX ---------------- %p", i
,
477 rx_buffer_info
->skb
);
479 pr_info("R [0x%03X] %016llX "
480 "%016llX %016llX %p", i
,
483 (u64
)rx_buffer_info
->dma
,
484 rx_buffer_info
->skb
);
486 if (netif_msg_pktdata(adapter
)) {
487 print_hex_dump(KERN_INFO
, "",
488 DUMP_PREFIX_ADDRESS
, 16, 1,
489 phys_to_virt(rx_buffer_info
->dma
),
490 rx_ring
->rx_buf_len
, true);
492 if (rx_ring
->rx_buf_len
493 < IXGBE_RXBUFFER_2048
)
494 print_hex_dump(KERN_INFO
, "",
495 DUMP_PREFIX_ADDRESS
, 16, 1,
497 rx_buffer_info
->page_dma
+
498 rx_buffer_info
->page_offset
504 if (i
== rx_ring
->next_to_use
)
506 else if (i
== rx_ring
->next_to_clean
)
518 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
522 /* Let firmware take over control of h/w */
523 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
524 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
525 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
528 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
532 /* Let firmware know the driver has taken over */
533 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
534 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
535 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
539 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
540 * @adapter: pointer to adapter struct
541 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
542 * @queue: queue to map the corresponding interrupt to
543 * @msix_vector: the vector to map to the corresponding queue
546 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
547 u8 queue
, u8 msix_vector
)
550 struct ixgbe_hw
*hw
= &adapter
->hw
;
551 switch (hw
->mac
.type
) {
552 case ixgbe_mac_82598EB
:
553 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
556 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
557 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
558 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
559 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
560 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
562 case ixgbe_mac_82599EB
:
563 if (direction
== -1) {
565 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
566 index
= ((queue
& 1) * 8);
567 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
568 ivar
&= ~(0xFF << index
);
569 ivar
|= (msix_vector
<< index
);
570 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
573 /* tx or rx causes */
574 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
575 index
= ((16 * (queue
& 1)) + (8 * direction
));
576 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
577 ivar
&= ~(0xFF << index
);
578 ivar
|= (msix_vector
<< index
);
579 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
587 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
592 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
593 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
594 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
596 mask
= (qmask
& 0xFFFFFFFF);
597 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
598 mask
= (qmask
>> 32);
599 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
603 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
604 struct ixgbe_tx_buffer
607 if (tx_buffer_info
->dma
) {
608 if (tx_buffer_info
->mapped_as_page
)
609 dma_unmap_page(&adapter
->pdev
->dev
,
611 tx_buffer_info
->length
,
614 dma_unmap_single(&adapter
->pdev
->dev
,
616 tx_buffer_info
->length
,
618 tx_buffer_info
->dma
= 0;
620 if (tx_buffer_info
->skb
) {
621 dev_kfree_skb_any(tx_buffer_info
->skb
);
622 tx_buffer_info
->skb
= NULL
;
624 tx_buffer_info
->time_stamp
= 0;
625 /* tx_buffer_info must be completely set up in the transmit path */
629 * ixgbe_tx_xon_state - check the tx ring xon state
630 * @adapter: the ixgbe adapter
631 * @tx_ring: the corresponding tx_ring
633 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
634 * corresponding TC of this tx_ring when checking TFCS.
636 * Returns : true if in xon state (currently not paused)
638 static inline bool ixgbe_tx_xon_state(struct ixgbe_adapter
*adapter
,
639 struct ixgbe_ring
*tx_ring
)
641 u32 txoff
= IXGBE_TFCS_TXOFF
;
643 #ifdef CONFIG_IXGBE_DCB
644 if (adapter
->dcb_cfg
.pfc_mode_enable
) {
646 int reg_idx
= tx_ring
->reg_idx
;
647 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
649 switch (adapter
->hw
.mac
.type
) {
650 case ixgbe_mac_82598EB
:
652 txoff
= IXGBE_TFCS_TXOFF0
;
654 case ixgbe_mac_82599EB
:
656 txoff
= IXGBE_TFCS_TXOFF
;
660 if (tc
== 2) /* TC2, TC3 */
661 tc
+= (reg_idx
- 64) >> 4;
662 else if (tc
== 3) /* TC4, TC5, TC6, TC7 */
663 tc
+= 1 + ((reg_idx
- 96) >> 3);
664 } else if (dcb_i
== 4) {
668 tc
+= (reg_idx
- 64) >> 5;
669 if (tc
== 2) /* TC2, TC3 */
670 tc
+= (reg_idx
- 96) >> 4;
680 return IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & txoff
;
683 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
684 struct ixgbe_ring
*tx_ring
,
687 struct ixgbe_hw
*hw
= &adapter
->hw
;
689 /* Detect a transmit hang in hardware, this serializes the
690 * check with the clearing of time_stamp and movement of eop */
691 adapter
->detect_tx_hung
= false;
692 if (tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
693 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
694 ixgbe_tx_xon_state(adapter
, tx_ring
)) {
695 /* detected Tx unit hang */
696 union ixgbe_adv_tx_desc
*tx_desc
;
697 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, eop
);
698 e_err(drv
, "Detected Tx Unit Hang\n"
700 " TDH, TDT <%x>, <%x>\n"
701 " next_to_use <%x>\n"
702 " next_to_clean <%x>\n"
703 "tx_buffer_info[next_to_clean]\n"
704 " time_stamp <%lx>\n"
706 tx_ring
->queue_index
,
707 IXGBE_READ_REG(hw
, tx_ring
->head
),
708 IXGBE_READ_REG(hw
, tx_ring
->tail
),
709 tx_ring
->next_to_use
, eop
,
710 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
717 #define IXGBE_MAX_TXD_PWR 14
718 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
720 /* Tx Descriptors needed, worst case */
721 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
722 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
723 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
724 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
726 static void ixgbe_tx_timeout(struct net_device
*netdev
);
729 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
730 * @q_vector: structure containing interrupt and ring information
731 * @tx_ring: tx ring to clean
733 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
734 struct ixgbe_ring
*tx_ring
)
736 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
737 struct net_device
*netdev
= adapter
->netdev
;
738 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
739 struct ixgbe_tx_buffer
*tx_buffer_info
;
740 unsigned int i
, eop
, count
= 0;
741 unsigned int total_bytes
= 0, total_packets
= 0;
743 i
= tx_ring
->next_to_clean
;
744 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
745 eop_desc
= IXGBE_TX_DESC_ADV(tx_ring
, eop
);
747 while ((eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) &&
748 (count
< tx_ring
->work_limit
)) {
749 bool cleaned
= false;
750 rmb(); /* read buffer_info after eop_desc */
751 for ( ; !cleaned
; count
++) {
753 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, i
);
754 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
755 cleaned
= (i
== eop
);
756 skb
= tx_buffer_info
->skb
;
758 if (cleaned
&& skb
) {
759 unsigned int segs
, bytecount
;
760 unsigned int hlen
= skb_headlen(skb
);
762 /* gso_segs is currently only valid for tcp */
763 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
765 /* adjust for FCoE Sequence Offload */
766 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
767 && (skb
->protocol
== htons(ETH_P_FCOE
)) &&
769 hlen
= skb_transport_offset(skb
) +
770 sizeof(struct fc_frame_header
) +
771 sizeof(struct fcoe_crc_eof
);
772 segs
= DIV_ROUND_UP(skb
->len
- hlen
,
773 skb_shinfo(skb
)->gso_size
);
775 #endif /* IXGBE_FCOE */
776 /* multiply data chunks by size of headers */
777 bytecount
= ((segs
- 1) * hlen
) + skb
->len
;
778 total_packets
+= segs
;
779 total_bytes
+= bytecount
;
782 ixgbe_unmap_and_free_tx_resource(adapter
,
785 tx_desc
->wb
.status
= 0;
788 if (i
== tx_ring
->count
)
792 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
793 eop_desc
= IXGBE_TX_DESC_ADV(tx_ring
, eop
);
796 tx_ring
->next_to_clean
= i
;
798 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
799 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
800 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
801 /* Make sure that anybody stopping the queue after this
802 * sees the new next_to_clean.
805 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
806 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
807 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
808 ++tx_ring
->restart_queue
;
812 if (adapter
->detect_tx_hung
) {
813 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
814 /* schedule immediate reset if we believe we hung */
815 e_info(probe
, "tx hang %d detected, resetting "
816 "adapter\n", adapter
->tx_timeout_count
+ 1);
817 ixgbe_tx_timeout(adapter
->netdev
);
821 /* re-arm the interrupt */
822 if (count
>= tx_ring
->work_limit
)
823 ixgbe_irq_rearm_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
825 tx_ring
->total_bytes
+= total_bytes
;
826 tx_ring
->total_packets
+= total_packets
;
827 u64_stats_update_begin(&tx_ring
->syncp
);
828 tx_ring
->stats
.packets
+= total_packets
;
829 tx_ring
->stats
.bytes
+= total_bytes
;
830 u64_stats_update_end(&tx_ring
->syncp
);
831 return count
< tx_ring
->work_limit
;
834 #ifdef CONFIG_IXGBE_DCA
835 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
836 struct ixgbe_ring
*rx_ring
)
840 int q
= rx_ring
->reg_idx
;
842 if (rx_ring
->cpu
!= cpu
) {
843 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
844 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
845 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
846 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
847 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
848 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599
;
849 rxctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
850 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
);
852 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
853 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
854 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN
);
855 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN
|
856 IXGBE_DCA_RXCTRL_DESC_HSRO_EN
);
857 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
863 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
864 struct ixgbe_ring
*tx_ring
)
868 int q
= tx_ring
->reg_idx
;
869 struct ixgbe_hw
*hw
= &adapter
->hw
;
871 if (tx_ring
->cpu
!= cpu
) {
872 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
873 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(q
));
874 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
875 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
876 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
877 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
878 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
879 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
));
880 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599
;
881 txctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
882 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
);
883 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
884 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL_82599(q
), txctrl
);
891 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
895 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
898 /* always use CB2 mode, difference is masked in the CB driver */
899 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
901 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
902 adapter
->tx_ring
[i
]->cpu
= -1;
903 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
[i
]);
905 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
906 adapter
->rx_ring
[i
]->cpu
= -1;
907 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
[i
]);
911 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
913 struct net_device
*netdev
= dev_get_drvdata(dev
);
914 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
915 unsigned long event
= *(unsigned long *)data
;
918 case DCA_PROVIDER_ADD
:
919 /* if we're already enabled, don't do it again */
920 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
922 if (dca_add_requester(dev
) == 0) {
923 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
924 ixgbe_setup_dca(adapter
);
927 /* Fall Through since DCA is disabled. */
928 case DCA_PROVIDER_REMOVE
:
929 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
930 dca_remove_requester(dev
);
931 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
932 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
940 #endif /* CONFIG_IXGBE_DCA */
942 * ixgbe_receive_skb - Send a completed packet up the stack
943 * @adapter: board private structure
944 * @skb: packet to send up
945 * @status: hardware indication of status of receive
946 * @rx_ring: rx descriptor ring (for a specific queue) to setup
947 * @rx_desc: rx descriptor
949 static void ixgbe_receive_skb(struct ixgbe_q_vector
*q_vector
,
950 struct sk_buff
*skb
, u8 status
,
951 struct ixgbe_ring
*ring
,
952 union ixgbe_adv_rx_desc
*rx_desc
)
954 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
955 struct napi_struct
*napi
= &q_vector
->napi
;
956 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
957 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
959 if (is_vlan
&& (tag
& VLAN_VID_MASK
))
960 __vlan_hwaccel_put_tag(skb
, tag
);
962 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
963 napi_gro_receive(napi
, skb
);
969 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
970 * @adapter: address of board private structure
971 * @status_err: hardware indication of status of receive
972 * @skb: skb currently being received and modified
974 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
975 union ixgbe_adv_rx_desc
*rx_desc
,
978 u32 status_err
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
980 skb_checksum_none_assert(skb
);
982 /* Rx csum disabled */
983 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
986 /* if IP and error */
987 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
988 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
989 adapter
->hw_csum_rx_error
++;
993 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
996 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
997 u16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1000 * 82599 errata, UDP frames with a 0 checksum can be marked as
1003 if ((pkt_info
& IXGBE_RXDADV_PKTTYPE_UDP
) &&
1004 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
))
1007 adapter
->hw_csum_rx_error
++;
1011 /* It must be a TCP or UDP packet with a valid checksum */
1012 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1015 static inline void ixgbe_release_rx_desc(struct ixgbe_hw
*hw
,
1016 struct ixgbe_ring
*rx_ring
, u32 val
)
1019 * Force memory writes to complete before letting h/w
1020 * know there are new descriptors to fetch. (Only
1021 * applicable for weak-ordered memory model archs,
1025 IXGBE_WRITE_REG(hw
, IXGBE_RDT(rx_ring
->reg_idx
), val
);
1029 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
1030 * @adapter: address of board private structure
1032 void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
1033 struct ixgbe_ring
*rx_ring
,
1036 struct net_device
*netdev
= adapter
->netdev
;
1037 struct pci_dev
*pdev
= adapter
->pdev
;
1038 union ixgbe_adv_rx_desc
*rx_desc
;
1039 struct ixgbe_rx_buffer
*bi
;
1041 unsigned int bufsz
= rx_ring
->rx_buf_len
;
1043 i
= rx_ring
->next_to_use
;
1044 bi
= &rx_ring
->rx_buffer_info
[i
];
1046 while (cleaned_count
--) {
1047 rx_desc
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
1049 if (!bi
->page_dma
&&
1050 (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
)) {
1052 bi
->page
= netdev_alloc_page(netdev
);
1054 adapter
->alloc_rx_page_failed
++;
1057 bi
->page_offset
= 0;
1059 /* use a half page if we're re-using */
1060 bi
->page_offset
^= (PAGE_SIZE
/ 2);
1063 bi
->page_dma
= dma_map_page(&pdev
->dev
, bi
->page
,
1070 struct sk_buff
*skb
= netdev_alloc_skb_ip_align(netdev
,
1075 adapter
->alloc_rx_buff_failed
++;
1078 /* initialize queue mapping */
1079 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1083 bi
->dma
= dma_map_single(&pdev
->dev
,
1085 rx_ring
->rx_buf_len
,
1088 /* Refresh the desc even if buffer_addrs didn't change because
1089 * each write-back erases this info. */
1090 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1091 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
1092 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
1094 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
1095 rx_desc
->read
.hdr_addr
= 0;
1099 if (i
== rx_ring
->count
)
1101 bi
= &rx_ring
->rx_buffer_info
[i
];
1105 if (rx_ring
->next_to_use
!= i
) {
1106 rx_ring
->next_to_use
= i
;
1108 i
= (rx_ring
->count
- 1);
1110 ixgbe_release_rx_desc(&adapter
->hw
, rx_ring
, i
);
1114 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
1116 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
1119 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
1121 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1124 static inline u32
ixgbe_get_rsc_count(union ixgbe_adv_rx_desc
*rx_desc
)
1126 return (le32_to_cpu(rx_desc
->wb
.lower
.lo_dword
.data
) &
1127 IXGBE_RXDADV_RSCCNT_MASK
) >>
1128 IXGBE_RXDADV_RSCCNT_SHIFT
;
1132 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
1133 * @skb: pointer to the last skb in the rsc queue
1134 * @count: pointer to number of packets coalesced in this context
1136 * This function changes a queue full of hw rsc buffers into a completed
1137 * packet. It uses the ->prev pointers to find the first packet and then
1138 * turns it into the frag list owner.
1140 static inline struct sk_buff
*ixgbe_transform_rsc_queue(struct sk_buff
*skb
,
1143 unsigned int frag_list_size
= 0;
1146 struct sk_buff
*prev
= skb
->prev
;
1147 frag_list_size
+= skb
->len
;
1153 skb_shinfo(skb
)->frag_list
= skb
->next
;
1155 skb
->len
+= frag_list_size
;
1156 skb
->data_len
+= frag_list_size
;
1157 skb
->truesize
+= frag_list_size
;
1161 struct ixgbe_rsc_cb
{
1166 #define IXGBE_RSC_CB(skb) ((struct ixgbe_rsc_cb *)(skb)->cb)
1168 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1169 struct ixgbe_ring
*rx_ring
,
1170 int *work_done
, int work_to_do
)
1172 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1173 struct pci_dev
*pdev
= adapter
->pdev
;
1174 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
1175 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
1176 struct sk_buff
*skb
;
1177 unsigned int i
, rsc_count
= 0;
1180 bool cleaned
= false;
1181 int cleaned_count
= 0;
1182 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1185 #endif /* IXGBE_FCOE */
1187 i
= rx_ring
->next_to_clean
;
1188 rx_desc
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
1189 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1190 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1192 while (staterr
& IXGBE_RXD_STAT_DD
) {
1194 if (*work_done
>= work_to_do
)
1198 rmb(); /* read descriptor and rx_buffer_info after status DD */
1199 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1200 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
1201 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
1202 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
1203 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1204 if ((len
> IXGBE_RX_HDR_SIZE
) ||
1205 (upper_len
&& !(hdr_info
& IXGBE_RXDADV_SPH
)))
1206 len
= IXGBE_RX_HDR_SIZE
;
1208 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1212 skb
= rx_buffer_info
->skb
;
1213 prefetch(skb
->data
);
1214 rx_buffer_info
->skb
= NULL
;
1216 if (rx_buffer_info
->dma
) {
1217 if ((adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) &&
1218 (!(staterr
& IXGBE_RXD_STAT_EOP
)) &&
1221 * When HWRSC is enabled, delay unmapping
1222 * of the first packet. It carries the
1223 * header information, HW may still
1224 * access the header after the writeback.
1225 * Only unmap it when EOP is reached
1227 IXGBE_RSC_CB(skb
)->delay_unmap
= true;
1228 IXGBE_RSC_CB(skb
)->dma
= rx_buffer_info
->dma
;
1230 dma_unmap_single(&pdev
->dev
,
1231 rx_buffer_info
->dma
,
1232 rx_ring
->rx_buf_len
,
1235 rx_buffer_info
->dma
= 0;
1240 dma_unmap_page(&pdev
->dev
, rx_buffer_info
->page_dma
,
1241 PAGE_SIZE
/ 2, DMA_FROM_DEVICE
);
1242 rx_buffer_info
->page_dma
= 0;
1243 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
1244 rx_buffer_info
->page
,
1245 rx_buffer_info
->page_offset
,
1248 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
1249 (page_count(rx_buffer_info
->page
) != 1))
1250 rx_buffer_info
->page
= NULL
;
1252 get_page(rx_buffer_info
->page
);
1254 skb
->len
+= upper_len
;
1255 skb
->data_len
+= upper_len
;
1256 skb
->truesize
+= upper_len
;
1260 if (i
== rx_ring
->count
)
1263 next_rxd
= IXGBE_RX_DESC_ADV(rx_ring
, i
);
1267 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
1268 rsc_count
= ixgbe_get_rsc_count(rx_desc
);
1271 u32 nextp
= (staterr
& IXGBE_RXDADV_NEXTP_MASK
) >>
1272 IXGBE_RXDADV_NEXTP_SHIFT
;
1273 next_buffer
= &rx_ring
->rx_buffer_info
[nextp
];
1275 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
1278 if (staterr
& IXGBE_RXD_STAT_EOP
) {
1280 skb
= ixgbe_transform_rsc_queue(skb
,
1281 &(rx_ring
->rsc_count
));
1282 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
1283 if (IXGBE_RSC_CB(skb
)->delay_unmap
) {
1284 dma_unmap_single(&pdev
->dev
,
1285 IXGBE_RSC_CB(skb
)->dma
,
1286 rx_ring
->rx_buf_len
,
1288 IXGBE_RSC_CB(skb
)->dma
= 0;
1289 IXGBE_RSC_CB(skb
)->delay_unmap
= false;
1291 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
)
1292 rx_ring
->rsc_count
+=
1293 skb_shinfo(skb
)->nr_frags
;
1295 rx_ring
->rsc_count
++;
1296 rx_ring
->rsc_flush
++;
1298 u64_stats_update_begin(&rx_ring
->syncp
);
1299 rx_ring
->stats
.packets
++;
1300 rx_ring
->stats
.bytes
+= skb
->len
;
1301 u64_stats_update_end(&rx_ring
->syncp
);
1303 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
1304 rx_buffer_info
->skb
= next_buffer
->skb
;
1305 rx_buffer_info
->dma
= next_buffer
->dma
;
1306 next_buffer
->skb
= skb
;
1307 next_buffer
->dma
= 0;
1309 skb
->next
= next_buffer
->skb
;
1310 skb
->next
->prev
= skb
;
1312 rx_ring
->non_eop_descs
++;
1316 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
1317 dev_kfree_skb_irq(skb
);
1321 ixgbe_rx_checksum(adapter
, rx_desc
, skb
);
1323 /* probably a little skewed due to removing CRC */
1324 total_rx_bytes
+= skb
->len
;
1327 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
1329 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1330 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
1331 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
1335 #endif /* IXGBE_FCOE */
1336 ixgbe_receive_skb(q_vector
, skb
, staterr
, rx_ring
, rx_desc
);
1339 rx_desc
->wb
.upper
.status_error
= 0;
1341 /* return some buffers to hardware, one at a time is too slow */
1342 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
1343 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
1347 /* use prefetched values */
1349 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1351 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1354 rx_ring
->next_to_clean
= i
;
1355 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
1358 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
1361 /* include DDPed FCoE data */
1362 if (ddp_bytes
> 0) {
1365 mss
= adapter
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
1366 sizeof(struct fc_frame_header
) -
1367 sizeof(struct fcoe_crc_eof
);
1370 total_rx_bytes
+= ddp_bytes
;
1371 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
1373 #endif /* IXGBE_FCOE */
1375 rx_ring
->total_packets
+= total_rx_packets
;
1376 rx_ring
->total_bytes
+= total_rx_bytes
;
1381 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
1383 * ixgbe_configure_msix - Configure MSI-X hardware
1384 * @adapter: board private structure
1386 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1389 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
1391 struct ixgbe_q_vector
*q_vector
;
1392 int i
, j
, q_vectors
, v_idx
, r_idx
;
1395 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1398 * Populate the IVAR table and set the ITR values to the
1399 * corresponding register.
1401 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
1402 q_vector
= adapter
->q_vector
[v_idx
];
1403 /* XXX for_each_set_bit(...) */
1404 r_idx
= find_first_bit(q_vector
->rxr_idx
,
1405 adapter
->num_rx_queues
);
1407 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1408 j
= adapter
->rx_ring
[r_idx
]->reg_idx
;
1409 ixgbe_set_ivar(adapter
, 0, j
, v_idx
);
1410 r_idx
= find_next_bit(q_vector
->rxr_idx
,
1411 adapter
->num_rx_queues
,
1414 r_idx
= find_first_bit(q_vector
->txr_idx
,
1415 adapter
->num_tx_queues
);
1417 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1418 j
= adapter
->tx_ring
[r_idx
]->reg_idx
;
1419 ixgbe_set_ivar(adapter
, 1, j
, v_idx
);
1420 r_idx
= find_next_bit(q_vector
->txr_idx
,
1421 adapter
->num_tx_queues
,
1425 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
1427 q_vector
->eitr
= adapter
->tx_eitr_param
;
1428 else if (q_vector
->rxr_count
)
1430 q_vector
->eitr
= adapter
->rx_eitr_param
;
1432 ixgbe_write_eitr(q_vector
);
1433 /* If Flow Director is enabled, set interrupt affinity */
1434 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
1435 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)) {
1437 * Allocate the affinity_hint cpumask, assign the mask
1438 * for this vector, and set our affinity_hint for
1441 if (!alloc_cpumask_var(&q_vector
->affinity_mask
,
1444 cpumask_set_cpu(v_idx
, q_vector
->affinity_mask
);
1445 irq_set_affinity_hint(adapter
->msix_entries
[v_idx
].vector
,
1446 q_vector
->affinity_mask
);
1450 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
1451 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
1453 else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
1454 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
1455 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1457 /* set up to autoclear timer, and the vectors */
1458 mask
= IXGBE_EIMS_ENABLE_MASK
;
1459 if (adapter
->num_vfs
)
1460 mask
&= ~(IXGBE_EIMS_OTHER
|
1461 IXGBE_EIMS_MAILBOX
|
1464 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
1465 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1468 enum latency_range
{
1472 latency_invalid
= 255
1476 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1477 * @adapter: pointer to adapter
1478 * @eitr: eitr setting (ints per sec) to give last timeslice
1479 * @itr_setting: current throttle rate in ints/second
1480 * @packets: the number of packets during this measurement interval
1481 * @bytes: the number of bytes during this measurement interval
1483 * Stores a new ITR value based on packets and byte
1484 * counts during the last interrupt. The advantage of per interrupt
1485 * computation is faster updates and more accurate ITR for the current
1486 * traffic pattern. Constants in this function were computed
1487 * based on theoretical maximum wire speed and thresholds were set based
1488 * on testing data as well as attempting to minimize response time
1489 * while increasing bulk throughput.
1490 * this functionality is controlled by the InterruptThrottleRate module
1491 * parameter (see ixgbe_param.c)
1493 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
1494 u32 eitr
, u8 itr_setting
,
1495 int packets
, int bytes
)
1497 unsigned int retval
= itr_setting
;
1502 goto update_itr_done
;
1505 /* simple throttlerate management
1506 * 0-20MB/s lowest (100000 ints/s)
1507 * 20-100MB/s low (20000 ints/s)
1508 * 100-1249MB/s bulk (8000 ints/s)
1510 /* what was last interrupt timeslice? */
1511 timepassed_us
= 1000000/eitr
;
1512 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
1514 switch (itr_setting
) {
1515 case lowest_latency
:
1516 if (bytes_perint
> adapter
->eitr_low
)
1517 retval
= low_latency
;
1520 if (bytes_perint
> adapter
->eitr_high
)
1521 retval
= bulk_latency
;
1522 else if (bytes_perint
<= adapter
->eitr_low
)
1523 retval
= lowest_latency
;
1526 if (bytes_perint
<= adapter
->eitr_high
)
1527 retval
= low_latency
;
1536 * ixgbe_write_eitr - write EITR register in hardware specific way
1537 * @q_vector: structure containing interrupt and ring information
1539 * This function is made to be called by ethtool and by the driver
1540 * when it needs to update EITR registers at runtime. Hardware
1541 * specific quirks/differences are taken care of here.
1543 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1545 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1546 struct ixgbe_hw
*hw
= &adapter
->hw
;
1547 int v_idx
= q_vector
->v_idx
;
1548 u32 itr_reg
= EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
);
1550 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1551 /* must write high and low 16 bits to reset counter */
1552 itr_reg
|= (itr_reg
<< 16);
1553 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1555 * 82599 can support a value of zero, so allow it for
1556 * max interrupt rate, but there is an errata where it can
1557 * not be zero with RSC
1560 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
1564 * set the WDIS bit to not clear the timer bits and cause an
1565 * immediate assertion of the interrupt
1567 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1569 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1572 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
1574 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1576 u8 current_itr
, ret_itr
;
1578 struct ixgbe_ring
*rx_ring
, *tx_ring
;
1580 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1581 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1582 tx_ring
= adapter
->tx_ring
[r_idx
];
1583 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1585 tx_ring
->total_packets
,
1586 tx_ring
->total_bytes
);
1587 /* if the result for this queue would decrease interrupt
1588 * rate for this vector then use that result */
1589 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
1590 q_vector
->tx_itr
- 1 : ret_itr
);
1591 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1595 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1596 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1597 rx_ring
= adapter
->rx_ring
[r_idx
];
1598 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
1600 rx_ring
->total_packets
,
1601 rx_ring
->total_bytes
);
1602 /* if the result for this queue would decrease interrupt
1603 * rate for this vector then use that result */
1604 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
1605 q_vector
->rx_itr
- 1 : ret_itr
);
1606 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1610 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1612 switch (current_itr
) {
1613 /* counts and packets in update_itr are dependent on these numbers */
1614 case lowest_latency
:
1618 new_itr
= 20000; /* aka hwitr = ~200 */
1626 if (new_itr
!= q_vector
->eitr
) {
1627 /* do an exponential smoothing */
1628 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1630 /* save the algorithm value here, not the smoothed one */
1631 q_vector
->eitr
= new_itr
;
1633 ixgbe_write_eitr(q_vector
);
1638 * ixgbe_check_overtemp_task - worker thread to check over tempurature
1639 * @work: pointer to work_struct containing our data
1641 static void ixgbe_check_overtemp_task(struct work_struct
*work
)
1643 struct ixgbe_adapter
*adapter
= container_of(work
,
1644 struct ixgbe_adapter
,
1645 check_overtemp_task
);
1646 struct ixgbe_hw
*hw
= &adapter
->hw
;
1647 u32 eicr
= adapter
->interrupt_event
;
1649 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
1652 switch (hw
->device_id
) {
1653 case IXGBE_DEV_ID_82599_T3_LOM
: {
1655 bool link_up
= false;
1657 if (hw
->mac
.ops
.check_link
)
1658 hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
1660 if (((eicr
& IXGBE_EICR_GPI_SDP0
) && (!link_up
)) ||
1661 (eicr
& IXGBE_EICR_LSC
))
1662 /* Check if this is due to overtemp */
1663 if (hw
->phy
.ops
.check_overtemp(hw
) == IXGBE_ERR_OVERTEMP
)
1668 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
1673 "Network adapter has been stopped because it has over heated. "
1674 "Restart the computer. If the problem persists, "
1675 "power off the system and replace the adapter\n");
1676 /* write to clear the interrupt */
1677 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP0
);
1680 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
1682 struct ixgbe_hw
*hw
= &adapter
->hw
;
1684 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
1685 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
1686 e_crit(probe
, "Fan has stopped, replace the adapter\n");
1687 /* write to clear the interrupt */
1688 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1692 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
1694 struct ixgbe_hw
*hw
= &adapter
->hw
;
1696 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
1697 /* Clear the interrupt */
1698 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1699 schedule_work(&adapter
->multispeed_fiber_task
);
1700 } else if (eicr
& IXGBE_EICR_GPI_SDP2
) {
1701 /* Clear the interrupt */
1702 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
1703 schedule_work(&adapter
->sfp_config_module_task
);
1705 /* Interrupt isn't for us... */
1710 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
1712 struct ixgbe_hw
*hw
= &adapter
->hw
;
1715 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1716 adapter
->link_check_timeout
= jiffies
;
1717 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1718 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
1719 IXGBE_WRITE_FLUSH(hw
);
1720 schedule_work(&adapter
->watchdog_task
);
1724 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
1726 struct net_device
*netdev
= data
;
1727 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1728 struct ixgbe_hw
*hw
= &adapter
->hw
;
1732 * Workaround for Silicon errata. Use clear-by-write instead
1733 * of clear-by-read. Reading with EICS will return the
1734 * interrupt causes without clearing, which later be done
1735 * with the write to EICR.
1737 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
1738 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
1740 if (eicr
& IXGBE_EICR_LSC
)
1741 ixgbe_check_lsc(adapter
);
1743 if (eicr
& IXGBE_EICR_MAILBOX
)
1744 ixgbe_msg_task(adapter
);
1746 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1747 ixgbe_check_fan_failure(adapter
, eicr
);
1749 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1750 ixgbe_check_sfp_event(adapter
, eicr
);
1751 adapter
->interrupt_event
= eicr
;
1752 if ((adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
1753 ((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)))
1754 schedule_work(&adapter
->check_overtemp_task
);
1756 /* Handle Flow Director Full threshold interrupt */
1757 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
1759 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_FLOW_DIR
);
1760 /* Disable transmits before FDIR Re-initialization */
1761 netif_tx_stop_all_queues(netdev
);
1762 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1763 struct ixgbe_ring
*tx_ring
=
1764 adapter
->tx_ring
[i
];
1765 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE
,
1766 &tx_ring
->reinit_state
))
1767 schedule_work(&adapter
->fdir_reinit_task
);
1771 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1772 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
1777 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
1782 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1783 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1784 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1786 mask
= (qmask
& 0xFFFFFFFF);
1787 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(0), mask
);
1788 mask
= (qmask
>> 32);
1789 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1), mask
);
1791 /* skip the flush */
1794 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
1799 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1800 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
1801 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, mask
);
1803 mask
= (qmask
& 0xFFFFFFFF);
1804 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), mask
);
1805 mask
= (qmask
>> 32);
1806 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), mask
);
1808 /* skip the flush */
1811 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
1813 struct ixgbe_q_vector
*q_vector
= data
;
1814 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1815 struct ixgbe_ring
*tx_ring
;
1818 if (!q_vector
->txr_count
)
1821 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1822 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1823 tx_ring
= adapter
->tx_ring
[r_idx
];
1824 tx_ring
->total_bytes
= 0;
1825 tx_ring
->total_packets
= 0;
1826 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1830 /* EIAM disabled interrupts (on this vector) for us */
1831 napi_schedule(&q_vector
->napi
);
1837 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1839 * @data: pointer to our q_vector struct for this interrupt vector
1841 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
1843 struct ixgbe_q_vector
*q_vector
= data
;
1844 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1845 struct ixgbe_ring
*rx_ring
;
1849 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1850 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1851 rx_ring
= adapter
->rx_ring
[r_idx
];
1852 rx_ring
->total_bytes
= 0;
1853 rx_ring
->total_packets
= 0;
1854 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1858 if (!q_vector
->rxr_count
)
1861 /* disable interrupts on this vector only */
1862 /* EIAM disabled interrupts (on this vector) for us */
1863 napi_schedule(&q_vector
->napi
);
1868 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1870 struct ixgbe_q_vector
*q_vector
= data
;
1871 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1872 struct ixgbe_ring
*ring
;
1876 if (!q_vector
->txr_count
&& !q_vector
->rxr_count
)
1879 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1880 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1881 ring
= adapter
->tx_ring
[r_idx
];
1882 ring
->total_bytes
= 0;
1883 ring
->total_packets
= 0;
1884 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1888 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1889 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1890 ring
= adapter
->rx_ring
[r_idx
];
1891 ring
->total_bytes
= 0;
1892 ring
->total_packets
= 0;
1893 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1897 /* EIAM disabled interrupts (on this vector) for us */
1898 napi_schedule(&q_vector
->napi
);
1904 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1905 * @napi: napi struct with our devices info in it
1906 * @budget: amount of work driver is allowed to do this pass, in packets
1908 * This function is optimized for cleaning one queue only on a single
1911 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1913 struct ixgbe_q_vector
*q_vector
=
1914 container_of(napi
, struct ixgbe_q_vector
, napi
);
1915 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1916 struct ixgbe_ring
*rx_ring
= NULL
;
1920 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1921 rx_ring
= adapter
->rx_ring
[r_idx
];
1922 #ifdef CONFIG_IXGBE_DCA
1923 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1924 ixgbe_update_rx_dca(adapter
, rx_ring
);
1927 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1929 /* If all Rx work done, exit the polling mode */
1930 if (work_done
< budget
) {
1931 napi_complete(napi
);
1932 if (adapter
->rx_itr_setting
& 1)
1933 ixgbe_set_itr_msix(q_vector
);
1934 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1935 ixgbe_irq_enable_queues(adapter
,
1936 ((u64
)1 << q_vector
->v_idx
));
1943 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
1944 * @napi: napi struct with our devices info in it
1945 * @budget: amount of work driver is allowed to do this pass, in packets
1947 * This function will clean more than one rx queue associated with a
1950 static int ixgbe_clean_rxtx_many(struct napi_struct
*napi
, int budget
)
1952 struct ixgbe_q_vector
*q_vector
=
1953 container_of(napi
, struct ixgbe_q_vector
, napi
);
1954 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1955 struct ixgbe_ring
*ring
= NULL
;
1956 int work_done
= 0, i
;
1958 bool tx_clean_complete
= true;
1960 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1961 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1962 ring
= adapter
->tx_ring
[r_idx
];
1963 #ifdef CONFIG_IXGBE_DCA
1964 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1965 ixgbe_update_tx_dca(adapter
, ring
);
1967 tx_clean_complete
&= ixgbe_clean_tx_irq(q_vector
, ring
);
1968 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1972 /* attempt to distribute budget to each queue fairly, but don't allow
1973 * the budget to go below 1 because we'll exit polling */
1974 budget
/= (q_vector
->rxr_count
?: 1);
1975 budget
= max(budget
, 1);
1976 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1977 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1978 ring
= adapter
->rx_ring
[r_idx
];
1979 #ifdef CONFIG_IXGBE_DCA
1980 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1981 ixgbe_update_rx_dca(adapter
, ring
);
1983 ixgbe_clean_rx_irq(q_vector
, ring
, &work_done
, budget
);
1984 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1988 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1989 ring
= adapter
->rx_ring
[r_idx
];
1990 /* If all Rx work done, exit the polling mode */
1991 if (work_done
< budget
) {
1992 napi_complete(napi
);
1993 if (adapter
->rx_itr_setting
& 1)
1994 ixgbe_set_itr_msix(q_vector
);
1995 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1996 ixgbe_irq_enable_queues(adapter
,
1997 ((u64
)1 << q_vector
->v_idx
));
2005 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
2006 * @napi: napi struct with our devices info in it
2007 * @budget: amount of work driver is allowed to do this pass, in packets
2009 * This function is optimized for cleaning one queue only on a single
2012 static int ixgbe_clean_txonly(struct napi_struct
*napi
, int budget
)
2014 struct ixgbe_q_vector
*q_vector
=
2015 container_of(napi
, struct ixgbe_q_vector
, napi
);
2016 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2017 struct ixgbe_ring
*tx_ring
= NULL
;
2021 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
2022 tx_ring
= adapter
->tx_ring
[r_idx
];
2023 #ifdef CONFIG_IXGBE_DCA
2024 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2025 ixgbe_update_tx_dca(adapter
, tx_ring
);
2028 if (!ixgbe_clean_tx_irq(q_vector
, tx_ring
))
2031 /* If all Tx work done, exit the polling mode */
2032 if (work_done
< budget
) {
2033 napi_complete(napi
);
2034 if (adapter
->tx_itr_setting
& 1)
2035 ixgbe_set_itr_msix(q_vector
);
2036 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2037 ixgbe_irq_enable_queues(adapter
,
2038 ((u64
)1 << q_vector
->v_idx
));
2044 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
2047 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
2049 set_bit(r_idx
, q_vector
->rxr_idx
);
2050 q_vector
->rxr_count
++;
2053 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
2056 struct ixgbe_q_vector
*q_vector
= a
->q_vector
[v_idx
];
2058 set_bit(t_idx
, q_vector
->txr_idx
);
2059 q_vector
->txr_count
++;
2063 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
2064 * @adapter: board private structure to initialize
2065 * @vectors: allotted vector count for descriptor rings
2067 * This function maps descriptor rings to the queue-specific vectors
2068 * we were allotted through the MSI-X enabling code. Ideally, we'd have
2069 * one vector per ring/queue, but on a constrained vector budget, we
2070 * group the rings as "efficiently" as possible. You would add new
2071 * mapping configurations in here.
2073 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
2077 int rxr_idx
= 0, txr_idx
= 0;
2078 int rxr_remaining
= adapter
->num_rx_queues
;
2079 int txr_remaining
= adapter
->num_tx_queues
;
2084 /* No mapping required if MSI-X is disabled. */
2085 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2089 * The ideal configuration...
2090 * We have enough vectors to map one per queue.
2092 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
2093 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
2094 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
2096 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
2097 map_vector_to_txq(adapter
, v_start
, txr_idx
);
2103 * If we don't have enough vectors for a 1-to-1
2104 * mapping, we'll have to group them so there are
2105 * multiple queues per vector.
2107 /* Re-adjusting *qpv takes care of the remainder. */
2108 for (i
= v_start
; i
< vectors
; i
++) {
2109 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
2110 for (j
= 0; j
< rqpv
; j
++) {
2111 map_vector_to_rxq(adapter
, i
, rxr_idx
);
2116 for (i
= v_start
; i
< vectors
; i
++) {
2117 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
2118 for (j
= 0; j
< tqpv
; j
++) {
2119 map_vector_to_txq(adapter
, i
, txr_idx
);
2130 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2131 * @adapter: board private structure
2133 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2134 * interrupts from the kernel.
2136 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2138 struct net_device
*netdev
= adapter
->netdev
;
2139 irqreturn_t (*handler
)(int, void *);
2140 int i
, vector
, q_vectors
, err
;
2143 /* Decrement for Other and TCP Timer vectors */
2144 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2146 /* Map the Tx/Rx rings to the vectors we were allotted. */
2147 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
2151 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
2152 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
2153 &ixgbe_msix_clean_many)
2154 for (vector
= 0; vector
< q_vectors
; vector
++) {
2155 handler
= SET_HANDLER(adapter
->q_vector
[vector
]);
2157 if (handler
== &ixgbe_msix_clean_rx
) {
2158 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2159 netdev
->name
, "rx", ri
++);
2160 } else if (handler
== &ixgbe_msix_clean_tx
) {
2161 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2162 netdev
->name
, "tx", ti
++);
2164 sprintf(adapter
->name
[vector
], "%s-%s-%d",
2165 netdev
->name
, "TxRx", vector
);
2167 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2168 handler
, 0, adapter
->name
[vector
],
2169 adapter
->q_vector
[vector
]);
2171 e_err(probe
, "request_irq failed for MSIX interrupt "
2172 "Error: %d\n", err
);
2173 goto free_queue_irqs
;
2177 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
2178 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2179 ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
2181 e_err(probe
, "request_irq for msix_lsc failed: %d\n", err
);
2182 goto free_queue_irqs
;
2188 for (i
= vector
- 1; i
>= 0; i
--)
2189 free_irq(adapter
->msix_entries
[--vector
].vector
,
2190 adapter
->q_vector
[i
]);
2191 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2192 pci_disable_msix(adapter
->pdev
);
2193 kfree(adapter
->msix_entries
);
2194 adapter
->msix_entries
= NULL
;
2199 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
2201 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2203 u32 new_itr
= q_vector
->eitr
;
2204 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[0];
2205 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[0];
2207 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
2209 tx_ring
->total_packets
,
2210 tx_ring
->total_bytes
);
2211 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
2213 rx_ring
->total_packets
,
2214 rx_ring
->total_bytes
);
2216 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
2218 switch (current_itr
) {
2219 /* counts and packets in update_itr are dependent on these numbers */
2220 case lowest_latency
:
2224 new_itr
= 20000; /* aka hwitr = ~200 */
2233 if (new_itr
!= q_vector
->eitr
) {
2234 /* do an exponential smoothing */
2235 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
2237 /* save the algorithm value here, not the smoothed one */
2238 q_vector
->eitr
= new_itr
;
2240 ixgbe_write_eitr(q_vector
);
2245 * ixgbe_irq_enable - Enable default interrupt generation settings
2246 * @adapter: board private structure
2248 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2253 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2254 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2255 mask
|= IXGBE_EIMS_GPI_SDP0
;
2256 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2257 mask
|= IXGBE_EIMS_GPI_SDP1
;
2258 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
2259 mask
|= IXGBE_EIMS_ECC
;
2260 mask
|= IXGBE_EIMS_GPI_SDP1
;
2261 mask
|= IXGBE_EIMS_GPI_SDP2
;
2262 if (adapter
->num_vfs
)
2263 mask
|= IXGBE_EIMS_MAILBOX
;
2265 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
2266 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
2267 mask
|= IXGBE_EIMS_FLOW_DIR
;
2269 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2271 ixgbe_irq_enable_queues(adapter
, ~0);
2273 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2275 if (adapter
->num_vfs
> 32) {
2276 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2277 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2282 * ixgbe_intr - legacy mode Interrupt Handler
2283 * @irq: interrupt number
2284 * @data: pointer to a network interface device structure
2286 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2288 struct net_device
*netdev
= data
;
2289 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2290 struct ixgbe_hw
*hw
= &adapter
->hw
;
2291 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2295 * Workaround for silicon errata on 82598. Mask the interrupts
2296 * before the read of EICR.
2298 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2300 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2301 * therefore no explict interrupt disable is necessary */
2302 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2305 * shared interrupt alert!
2306 * make sure interrupts are enabled because the read will
2307 * have disabled interrupts due to EIAM
2308 * finish the workaround of silicon errata on 82598. Unmask
2309 * the interrupt that we masked before the EICR read.
2311 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2312 ixgbe_irq_enable(adapter
, true, true);
2313 return IRQ_NONE
; /* Not our interrupt */
2316 if (eicr
& IXGBE_EICR_LSC
)
2317 ixgbe_check_lsc(adapter
);
2319 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2320 ixgbe_check_sfp_event(adapter
, eicr
);
2322 ixgbe_check_fan_failure(adapter
, eicr
);
2323 if ((adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2324 ((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)))
2325 schedule_work(&adapter
->check_overtemp_task
);
2327 if (napi_schedule_prep(&(q_vector
->napi
))) {
2328 adapter
->tx_ring
[0]->total_packets
= 0;
2329 adapter
->tx_ring
[0]->total_bytes
= 0;
2330 adapter
->rx_ring
[0]->total_packets
= 0;
2331 adapter
->rx_ring
[0]->total_bytes
= 0;
2332 /* would disable interrupts here but EIAM disabled it */
2333 __napi_schedule(&(q_vector
->napi
));
2337 * re-enable link(maybe) and non-queue interrupts, no flush.
2338 * ixgbe_poll will re-enable the queue interrupts
2341 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2342 ixgbe_irq_enable(adapter
, false, false);
2347 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
2349 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2351 for (i
= 0; i
< q_vectors
; i
++) {
2352 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
2353 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
2354 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
2355 q_vector
->rxr_count
= 0;
2356 q_vector
->txr_count
= 0;
2361 * ixgbe_request_irq - initialize interrupts
2362 * @adapter: board private structure
2364 * Attempts to configure interrupts using the best available
2365 * capabilities of the hardware and kernel.
2367 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2369 struct net_device
*netdev
= adapter
->netdev
;
2372 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2373 err
= ixgbe_request_msix_irqs(adapter
);
2374 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2375 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2376 netdev
->name
, netdev
);
2378 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2379 netdev
->name
, netdev
);
2383 e_err(probe
, "request_irq failed, Error %d\n", err
);
2388 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2390 struct net_device
*netdev
= adapter
->netdev
;
2392 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2395 q_vectors
= adapter
->num_msix_vectors
;
2398 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
2401 for (; i
>= 0; i
--) {
2402 free_irq(adapter
->msix_entries
[i
].vector
,
2403 adapter
->q_vector
[i
]);
2406 ixgbe_reset_q_vectors(adapter
);
2408 free_irq(adapter
->pdev
->irq
, netdev
);
2413 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2414 * @adapter: board private structure
2416 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2418 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2419 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2421 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2422 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2423 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2424 if (adapter
->num_vfs
> 32)
2425 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
2427 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2428 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2430 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
2431 synchronize_irq(adapter
->msix_entries
[i
].vector
);
2433 synchronize_irq(adapter
->pdev
->irq
);
2438 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2441 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2443 struct ixgbe_hw
*hw
= &adapter
->hw
;
2445 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
2446 EITR_INTS_PER_SEC_TO_REG(adapter
->rx_eitr_param
));
2448 ixgbe_set_ivar(adapter
, 0, 0, 0);
2449 ixgbe_set_ivar(adapter
, 1, 0, 0);
2451 map_vector_to_rxq(adapter
, 0, 0);
2452 map_vector_to_txq(adapter
, 0, 0);
2454 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2458 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2459 * @adapter: board private structure
2460 * @ring: structure containing ring specific data
2462 * Configure the Tx descriptor ring after a reset.
2464 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2465 struct ixgbe_ring
*ring
)
2467 struct ixgbe_hw
*hw
= &adapter
->hw
;
2468 u64 tdba
= ring
->dma
;
2471 u16 reg_idx
= ring
->reg_idx
;
2473 /* disable queue to avoid issues while updating state */
2474 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2475 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
),
2476 txdctl
& ~IXGBE_TXDCTL_ENABLE
);
2477 IXGBE_WRITE_FLUSH(hw
);
2479 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2480 (tdba
& DMA_BIT_MASK(32)));
2481 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2482 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
2483 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
2484 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
2485 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
2486 ring
->head
= IXGBE_TDH(reg_idx
);
2487 ring
->tail
= IXGBE_TDT(reg_idx
);
2489 /* configure fetching thresholds */
2490 if (adapter
->rx_itr_setting
== 0) {
2491 /* cannot set wthresh when itr==0 */
2492 txdctl
&= ~0x007F0000;
2494 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2495 txdctl
|= (8 << 16);
2497 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2498 /* PThresh workaround for Tx hang with DFP enabled. */
2502 /* reinitialize flowdirector state */
2503 set_bit(__IXGBE_FDIR_INIT_DONE
, &ring
->reinit_state
);
2506 txdctl
|= IXGBE_TXDCTL_ENABLE
;
2507 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
2509 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2510 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2511 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2514 /* poll to verify queue is enabled */
2517 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2518 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
2520 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
2523 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
2525 struct ixgbe_hw
*hw
= &adapter
->hw
;
2529 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2532 /* disable the arbiter while setting MTQC */
2533 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
2534 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
2535 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2537 /* set transmit pool layout */
2538 mask
= (IXGBE_FLAG_SRIOV_ENABLED
| IXGBE_FLAG_DCB_ENABLED
);
2539 switch (adapter
->flags
& mask
) {
2541 case (IXGBE_FLAG_SRIOV_ENABLED
):
2542 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2543 (IXGBE_MTQC_VT_ENA
| IXGBE_MTQC_64VF
));
2546 case (IXGBE_FLAG_DCB_ENABLED
):
2547 /* We enable 8 traffic classes, DCB only */
2548 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2549 (IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
));
2553 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, IXGBE_MTQC_64Q_1PB
);
2557 /* re-enable the arbiter */
2558 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
2559 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2563 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2564 * @adapter: board private structure
2566 * Configure the Tx unit of the MAC after a reset.
2568 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
2570 struct ixgbe_hw
*hw
= &adapter
->hw
;
2574 ixgbe_setup_mtqc(adapter
);
2576 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
2577 /* DMATXCTL.EN must be before Tx queues are enabled */
2578 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2579 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2580 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2583 /* Setup the HW Tx Head and Tail descriptor pointers */
2584 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2585 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
2588 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2590 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
2591 struct ixgbe_ring
*rx_ring
)
2595 struct ixgbe_ring_feature
*feature
= adapter
->ring_feature
;
2597 index
= rx_ring
->reg_idx
;
2598 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2600 mask
= (unsigned long) feature
[RING_F_RSS
].mask
;
2601 index
= index
& mask
;
2603 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
2605 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
2606 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
2607 if (adapter
->num_vfs
)
2608 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
2610 srrctl
|= (IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
2611 IXGBE_SRRCTL_BSIZEHDR_MASK
;
2613 if (rx_ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2614 #if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
2615 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2617 srrctl
|= (PAGE_SIZE
/ 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2619 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2621 srrctl
|= ALIGN(rx_ring
->rx_buf_len
, 1024) >>
2622 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2623 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2626 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
2629 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2631 struct ixgbe_hw
*hw
= &adapter
->hw
;
2632 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2633 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2634 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2635 u32 mrqc
= 0, reta
= 0;
2640 /* Fill out hash function seeds */
2641 for (i
= 0; i
< 10; i
++)
2642 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2644 /* Fill out redirection table */
2645 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2646 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
2648 /* reta = 4-byte sliding window of
2649 * 0x00..(indices-1)(indices-1)00..etc. */
2650 reta
= (reta
<< 8) | (j
* 0x11);
2652 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2655 /* Disable indicating checksum in descriptor, enables RSS hash */
2656 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2657 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2658 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2660 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
2661 mask
= adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
;
2663 mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
2664 #ifdef CONFIG_IXGBE_DCB
2665 | IXGBE_FLAG_DCB_ENABLED
2667 | IXGBE_FLAG_SRIOV_ENABLED
2671 case (IXGBE_FLAG_RSS_ENABLED
):
2672 mrqc
= IXGBE_MRQC_RSSEN
;
2674 case (IXGBE_FLAG_SRIOV_ENABLED
):
2675 mrqc
= IXGBE_MRQC_VMDQEN
;
2677 #ifdef CONFIG_IXGBE_DCB
2678 case (IXGBE_FLAG_DCB_ENABLED
):
2679 mrqc
= IXGBE_MRQC_RT8TCEN
;
2681 #endif /* CONFIG_IXGBE_DCB */
2686 /* Perform hash on these packet types */
2687 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2688 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2689 | IXGBE_MRQC_RSS_FIELD_IPV6
2690 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
2692 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2696 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2697 * @adapter: address of board private structure
2698 * @index: index of ring to set
2700 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
2701 struct ixgbe_ring
*ring
)
2703 struct ixgbe_hw
*hw
= &adapter
->hw
;
2706 u16 reg_idx
= ring
->reg_idx
;
2708 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
2711 rx_buf_len
= ring
->rx_buf_len
;
2712 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
2713 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2715 * we must limit the number of descriptors so that the
2716 * total size of max desc * buf_len is not greater
2719 if (ring
->flags
& IXGBE_RING_RX_PS_ENABLED
) {
2720 #if (MAX_SKB_FRAGS > 16)
2721 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2722 #elif (MAX_SKB_FRAGS > 8)
2723 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2724 #elif (MAX_SKB_FRAGS > 4)
2725 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2727 rscctrl
|= IXGBE_RSCCTL_MAXDESC_1
;
2730 if (rx_buf_len
< IXGBE_RXBUFFER_4096
)
2731 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2732 else if (rx_buf_len
< IXGBE_RXBUFFER_8192
)
2733 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2735 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2737 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
2741 * ixgbe_set_uta - Set unicast filter table address
2742 * @adapter: board private structure
2744 * The unicast table address is a register array of 32-bit registers.
2745 * The table is meant to be used in a way similar to how the MTA is used
2746 * however due to certain limitations in the hardware it is necessary to
2747 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
2748 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
2750 static void ixgbe_set_uta(struct ixgbe_adapter
*adapter
)
2752 struct ixgbe_hw
*hw
= &adapter
->hw
;
2755 /* The UTA table only exists on 82599 hardware and newer */
2756 if (hw
->mac
.type
< ixgbe_mac_82599EB
)
2759 /* we only need to do this if VMDq is enabled */
2760 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
2763 for (i
= 0; i
< 128; i
++)
2764 IXGBE_WRITE_REG(hw
, IXGBE_UTA(i
), ~0);
2767 #define IXGBE_MAX_RX_DESC_POLL 10
2768 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2769 struct ixgbe_ring
*ring
)
2771 struct ixgbe_hw
*hw
= &adapter
->hw
;
2772 int reg_idx
= ring
->reg_idx
;
2773 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
2776 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2777 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2778 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2783 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2784 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
2787 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
2788 "the polling period\n", reg_idx
);
2792 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
2793 struct ixgbe_ring
*ring
)
2795 struct ixgbe_hw
*hw
= &adapter
->hw
;
2796 u64 rdba
= ring
->dma
;
2798 u16 reg_idx
= ring
->reg_idx
;
2800 /* disable queue to avoid issues while updating state */
2801 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2802 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
),
2803 rxdctl
& ~IXGBE_RXDCTL_ENABLE
);
2804 IXGBE_WRITE_FLUSH(hw
);
2806 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
2807 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
2808 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
2809 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
2810 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
2811 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
2812 ring
->head
= IXGBE_RDH(reg_idx
);
2813 ring
->tail
= IXGBE_RDT(reg_idx
);
2815 ixgbe_configure_srrctl(adapter
, ring
);
2816 ixgbe_configure_rscctl(adapter
, ring
);
2818 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2820 * enable cache line friendly hardware writes:
2821 * PTHRESH=32 descriptors (half the internal cache),
2822 * this also removes ugly rx_no_buffer_count increment
2823 * HTHRESH=4 descriptors (to minimize latency on fetch)
2824 * WTHRESH=8 burst writeback up to two cache lines
2826 rxdctl
&= ~0x3FFFFF;
2830 /* enable receive descriptor ring */
2831 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
2832 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
2834 ixgbe_rx_desc_queue_enable(adapter
, ring
);
2835 ixgbe_alloc_rx_buffers(adapter
, ring
, IXGBE_DESC_UNUSED(ring
));
2838 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
2840 struct ixgbe_hw
*hw
= &adapter
->hw
;
2843 /* PSRTYPE must be initialized in non 82598 adapters */
2844 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
2845 IXGBE_PSRTYPE_UDPHDR
|
2846 IXGBE_PSRTYPE_IPV4HDR
|
2847 IXGBE_PSRTYPE_L2HDR
|
2848 IXGBE_PSRTYPE_IPV6HDR
;
2850 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2853 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)
2854 psrtype
|= (adapter
->num_rx_queues_per_pool
<< 29);
2856 for (p
= 0; p
< adapter
->num_rx_pools
; p
++)
2857 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(adapter
->num_vfs
+ p
),
2861 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
2863 struct ixgbe_hw
*hw
= &adapter
->hw
;
2866 u32 reg_offset
, vf_shift
;
2869 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
2872 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
2873 vt_reg_bits
= IXGBE_VMD_CTL_VMDQ_EN
| IXGBE_VT_CTL_REPLEN
;
2874 vt_reg_bits
|= (adapter
->num_vfs
<< IXGBE_VT_CTL_POOL_SHIFT
);
2875 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
| vt_reg_bits
);
2877 vf_shift
= adapter
->num_vfs
% 32;
2878 reg_offset
= (adapter
->num_vfs
> 32) ? 1 : 0;
2880 /* Enable only the PF's pool for Tx/Rx */
2881 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (1 << vf_shift
));
2882 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), 0);
2883 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (1 << vf_shift
));
2884 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), 0);
2885 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
2887 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
2888 hw
->mac
.ops
.set_vmdq(hw
, 0, adapter
->num_vfs
);
2891 * Set up VF register offsets for selected VT Mode,
2892 * i.e. 32 or 64 VFs for SR-IOV
2894 gcr_ext
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
2895 gcr_ext
|= IXGBE_GCR_EXT_MSIX_EN
;
2896 gcr_ext
|= IXGBE_GCR_EXT_VT_MODE_64
;
2897 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
2899 /* enable Tx loopback for VF/PF communication */
2900 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
2903 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
2905 struct ixgbe_hw
*hw
= &adapter
->hw
;
2906 struct net_device
*netdev
= adapter
->netdev
;
2907 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2909 struct ixgbe_ring
*rx_ring
;
2913 /* Decide whether to use packet split mode or not */
2914 /* Do not use packet split if we're in SR-IOV Mode */
2915 if (!adapter
->num_vfs
)
2916 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
2918 /* Set the RX buffer length according to the mode */
2919 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
2920 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
2922 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) &&
2923 (netdev
->mtu
<= ETH_DATA_LEN
))
2924 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
2926 rx_buf_len
= ALIGN(max_frame
+ VLAN_HLEN
, 1024);
2930 /* adjust max frame to be able to do baby jumbo for FCoE */
2931 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
2932 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
2933 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2935 #endif /* IXGBE_FCOE */
2936 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
2937 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
2938 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
2939 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
2941 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
2944 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
2945 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
2946 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
2947 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
2950 * Setup the HW Rx Head and Tail Descriptor Pointers and
2951 * the Base and Length of the Rx Descriptor Ring
2953 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2954 rx_ring
= adapter
->rx_ring
[i
];
2955 rx_ring
->rx_buf_len
= rx_buf_len
;
2957 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)
2958 rx_ring
->flags
|= IXGBE_RING_RX_PS_ENABLED
;
2960 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2963 if (netdev
->features
& NETIF_F_FCOE_MTU
) {
2964 struct ixgbe_ring_feature
*f
;
2965 f
= &adapter
->ring_feature
[RING_F_FCOE
];
2966 if ((i
>= f
->mask
) && (i
< f
->mask
+ f
->indices
)) {
2967 rx_ring
->flags
&= ~IXGBE_RING_RX_PS_ENABLED
;
2968 if (rx_buf_len
< IXGBE_FCOE_JUMBO_FRAME_SIZE
)
2969 rx_ring
->rx_buf_len
=
2970 IXGBE_FCOE_JUMBO_FRAME_SIZE
;
2973 #endif /* IXGBE_FCOE */
2978 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
2980 struct ixgbe_hw
*hw
= &adapter
->hw
;
2981 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
2983 switch (hw
->mac
.type
) {
2984 case ixgbe_mac_82598EB
:
2986 * For VMDq support of different descriptor types or
2987 * buffer sizes through the use of multiple SRRCTL
2988 * registers, RDRXCTL.MVMEN must be set to 1
2990 * also, the manual doesn't mention it clearly but DCA hints
2991 * will only use queue 0's tags unless this bit is set. Side
2992 * effects of setting this bit are only that SRRCTL must be
2993 * fully programmed [0..15]
2995 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
2997 case ixgbe_mac_82599EB
:
2998 /* Disable RSC for ACK packets */
2999 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3000 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3001 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3002 /* hardware requires some bits to be set by default */
3003 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3004 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3007 /* We should do nothing since we don't know this hardware */
3011 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3015 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3016 * @adapter: board private structure
3018 * Configure the Rx unit of the MAC after a reset.
3020 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3022 struct ixgbe_hw
*hw
= &adapter
->hw
;
3026 /* disable receives while setting up the descriptors */
3027 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3028 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3030 ixgbe_setup_psrtype(adapter
);
3031 ixgbe_setup_rdrxctl(adapter
);
3033 /* Program registers for the distribution of queues */
3034 ixgbe_setup_mrqc(adapter
);
3036 ixgbe_set_uta(adapter
);
3038 /* set_rx_buffer_len must be called before ring initialization */
3039 ixgbe_set_rx_buffer_len(adapter
);
3042 * Setup the HW Rx Head and Tail Descriptor Pointers and
3043 * the Base and Length of the Rx Descriptor Ring
3045 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3046 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3048 /* disable drop enable for 82598 parts */
3049 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3050 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3052 /* enable all receives */
3053 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3054 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3057 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
3059 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3060 struct ixgbe_hw
*hw
= &adapter
->hw
;
3061 int pool_ndx
= adapter
->num_vfs
;
3063 /* add VID to filter table */
3064 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, true);
3065 set_bit(vid
, adapter
->active_vlans
);
3068 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
3070 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3071 struct ixgbe_hw
*hw
= &adapter
->hw
;
3072 int pool_ndx
= adapter
->num_vfs
;
3074 /* remove VID from filter table */
3075 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, false);
3076 clear_bit(vid
, adapter
->active_vlans
);
3080 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3081 * @adapter: driver data
3083 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3085 struct ixgbe_hw
*hw
= &adapter
->hw
;
3088 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3089 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
3090 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3094 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3095 * @adapter: driver data
3097 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3099 struct ixgbe_hw
*hw
= &adapter
->hw
;
3102 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3103 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3104 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3105 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3109 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3110 * @adapter: driver data
3112 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3114 struct ixgbe_hw
*hw
= &adapter
->hw
;
3118 switch (hw
->mac
.type
) {
3119 case ixgbe_mac_82598EB
:
3120 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3121 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3122 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3124 case ixgbe_mac_82599EB
:
3125 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3126 j
= adapter
->rx_ring
[i
]->reg_idx
;
3127 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3128 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3129 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3138 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3139 * @adapter: driver data
3141 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3143 struct ixgbe_hw
*hw
= &adapter
->hw
;
3147 switch (hw
->mac
.type
) {
3148 case ixgbe_mac_82598EB
:
3149 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3150 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3151 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3153 case ixgbe_mac_82599EB
:
3154 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3155 j
= adapter
->rx_ring
[i
]->reg_idx
;
3156 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3157 vlnctrl
|= IXGBE_RXDCTL_VME
;
3158 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3166 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3170 ixgbe_vlan_rx_add_vid(adapter
->netdev
, 0);
3172 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3173 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
3177 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3178 * @netdev: network interface device structure
3180 * Writes unicast address list to the RAR table.
3181 * Returns: -ENOMEM on failure/insufficient address space
3182 * 0 on no addresses written
3183 * X on writing X addresses to the RAR table
3185 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3187 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3188 struct ixgbe_hw
*hw
= &adapter
->hw
;
3189 unsigned int vfn
= adapter
->num_vfs
;
3190 unsigned int rar_entries
= hw
->mac
.num_rar_entries
- (vfn
+ 1);
3193 /* return ENOMEM indicating insufficient memory for addresses */
3194 if (netdev_uc_count(netdev
) > rar_entries
)
3197 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3198 struct netdev_hw_addr
*ha
;
3199 /* return error if we do not support writing to RAR table */
3200 if (!hw
->mac
.ops
.set_rar
)
3203 netdev_for_each_uc_addr(ha
, netdev
) {
3206 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3211 /* write the addresses in reverse order to avoid write combining */
3212 for (; rar_entries
> 0 ; rar_entries
--)
3213 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3219 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3220 * @netdev: network interface device structure
3222 * The set_rx_method entry point is called whenever the unicast/multicast
3223 * address list or the network interface flags are updated. This routine is
3224 * responsible for configuring the hardware for proper unicast, multicast and
3227 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3229 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3230 struct ixgbe_hw
*hw
= &adapter
->hw
;
3231 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3234 /* Check for Promiscuous and All Multicast modes */
3236 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3238 /* set all bits that we expect to always be set */
3239 fctrl
|= IXGBE_FCTRL_BAM
;
3240 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3241 fctrl
|= IXGBE_FCTRL_PMCF
;
3243 /* clear the bits we are changing the status of */
3244 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3246 if (netdev
->flags
& IFF_PROMISC
) {
3247 hw
->addr_ctrl
.user_set_promisc
= true;
3248 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3249 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3250 /* don't hardware filter vlans in promisc mode */
3251 ixgbe_vlan_filter_disable(adapter
);
3253 if (netdev
->flags
& IFF_ALLMULTI
) {
3254 fctrl
|= IXGBE_FCTRL_MPE
;
3255 vmolr
|= IXGBE_VMOLR_MPE
;
3258 * Write addresses to the MTA, if the attempt fails
3259 * then we should just turn on promiscous mode so
3260 * that we can at least receive multicast traffic
3262 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3263 vmolr
|= IXGBE_VMOLR_ROMPE
;
3265 ixgbe_vlan_filter_enable(adapter
);
3266 hw
->addr_ctrl
.user_set_promisc
= false;
3268 * Write addresses to available RAR registers, if there is not
3269 * sufficient space to store all the addresses then enable
3270 * unicast promiscous mode
3272 count
= ixgbe_write_uc_addr_list(netdev
);
3274 fctrl
|= IXGBE_FCTRL_UPE
;
3275 vmolr
|= IXGBE_VMOLR_ROPE
;
3279 if (adapter
->num_vfs
) {
3280 ixgbe_restore_vf_multicasts(adapter
);
3281 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
)) &
3282 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3284 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
), vmolr
);
3287 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3289 if (netdev
->features
& NETIF_F_HW_VLAN_RX
)
3290 ixgbe_vlan_strip_enable(adapter
);
3292 ixgbe_vlan_strip_disable(adapter
);
3295 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3298 struct ixgbe_q_vector
*q_vector
;
3299 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3301 /* legacy and MSI only use one vector */
3302 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3305 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3306 struct napi_struct
*napi
;
3307 q_vector
= adapter
->q_vector
[q_idx
];
3308 napi
= &q_vector
->napi
;
3309 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3310 if (!q_vector
->rxr_count
|| !q_vector
->txr_count
) {
3311 if (q_vector
->txr_count
== 1)
3312 napi
->poll
= &ixgbe_clean_txonly
;
3313 else if (q_vector
->rxr_count
== 1)
3314 napi
->poll
= &ixgbe_clean_rxonly
;
3322 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3325 struct ixgbe_q_vector
*q_vector
;
3326 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3328 /* legacy and MSI only use one vector */
3329 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3332 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3333 q_vector
= adapter
->q_vector
[q_idx
];
3334 napi_disable(&q_vector
->napi
);
3338 #ifdef CONFIG_IXGBE_DCB
3340 * ixgbe_configure_dcb - Configure DCB hardware
3341 * @adapter: ixgbe adapter struct
3343 * This is called by the driver on open to configure the DCB hardware.
3344 * This is also called by the gennetlink interface when reconfiguring
3347 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3349 struct ixgbe_hw
*hw
= &adapter
->hw
;
3350 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3354 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
3355 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3356 netif_set_gso_max_size(adapter
->netdev
, 65536);
3360 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3361 netif_set_gso_max_size(adapter
->netdev
, 32768);
3364 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
3365 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
3368 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, max_frame
,
3370 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, max_frame
,
3373 /* reconfigure the hardware */
3374 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
3376 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3377 j
= adapter
->tx_ring
[i
]->reg_idx
;
3378 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3379 /* PThresh workaround for Tx hang with DFP enabled. */
3381 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
3383 /* Enable VLAN tag insert/strip */
3384 adapter
->netdev
->features
|= NETIF_F_HW_VLAN_RX
;
3386 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
3390 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
3392 struct net_device
*netdev
= adapter
->netdev
;
3393 struct ixgbe_hw
*hw
= &adapter
->hw
;
3396 #ifdef CONFIG_IXGBE_DCB
3397 ixgbe_configure_dcb(adapter
);
3400 ixgbe_set_rx_mode(netdev
);
3401 ixgbe_restore_vlan(adapter
);
3404 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
3405 ixgbe_configure_fcoe(adapter
);
3407 #endif /* IXGBE_FCOE */
3408 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3409 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3410 adapter
->tx_ring
[i
]->atr_sample_rate
=
3411 adapter
->atr_sample_rate
;
3412 ixgbe_init_fdir_signature_82599(hw
, adapter
->fdir_pballoc
);
3413 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
3414 ixgbe_init_fdir_perfect_82599(hw
, adapter
->fdir_pballoc
);
3416 ixgbe_configure_virtualization(adapter
);
3418 ixgbe_configure_tx(adapter
);
3419 ixgbe_configure_rx(adapter
);
3422 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
3424 switch (hw
->phy
.type
) {
3425 case ixgbe_phy_sfp_avago
:
3426 case ixgbe_phy_sfp_ftl
:
3427 case ixgbe_phy_sfp_intel
:
3428 case ixgbe_phy_sfp_unknown
:
3429 case ixgbe_phy_sfp_passive_tyco
:
3430 case ixgbe_phy_sfp_passive_unknown
:
3431 case ixgbe_phy_sfp_active_unknown
:
3432 case ixgbe_phy_sfp_ftl_active
:
3440 * ixgbe_sfp_link_config - set up SFP+ link
3441 * @adapter: pointer to private adapter struct
3443 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
3445 struct ixgbe_hw
*hw
= &adapter
->hw
;
3447 if (hw
->phy
.multispeed_fiber
) {
3449 * In multispeed fiber setups, the device may not have
3450 * had a physical connection when the driver loaded.
3451 * If that's the case, the initial link configuration
3452 * couldn't get the MAC into 10G or 1G mode, so we'll
3453 * never have a link status change interrupt fire.
3454 * We need to try and force an autonegotiation
3455 * session, then bring up link.
3457 hw
->mac
.ops
.setup_sfp(hw
);
3458 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
3459 schedule_work(&adapter
->multispeed_fiber_task
);
3462 * Direct Attach Cu and non-multispeed fiber modules
3463 * still need to be configured properly prior to
3466 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_MOD_TASK
))
3467 schedule_work(&adapter
->sfp_config_module_task
);
3472 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3473 * @hw: pointer to private hardware struct
3475 * Returns 0 on success, negative on failure
3477 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
3480 bool negotiation
, link_up
= false;
3481 u32 ret
= IXGBE_ERR_LINK_SETUP
;
3483 if (hw
->mac
.ops
.check_link
)
3484 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
3489 if (hw
->mac
.ops
.get_link_capabilities
)
3490 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3495 if (hw
->mac
.ops
.setup_link
)
3496 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
3501 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
3503 struct ixgbe_hw
*hw
= &adapter
->hw
;
3506 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3507 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
3509 gpie
|= IXGBE_GPIE_EIAME
;
3511 * use EIAM to auto-mask when MSI-X interrupt is asserted
3512 * this saves a register write for every interrupt
3514 switch (hw
->mac
.type
) {
3515 case ixgbe_mac_82598EB
:
3516 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3519 case ixgbe_mac_82599EB
:
3520 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3521 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3525 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3526 * specifically only auto mask tx and rx interrupts */
3527 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3530 /* XXX: to interrupt immediately for EICS writes, enable this */
3531 /* gpie |= IXGBE_GPIE_EIMEN; */
3533 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3534 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
3535 gpie
|= IXGBE_GPIE_VTMODE_64
;
3538 /* Enable fan failure interrupt */
3539 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
3540 gpie
|= IXGBE_SDP1_GPIEN
;
3542 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3543 gpie
|= IXGBE_SDP1_GPIEN
;
3544 gpie
|= IXGBE_SDP2_GPIEN
;
3546 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3549 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
3551 struct ixgbe_hw
*hw
= &adapter
->hw
;
3555 ixgbe_get_hw_control(adapter
);
3556 ixgbe_setup_gpie(adapter
);
3558 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3559 ixgbe_configure_msix(adapter
);
3561 ixgbe_configure_msi_and_legacy(adapter
);
3563 /* enable the optics */
3564 if (hw
->phy
.multispeed_fiber
)
3565 hw
->mac
.ops
.enable_tx_laser(hw
);
3567 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
3568 ixgbe_napi_enable_all(adapter
);
3570 /* clear any pending interrupts, may auto mask */
3571 IXGBE_READ_REG(hw
, IXGBE_EICR
);
3572 ixgbe_irq_enable(adapter
, true, true);
3575 * If this adapter has a fan, check to see if we had a failure
3576 * before we enabled the interrupt.
3578 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
3579 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
3580 if (esdp
& IXGBE_ESDP_SDP1
)
3581 e_crit(drv
, "Fan has stopped, replace the adapter\n");
3585 * For hot-pluggable SFP+ devices, a new SFP+ module may have
3586 * arrived before interrupts were enabled but after probe. Such
3587 * devices wouldn't have their type identified yet. We need to
3588 * kick off the SFP+ module setup first, then try to bring up link.
3589 * If we're not hot-pluggable SFP+, we just need to configure link
3592 if (hw
->phy
.type
== ixgbe_phy_unknown
) {
3593 err
= hw
->phy
.ops
.identify(hw
);
3594 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3596 * Take the device down and schedule the sfp tasklet
3597 * which will unregister_netdev and log it.
3599 ixgbe_down(adapter
);
3600 schedule_work(&adapter
->sfp_config_module_task
);
3605 if (ixgbe_is_sfp(hw
)) {
3606 ixgbe_sfp_link_config(adapter
);
3608 err
= ixgbe_non_sfp_link_config(hw
);
3610 e_err(probe
, "link_config FAILED %d\n", err
);
3613 /* enable transmits */
3614 netif_tx_start_all_queues(adapter
->netdev
);
3616 /* bring the link up in the watchdog, this could race with our first
3617 * link up interrupt but shouldn't be a problem */
3618 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
3619 adapter
->link_check_timeout
= jiffies
;
3620 mod_timer(&adapter
->watchdog_timer
, jiffies
);
3622 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
3623 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
3624 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
3625 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
3630 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
3632 WARN_ON(in_interrupt());
3633 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
3635 ixgbe_down(adapter
);
3637 * If SR-IOV enabled then wait a bit before bringing the adapter
3638 * back up to give the VFs time to respond to the reset. The
3639 * two second wait is based upon the watchdog timer cycle in
3642 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3645 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
3648 int ixgbe_up(struct ixgbe_adapter
*adapter
)
3650 /* hardware has been reset, we need to reload some things */
3651 ixgbe_configure(adapter
);
3653 return ixgbe_up_complete(adapter
);
3656 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
3658 struct ixgbe_hw
*hw
= &adapter
->hw
;
3661 err
= hw
->mac
.ops
.init_hw(hw
);
3664 case IXGBE_ERR_SFP_NOT_PRESENT
:
3666 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
3667 e_dev_err("master disable timed out\n");
3669 case IXGBE_ERR_EEPROM_VERSION
:
3670 /* We are running on a pre-production device, log a warning */
3671 e_dev_warn("This device is a pre-production adapter/LOM. "
3672 "Please be aware there may be issuesassociated with "
3673 "your hardware. If you are experiencing problems "
3674 "please contact your Intel or hardware "
3675 "representative who provided you with this "
3679 e_dev_err("Hardware Error: %d\n", err
);
3682 /* reprogram the RAR[0] in case user changed it. */
3683 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
3688 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
3689 * @adapter: board private structure
3690 * @rx_ring: ring to free buffers from
3692 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
3693 struct ixgbe_ring
*rx_ring
)
3695 struct pci_dev
*pdev
= adapter
->pdev
;
3699 /* ring already cleared, nothing to do */
3700 if (!rx_ring
->rx_buffer_info
)
3703 /* Free all the Rx ring sk_buffs */
3704 for (i
= 0; i
< rx_ring
->count
; i
++) {
3705 struct ixgbe_rx_buffer
*rx_buffer_info
;
3707 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3708 if (rx_buffer_info
->dma
) {
3709 dma_unmap_single(&pdev
->dev
, rx_buffer_info
->dma
,
3710 rx_ring
->rx_buf_len
,
3712 rx_buffer_info
->dma
= 0;
3714 if (rx_buffer_info
->skb
) {
3715 struct sk_buff
*skb
= rx_buffer_info
->skb
;
3716 rx_buffer_info
->skb
= NULL
;
3718 struct sk_buff
*this = skb
;
3719 if (IXGBE_RSC_CB(this)->delay_unmap
) {
3720 dma_unmap_single(&pdev
->dev
,
3721 IXGBE_RSC_CB(this)->dma
,
3722 rx_ring
->rx_buf_len
,
3724 IXGBE_RSC_CB(this)->dma
= 0;
3725 IXGBE_RSC_CB(skb
)->delay_unmap
= false;
3728 dev_kfree_skb(this);
3731 if (!rx_buffer_info
->page
)
3733 if (rx_buffer_info
->page_dma
) {
3734 dma_unmap_page(&pdev
->dev
, rx_buffer_info
->page_dma
,
3735 PAGE_SIZE
/ 2, DMA_FROM_DEVICE
);
3736 rx_buffer_info
->page_dma
= 0;
3738 put_page(rx_buffer_info
->page
);
3739 rx_buffer_info
->page
= NULL
;
3740 rx_buffer_info
->page_offset
= 0;
3743 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
3744 memset(rx_ring
->rx_buffer_info
, 0, size
);
3746 /* Zero out the descriptor ring */
3747 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3749 rx_ring
->next_to_clean
= 0;
3750 rx_ring
->next_to_use
= 0;
3753 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
3755 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
3759 * ixgbe_clean_tx_ring - Free Tx Buffers
3760 * @adapter: board private structure
3761 * @tx_ring: ring to be cleaned
3763 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
3764 struct ixgbe_ring
*tx_ring
)
3766 struct ixgbe_tx_buffer
*tx_buffer_info
;
3770 /* ring already cleared, nothing to do */
3771 if (!tx_ring
->tx_buffer_info
)
3774 /* Free all the Tx ring sk_buffs */
3775 for (i
= 0; i
< tx_ring
->count
; i
++) {
3776 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3777 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
3780 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
3781 memset(tx_ring
->tx_buffer_info
, 0, size
);
3783 /* Zero out the descriptor ring */
3784 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3786 tx_ring
->next_to_use
= 0;
3787 tx_ring
->next_to_clean
= 0;
3790 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
3792 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3796 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
3797 * @adapter: board private structure
3799 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
3803 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3804 ixgbe_clean_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3808 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
3809 * @adapter: board private structure
3811 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
3815 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3816 ixgbe_clean_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3819 void ixgbe_down(struct ixgbe_adapter
*adapter
)
3821 struct net_device
*netdev
= adapter
->netdev
;
3822 struct ixgbe_hw
*hw
= &adapter
->hw
;
3826 int num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3828 /* signal that we are down to the interrupt handler */
3829 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3831 /* disable receive for all VFs and wait one second */
3832 if (adapter
->num_vfs
) {
3833 /* ping all the active vfs to let them know we are going down */
3834 ixgbe_ping_all_vfs(adapter
);
3836 /* Disable all VFTE/VFRE TX/RX */
3837 ixgbe_disable_tx_rx(adapter
);
3839 /* Mark all the VFs as inactive */
3840 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
3841 adapter
->vfinfo
[i
].clear_to_send
= 0;
3844 /* disable receives */
3845 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3846 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3848 IXGBE_WRITE_FLUSH(hw
);
3851 netif_tx_stop_all_queues(netdev
);
3853 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3854 del_timer_sync(&adapter
->sfp_timer
);
3855 del_timer_sync(&adapter
->watchdog_timer
);
3856 cancel_work_sync(&adapter
->watchdog_task
);
3858 netif_carrier_off(netdev
);
3859 netif_tx_disable(netdev
);
3861 ixgbe_irq_disable(adapter
);
3863 ixgbe_napi_disable_all(adapter
);
3865 /* Cleanup the affinity_hint CPU mask memory and callback */
3866 for (i
= 0; i
< num_q_vectors
; i
++) {
3867 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
3868 /* clear the affinity_mask in the IRQ descriptor */
3869 irq_set_affinity_hint(adapter
->msix_entries
[i
]. vector
, NULL
);
3870 /* release the CPU mask memory */
3871 free_cpumask_var(q_vector
->affinity_mask
);
3874 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3875 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3876 cancel_work_sync(&adapter
->fdir_reinit_task
);
3878 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
3879 cancel_work_sync(&adapter
->check_overtemp_task
);
3881 /* disable transmits in the hardware now that interrupts are off */
3882 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3883 j
= adapter
->tx_ring
[i
]->reg_idx
;
3884 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
3885 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
3886 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
3888 /* Disable the Tx DMA engine on 82599 */
3889 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3890 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
3891 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
3892 ~IXGBE_DMATXCTL_TE
));
3894 /* power down the optics */
3895 if (hw
->phy
.multispeed_fiber
)
3896 hw
->mac
.ops
.disable_tx_laser(hw
);
3898 /* clear n-tuple filters that are cached */
3899 ethtool_ntuple_flush(netdev
);
3901 if (!pci_channel_offline(adapter
->pdev
))
3902 ixgbe_reset(adapter
);
3903 ixgbe_clean_all_tx_rings(adapter
);
3904 ixgbe_clean_all_rx_rings(adapter
);
3906 #ifdef CONFIG_IXGBE_DCA
3907 /* since we reset the hardware DCA settings were cleared */
3908 ixgbe_setup_dca(adapter
);
3913 * ixgbe_poll - NAPI Rx polling callback
3914 * @napi: structure for representing this polling device
3915 * @budget: how many packets driver is allowed to clean
3917 * This function is used for legacy and MSI, NAPI mode
3919 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
3921 struct ixgbe_q_vector
*q_vector
=
3922 container_of(napi
, struct ixgbe_q_vector
, napi
);
3923 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
3924 int tx_clean_complete
, work_done
= 0;
3926 #ifdef CONFIG_IXGBE_DCA
3927 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3928 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
[0]);
3929 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
[0]);
3933 tx_clean_complete
= ixgbe_clean_tx_irq(q_vector
, adapter
->tx_ring
[0]);
3934 ixgbe_clean_rx_irq(q_vector
, adapter
->rx_ring
[0], &work_done
, budget
);
3936 if (!tx_clean_complete
)
3939 /* If budget not fully consumed, exit the polling mode */
3940 if (work_done
< budget
) {
3941 napi_complete(napi
);
3942 if (adapter
->rx_itr_setting
& 1)
3943 ixgbe_set_itr(adapter
);
3944 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3945 ixgbe_irq_enable_queues(adapter
, IXGBE_EIMS_RTX_QUEUE
);
3951 * ixgbe_tx_timeout - Respond to a Tx Hang
3952 * @netdev: network interface device structure
3954 static void ixgbe_tx_timeout(struct net_device
*netdev
)
3956 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3958 /* Do the reset outside of interrupt context */
3959 schedule_work(&adapter
->reset_task
);
3962 static void ixgbe_reset_task(struct work_struct
*work
)
3964 struct ixgbe_adapter
*adapter
;
3965 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
3967 /* If we're already down or resetting, just bail */
3968 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
3969 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
3972 adapter
->tx_timeout_count
++;
3974 ixgbe_dump(adapter
);
3975 netdev_err(adapter
->netdev
, "Reset adapter\n");
3976 ixgbe_reinit_locked(adapter
);
3979 #ifdef CONFIG_IXGBE_DCB
3980 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter
*adapter
)
3983 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_DCB
];
3985 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
3989 adapter
->num_rx_queues
= f
->indices
;
3990 adapter
->num_tx_queues
= f
->indices
;
3998 * ixgbe_set_rss_queues: Allocate queues for RSS
3999 * @adapter: board private structure to initialize
4001 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
4002 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
4005 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter
*adapter
)
4008 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_RSS
];
4010 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4012 adapter
->num_rx_queues
= f
->indices
;
4013 adapter
->num_tx_queues
= f
->indices
;
4023 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
4024 * @adapter: board private structure to initialize
4026 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
4027 * to the original CPU that initiated the Tx session. This runs in addition
4028 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
4029 * Rx load across CPUs using RSS.
4032 static inline bool ixgbe_set_fdir_queues(struct ixgbe_adapter
*adapter
)
4035 struct ixgbe_ring_feature
*f_fdir
= &adapter
->ring_feature
[RING_F_FDIR
];
4037 f_fdir
->indices
= min((int)num_online_cpus(), f_fdir
->indices
);
4040 /* Flow Director must have RSS enabled */
4041 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
4042 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4043 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)))) {
4044 adapter
->num_tx_queues
= f_fdir
->indices
;
4045 adapter
->num_rx_queues
= f_fdir
->indices
;
4048 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4049 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4056 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
4057 * @adapter: board private structure to initialize
4059 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
4060 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
4061 * rx queues out of the max number of rx queues, instead, it is used as the
4062 * index of the first rx queue used by FCoE.
4065 static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter
*adapter
)
4068 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
4070 f
->indices
= min((int)num_online_cpus(), f
->indices
);
4071 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
4072 adapter
->num_rx_queues
= 1;
4073 adapter
->num_tx_queues
= 1;
4074 #ifdef CONFIG_IXGBE_DCB
4075 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4076 e_info(probe
, "FCoE enabled with DCB\n");
4077 ixgbe_set_dcb_queues(adapter
);
4080 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4081 e_info(probe
, "FCoE enabled with RSS\n");
4082 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4083 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
4084 ixgbe_set_fdir_queues(adapter
);
4086 ixgbe_set_rss_queues(adapter
);
4088 /* adding FCoE rx rings to the end */
4089 f
->mask
= adapter
->num_rx_queues
;
4090 adapter
->num_rx_queues
+= f
->indices
;
4091 adapter
->num_tx_queues
+= f
->indices
;
4099 #endif /* IXGBE_FCOE */
4101 * ixgbe_set_sriov_queues: Allocate queues for IOV use
4102 * @adapter: board private structure to initialize
4104 * IOV doesn't actually use anything, so just NAK the
4105 * request for now and let the other queue routines
4106 * figure out what to do.
4108 static inline bool ixgbe_set_sriov_queues(struct ixgbe_adapter
*adapter
)
4114 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
4115 * @adapter: board private structure to initialize
4117 * This is the top level queue allocation routine. The order here is very
4118 * important, starting with the "most" number of features turned on at once,
4119 * and ending with the smallest set of features. This way large combinations
4120 * can be allocated if they're turned on, and smaller combinations are the
4121 * fallthrough conditions.
4124 static int ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
4126 /* Start with base case */
4127 adapter
->num_rx_queues
= 1;
4128 adapter
->num_tx_queues
= 1;
4129 adapter
->num_rx_pools
= adapter
->num_rx_queues
;
4130 adapter
->num_rx_queues_per_pool
= 1;
4132 if (ixgbe_set_sriov_queues(adapter
))
4136 if (ixgbe_set_fcoe_queues(adapter
))
4139 #endif /* IXGBE_FCOE */
4140 #ifdef CONFIG_IXGBE_DCB
4141 if (ixgbe_set_dcb_queues(adapter
))
4145 if (ixgbe_set_fdir_queues(adapter
))
4148 if (ixgbe_set_rss_queues(adapter
))
4151 /* fallback to base case */
4152 adapter
->num_rx_queues
= 1;
4153 adapter
->num_tx_queues
= 1;
4156 /* Notify the stack of the (possibly) reduced queue counts. */
4157 netif_set_real_num_tx_queues(adapter
->netdev
, adapter
->num_tx_queues
);
4158 return netif_set_real_num_rx_queues(adapter
->netdev
,
4159 adapter
->num_rx_queues
);
4162 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
4165 int err
, vector_threshold
;
4167 /* We'll want at least 3 (vector_threshold):
4170 * 3) Other (Link Status Change, etc.)
4171 * 4) TCP Timer (optional)
4173 vector_threshold
= MIN_MSIX_COUNT
;
4175 /* The more we get, the more we will assign to Tx/Rx Cleanup
4176 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
4177 * Right now, we simply care about how many we'll get; we'll
4178 * set them up later while requesting irq's.
4180 while (vectors
>= vector_threshold
) {
4181 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
4183 if (!err
) /* Success in acquiring all requested vectors. */
4186 vectors
= 0; /* Nasty failure, quit now */
4187 else /* err == number of vectors we should try again with */
4191 if (vectors
< vector_threshold
) {
4192 /* Can't allocate enough MSI-X interrupts? Oh well.
4193 * This just means we'll go with either a single MSI
4194 * vector or fall back to legacy interrupts.
4196 netif_printk(adapter
, hw
, KERN_DEBUG
, adapter
->netdev
,
4197 "Unable to allocate MSI-X interrupts\n");
4198 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
4199 kfree(adapter
->msix_entries
);
4200 adapter
->msix_entries
= NULL
;
4202 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
4204 * Adjust for only the vectors we'll use, which is minimum
4205 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
4206 * vectors we were allocated.
4208 adapter
->num_msix_vectors
= min(vectors
,
4209 adapter
->max_msix_q_vectors
+ NON_Q_VECTORS
);
4214 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
4215 * @adapter: board private structure to initialize
4217 * Cache the descriptor ring offsets for RSS to the assigned rings.
4220 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter
*adapter
)
4225 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4226 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4227 adapter
->rx_ring
[i
]->reg_idx
= i
;
4228 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4229 adapter
->tx_ring
[i
]->reg_idx
= i
;
4238 #ifdef CONFIG_IXGBE_DCB
4240 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
4241 * @adapter: board private structure to initialize
4243 * Cache the descriptor ring offsets for DCB to the assigned rings.
4246 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter
*adapter
)
4250 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
4252 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4253 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
4254 /* the number of queues is assumed to be symmetric */
4255 for (i
= 0; i
< dcb_i
; i
++) {
4256 adapter
->rx_ring
[i
]->reg_idx
= i
<< 3;
4257 adapter
->tx_ring
[i
]->reg_idx
= i
<< 2;
4260 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
4263 * Tx TC0 starts at: descriptor queue 0
4264 * Tx TC1 starts at: descriptor queue 32
4265 * Tx TC2 starts at: descriptor queue 64
4266 * Tx TC3 starts at: descriptor queue 80
4267 * Tx TC4 starts at: descriptor queue 96
4268 * Tx TC5 starts at: descriptor queue 104
4269 * Tx TC6 starts at: descriptor queue 112
4270 * Tx TC7 starts at: descriptor queue 120
4272 * Rx TC0-TC7 are offset by 16 queues each
4274 for (i
= 0; i
< 3; i
++) {
4275 adapter
->tx_ring
[i
]->reg_idx
= i
<< 5;
4276 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4278 for ( ; i
< 5; i
++) {
4279 adapter
->tx_ring
[i
]->reg_idx
=
4281 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4283 for ( ; i
< dcb_i
; i
++) {
4284 adapter
->tx_ring
[i
]->reg_idx
=
4286 adapter
->rx_ring
[i
]->reg_idx
= i
<< 4;
4290 } else if (dcb_i
== 4) {
4292 * Tx TC0 starts at: descriptor queue 0
4293 * Tx TC1 starts at: descriptor queue 64
4294 * Tx TC2 starts at: descriptor queue 96
4295 * Tx TC3 starts at: descriptor queue 112
4297 * Rx TC0-TC3 are offset by 32 queues each
4299 adapter
->tx_ring
[0]->reg_idx
= 0;
4300 adapter
->tx_ring
[1]->reg_idx
= 64;
4301 adapter
->tx_ring
[2]->reg_idx
= 96;
4302 adapter
->tx_ring
[3]->reg_idx
= 112;
4303 for (i
= 0 ; i
< dcb_i
; i
++)
4304 adapter
->rx_ring
[i
]->reg_idx
= i
<< 5;
4322 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
4323 * @adapter: board private structure to initialize
4325 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
4328 static inline bool ixgbe_cache_ring_fdir(struct ixgbe_adapter
*adapter
)
4333 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
&&
4334 ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4335 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))) {
4336 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4337 adapter
->rx_ring
[i
]->reg_idx
= i
;
4338 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4339 adapter
->tx_ring
[i
]->reg_idx
= i
;
4348 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
4349 * @adapter: board private structure to initialize
4351 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
4354 static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter
*adapter
)
4356 int i
, fcoe_rx_i
= 0, fcoe_tx_i
= 0;
4358 struct ixgbe_ring_feature
*f
= &adapter
->ring_feature
[RING_F_FCOE
];
4360 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
4361 #ifdef CONFIG_IXGBE_DCB
4362 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4363 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
4365 ixgbe_cache_ring_dcb(adapter
);
4366 /* find out queues in TC for FCoE */
4367 fcoe_rx_i
= adapter
->rx_ring
[fcoe
->tc
]->reg_idx
+ 1;
4368 fcoe_tx_i
= adapter
->tx_ring
[fcoe
->tc
]->reg_idx
+ 1;
4370 * In 82599, the number of Tx queues for each traffic
4371 * class for both 8-TC and 4-TC modes are:
4372 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
4373 * 8 TCs: 32 32 16 16 8 8 8 8
4374 * 4 TCs: 64 64 32 32
4375 * We have max 8 queues for FCoE, where 8 the is
4376 * FCoE redirection table size. If TC for FCoE is
4377 * less than or equal to TC3, we have enough queues
4378 * to add max of 8 queues for FCoE, so we start FCoE
4379 * tx descriptor from the next one, i.e., reg_idx + 1.
4380 * If TC for FCoE is above TC3, implying 8 TC mode,
4381 * and we need 8 for FCoE, we have to take all queues
4382 * in that traffic class for FCoE.
4384 if ((f
->indices
== IXGBE_FCRETA_SIZE
) && (fcoe
->tc
> 3))
4387 #endif /* CONFIG_IXGBE_DCB */
4388 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
4389 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) ||
4390 (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
4391 ixgbe_cache_ring_fdir(adapter
);
4393 ixgbe_cache_ring_rss(adapter
);
4395 fcoe_rx_i
= f
->mask
;
4396 fcoe_tx_i
= f
->mask
;
4398 for (i
= 0; i
< f
->indices
; i
++, fcoe_rx_i
++, fcoe_tx_i
++) {
4399 adapter
->rx_ring
[f
->mask
+ i
]->reg_idx
= fcoe_rx_i
;
4400 adapter
->tx_ring
[f
->mask
+ i
]->reg_idx
= fcoe_tx_i
;
4407 #endif /* IXGBE_FCOE */
4409 * ixgbe_cache_ring_sriov - Descriptor ring to register mapping for sriov
4410 * @adapter: board private structure to initialize
4412 * SR-IOV doesn't use any descriptor rings but changes the default if
4413 * no other mapping is used.
4416 static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter
*adapter
)
4418 adapter
->rx_ring
[0]->reg_idx
= adapter
->num_vfs
* 2;
4419 adapter
->tx_ring
[0]->reg_idx
= adapter
->num_vfs
* 2;
4420 if (adapter
->num_vfs
)
4427 * ixgbe_cache_ring_register - Descriptor ring to register mapping
4428 * @adapter: board private structure to initialize
4430 * Once we know the feature-set enabled for the device, we'll cache
4431 * the register offset the descriptor ring is assigned to.
4433 * Note, the order the various feature calls is important. It must start with
4434 * the "most" features enabled at the same time, then trickle down to the
4435 * least amount of features turned on at once.
4437 static void ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
4439 /* start with default case */
4440 adapter
->rx_ring
[0]->reg_idx
= 0;
4441 adapter
->tx_ring
[0]->reg_idx
= 0;
4443 if (ixgbe_cache_ring_sriov(adapter
))
4447 if (ixgbe_cache_ring_fcoe(adapter
))
4450 #endif /* IXGBE_FCOE */
4451 #ifdef CONFIG_IXGBE_DCB
4452 if (ixgbe_cache_ring_dcb(adapter
))
4456 if (ixgbe_cache_ring_fdir(adapter
))
4459 if (ixgbe_cache_ring_rss(adapter
))
4464 * ixgbe_alloc_queues - Allocate memory for all rings
4465 * @adapter: board private structure to initialize
4467 * We allocate one ring per queue at run-time since we don't know the
4468 * number of queues at compile-time. The polling_netdev array is
4469 * intended for Multiqueue, but should work fine with a single queue.
4471 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
4474 int orig_node
= adapter
->node
;
4476 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4477 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
4478 if (orig_node
== -1) {
4479 int cur_node
= next_online_node(adapter
->node
);
4480 if (cur_node
== MAX_NUMNODES
)
4481 cur_node
= first_online_node
;
4482 adapter
->node
= cur_node
;
4484 ring
= kzalloc_node(sizeof(struct ixgbe_ring
), GFP_KERNEL
,
4487 ring
= kzalloc(sizeof(struct ixgbe_ring
), GFP_KERNEL
);
4489 goto err_tx_ring_allocation
;
4490 ring
->count
= adapter
->tx_ring_count
;
4491 ring
->queue_index
= i
;
4492 ring
->numa_node
= adapter
->node
;
4494 adapter
->tx_ring
[i
] = ring
;
4497 /* Restore the adapter's original node */
4498 adapter
->node
= orig_node
;
4500 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4501 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4502 if (orig_node
== -1) {
4503 int cur_node
= next_online_node(adapter
->node
);
4504 if (cur_node
== MAX_NUMNODES
)
4505 cur_node
= first_online_node
;
4506 adapter
->node
= cur_node
;
4508 ring
= kzalloc_node(sizeof(struct ixgbe_ring
), GFP_KERNEL
,
4511 ring
= kzalloc(sizeof(struct ixgbe_ring
), GFP_KERNEL
);
4513 goto err_rx_ring_allocation
;
4514 ring
->count
= adapter
->rx_ring_count
;
4515 ring
->queue_index
= i
;
4516 ring
->numa_node
= adapter
->node
;
4518 adapter
->rx_ring
[i
] = ring
;
4521 /* Restore the adapter's original node */
4522 adapter
->node
= orig_node
;
4524 ixgbe_cache_ring_register(adapter
);
4528 err_rx_ring_allocation
:
4529 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4530 kfree(adapter
->tx_ring
[i
]);
4531 err_tx_ring_allocation
:
4536 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
4537 * @adapter: board private structure to initialize
4539 * Attempt to configure the interrupts using the best available
4540 * capabilities of the hardware and the kernel.
4542 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter
*adapter
)
4544 struct ixgbe_hw
*hw
= &adapter
->hw
;
4546 int vector
, v_budget
;
4549 * It's easy to be greedy for MSI-X vectors, but it really
4550 * doesn't do us much good if we have a lot more vectors
4551 * than CPU's. So let's be conservative and only ask for
4552 * (roughly) the same number of vectors as there are CPU's.
4554 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
4555 (int)num_online_cpus()) + NON_Q_VECTORS
;
4558 * At the same time, hardware can only support a maximum of
4559 * hw.mac->max_msix_vectors vectors. With features
4560 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
4561 * descriptor queues supported by our device. Thus, we cap it off in
4562 * those rare cases where the cpu count also exceeds our vector limit.
4564 v_budget
= min(v_budget
, (int)hw
->mac
.max_msix_vectors
);
4566 /* A failure in MSI-X entry allocation isn't fatal, but it does
4567 * mean we disable MSI-X capabilities of the adapter. */
4568 adapter
->msix_entries
= kcalloc(v_budget
,
4569 sizeof(struct msix_entry
), GFP_KERNEL
);
4570 if (adapter
->msix_entries
) {
4571 for (vector
= 0; vector
< v_budget
; vector
++)
4572 adapter
->msix_entries
[vector
].entry
= vector
;
4574 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
4576 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4580 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
4581 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
4582 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4583 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4584 adapter
->atr_sample_rate
= 0;
4585 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4586 ixgbe_disable_sriov(adapter
);
4588 err
= ixgbe_set_num_queues(adapter
);
4592 err
= pci_enable_msi(adapter
->pdev
);
4594 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
4596 netif_printk(adapter
, hw
, KERN_DEBUG
, adapter
->netdev
,
4597 "Unable to allocate MSI interrupt, "
4598 "falling back to legacy. Error: %d\n", err
);
4608 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
4609 * @adapter: board private structure to initialize
4611 * We allocate one q_vector per queue interrupt. If allocation fails we
4614 static int ixgbe_alloc_q_vectors(struct ixgbe_adapter
*adapter
)
4616 int q_idx
, num_q_vectors
;
4617 struct ixgbe_q_vector
*q_vector
;
4619 int (*poll
)(struct napi_struct
*, int);
4621 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4622 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
4623 napi_vectors
= adapter
->num_rx_queues
;
4624 poll
= &ixgbe_clean_rxtx_many
;
4631 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
4632 q_vector
= kzalloc_node(sizeof(struct ixgbe_q_vector
),
4633 GFP_KERNEL
, adapter
->node
);
4635 q_vector
= kzalloc(sizeof(struct ixgbe_q_vector
),
4639 q_vector
->adapter
= adapter
;
4640 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
4641 q_vector
->eitr
= adapter
->tx_eitr_param
;
4643 q_vector
->eitr
= adapter
->rx_eitr_param
;
4644 q_vector
->v_idx
= q_idx
;
4645 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
4646 adapter
->q_vector
[q_idx
] = q_vector
;
4654 q_vector
= adapter
->q_vector
[q_idx
];
4655 netif_napi_del(&q_vector
->napi
);
4657 adapter
->q_vector
[q_idx
] = NULL
;
4663 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
4664 * @adapter: board private structure to initialize
4666 * This function frees the memory allocated to the q_vectors. In addition if
4667 * NAPI is enabled it will delete any references to the NAPI struct prior
4668 * to freeing the q_vector.
4670 static void ixgbe_free_q_vectors(struct ixgbe_adapter
*adapter
)
4672 int q_idx
, num_q_vectors
;
4674 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4675 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
4679 for (q_idx
= 0; q_idx
< num_q_vectors
; q_idx
++) {
4680 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[q_idx
];
4681 adapter
->q_vector
[q_idx
] = NULL
;
4682 netif_napi_del(&q_vector
->napi
);
4687 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
4689 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4690 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
4691 pci_disable_msix(adapter
->pdev
);
4692 kfree(adapter
->msix_entries
);
4693 adapter
->msix_entries
= NULL
;
4694 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
4695 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
4696 pci_disable_msi(adapter
->pdev
);
4701 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
4702 * @adapter: board private structure to initialize
4704 * We determine which interrupt scheme to use based on...
4705 * - Kernel support (MSI, MSI-X)
4706 * - which can be user-defined (via MODULE_PARAM)
4707 * - Hardware queue count (num_*_queues)
4708 * - defined by miscellaneous hardware support/features (RSS, etc.)
4710 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
4714 /* Number of supported queues */
4715 err
= ixgbe_set_num_queues(adapter
);
4719 err
= ixgbe_set_interrupt_capability(adapter
);
4721 e_dev_err("Unable to setup interrupt capabilities\n");
4722 goto err_set_interrupt
;
4725 err
= ixgbe_alloc_q_vectors(adapter
);
4727 e_dev_err("Unable to allocate memory for queue vectors\n");
4728 goto err_alloc_q_vectors
;
4731 err
= ixgbe_alloc_queues(adapter
);
4733 e_dev_err("Unable to allocate memory for queues\n");
4734 goto err_alloc_queues
;
4737 e_dev_info("Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
4738 (adapter
->num_rx_queues
> 1) ? "Enabled" : "Disabled",
4739 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
4741 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4746 ixgbe_free_q_vectors(adapter
);
4747 err_alloc_q_vectors
:
4748 ixgbe_reset_interrupt_capability(adapter
);
4754 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
4755 * @adapter: board private structure to clear interrupt scheme on
4757 * We go through and clear interrupt specific resources and reset the structure
4758 * to pre-load conditions
4760 void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter
*adapter
)
4764 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4765 kfree(adapter
->tx_ring
[i
]);
4766 adapter
->tx_ring
[i
] = NULL
;
4768 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4769 kfree(adapter
->rx_ring
[i
]);
4770 adapter
->rx_ring
[i
] = NULL
;
4773 ixgbe_free_q_vectors(adapter
);
4774 ixgbe_reset_interrupt_capability(adapter
);
4778 * ixgbe_sfp_timer - worker thread to find a missing module
4779 * @data: pointer to our adapter struct
4781 static void ixgbe_sfp_timer(unsigned long data
)
4783 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
4786 * Do the sfp_timer outside of interrupt context due to the
4787 * delays that sfp+ detection requires
4789 schedule_work(&adapter
->sfp_task
);
4793 * ixgbe_sfp_task - worker thread to find a missing module
4794 * @work: pointer to work_struct containing our data
4796 static void ixgbe_sfp_task(struct work_struct
*work
)
4798 struct ixgbe_adapter
*adapter
= container_of(work
,
4799 struct ixgbe_adapter
,
4801 struct ixgbe_hw
*hw
= &adapter
->hw
;
4803 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
4804 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
4805 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
4806 if (ret
== IXGBE_ERR_SFP_NOT_PRESENT
)
4808 ret
= hw
->phy
.ops
.reset(hw
);
4809 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4810 e_dev_err("failed to initialize because an unsupported "
4811 "SFP+ module type was detected.\n");
4812 e_dev_err("Reload the driver after installing a "
4813 "supported module.\n");
4814 unregister_netdev(adapter
->netdev
);
4816 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
4818 /* don't need this routine any more */
4819 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4823 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
4824 mod_timer(&adapter
->sfp_timer
,
4825 round_jiffies(jiffies
+ (2 * HZ
)));
4829 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4830 * @adapter: board private structure to initialize
4832 * ixgbe_sw_init initializes the Adapter private data structure.
4833 * Fields are initialized based on PCI device information and
4834 * OS network device settings (MTU size).
4836 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4838 struct ixgbe_hw
*hw
= &adapter
->hw
;
4839 struct pci_dev
*pdev
= adapter
->pdev
;
4840 struct net_device
*dev
= adapter
->netdev
;
4842 #ifdef CONFIG_IXGBE_DCB
4844 struct tc_configuration
*tc
;
4847 /* PCI config space info */
4849 hw
->vendor_id
= pdev
->vendor
;
4850 hw
->device_id
= pdev
->device
;
4851 hw
->revision_id
= pdev
->revision
;
4852 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4853 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4855 /* Set capability flags */
4856 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
4857 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
4858 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
4859 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
4860 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
4861 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4862 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4863 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
4864 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4865 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
4866 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4867 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4868 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
4869 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4870 if (dev
->features
& NETIF_F_NTUPLE
) {
4871 /* Flow Director perfect filter enabled */
4872 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
4873 adapter
->atr_sample_rate
= 0;
4874 spin_lock_init(&adapter
->fdir_perfect_lock
);
4876 /* Flow Director hash filters enabled */
4877 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4878 adapter
->atr_sample_rate
= 20;
4880 adapter
->ring_feature
[RING_F_FDIR
].indices
=
4881 IXGBE_MAX_FDIR_INDICES
;
4882 adapter
->fdir_pballoc
= 0;
4884 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4885 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4886 adapter
->ring_feature
[RING_F_FCOE
].indices
= 0;
4887 #ifdef CONFIG_IXGBE_DCB
4888 /* Default traffic class to use for FCoE */
4889 adapter
->fcoe
.tc
= IXGBE_FCOE_DEFTC
;
4890 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
4892 #endif /* IXGBE_FCOE */
4895 #ifdef CONFIG_IXGBE_DCB
4896 /* Configure DCB traffic classes */
4897 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
4898 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
4899 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
4900 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4901 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
4902 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4903 tc
->dcb_pfc
= pfc_disabled
;
4905 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
4906 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
4907 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
4908 adapter
->dcb_cfg
.pfc_mode_enable
= false;
4909 adapter
->dcb_cfg
.round_robin_enable
= false;
4910 adapter
->dcb_set_bitmap
= 0x00;
4911 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
4912 adapter
->ring_feature
[RING_F_DCB
].indices
);
4916 /* default flow control settings */
4917 hw
->fc
.requested_mode
= ixgbe_fc_full
;
4918 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
4920 adapter
->last_lfc_mode
= hw
->fc
.current_mode
;
4922 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
4923 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
4924 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
4925 hw
->fc
.send_xon
= true;
4926 hw
->fc
.disable_fc_autoneg
= false;
4928 /* enable itr by default in dynamic mode */
4929 adapter
->rx_itr_setting
= 1;
4930 adapter
->rx_eitr_param
= 20000;
4931 adapter
->tx_itr_setting
= 1;
4932 adapter
->tx_eitr_param
= 10000;
4934 /* set defaults for eitr in MegaBytes */
4935 adapter
->eitr_low
= 10;
4936 adapter
->eitr_high
= 20;
4938 /* set default ring sizes */
4939 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
4940 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
4942 /* initialize eeprom parameters */
4943 if (ixgbe_init_eeprom_params_generic(hw
)) {
4944 e_dev_err("EEPROM initialization failed\n");
4948 /* enable rx csum by default */
4949 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
4951 /* get assigned NUMA node */
4952 adapter
->node
= dev_to_node(&pdev
->dev
);
4954 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4960 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4961 * @adapter: board private structure
4962 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4964 * Return 0 on success, negative on failure
4966 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
4967 struct ixgbe_ring
*tx_ring
)
4969 struct pci_dev
*pdev
= adapter
->pdev
;
4972 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4973 tx_ring
->tx_buffer_info
= vmalloc_node(size
, tx_ring
->numa_node
);
4974 if (!tx_ring
->tx_buffer_info
)
4975 tx_ring
->tx_buffer_info
= vmalloc(size
);
4976 if (!tx_ring
->tx_buffer_info
)
4978 memset(tx_ring
->tx_buffer_info
, 0, size
);
4980 /* round up to nearest 4K */
4981 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4982 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4984 tx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, tx_ring
->size
,
4985 &tx_ring
->dma
, GFP_KERNEL
);
4989 tx_ring
->next_to_use
= 0;
4990 tx_ring
->next_to_clean
= 0;
4991 tx_ring
->work_limit
= tx_ring
->count
;
4995 vfree(tx_ring
->tx_buffer_info
);
4996 tx_ring
->tx_buffer_info
= NULL
;
4997 e_err(probe
, "Unable to allocate memory for the Tx descriptor ring\n");
5002 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5003 * @adapter: board private structure
5005 * If this function returns with an error, then it's possible one or
5006 * more of the rings is populated (while the rest are not). It is the
5007 * callers duty to clean those orphaned rings.
5009 * Return 0 on success, negative on failure
5011 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
5015 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5016 err
= ixgbe_setup_tx_resources(adapter
, adapter
->tx_ring
[i
]);
5019 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
5027 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5028 * @adapter: board private structure
5029 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5031 * Returns 0 on success, negative on failure
5033 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
5034 struct ixgbe_ring
*rx_ring
)
5036 struct pci_dev
*pdev
= adapter
->pdev
;
5039 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5040 rx_ring
->rx_buffer_info
= vmalloc_node(size
, adapter
->node
);
5041 if (!rx_ring
->rx_buffer_info
)
5042 rx_ring
->rx_buffer_info
= vmalloc(size
);
5043 if (!rx_ring
->rx_buffer_info
) {
5044 e_err(probe
, "vmalloc allocation failed for the Rx "
5045 "descriptor ring\n");
5048 memset(rx_ring
->rx_buffer_info
, 0, size
);
5050 /* Round up to nearest 4K */
5051 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5052 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5054 rx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, rx_ring
->size
,
5055 &rx_ring
->dma
, GFP_KERNEL
);
5057 if (!rx_ring
->desc
) {
5058 e_err(probe
, "Memory allocation failed for the Rx "
5059 "descriptor ring\n");
5060 vfree(rx_ring
->rx_buffer_info
);
5064 rx_ring
->next_to_clean
= 0;
5065 rx_ring
->next_to_use
= 0;
5074 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5075 * @adapter: board private structure
5077 * If this function returns with an error, then it's possible one or
5078 * more of the rings is populated (while the rest are not). It is the
5079 * callers duty to clean those orphaned rings.
5081 * Return 0 on success, negative on failure
5084 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5088 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5089 err
= ixgbe_setup_rx_resources(adapter
, adapter
->rx_ring
[i
]);
5092 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5100 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5101 * @adapter: board private structure
5102 * @tx_ring: Tx descriptor ring for a specific queue
5104 * Free all transmit software resources
5106 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
5107 struct ixgbe_ring
*tx_ring
)
5109 struct pci_dev
*pdev
= adapter
->pdev
;
5111 ixgbe_clean_tx_ring(adapter
, tx_ring
);
5113 vfree(tx_ring
->tx_buffer_info
);
5114 tx_ring
->tx_buffer_info
= NULL
;
5116 dma_free_coherent(&pdev
->dev
, tx_ring
->size
, tx_ring
->desc
,
5119 tx_ring
->desc
= NULL
;
5123 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5124 * @adapter: board private structure
5126 * Free all transmit software resources
5128 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
5132 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5133 if (adapter
->tx_ring
[i
]->desc
)
5134 ixgbe_free_tx_resources(adapter
, adapter
->tx_ring
[i
]);
5138 * ixgbe_free_rx_resources - Free Rx Resources
5139 * @adapter: board private structure
5140 * @rx_ring: ring to clean the resources from
5142 * Free all receive software resources
5144 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
5145 struct ixgbe_ring
*rx_ring
)
5147 struct pci_dev
*pdev
= adapter
->pdev
;
5149 ixgbe_clean_rx_ring(adapter
, rx_ring
);
5151 vfree(rx_ring
->rx_buffer_info
);
5152 rx_ring
->rx_buffer_info
= NULL
;
5154 dma_free_coherent(&pdev
->dev
, rx_ring
->size
, rx_ring
->desc
,
5157 rx_ring
->desc
= NULL
;
5161 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5162 * @adapter: board private structure
5164 * Free all receive software resources
5166 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
5170 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5171 if (adapter
->rx_ring
[i
]->desc
)
5172 ixgbe_free_rx_resources(adapter
, adapter
->rx_ring
[i
]);
5176 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5177 * @netdev: network interface device structure
5178 * @new_mtu: new value for maximum frame size
5180 * Returns 0 on success, negative on failure
5182 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
5184 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5185 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5187 /* MTU < 68 is an error and causes problems on some kernels */
5188 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
5191 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
5192 /* must set new MTU before calling down or up */
5193 netdev
->mtu
= new_mtu
;
5195 if (netif_running(netdev
))
5196 ixgbe_reinit_locked(adapter
);
5202 * ixgbe_open - Called when a network interface is made active
5203 * @netdev: network interface device structure
5205 * Returns 0 on success, negative value on failure
5207 * The open entry point is called when a network interface is made
5208 * active by the system (IFF_UP). At this point all resources needed
5209 * for transmit and receive operations are allocated, the interrupt
5210 * handler is registered with the OS, the watchdog timer is started,
5211 * and the stack is notified that the interface is ready.
5213 static int ixgbe_open(struct net_device
*netdev
)
5215 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5218 /* disallow open during test */
5219 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
5222 netif_carrier_off(netdev
);
5224 /* allocate transmit descriptors */
5225 err
= ixgbe_setup_all_tx_resources(adapter
);
5229 /* allocate receive descriptors */
5230 err
= ixgbe_setup_all_rx_resources(adapter
);
5234 ixgbe_configure(adapter
);
5236 err
= ixgbe_request_irq(adapter
);
5240 err
= ixgbe_up_complete(adapter
);
5244 netif_tx_start_all_queues(netdev
);
5249 ixgbe_release_hw_control(adapter
);
5250 ixgbe_free_irq(adapter
);
5253 ixgbe_free_all_rx_resources(adapter
);
5255 ixgbe_free_all_tx_resources(adapter
);
5256 ixgbe_reset(adapter
);
5262 * ixgbe_close - Disables a network interface
5263 * @netdev: network interface device structure
5265 * Returns 0, this is not allowed to fail
5267 * The close entry point is called when an interface is de-activated
5268 * by the OS. The hardware is still under the drivers control, but
5269 * needs to be disabled. A global MAC reset is issued to stop the
5270 * hardware, and all transmit and receive resources are freed.
5272 static int ixgbe_close(struct net_device
*netdev
)
5274 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5276 ixgbe_down(adapter
);
5277 ixgbe_free_irq(adapter
);
5279 ixgbe_free_all_tx_resources(adapter
);
5280 ixgbe_free_all_rx_resources(adapter
);
5282 ixgbe_release_hw_control(adapter
);
5288 static int ixgbe_resume(struct pci_dev
*pdev
)
5290 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5291 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5294 pci_set_power_state(pdev
, PCI_D0
);
5295 pci_restore_state(pdev
);
5297 * pci_restore_state clears dev->state_saved so call
5298 * pci_save_state to restore it.
5300 pci_save_state(pdev
);
5302 err
= pci_enable_device_mem(pdev
);
5304 e_dev_err("Cannot enable PCI device from suspend\n");
5307 pci_set_master(pdev
);
5309 pci_wake_from_d3(pdev
, false);
5311 err
= ixgbe_init_interrupt_scheme(adapter
);
5313 e_dev_err("Cannot initialize interrupts for device\n");
5317 ixgbe_reset(adapter
);
5319 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5321 if (netif_running(netdev
)) {
5322 err
= ixgbe_open(adapter
->netdev
);
5327 netif_device_attach(netdev
);
5331 #endif /* CONFIG_PM */
5333 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5335 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5336 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5337 struct ixgbe_hw
*hw
= &adapter
->hw
;
5339 u32 wufc
= adapter
->wol
;
5344 netif_device_detach(netdev
);
5346 if (netif_running(netdev
)) {
5347 ixgbe_down(adapter
);
5348 ixgbe_free_irq(adapter
);
5349 ixgbe_free_all_tx_resources(adapter
);
5350 ixgbe_free_all_rx_resources(adapter
);
5354 retval
= pci_save_state(pdev
);
5360 ixgbe_set_rx_mode(netdev
);
5362 /* turn on all-multi mode if wake on multicast is enabled */
5363 if (wufc
& IXGBE_WUFC_MC
) {
5364 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5365 fctrl
|= IXGBE_FCTRL_MPE
;
5366 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
5369 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
5370 ctrl
|= IXGBE_CTRL_GIO_DIS
;
5371 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
5373 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
5375 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
5376 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
5379 if (wufc
&& hw
->mac
.type
== ixgbe_mac_82599EB
)
5380 pci_wake_from_d3(pdev
, true);
5382 pci_wake_from_d3(pdev
, false);
5384 *enable_wake
= !!wufc
;
5386 ixgbe_clear_interrupt_scheme(adapter
);
5388 ixgbe_release_hw_control(adapter
);
5390 pci_disable_device(pdev
);
5396 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5401 retval
= __ixgbe_shutdown(pdev
, &wake
);
5406 pci_prepare_to_sleep(pdev
);
5408 pci_wake_from_d3(pdev
, false);
5409 pci_set_power_state(pdev
, PCI_D3hot
);
5414 #endif /* CONFIG_PM */
5416 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5420 __ixgbe_shutdown(pdev
, &wake
);
5422 if (system_state
== SYSTEM_POWER_OFF
) {
5423 pci_wake_from_d3(pdev
, wake
);
5424 pci_set_power_state(pdev
, PCI_D3hot
);
5429 * ixgbe_update_stats - Update the board statistics counters.
5430 * @adapter: board private structure
5432 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5434 struct net_device
*netdev
= adapter
->netdev
;
5435 struct ixgbe_hw
*hw
= &adapter
->hw
;
5437 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5438 u64 non_eop_descs
= 0, restart_queue
= 0;
5439 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5441 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5442 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5445 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5448 for (i
= 0; i
< 16; i
++)
5449 adapter
->hw_rx_no_dma_resources
+=
5450 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5451 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5452 rsc_count
+= adapter
->rx_ring
[i
]->rsc_count
;
5453 rsc_flush
+= adapter
->rx_ring
[i
]->rsc_flush
;
5455 adapter
->rsc_total_count
= rsc_count
;
5456 adapter
->rsc_total_flush
= rsc_flush
;
5459 /* gather some stats to the adapter struct that are per queue */
5460 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5461 restart_queue
+= adapter
->tx_ring
[i
]->restart_queue
;
5462 adapter
->restart_queue
= restart_queue
;
5464 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5465 non_eop_descs
+= adapter
->rx_ring
[i
]->non_eop_descs
;
5466 adapter
->non_eop_descs
= non_eop_descs
;
5468 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5469 for (i
= 0; i
< 8; i
++) {
5470 /* for packet buffers not used, the register should read 0 */
5471 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5473 hwstats
->mpc
[i
] += mpc
;
5474 total_mpc
+= hwstats
->mpc
[i
];
5475 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5476 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5477 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5478 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5479 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5480 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5481 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5482 hwstats
->pxonrxc
[i
] +=
5483 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5484 hwstats
->pxoffrxc
[i
] +=
5485 IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
5486 hwstats
->qprdc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5488 hwstats
->pxonrxc
[i
] +=
5489 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5490 hwstats
->pxoffrxc
[i
] +=
5491 IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
5493 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5494 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5496 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5497 /* work around hardware counting issue */
5498 hwstats
->gprc
-= missed_rx
;
5500 /* 82598 hardware only has a 32 bit counter in the high register */
5501 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5503 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5504 tmp
= IXGBE_READ_REG(hw
, IXGBE_GORCH
) & 0xF;
5505 /* 4 high bits of GORC */
5506 hwstats
->gorc
+= (tmp
<< 32);
5507 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5508 tmp
= IXGBE_READ_REG(hw
, IXGBE_GOTCH
) & 0xF;
5509 /* 4 high bits of GOTC */
5510 hwstats
->gotc
+= (tmp
<< 32);
5511 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5512 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5513 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5514 hwstats
->lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
5515 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5516 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5518 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5519 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5520 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5521 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5522 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5523 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5524 #endif /* IXGBE_FCOE */
5526 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5527 hwstats
->lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
5528 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5529 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5530 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5532 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5533 hwstats
->bprc
+= bprc
;
5534 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5535 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5536 hwstats
->mprc
-= bprc
;
5537 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5538 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5539 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5540 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5541 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5542 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5543 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5544 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5545 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5546 hwstats
->lxontxc
+= lxon
;
5547 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5548 hwstats
->lxofftxc
+= lxoff
;
5549 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5550 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5551 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5553 * 82598 errata - tx of flow control packets is included in tx counters
5555 xon_off_tot
= lxon
+ lxoff
;
5556 hwstats
->gptc
-= xon_off_tot
;
5557 hwstats
->mptc
-= xon_off_tot
;
5558 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5559 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5560 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5561 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5562 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5563 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5564 hwstats
->ptc64
-= xon_off_tot
;
5565 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5566 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5567 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5568 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5569 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5570 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5572 /* Fill out the OS statistics structure */
5573 netdev
->stats
.multicast
= hwstats
->mprc
;
5576 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5577 netdev
->stats
.rx_dropped
= 0;
5578 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5579 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5580 netdev
->stats
.rx_missed_errors
= total_mpc
;
5584 * ixgbe_watchdog - Timer Call-back
5585 * @data: pointer to adapter cast into an unsigned long
5587 static void ixgbe_watchdog(unsigned long data
)
5589 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
5590 struct ixgbe_hw
*hw
= &adapter
->hw
;
5595 * Do the watchdog outside of interrupt context due to the lovely
5596 * delays that some of the newer hardware requires
5599 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5600 goto watchdog_short_circuit
;
5602 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5604 * for legacy and MSI interrupts don't set any bits
5605 * that are enabled for EIAM, because this operation
5606 * would set *both* EIMS and EICS for any bit in EIAM
5608 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5609 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5610 goto watchdog_reschedule
;
5613 /* get one bit for every active tx/rx interrupt vector */
5614 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
5615 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5616 if (qv
->rxr_count
|| qv
->txr_count
)
5617 eics
|= ((u64
)1 << i
);
5620 /* Cause software interrupt to ensure rx rings are cleaned */
5621 ixgbe_irq_rearm_queues(adapter
, eics
);
5623 watchdog_reschedule
:
5624 /* Reset the timer */
5625 mod_timer(&adapter
->watchdog_timer
, round_jiffies(jiffies
+ 2 * HZ
));
5627 watchdog_short_circuit
:
5628 schedule_work(&adapter
->watchdog_task
);
5632 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
5633 * @work: pointer to work_struct containing our data
5635 static void ixgbe_multispeed_fiber_task(struct work_struct
*work
)
5637 struct ixgbe_adapter
*adapter
= container_of(work
,
5638 struct ixgbe_adapter
,
5639 multispeed_fiber_task
);
5640 struct ixgbe_hw
*hw
= &adapter
->hw
;
5644 adapter
->flags
|= IXGBE_FLAG_IN_SFP_LINK_TASK
;
5645 autoneg
= hw
->phy
.autoneg_advertised
;
5646 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
5647 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
5648 hw
->mac
.autotry_restart
= false;
5649 if (hw
->mac
.ops
.setup_link
)
5650 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
5651 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5652 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_LINK_TASK
;
5656 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
5657 * @work: pointer to work_struct containing our data
5659 static void ixgbe_sfp_config_module_task(struct work_struct
*work
)
5661 struct ixgbe_adapter
*adapter
= container_of(work
,
5662 struct ixgbe_adapter
,
5663 sfp_config_module_task
);
5664 struct ixgbe_hw
*hw
= &adapter
->hw
;
5667 adapter
->flags
|= IXGBE_FLAG_IN_SFP_MOD_TASK
;
5669 /* Time for electrical oscillations to settle down */
5671 err
= hw
->phy
.ops
.identify_sfp(hw
);
5673 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
5674 e_dev_err("failed to initialize because an unsupported SFP+ "
5675 "module type was detected.\n");
5676 e_dev_err("Reload the driver after installing a supported "
5678 unregister_netdev(adapter
->netdev
);
5681 hw
->mac
.ops
.setup_sfp(hw
);
5683 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
5684 /* This will also work for DA Twinax connections */
5685 schedule_work(&adapter
->multispeed_fiber_task
);
5686 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_MOD_TASK
;
5690 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
5691 * @work: pointer to work_struct containing our data
5693 static void ixgbe_fdir_reinit_task(struct work_struct
*work
)
5695 struct ixgbe_adapter
*adapter
= container_of(work
,
5696 struct ixgbe_adapter
,
5698 struct ixgbe_hw
*hw
= &adapter
->hw
;
5701 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5702 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5703 set_bit(__IXGBE_FDIR_INIT_DONE
,
5704 &(adapter
->tx_ring
[i
]->reinit_state
));
5706 e_err(probe
, "failed to finish FDIR re-initialization, "
5707 "ignored adding FDIR ATR filters\n");
5709 /* Done FDIR Re-initialization, enable transmits */
5710 netif_tx_start_all_queues(adapter
->netdev
);
5713 static DEFINE_MUTEX(ixgbe_watchdog_lock
);
5716 * ixgbe_watchdog_task - worker thread to bring link up
5717 * @work: pointer to work_struct containing our data
5719 static void ixgbe_watchdog_task(struct work_struct
*work
)
5721 struct ixgbe_adapter
*adapter
= container_of(work
,
5722 struct ixgbe_adapter
,
5724 struct net_device
*netdev
= adapter
->netdev
;
5725 struct ixgbe_hw
*hw
= &adapter
->hw
;
5729 struct ixgbe_ring
*tx_ring
;
5730 int some_tx_pending
= 0;
5732 mutex_lock(&ixgbe_watchdog_lock
);
5734 link_up
= adapter
->link_up
;
5735 link_speed
= adapter
->link_speed
;
5737 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
5738 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5741 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5742 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++)
5743 hw
->mac
.ops
.fc_enable(hw
, i
);
5745 hw
->mac
.ops
.fc_enable(hw
, 0);
5748 hw
->mac
.ops
.fc_enable(hw
, 0);
5753 time_after(jiffies
, (adapter
->link_check_timeout
+
5754 IXGBE_TRY_LINK_TIMEOUT
))) {
5755 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5756 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5758 adapter
->link_up
= link_up
;
5759 adapter
->link_speed
= link_speed
;
5763 if (!netif_carrier_ok(netdev
)) {
5764 bool flow_rx
, flow_tx
;
5766 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
5767 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
5768 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
5769 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
5770 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
5772 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5773 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
5774 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
5775 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
5778 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
5779 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
5781 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
5782 "1 Gbps" : "unknown speed")),
5783 ((flow_rx
&& flow_tx
) ? "RX/TX" :
5785 (flow_tx
? "TX" : "None"))));
5787 netif_carrier_on(netdev
);
5789 /* Force detection of hung controller */
5790 adapter
->detect_tx_hung
= true;
5793 adapter
->link_up
= false;
5794 adapter
->link_speed
= 0;
5795 if (netif_carrier_ok(netdev
)) {
5796 e_info(drv
, "NIC Link is Down\n");
5797 netif_carrier_off(netdev
);
5801 if (!netif_carrier_ok(netdev
)) {
5802 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5803 tx_ring
= adapter
->tx_ring
[i
];
5804 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
5805 some_tx_pending
= 1;
5810 if (some_tx_pending
) {
5811 /* We've lost link, so the controller stops DMA,
5812 * but we've got queued Tx work that's never going
5813 * to get done, so reset controller to flush Tx.
5814 * (Do the reset outside of interrupt context).
5816 schedule_work(&adapter
->reset_task
);
5820 ixgbe_update_stats(adapter
);
5821 mutex_unlock(&ixgbe_watchdog_lock
);
5824 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
5825 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
5826 u32 tx_flags
, u8
*hdr_len
)
5828 struct ixgbe_adv_tx_context_desc
*context_desc
;
5831 struct ixgbe_tx_buffer
*tx_buffer_info
;
5832 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
5833 u32 mss_l4len_idx
, l4len
;
5835 if (skb_is_gso(skb
)) {
5836 if (skb_header_cloned(skb
)) {
5837 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
5841 l4len
= tcp_hdrlen(skb
);
5844 if (skb
->protocol
== htons(ETH_P_IP
)) {
5845 struct iphdr
*iph
= ip_hdr(skb
);
5848 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
5852 } else if (skb_is_gso_v6(skb
)) {
5853 ipv6_hdr(skb
)->payload_len
= 0;
5854 tcp_hdr(skb
)->check
=
5855 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5856 &ipv6_hdr(skb
)->daddr
,
5860 i
= tx_ring
->next_to_use
;
5862 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5863 context_desc
= IXGBE_TX_CTXTDESC_ADV(tx_ring
, i
);
5865 /* VLAN MACLEN IPLEN */
5866 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5868 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
5869 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
5870 IXGBE_ADVTXD_MACLEN_SHIFT
);
5871 *hdr_len
+= skb_network_offset(skb
);
5873 (skb_transport_header(skb
) - skb_network_header(skb
));
5875 (skb_transport_header(skb
) - skb_network_header(skb
));
5876 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
5877 context_desc
->seqnum_seed
= 0;
5879 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5880 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
5881 IXGBE_ADVTXD_DTYP_CTXT
);
5883 if (skb
->protocol
== htons(ETH_P_IP
))
5884 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5885 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5886 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
5890 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
5891 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
5892 /* use index 1 for TSO */
5893 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
5894 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
5896 tx_buffer_info
->time_stamp
= jiffies
;
5897 tx_buffer_info
->next_to_watch
= i
;
5900 if (i
== tx_ring
->count
)
5902 tx_ring
->next_to_use
= i
;
5909 static u32
ixgbe_psum(struct ixgbe_adapter
*adapter
, struct sk_buff
*skb
)
5914 if (skb
->protocol
== cpu_to_be16(ETH_P_8021Q
))
5915 protocol
= ((const struct vlan_ethhdr
*)skb
->data
)->
5916 h_vlan_encapsulated_proto
;
5918 protocol
= skb
->protocol
;
5921 case cpu_to_be16(ETH_P_IP
):
5922 rtn
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5923 switch (ip_hdr(skb
)->protocol
) {
5925 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5928 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5932 case cpu_to_be16(ETH_P_IPV6
):
5933 /* XXX what about other V6 headers?? */
5934 switch (ipv6_hdr(skb
)->nexthdr
) {
5936 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5939 rtn
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5944 if (unlikely(net_ratelimit()))
5945 e_warn(probe
, "partial checksum but proto=%x!\n",
5953 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
5954 struct ixgbe_ring
*tx_ring
,
5955 struct sk_buff
*skb
, u32 tx_flags
)
5957 struct ixgbe_adv_tx_context_desc
*context_desc
;
5959 struct ixgbe_tx_buffer
*tx_buffer_info
;
5960 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
5962 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
5963 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
5964 i
= tx_ring
->next_to_use
;
5965 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5966 context_desc
= IXGBE_TX_CTXTDESC_ADV(tx_ring
, i
);
5968 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
5970 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
5971 vlan_macip_lens
|= (skb_network_offset(skb
) <<
5972 IXGBE_ADVTXD_MACLEN_SHIFT
);
5973 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
5974 vlan_macip_lens
|= (skb_transport_header(skb
) -
5975 skb_network_header(skb
));
5977 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
5978 context_desc
->seqnum_seed
= 0;
5980 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
5981 IXGBE_ADVTXD_DTYP_CTXT
);
5983 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
5984 type_tucmd_mlhl
|= ixgbe_psum(adapter
, skb
);
5986 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
5987 /* use index zero for tx checksum offload */
5988 context_desc
->mss_l4len_idx
= 0;
5990 tx_buffer_info
->time_stamp
= jiffies
;
5991 tx_buffer_info
->next_to_watch
= i
;
5994 if (i
== tx_ring
->count
)
5996 tx_ring
->next_to_use
= i
;
6004 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
6005 struct ixgbe_ring
*tx_ring
,
6006 struct sk_buff
*skb
, u32 tx_flags
,
6009 struct pci_dev
*pdev
= adapter
->pdev
;
6010 struct ixgbe_tx_buffer
*tx_buffer_info
;
6012 unsigned int total
= skb
->len
;
6013 unsigned int offset
= 0, size
, count
= 0, i
;
6014 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
6017 i
= tx_ring
->next_to_use
;
6019 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
)
6020 /* excluding fcoe_crc_eof for FCoE */
6021 total
-= sizeof(struct fcoe_crc_eof
);
6023 len
= min(skb_headlen(skb
), total
);
6025 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
6026 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
6028 tx_buffer_info
->length
= size
;
6029 tx_buffer_info
->mapped_as_page
= false;
6030 tx_buffer_info
->dma
= dma_map_single(&pdev
->dev
,
6032 size
, DMA_TO_DEVICE
);
6033 if (dma_mapping_error(&pdev
->dev
, tx_buffer_info
->dma
))
6035 tx_buffer_info
->time_stamp
= jiffies
;
6036 tx_buffer_info
->next_to_watch
= i
;
6045 if (i
== tx_ring
->count
)
6050 for (f
= 0; f
< nr_frags
; f
++) {
6051 struct skb_frag_struct
*frag
;
6053 frag
= &skb_shinfo(skb
)->frags
[f
];
6054 len
= min((unsigned int)frag
->size
, total
);
6055 offset
= frag
->page_offset
;
6059 if (i
== tx_ring
->count
)
6062 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
6063 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
6065 tx_buffer_info
->length
= size
;
6066 tx_buffer_info
->dma
= dma_map_page(&adapter
->pdev
->dev
,
6070 tx_buffer_info
->mapped_as_page
= true;
6071 if (dma_mapping_error(&pdev
->dev
, tx_buffer_info
->dma
))
6073 tx_buffer_info
->time_stamp
= jiffies
;
6074 tx_buffer_info
->next_to_watch
= i
;
6085 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
6086 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
6091 e_dev_err("TX DMA map failed\n");
6093 /* clear timestamp and dma mappings for failed tx_buffer_info map */
6094 tx_buffer_info
->dma
= 0;
6095 tx_buffer_info
->time_stamp
= 0;
6096 tx_buffer_info
->next_to_watch
= 0;
6100 /* clear timestamp and dma mappings for remaining portion of packet */
6103 i
+= tx_ring
->count
;
6105 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
6106 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
6112 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
6113 struct ixgbe_ring
*tx_ring
,
6114 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
6116 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
6117 struct ixgbe_tx_buffer
*tx_buffer_info
;
6118 u32 olinfo_status
= 0, cmd_type_len
= 0;
6120 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
6122 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
6124 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
6126 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
6127 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
6129 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
6130 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
6132 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
6133 IXGBE_ADVTXD_POPTS_SHIFT
;
6135 /* use index 1 context for tso */
6136 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
6137 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
6138 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
6139 IXGBE_ADVTXD_POPTS_SHIFT
;
6141 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
6142 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
6143 IXGBE_ADVTXD_POPTS_SHIFT
;
6145 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6146 olinfo_status
|= IXGBE_ADVTXD_CC
;
6147 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
6148 if (tx_flags
& IXGBE_TX_FLAGS_FSO
)
6149 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
6152 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
6154 i
= tx_ring
->next_to_use
;
6156 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
6157 tx_desc
= IXGBE_TX_DESC_ADV(tx_ring
, i
);
6158 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
6159 tx_desc
->read
.cmd_type_len
=
6160 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
6161 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
6163 if (i
== tx_ring
->count
)
6167 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
6170 * Force memory writes to complete before letting h/w
6171 * know there are new descriptors to fetch. (Only
6172 * applicable for weak-ordered memory model archs,
6177 tx_ring
->next_to_use
= i
;
6178 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
6181 static void ixgbe_atr(struct ixgbe_adapter
*adapter
, struct sk_buff
*skb
,
6182 int queue
, u32 tx_flags
)
6184 struct ixgbe_atr_input atr_input
;
6186 struct iphdr
*iph
= ip_hdr(skb
);
6187 struct ethhdr
*eth
= (struct ethhdr
*)skb
->data
;
6188 u16 vlan_id
, src_port
, dst_port
, flex_bytes
;
6189 u32 src_ipv4_addr
, dst_ipv4_addr
;
6192 /* Right now, we support IPv4 only */
6193 if (skb
->protocol
!= htons(ETH_P_IP
))
6195 /* check if we're UDP or TCP */
6196 if (iph
->protocol
== IPPROTO_TCP
) {
6198 src_port
= th
->source
;
6199 dst_port
= th
->dest
;
6200 l4type
|= IXGBE_ATR_L4TYPE_TCP
;
6201 /* l4type IPv4 type is 0, no need to assign */
6203 /* Unsupported L4 header, just bail here */
6207 memset(&atr_input
, 0, sizeof(struct ixgbe_atr_input
));
6209 vlan_id
= (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
) >>
6210 IXGBE_TX_FLAGS_VLAN_SHIFT
;
6211 src_ipv4_addr
= iph
->saddr
;
6212 dst_ipv4_addr
= iph
->daddr
;
6213 flex_bytes
= eth
->h_proto
;
6215 ixgbe_atr_set_vlan_id_82599(&atr_input
, vlan_id
);
6216 ixgbe_atr_set_src_port_82599(&atr_input
, dst_port
);
6217 ixgbe_atr_set_dst_port_82599(&atr_input
, src_port
);
6218 ixgbe_atr_set_flex_byte_82599(&atr_input
, flex_bytes
);
6219 ixgbe_atr_set_l4type_82599(&atr_input
, l4type
);
6220 /* src and dst are inverted, think how the receiver sees them */
6221 ixgbe_atr_set_src_ipv4_82599(&atr_input
, dst_ipv4_addr
);
6222 ixgbe_atr_set_dst_ipv4_82599(&atr_input
, src_ipv4_addr
);
6224 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6225 ixgbe_fdir_add_signature_filter_82599(&adapter
->hw
, &atr_input
, queue
);
6228 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
6229 struct ixgbe_ring
*tx_ring
, int size
)
6231 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
6232 /* Herbert's original patch had:
6233 * smp_mb__after_netif_stop_queue();
6234 * but since that doesn't exist yet, just open code it. */
6237 /* We need to check again in a case another CPU has just
6238 * made room available. */
6239 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
6242 /* A reprieve! - use start_queue because it doesn't call schedule */
6243 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
6244 ++tx_ring
->restart_queue
;
6248 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
6249 struct ixgbe_ring
*tx_ring
, int size
)
6251 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
6253 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
6256 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
6258 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6259 int txq
= smp_processor_id();
6262 if ((skb
->protocol
== htons(ETH_P_FCOE
)) ||
6263 (skb
->protocol
== htons(ETH_P_FIP
))) {
6264 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) {
6265 txq
&= (adapter
->ring_feature
[RING_F_FCOE
].indices
- 1);
6266 txq
+= adapter
->ring_feature
[RING_F_FCOE
].mask
;
6268 #ifdef CONFIG_IXGBE_DCB
6269 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6270 txq
= adapter
->fcoe
.up
;
6277 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
6278 while (unlikely(txq
>= dev
->real_num_tx_queues
))
6279 txq
-= dev
->real_num_tx_queues
;
6283 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6284 if (skb
->priority
== TC_PRIO_CONTROL
)
6285 txq
= adapter
->ring_feature
[RING_F_DCB
].indices
-1;
6287 txq
= (skb
->vlan_tci
& IXGBE_TX_FLAGS_VLAN_PRIO_MASK
)
6292 return skb_tx_hash(dev
, skb
);
6295 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
, struct net_device
*netdev
,
6296 struct ixgbe_adapter
*adapter
,
6297 struct ixgbe_ring
*tx_ring
)
6299 struct netdev_queue
*txq
;
6301 unsigned int tx_flags
= 0;
6307 if (vlan_tx_tag_present(skb
)) {
6308 tx_flags
|= vlan_tx_tag_get(skb
);
6309 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6310 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
6311 tx_flags
|= ((skb
->queue_mapping
& 0x7) << 13);
6313 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
6314 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
6315 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
&&
6316 skb
->priority
!= TC_PRIO_CONTROL
) {
6317 tx_flags
|= ((skb
->queue_mapping
& 0x7) << 13);
6318 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
6319 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
6323 /* for FCoE with DCB, we force the priority to what
6324 * was specified by the switch */
6325 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
&&
6326 (skb
->protocol
== htons(ETH_P_FCOE
) ||
6327 skb
->protocol
== htons(ETH_P_FIP
))) {
6328 #ifdef CONFIG_IXGBE_DCB
6329 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
6330 tx_flags
&= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK
6331 << IXGBE_TX_FLAGS_VLAN_SHIFT
);
6332 tx_flags
|= ((adapter
->fcoe
.up
<< 13)
6333 << IXGBE_TX_FLAGS_VLAN_SHIFT
);
6336 /* flag for FCoE offloads */
6337 if (skb
->protocol
== htons(ETH_P_FCOE
))
6338 tx_flags
|= IXGBE_TX_FLAGS_FCOE
;
6342 /* four things can cause us to need a context descriptor */
6343 if (skb_is_gso(skb
) ||
6344 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
6345 (tx_flags
& IXGBE_TX_FLAGS_VLAN
) ||
6346 (tx_flags
& IXGBE_TX_FLAGS_FCOE
))
6349 count
+= TXD_USE_COUNT(skb_headlen(skb
));
6350 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6351 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6353 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
6355 return NETDEV_TX_BUSY
;
6358 first
= tx_ring
->next_to_use
;
6359 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6361 /* setup tx offload for FCoE */
6362 tso
= ixgbe_fso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
6364 dev_kfree_skb_any(skb
);
6365 return NETDEV_TX_OK
;
6368 tx_flags
|= IXGBE_TX_FLAGS_FSO
;
6369 #endif /* IXGBE_FCOE */
6371 if (skb
->protocol
== htons(ETH_P_IP
))
6372 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
6373 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
6375 dev_kfree_skb_any(skb
);
6376 return NETDEV_TX_OK
;
6380 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
6381 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
6382 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
6383 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
6386 count
= ixgbe_tx_map(adapter
, tx_ring
, skb
, tx_flags
, first
);
6388 /* add the ATR filter if ATR is on */
6389 if (tx_ring
->atr_sample_rate
) {
6390 ++tx_ring
->atr_count
;
6391 if ((tx_ring
->atr_count
>= tx_ring
->atr_sample_rate
) &&
6392 test_bit(__IXGBE_FDIR_INIT_DONE
,
6393 &tx_ring
->reinit_state
)) {
6394 ixgbe_atr(adapter
, skb
, tx_ring
->queue_index
,
6396 tx_ring
->atr_count
= 0;
6399 txq
= netdev_get_tx_queue(netdev
, tx_ring
->queue_index
);
6400 txq
->tx_bytes
+= skb
->len
;
6402 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
, count
, skb
->len
,
6404 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
6407 dev_kfree_skb_any(skb
);
6408 tx_ring
->tx_buffer_info
[first
].time_stamp
= 0;
6409 tx_ring
->next_to_use
= first
;
6412 return NETDEV_TX_OK
;
6415 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
6417 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6418 struct ixgbe_ring
*tx_ring
;
6420 tx_ring
= adapter
->tx_ring
[skb
->queue_mapping
];
6421 return ixgbe_xmit_frame_ring(skb
, netdev
, adapter
, tx_ring
);
6425 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6426 * @netdev: network interface device structure
6427 * @p: pointer to an address structure
6429 * Returns 0 on success, negative on failure
6431 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
6433 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6434 struct ixgbe_hw
*hw
= &adapter
->hw
;
6435 struct sockaddr
*addr
= p
;
6437 if (!is_valid_ether_addr(addr
->sa_data
))
6438 return -EADDRNOTAVAIL
;
6440 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
6441 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
6443 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
6450 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
6452 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6453 struct ixgbe_hw
*hw
= &adapter
->hw
;
6457 if (prtad
!= hw
->phy
.mdio
.prtad
)
6459 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
6465 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
6466 u16 addr
, u16 value
)
6468 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6469 struct ixgbe_hw
*hw
= &adapter
->hw
;
6471 if (prtad
!= hw
->phy
.mdio
.prtad
)
6473 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
6476 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
6478 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6480 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
6484 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6486 * @netdev: network interface device structure
6488 * Returns non-zero on failure
6490 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
6493 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6494 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6496 if (is_valid_ether_addr(mac
->san_addr
)) {
6498 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6505 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6507 * @netdev: network interface device structure
6509 * Returns non-zero on failure
6511 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
6514 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6515 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6517 if (is_valid_ether_addr(mac
->san_addr
)) {
6519 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6525 #ifdef CONFIG_NET_POLL_CONTROLLER
6527 * Polling 'interrupt' - used by things like netconsole to send skbs
6528 * without having to re-enable interrupts. It's not called while
6529 * the interrupt routine is executing.
6531 static void ixgbe_netpoll(struct net_device
*netdev
)
6533 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6536 /* if interface is down do nothing */
6537 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6540 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
6541 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
6542 int num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
6543 for (i
= 0; i
< num_q_vectors
; i
++) {
6544 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
6545 ixgbe_msix_clean_many(0, q_vector
);
6548 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
6550 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
6554 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
6555 struct rtnl_link_stats64
*stats
)
6557 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6560 /* accurate rx/tx bytes/packets stats */
6561 dev_txq_stats_fold(netdev
, stats
);
6562 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6563 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
6568 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6569 packets
= ring
->stats
.packets
;
6570 bytes
= ring
->stats
.bytes
;
6571 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6572 stats
->rx_packets
+= packets
;
6573 stats
->rx_bytes
+= bytes
;
6576 /* following stats updated by ixgbe_watchdog_task() */
6577 stats
->multicast
= netdev
->stats
.multicast
;
6578 stats
->rx_errors
= netdev
->stats
.rx_errors
;
6579 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
6580 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
6581 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
6586 static const struct net_device_ops ixgbe_netdev_ops
= {
6587 .ndo_open
= ixgbe_open
,
6588 .ndo_stop
= ixgbe_close
,
6589 .ndo_start_xmit
= ixgbe_xmit_frame
,
6590 .ndo_select_queue
= ixgbe_select_queue
,
6591 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
6592 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
6593 .ndo_validate_addr
= eth_validate_addr
,
6594 .ndo_set_mac_address
= ixgbe_set_mac
,
6595 .ndo_change_mtu
= ixgbe_change_mtu
,
6596 .ndo_tx_timeout
= ixgbe_tx_timeout
,
6597 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
6598 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
6599 .ndo_do_ioctl
= ixgbe_ioctl
,
6600 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
6601 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
6602 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
6603 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
6604 .ndo_get_stats64
= ixgbe_get_stats64
,
6605 #ifdef CONFIG_NET_POLL_CONTROLLER
6606 .ndo_poll_controller
= ixgbe_netpoll
,
6609 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
6610 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
6611 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
6612 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
6613 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
6614 #endif /* IXGBE_FCOE */
6617 static void __devinit
ixgbe_probe_vf(struct ixgbe_adapter
*adapter
,
6618 const struct ixgbe_info
*ii
)
6620 #ifdef CONFIG_PCI_IOV
6621 struct ixgbe_hw
*hw
= &adapter
->hw
;
6624 if (hw
->mac
.type
!= ixgbe_mac_82599EB
|| !max_vfs
)
6627 /* The 82599 supports up to 64 VFs per physical function
6628 * but this implementation limits allocation to 63 so that
6629 * basic networking resources are still available to the
6632 adapter
->num_vfs
= (max_vfs
> 63) ? 63 : max_vfs
;
6633 adapter
->flags
|= IXGBE_FLAG_SRIOV_ENABLED
;
6634 err
= pci_enable_sriov(adapter
->pdev
, adapter
->num_vfs
);
6636 e_err(probe
, "Failed to enable PCI sriov: %d\n", err
);
6639 /* If call to enable VFs succeeded then allocate memory
6640 * for per VF control structures.
6643 kcalloc(adapter
->num_vfs
,
6644 sizeof(struct vf_data_storage
), GFP_KERNEL
);
6645 if (adapter
->vfinfo
) {
6646 /* Now that we're sure SR-IOV is enabled
6647 * and memory allocated set up the mailbox parameters
6649 ixgbe_init_mbx_params_pf(hw
);
6650 memcpy(&hw
->mbx
.ops
, ii
->mbx_ops
,
6651 sizeof(hw
->mbx
.ops
));
6653 /* Disable RSC when in SR-IOV mode */
6654 adapter
->flags2
&= ~(IXGBE_FLAG2_RSC_CAPABLE
|
6655 IXGBE_FLAG2_RSC_ENABLED
);
6660 e_err(probe
, "Unable to allocate memory for VF Data Storage - "
6661 "SRIOV disabled\n");
6662 pci_disable_sriov(adapter
->pdev
);
6665 adapter
->flags
&= ~IXGBE_FLAG_SRIOV_ENABLED
;
6666 adapter
->num_vfs
= 0;
6667 #endif /* CONFIG_PCI_IOV */
6671 * ixgbe_probe - Device Initialization Routine
6672 * @pdev: PCI device information struct
6673 * @ent: entry in ixgbe_pci_tbl
6675 * Returns 0 on success, negative on failure
6677 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6678 * The OS initialization, configuring of the adapter private structure,
6679 * and a hardware reset occur.
6681 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
6682 const struct pci_device_id
*ent
)
6684 struct net_device
*netdev
;
6685 struct ixgbe_adapter
*adapter
= NULL
;
6686 struct ixgbe_hw
*hw
;
6687 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
6688 static int cards_found
;
6689 int i
, err
, pci_using_dac
;
6690 unsigned int indices
= num_possible_cpus();
6696 /* Catch broken hardware that put the wrong VF device ID in
6697 * the PCIe SR-IOV capability.
6699 if (pdev
->is_virtfn
) {
6700 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
6701 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
6705 err
= pci_enable_device_mem(pdev
);
6709 if (!dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64)) &&
6710 !dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64))) {
6713 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
6715 err
= dma_set_coherent_mask(&pdev
->dev
,
6719 "No usable DMA configuration, aborting\n");
6726 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
6727 IORESOURCE_MEM
), ixgbe_driver_name
);
6730 "pci_request_selected_regions failed 0x%x\n", err
);
6734 pci_enable_pcie_error_reporting(pdev
);
6736 pci_set_master(pdev
);
6737 pci_save_state(pdev
);
6739 if (ii
->mac
== ixgbe_mac_82598EB
)
6740 indices
= min_t(unsigned int, indices
, IXGBE_MAX_RSS_INDICES
);
6742 indices
= min_t(unsigned int, indices
, IXGBE_MAX_FDIR_INDICES
);
6744 indices
= max_t(unsigned int, indices
, IXGBE_MAX_DCB_INDICES
);
6746 indices
+= min_t(unsigned int, num_possible_cpus(),
6747 IXGBE_MAX_FCOE_INDICES
);
6749 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
6752 goto err_alloc_etherdev
;
6755 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
6757 pci_set_drvdata(pdev
, netdev
);
6758 adapter
= netdev_priv(netdev
);
6760 adapter
->netdev
= netdev
;
6761 adapter
->pdev
= pdev
;
6764 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
6766 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
6767 pci_resource_len(pdev
, 0));
6773 for (i
= 1; i
<= 5; i
++) {
6774 if (pci_resource_len(pdev
, i
) == 0)
6778 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
6779 ixgbe_set_ethtool_ops(netdev
);
6780 netdev
->watchdog_timeo
= 5 * HZ
;
6781 strcpy(netdev
->name
, pci_name(pdev
));
6783 adapter
->bd_number
= cards_found
;
6786 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
6787 hw
->mac
.type
= ii
->mac
;
6790 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
6791 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
6792 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
6793 if (!(eec
& (1 << 8)))
6794 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
6797 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
6798 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
6799 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
6800 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
6801 hw
->phy
.mdio
.mmds
= 0;
6802 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
6803 hw
->phy
.mdio
.dev
= netdev
;
6804 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
6805 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
6807 /* set up this timer and work struct before calling get_invariants
6808 * which might start the timer
6810 init_timer(&adapter
->sfp_timer
);
6811 adapter
->sfp_timer
.function
= ixgbe_sfp_timer
;
6812 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
6814 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
6816 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
6817 INIT_WORK(&adapter
->multispeed_fiber_task
, ixgbe_multispeed_fiber_task
);
6819 /* a new SFP+ module arrival, called from GPI SDP2 context */
6820 INIT_WORK(&adapter
->sfp_config_module_task
,
6821 ixgbe_sfp_config_module_task
);
6823 ii
->get_invariants(hw
);
6825 /* setup the private structure */
6826 err
= ixgbe_sw_init(adapter
);
6830 /* Make it possible the adapter to be woken up via WOL */
6831 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
6832 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6835 * If there is a fan on this device and it has failed log the
6838 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
6839 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
6840 if (esdp
& IXGBE_ESDP_SDP1
)
6841 e_crit(probe
, "Fan has stopped, replace the adapter\n");
6844 /* reset_hw fills in the perm_addr as well */
6845 hw
->phy
.reset_if_overtemp
= true;
6846 err
= hw
->mac
.ops
.reset_hw(hw
);
6847 hw
->phy
.reset_if_overtemp
= false;
6848 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
6849 hw
->mac
.type
== ixgbe_mac_82598EB
) {
6851 * Start a kernel thread to watch for a module to arrive.
6852 * Only do this for 82598, since 82599 will generate
6853 * interrupts on module arrival.
6855 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
6856 mod_timer(&adapter
->sfp_timer
,
6857 round_jiffies(jiffies
+ (2 * HZ
)));
6859 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
6860 e_dev_err("failed to initialize because an unsupported SFP+ "
6861 "module type was detected.\n");
6862 e_dev_err("Reload the driver after installing a supported "
6866 e_dev_err("HW Init failed: %d\n", err
);
6870 ixgbe_probe_vf(adapter
, ii
);
6872 netdev
->features
= NETIF_F_SG
|
6874 NETIF_F_HW_VLAN_TX
|
6875 NETIF_F_HW_VLAN_RX
|
6876 NETIF_F_HW_VLAN_FILTER
;
6878 netdev
->features
|= NETIF_F_IPV6_CSUM
;
6879 netdev
->features
|= NETIF_F_TSO
;
6880 netdev
->features
|= NETIF_F_TSO6
;
6881 netdev
->features
|= NETIF_F_GRO
;
6883 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
6884 netdev
->features
|= NETIF_F_SCTP_CSUM
;
6886 netdev
->vlan_features
|= NETIF_F_TSO
;
6887 netdev
->vlan_features
|= NETIF_F_TSO6
;
6888 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
6889 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
6890 netdev
->vlan_features
|= NETIF_F_SG
;
6892 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6893 adapter
->flags
&= ~(IXGBE_FLAG_RSS_ENABLED
|
6894 IXGBE_FLAG_DCB_ENABLED
);
6895 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
6896 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
6898 #ifdef CONFIG_IXGBE_DCB
6899 netdev
->dcbnl_ops
= &dcbnl_ops
;
6903 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
6904 if (hw
->mac
.ops
.get_device_caps
) {
6905 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
6906 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
6907 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
6910 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
6911 netdev
->vlan_features
|= NETIF_F_FCOE_CRC
;
6912 netdev
->vlan_features
|= NETIF_F_FSO
;
6913 netdev
->vlan_features
|= NETIF_F_FCOE_MTU
;
6915 #endif /* IXGBE_FCOE */
6916 if (pci_using_dac
) {
6917 netdev
->features
|= NETIF_F_HIGHDMA
;
6918 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
6921 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6922 netdev
->features
|= NETIF_F_LRO
;
6924 /* make sure the EEPROM is good */
6925 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
6926 e_dev_err("The EEPROM Checksum Is Not Valid\n");
6931 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
6932 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
6934 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
6935 e_dev_err("invalid MAC address\n");
6940 /* power down the optics */
6941 if (hw
->phy
.multispeed_fiber
)
6942 hw
->mac
.ops
.disable_tx_laser(hw
);
6944 init_timer(&adapter
->watchdog_timer
);
6945 adapter
->watchdog_timer
.function
= ixgbe_watchdog
;
6946 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
6948 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
6949 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
6951 err
= ixgbe_init_interrupt_scheme(adapter
);
6955 switch (pdev
->device
) {
6956 case IXGBE_DEV_ID_82599_KX4
:
6957 adapter
->wol
= (IXGBE_WUFC_MAG
| IXGBE_WUFC_EX
|
6958 IXGBE_WUFC_MC
| IXGBE_WUFC_BC
);
6964 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
6966 /* pick up the PCI bus settings for reporting later */
6967 hw
->mac
.ops
.get_bus_info(hw
);
6969 /* print bus type/speed/width info */
6970 e_dev_info("(PCI Express:%s:%s) %pM\n",
6971 (hw
->bus
.speed
== ixgbe_bus_speed_5000
? "5.0Gb/s" :
6972 hw
->bus
.speed
== ixgbe_bus_speed_2500
? "2.5Gb/s" :
6974 (hw
->bus
.width
== ixgbe_bus_width_pcie_x8
? "Width x8" :
6975 hw
->bus
.width
== ixgbe_bus_width_pcie_x4
? "Width x4" :
6976 hw
->bus
.width
== ixgbe_bus_width_pcie_x1
? "Width x1" :
6979 ixgbe_read_pba_num_generic(hw
, &part_num
);
6980 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
6981 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, "
6982 "PBA No: %06x-%03x\n",
6983 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
6984 (part_num
>> 8), (part_num
& 0xff));
6986 e_dev_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
6987 hw
->mac
.type
, hw
->phy
.type
,
6988 (part_num
>> 8), (part_num
& 0xff));
6990 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
6991 e_dev_warn("PCI-Express bandwidth available for this card is "
6992 "not sufficient for optimal performance.\n");
6993 e_dev_warn("For optimal performance a x8 PCI-Express slot "
6997 /* save off EEPROM version number */
6998 hw
->eeprom
.ops
.read(hw
, 0x29, &adapter
->eeprom_version
);
7000 /* reset the hardware with the new settings */
7001 err
= hw
->mac
.ops
.start_hw(hw
);
7003 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
7004 /* We are running on a pre-production device, log a warning */
7005 e_dev_warn("This device is a pre-production adapter/LOM. "
7006 "Please be aware there may be issues associated "
7007 "with your hardware. If you are experiencing "
7008 "problems please contact your Intel or hardware "
7009 "representative who provided you with this "
7012 strcpy(netdev
->name
, "eth%d");
7013 err
= register_netdev(netdev
);
7017 /* carrier off reporting is important to ethtool even BEFORE open */
7018 netif_carrier_off(netdev
);
7020 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
7021 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
7022 INIT_WORK(&adapter
->fdir_reinit_task
, ixgbe_fdir_reinit_task
);
7024 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
7025 INIT_WORK(&adapter
->check_overtemp_task
,
7026 ixgbe_check_overtemp_task
);
7027 #ifdef CONFIG_IXGBE_DCA
7028 if (dca_add_requester(&pdev
->dev
) == 0) {
7029 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
7030 ixgbe_setup_dca(adapter
);
7033 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7034 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
7035 for (i
= 0; i
< adapter
->num_vfs
; i
++)
7036 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
7039 /* add san mac addr to netdev */
7040 ixgbe_add_sanmac_netdev(netdev
);
7042 e_dev_info("Intel(R) 10 Gigabit Network Connection\n");
7047 ixgbe_release_hw_control(adapter
);
7048 ixgbe_clear_interrupt_scheme(adapter
);
7051 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7052 ixgbe_disable_sriov(adapter
);
7053 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
7054 del_timer_sync(&adapter
->sfp_timer
);
7055 cancel_work_sync(&adapter
->sfp_task
);
7056 cancel_work_sync(&adapter
->multispeed_fiber_task
);
7057 cancel_work_sync(&adapter
->sfp_config_module_task
);
7058 iounmap(hw
->hw_addr
);
7060 free_netdev(netdev
);
7062 pci_release_selected_regions(pdev
,
7063 pci_select_bars(pdev
, IORESOURCE_MEM
));
7066 pci_disable_device(pdev
);
7071 * ixgbe_remove - Device Removal Routine
7072 * @pdev: PCI device information struct
7074 * ixgbe_remove is called by the PCI subsystem to alert the driver
7075 * that it should release a PCI device. The could be caused by a
7076 * Hot-Plug event, or because the driver is going to be removed from
7079 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
7081 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7082 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7084 set_bit(__IXGBE_DOWN
, &adapter
->state
);
7085 /* clear the module not found bit to make sure the worker won't
7088 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
7089 del_timer_sync(&adapter
->watchdog_timer
);
7091 del_timer_sync(&adapter
->sfp_timer
);
7092 cancel_work_sync(&adapter
->watchdog_task
);
7093 cancel_work_sync(&adapter
->sfp_task
);
7094 cancel_work_sync(&adapter
->multispeed_fiber_task
);
7095 cancel_work_sync(&adapter
->sfp_config_module_task
);
7096 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
7097 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
7098 cancel_work_sync(&adapter
->fdir_reinit_task
);
7099 flush_scheduled_work();
7101 #ifdef CONFIG_IXGBE_DCA
7102 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
7103 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
7104 dca_remove_requester(&pdev
->dev
);
7105 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
7110 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7111 ixgbe_cleanup_fcoe(adapter
);
7113 #endif /* IXGBE_FCOE */
7115 /* remove the added san mac */
7116 ixgbe_del_sanmac_netdev(netdev
);
7118 if (netdev
->reg_state
== NETREG_REGISTERED
)
7119 unregister_netdev(netdev
);
7121 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7122 ixgbe_disable_sriov(adapter
);
7124 ixgbe_clear_interrupt_scheme(adapter
);
7126 ixgbe_release_hw_control(adapter
);
7128 iounmap(adapter
->hw
.hw_addr
);
7129 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
7132 e_dev_info("complete\n");
7134 free_netdev(netdev
);
7136 pci_disable_pcie_error_reporting(pdev
);
7138 pci_disable_device(pdev
);
7142 * ixgbe_io_error_detected - called when PCI error is detected
7143 * @pdev: Pointer to PCI device
7144 * @state: The current pci connection state
7146 * This function is called after a PCI bus error affecting
7147 * this device has been detected.
7149 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
7150 pci_channel_state_t state
)
7152 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7153 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7155 netif_device_detach(netdev
);
7157 if (state
== pci_channel_io_perm_failure
)
7158 return PCI_ERS_RESULT_DISCONNECT
;
7160 if (netif_running(netdev
))
7161 ixgbe_down(adapter
);
7162 pci_disable_device(pdev
);
7164 /* Request a slot reset. */
7165 return PCI_ERS_RESULT_NEED_RESET
;
7169 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7170 * @pdev: Pointer to PCI device
7172 * Restart the card from scratch, as if from a cold-boot.
7174 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
7176 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7177 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7178 pci_ers_result_t result
;
7181 if (pci_enable_device_mem(pdev
)) {
7182 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
7183 result
= PCI_ERS_RESULT_DISCONNECT
;
7185 pci_set_master(pdev
);
7186 pci_restore_state(pdev
);
7187 pci_save_state(pdev
);
7189 pci_wake_from_d3(pdev
, false);
7191 ixgbe_reset(adapter
);
7192 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7193 result
= PCI_ERS_RESULT_RECOVERED
;
7196 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7198 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7199 "failed 0x%0x\n", err
);
7200 /* non-fatal, continue */
7207 * ixgbe_io_resume - called when traffic can start flowing again.
7208 * @pdev: Pointer to PCI device
7210 * This callback is called when the error recovery driver tells us that
7211 * its OK to resume normal operation.
7213 static void ixgbe_io_resume(struct pci_dev
*pdev
)
7215 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7216 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7218 if (netif_running(netdev
)) {
7219 if (ixgbe_up(adapter
)) {
7220 e_info(probe
, "ixgbe_up failed after reset\n");
7225 netif_device_attach(netdev
);
7228 static struct pci_error_handlers ixgbe_err_handler
= {
7229 .error_detected
= ixgbe_io_error_detected
,
7230 .slot_reset
= ixgbe_io_slot_reset
,
7231 .resume
= ixgbe_io_resume
,
7234 static struct pci_driver ixgbe_driver
= {
7235 .name
= ixgbe_driver_name
,
7236 .id_table
= ixgbe_pci_tbl
,
7237 .probe
= ixgbe_probe
,
7238 .remove
= __devexit_p(ixgbe_remove
),
7240 .suspend
= ixgbe_suspend
,
7241 .resume
= ixgbe_resume
,
7243 .shutdown
= ixgbe_shutdown
,
7244 .err_handler
= &ixgbe_err_handler
7248 * ixgbe_init_module - Driver Registration Routine
7250 * ixgbe_init_module is the first routine called when the driver is
7251 * loaded. All it does is register with the PCI subsystem.
7253 static int __init
ixgbe_init_module(void)
7256 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
7257 pr_info("%s\n", ixgbe_copyright
);
7259 #ifdef CONFIG_IXGBE_DCA
7260 dca_register_notify(&dca_notifier
);
7263 ret
= pci_register_driver(&ixgbe_driver
);
7267 module_init(ixgbe_init_module
);
7270 * ixgbe_exit_module - Driver Exit Cleanup Routine
7272 * ixgbe_exit_module is called just before the driver is removed
7275 static void __exit
ixgbe_exit_module(void)
7277 #ifdef CONFIG_IXGBE_DCA
7278 dca_unregister_notify(&dca_notifier
);
7280 pci_unregister_driver(&ixgbe_driver
);
7283 #ifdef CONFIG_IXGBE_DCA
7284 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
7289 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
7290 __ixgbe_notify_dca
);
7292 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
7295 #endif /* CONFIG_IXGBE_DCA */
7298 * ixgbe_get_hw_dev return device
7299 * used by hardware layer to print debugging information
7301 struct net_device
*ixgbe_get_hw_dev(struct ixgbe_hw
*hw
)
7303 struct ixgbe_adapter
*adapter
= hw
->back
;
7304 return adapter
->netdev
;
7307 module_exit(ixgbe_exit_module
);