1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name
[] = "ixgbe";
47 static const char ixgbe_driver_string
[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "2.0.8-k2"
51 const char ixgbe_driver_version
[] = DRV_VERSION
;
52 static char ixgbe_copyright
[] = "Copyright (c) 1999-2009 Intel Corporation.";
54 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
55 [board_82598
] = &ixgbe_82598_info
,
56 [board_82599
] = &ixgbe_82599_info
,
59 /* ixgbe_pci_tbl - PCI Device ID Table
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
67 static struct pci_device_id ixgbe_pci_tbl
[] = {
68 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
),
70 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
72 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
74 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
76 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
78 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
80 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
82 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
84 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
86 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
88 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
),
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
),
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
),
95 /* required last entry */
98 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
100 #ifdef CONFIG_IXGBE_DCA
101 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
103 static struct notifier_block dca_notifier
= {
104 .notifier_call
= ixgbe_notify_dca
,
110 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
111 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
112 MODULE_LICENSE("GPL");
113 MODULE_VERSION(DRV_VERSION
);
115 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
117 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
121 /* Let firmware take over control of h/w */
122 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
123 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
124 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
127 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
131 /* Let firmware know the driver has taken over */
132 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
133 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
134 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
138 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
139 * @adapter: pointer to adapter struct
140 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
141 * @queue: queue to map the corresponding interrupt to
142 * @msix_vector: the vector to map to the corresponding queue
145 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
146 u8 queue
, u8 msix_vector
)
149 struct ixgbe_hw
*hw
= &adapter
->hw
;
150 switch (hw
->mac
.type
) {
151 case ixgbe_mac_82598EB
:
152 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
155 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
156 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
157 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
158 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
159 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
161 case ixgbe_mac_82599EB
:
162 if (direction
== -1) {
164 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
165 index
= ((queue
& 1) * 8);
166 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
167 ivar
&= ~(0xFF << index
);
168 ivar
|= (msix_vector
<< index
);
169 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
172 /* tx or rx causes */
173 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
174 index
= ((16 * (queue
& 1)) + (8 * direction
));
175 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
176 ivar
&= ~(0xFF << index
);
177 ivar
|= (msix_vector
<< index
);
178 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
186 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
187 struct ixgbe_tx_buffer
190 tx_buffer_info
->dma
= 0;
191 if (tx_buffer_info
->skb
) {
192 skb_dma_unmap(&adapter
->pdev
->dev
, tx_buffer_info
->skb
,
194 dev_kfree_skb_any(tx_buffer_info
->skb
);
195 tx_buffer_info
->skb
= NULL
;
197 tx_buffer_info
->time_stamp
= 0;
198 /* tx_buffer_info must be completely set up in the transmit path */
201 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
202 struct ixgbe_ring
*tx_ring
,
205 struct ixgbe_hw
*hw
= &adapter
->hw
;
207 /* Detect a transmit hang in hardware, this serializes the
208 * check with the clearing of time_stamp and movement of eop */
209 adapter
->detect_tx_hung
= false;
210 if (tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
211 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
212 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
213 /* detected Tx unit hang */
214 union ixgbe_adv_tx_desc
*tx_desc
;
215 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
216 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
218 " TDH, TDT <%x>, <%x>\n"
219 " next_to_use <%x>\n"
220 " next_to_clean <%x>\n"
221 "tx_buffer_info[next_to_clean]\n"
222 " time_stamp <%lx>\n"
224 tx_ring
->queue_index
,
225 IXGBE_READ_REG(hw
, tx_ring
->head
),
226 IXGBE_READ_REG(hw
, tx_ring
->tail
),
227 tx_ring
->next_to_use
, eop
,
228 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
235 #define IXGBE_MAX_TXD_PWR 14
236 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
238 /* Tx Descriptors needed, worst case */
239 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
240 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
241 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
242 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
244 static void ixgbe_tx_timeout(struct net_device
*netdev
);
247 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
248 * @adapter: board private structure
249 * @tx_ring: tx ring to clean
251 * returns true if transmit work is done
253 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
254 struct ixgbe_ring
*tx_ring
)
256 struct net_device
*netdev
= adapter
->netdev
;
257 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
258 struct ixgbe_tx_buffer
*tx_buffer_info
;
259 unsigned int i
, eop
, count
= 0;
260 unsigned int total_bytes
= 0, total_packets
= 0;
262 i
= tx_ring
->next_to_clean
;
263 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
264 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
266 while ((eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) &&
267 (count
< tx_ring
->work_limit
)) {
268 bool cleaned
= false;
269 for ( ; !cleaned
; count
++) {
271 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
272 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
273 cleaned
= (i
== eop
);
274 skb
= tx_buffer_info
->skb
;
276 if (cleaned
&& skb
) {
277 unsigned int segs
, bytecount
;
279 /* gso_segs is currently only valid for tcp */
280 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
281 /* multiply data chunks by size of headers */
282 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
284 total_packets
+= segs
;
285 total_bytes
+= bytecount
;
288 ixgbe_unmap_and_free_tx_resource(adapter
,
291 tx_desc
->wb
.status
= 0;
294 if (i
== tx_ring
->count
)
298 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
299 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
302 tx_ring
->next_to_clean
= i
;
304 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
305 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
306 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
307 /* Make sure that anybody stopping the queue after this
308 * sees the new next_to_clean.
311 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
312 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
313 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
314 ++adapter
->restart_queue
;
318 if (adapter
->detect_tx_hung
) {
319 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
320 /* schedule immediate reset if we believe we hung */
322 "tx hang %d detected, resetting adapter\n",
323 adapter
->tx_timeout_count
+ 1);
324 ixgbe_tx_timeout(adapter
->netdev
);
328 /* re-arm the interrupt */
329 if (count
>= tx_ring
->work_limit
)
330 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->v_idx
);
332 tx_ring
->total_bytes
+= total_bytes
;
333 tx_ring
->total_packets
+= total_packets
;
334 tx_ring
->stats
.packets
+= total_packets
;
335 tx_ring
->stats
.bytes
+= total_bytes
;
336 adapter
->net_stats
.tx_bytes
+= total_bytes
;
337 adapter
->net_stats
.tx_packets
+= total_packets
;
338 return (count
< tx_ring
->work_limit
);
341 #ifdef CONFIG_IXGBE_DCA
342 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
343 struct ixgbe_ring
*rx_ring
)
347 int q
= rx_ring
- adapter
->rx_ring
;
349 if (rx_ring
->cpu
!= cpu
) {
350 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
351 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
352 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
353 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
354 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
355 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599
;
356 rxctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
357 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
);
359 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
360 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
361 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN
);
362 rxctrl
&= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN
|
363 IXGBE_DCA_RXCTRL_DESC_HSRO_EN
);
364 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
370 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
371 struct ixgbe_ring
*tx_ring
)
375 int q
= tx_ring
- adapter
->tx_ring
;
377 if (tx_ring
->cpu
!= cpu
) {
378 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
379 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
380 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
381 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
382 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
383 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599
;
384 txctrl
|= (dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
385 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
);
387 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
388 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
394 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
398 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
401 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
402 adapter
->tx_ring
[i
].cpu
= -1;
403 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
405 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
406 adapter
->rx_ring
[i
].cpu
= -1;
407 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
411 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
413 struct net_device
*netdev
= dev_get_drvdata(dev
);
414 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
415 unsigned long event
= *(unsigned long *)data
;
418 case DCA_PROVIDER_ADD
:
419 /* if we're already enabled, don't do it again */
420 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
422 /* Always use CB2 mode, difference is masked
423 * in the CB driver. */
424 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
425 if (dca_add_requester(dev
) == 0) {
426 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
427 ixgbe_setup_dca(adapter
);
430 /* Fall Through since DCA is disabled. */
431 case DCA_PROVIDER_REMOVE
:
432 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
433 dca_remove_requester(dev
);
434 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
435 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
443 #endif /* CONFIG_IXGBE_DCA */
445 * ixgbe_receive_skb - Send a completed packet up the stack
446 * @adapter: board private structure
447 * @skb: packet to send up
448 * @status: hardware indication of status of receive
449 * @rx_ring: rx descriptor ring (for a specific queue) to setup
450 * @rx_desc: rx descriptor
452 static void ixgbe_receive_skb(struct ixgbe_q_vector
*q_vector
,
453 struct sk_buff
*skb
, u8 status
,
454 union ixgbe_adv_rx_desc
*rx_desc
)
456 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
457 struct napi_struct
*napi
= &q_vector
->napi
;
458 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
459 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
461 skb_record_rx_queue(skb
, q_vector
- &adapter
->q_vector
[0]);
462 if (skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
463 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
464 vlan_gro_receive(napi
, adapter
->vlgrp
, tag
, skb
);
466 napi_gro_receive(napi
, skb
);
468 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
469 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
470 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
472 netif_receive_skb(skb
);
474 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
475 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
483 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
484 * @adapter: address of board private structure
485 * @status_err: hardware indication of status of receive
486 * @skb: skb currently being received and modified
488 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
489 u32 status_err
, struct sk_buff
*skb
)
491 skb
->ip_summed
= CHECKSUM_NONE
;
493 /* Rx csum disabled */
494 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
497 /* if IP and error */
498 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
499 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
500 adapter
->hw_csum_rx_error
++;
504 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
507 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
508 adapter
->hw_csum_rx_error
++;
512 /* It must be a TCP or UDP packet with a valid checksum */
513 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
514 adapter
->hw_csum_rx_good
++;
517 static inline void ixgbe_release_rx_desc(struct ixgbe_hw
*hw
,
518 struct ixgbe_ring
*rx_ring
, u32 val
)
521 * Force memory writes to complete before letting h/w
522 * know there are new descriptors to fetch. (Only
523 * applicable for weak-ordered memory model archs,
527 IXGBE_WRITE_REG(hw
, IXGBE_RDT(rx_ring
->reg_idx
), val
);
531 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
532 * @adapter: address of board private structure
534 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
535 struct ixgbe_ring
*rx_ring
,
538 struct pci_dev
*pdev
= adapter
->pdev
;
539 union ixgbe_adv_rx_desc
*rx_desc
;
540 struct ixgbe_rx_buffer
*bi
;
542 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
544 i
= rx_ring
->next_to_use
;
545 bi
= &rx_ring
->rx_buffer_info
[i
];
547 while (cleaned_count
--) {
548 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
551 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
553 bi
->page
= alloc_page(GFP_ATOMIC
);
555 adapter
->alloc_rx_page_failed
++;
560 /* use a half page if we're re-using */
561 bi
->page_offset
^= (PAGE_SIZE
/ 2);
564 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
572 skb
= netdev_alloc_skb(adapter
->netdev
, bufsz
);
575 adapter
->alloc_rx_buff_failed
++;
580 * Make buffer alignment 2 beyond a 16 byte boundary
581 * this will result in a 16 byte aligned IP header after
582 * the 14 byte MAC header is removed
584 skb_reserve(skb
, NET_IP_ALIGN
);
587 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
590 /* Refresh the desc even if buffer_addrs didn't change because
591 * each write-back erases this info. */
592 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
593 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
594 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
596 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
600 if (i
== rx_ring
->count
)
602 bi
= &rx_ring
->rx_buffer_info
[i
];
606 if (rx_ring
->next_to_use
!= i
) {
607 rx_ring
->next_to_use
= i
;
609 i
= (rx_ring
->count
- 1);
611 ixgbe_release_rx_desc(&adapter
->hw
, rx_ring
, i
);
615 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
617 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
620 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
622 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
625 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
626 struct ixgbe_ring
*rx_ring
,
627 int *work_done
, int work_to_do
)
629 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
630 struct pci_dev
*pdev
= adapter
->pdev
;
631 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
632 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
637 bool cleaned
= false;
638 int cleaned_count
= 0;
639 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
641 i
= rx_ring
->next_to_clean
;
642 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
643 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
644 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
646 while (staterr
& IXGBE_RXD_STAT_DD
) {
648 if (*work_done
>= work_to_do
)
652 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
653 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
654 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
655 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
656 if (hdr_info
& IXGBE_RXDADV_SPH
)
657 adapter
->rx_hdr_split
++;
658 if (len
> IXGBE_RX_HDR_SIZE
)
659 len
= IXGBE_RX_HDR_SIZE
;
660 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
662 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
666 skb
= rx_buffer_info
->skb
;
667 prefetch(skb
->data
- NET_IP_ALIGN
);
668 rx_buffer_info
->skb
= NULL
;
670 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
671 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
678 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
679 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
680 rx_buffer_info
->page_dma
= 0;
681 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
682 rx_buffer_info
->page
,
683 rx_buffer_info
->page_offset
,
686 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
687 (page_count(rx_buffer_info
->page
) != 1))
688 rx_buffer_info
->page
= NULL
;
690 get_page(rx_buffer_info
->page
);
692 skb
->len
+= upper_len
;
693 skb
->data_len
+= upper_len
;
694 skb
->truesize
+= upper_len
;
698 if (i
== rx_ring
->count
)
700 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
702 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
706 if (staterr
& IXGBE_RXD_STAT_EOP
) {
707 rx_ring
->stats
.packets
++;
708 rx_ring
->stats
.bytes
+= skb
->len
;
710 rx_buffer_info
->skb
= next_buffer
->skb
;
711 rx_buffer_info
->dma
= next_buffer
->dma
;
712 next_buffer
->skb
= skb
;
713 next_buffer
->dma
= 0;
714 adapter
->non_eop_descs
++;
718 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
719 dev_kfree_skb_irq(skb
);
723 ixgbe_rx_checksum(adapter
, staterr
, skb
);
725 /* probably a little skewed due to removing CRC */
726 total_rx_bytes
+= skb
->len
;
729 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
730 ixgbe_receive_skb(q_vector
, skb
, staterr
, rx_desc
);
733 rx_desc
->wb
.upper
.status_error
= 0;
735 /* return some buffers to hardware, one at a time is too slow */
736 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
737 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
741 /* use prefetched values */
743 rx_buffer_info
= next_buffer
;
745 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
748 rx_ring
->next_to_clean
= i
;
749 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
752 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
754 rx_ring
->total_packets
+= total_rx_packets
;
755 rx_ring
->total_bytes
+= total_rx_bytes
;
756 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
757 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
762 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
764 * ixgbe_configure_msix - Configure MSI-X hardware
765 * @adapter: board private structure
767 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
770 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
772 struct ixgbe_q_vector
*q_vector
;
773 int i
, j
, q_vectors
, v_idx
, r_idx
;
776 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
779 * Populate the IVAR table and set the ITR values to the
780 * corresponding register.
782 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
783 q_vector
= &adapter
->q_vector
[v_idx
];
784 /* XXX for_each_bit(...) */
785 r_idx
= find_first_bit(q_vector
->rxr_idx
,
786 adapter
->num_rx_queues
);
788 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
789 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
790 ixgbe_set_ivar(adapter
, 0, j
, v_idx
);
791 r_idx
= find_next_bit(q_vector
->rxr_idx
,
792 adapter
->num_rx_queues
,
795 r_idx
= find_first_bit(q_vector
->txr_idx
,
796 adapter
->num_tx_queues
);
798 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
799 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
800 ixgbe_set_ivar(adapter
, 1, j
, v_idx
);
801 r_idx
= find_next_bit(q_vector
->txr_idx
,
802 adapter
->num_tx_queues
,
806 /* if this is a tx only vector halve the interrupt rate */
807 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
808 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
809 else if (q_vector
->rxr_count
)
811 q_vector
->eitr
= adapter
->eitr_param
;
814 * since this is initial set up don't need to call
815 * ixgbe_write_eitr helper
817 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
818 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
821 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
822 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
824 else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
)
825 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
826 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
828 /* set up to autoclear timer, and the vectors */
829 mask
= IXGBE_EIMS_ENABLE_MASK
;
830 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
831 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
838 latency_invalid
= 255
842 * ixgbe_update_itr - update the dynamic ITR value based on statistics
843 * @adapter: pointer to adapter
844 * @eitr: eitr setting (ints per sec) to give last timeslice
845 * @itr_setting: current throttle rate in ints/second
846 * @packets: the number of packets during this measurement interval
847 * @bytes: the number of bytes during this measurement interval
849 * Stores a new ITR value based on packets and byte
850 * counts during the last interrupt. The advantage of per interrupt
851 * computation is faster updates and more accurate ITR for the current
852 * traffic pattern. Constants in this function were computed
853 * based on theoretical maximum wire speed and thresholds were set based
854 * on testing data as well as attempting to minimize response time
855 * while increasing bulk throughput.
856 * this functionality is controlled by the InterruptThrottleRate module
857 * parameter (see ixgbe_param.c)
859 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
860 u32 eitr
, u8 itr_setting
,
861 int packets
, int bytes
)
863 unsigned int retval
= itr_setting
;
868 goto update_itr_done
;
871 /* simple throttlerate management
872 * 0-20MB/s lowest (100000 ints/s)
873 * 20-100MB/s low (20000 ints/s)
874 * 100-1249MB/s bulk (8000 ints/s)
876 /* what was last interrupt timeslice? */
877 timepassed_us
= 1000000/eitr
;
878 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
880 switch (itr_setting
) {
882 if (bytes_perint
> adapter
->eitr_low
)
883 retval
= low_latency
;
886 if (bytes_perint
> adapter
->eitr_high
)
887 retval
= bulk_latency
;
888 else if (bytes_perint
<= adapter
->eitr_low
)
889 retval
= lowest_latency
;
892 if (bytes_perint
<= adapter
->eitr_high
)
893 retval
= low_latency
;
902 * ixgbe_write_eitr - write EITR register in hardware specific way
903 * @adapter: pointer to adapter struct
904 * @v_idx: vector index into q_vector array
905 * @itr_reg: new value to be written in *register* format, not ints/s
907 * This function is made to be called by ethtool and by the driver
908 * when it needs to update EITR registers at runtime. Hardware
909 * specific quirks/differences are taken care of here.
911 void ixgbe_write_eitr(struct ixgbe_adapter
*adapter
, int v_idx
, u32 itr_reg
)
913 struct ixgbe_hw
*hw
= &adapter
->hw
;
914 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
915 /* must write high and low 16 bits to reset counter */
916 itr_reg
|= (itr_reg
<< 16);
917 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
919 * set the WDIS bit to not clear the timer bits and cause an
920 * immediate assertion of the interrupt
922 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
924 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
927 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
929 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
931 u8 current_itr
, ret_itr
;
932 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
933 sizeof(struct ixgbe_q_vector
);
934 struct ixgbe_ring
*rx_ring
, *tx_ring
;
936 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
937 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
938 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
939 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
941 tx_ring
->total_packets
,
942 tx_ring
->total_bytes
);
943 /* if the result for this queue would decrease interrupt
944 * rate for this vector then use that result */
945 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
946 q_vector
->tx_itr
- 1 : ret_itr
);
947 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
951 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
952 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
953 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
954 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
956 rx_ring
->total_packets
,
957 rx_ring
->total_bytes
);
958 /* if the result for this queue would decrease interrupt
959 * rate for this vector then use that result */
960 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
961 q_vector
->rx_itr
- 1 : ret_itr
);
962 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
966 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
968 switch (current_itr
) {
969 /* counts and packets in update_itr are dependent on these numbers */
974 new_itr
= 20000; /* aka hwitr = ~200 */
982 if (new_itr
!= q_vector
->eitr
) {
985 /* save the algorithm value here, not the smoothed one */
986 q_vector
->eitr
= new_itr
;
987 /* do an exponential smoothing */
988 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
989 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
990 ixgbe_write_eitr(adapter
, v_idx
, itr_reg
);
996 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
998 struct ixgbe_hw
*hw
= &adapter
->hw
;
1000 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
1001 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
1002 DPRINTK(PROBE
, CRIT
, "Fan has stopped, replace the adapter\n");
1003 /* write to clear the interrupt */
1004 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1008 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
1010 struct ixgbe_hw
*hw
= &adapter
->hw
;
1012 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
1013 /* Clear the interrupt */
1014 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
1015 schedule_work(&adapter
->multispeed_fiber_task
);
1016 } else if (eicr
& IXGBE_EICR_GPI_SDP2
) {
1017 /* Clear the interrupt */
1018 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
1019 schedule_work(&adapter
->sfp_config_module_task
);
1021 /* Interrupt isn't for us... */
1026 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
1028 struct ixgbe_hw
*hw
= &adapter
->hw
;
1031 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1032 adapter
->link_check_timeout
= jiffies
;
1033 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1034 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
1035 schedule_work(&adapter
->watchdog_task
);
1039 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
1041 struct net_device
*netdev
= data
;
1042 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1043 struct ixgbe_hw
*hw
= &adapter
->hw
;
1047 * Workaround for Silicon errata. Use clear-by-write instead
1048 * of clear-by-read. Reading with EICS will return the
1049 * interrupt causes without clearing, which later be done
1050 * with the write to EICR.
1052 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
1053 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
1055 if (eicr
& IXGBE_EICR_LSC
)
1056 ixgbe_check_lsc(adapter
);
1058 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1059 ixgbe_check_fan_failure(adapter
, eicr
);
1061 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
1062 ixgbe_check_sfp_event(adapter
, eicr
);
1063 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1064 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
1069 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
1071 struct ixgbe_q_vector
*q_vector
= data
;
1072 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1073 struct ixgbe_ring
*tx_ring
;
1076 if (!q_vector
->txr_count
)
1079 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
1080 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
1081 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
1082 #ifdef CONFIG_IXGBE_DCA
1083 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1084 ixgbe_update_tx_dca(adapter
, tx_ring
);
1086 tx_ring
->total_bytes
= 0;
1087 tx_ring
->total_packets
= 0;
1088 ixgbe_clean_tx_irq(adapter
, tx_ring
);
1089 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
1097 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1099 * @data: pointer to our q_vector struct for this interrupt vector
1101 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
1103 struct ixgbe_q_vector
*q_vector
= data
;
1104 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1105 struct ixgbe_ring
*rx_ring
;
1109 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1110 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1111 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1112 rx_ring
->total_bytes
= 0;
1113 rx_ring
->total_packets
= 0;
1114 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1118 if (!q_vector
->rxr_count
)
1121 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1122 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1123 /* disable interrupts on this vector only */
1124 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
1125 napi_schedule(&q_vector
->napi
);
1130 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1132 ixgbe_msix_clean_rx(irq
, data
);
1133 ixgbe_msix_clean_tx(irq
, data
);
1139 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1140 * @napi: napi struct with our devices info in it
1141 * @budget: amount of work driver is allowed to do this pass, in packets
1143 * This function is optimized for cleaning one queue only on a single
1146 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1148 struct ixgbe_q_vector
*q_vector
=
1149 container_of(napi
, struct ixgbe_q_vector
, napi
);
1150 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1151 struct ixgbe_ring
*rx_ring
= NULL
;
1155 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1156 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1157 #ifdef CONFIG_IXGBE_DCA
1158 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1159 ixgbe_update_rx_dca(adapter
, rx_ring
);
1162 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1164 /* If all Rx work done, exit the polling mode */
1165 if (work_done
< budget
) {
1166 napi_complete(napi
);
1167 if (adapter
->itr_setting
& 1)
1168 ixgbe_set_itr_msix(q_vector
);
1169 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1170 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
1177 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1178 * @napi: napi struct with our devices info in it
1179 * @budget: amount of work driver is allowed to do this pass, in packets
1181 * This function will clean more than one rx queue associated with a
1184 static int ixgbe_clean_rxonly_many(struct napi_struct
*napi
, int budget
)
1186 struct ixgbe_q_vector
*q_vector
=
1187 container_of(napi
, struct ixgbe_q_vector
, napi
);
1188 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1189 struct ixgbe_ring
*rx_ring
= NULL
;
1190 int work_done
= 0, i
;
1192 u16 enable_mask
= 0;
1194 /* attempt to distribute budget to each queue fairly, but don't allow
1195 * the budget to go below 1 because we'll exit polling */
1196 budget
/= (q_vector
->rxr_count
?: 1);
1197 budget
= max(budget
, 1);
1198 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1199 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1200 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1201 #ifdef CONFIG_IXGBE_DCA
1202 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1203 ixgbe_update_rx_dca(adapter
, rx_ring
);
1205 ixgbe_clean_rx_irq(q_vector
, rx_ring
, &work_done
, budget
);
1206 enable_mask
|= rx_ring
->v_idx
;
1207 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1211 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1212 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1213 /* If all Rx work done, exit the polling mode */
1214 if (work_done
< budget
) {
1215 napi_complete(napi
);
1216 if (adapter
->itr_setting
& 1)
1217 ixgbe_set_itr_msix(q_vector
);
1218 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1219 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, enable_mask
);
1225 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1228 a
->q_vector
[v_idx
].adapter
= a
;
1229 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
1230 a
->q_vector
[v_idx
].rxr_count
++;
1231 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1234 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1237 a
->q_vector
[v_idx
].adapter
= a
;
1238 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1239 a
->q_vector
[v_idx
].txr_count
++;
1240 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1244 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1245 * @adapter: board private structure to initialize
1246 * @vectors: allotted vector count for descriptor rings
1248 * This function maps descriptor rings to the queue-specific vectors
1249 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1250 * one vector per ring/queue, but on a constrained vector budget, we
1251 * group the rings as "efficiently" as possible. You would add new
1252 * mapping configurations in here.
1254 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1258 int rxr_idx
= 0, txr_idx
= 0;
1259 int rxr_remaining
= adapter
->num_rx_queues
;
1260 int txr_remaining
= adapter
->num_tx_queues
;
1265 /* No mapping required if MSI-X is disabled. */
1266 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1270 * The ideal configuration...
1271 * We have enough vectors to map one per queue.
1273 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1274 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1275 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1277 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1278 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1284 * If we don't have enough vectors for a 1-to-1
1285 * mapping, we'll have to group them so there are
1286 * multiple queues per vector.
1288 /* Re-adjusting *qpv takes care of the remainder. */
1289 for (i
= v_start
; i
< vectors
; i
++) {
1290 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1291 for (j
= 0; j
< rqpv
; j
++) {
1292 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1297 for (i
= v_start
; i
< vectors
; i
++) {
1298 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1299 for (j
= 0; j
< tqpv
; j
++) {
1300 map_vector_to_txq(adapter
, i
, txr_idx
);
1311 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1312 * @adapter: board private structure
1314 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1315 * interrupts from the kernel.
1317 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1319 struct net_device
*netdev
= adapter
->netdev
;
1320 irqreturn_t (*handler
)(int, void *);
1321 int i
, vector
, q_vectors
, err
;
1324 /* Decrement for Other and TCP Timer vectors */
1325 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1327 /* Map the Tx/Rx rings to the vectors we were allotted. */
1328 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1332 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1333 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1334 &ixgbe_msix_clean_many)
1335 for (vector
= 0; vector
< q_vectors
; vector
++) {
1336 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1338 if(handler
== &ixgbe_msix_clean_rx
) {
1339 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1340 netdev
->name
, "rx", ri
++);
1342 else if(handler
== &ixgbe_msix_clean_tx
) {
1343 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1344 netdev
->name
, "tx", ti
++);
1347 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1348 netdev
->name
, "TxRx", vector
);
1350 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1351 handler
, 0, adapter
->name
[vector
],
1352 &(adapter
->q_vector
[vector
]));
1355 "request_irq failed for MSIX interrupt "
1356 "Error: %d\n", err
);
1357 goto free_queue_irqs
;
1361 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1362 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1363 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1366 "request_irq for msix_lsc failed: %d\n", err
);
1367 goto free_queue_irqs
;
1373 for (i
= vector
- 1; i
>= 0; i
--)
1374 free_irq(adapter
->msix_entries
[--vector
].vector
,
1375 &(adapter
->q_vector
[i
]));
1376 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1377 pci_disable_msix(adapter
->pdev
);
1378 kfree(adapter
->msix_entries
);
1379 adapter
->msix_entries
= NULL
;
1384 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1386 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1388 u32 new_itr
= q_vector
->eitr
;
1389 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1390 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1392 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1394 tx_ring
->total_packets
,
1395 tx_ring
->total_bytes
);
1396 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1398 rx_ring
->total_packets
,
1399 rx_ring
->total_bytes
);
1401 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1403 switch (current_itr
) {
1404 /* counts and packets in update_itr are dependent on these numbers */
1405 case lowest_latency
:
1409 new_itr
= 20000; /* aka hwitr = ~200 */
1418 if (new_itr
!= q_vector
->eitr
) {
1421 /* save the algorithm value here, not the smoothed one */
1422 q_vector
->eitr
= new_itr
;
1423 /* do an exponential smoothing */
1424 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1425 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1426 ixgbe_write_eitr(adapter
, 0, itr_reg
);
1433 * ixgbe_irq_enable - Enable default interrupt generation settings
1434 * @adapter: board private structure
1436 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1439 mask
= IXGBE_EIMS_ENABLE_MASK
;
1440 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
1441 mask
|= IXGBE_EIMS_GPI_SDP1
;
1442 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1443 mask
|= IXGBE_EIMS_ECC
;
1444 mask
|= IXGBE_EIMS_GPI_SDP1
;
1445 mask
|= IXGBE_EIMS_GPI_SDP2
;
1448 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1449 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1450 /* enable the rest of the queue vectors */
1451 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1),
1452 (IXGBE_EIMS_RTX_QUEUE
<< 16));
1453 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(2),
1454 ((IXGBE_EIMS_RTX_QUEUE
<< 16) |
1455 IXGBE_EIMS_RTX_QUEUE
));
1457 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1461 * ixgbe_intr - legacy mode Interrupt Handler
1462 * @irq: interrupt number
1463 * @data: pointer to a network interface device structure
1465 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1467 struct net_device
*netdev
= data
;
1468 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1469 struct ixgbe_hw
*hw
= &adapter
->hw
;
1473 * Workaround for silicon errata. Mask the interrupts
1474 * before the read of EICR.
1476 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
1478 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1479 * therefore no explict interrupt disable is necessary */
1480 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1482 /* shared interrupt alert!
1483 * make sure interrupts are enabled because the read will
1484 * have disabled interrupts due to EIAM */
1485 ixgbe_irq_enable(adapter
);
1486 return IRQ_NONE
; /* Not our interrupt */
1489 if (eicr
& IXGBE_EICR_LSC
)
1490 ixgbe_check_lsc(adapter
);
1492 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
1493 ixgbe_check_sfp_event(adapter
, eicr
);
1495 ixgbe_check_fan_failure(adapter
, eicr
);
1497 if (napi_schedule_prep(&adapter
->q_vector
[0].napi
)) {
1498 adapter
->tx_ring
[0].total_packets
= 0;
1499 adapter
->tx_ring
[0].total_bytes
= 0;
1500 adapter
->rx_ring
[0].total_packets
= 0;
1501 adapter
->rx_ring
[0].total_bytes
= 0;
1502 /* would disable interrupts here but EIAM disabled it */
1503 __napi_schedule(&adapter
->q_vector
[0].napi
);
1509 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1511 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1513 for (i
= 0; i
< q_vectors
; i
++) {
1514 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1515 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1516 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1517 q_vector
->rxr_count
= 0;
1518 q_vector
->txr_count
= 0;
1523 * ixgbe_request_irq - initialize interrupts
1524 * @adapter: board private structure
1526 * Attempts to configure interrupts using the best available
1527 * capabilities of the hardware and kernel.
1529 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1531 struct net_device
*netdev
= adapter
->netdev
;
1534 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1535 err
= ixgbe_request_msix_irqs(adapter
);
1536 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1537 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1538 netdev
->name
, netdev
);
1540 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1541 netdev
->name
, netdev
);
1545 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1550 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1552 struct net_device
*netdev
= adapter
->netdev
;
1554 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1557 q_vectors
= adapter
->num_msix_vectors
;
1560 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1563 for (; i
>= 0; i
--) {
1564 free_irq(adapter
->msix_entries
[i
].vector
,
1565 &(adapter
->q_vector
[i
]));
1568 ixgbe_reset_q_vectors(adapter
);
1570 free_irq(adapter
->pdev
->irq
, netdev
);
1575 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1576 * @adapter: board private structure
1578 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1580 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1581 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1582 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
1583 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(2), ~0);
1585 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1586 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1588 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1589 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1591 synchronize_irq(adapter
->pdev
->irq
);
1595 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
)
1597 u32 mask
= IXGBE_EIMS_RTX_QUEUE
;
1598 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1599 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1600 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(1), mask
<< 16);
1601 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS_EX(2),
1602 (mask
<< 16 | mask
));
1604 /* skip the flush */
1608 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1611 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1613 struct ixgbe_hw
*hw
= &adapter
->hw
;
1615 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1616 EITR_INTS_PER_SEC_TO_REG(adapter
->eitr_param
));
1618 ixgbe_set_ivar(adapter
, 0, 0, 0);
1619 ixgbe_set_ivar(adapter
, 1, 0, 0);
1621 map_vector_to_rxq(adapter
, 0, 0);
1622 map_vector_to_txq(adapter
, 0, 0);
1624 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1628 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1629 * @adapter: board private structure
1631 * Configure the Tx unit of the MAC after a reset.
1633 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1636 struct ixgbe_hw
*hw
= &adapter
->hw
;
1637 u32 i
, j
, tdlen
, txctrl
;
1639 /* Setup the HW Tx Head and Tail descriptor pointers */
1640 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1641 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1644 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1645 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1646 (tdba
& DMA_BIT_MASK(32)));
1647 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1648 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1649 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1650 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1651 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1652 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1653 /* Disable Tx Head Writeback RO bit, since this hoses
1654 * bookkeeping if things aren't delivered in order.
1656 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1657 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1658 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1660 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1661 /* We enable 8 traffic classes, DCB only */
1662 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
1663 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, (IXGBE_MTQC_RT_ENA
|
1664 IXGBE_MTQC_8TC_8TQ
));
1668 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1670 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1672 struct ixgbe_ring
*rx_ring
;
1677 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1680 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1681 queue0
= index
& mask
;
1682 index
= index
& mask
;
1685 rx_ring
= &adapter
->rx_ring
[queue0
];
1687 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1689 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1690 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1692 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1693 u16 bufsz
= IXGBE_RXBUFFER_2048
;
1694 /* grow the amount we can receive on large page machines */
1695 if (bufsz
< (PAGE_SIZE
/ 2))
1696 bufsz
= (PAGE_SIZE
/ 2);
1697 /* cap the bufsz at our largest descriptor size */
1698 bufsz
= min((u16
)IXGBE_MAX_RXBUFFER
, bufsz
);
1700 srrctl
|= bufsz
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1701 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1702 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1703 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1704 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1706 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1708 if (rx_ring
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1709 srrctl
|= IXGBE_RXBUFFER_2048
>>
1710 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1712 srrctl
|= rx_ring
->rx_buf_len
>>
1713 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1716 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1720 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1721 * @adapter: board private structure
1723 * Configure the Rx unit of the MAC after a reset.
1725 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1728 struct ixgbe_hw
*hw
= &adapter
->hw
;
1729 struct net_device
*netdev
= adapter
->netdev
;
1730 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1732 u32 rdlen
, rxctrl
, rxcsum
;
1733 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1734 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1735 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1737 u32 reta
= 0, mrqc
= 0;
1741 /* Decide whether to use packet split mode or not */
1742 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1744 /* Set the RX buffer length according to the mode */
1745 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1746 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1747 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1748 /* PSRTYPE must be initialized in 82599 */
1749 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
1750 IXGBE_PSRTYPE_UDPHDR
|
1751 IXGBE_PSRTYPE_IPV4HDR
|
1752 IXGBE_PSRTYPE_IPV6HDR
;
1753 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(0), psrtype
);
1756 if (netdev
->mtu
<= ETH_DATA_LEN
)
1757 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1759 rx_buf_len
= ALIGN(max_frame
, 1024);
1762 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1763 fctrl
|= IXGBE_FCTRL_BAM
;
1764 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1765 fctrl
|= IXGBE_FCTRL_PMCF
;
1766 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1768 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1769 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1770 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1772 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1773 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1775 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1776 /* disable receives while setting up the descriptors */
1777 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1778 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1780 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1781 * the Base and Length of the Rx Descriptor Ring */
1782 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1783 rdba
= adapter
->rx_ring
[i
].dma
;
1784 j
= adapter
->rx_ring
[i
].reg_idx
;
1785 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_BIT_MASK(32)));
1786 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
1787 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
1788 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
1789 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
1790 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
1791 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
1792 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
1794 ixgbe_configure_srrctl(adapter
, j
);
1797 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
1799 * For VMDq support of different descriptor types or
1800 * buffer sizes through the use of multiple SRRCTL
1801 * registers, RDRXCTL.MVMEN must be set to 1
1803 * also, the manual doesn't mention it clearly but DCA hints
1804 * will only use queue 0's tags unless this bit is set. Side
1805 * effects of setting this bit are only that SRRCTL must be
1806 * fully programmed [0..15]
1808 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1809 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
1810 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1813 /* Program MRQC for the distribution of queues */
1814 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1815 int mask
= adapter
->flags
& (
1816 IXGBE_FLAG_RSS_ENABLED
1817 | IXGBE_FLAG_DCB_ENABLED
1821 case (IXGBE_FLAG_RSS_ENABLED
):
1822 mrqc
= IXGBE_MRQC_RSSEN
;
1824 case (IXGBE_FLAG_DCB_ENABLED
):
1825 mrqc
= IXGBE_MRQC_RT8TCEN
;
1831 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1832 /* Fill out redirection table */
1833 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1834 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1836 /* reta = 4-byte sliding window of
1837 * 0x00..(indices-1)(indices-1)00..etc. */
1838 reta
= (reta
<< 8) | (j
* 0x11);
1840 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1843 /* Fill out hash function seeds */
1844 for (i
= 0; i
< 10; i
++)
1845 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
1847 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
1848 mrqc
|= IXGBE_MRQC_RSSEN
;
1849 /* Perform hash on these packet types */
1850 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
1851 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1852 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1853 | IXGBE_MRQC_RSS_FIELD_IPV6
1854 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1855 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
1857 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1859 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1861 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1862 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1863 /* Disable indicating checksum in descriptor, enables
1865 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1867 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1868 /* Enable IPv4 payload checksum for UDP fragments
1869 * if PCSD is not set */
1870 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1873 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1875 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
1876 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1877 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
1878 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1882 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1884 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1885 struct ixgbe_hw
*hw
= &adapter
->hw
;
1887 /* add VID to filter table */
1888 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
1891 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1893 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1894 struct ixgbe_hw
*hw
= &adapter
->hw
;
1896 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1897 ixgbe_irq_disable(adapter
);
1899 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1901 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1902 ixgbe_irq_enable(adapter
);
1904 /* remove VID from filter table */
1905 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
1908 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1909 struct vlan_group
*grp
)
1911 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1915 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1916 ixgbe_irq_disable(adapter
);
1917 adapter
->vlgrp
= grp
;
1920 * For a DCB driver, always enable VLAN tag stripping so we can
1921 * still receive traffic from a DCB-enabled host even if we're
1924 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1925 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
1926 ctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
1927 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1928 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1929 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
1930 ctrl
|= IXGBE_VLNCTRL_VFE
;
1931 /* enable VLAN tag insert/strip */
1932 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1933 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1934 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1935 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1936 j
= adapter
->rx_ring
[i
].reg_idx
;
1937 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RXDCTL(j
));
1938 ctrl
|= IXGBE_RXDCTL_VME
;
1939 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXDCTL(j
), ctrl
);
1942 ixgbe_vlan_rx_add_vid(netdev
, 0);
1944 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1945 ixgbe_irq_enable(adapter
);
1948 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1950 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1952 if (adapter
->vlgrp
) {
1954 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1955 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1957 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1962 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1964 struct dev_mc_list
*mc_ptr
;
1965 u8
*addr
= *mc_addr_ptr
;
1968 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1970 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1972 *mc_addr_ptr
= NULL
;
1978 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1979 * @netdev: network interface device structure
1981 * The set_rx_method entry point is called whenever the unicast/multicast
1982 * address list or the network interface flags are updated. This routine is
1983 * responsible for configuring the hardware for proper unicast, multicast and
1986 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1988 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1989 struct ixgbe_hw
*hw
= &adapter
->hw
;
1991 u8
*addr_list
= NULL
;
1994 /* Check for Promiscuous and All Multicast modes */
1996 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1997 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1999 if (netdev
->flags
& IFF_PROMISC
) {
2000 hw
->addr_ctrl
.user_set_promisc
= 1;
2001 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2002 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
2004 if (netdev
->flags
& IFF_ALLMULTI
) {
2005 fctrl
|= IXGBE_FCTRL_MPE
;
2006 fctrl
&= ~IXGBE_FCTRL_UPE
;
2008 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
2010 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2011 hw
->addr_ctrl
.user_set_promisc
= 0;
2014 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
2015 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2017 /* reprogram secondary unicast list */
2018 addr_count
= netdev
->uc_count
;
2020 addr_list
= netdev
->uc_list
->dmi_addr
;
2021 hw
->mac
.ops
.update_uc_addr_list(hw
, addr_list
, addr_count
,
2022 ixgbe_addr_list_itr
);
2024 /* reprogram multicast list */
2025 addr_count
= netdev
->mc_count
;
2027 addr_list
= netdev
->mc_list
->dmi_addr
;
2028 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
2029 ixgbe_addr_list_itr
);
2032 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
2035 struct ixgbe_q_vector
*q_vector
;
2036 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2038 /* legacy and MSI only use one vector */
2039 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2042 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2043 struct napi_struct
*napi
;
2044 q_vector
= &adapter
->q_vector
[q_idx
];
2045 if (!q_vector
->rxr_count
)
2047 napi
= &q_vector
->napi
;
2048 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) &&
2049 (q_vector
->rxr_count
> 1))
2050 napi
->poll
= &ixgbe_clean_rxonly_many
;
2056 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
2059 struct ixgbe_q_vector
*q_vector
;
2060 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2062 /* legacy and MSI only use one vector */
2063 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
2066 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
2067 q_vector
= &adapter
->q_vector
[q_idx
];
2068 if (!q_vector
->rxr_count
)
2070 napi_disable(&q_vector
->napi
);
2074 #ifdef CONFIG_IXGBE_DCB
2076 * ixgbe_configure_dcb - Configure DCB hardware
2077 * @adapter: ixgbe adapter struct
2079 * This is called by the driver on open to configure the DCB hardware.
2080 * This is also called by the gennetlink interface when reconfiguring
2083 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
2085 struct ixgbe_hw
*hw
= &adapter
->hw
;
2086 u32 txdctl
, vlnctrl
;
2089 ixgbe_dcb_check_config(&adapter
->dcb_cfg
);
2090 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_TX_CONFIG
);
2091 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_RX_CONFIG
);
2093 /* reconfigure the hardware */
2094 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
2096 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2097 j
= adapter
->tx_ring
[i
].reg_idx
;
2098 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2099 /* PThresh workaround for Tx hang with DFP enabled. */
2101 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2103 /* Enable VLAN tag insert/strip */
2104 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
2105 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2106 vlnctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
2107 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2108 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2109 } else if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2110 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
2111 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
2112 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
2113 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2114 j
= adapter
->rx_ring
[i
].reg_idx
;
2115 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2116 vlnctrl
|= IXGBE_RXDCTL_VME
;
2117 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
2120 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
2124 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
2126 struct net_device
*netdev
= adapter
->netdev
;
2129 ixgbe_set_rx_mode(netdev
);
2131 ixgbe_restore_vlan(adapter
);
2132 #ifdef CONFIG_IXGBE_DCB
2133 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2134 netif_set_gso_max_size(netdev
, 32768);
2135 ixgbe_configure_dcb(adapter
);
2137 netif_set_gso_max_size(netdev
, 65536);
2140 netif_set_gso_max_size(netdev
, 65536);
2143 ixgbe_configure_tx(adapter
);
2144 ixgbe_configure_rx(adapter
);
2145 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2146 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
2147 (adapter
->rx_ring
[i
].count
- 1));
2150 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2152 switch (hw
->phy
.type
) {
2153 case ixgbe_phy_sfp_avago
:
2154 case ixgbe_phy_sfp_ftl
:
2155 case ixgbe_phy_sfp_intel
:
2156 case ixgbe_phy_sfp_unknown
:
2157 case ixgbe_phy_tw_tyco
:
2158 case ixgbe_phy_tw_unknown
:
2166 * ixgbe_sfp_link_config - set up SFP+ link
2167 * @adapter: pointer to private adapter struct
2169 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
2171 struct ixgbe_hw
*hw
= &adapter
->hw
;
2173 if (hw
->phy
.multispeed_fiber
) {
2175 * In multispeed fiber setups, the device may not have
2176 * had a physical connection when the driver loaded.
2177 * If that's the case, the initial link configuration
2178 * couldn't get the MAC into 10G or 1G mode, so we'll
2179 * never have a link status change interrupt fire.
2180 * We need to try and force an autonegotiation
2181 * session, then bring up link.
2183 hw
->mac
.ops
.setup_sfp(hw
);
2184 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
2185 schedule_work(&adapter
->multispeed_fiber_task
);
2188 * Direct Attach Cu and non-multispeed fiber modules
2189 * still need to be configured properly prior to
2192 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_MOD_TASK
))
2193 schedule_work(&adapter
->sfp_config_module_task
);
2198 * ixgbe_non_sfp_link_config - set up non-SFP+ link
2199 * @hw: pointer to private hardware struct
2201 * Returns 0 on success, negative on failure
2203 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
2206 bool link_up
= false;
2207 u32 ret
= IXGBE_ERR_LINK_SETUP
;
2209 if (hw
->mac
.ops
.check_link
)
2210 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2215 if (hw
->mac
.ops
.get_link_capabilities
)
2216 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
2221 if (hw
->mac
.ops
.setup_link_speed
)
2222 ret
= hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, link_up
);
2227 #define IXGBE_MAX_RX_DESC_POLL 10
2228 static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2231 int j
= adapter
->rx_ring
[rxr
].reg_idx
;
2234 for (k
= 0; k
< IXGBE_MAX_RX_DESC_POLL
; k
++) {
2235 if (IXGBE_READ_REG(&adapter
->hw
,
2236 IXGBE_RXDCTL(j
)) & IXGBE_RXDCTL_ENABLE
)
2241 if (k
>= IXGBE_MAX_RX_DESC_POLL
) {
2242 DPRINTK(DRV
, ERR
, "RXDCTL.ENABLE on Rx queue %d "
2243 "not set within the polling period\n", rxr
);
2245 ixgbe_release_rx_desc(&adapter
->hw
, &adapter
->rx_ring
[rxr
],
2246 (adapter
->rx_ring
[rxr
].count
- 1));
2249 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
2251 struct net_device
*netdev
= adapter
->netdev
;
2252 struct ixgbe_hw
*hw
= &adapter
->hw
;
2254 int num_rx_rings
= adapter
->num_rx_queues
;
2256 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2257 u32 txdctl
, rxdctl
, mhadd
;
2261 ixgbe_get_hw_control(adapter
);
2263 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
2264 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
2265 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2266 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
2267 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
2272 /* XXX: to interrupt immediately for EICS writes, enable this */
2273 /* gpie |= IXGBE_GPIE_EIMEN; */
2274 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2277 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2278 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2279 * specifically only auto mask tx and rx interrupts */
2280 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
2283 /* Enable fan failure interrupt if media type is copper */
2284 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
2285 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2286 gpie
|= IXGBE_SDP1_GPIEN
;
2287 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2290 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2291 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2292 gpie
|= IXGBE_SDP1_GPIEN
;
2293 gpie
|= IXGBE_SDP2_GPIEN
;
2294 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2297 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
2298 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
2299 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
2300 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
2302 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
2305 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2306 j
= adapter
->tx_ring
[i
].reg_idx
;
2307 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2308 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2309 txdctl
|= (8 << 16);
2310 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2313 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
2314 /* DMATXCTL.EN must be set after all Tx queue config is done */
2315 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2316 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2317 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2319 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2320 j
= adapter
->tx_ring
[i
].reg_idx
;
2321 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2322 txdctl
|= IXGBE_TXDCTL_ENABLE
;
2323 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2326 for (i
= 0; i
< num_rx_rings
; i
++) {
2327 j
= adapter
->rx_ring
[i
].reg_idx
;
2328 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2329 /* enable PTHRESH=32 descriptors (half the internal cache)
2330 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2331 * this also removes a pesky rx_no_buffer_count increment */
2333 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
2334 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
2335 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2336 ixgbe_rx_desc_queue_enable(adapter
, i
);
2338 /* enable all receives */
2339 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2340 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2341 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
2343 rxdctl
|= IXGBE_RXCTRL_RXEN
;
2344 hw
->mac
.ops
.enable_rx_dma(hw
, rxdctl
);
2346 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2347 ixgbe_configure_msix(adapter
);
2349 ixgbe_configure_msi_and_legacy(adapter
);
2351 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
2352 ixgbe_napi_enable_all(adapter
);
2354 /* clear any pending interrupts, may auto mask */
2355 IXGBE_READ_REG(hw
, IXGBE_EICR
);
2357 ixgbe_irq_enable(adapter
);
2360 * For hot-pluggable SFP+ devices, a new SFP+ module may have
2361 * arrived before interrupts were enabled. We need to kick off
2362 * the SFP+ module setup first, then try to bring up link.
2363 * If we're not hot-pluggable SFP+, we just need to configure link
2366 err
= hw
->phy
.ops
.identify(hw
);
2367 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
2368 DPRINTK(PROBE
, ERR
, "PHY not supported on this NIC %d\n", err
);
2369 ixgbe_down(adapter
);
2373 if (ixgbe_is_sfp(hw
)) {
2374 ixgbe_sfp_link_config(adapter
);
2376 err
= ixgbe_non_sfp_link_config(hw
);
2378 DPRINTK(PROBE
, ERR
, "link_config FAILED %d\n", err
);
2381 /* enable transmits */
2382 netif_tx_start_all_queues(netdev
);
2384 /* bring the link up in the watchdog, this could race with our first
2385 * link up interrupt but shouldn't be a problem */
2386 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2387 adapter
->link_check_timeout
= jiffies
;
2388 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2392 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2394 WARN_ON(in_interrupt());
2395 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2397 ixgbe_down(adapter
);
2399 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2402 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2404 /* hardware has been reset, we need to reload some things */
2405 ixgbe_configure(adapter
);
2407 ixgbe_napi_add_all(adapter
);
2409 return ixgbe_up_complete(adapter
);
2412 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2414 struct ixgbe_hw
*hw
= &adapter
->hw
;
2415 if (hw
->mac
.ops
.init_hw(hw
))
2416 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
2418 /* reprogram the RAR[0] in case user changed it. */
2419 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2424 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2425 * @adapter: board private structure
2426 * @rx_ring: ring to free buffers from
2428 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2429 struct ixgbe_ring
*rx_ring
)
2431 struct pci_dev
*pdev
= adapter
->pdev
;
2435 /* Free all the Rx ring sk_buffs */
2437 for (i
= 0; i
< rx_ring
->count
; i
++) {
2438 struct ixgbe_rx_buffer
*rx_buffer_info
;
2440 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2441 if (rx_buffer_info
->dma
) {
2442 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2443 rx_ring
->rx_buf_len
,
2444 PCI_DMA_FROMDEVICE
);
2445 rx_buffer_info
->dma
= 0;
2447 if (rx_buffer_info
->skb
) {
2448 dev_kfree_skb(rx_buffer_info
->skb
);
2449 rx_buffer_info
->skb
= NULL
;
2451 if (!rx_buffer_info
->page
)
2453 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
/ 2,
2454 PCI_DMA_FROMDEVICE
);
2455 rx_buffer_info
->page_dma
= 0;
2456 put_page(rx_buffer_info
->page
);
2457 rx_buffer_info
->page
= NULL
;
2458 rx_buffer_info
->page_offset
= 0;
2461 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2462 memset(rx_ring
->rx_buffer_info
, 0, size
);
2464 /* Zero out the descriptor ring */
2465 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2467 rx_ring
->next_to_clean
= 0;
2468 rx_ring
->next_to_use
= 0;
2471 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2473 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2477 * ixgbe_clean_tx_ring - Free Tx Buffers
2478 * @adapter: board private structure
2479 * @tx_ring: ring to be cleaned
2481 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2482 struct ixgbe_ring
*tx_ring
)
2484 struct ixgbe_tx_buffer
*tx_buffer_info
;
2488 /* Free all the Tx ring sk_buffs */
2490 for (i
= 0; i
< tx_ring
->count
; i
++) {
2491 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2492 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2495 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2496 memset(tx_ring
->tx_buffer_info
, 0, size
);
2498 /* Zero out the descriptor ring */
2499 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2501 tx_ring
->next_to_use
= 0;
2502 tx_ring
->next_to_clean
= 0;
2505 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2507 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2511 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2512 * @adapter: board private structure
2514 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2518 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2519 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2523 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2524 * @adapter: board private structure
2526 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2530 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2531 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2534 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2536 struct net_device
*netdev
= adapter
->netdev
;
2537 struct ixgbe_hw
*hw
= &adapter
->hw
;
2542 /* signal that we are down to the interrupt handler */
2543 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2545 /* disable receives */
2546 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2547 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2549 netif_tx_disable(netdev
);
2551 IXGBE_WRITE_FLUSH(hw
);
2554 netif_tx_stop_all_queues(netdev
);
2556 ixgbe_irq_disable(adapter
);
2558 ixgbe_napi_disable_all(adapter
);
2560 del_timer_sync(&adapter
->watchdog_timer
);
2561 cancel_work_sync(&adapter
->watchdog_task
);
2563 /* disable transmits in the hardware now that interrupts are off */
2564 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2565 j
= adapter
->tx_ring
[i
].reg_idx
;
2566 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2567 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
2568 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
2570 /* Disable the Tx DMA engine on 82599 */
2571 if (hw
->mac
.type
== ixgbe_mac_82599EB
)
2572 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
2573 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
2574 ~IXGBE_DMATXCTL_TE
));
2576 netif_carrier_off(netdev
);
2578 #ifdef CONFIG_IXGBE_DCA
2579 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2580 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
2581 dca_remove_requester(&adapter
->pdev
->dev
);
2585 if (!pci_channel_offline(adapter
->pdev
))
2586 ixgbe_reset(adapter
);
2587 ixgbe_clean_all_tx_rings(adapter
);
2588 ixgbe_clean_all_rx_rings(adapter
);
2590 #ifdef CONFIG_IXGBE_DCA
2591 /* since we reset the hardware DCA settings were cleared */
2592 if (dca_add_requester(&adapter
->pdev
->dev
) == 0) {
2593 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
2594 /* always use CB2 mode, difference is masked
2595 * in the CB driver */
2596 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
2597 ixgbe_setup_dca(adapter
);
2603 * ixgbe_poll - NAPI Rx polling callback
2604 * @napi: structure for representing this polling device
2605 * @budget: how many packets driver is allowed to clean
2607 * This function is used for legacy and MSI, NAPI mode
2609 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2611 struct ixgbe_q_vector
*q_vector
=
2612 container_of(napi
, struct ixgbe_q_vector
, napi
);
2613 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2614 int tx_clean_complete
, work_done
= 0;
2616 #ifdef CONFIG_IXGBE_DCA
2617 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2618 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2619 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2623 tx_clean_complete
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2624 ixgbe_clean_rx_irq(q_vector
, adapter
->rx_ring
, &work_done
, budget
);
2626 if (!tx_clean_complete
)
2629 /* If budget not fully consumed, exit the polling mode */
2630 if (work_done
< budget
) {
2631 napi_complete(napi
);
2632 if (adapter
->itr_setting
& 1)
2633 ixgbe_set_itr(adapter
);
2634 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2635 ixgbe_irq_enable_queues(adapter
);
2641 * ixgbe_tx_timeout - Respond to a Tx Hang
2642 * @netdev: network interface device structure
2644 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2646 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2648 /* Do the reset outside of interrupt context */
2649 schedule_work(&adapter
->reset_task
);
2652 static void ixgbe_reset_task(struct work_struct
*work
)
2654 struct ixgbe_adapter
*adapter
;
2655 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2657 /* If we're already down or resetting, just bail */
2658 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
2659 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
2662 adapter
->tx_timeout_count
++;
2664 ixgbe_reinit_locked(adapter
);
2667 #ifdef CONFIG_IXGBE_DCB
2668 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter
*adapter
)
2672 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2673 adapter
->ring_feature
[RING_F_DCB
].mask
= 0x7 << 3;
2674 adapter
->num_rx_queues
=
2675 adapter
->ring_feature
[RING_F_DCB
].indices
;
2676 adapter
->num_tx_queues
=
2677 adapter
->ring_feature
[RING_F_DCB
].indices
;
2688 * ixgbe_set_rss_queues: Allocate queues for RSS
2689 * @adapter: board private structure to initialize
2691 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
2692 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
2695 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter
*adapter
)
2699 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
2700 adapter
->ring_feature
[RING_F_RSS
].mask
= 0xF;
2701 adapter
->num_rx_queues
=
2702 adapter
->ring_feature
[RING_F_RSS
].indices
;
2703 adapter
->num_tx_queues
=
2704 adapter
->ring_feature
[RING_F_RSS
].indices
;
2714 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
2715 * @adapter: board private structure to initialize
2717 * This is the top level queue allocation routine. The order here is very
2718 * important, starting with the "most" number of features turned on at once,
2719 * and ending with the smallest set of features. This way large combinations
2720 * can be allocated if they're turned on, and smaller combinations are the
2721 * fallthrough conditions.
2724 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2726 #ifdef CONFIG_IXGBE_DCB
2727 if (ixgbe_set_dcb_queues(adapter
))
2731 if (ixgbe_set_rss_queues(adapter
))
2734 /* fallback to base case */
2735 adapter
->num_rx_queues
= 1;
2736 adapter
->num_tx_queues
= 1;
2739 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2740 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
2743 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2746 int err
, vector_threshold
;
2748 /* We'll want at least 3 (vector_threshold):
2751 * 3) Other (Link Status Change, etc.)
2752 * 4) TCP Timer (optional)
2754 vector_threshold
= MIN_MSIX_COUNT
;
2756 /* The more we get, the more we will assign to Tx/Rx Cleanup
2757 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2758 * Right now, we simply care about how many we'll get; we'll
2759 * set them up later while requesting irq's.
2761 while (vectors
>= vector_threshold
) {
2762 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2764 if (!err
) /* Success in acquiring all requested vectors. */
2767 vectors
= 0; /* Nasty failure, quit now */
2768 else /* err == number of vectors we should try again with */
2772 if (vectors
< vector_threshold
) {
2773 /* Can't allocate enough MSI-X interrupts? Oh well.
2774 * This just means we'll go with either a single MSI
2775 * vector or fall back to legacy interrupts.
2777 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2778 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2779 kfree(adapter
->msix_entries
);
2780 adapter
->msix_entries
= NULL
;
2781 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
2782 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2783 ixgbe_set_num_queues(adapter
);
2785 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2787 * Adjust for only the vectors we'll use, which is minimum
2788 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2789 * vectors we were allocated.
2791 adapter
->num_msix_vectors
= min(vectors
,
2792 adapter
->max_msix_q_vectors
+ NON_Q_VECTORS
);
2797 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
2798 * @adapter: board private structure to initialize
2800 * Cache the descriptor ring offsets for RSS to the assigned rings.
2803 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter
*adapter
)
2808 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
2809 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2810 adapter
->rx_ring
[i
].reg_idx
= i
;
2811 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2812 adapter
->tx_ring
[i
].reg_idx
= i
;
2821 #ifdef CONFIG_IXGBE_DCB
2823 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
2824 * @adapter: board private structure to initialize
2826 * Cache the descriptor ring offsets for DCB to the assigned rings.
2829 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter
*adapter
)
2833 int dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
2835 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
2836 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2837 /* the number of queues is assumed to be symmetric */
2838 for (i
= 0; i
< dcb_i
; i
++) {
2839 adapter
->rx_ring
[i
].reg_idx
= i
<< 3;
2840 adapter
->tx_ring
[i
].reg_idx
= i
<< 2;
2843 } else if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) {
2846 * Tx TC0 starts at: descriptor queue 0
2847 * Tx TC1 starts at: descriptor queue 32
2848 * Tx TC2 starts at: descriptor queue 64
2849 * Tx TC3 starts at: descriptor queue 80
2850 * Tx TC4 starts at: descriptor queue 96
2851 * Tx TC5 starts at: descriptor queue 104
2852 * Tx TC6 starts at: descriptor queue 112
2853 * Tx TC7 starts at: descriptor queue 120
2855 * Rx TC0-TC7 are offset by 16 queues each
2857 for (i
= 0; i
< 3; i
++) {
2858 adapter
->tx_ring
[i
].reg_idx
= i
<< 5;
2859 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
2861 for ( ; i
< 5; i
++) {
2862 adapter
->tx_ring
[i
].reg_idx
=
2864 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
2866 for ( ; i
< dcb_i
; i
++) {
2867 adapter
->tx_ring
[i
].reg_idx
=
2869 adapter
->rx_ring
[i
].reg_idx
= i
<< 4;
2873 } else if (dcb_i
== 4) {
2875 * Tx TC0 starts at: descriptor queue 0
2876 * Tx TC1 starts at: descriptor queue 64
2877 * Tx TC2 starts at: descriptor queue 96
2878 * Tx TC3 starts at: descriptor queue 112
2880 * Rx TC0-TC3 are offset by 32 queues each
2882 adapter
->tx_ring
[0].reg_idx
= 0;
2883 adapter
->tx_ring
[1].reg_idx
= 64;
2884 adapter
->tx_ring
[2].reg_idx
= 96;
2885 adapter
->tx_ring
[3].reg_idx
= 112;
2886 for (i
= 0 ; i
< dcb_i
; i
++)
2887 adapter
->rx_ring
[i
].reg_idx
= i
<< 5;
2905 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2906 * @adapter: board private structure to initialize
2908 * Once we know the feature-set enabled for the device, we'll cache
2909 * the register offset the descriptor ring is assigned to.
2911 * Note, the order the various feature calls is important. It must start with
2912 * the "most" features enabled at the same time, then trickle down to the
2913 * least amount of features turned on at once.
2915 static void ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2917 /* start with default case */
2918 adapter
->rx_ring
[0].reg_idx
= 0;
2919 adapter
->tx_ring
[0].reg_idx
= 0;
2921 #ifdef CONFIG_IXGBE_DCB
2922 if (ixgbe_cache_ring_dcb(adapter
))
2926 if (ixgbe_cache_ring_rss(adapter
))
2931 * ixgbe_alloc_queues - Allocate memory for all rings
2932 * @adapter: board private structure to initialize
2934 * We allocate one ring per queue at run-time since we don't know the
2935 * number of queues at compile-time. The polling_netdev array is
2936 * intended for Multiqueue, but should work fine with a single queue.
2938 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2942 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2943 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2944 if (!adapter
->tx_ring
)
2945 goto err_tx_ring_allocation
;
2947 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2948 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2949 if (!adapter
->rx_ring
)
2950 goto err_rx_ring_allocation
;
2952 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2953 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
2954 adapter
->tx_ring
[i
].queue_index
= i
;
2957 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2958 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
2959 adapter
->rx_ring
[i
].queue_index
= i
;
2962 ixgbe_cache_ring_register(adapter
);
2966 err_rx_ring_allocation
:
2967 kfree(adapter
->tx_ring
);
2968 err_tx_ring_allocation
:
2973 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2974 * @adapter: board private structure to initialize
2976 * Attempt to configure the interrupts using the best available
2977 * capabilities of the hardware and the kernel.
2979 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter
*adapter
)
2981 struct ixgbe_hw
*hw
= &adapter
->hw
;
2983 int vector
, v_budget
;
2986 * It's easy to be greedy for MSI-X vectors, but it really
2987 * doesn't do us much good if we have a lot more vectors
2988 * than CPU's. So let's be conservative and only ask for
2989 * (roughly) twice the number of vectors as there are CPU's.
2991 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2992 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2995 * At the same time, hardware can only support a maximum of
2996 * hw.mac->max_msix_vectors vectors. With features
2997 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
2998 * descriptor queues supported by our device. Thus, we cap it off in
2999 * those rare cases where the cpu count also exceeds our vector limit.
3001 v_budget
= min(v_budget
, (int)hw
->mac
.max_msix_vectors
);
3003 /* A failure in MSI-X entry allocation isn't fatal, but it does
3004 * mean we disable MSI-X capabilities of the adapter. */
3005 adapter
->msix_entries
= kcalloc(v_budget
,
3006 sizeof(struct msix_entry
), GFP_KERNEL
);
3007 if (!adapter
->msix_entries
) {
3008 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
3009 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
3010 ixgbe_set_num_queues(adapter
);
3011 kfree(adapter
->tx_ring
);
3012 kfree(adapter
->rx_ring
);
3013 err
= ixgbe_alloc_queues(adapter
);
3015 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
3023 for (vector
= 0; vector
< v_budget
; vector
++)
3024 adapter
->msix_entries
[vector
].entry
= vector
;
3026 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
3028 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3032 err
= pci_enable_msi(adapter
->pdev
);
3034 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
3036 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
3037 "falling back to legacy. Error: %d\n", err
);
3046 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
3048 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3049 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3050 pci_disable_msix(adapter
->pdev
);
3051 kfree(adapter
->msix_entries
);
3052 adapter
->msix_entries
= NULL
;
3053 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
3054 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
3055 pci_disable_msi(adapter
->pdev
);
3061 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
3062 * @adapter: board private structure to initialize
3064 * We determine which interrupt scheme to use based on...
3065 * - Kernel support (MSI, MSI-X)
3066 * - which can be user-defined (via MODULE_PARAM)
3067 * - Hardware queue count (num_*_queues)
3068 * - defined by miscellaneous hardware support/features (RSS, etc.)
3070 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
3074 /* Number of supported queues */
3075 ixgbe_set_num_queues(adapter
);
3077 err
= ixgbe_alloc_queues(adapter
);
3079 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
3080 goto err_alloc_queues
;
3083 err
= ixgbe_set_interrupt_capability(adapter
);
3085 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
3086 goto err_set_interrupt
;
3089 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
3090 "Tx Queue count = %u\n",
3091 (adapter
->num_rx_queues
> 1) ? "Enabled" :
3092 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
3094 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3099 kfree(adapter
->tx_ring
);
3100 kfree(adapter
->rx_ring
);
3106 * ixgbe_sfp_timer - worker thread to find a missing module
3107 * @data: pointer to our adapter struct
3109 static void ixgbe_sfp_timer(unsigned long data
)
3111 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3114 * Do the sfp_timer outside of interrupt context due to the
3115 * delays that sfp+ detection requires
3117 schedule_work(&adapter
->sfp_task
);
3121 * ixgbe_sfp_task - worker thread to find a missing module
3122 * @work: pointer to work_struct containing our data
3124 static void ixgbe_sfp_task(struct work_struct
*work
)
3126 struct ixgbe_adapter
*adapter
= container_of(work
,
3127 struct ixgbe_adapter
,
3129 struct ixgbe_hw
*hw
= &adapter
->hw
;
3131 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
3132 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
3133 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
3136 ret
= hw
->phy
.ops
.reset(hw
);
3137 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3138 DPRINTK(PROBE
, ERR
, "failed to initialize because an "
3139 "unsupported SFP+ module type was detected.\n"
3140 "Reload the driver after installing a "
3141 "supported module.\n");
3142 unregister_netdev(adapter
->netdev
);
3144 DPRINTK(PROBE
, INFO
, "detected SFP+: %d\n",
3147 /* don't need this routine any more */
3148 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
3152 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
3153 mod_timer(&adapter
->sfp_timer
,
3154 round_jiffies(jiffies
+ (2 * HZ
)));
3158 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
3159 * @adapter: board private structure to initialize
3161 * ixgbe_sw_init initializes the Adapter private data structure.
3162 * Fields are initialized based on PCI device information and
3163 * OS network device settings (MTU size).
3165 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
3167 struct ixgbe_hw
*hw
= &adapter
->hw
;
3168 struct pci_dev
*pdev
= adapter
->pdev
;
3170 #ifdef CONFIG_IXGBE_DCB
3172 struct tc_configuration
*tc
;
3175 /* PCI config space info */
3177 hw
->vendor_id
= pdev
->vendor
;
3178 hw
->device_id
= pdev
->device
;
3179 hw
->revision_id
= pdev
->revision
;
3180 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
3181 hw
->subsystem_device_id
= pdev
->subsystem_device
;
3183 /* Set capability flags */
3184 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
3185 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
3186 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
3187 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
3188 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3189 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
3190 else if (hw
->mac
.type
== ixgbe_mac_82599EB
)
3191 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
3193 #ifdef CONFIG_IXGBE_DCB
3194 /* Configure DCB traffic classes */
3195 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
3196 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
3197 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
3198 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3199 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
3200 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
3201 tc
->dcb_pfc
= pfc_disabled
;
3203 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
3204 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
3205 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
3206 adapter
->dcb_cfg
.round_robin_enable
= false;
3207 adapter
->dcb_set_bitmap
= 0x00;
3208 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
3209 adapter
->ring_feature
[RING_F_DCB
].indices
);
3213 /* default flow control settings */
3214 hw
->fc
.requested_mode
= ixgbe_fc_full
;
3215 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
3216 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
3217 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
3218 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
3219 hw
->fc
.send_xon
= true;
3220 hw
->fc
.disable_fc_autoneg
= false;
3222 /* enable itr by default in dynamic mode */
3223 adapter
->itr_setting
= 1;
3224 adapter
->eitr_param
= 20000;
3226 /* set defaults for eitr in MegaBytes */
3227 adapter
->eitr_low
= 10;
3228 adapter
->eitr_high
= 20;
3230 /* set default ring sizes */
3231 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
3232 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
3234 /* initialize eeprom parameters */
3235 if (ixgbe_init_eeprom_params_generic(hw
)) {
3236 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
3240 /* enable rx csum by default */
3241 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
3243 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3249 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
3250 * @adapter: board private structure
3251 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3253 * Return 0 on success, negative on failure
3255 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
3256 struct ixgbe_ring
*tx_ring
)
3258 struct pci_dev
*pdev
= adapter
->pdev
;
3261 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
3262 tx_ring
->tx_buffer_info
= vmalloc(size
);
3263 if (!tx_ring
->tx_buffer_info
)
3265 memset(tx_ring
->tx_buffer_info
, 0, size
);
3267 /* round up to nearest 4K */
3268 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
3269 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3271 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
3276 tx_ring
->next_to_use
= 0;
3277 tx_ring
->next_to_clean
= 0;
3278 tx_ring
->work_limit
= tx_ring
->count
;
3282 vfree(tx_ring
->tx_buffer_info
);
3283 tx_ring
->tx_buffer_info
= NULL
;
3284 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
3285 "descriptor ring\n");
3290 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
3291 * @adapter: board private structure
3293 * If this function returns with an error, then it's possible one or
3294 * more of the rings is populated (while the rest are not). It is the
3295 * callers duty to clean those orphaned rings.
3297 * Return 0 on success, negative on failure
3299 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
3303 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3304 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
3307 DPRINTK(PROBE
, ERR
, "Allocation for Tx Queue %u failed\n", i
);
3315 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
3316 * @adapter: board private structure
3317 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3319 * Returns 0 on success, negative on failure
3321 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
3322 struct ixgbe_ring
*rx_ring
)
3324 struct pci_dev
*pdev
= adapter
->pdev
;
3327 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
3328 rx_ring
->rx_buffer_info
= vmalloc(size
);
3329 if (!rx_ring
->rx_buffer_info
) {
3331 "vmalloc allocation failed for the rx desc ring\n");
3334 memset(rx_ring
->rx_buffer_info
, 0, size
);
3336 /* Round up to nearest 4K */
3337 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
3338 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3340 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
3342 if (!rx_ring
->desc
) {
3344 "Memory allocation failed for the rx desc ring\n");
3345 vfree(rx_ring
->rx_buffer_info
);
3349 rx_ring
->next_to_clean
= 0;
3350 rx_ring
->next_to_use
= 0;
3359 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
3360 * @adapter: board private structure
3362 * If this function returns with an error, then it's possible one or
3363 * more of the rings is populated (while the rest are not). It is the
3364 * callers duty to clean those orphaned rings.
3366 * Return 0 on success, negative on failure
3369 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
3373 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3374 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
3377 DPRINTK(PROBE
, ERR
, "Allocation for Rx Queue %u failed\n", i
);
3385 * ixgbe_free_tx_resources - Free Tx Resources per Queue
3386 * @adapter: board private structure
3387 * @tx_ring: Tx descriptor ring for a specific queue
3389 * Free all transmit software resources
3391 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
3392 struct ixgbe_ring
*tx_ring
)
3394 struct pci_dev
*pdev
= adapter
->pdev
;
3396 ixgbe_clean_tx_ring(adapter
, tx_ring
);
3398 vfree(tx_ring
->tx_buffer_info
);
3399 tx_ring
->tx_buffer_info
= NULL
;
3401 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
3403 tx_ring
->desc
= NULL
;
3407 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3408 * @adapter: board private structure
3410 * Free all transmit software resources
3412 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
3416 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3417 if (adapter
->tx_ring
[i
].desc
)
3418 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
3422 * ixgbe_free_rx_resources - Free Rx Resources
3423 * @adapter: board private structure
3424 * @rx_ring: ring to clean the resources from
3426 * Free all receive software resources
3428 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
3429 struct ixgbe_ring
*rx_ring
)
3431 struct pci_dev
*pdev
= adapter
->pdev
;
3433 ixgbe_clean_rx_ring(adapter
, rx_ring
);
3435 vfree(rx_ring
->rx_buffer_info
);
3436 rx_ring
->rx_buffer_info
= NULL
;
3438 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
3440 rx_ring
->desc
= NULL
;
3444 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3445 * @adapter: board private structure
3447 * Free all receive software resources
3449 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
3453 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3454 if (adapter
->rx_ring
[i
].desc
)
3455 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
3459 * ixgbe_change_mtu - Change the Maximum Transfer Unit
3460 * @netdev: network interface device structure
3461 * @new_mtu: new value for maximum frame size
3463 * Returns 0 on success, negative on failure
3465 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
3467 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3468 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3470 /* MTU < 68 is an error and causes problems on some kernels */
3471 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
3474 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
3475 netdev
->mtu
, new_mtu
);
3476 /* must set new MTU before calling down or up */
3477 netdev
->mtu
= new_mtu
;
3479 if (netif_running(netdev
))
3480 ixgbe_reinit_locked(adapter
);
3486 * ixgbe_open - Called when a network interface is made active
3487 * @netdev: network interface device structure
3489 * Returns 0 on success, negative value on failure
3491 * The open entry point is called when a network interface is made
3492 * active by the system (IFF_UP). At this point all resources needed
3493 * for transmit and receive operations are allocated, the interrupt
3494 * handler is registered with the OS, the watchdog timer is started,
3495 * and the stack is notified that the interface is ready.
3497 static int ixgbe_open(struct net_device
*netdev
)
3499 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3502 /* disallow open during test */
3503 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
3506 /* allocate transmit descriptors */
3507 err
= ixgbe_setup_all_tx_resources(adapter
);
3511 /* allocate receive descriptors */
3512 err
= ixgbe_setup_all_rx_resources(adapter
);
3516 ixgbe_configure(adapter
);
3518 ixgbe_napi_add_all(adapter
);
3520 err
= ixgbe_request_irq(adapter
);
3524 err
= ixgbe_up_complete(adapter
);
3528 netif_tx_start_all_queues(netdev
);
3533 ixgbe_release_hw_control(adapter
);
3534 ixgbe_free_irq(adapter
);
3537 ixgbe_free_all_rx_resources(adapter
);
3539 ixgbe_free_all_tx_resources(adapter
);
3540 ixgbe_reset(adapter
);
3546 * ixgbe_close - Disables a network interface
3547 * @netdev: network interface device structure
3549 * Returns 0, this is not allowed to fail
3551 * The close entry point is called when an interface is de-activated
3552 * by the OS. The hardware is still under the drivers control, but
3553 * needs to be disabled. A global MAC reset is issued to stop the
3554 * hardware, and all transmit and receive resources are freed.
3556 static int ixgbe_close(struct net_device
*netdev
)
3558 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3560 ixgbe_down(adapter
);
3561 ixgbe_free_irq(adapter
);
3563 ixgbe_free_all_tx_resources(adapter
);
3564 ixgbe_free_all_rx_resources(adapter
);
3566 ixgbe_release_hw_control(adapter
);
3572 * ixgbe_napi_add_all - prep napi structs for use
3573 * @adapter: private struct
3575 * helper function to napi_add each possible q_vector->napi
3577 void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
3579 int q_idx
, q_vectors
;
3580 struct net_device
*netdev
= adapter
->netdev
;
3581 int (*poll
)(struct napi_struct
*, int);
3583 /* check if we already have our netdev->napi_list populated */
3584 if (&netdev
->napi_list
!= netdev
->napi_list
.next
)
3587 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3588 poll
= &ixgbe_clean_rxonly
;
3589 /* Only enable as many vectors as we have rx queues. */
3590 q_vectors
= adapter
->num_rx_queues
;
3593 /* only one q_vector for legacy modes */
3597 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3598 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
3599 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
3603 void ixgbe_napi_del_all(struct ixgbe_adapter
*adapter
)
3606 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3608 /* legacy and MSI only use one vector */
3609 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3612 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3613 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
3614 if (!q_vector
->rxr_count
)
3616 netif_napi_del(&q_vector
->napi
);
3621 static int ixgbe_resume(struct pci_dev
*pdev
)
3623 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3624 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3627 pci_set_power_state(pdev
, PCI_D0
);
3628 pci_restore_state(pdev
);
3629 err
= pci_enable_device(pdev
);
3631 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from "
3635 pci_set_master(pdev
);
3637 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3638 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3640 err
= ixgbe_init_interrupt_scheme(adapter
);
3642 printk(KERN_ERR
"ixgbe: Cannot initialize interrupts for "
3647 ixgbe_reset(adapter
);
3649 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
3651 if (netif_running(netdev
)) {
3652 err
= ixgbe_open(adapter
->netdev
);
3657 netif_device_attach(netdev
);
3661 #endif /* CONFIG_PM */
3663 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
3665 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3666 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3667 struct ixgbe_hw
*hw
= &adapter
->hw
;
3669 u32 wufc
= adapter
->wol
;
3674 netif_device_detach(netdev
);
3676 if (netif_running(netdev
)) {
3677 ixgbe_down(adapter
);
3678 ixgbe_free_irq(adapter
);
3679 ixgbe_free_all_tx_resources(adapter
);
3680 ixgbe_free_all_rx_resources(adapter
);
3682 ixgbe_reset_interrupt_capability(adapter
);
3683 ixgbe_napi_del_all(adapter
);
3684 INIT_LIST_HEAD(&netdev
->napi_list
);
3685 kfree(adapter
->tx_ring
);
3686 kfree(adapter
->rx_ring
);
3689 retval
= pci_save_state(pdev
);
3695 ixgbe_set_rx_mode(netdev
);
3697 /* turn on all-multi mode if wake on multicast is enabled */
3698 if (wufc
& IXGBE_WUFC_MC
) {
3699 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3700 fctrl
|= IXGBE_FCTRL_MPE
;
3701 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3704 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
3705 ctrl
|= IXGBE_CTRL_GIO_DIS
;
3706 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
3708 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
3710 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
3711 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
3714 if (wufc
&& hw
->mac
.type
== ixgbe_mac_82599EB
) {
3715 pci_enable_wake(pdev
, PCI_D3hot
, 1);
3716 pci_enable_wake(pdev
, PCI_D3cold
, 1);
3718 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3719 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3722 *enable_wake
= !!wufc
;
3724 ixgbe_release_hw_control(adapter
);
3726 pci_disable_device(pdev
);
3732 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
3737 retval
= __ixgbe_shutdown(pdev
, &wake
);
3742 pci_prepare_to_sleep(pdev
);
3744 pci_wake_from_d3(pdev
, false);
3745 pci_set_power_state(pdev
, PCI_D3hot
);
3750 #endif /* CONFIG_PM */
3752 static void ixgbe_shutdown(struct pci_dev
*pdev
)
3756 __ixgbe_shutdown(pdev
, &wake
);
3758 if (system_state
== SYSTEM_POWER_OFF
) {
3759 pci_wake_from_d3(pdev
, wake
);
3760 pci_set_power_state(pdev
, PCI_D3hot
);
3765 * ixgbe_update_stats - Update the board statistics counters.
3766 * @adapter: board private structure
3768 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
3770 struct ixgbe_hw
*hw
= &adapter
->hw
;
3772 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
3774 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3775 for (i
= 0; i
< 16; i
++)
3776 adapter
->hw_rx_no_dma_resources
+=
3777 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
3780 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
3781 for (i
= 0; i
< 8; i
++) {
3782 /* for packet buffers not used, the register should read 0 */
3783 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
3785 adapter
->stats
.mpc
[i
] += mpc
;
3786 total_mpc
+= adapter
->stats
.mpc
[i
];
3787 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3788 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
3789 adapter
->stats
.qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
3790 adapter
->stats
.qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
3791 adapter
->stats
.qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
3792 adapter
->stats
.qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
3793 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3794 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
3795 IXGBE_PXONRXCNT(i
));
3796 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
3797 IXGBE_PXOFFRXCNT(i
));
3798 adapter
->stats
.qprdc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
3800 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
3802 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
3805 adapter
->stats
.pxontxc
[i
] += IXGBE_READ_REG(hw
,
3807 adapter
->stats
.pxofftxc
[i
] += IXGBE_READ_REG(hw
,
3810 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
3811 /* work around hardware counting issue */
3812 adapter
->stats
.gprc
-= missed_rx
;
3814 /* 82598 hardware only has a 32 bit counter in the high register */
3815 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3816 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
3817 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
3818 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
3819 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
3820 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
3821 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
3822 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
3823 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
3825 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
3826 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
3827 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
3828 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
3829 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
3831 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
3832 adapter
->stats
.bprc
+= bprc
;
3833 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
3834 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3835 adapter
->stats
.mprc
-= bprc
;
3836 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
3837 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
3838 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
3839 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
3840 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
3841 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
3842 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
3843 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
3844 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
3845 adapter
->stats
.lxontxc
+= lxon
;
3846 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
3847 adapter
->stats
.lxofftxc
+= lxoff
;
3848 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3849 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
3850 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
3852 * 82598 errata - tx of flow control packets is included in tx counters
3854 xon_off_tot
= lxon
+ lxoff
;
3855 adapter
->stats
.gptc
-= xon_off_tot
;
3856 adapter
->stats
.mptc
-= xon_off_tot
;
3857 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
3858 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3859 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
3860 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
3861 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
3862 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
3863 adapter
->stats
.ptc64
-= xon_off_tot
;
3864 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
3865 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
3866 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
3867 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
3868 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
3869 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
3871 /* Fill out the OS statistics structure */
3872 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3875 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
3876 adapter
->stats
.rlec
;
3877 adapter
->net_stats
.rx_dropped
= 0;
3878 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
3879 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3880 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
3884 * ixgbe_watchdog - Timer Call-back
3885 * @data: pointer to adapter cast into an unsigned long
3887 static void ixgbe_watchdog(unsigned long data
)
3889 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3890 struct ixgbe_hw
*hw
= &adapter
->hw
;
3892 /* Do the watchdog outside of interrupt context due to the lovely
3893 * delays that some of the newer hardware requires */
3894 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
3898 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++)
3901 /* Cause software interrupt to ensure rx rings are cleaned */
3902 switch (hw
->mac
.type
) {
3903 case ixgbe_mac_82598EB
:
3904 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3905 IXGBE_WRITE_REG(hw
, IXGBE_EICS
, (u32
)eics
);
3908 * for legacy and MSI interrupts don't set any
3909 * bits that are enabled for EIAM, because this
3910 * operation would set *both* EIMS and EICS for
3913 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3914 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3917 case ixgbe_mac_82599EB
:
3918 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3920 * EICS(0..15) first 0-15 q vectors
3921 * EICS[1] (16..31) q vectors 16-31
3922 * EICS[2] (0..31) q vectors 32-63
3924 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3925 (u32
)(eics
& 0xFFFF));
3926 IXGBE_WRITE_REG(hw
, IXGBE_EICS_EX(1),
3927 (u32
)(eics
& 0xFFFF0000));
3928 IXGBE_WRITE_REG(hw
, IXGBE_EICS_EX(2),
3932 * for legacy and MSI interrupts don't set any
3933 * bits that are enabled for EIAM, because this
3934 * operation would set *both* EIMS and EICS for
3937 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3938 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3944 /* Reset the timer */
3945 mod_timer(&adapter
->watchdog_timer
,
3946 round_jiffies(jiffies
+ 2 * HZ
));
3949 schedule_work(&adapter
->watchdog_task
);
3953 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
3954 * @work: pointer to work_struct containing our data
3956 static void ixgbe_multispeed_fiber_task(struct work_struct
*work
)
3958 struct ixgbe_adapter
*adapter
= container_of(work
,
3959 struct ixgbe_adapter
,
3960 multispeed_fiber_task
);
3961 struct ixgbe_hw
*hw
= &adapter
->hw
;
3964 adapter
->flags
|= IXGBE_FLAG_IN_SFP_LINK_TASK
;
3965 if (hw
->mac
.ops
.get_link_capabilities
)
3966 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3968 if (hw
->mac
.ops
.setup_link_speed
)
3969 hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, true);
3970 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
3971 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_LINK_TASK
;
3975 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
3976 * @work: pointer to work_struct containing our data
3978 static void ixgbe_sfp_config_module_task(struct work_struct
*work
)
3980 struct ixgbe_adapter
*adapter
= container_of(work
,
3981 struct ixgbe_adapter
,
3982 sfp_config_module_task
);
3983 struct ixgbe_hw
*hw
= &adapter
->hw
;
3986 adapter
->flags
|= IXGBE_FLAG_IN_SFP_MOD_TASK
;
3987 err
= hw
->phy
.ops
.identify_sfp(hw
);
3988 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
3989 DPRINTK(PROBE
, ERR
, "PHY not supported on this NIC %d\n", err
);
3990 ixgbe_down(adapter
);
3993 hw
->mac
.ops
.setup_sfp(hw
);
3995 if (!(adapter
->flags
& IXGBE_FLAG_IN_SFP_LINK_TASK
))
3996 /* This will also work for DA Twinax connections */
3997 schedule_work(&adapter
->multispeed_fiber_task
);
3998 adapter
->flags
&= ~IXGBE_FLAG_IN_SFP_MOD_TASK
;
4002 * ixgbe_watchdog_task - worker thread to bring link up
4003 * @work: pointer to work_struct containing our data
4005 static void ixgbe_watchdog_task(struct work_struct
*work
)
4007 struct ixgbe_adapter
*adapter
= container_of(work
,
4008 struct ixgbe_adapter
,
4010 struct net_device
*netdev
= adapter
->netdev
;
4011 struct ixgbe_hw
*hw
= &adapter
->hw
;
4012 u32 link_speed
= adapter
->link_speed
;
4013 bool link_up
= adapter
->link_up
;
4015 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
4017 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
4018 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
4020 time_after(jiffies
, (adapter
->link_check_timeout
+
4021 IXGBE_TRY_LINK_TIMEOUT
))) {
4022 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
4023 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4025 adapter
->link_up
= link_up
;
4026 adapter
->link_speed
= link_speed
;
4030 if (!netif_carrier_ok(netdev
)) {
4031 bool flow_rx
, flow_tx
;
4033 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4034 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
4035 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
4036 flow_rx
= (mflcn
& IXGBE_MFLCN_RFCE
);
4037 flow_tx
= (fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
4039 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4040 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
4041 flow_rx
= (frctl
& IXGBE_FCTRL_RFCE
);
4042 flow_tx
= (rmcs
& IXGBE_RMCS_TFCE_802_3X
);
4045 printk(KERN_INFO
"ixgbe: %s NIC Link is Up %s, "
4046 "Flow Control: %s\n",
4048 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
4050 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
4051 "1 Gbps" : "unknown speed")),
4052 ((flow_rx
&& flow_tx
) ? "RX/TX" :
4054 (flow_tx
? "TX" : "None"))));
4056 netif_carrier_on(netdev
);
4058 /* Force detection of hung controller */
4059 adapter
->detect_tx_hung
= true;
4062 adapter
->link_up
= false;
4063 adapter
->link_speed
= 0;
4064 if (netif_carrier_ok(netdev
)) {
4065 printk(KERN_INFO
"ixgbe: %s NIC Link is Down\n",
4067 netif_carrier_off(netdev
);
4071 ixgbe_update_stats(adapter
);
4072 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
4075 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
4076 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
4077 u32 tx_flags
, u8
*hdr_len
)
4079 struct ixgbe_adv_tx_context_desc
*context_desc
;
4082 struct ixgbe_tx_buffer
*tx_buffer_info
;
4083 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
4084 u32 mss_l4len_idx
, l4len
;
4086 if (skb_is_gso(skb
)) {
4087 if (skb_header_cloned(skb
)) {
4088 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
4092 l4len
= tcp_hdrlen(skb
);
4095 if (skb
->protocol
== htons(ETH_P_IP
)) {
4096 struct iphdr
*iph
= ip_hdr(skb
);
4099 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4103 adapter
->hw_tso_ctxt
++;
4104 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
4105 ipv6_hdr(skb
)->payload_len
= 0;
4106 tcp_hdr(skb
)->check
=
4107 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4108 &ipv6_hdr(skb
)->daddr
,
4110 adapter
->hw_tso6_ctxt
++;
4113 i
= tx_ring
->next_to_use
;
4115 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4116 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4118 /* VLAN MACLEN IPLEN */
4119 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4121 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4122 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
4123 IXGBE_ADVTXD_MACLEN_SHIFT
);
4124 *hdr_len
+= skb_network_offset(skb
);
4126 (skb_transport_header(skb
) - skb_network_header(skb
));
4128 (skb_transport_header(skb
) - skb_network_header(skb
));
4129 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4130 context_desc
->seqnum_seed
= 0;
4132 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4133 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
4134 IXGBE_ADVTXD_DTYP_CTXT
);
4136 if (skb
->protocol
== htons(ETH_P_IP
))
4137 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4138 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4139 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4143 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
4144 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
4145 /* use index 1 for TSO */
4146 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4147 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4149 tx_buffer_info
->time_stamp
= jiffies
;
4150 tx_buffer_info
->next_to_watch
= i
;
4153 if (i
== tx_ring
->count
)
4155 tx_ring
->next_to_use
= i
;
4162 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
4163 struct ixgbe_ring
*tx_ring
,
4164 struct sk_buff
*skb
, u32 tx_flags
)
4166 struct ixgbe_adv_tx_context_desc
*context_desc
;
4168 struct ixgbe_tx_buffer
*tx_buffer_info
;
4169 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
4171 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
4172 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
4173 i
= tx_ring
->next_to_use
;
4174 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4175 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
4177 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4179 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
4180 vlan_macip_lens
|= (skb_network_offset(skb
) <<
4181 IXGBE_ADVTXD_MACLEN_SHIFT
);
4182 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
4183 vlan_macip_lens
|= (skb_transport_header(skb
) -
4184 skb_network_header(skb
));
4186 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4187 context_desc
->seqnum_seed
= 0;
4189 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
4190 IXGBE_ADVTXD_DTYP_CTXT
);
4192 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
4193 switch (skb
->protocol
) {
4194 case cpu_to_be16(ETH_P_IP
):
4195 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
4196 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
4198 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4200 case cpu_to_be16(ETH_P_IPV6
):
4201 /* XXX what about other V6 headers?? */
4202 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
4204 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
4207 if (unlikely(net_ratelimit())) {
4208 DPRINTK(PROBE
, WARNING
,
4209 "partial checksum but proto=%x!\n",
4216 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
4217 /* use index zero for tx checksum offload */
4218 context_desc
->mss_l4len_idx
= 0;
4220 tx_buffer_info
->time_stamp
= jiffies
;
4221 tx_buffer_info
->next_to_watch
= i
;
4223 adapter
->hw_csum_tx_good
++;
4225 if (i
== tx_ring
->count
)
4227 tx_ring
->next_to_use
= i
;
4235 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
4236 struct ixgbe_ring
*tx_ring
,
4237 struct sk_buff
*skb
, unsigned int first
)
4239 struct ixgbe_tx_buffer
*tx_buffer_info
;
4240 unsigned int len
= skb_headlen(skb
);
4241 unsigned int offset
= 0, size
, count
= 0, i
;
4242 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
4246 i
= tx_ring
->next_to_use
;
4248 if (skb_dma_map(&adapter
->pdev
->dev
, skb
, DMA_TO_DEVICE
)) {
4249 dev_err(&adapter
->pdev
->dev
, "TX DMA map failed\n");
4253 map
= skb_shinfo(skb
)->dma_maps
;
4256 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4257 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
4259 tx_buffer_info
->length
= size
;
4260 tx_buffer_info
->dma
= map
[0] + offset
;
4261 tx_buffer_info
->time_stamp
= jiffies
;
4262 tx_buffer_info
->next_to_watch
= i
;
4270 if (i
== tx_ring
->count
)
4275 for (f
= 0; f
< nr_frags
; f
++) {
4276 struct skb_frag_struct
*frag
;
4278 frag
= &skb_shinfo(skb
)->frags
[f
];
4284 if (i
== tx_ring
->count
)
4287 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4288 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
4290 tx_buffer_info
->length
= size
;
4291 tx_buffer_info
->dma
= map
[f
+ 1] + offset
;
4292 tx_buffer_info
->time_stamp
= jiffies
;
4293 tx_buffer_info
->next_to_watch
= i
;
4301 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
4302 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
4307 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
4308 struct ixgbe_ring
*tx_ring
,
4309 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
4311 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
4312 struct ixgbe_tx_buffer
*tx_buffer_info
;
4313 u32 olinfo_status
= 0, cmd_type_len
= 0;
4315 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
4317 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
4319 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
4321 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
4322 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
4324 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
4325 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
4327 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
4328 IXGBE_ADVTXD_POPTS_SHIFT
;
4330 /* use index 1 context for tso */
4331 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
4332 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
4333 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
4334 IXGBE_ADVTXD_POPTS_SHIFT
;
4336 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
4337 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
4338 IXGBE_ADVTXD_POPTS_SHIFT
;
4340 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
4342 i
= tx_ring
->next_to_use
;
4344 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4345 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
4346 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
4347 tx_desc
->read
.cmd_type_len
=
4348 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
4349 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4351 if (i
== tx_ring
->count
)
4355 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
4358 * Force memory writes to complete before letting h/w
4359 * know there are new descriptors to fetch. (Only
4360 * applicable for weak-ordered memory model archs,
4365 tx_ring
->next_to_use
= i
;
4366 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
4369 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
4370 struct ixgbe_ring
*tx_ring
, int size
)
4372 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4374 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4375 /* Herbert's original patch had:
4376 * smp_mb__after_netif_stop_queue();
4377 * but since that doesn't exist yet, just open code it. */
4380 /* We need to check again in a case another CPU has just
4381 * made room available. */
4382 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
4385 /* A reprieve! - use start_queue because it doesn't call schedule */
4386 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
4387 ++adapter
->restart_queue
;
4391 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
4392 struct ixgbe_ring
*tx_ring
, int size
)
4394 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
4396 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
4399 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
4401 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
4403 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
4404 return 0; /* All traffic should default to class 0 */
4406 return skb_tx_hash(dev
, skb
);
4409 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
4411 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4412 struct ixgbe_ring
*tx_ring
;
4414 unsigned int tx_flags
= 0;
4420 r_idx
= skb
->queue_mapping
;
4421 tx_ring
= &adapter
->tx_ring
[r_idx
];
4423 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
4424 tx_flags
|= vlan_tx_tag_get(skb
);
4425 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4426 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
4427 tx_flags
|= (skb
->queue_mapping
<< 13);
4429 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
4430 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
4431 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
4432 tx_flags
|= (skb
->queue_mapping
<< 13);
4433 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
4434 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
4436 /* three things can cause us to need a context descriptor */
4437 if (skb_is_gso(skb
) ||
4438 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
4439 (tx_flags
& IXGBE_TX_FLAGS_VLAN
))
4442 count
+= TXD_USE_COUNT(skb_headlen(skb
));
4443 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
4444 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
4446 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
4448 return NETDEV_TX_BUSY
;
4451 if (skb
->protocol
== htons(ETH_P_IP
))
4452 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
4453 first
= tx_ring
->next_to_use
;
4454 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
4456 dev_kfree_skb_any(skb
);
4457 return NETDEV_TX_OK
;
4461 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
4462 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
4463 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
4464 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
4466 count
= ixgbe_tx_map(adapter
, tx_ring
, skb
, first
);
4469 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
, count
, skb
->len
,
4471 netdev
->trans_start
= jiffies
;
4472 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
4475 dev_kfree_skb_any(skb
);
4476 tx_ring
->tx_buffer_info
[first
].time_stamp
= 0;
4477 tx_ring
->next_to_use
= first
;
4480 return NETDEV_TX_OK
;
4484 * ixgbe_get_stats - Get System Network Statistics
4485 * @netdev: network interface device structure
4487 * Returns the address of the device statistics structure.
4488 * The statistics are actually updated from the timer callback.
4490 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
4492 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4494 /* only return the current stats */
4495 return &adapter
->net_stats
;
4499 * ixgbe_set_mac - Change the Ethernet Address of the NIC
4500 * @netdev: network interface device structure
4501 * @p: pointer to an address structure
4503 * Returns 0 on success, negative on failure
4505 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
4507 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4508 struct ixgbe_hw
*hw
= &adapter
->hw
;
4509 struct sockaddr
*addr
= p
;
4511 if (!is_valid_ether_addr(addr
->sa_data
))
4512 return -EADDRNOTAVAIL
;
4514 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
4515 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
4517 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
4522 #ifdef CONFIG_NET_POLL_CONTROLLER
4524 * Polling 'interrupt' - used by things like netconsole to send skbs
4525 * without having to re-enable interrupts. It's not called while
4526 * the interrupt routine is executing.
4528 static void ixgbe_netpoll(struct net_device
*netdev
)
4530 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4532 disable_irq(adapter
->pdev
->irq
);
4533 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
4534 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
4535 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
4536 enable_irq(adapter
->pdev
->irq
);
4540 static const struct net_device_ops ixgbe_netdev_ops
= {
4541 .ndo_open
= ixgbe_open
,
4542 .ndo_stop
= ixgbe_close
,
4543 .ndo_start_xmit
= ixgbe_xmit_frame
,
4544 .ndo_select_queue
= ixgbe_select_queue
,
4545 .ndo_get_stats
= ixgbe_get_stats
,
4546 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
4547 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
4548 .ndo_validate_addr
= eth_validate_addr
,
4549 .ndo_set_mac_address
= ixgbe_set_mac
,
4550 .ndo_change_mtu
= ixgbe_change_mtu
,
4551 .ndo_tx_timeout
= ixgbe_tx_timeout
,
4552 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
4553 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
4554 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
4555 #ifdef CONFIG_NET_POLL_CONTROLLER
4556 .ndo_poll_controller
= ixgbe_netpoll
,
4561 * ixgbe_probe - Device Initialization Routine
4562 * @pdev: PCI device information struct
4563 * @ent: entry in ixgbe_pci_tbl
4565 * Returns 0 on success, negative on failure
4567 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
4568 * The OS initialization, configuring of the adapter private structure,
4569 * and a hardware reset occur.
4571 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
4572 const struct pci_device_id
*ent
)
4574 struct net_device
*netdev
;
4575 struct ixgbe_adapter
*adapter
= NULL
;
4576 struct ixgbe_hw
*hw
;
4577 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
4578 static int cards_found
;
4579 int i
, err
, pci_using_dac
;
4582 err
= pci_enable_device(pdev
);
4586 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)) &&
4587 !pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64))) {
4590 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
4592 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
4594 dev_err(&pdev
->dev
, "No usable DMA "
4595 "configuration, aborting\n");
4602 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
4604 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
4608 err
= pci_enable_pcie_error_reporting(pdev
);
4610 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
4612 /* non-fatal, continue */
4615 pci_set_master(pdev
);
4616 pci_save_state(pdev
);
4618 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
4621 goto err_alloc_etherdev
;
4624 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
4626 pci_set_drvdata(pdev
, netdev
);
4627 adapter
= netdev_priv(netdev
);
4629 adapter
->netdev
= netdev
;
4630 adapter
->pdev
= pdev
;
4633 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
4635 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
4636 pci_resource_len(pdev
, 0));
4642 for (i
= 1; i
<= 5; i
++) {
4643 if (pci_resource_len(pdev
, i
) == 0)
4647 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
4648 ixgbe_set_ethtool_ops(netdev
);
4649 netdev
->watchdog_timeo
= 5 * HZ
;
4650 strcpy(netdev
->name
, pci_name(pdev
));
4652 adapter
->bd_number
= cards_found
;
4655 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
4656 hw
->mac
.type
= ii
->mac
;
4659 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
4660 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
4661 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4662 if (!(eec
& (1 << 8)))
4663 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
4666 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
4667 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
4669 /* set up this timer and work struct before calling get_invariants
4670 * which might start the timer
4672 init_timer(&adapter
->sfp_timer
);
4673 adapter
->sfp_timer
.function
= &ixgbe_sfp_timer
;
4674 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
4676 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
4678 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
4679 INIT_WORK(&adapter
->multispeed_fiber_task
, ixgbe_multispeed_fiber_task
);
4681 /* a new SFP+ module arrival, called from GPI SDP2 context */
4682 INIT_WORK(&adapter
->sfp_config_module_task
,
4683 ixgbe_sfp_config_module_task
);
4685 err
= ii
->get_invariants(hw
);
4686 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
4687 /* start a kernel thread to watch for a module to arrive */
4688 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4689 mod_timer(&adapter
->sfp_timer
,
4690 round_jiffies(jiffies
+ (2 * HZ
)));
4692 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4693 DPRINTK(PROBE
, ERR
, "failed to load because an "
4694 "unsupported SFP+ module type was detected.\n");
4700 /* setup the private structure */
4701 err
= ixgbe_sw_init(adapter
);
4705 /* reset_hw fills in the perm_addr as well */
4706 err
= hw
->mac
.ops
.reset_hw(hw
);
4708 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
4712 netdev
->features
= NETIF_F_SG
|
4714 NETIF_F_HW_VLAN_TX
|
4715 NETIF_F_HW_VLAN_RX
|
4716 NETIF_F_HW_VLAN_FILTER
;
4718 netdev
->features
|= NETIF_F_IPV6_CSUM
;
4719 netdev
->features
|= NETIF_F_TSO
;
4720 netdev
->features
|= NETIF_F_TSO6
;
4721 netdev
->features
|= NETIF_F_GRO
;
4723 netdev
->vlan_features
|= NETIF_F_TSO
;
4724 netdev
->vlan_features
|= NETIF_F_TSO6
;
4725 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
4726 netdev
->vlan_features
|= NETIF_F_SG
;
4728 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
4729 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
4731 #ifdef CONFIG_IXGBE_DCB
4732 netdev
->dcbnl_ops
= &dcbnl_ops
;
4736 netdev
->features
|= NETIF_F_HIGHDMA
;
4738 /* make sure the EEPROM is good */
4739 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
4740 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
4745 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
4746 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
4748 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
4749 dev_err(&pdev
->dev
, "invalid MAC address\n");
4754 init_timer(&adapter
->watchdog_timer
);
4755 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
4756 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
4758 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
4759 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
4761 err
= ixgbe_init_interrupt_scheme(adapter
);
4765 switch (pdev
->device
) {
4766 case IXGBE_DEV_ID_82599_KX4
:
4767 adapter
->wol
= (IXGBE_WUFC_MAG
| IXGBE_WUFC_EX
|
4768 IXGBE_WUFC_MC
| IXGBE_WUFC_BC
);
4774 device_init_wakeup(&adapter
->pdev
->dev
, true);
4775 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
4777 /* print bus type/speed/width info */
4778 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) %pM\n",
4779 ((hw
->bus
.speed
== ixgbe_bus_speed_5000
) ? "5.0Gb/s":
4780 (hw
->bus
.speed
== ixgbe_bus_speed_2500
) ? "2.5Gb/s":"Unknown"),
4781 ((hw
->bus
.width
== ixgbe_bus_width_pcie_x8
) ? "Width x8" :
4782 (hw
->bus
.width
== ixgbe_bus_width_pcie_x4
) ? "Width x4" :
4783 (hw
->bus
.width
== ixgbe_bus_width_pcie_x1
) ? "Width x1" :
4786 ixgbe_read_pba_num_generic(hw
, &part_num
);
4787 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
4788 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
4789 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
4790 (part_num
>> 8), (part_num
& 0xff));
4792 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4793 hw
->mac
.type
, hw
->phy
.type
,
4794 (part_num
>> 8), (part_num
& 0xff));
4796 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
4797 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
4798 "this card is not sufficient for optimal "
4800 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
4801 "PCI-Express slot is required.\n");
4804 /* save off EEPROM version number */
4805 hw
->eeprom
.ops
.read(hw
, 0x29, &adapter
->eeprom_version
);
4807 /* reset the hardware with the new settings */
4808 hw
->mac
.ops
.start_hw(hw
);
4810 netif_carrier_off(netdev
);
4812 strcpy(netdev
->name
, "eth%d");
4813 err
= register_netdev(netdev
);
4817 #ifdef CONFIG_IXGBE_DCA
4818 if (dca_add_requester(&pdev
->dev
) == 0) {
4819 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
4820 /* always use CB2 mode, difference is masked
4821 * in the CB driver */
4822 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
4823 ixgbe_setup_dca(adapter
);
4827 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
4832 ixgbe_release_hw_control(adapter
);
4835 ixgbe_reset_interrupt_capability(adapter
);
4837 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4838 del_timer_sync(&adapter
->sfp_timer
);
4839 cancel_work_sync(&adapter
->sfp_task
);
4840 cancel_work_sync(&adapter
->multispeed_fiber_task
);
4841 cancel_work_sync(&adapter
->sfp_config_module_task
);
4842 iounmap(hw
->hw_addr
);
4844 free_netdev(netdev
);
4846 pci_release_regions(pdev
);
4849 pci_disable_device(pdev
);
4854 * ixgbe_remove - Device Removal Routine
4855 * @pdev: PCI device information struct
4857 * ixgbe_remove is called by the PCI subsystem to alert the driver
4858 * that it should release a PCI device. The could be caused by a
4859 * Hot-Plug event, or because the driver is going to be removed from
4862 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
4864 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4865 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4868 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4869 /* clear the module not found bit to make sure the worker won't
4872 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4873 del_timer_sync(&adapter
->watchdog_timer
);
4875 del_timer_sync(&adapter
->sfp_timer
);
4876 cancel_work_sync(&adapter
->watchdog_task
);
4877 cancel_work_sync(&adapter
->sfp_task
);
4878 cancel_work_sync(&adapter
->multispeed_fiber_task
);
4879 cancel_work_sync(&adapter
->sfp_config_module_task
);
4880 flush_scheduled_work();
4882 #ifdef CONFIG_IXGBE_DCA
4883 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
4884 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
4885 dca_remove_requester(&pdev
->dev
);
4886 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
4890 if (netdev
->reg_state
== NETREG_REGISTERED
)
4891 unregister_netdev(netdev
);
4893 ixgbe_reset_interrupt_capability(adapter
);
4895 ixgbe_release_hw_control(adapter
);
4897 iounmap(adapter
->hw
.hw_addr
);
4898 pci_release_regions(pdev
);
4900 DPRINTK(PROBE
, INFO
, "complete\n");
4901 kfree(adapter
->tx_ring
);
4902 kfree(adapter
->rx_ring
);
4904 free_netdev(netdev
);
4906 err
= pci_disable_pcie_error_reporting(pdev
);
4909 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
4911 pci_disable_device(pdev
);
4915 * ixgbe_io_error_detected - called when PCI error is detected
4916 * @pdev: Pointer to PCI device
4917 * @state: The current pci connection state
4919 * This function is called after a PCI bus error affecting
4920 * this device has been detected.
4922 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
4923 pci_channel_state_t state
)
4925 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4926 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4928 netif_device_detach(netdev
);
4930 if (netif_running(netdev
))
4931 ixgbe_down(adapter
);
4932 pci_disable_device(pdev
);
4934 /* Request a slot reset. */
4935 return PCI_ERS_RESULT_NEED_RESET
;
4939 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4940 * @pdev: Pointer to PCI device
4942 * Restart the card from scratch, as if from a cold-boot.
4944 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
4946 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4947 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4948 pci_ers_result_t result
;
4951 if (pci_enable_device(pdev
)) {
4953 "Cannot re-enable PCI device after reset.\n");
4954 result
= PCI_ERS_RESULT_DISCONNECT
;
4956 pci_set_master(pdev
);
4957 pci_restore_state(pdev
);
4959 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4960 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4962 ixgbe_reset(adapter
);
4963 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4964 result
= PCI_ERS_RESULT_RECOVERED
;
4967 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4970 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err
);
4971 /* non-fatal, continue */
4978 * ixgbe_io_resume - called when traffic can start flowing again.
4979 * @pdev: Pointer to PCI device
4981 * This callback is called when the error recovery driver tells us that
4982 * its OK to resume normal operation.
4984 static void ixgbe_io_resume(struct pci_dev
*pdev
)
4986 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4987 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4989 if (netif_running(netdev
)) {
4990 if (ixgbe_up(adapter
)) {
4991 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
4996 netif_device_attach(netdev
);
4999 static struct pci_error_handlers ixgbe_err_handler
= {
5000 .error_detected
= ixgbe_io_error_detected
,
5001 .slot_reset
= ixgbe_io_slot_reset
,
5002 .resume
= ixgbe_io_resume
,
5005 static struct pci_driver ixgbe_driver
= {
5006 .name
= ixgbe_driver_name
,
5007 .id_table
= ixgbe_pci_tbl
,
5008 .probe
= ixgbe_probe
,
5009 .remove
= __devexit_p(ixgbe_remove
),
5011 .suspend
= ixgbe_suspend
,
5012 .resume
= ixgbe_resume
,
5014 .shutdown
= ixgbe_shutdown
,
5015 .err_handler
= &ixgbe_err_handler
5019 * ixgbe_init_module - Driver Registration Routine
5021 * ixgbe_init_module is the first routine called when the driver is
5022 * loaded. All it does is register with the PCI subsystem.
5024 static int __init
ixgbe_init_module(void)
5027 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
5028 ixgbe_driver_string
, ixgbe_driver_version
);
5030 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
5032 #ifdef CONFIG_IXGBE_DCA
5033 dca_register_notify(&dca_notifier
);
5036 ret
= pci_register_driver(&ixgbe_driver
);
5040 module_init(ixgbe_init_module
);
5043 * ixgbe_exit_module - Driver Exit Cleanup Routine
5045 * ixgbe_exit_module is called just before the driver is removed
5048 static void __exit
ixgbe_exit_module(void)
5050 #ifdef CONFIG_IXGBE_DCA
5051 dca_unregister_notify(&dca_notifier
);
5053 pci_unregister_driver(&ixgbe_driver
);
5056 #ifdef CONFIG_IXGBE_DCA
5057 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5062 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
5063 __ixgbe_notify_dca
);
5065 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5068 #endif /* CONFIG_IXGBE_DCA */
5071 * ixgbe_get_hw_dev_name - return device name string
5072 * used by hardware layer to print debugging information
5074 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
5076 struct ixgbe_adapter
*adapter
= hw
->back
;
5077 return adapter
->netdev
->name
;
5081 module_exit(ixgbe_exit_module
);