2 * Atmel MACB Ethernet Controller driver
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/platform_device.h>
22 #include <linux/phy.h>
24 #include <asm/arch/board.h>
25 #include <asm/arch/cpu.h>
29 #define RX_BUFFER_SIZE 128
30 #define RX_RING_SIZE 512
31 #define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
33 /* Make the IP header word-aligned (the ethernet header is 14 bytes) */
36 #define TX_RING_SIZE 128
37 #define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
38 #define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
40 #define TX_RING_GAP(bp) \
41 (TX_RING_SIZE - (bp)->tx_pending)
42 #define TX_BUFFS_AVAIL(bp) \
43 (((bp)->tx_tail <= (bp)->tx_head) ? \
44 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
45 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
46 #define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
48 #define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
50 /* minimum number of free TX descriptors before waking up TX process */
51 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
53 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
56 static void __macb_set_hwaddr(struct macb
*bp
)
61 bottom
= cpu_to_le32(*((u32
*)bp
->dev
->dev_addr
));
62 macb_writel(bp
, SA1B
, bottom
);
63 top
= cpu_to_le16(*((u16
*)(bp
->dev
->dev_addr
+ 4)));
64 macb_writel(bp
, SA1T
, top
);
67 static void __init
macb_get_hwaddr(struct macb
*bp
)
73 bottom
= macb_readl(bp
, SA1B
);
74 top
= macb_readl(bp
, SA1T
);
76 addr
[0] = bottom
& 0xff;
77 addr
[1] = (bottom
>> 8) & 0xff;
78 addr
[2] = (bottom
>> 16) & 0xff;
79 addr
[3] = (bottom
>> 24) & 0xff;
81 addr
[5] = (top
>> 8) & 0xff;
83 if (is_valid_ether_addr(addr
))
84 memcpy(bp
->dev
->dev_addr
, addr
, sizeof(addr
));
87 static int macb_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
)
89 struct macb
*bp
= bus
->priv
;
92 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
93 | MACB_BF(RW
, MACB_MAN_READ
)
94 | MACB_BF(PHYA
, mii_id
)
95 | MACB_BF(REGA
, regnum
)
96 | MACB_BF(CODE
, MACB_MAN_CODE
)));
98 /* wait for end of transfer */
99 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
102 value
= MACB_BFEXT(DATA
, macb_readl(bp
, MAN
));
107 static int macb_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
,
110 struct macb
*bp
= bus
->priv
;
112 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
113 | MACB_BF(RW
, MACB_MAN_WRITE
)
114 | MACB_BF(PHYA
, mii_id
)
115 | MACB_BF(REGA
, regnum
)
116 | MACB_BF(CODE
, MACB_MAN_CODE
)
117 | MACB_BF(DATA
, value
)));
119 /* wait for end of transfer */
120 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
126 static int macb_mdio_reset(struct mii_bus
*bus
)
131 static void macb_handle_link_change(struct net_device
*dev
)
133 struct macb
*bp
= netdev_priv(dev
);
134 struct phy_device
*phydev
= bp
->phy_dev
;
137 int status_change
= 0;
139 spin_lock_irqsave(&bp
->lock
, flags
);
142 if ((bp
->speed
!= phydev
->speed
) ||
143 (bp
->duplex
!= phydev
->duplex
)) {
146 reg
= macb_readl(bp
, NCFGR
);
147 reg
&= ~(MACB_BIT(SPD
) | MACB_BIT(FD
));
152 reg
|= MACB_BIT(SPD
);
154 macb_writel(bp
, NCFGR
, reg
);
156 bp
->speed
= phydev
->speed
;
157 bp
->duplex
= phydev
->duplex
;
162 if (phydev
->link
!= bp
->link
) {
169 bp
->link
= phydev
->link
;
174 spin_unlock_irqrestore(&bp
->lock
, flags
);
178 printk(KERN_INFO
"%s: link up (%d/%s)\n",
179 dev
->name
, phydev
->speed
,
180 DUPLEX_FULL
== phydev
->duplex
? "Full":"Half");
182 printk(KERN_INFO
"%s: link down\n", dev
->name
);
186 /* based on au1000_eth. c*/
187 static int macb_mii_probe(struct net_device
*dev
)
189 struct macb
*bp
= netdev_priv(dev
);
190 struct phy_device
*phydev
= NULL
;
191 struct eth_platform_data
*pdata
;
194 /* find the first phy */
195 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
196 if (bp
->mii_bus
.phy_map
[phy_addr
]) {
197 phydev
= bp
->mii_bus
.phy_map
[phy_addr
];
203 printk (KERN_ERR
"%s: no PHY found\n", dev
->name
);
207 pdata
= bp
->pdev
->dev
.platform_data
;
208 /* TODO : add pin_irq */
210 /* attach the mac to the phy */
211 if (pdata
&& pdata
->is_rmii
) {
212 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
213 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_RMII
);
215 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
216 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_MII
);
219 if (IS_ERR(phydev
)) {
220 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
221 return PTR_ERR(phydev
);
224 /* mask with MAC supported features */
225 phydev
->supported
&= PHY_BASIC_FEATURES
;
227 phydev
->advertising
= phydev
->supported
;
232 bp
->phy_dev
= phydev
;
237 static int macb_mii_init(struct macb
*bp
)
239 struct eth_platform_data
*pdata
;
242 /* Enable managment port */
243 macb_writel(bp
, NCR
, MACB_BIT(MPE
));
245 bp
->mii_bus
.name
= "MACB_mii_bus",
246 bp
->mii_bus
.read
= &macb_mdio_read
,
247 bp
->mii_bus
.write
= &macb_mdio_write
,
248 bp
->mii_bus
.reset
= &macb_mdio_reset
,
249 bp
->mii_bus
.id
= bp
->pdev
->id
,
250 bp
->mii_bus
.priv
= bp
,
251 bp
->mii_bus
.dev
= &bp
->dev
->dev
;
252 pdata
= bp
->pdev
->dev
.platform_data
;
255 bp
->mii_bus
.phy_mask
= pdata
->phy_mask
;
257 bp
->mii_bus
.irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
258 if (!bp
->mii_bus
.irq
) {
263 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
264 bp
->mii_bus
.irq
[i
] = PHY_POLL
;
266 platform_set_drvdata(bp
->dev
, &bp
->mii_bus
);
268 if (mdiobus_register(&bp
->mii_bus
))
269 goto err_out_free_mdio_irq
;
271 if (macb_mii_probe(bp
->dev
) != 0) {
272 goto err_out_unregister_bus
;
277 err_out_unregister_bus
:
278 mdiobus_unregister(&bp
->mii_bus
);
279 err_out_free_mdio_irq
:
280 kfree(bp
->mii_bus
.irq
);
285 static void macb_update_stats(struct macb
*bp
)
287 u32 __iomem
*reg
= bp
->regs
+ MACB_PFR
;
288 u32
*p
= &bp
->hw_stats
.rx_pause_frames
;
289 u32
*end
= &bp
->hw_stats
.tx_pause_frames
+ 1;
291 WARN_ON((unsigned long)(end
- p
- 1) != (MACB_TPF
- MACB_PFR
) / 4);
293 for(; p
< end
; p
++, reg
++)
294 *p
+= __raw_readl(reg
);
297 static void macb_tx(struct macb
*bp
)
303 status
= macb_readl(bp
, TSR
);
304 macb_writel(bp
, TSR
, status
);
306 dev_dbg(&bp
->pdev
->dev
, "macb_tx status = %02lx\n",
307 (unsigned long)status
);
309 if (status
& MACB_BIT(UND
)) {
310 printk(KERN_ERR
"%s: TX underrun, resetting buffers\n",
312 bp
->tx_head
= bp
->tx_tail
= 0;
315 if (!(status
& MACB_BIT(COMP
)))
317 * This may happen when a buffer becomes complete
318 * between reading the ISR and scanning the
319 * descriptors. Nothing to worry about.
324 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
325 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
326 struct sk_buff
*skb
= rp
->skb
;
332 bufstat
= bp
->tx_ring
[tail
].ctrl
;
334 if (!(bufstat
& MACB_BIT(TX_USED
)))
337 dev_dbg(&bp
->pdev
->dev
, "skb %u (data %p) TX complete\n",
339 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
341 bp
->stats
.tx_packets
++;
342 bp
->stats
.tx_bytes
+= skb
->len
;
344 dev_kfree_skb_irq(skb
);
348 if (netif_queue_stopped(bp
->dev
) &&
349 TX_BUFFS_AVAIL(bp
) > MACB_TX_WAKEUP_THRESH
)
350 netif_wake_queue(bp
->dev
);
353 static int macb_rx_frame(struct macb
*bp
, unsigned int first_frag
,
354 unsigned int last_frag
)
358 unsigned int offset
= 0;
361 len
= MACB_BFEXT(RX_FRMLEN
, bp
->rx_ring
[last_frag
].ctrl
);
363 dev_dbg(&bp
->pdev
->dev
, "macb_rx_frame frags %u - %u (len %u)\n",
364 first_frag
, last_frag
, len
);
366 skb
= dev_alloc_skb(len
+ RX_OFFSET
);
368 bp
->stats
.rx_dropped
++;
369 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
370 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
371 if (frag
== last_frag
)
378 skb_reserve(skb
, RX_OFFSET
);
379 skb
->ip_summed
= CHECKSUM_NONE
;
382 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
383 unsigned int frag_len
= RX_BUFFER_SIZE
;
385 if (offset
+ frag_len
> len
) {
386 BUG_ON(frag
!= last_frag
);
387 frag_len
= len
- offset
;
389 skb_copy_to_linear_data_offset(skb
, offset
,
391 (RX_BUFFER_SIZE
* frag
)),
393 offset
+= RX_BUFFER_SIZE
;
394 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
397 if (frag
== last_frag
)
401 skb
->protocol
= eth_type_trans(skb
, bp
->dev
);
403 bp
->stats
.rx_packets
++;
404 bp
->stats
.rx_bytes
+= len
;
405 bp
->dev
->last_rx
= jiffies
;
406 dev_dbg(&bp
->pdev
->dev
, "received skb of length %u, csum: %08x\n",
407 skb
->len
, skb
->csum
);
408 netif_receive_skb(skb
);
413 /* Mark DMA descriptors from begin up to and not including end as unused */
414 static void discard_partial_frame(struct macb
*bp
, unsigned int begin
,
419 for (frag
= begin
; frag
!= end
; frag
= NEXT_RX(frag
))
420 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
424 * When this happens, the hardware stats registers for
425 * whatever caused this is updated, so we don't have to record
430 static int macb_rx(struct macb
*bp
, int budget
)
433 unsigned int tail
= bp
->rx_tail
;
436 for (; budget
> 0; tail
= NEXT_RX(tail
)) {
440 addr
= bp
->rx_ring
[tail
].addr
;
441 ctrl
= bp
->rx_ring
[tail
].ctrl
;
443 if (!(addr
& MACB_BIT(RX_USED
)))
446 if (ctrl
& MACB_BIT(RX_SOF
)) {
447 if (first_frag
!= -1)
448 discard_partial_frame(bp
, first_frag
, tail
);
452 if (ctrl
& MACB_BIT(RX_EOF
)) {
454 BUG_ON(first_frag
== -1);
456 dropped
= macb_rx_frame(bp
, first_frag
, tail
);
465 if (first_frag
!= -1)
466 bp
->rx_tail
= first_frag
;
473 static int macb_poll(struct net_device
*dev
, int *budget
)
475 struct macb
*bp
= netdev_priv(dev
);
476 int orig_budget
, work_done
, retval
= 0;
479 status
= macb_readl(bp
, RSR
);
480 macb_writel(bp
, RSR
, status
);
484 * This may happen if an interrupt was pending before
485 * this function was called last time, and no packets
486 * have been received since.
488 netif_rx_complete(dev
);
492 dev_dbg(&bp
->pdev
->dev
, "poll: status = %08lx, budget = %d\n",
493 (unsigned long)status
, *budget
);
495 if (!(status
& MACB_BIT(REC
))) {
496 dev_warn(&bp
->pdev
->dev
,
497 "No RX buffers complete, status = %02lx\n",
498 (unsigned long)status
);
499 netif_rx_complete(dev
);
503 orig_budget
= *budget
;
504 if (orig_budget
> dev
->quota
)
505 orig_budget
= dev
->quota
;
507 work_done
= macb_rx(bp
, orig_budget
);
508 if (work_done
< orig_budget
) {
509 netif_rx_complete(dev
);
516 * We've done what we can to clean the buffers. Make sure we
517 * get notified when new packets arrive.
520 macb_writel(bp
, IER
, MACB_RX_INT_FLAGS
);
522 /* TODO: Handle errors */
527 static irqreturn_t
macb_interrupt(int irq
, void *dev_id
)
529 struct net_device
*dev
= dev_id
;
530 struct macb
*bp
= netdev_priv(dev
);
533 status
= macb_readl(bp
, ISR
);
535 if (unlikely(!status
))
538 spin_lock(&bp
->lock
);
541 /* close possible race with dev_close */
542 if (unlikely(!netif_running(dev
))) {
543 macb_writel(bp
, IDR
, ~0UL);
547 if (status
& MACB_RX_INT_FLAGS
) {
548 if (netif_rx_schedule_prep(dev
)) {
550 * There's no point taking any more interrupts
551 * until we have processed the buffers
553 macb_writel(bp
, IDR
, MACB_RX_INT_FLAGS
);
554 dev_dbg(&bp
->pdev
->dev
,
555 "scheduling RX softirq\n");
556 __netif_rx_schedule(dev
);
560 if (status
& (MACB_BIT(TCOMP
) | MACB_BIT(ISR_TUND
)))
564 * Link change detection isn't possible with RMII, so we'll
565 * add that if/when we get our hands on a full-blown MII PHY.
568 if (status
& MACB_BIT(HRESP
)) {
570 * TODO: Reset the hardware, and maybe move the printk
571 * to a lower-priority context as well (work queue?)
573 printk(KERN_ERR
"%s: DMA bus error: HRESP not OK\n",
577 status
= macb_readl(bp
, ISR
);
580 spin_unlock(&bp
->lock
);
585 static int macb_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
587 struct macb
*bp
= netdev_priv(dev
);
589 unsigned int len
, entry
;
594 dev_dbg(&bp
->pdev
->dev
,
595 "start_xmit: len %u head %p data %p tail %p end %p\n",
596 skb
->len
, skb
->head
, skb
->data
,
597 skb_tail_pointer(skb
), skb_end_pointer(skb
));
598 dev_dbg(&bp
->pdev
->dev
,
600 for (i
= 0; i
< 16; i
++)
601 printk(" %02x", (unsigned int)skb
->data
[i
]);
606 spin_lock_irq(&bp
->lock
);
608 /* This is a hard error, log it. */
609 if (TX_BUFFS_AVAIL(bp
) < 1) {
610 netif_stop_queue(dev
);
611 spin_unlock_irq(&bp
->lock
);
612 dev_err(&bp
->pdev
->dev
,
613 "BUG! Tx Ring full when queue awake!\n");
614 dev_dbg(&bp
->pdev
->dev
, "tx_head = %u, tx_tail = %u\n",
615 bp
->tx_head
, bp
->tx_tail
);
620 dev_dbg(&bp
->pdev
->dev
, "Allocated ring entry %u\n", entry
);
621 mapping
= dma_map_single(&bp
->pdev
->dev
, skb
->data
,
623 bp
->tx_skb
[entry
].skb
= skb
;
624 bp
->tx_skb
[entry
].mapping
= mapping
;
625 dev_dbg(&bp
->pdev
->dev
, "Mapped skb data %p to DMA addr %08lx\n",
626 skb
->data
, (unsigned long)mapping
);
628 ctrl
= MACB_BF(TX_FRMLEN
, len
);
629 ctrl
|= MACB_BIT(TX_LAST
);
630 if (entry
== (TX_RING_SIZE
- 1))
631 ctrl
|= MACB_BIT(TX_WRAP
);
633 bp
->tx_ring
[entry
].addr
= mapping
;
634 bp
->tx_ring
[entry
].ctrl
= ctrl
;
637 entry
= NEXT_TX(entry
);
640 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) | MACB_BIT(TSTART
));
642 if (TX_BUFFS_AVAIL(bp
) < 1)
643 netif_stop_queue(dev
);
645 spin_unlock_irq(&bp
->lock
);
647 dev
->trans_start
= jiffies
;
652 static void macb_free_consistent(struct macb
*bp
)
659 dma_free_coherent(&bp
->pdev
->dev
, RX_RING_BYTES
,
660 bp
->rx_ring
, bp
->rx_ring_dma
);
664 dma_free_coherent(&bp
->pdev
->dev
, TX_RING_BYTES
,
665 bp
->tx_ring
, bp
->tx_ring_dma
);
668 if (bp
->rx_buffers
) {
669 dma_free_coherent(&bp
->pdev
->dev
,
670 RX_RING_SIZE
* RX_BUFFER_SIZE
,
671 bp
->rx_buffers
, bp
->rx_buffers_dma
);
672 bp
->rx_buffers
= NULL
;
676 static int macb_alloc_consistent(struct macb
*bp
)
680 size
= TX_RING_SIZE
* sizeof(struct ring_info
);
681 bp
->tx_skb
= kmalloc(size
, GFP_KERNEL
);
685 size
= RX_RING_BYTES
;
686 bp
->rx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
687 &bp
->rx_ring_dma
, GFP_KERNEL
);
690 dev_dbg(&bp
->pdev
->dev
,
691 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
692 size
, (unsigned long)bp
->rx_ring_dma
, bp
->rx_ring
);
694 size
= TX_RING_BYTES
;
695 bp
->tx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
696 &bp
->tx_ring_dma
, GFP_KERNEL
);
699 dev_dbg(&bp
->pdev
->dev
,
700 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
701 size
, (unsigned long)bp
->tx_ring_dma
, bp
->tx_ring
);
703 size
= RX_RING_SIZE
* RX_BUFFER_SIZE
;
704 bp
->rx_buffers
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
705 &bp
->rx_buffers_dma
, GFP_KERNEL
);
708 dev_dbg(&bp
->pdev
->dev
,
709 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
710 size
, (unsigned long)bp
->rx_buffers_dma
, bp
->rx_buffers
);
715 macb_free_consistent(bp
);
719 static void macb_init_rings(struct macb
*bp
)
724 addr
= bp
->rx_buffers_dma
;
725 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
726 bp
->rx_ring
[i
].addr
= addr
;
727 bp
->rx_ring
[i
].ctrl
= 0;
728 addr
+= RX_BUFFER_SIZE
;
730 bp
->rx_ring
[RX_RING_SIZE
- 1].addr
|= MACB_BIT(RX_WRAP
);
732 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
733 bp
->tx_ring
[i
].addr
= 0;
734 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
736 bp
->tx_ring
[TX_RING_SIZE
- 1].ctrl
|= MACB_BIT(TX_WRAP
);
738 bp
->rx_tail
= bp
->tx_head
= bp
->tx_tail
= 0;
741 static void macb_reset_hw(struct macb
*bp
)
743 /* Make sure we have the write buffer for ourselves */
747 * Disable RX and TX (XXX: Should we halt the transmission
750 macb_writel(bp
, NCR
, 0);
752 /* Clear the stats registers (XXX: Update stats first?) */
753 macb_writel(bp
, NCR
, MACB_BIT(CLRSTAT
));
755 /* Clear all status flags */
756 macb_writel(bp
, TSR
, ~0UL);
757 macb_writel(bp
, RSR
, ~0UL);
759 /* Disable all interrupts */
760 macb_writel(bp
, IDR
, ~0UL);
764 static void macb_init_hw(struct macb
*bp
)
769 __macb_set_hwaddr(bp
);
771 config
= macb_readl(bp
, NCFGR
) & MACB_BF(CLK
, -1L);
772 config
|= MACB_BIT(PAE
); /* PAuse Enable */
773 config
|= MACB_BIT(DRFCS
); /* Discard Rx FCS */
774 if (bp
->dev
->flags
& IFF_PROMISC
)
775 config
|= MACB_BIT(CAF
); /* Copy All Frames */
776 if (!(bp
->dev
->flags
& IFF_BROADCAST
))
777 config
|= MACB_BIT(NBC
); /* No BroadCast */
778 macb_writel(bp
, NCFGR
, config
);
780 /* Initialize TX and RX buffers */
781 macb_writel(bp
, RBQP
, bp
->rx_ring_dma
);
782 macb_writel(bp
, TBQP
, bp
->tx_ring_dma
);
784 /* Enable TX and RX */
785 macb_writel(bp
, NCR
, MACB_BIT(RE
) | MACB_BIT(TE
) | MACB_BIT(MPE
));
787 /* Enable interrupts */
788 macb_writel(bp
, IER
, (MACB_BIT(RCOMP
)
799 static int macb_open(struct net_device
*dev
)
801 struct macb
*bp
= netdev_priv(dev
);
804 dev_dbg(&bp
->pdev
->dev
, "open\n");
806 /* if the phy is not yet register, retry later*/
810 if (!is_valid_ether_addr(dev
->dev_addr
))
811 return -EADDRNOTAVAIL
;
813 err
= macb_alloc_consistent(bp
);
816 "%s: Unable to allocate DMA memory (error %d)\n",
824 /* schedule a link state check */
825 phy_start(bp
->phy_dev
);
827 netif_start_queue(dev
);
832 static int macb_close(struct net_device
*dev
)
834 struct macb
*bp
= netdev_priv(dev
);
837 netif_stop_queue(dev
);
840 phy_stop(bp
->phy_dev
);
842 spin_lock_irqsave(&bp
->lock
, flags
);
844 netif_carrier_off(dev
);
845 spin_unlock_irqrestore(&bp
->lock
, flags
);
847 macb_free_consistent(bp
);
852 static struct net_device_stats
*macb_get_stats(struct net_device
*dev
)
854 struct macb
*bp
= netdev_priv(dev
);
855 struct net_device_stats
*nstat
= &bp
->stats
;
856 struct macb_stats
*hwstat
= &bp
->hw_stats
;
858 /* read stats from hardware */
859 macb_update_stats(bp
);
861 /* Convert HW stats into netdevice stats */
862 nstat
->rx_errors
= (hwstat
->rx_fcs_errors
+
863 hwstat
->rx_align_errors
+
864 hwstat
->rx_resource_errors
+
865 hwstat
->rx_overruns
+
866 hwstat
->rx_oversize_pkts
+
868 hwstat
->rx_undersize_pkts
+
869 hwstat
->sqe_test_errors
+
870 hwstat
->rx_length_mismatch
);
871 nstat
->tx_errors
= (hwstat
->tx_late_cols
+
872 hwstat
->tx_excessive_cols
+
873 hwstat
->tx_underruns
+
874 hwstat
->tx_carrier_errors
);
875 nstat
->collisions
= (hwstat
->tx_single_cols
+
876 hwstat
->tx_multiple_cols
+
877 hwstat
->tx_excessive_cols
);
878 nstat
->rx_length_errors
= (hwstat
->rx_oversize_pkts
+
880 hwstat
->rx_undersize_pkts
+
881 hwstat
->rx_length_mismatch
);
882 nstat
->rx_over_errors
= hwstat
->rx_resource_errors
;
883 nstat
->rx_crc_errors
= hwstat
->rx_fcs_errors
;
884 nstat
->rx_frame_errors
= hwstat
->rx_align_errors
;
885 nstat
->rx_fifo_errors
= hwstat
->rx_overruns
;
886 /* XXX: What does "missed" mean? */
887 nstat
->tx_aborted_errors
= hwstat
->tx_excessive_cols
;
888 nstat
->tx_carrier_errors
= hwstat
->tx_carrier_errors
;
889 nstat
->tx_fifo_errors
= hwstat
->tx_underruns
;
890 /* Don't know about heartbeat or window errors... */
895 static int macb_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
897 struct macb
*bp
= netdev_priv(dev
);
898 struct phy_device
*phydev
= bp
->phy_dev
;
903 return phy_ethtool_gset(phydev
, cmd
);
906 static int macb_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
908 struct macb
*bp
= netdev_priv(dev
);
909 struct phy_device
*phydev
= bp
->phy_dev
;
914 return phy_ethtool_sset(phydev
, cmd
);
917 static void macb_get_drvinfo(struct net_device
*dev
,
918 struct ethtool_drvinfo
*info
)
920 struct macb
*bp
= netdev_priv(dev
);
922 strcpy(info
->driver
, bp
->pdev
->dev
.driver
->name
);
923 strcpy(info
->version
, "$Revision: 1.14 $");
924 strcpy(info
->bus_info
, bp
->pdev
->dev
.bus_id
);
927 static struct ethtool_ops macb_ethtool_ops
= {
928 .get_settings
= macb_get_settings
,
929 .set_settings
= macb_set_settings
,
930 .get_drvinfo
= macb_get_drvinfo
,
931 .get_link
= ethtool_op_get_link
,
934 static int macb_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
936 struct macb
*bp
= netdev_priv(dev
);
937 struct phy_device
*phydev
= bp
->phy_dev
;
939 if (!netif_running(dev
))
945 return phy_mii_ioctl(phydev
, if_mii(rq
), cmd
);
948 static int __devinit
macb_probe(struct platform_device
*pdev
)
950 struct eth_platform_data
*pdata
;
951 struct resource
*regs
;
952 struct net_device
*dev
;
954 struct phy_device
*phydev
;
955 unsigned long pclk_hz
;
959 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
961 dev_err(&pdev
->dev
, "no mmio resource defined\n");
966 dev
= alloc_etherdev(sizeof(*bp
));
968 dev_err(&pdev
->dev
, "etherdev alloc failed, aborting.\n");
972 SET_MODULE_OWNER(dev
);
973 SET_NETDEV_DEV(dev
, &pdev
->dev
);
975 /* TODO: Actually, we have some interesting features... */
978 bp
= netdev_priv(dev
);
982 spin_lock_init(&bp
->lock
);
984 #if defined(CONFIG_ARCH_AT91)
985 bp
->pclk
= clk_get(&pdev
->dev
, "macb_clk");
986 if (IS_ERR(bp
->pclk
)) {
987 dev_err(&pdev
->dev
, "failed to get macb_clk\n");
988 goto err_out_free_dev
;
990 clk_enable(bp
->pclk
);
992 bp
->pclk
= clk_get(&pdev
->dev
, "pclk");
993 if (IS_ERR(bp
->pclk
)) {
994 dev_err(&pdev
->dev
, "failed to get pclk\n");
995 goto err_out_free_dev
;
997 bp
->hclk
= clk_get(&pdev
->dev
, "hclk");
998 if (IS_ERR(bp
->hclk
)) {
999 dev_err(&pdev
->dev
, "failed to get hclk\n");
1000 goto err_out_put_pclk
;
1003 clk_enable(bp
->pclk
);
1004 clk_enable(bp
->hclk
);
1007 bp
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
1009 dev_err(&pdev
->dev
, "failed to map registers, aborting.\n");
1011 goto err_out_disable_clocks
;
1014 dev
->irq
= platform_get_irq(pdev
, 0);
1015 err
= request_irq(dev
->irq
, macb_interrupt
, IRQF_SAMPLE_RANDOM
,
1019 "%s: Unable to request IRQ %d (error %d)\n",
1020 dev
->name
, dev
->irq
, err
);
1021 goto err_out_iounmap
;
1024 dev
->open
= macb_open
;
1025 dev
->stop
= macb_close
;
1026 dev
->hard_start_xmit
= macb_start_xmit
;
1027 dev
->get_stats
= macb_get_stats
;
1028 dev
->do_ioctl
= macb_ioctl
;
1029 dev
->poll
= macb_poll
;
1031 dev
->ethtool_ops
= &macb_ethtool_ops
;
1033 dev
->base_addr
= regs
->start
;
1035 /* Set MII management clock divider */
1036 pclk_hz
= clk_get_rate(bp
->pclk
);
1037 if (pclk_hz
<= 20000000)
1038 config
= MACB_BF(CLK
, MACB_CLK_DIV8
);
1039 else if (pclk_hz
<= 40000000)
1040 config
= MACB_BF(CLK
, MACB_CLK_DIV16
);
1041 else if (pclk_hz
<= 80000000)
1042 config
= MACB_BF(CLK
, MACB_CLK_DIV32
);
1044 config
= MACB_BF(CLK
, MACB_CLK_DIV64
);
1045 macb_writel(bp
, NCFGR
, config
);
1047 macb_get_hwaddr(bp
);
1048 pdata
= pdev
->dev
.platform_data
;
1050 if (pdata
&& pdata
->is_rmii
)
1051 #if defined(CONFIG_ARCH_AT91)
1052 macb_writel(bp
, USRIO
, (MACB_BIT(RMII
) | MACB_BIT(CLKEN
)) );
1054 macb_writel(bp
, USRIO
, 0);
1057 #if defined(CONFIG_ARCH_AT91)
1058 macb_writel(bp
, USRIO
, MACB_BIT(CLKEN
));
1060 macb_writel(bp
, USRIO
, MACB_BIT(MII
));
1063 bp
->tx_pending
= DEF_TX_RING_PENDING
;
1065 err
= register_netdev(dev
);
1067 dev_err(&pdev
->dev
, "Cannot register net device, aborting.\n");
1068 goto err_out_free_irq
;
1071 if (macb_mii_init(bp
) != 0) {
1072 goto err_out_unregister_netdev
;
1075 platform_set_drvdata(pdev
, dev
);
1077 printk(KERN_INFO
"%s: Atmel MACB at 0x%08lx irq %d "
1078 "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
1079 dev
->name
, dev
->base_addr
, dev
->irq
,
1080 dev
->dev_addr
[0], dev
->dev_addr
[1], dev
->dev_addr
[2],
1081 dev
->dev_addr
[3], dev
->dev_addr
[4], dev
->dev_addr
[5]);
1083 phydev
= bp
->phy_dev
;
1084 printk(KERN_INFO
"%s: attached PHY driver [%s] "
1085 "(mii_bus:phy_addr=%s, irq=%d)\n",
1086 dev
->name
, phydev
->drv
->name
, phydev
->dev
.bus_id
, phydev
->irq
);
1090 err_out_unregister_netdev
:
1091 unregister_netdev(dev
);
1093 free_irq(dev
->irq
, dev
);
1096 err_out_disable_clocks
:
1097 #ifndef CONFIG_ARCH_AT91
1098 clk_disable(bp
->hclk
);
1101 clk_disable(bp
->pclk
);
1102 #ifndef CONFIG_ARCH_AT91
1109 platform_set_drvdata(pdev
, NULL
);
1113 static int __devexit
macb_remove(struct platform_device
*pdev
)
1115 struct net_device
*dev
;
1118 dev
= platform_get_drvdata(pdev
);
1121 bp
= netdev_priv(dev
);
1122 mdiobus_unregister(&bp
->mii_bus
);
1123 kfree(bp
->mii_bus
.irq
);
1124 unregister_netdev(dev
);
1125 free_irq(dev
->irq
, dev
);
1127 #ifndef CONFIG_ARCH_AT91
1128 clk_disable(bp
->hclk
);
1131 clk_disable(bp
->pclk
);
1134 platform_set_drvdata(pdev
, NULL
);
1140 static struct platform_driver macb_driver
= {
1141 .probe
= macb_probe
,
1142 .remove
= __devexit_p(macb_remove
),
1148 static int __init
macb_init(void)
1150 return platform_driver_register(&macb_driver
);
1153 static void __exit
macb_exit(void)
1155 platform_driver_unregister(&macb_driver
);
1158 module_init(macb_init
);
1159 module_exit(macb_exit
);
1161 MODULE_LICENSE("GPL");
1162 MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1163 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");