drivers/net/meth.c

   1 /*
   2  * meth.c -- O2 Builtin 10/100 Ethernet driver
   3  *
   4  * Copyright (C) 2001-2003 Ilya Volynets
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  */
  11 #include <linux/delay.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/init.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/slab.h>
  18 #include <linux/errno.h>
  19 #include <linux/types.h>
  20 #include <linux/interrupt.h>
  21
  22 #include <linux/in.h>
  23 #include <linux/in6.h>
  24 #include <linux/device.h> /* struct device, et al */
  25 #include <linux/netdevice.h>   /* struct device, and other headers */
  26 #include <linux/etherdevice.h> /* eth_type_trans */
  27 #include <linux/ip.h>          /* struct iphdr */
  28 #include <linux/tcp.h>         /* struct tcphdr */
  29 #include <linux/skbuff.h>
  30 #include <linux/mii.h>         /* MII definitions */
  31
  32 #include <asm/ip32/mace.h>
  33 #include <asm/ip32/ip32_ints.h>
  34
  35 #include <asm/io.h>
  36 #include <asm/scatterlist.h>
  37
  38 #include "meth.h"
  39
  40 #ifndef MFE_DEBUG
  41 #define MFE_DEBUG 0
  42 #endif
  43
  44 #if MFE_DEBUG>=1
  45 #define DPRINTK(str,args...) printk(KERN_DEBUG "meth: %s: " str, __FUNCTION__ , ## args)
  46 #define MFE_RX_DEBUG 2
  47 #else
  48 #define DPRINTK(str,args...)
  49 #define MFE_RX_DEBUG 0
  50 #endif
  51
  52
  53 static const char *meth_str="SGI O2 Fast Ethernet";
  54
  55 #define HAVE_TX_TIMEOUT
  56 /* The maximum time waited (in jiffies) before assuming a Tx failed. (400ms) */
  57 #define TX_TIMEOUT (400*HZ/1000)
  58
  59 #ifdef HAVE_TX_TIMEOUT
  60 static int timeout = TX_TIMEOUT;
  61 module_param(timeout, int, 0);
  62 #endif
  63
  64 /*
  65  * This structure is private to each device. It is used to pass
  66  * packets in and out, so there is place for a packet
  67  */
  68 struct meth_private {
  69         /* in-memory copy of MAC Control register */
  70         unsigned long mac_ctrl;
  71         /* in-memory copy of DMA Control register */
  72         unsigned long dma_ctrl;
  73         /* address of PHY, used by mdio_* functions, initialized in mdio_probe */
  74         unsigned long phy_addr;
  75         tx_packet *tx_ring;
  76         dma_addr_t tx_ring_dma;
  77         struct sk_buff *tx_skbs[TX_RING_ENTRIES];
  78         dma_addr_t tx_skb_dmas[TX_RING_ENTRIES];
  79         unsigned long tx_read, tx_write, tx_count;
  80
  81         rx_packet *rx_ring[RX_RING_ENTRIES];
  82         dma_addr_t rx_ring_dmas[RX_RING_ENTRIES];
  83         struct sk_buff *rx_skbs[RX_RING_ENTRIES];
  84         unsigned long rx_write;
  85
  86         spinlock_t meth_lock;
  87 };
  88
  89 static void meth_tx_timeout(struct net_device *dev);
  90 static irqreturn_t meth_interrupt(int irq, void *dev_id);
  91
  92 /* global, initialized in ip32-setup.c */
  93 char o2meth_eaddr[8]={0,0,0,0,0,0,0,0};
  94
  95 static inline void load_eaddr(struct net_device *dev)
  96 {
  97         int i;
  98         DECLARE_MAC_BUF(mac);
  99
 100         for (i = 0; i < 6; i++)
 101                 dev->dev_addr[i] = o2meth_eaddr[i];
 102         DPRINTK("Loading MAC Address: %s\n", print_mac(mac, dev->dev_addr));
 103         mace->eth.mac_addr = (*(unsigned long*)o2meth_eaddr) >> 16;
 104 }
 105
 106 /*
 107  * Waits for BUSY status of mdio bus to clear
 108  */
 109 #define WAIT_FOR_PHY(___rval)                                   \
 110         while ((___rval = mace->eth.phy_data) & MDIO_BUSY) {    \
 111                 udelay(25);                                     \
 112         }
 113 /*read phy register, return value read */
 114 static unsigned long mdio_read(struct meth_private *priv, unsigned long phyreg)
 115 {
 116         unsigned long rval;
 117         WAIT_FOR_PHY(rval);
 118         mace->eth.phy_regs = (priv->phy_addr << 5) | (phyreg & 0x1f);
 119         udelay(25);
 120         mace->eth.phy_trans_go = 1;
 121         udelay(25);
 122         WAIT_FOR_PHY(rval);
 123         return rval & MDIO_DATA_MASK;
 124 }
 125
 126 static int mdio_probe(struct meth_private *priv)
 127 {
 128         int i;
 129         unsigned long p2, p3;
 130         /* check if phy is detected already */
 131         if(priv->phy_addr>=0&&priv->phy_addr<32)
 132                 return 0;
 133         spin_lock(&priv->meth_lock);
 134         for (i=0;i<32;++i){
 135                 priv->phy_addr=i;
 136                 p2=mdio_read(priv,2);
 137                 p3=mdio_read(priv,3);
 138 #if MFE_DEBUG>=2
 139                 switch ((p2<<12)|(p3>>4)){
 140                 case PHY_QS6612X:
 141                         DPRINTK("PHY is QS6612X\n");
 142                         break;
 143                 case PHY_ICS1889:
 144                         DPRINTK("PHY is ICS1889\n");
 145                         break;
 146                 case PHY_ICS1890:
 147                         DPRINTK("PHY is ICS1890\n");
 148                         break;
 149                 case PHY_DP83840:
 150                         DPRINTK("PHY is DP83840\n");
 151                         break;
 152                 }
 153 #endif
 154                 if(p2!=0xffff&&p2!=0x0000){
 155                         DPRINTK("PHY code: %x\n",(p2<<12)|(p3>>4));
 156                         break;
 157                 }
 158         }
 159         spin_unlock(&priv->meth_lock);
 160         if(priv->phy_addr<32) {
 161                 return 0;
 162         }
 163         DPRINTK("Oopsie! PHY is not known!\n");
 164         priv->phy_addr=-1;
 165         return -ENODEV;
 166 }
 167
 168 static void meth_check_link(struct net_device *dev)
 169 {
 170         struct meth_private *priv = netdev_priv(dev);
 171         unsigned long mii_advertising = mdio_read(priv, 4);
 172         unsigned long mii_partner = mdio_read(priv, 5);
 173         unsigned long negotiated = mii_advertising & mii_partner;
 174         unsigned long duplex, speed;
 175
 176         if (mii_partner == 0xffff)
 177                 return;
 178
 179         speed = (negotiated & 0x0380) ? METH_100MBIT : 0;
 180         duplex = ((negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040) ?
 181                  METH_PHY_FDX : 0;
 182
 183         if ((priv->mac_ctrl & METH_PHY_FDX) ^ duplex) {
 184                 DPRINTK("Setting %s-duplex\n", duplex ? "full" : "half");
 185                 if (duplex)
 186                         priv->mac_ctrl |= METH_PHY_FDX;
 187                 else
 188                         priv->mac_ctrl &= ~METH_PHY_FDX;
 189                 mace->eth.mac_ctrl = priv->mac_ctrl;
 190         }
 191
 192         if ((priv->mac_ctrl & METH_100MBIT) ^ speed) {
 193                 DPRINTK("Setting %dMbs mode\n", speed ? 100 : 10);
 194                 if (duplex)
 195                         priv->mac_ctrl |= METH_100MBIT;
 196                 else
 197                         priv->mac_ctrl &= ~METH_100MBIT;
 198                 mace->eth.mac_ctrl = priv->mac_ctrl;
 199         }
 200 }
 201
 202
 203 static int meth_init_tx_ring(struct meth_private *priv)
 204 {
 205         /* Init TX ring */
 206         priv->tx_ring = dma_alloc_coherent(NULL, TX_RING_BUFFER_SIZE,
 207                                            &priv->tx_ring_dma, GFP_ATOMIC);
 208         if (!priv->tx_ring)
 209                 return -ENOMEM;
 210         memset(priv->tx_ring, 0, TX_RING_BUFFER_SIZE);
 211         priv->tx_count = priv->tx_read = priv->tx_write = 0;
 212         mace->eth.tx_ring_base = priv->tx_ring_dma;
 213         /* Now init skb save area */
 214         memset(priv->tx_skbs, 0, sizeof(priv->tx_skbs));
 215         memset(priv->tx_skb_dmas, 0, sizeof(priv->tx_skb_dmas));
 216         return 0;
 217 }
 218
 219 static int meth_init_rx_ring(struct meth_private *priv)
 220 {
 221         int i;
 222
 223         for (i = 0; i < RX_RING_ENTRIES; i++) {
 224                 priv->rx_skbs[i] = alloc_skb(METH_RX_BUFF_SIZE, 0);
 225                 /* 8byte status vector + 3quad padding + 2byte padding,
 226                  * to put data on 64bit aligned boundary */
 227                 skb_reserve(priv->rx_skbs[i],METH_RX_HEAD);
 228                 priv->rx_ring[i]=(rx_packet*)(priv->rx_skbs[i]->head);
 229                 /* I'll need to re-sync it after each RX */
 230                 priv->rx_ring_dmas[i] =
 231                         dma_map_single(NULL, priv->rx_ring[i],
 232                                        METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 233                 mace->eth.rx_fifo = priv->rx_ring_dmas[i];
 234         }
 235         priv->rx_write = 0;
 236         return 0;
 237 }
 238 static void meth_free_tx_ring(struct meth_private *priv)
 239 {
 240         int i;
 241
 242         /* Remove any pending skb */
 243         for (i = 0; i < TX_RING_ENTRIES; i++) {
 244                 if (priv->tx_skbs[i])
 245                         dev_kfree_skb(priv->tx_skbs[i]);
 246                 priv->tx_skbs[i] = NULL;
 247         }
 248         dma_free_coherent(NULL, TX_RING_BUFFER_SIZE, priv->tx_ring,
 249                           priv->tx_ring_dma);
 250 }
 251
 252 /* Presumes RX DMA engine is stopped, and RX fifo ring is reset */
 253 static void meth_free_rx_ring(struct meth_private *priv)
 254 {
 255         int i;
 256
 257         for (i = 0; i < RX_RING_ENTRIES; i++) {
 258                 dma_unmap_single(NULL, priv->rx_ring_dmas[i],
 259                                  METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 260                 priv->rx_ring[i] = 0;
 261                 priv->rx_ring_dmas[i] = 0;
 262                 kfree_skb(priv->rx_skbs[i]);
 263         }
 264 }
 265
 266 int meth_reset(struct net_device *dev)
 267 {
 268         struct meth_private *priv = netdev_priv(dev);
 269
 270         /* Reset card */
 271         mace->eth.mac_ctrl = SGI_MAC_RESET;
 272         udelay(1);
 273         mace->eth.mac_ctrl = 0;
 274         udelay(25);
 275
 276         /* Load ethernet address */
 277         load_eaddr(dev);
 278         /* Should load some "errata", but later */
 279
 280         /* Check for device */
 281         if (mdio_probe(priv) < 0) {
 282                 DPRINTK("Unable to find PHY\n");
 283                 return -ENODEV;
 284         }
 285
 286         /* Initial mode: 10 | Half-duplex | Accept normal packets */
 287         priv->mac_ctrl = METH_ACCEPT_MCAST | METH_DEFAULT_IPG;
 288         if (dev->flags | IFF_PROMISC)
 289                 priv->mac_ctrl |= METH_PROMISC;
 290         mace->eth.mac_ctrl = priv->mac_ctrl;
 291
 292         /* Autonegotiate speed and duplex mode */
 293         meth_check_link(dev);
 294
 295         /* Now set dma control, but don't enable DMA, yet */
 296         priv->dma_ctrl = (4 << METH_RX_OFFSET_SHIFT) |
 297                          (RX_RING_ENTRIES << METH_RX_DEPTH_SHIFT);
 298         mace->eth.dma_ctrl = priv->dma_ctrl;
 299
 300         return 0;
 301 }
 302
 303 /*============End Helper Routines=====================*/
 304
 305 /*
 306  * Open and close
 307  */
 308 static int meth_open(struct net_device *dev)
 309 {
 310         struct meth_private *priv = netdev_priv(dev);
 311         int ret;
 312
 313         priv->phy_addr = -1;    /* No PHY is known yet... */
 314
 315         /* Initialize the hardware */
 316         ret = meth_reset(dev);
 317         if (ret < 0)
 318                 return ret;
 319
 320         /* Allocate the ring buffers */
 321         ret = meth_init_tx_ring(priv);
 322         if (ret < 0)
 323                 return ret;
 324         ret = meth_init_rx_ring(priv);
 325         if (ret < 0)
 326                 goto out_free_tx_ring;
 327
 328         ret = request_irq(dev->irq, meth_interrupt, 0, meth_str, dev);
 329         if (ret) {
 330                 printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq);
 331                 goto out_free_rx_ring;
 332         }
 333
 334         /* Start DMA */
 335         priv->dma_ctrl |= METH_DMA_TX_EN | /*METH_DMA_TX_INT_EN |*/
 336                           METH_DMA_RX_EN | METH_DMA_RX_INT_EN;
 337         mace->eth.dma_ctrl = priv->dma_ctrl;
 338
 339         DPRINTK("About to start queue\n");
 340         netif_start_queue(dev);
 341
 342         return 0;
 343
 344 out_free_rx_ring:
 345         meth_free_rx_ring(priv);
 346 out_free_tx_ring:
 347         meth_free_tx_ring(priv);
 348
 349         return ret;
 350 }
 351
 352 static int meth_release(struct net_device *dev)
 353 {
 354         struct meth_private *priv = netdev_priv(dev);
 355
 356         DPRINTK("Stopping queue\n");
 357         netif_stop_queue(dev); /* can't transmit any more */
 358         /* shut down DMA */
 359         priv->dma_ctrl &= ~(METH_DMA_TX_EN | METH_DMA_TX_INT_EN |
 360                             METH_DMA_RX_EN | METH_DMA_RX_INT_EN);
 361         mace->eth.dma_ctrl = priv->dma_ctrl;
 362         free_irq(dev->irq, dev);
 363         meth_free_tx_ring(priv);
 364         meth_free_rx_ring(priv);
 365
 366         return 0;
 367 }
 368
 369 /*
 370  * Receive a packet: retrieve, encapsulate and pass over to upper levels
 371  */
 372 static void meth_rx(struct net_device* dev, unsigned long int_status)
 373 {
 374         struct sk_buff *skb;
 375         unsigned long status;
 376         struct meth_private *priv = netdev_priv(dev);
 377         unsigned long fifo_rptr = (int_status & METH_INT_RX_RPTR_MASK) >> 8;
 378
 379         spin_lock(&priv->meth_lock);
 380         priv->dma_ctrl &= ~METH_DMA_RX_INT_EN;
 381         mace->eth.dma_ctrl = priv->dma_ctrl;
 382         spin_unlock(&priv->meth_lock);
 383
 384         if (int_status & METH_INT_RX_UNDERFLOW) {
 385                 fifo_rptr = (fifo_rptr - 1) & 0x0f;
 386         }
 387         while (priv->rx_write != fifo_rptr) {
 388                 dma_unmap_single(NULL, priv->rx_ring_dmas[priv->rx_write],
 389                                  METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 390                 status = priv->rx_ring[priv->rx_write]->status.raw;
 391 #if MFE_DEBUG
 392                 if (!(status & METH_RX_ST_VALID)) {
 393                         DPRINTK("Not received? status=%016lx\n",status);
 394                 }
 395 #endif
 396                 if ((!(status & METH_RX_STATUS_ERRORS)) && (status & METH_RX_ST_VALID)) {
 397                         int len = (status & 0xffff) - 4; /* omit CRC */
 398                         /* length sanity check */
 399                         if (len < 60 || len > 1518) {
 400                                 printk(KERN_DEBUG "%s: bogus packet size: %ld, status=%#2lx.\n",
 401                                        dev->name, priv->rx_write,
 402                                        priv->rx_ring[priv->rx_write]->status.raw);
 403                                 dev->stats.rx_errors++;
 404                                 dev->stats.rx_length_errors++;
 405                                 skb = priv->rx_skbs[priv->rx_write];
 406                         } else {
 407                                 skb = alloc_skb(METH_RX_BUFF_SIZE, GFP_ATOMIC);
 408                                 if (!skb) {
 409                                         /* Ouch! No memory! Drop packet on the floor */
 410                                         DPRINTK("No mem: dropping packet\n");
 411                                         dev->stats.rx_dropped++;
 412                                         skb = priv->rx_skbs[priv->rx_write];
 413                                 } else {
 414                                         struct sk_buff *skb_c = priv->rx_skbs[priv->rx_write];
 415                                         /* 8byte status vector + 3quad padding + 2byte padding,
 416                                          * to put data on 64bit aligned boundary */
 417                                         skb_reserve(skb, METH_RX_HEAD);
 418                                         /* Write metadata, and then pass to the receive level */
 419                                         skb_put(skb_c, len);
 420                                         priv->rx_skbs[priv->rx_write] = skb;
 421                                         skb_c->protocol = eth_type_trans(skb_c, dev);
 422                                         dev->last_rx = jiffies;
 423                                         dev->stats.rx_packets++;
 424                                         dev->stats.rx_bytes += len;
 425                                         netif_rx(skb_c);
 426                                 }
 427                         }
 428                 } else {
 429                         dev->stats.rx_errors++;
 430                         skb=priv->rx_skbs[priv->rx_write];
 431 #if MFE_DEBUG>0
 432                         printk(KERN_WARNING "meth: RX error: status=0x%016lx\n",status);
 433                         if(status&METH_RX_ST_RCV_CODE_VIOLATION)
 434                                 printk(KERN_WARNING "Receive Code Violation\n");
 435                         if(status&METH_RX_ST_CRC_ERR)
 436                                 printk(KERN_WARNING "CRC error\n");
 437                         if(status&METH_RX_ST_INV_PREAMBLE_CTX)
 438                                 printk(KERN_WARNING "Invalid Preamble Context\n");
 439                         if(status&METH_RX_ST_LONG_EVT_SEEN)
 440                                 printk(KERN_WARNING "Long Event Seen...\n");
 441                         if(status&METH_RX_ST_BAD_PACKET)
 442                                 printk(KERN_WARNING "Bad Packet\n");
 443                         if(status&METH_RX_ST_CARRIER_EVT_SEEN)
 444                                 printk(KERN_WARNING "Carrier Event Seen\n");
 445 #endif
 446                 }
 447                 priv->rx_ring[priv->rx_write] = (rx_packet*)skb->head;
 448                 priv->rx_ring[priv->rx_write]->status.raw = 0;
 449                 priv->rx_ring_dmas[priv->rx_write] =
 450                         dma_map_single(NULL, priv->rx_ring[priv->rx_write],
 451                                        METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
 452                 mace->eth.rx_fifo = priv->rx_ring_dmas[priv->rx_write];
 453                 ADVANCE_RX_PTR(priv->rx_write);
 454         }
 455         spin_lock(&priv->meth_lock);
 456         /* In case there was underflow, and Rx DMA was disabled */
 457         priv->dma_ctrl |= METH_DMA_RX_INT_EN | METH_DMA_RX_EN;
 458         mace->eth.dma_ctrl = priv->dma_ctrl;
 459         mace->eth.int_stat = METH_INT_RX_THRESHOLD;
 460         spin_unlock(&priv->meth_lock);
 461 }
 462
 463 static int meth_tx_full(struct net_device *dev)
 464 {
 465         struct meth_private *priv = netdev_priv(dev);
 466
 467         return (priv->tx_count >= TX_RING_ENTRIES - 1);
 468 }
 469
 470 static void meth_tx_cleanup(struct net_device* dev, unsigned long int_status)
 471 {
 472         struct meth_private *priv = netdev_priv(dev);
 473         unsigned long status;
 474         struct sk_buff *skb;
 475         unsigned long rptr = (int_status&TX_INFO_RPTR) >> 16;
 476
 477         spin_lock(&priv->meth_lock);
 478
 479         /* Stop DMA notification */
 480         priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN);
 481         mace->eth.dma_ctrl = priv->dma_ctrl;
 482
 483         while (priv->tx_read != rptr) {
 484                 skb = priv->tx_skbs[priv->tx_read];
 485                 status = priv->tx_ring[priv->tx_read].header.raw;
 486 #if MFE_DEBUG>=1
 487                 if (priv->tx_read == priv->tx_write)
 488                         DPRINTK("Auchi! tx_read=%d,tx_write=%d,rptr=%d?\n", priv->tx_read, priv->tx_write,rptr);
 489 #endif
 490                 if (status & METH_TX_ST_DONE) {
 491                         if (status & METH_TX_ST_SUCCESS){
 492                                 dev->stats.tx_packets++;
 493                                 dev->stats.tx_bytes += skb->len;
 494                         } else {
 495                                 dev->stats.tx_errors++;
 496 #if MFE_DEBUG>=1
 497                                 DPRINTK("TX error: status=%016lx <",status);
 498                                 if(status & METH_TX_ST_SUCCESS)
 499                                         printk(" SUCCESS");
 500                                 if(status & METH_TX_ST_TOOLONG)
 501                                         printk(" TOOLONG");
 502                                 if(status & METH_TX_ST_UNDERRUN)
 503                                         printk(" UNDERRUN");
 504                                 if(status & METH_TX_ST_EXCCOLL)
 505                                         printk(" EXCCOLL");
 506                                 if(status & METH_TX_ST_DEFER)
 507                                         printk(" DEFER");
 508                                 if(status & METH_TX_ST_LATECOLL)
 509                                         printk(" LATECOLL");
 510                                 printk(" >\n");
 511 #endif
 512                         }
 513                 } else {
 514                         DPRINTK("RPTR points us here, but packet not done?\n");
 515                         break;
 516                 }
 517                 dev_kfree_skb_irq(skb);
 518                 priv->tx_skbs[priv->tx_read] = NULL;
 519                 priv->tx_ring[priv->tx_read].header.raw = 0;
 520                 priv->tx_read = (priv->tx_read+1)&(TX_RING_ENTRIES-1);
 521                 priv->tx_count--;
 522         }
 523
 524         /* wake up queue if it was stopped */
 525         if (netif_queue_stopped(dev) && !meth_tx_full(dev)) {
 526                 netif_wake_queue(dev);
 527         }
 528
 529         mace->eth.int_stat = METH_INT_TX_EMPTY | METH_INT_TX_PKT;
 530         spin_unlock(&priv->meth_lock);
 531 }
 532
 533 static void meth_error(struct net_device* dev, unsigned status)
 534 {
 535         struct meth_private *priv = netdev_priv(dev);
 536
 537         printk(KERN_WARNING "meth: error status: 0x%08x\n",status);
 538         /* check for errors too... */
 539         if (status & (METH_INT_TX_LINK_FAIL))
 540                 printk(KERN_WARNING "meth: link failure\n");
 541         /* Should I do full reset in this case? */
 542         if (status & (METH_INT_MEM_ERROR))
 543                 printk(KERN_WARNING "meth: memory error\n");
 544         if (status & (METH_INT_TX_ABORT))
 545                 printk(KERN_WARNING "meth: aborted\n");
 546         if (status & (METH_INT_RX_OVERFLOW))
 547                 printk(KERN_WARNING "meth: Rx overflow\n");
 548         if (status & (METH_INT_RX_UNDERFLOW)) {
 549                 printk(KERN_WARNING "meth: Rx underflow\n");
 550                 spin_lock(&priv->meth_lock);
 551                 mace->eth.int_stat = METH_INT_RX_UNDERFLOW;
 552                 /* more underflow interrupts will be delivered,
 553                  * effectively throwing us into an infinite loop.
 554                  *  Thus I stop processing Rx in this case. */
 555                 priv->dma_ctrl &= ~METH_DMA_RX_EN;
 556                 mace->eth.dma_ctrl = priv->dma_ctrl;
 557                 DPRINTK("Disabled meth Rx DMA temporarily\n");
 558                 spin_unlock(&priv->meth_lock);
 559         }
 560         mace->eth.int_stat = METH_INT_ERROR;
 561 }
 562
 563 /*
 564  * The typical interrupt entry point
 565  */
 566 static irqreturn_t meth_interrupt(int irq, void *dev_id)
 567 {
 568         struct net_device *dev = (struct net_device *)dev_id;
 569         struct meth_private *priv = netdev_priv(dev);
 570         unsigned long status;
 571
 572         status = mace->eth.int_stat;
 573         while (status & 0xff) {
 574                 /* First handle errors - if we get Rx underflow,
 575                  * Rx DMA will be disabled, and Rx handler will reenable
 576                  * it. I don't think it's possible to get Rx underflow,
 577                  * without getting Rx interrupt */
 578                 if (status & METH_INT_ERROR) {
 579                         meth_error(dev, status);
 580                 }
 581                 if (status & (METH_INT_TX_EMPTY | METH_INT_TX_PKT)) {
 582                         /* a transmission is over: free the skb */
 583                         meth_tx_cleanup(dev, status);
 584                 }
 585                 if (status & METH_INT_RX_THRESHOLD) {
 586                         if (!(priv->dma_ctrl & METH_DMA_RX_INT_EN))
 587                                 break;
 588                         /* send it to meth_rx for handling */
 589                         meth_rx(dev, status);
 590                 }
 591                 status = mace->eth.int_stat;
 592         }
 593
 594         return IRQ_HANDLED;
 595 }
 596
 597 /*
 598  * Transmits packets that fit into TX descriptor (are <=120B)
 599  */
 600 static void meth_tx_short_prepare(struct meth_private *priv,
 601                                   struct sk_buff *skb)
 602 {
 603         tx_packet *desc = &priv->tx_ring[priv->tx_write];
 604         int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
 605
 606         desc->header.raw = METH_TX_CMD_INT_EN | (len-1) | ((128-len) << 16);
 607         /* maybe I should set whole thing to 0 first... */
 608         skb_copy_from_linear_data(skb, desc->data.dt + (120 - len), skb->len);
 609         if (skb->len < len)
 610                 memset(desc->data.dt + 120 - len + skb->len, 0, len-skb->len);
 611 }
 612 #define TX_CATBUF1 BIT(25)
 613 static void meth_tx_1page_prepare(struct meth_private *priv,
 614                                   struct sk_buff *skb)
 615 {
 616         tx_packet *desc = &priv->tx_ring[priv->tx_write];
 617         void *buffer_data = (void *)(((unsigned long)skb->data + 7) & ~7);
 618         int unaligned_len = (int)((unsigned long)buffer_data - (unsigned long)skb->data);
 619         int buffer_len = skb->len - unaligned_len;
 620         dma_addr_t catbuf;
 621
 622         desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | (skb->len - 1);
 623
 624         /* unaligned part */
 625         if (unaligned_len) {
 626                 skb_copy_from_linear_data(skb, desc->data.dt + (120 - unaligned_len),
 627                               unaligned_len);
 628                 desc->header.raw |= (128 - unaligned_len) << 16;
 629         }
 630
 631         /* first page */
 632         catbuf = dma_map_single(NULL, buffer_data, buffer_len,
 633                                 DMA_TO_DEVICE);
 634         desc->data.cat_buf[0].form.start_addr = catbuf >> 3;
 635         desc->data.cat_buf[0].form.len = buffer_len - 1;
 636 }
 637 #define TX_CATBUF2 BIT(26)
 638 static void meth_tx_2page_prepare(struct meth_private *priv,
 639                                   struct sk_buff *skb)
 640 {
 641         tx_packet *desc = &priv->tx_ring[priv->tx_write];
 642         void *buffer1_data = (void *)(((unsigned long)skb->data + 7) & ~7);
 643         void *buffer2_data = (void *)PAGE_ALIGN((unsigned long)skb->data);
 644         int unaligned_len = (int)((unsigned long)buffer1_data - (unsigned long)skb->data);
 645         int buffer1_len = (int)((unsigned long)buffer2_data - (unsigned long)buffer1_data);
 646         int buffer2_len = skb->len - buffer1_len - unaligned_len;
 647         dma_addr_t catbuf1, catbuf2;
 648
 649         desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | TX_CATBUF2| (skb->len - 1);
 650         /* unaligned part */
 651         if (unaligned_len){
 652                 skb_copy_from_linear_data(skb, desc->data.dt + (120 - unaligned_len),
 653                               unaligned_len);
 654                 desc->header.raw |= (128 - unaligned_len) << 16;
 655         }
 656
 657         /* first page */
 658         catbuf1 = dma_map_single(NULL, buffer1_data, buffer1_len,
 659                                  DMA_TO_DEVICE);
 660         desc->data.cat_buf[0].form.start_addr = catbuf1 >> 3;
 661         desc->data.cat_buf[0].form.len = buffer1_len - 1;
 662         /* second page */
 663         catbuf2 = dma_map_single(NULL, buffer2_data, buffer2_len,
 664                                  DMA_TO_DEVICE);
 665         desc->data.cat_buf[1].form.start_addr = catbuf2 >> 3;
 666         desc->data.cat_buf[1].form.len = buffer2_len - 1;
 667 }
 668
 669 static void meth_add_to_tx_ring(struct meth_private *priv, struct sk_buff *skb)
 670 {
 671         /* Remember the skb, so we can free it at interrupt time */
 672         priv->tx_skbs[priv->tx_write] = skb;
 673         if (skb->len <= 120) {
 674                 /* Whole packet fits into descriptor */
 675                 meth_tx_short_prepare(priv, skb);
 676         } else if (PAGE_ALIGN((unsigned long)skb->data) !=
 677                    PAGE_ALIGN((unsigned long)skb->data + skb->len - 1)) {
 678                 /* Packet crosses page boundary */
 679                 meth_tx_2page_prepare(priv, skb);
 680         } else {
 681                 /* Packet is in one page */
 682                 meth_tx_1page_prepare(priv, skb);
 683         }
 684         priv->tx_write = (priv->tx_write + 1) & (TX_RING_ENTRIES - 1);
 685         mace->eth.tx_info = priv->tx_write;
 686         priv->tx_count++;
 687 }
 688
 689 /*
 690  * Transmit a packet (called by the kernel)
 691  */
 692 static int meth_tx(struct sk_buff *skb, struct net_device *dev)
 693 {
 694         struct meth_private *priv = netdev_priv(dev);
 695         unsigned long flags;
 696
 697         spin_lock_irqsave(&priv->meth_lock, flags);
 698         /* Stop DMA notification */
 699         priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN);
 700         mace->eth.dma_ctrl = priv->dma_ctrl;
 701
 702         meth_add_to_tx_ring(priv, skb);
 703         dev->trans_start = jiffies; /* save the timestamp */
 704
 705         /* If TX ring is full, tell the upper layer to stop sending packets */
 706         if (meth_tx_full(dev)) {
 707                 printk(KERN_DEBUG "TX full: stopping\n");
 708                 netif_stop_queue(dev);
 709         }
 710
 711         /* Restart DMA notification */
 712         priv->dma_ctrl |= METH_DMA_TX_INT_EN;
 713         mace->eth.dma_ctrl = priv->dma_ctrl;
 714
 715         spin_unlock_irqrestore(&priv->meth_lock, flags);
 716
 717         return 0;
 718 }
 719
 720 /*
 721  * Deal with a transmit timeout.
 722  */
 723 static void meth_tx_timeout(struct net_device *dev)
 724 {
 725         struct meth_private *priv = netdev_priv(dev);
 726         unsigned long flags;
 727
 728         printk(KERN_WARNING "%s: transmit timed out\n", dev->name);
 729
 730         /* Protect against concurrent rx interrupts */
 731         spin_lock_irqsave(&priv->meth_lock,flags);
 732
 733         /* Try to reset the interface. */
 734         meth_reset(dev);
 735
 736         dev->stats.tx_errors++;
 737
 738         /* Clear all rings */
 739         meth_free_tx_ring(priv);
 740         meth_free_rx_ring(priv);
 741         meth_init_tx_ring(priv);
 742         meth_init_rx_ring(priv);
 743
 744         /* Restart dma */
 745         priv->dma_ctrl |= METH_DMA_TX_EN | METH_DMA_RX_EN | METH_DMA_RX_INT_EN;
 746         mace->eth.dma_ctrl = priv->dma_ctrl;
 747
 748         /* Enable interrupt */
 749         spin_unlock_irqrestore(&priv->meth_lock, flags);
 750
 751         dev->trans_start = jiffies;
 752         netif_wake_queue(dev);
 753
 754         return;
 755 }
 756
 757 /*
 758  * Ioctl commands
 759  */
 760 static int meth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 761 {
 762         /* XXX Not yet implemented */
 763         switch(cmd) {
 764         case SIOCGMIIPHY:
 765         case SIOCGMIIREG:
 766         case SIOCSMIIREG:
 767         default:
 768                 return -EOPNOTSUPP;
 769         }
 770 }
 771
 772 /*
 773  * Return statistics to the caller
 774  */
 775 /*
 776  * The init function.
 777  */
 778 static int __init meth_probe(struct platform_device *pdev)
 779 {
 780         struct net_device *dev;
 781         struct meth_private *priv;
 782         int err;
 783
 784         dev = alloc_etherdev(sizeof(struct meth_private));
 785         if (!dev)
 786                 return -ENOMEM;
 787
 788         dev->open            = meth_open;
 789         dev->stop            = meth_release;
 790         dev->hard_start_xmit = meth_tx;
 791         dev->do_ioctl        = meth_ioctl;
 792 #ifdef HAVE_TX_TIMEOUT
 793         dev->tx_timeout      = meth_tx_timeout;
 794         dev->watchdog_timeo  = timeout;
 795 #endif
 796         dev->irq             = MACE_ETHERNET_IRQ;
 797         dev->base_addr       = (unsigned long)&mace->eth;
 798
 799         priv = netdev_priv(dev);
 800         spin_lock_init(&priv->meth_lock);
 801         SET_NETDEV_DEV(dev, &pdev->dev);
 802
 803         err = register_netdev(dev);
 804         if (err) {
 805                 free_netdev(dev);
 806                 return err;
 807         }
 808
 809         printk(KERN_INFO "%s: SGI MACE Ethernet rev. %d\n",
 810                dev->name, (unsigned int)(mace->eth.mac_ctrl >> 29));
 811         return 0;
 812 }
 813
 814 static int __exit meth_remove(struct platform_device *pdev)
 815 {
 816         struct net_device *dev = platform_get_drvdata(pdev);
 817
 818         unregister_netdev(dev);
 819         free_netdev(dev);
 820         platform_set_drvdata(pdev, NULL);
 821
 822         return 0;
 823 }
 824
 825 static struct platform_driver meth_driver = {
 826         .probe  = meth_probe,
 827         .remove = __devexit_p(meth_remove),
 828         .driver = {
 829                 .name   = "meth",
 830         }
 831 };
 832
 833 static int __init meth_init_module(void)
 834 {
 835         int err;
 836
 837         err = platform_driver_register(&meth_driver);
 838         if (err)
 839                 printk(KERN_ERR "Driver registration failed\n");
 840
 841         return err;
 842 }
 843
 844 static void __exit meth_exit_module(void)
 845 {
 846         platform_driver_unregister(&meth_driver);
 847 }
 848
 849 module_init(meth_init_module);
 850 module_exit(meth_exit_module);
 851
 852 MODULE_AUTHOR("Ilya Volynets <ilya@theIlya.com>");
 853 MODULE_DESCRIPTION("SGI O2 Builtin Fast Ethernet driver");
 854 MODULE_LICENSE("GPL");