2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/errno.h>
39 #include <linux/pci.h>
40 #include <linux/dma-mapping.h>
42 #include <linux/mlx4/device.h>
43 #include <linux/mlx4/doorbell.h>
49 MODULE_AUTHOR("Roland Dreier");
50 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
51 MODULE_LICENSE("Dual BSD/GPL");
52 MODULE_VERSION(DRV_VERSION
);
54 #ifdef CONFIG_MLX4_DEBUG
56 int mlx4_debug_level
= 0;
57 module_param_named(debug_level
, mlx4_debug_level
, int, 0644);
58 MODULE_PARM_DESC(debug_level
, "Enable debug tracing if > 0");
60 #endif /* CONFIG_MLX4_DEBUG */
65 module_param(msi_x
, int, 0444);
66 MODULE_PARM_DESC(msi_x
, "attempt to use MSI-X if nonzero");
68 #else /* CONFIG_PCI_MSI */
72 #endif /* CONFIG_PCI_MSI */
74 static char mlx4_version
[] __devinitdata
=
75 DRV_NAME
": Mellanox ConnectX core driver v"
76 DRV_VERSION
" (" DRV_RELDATE
")\n";
78 static struct mlx4_profile default_profile
= {
81 .rdmarc_per_qp
= 1 << 4,
88 static int log_num_mac
= 2;
89 module_param_named(log_num_mac
, log_num_mac
, int, 0444);
90 MODULE_PARM_DESC(log_num_mac
, "Log2 max number of MACs per ETH port (1-7)");
92 static int log_num_vlan
;
93 module_param_named(log_num_vlan
, log_num_vlan
, int, 0444);
94 MODULE_PARM_DESC(log_num_vlan
, "Log2 max number of VLANs per ETH port (0-7)");
97 module_param_named(use_prio
, use_prio
, bool, 0444);
98 MODULE_PARM_DESC(use_prio
, "Enable steering by VLAN priority on ETH ports "
101 static int mlx4_check_port_params(struct mlx4_dev
*dev
,
102 enum mlx4_port_type
*port_type
)
106 for (i
= 0; i
< dev
->caps
.num_ports
- 1; i
++) {
107 if (port_type
[i
] != port_type
[i
+1] &&
108 !(dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
)) {
109 mlx4_err(dev
, "Only same port types supported "
110 "on this HCA, aborting.\n");
114 if ((port_type
[0] == MLX4_PORT_TYPE_ETH
) &&
115 (port_type
[1] == MLX4_PORT_TYPE_IB
)) {
116 mlx4_err(dev
, "eth-ib configuration is not supported.\n");
120 for (i
= 0; i
< dev
->caps
.num_ports
; i
++) {
121 if (!(port_type
[i
] & dev
->caps
.supported_type
[i
+1])) {
122 mlx4_err(dev
, "Requested port type for port %d is not "
123 "supported on this HCA\n", i
+ 1);
130 static void mlx4_set_port_mask(struct mlx4_dev
*dev
)
134 dev
->caps
.port_mask
= 0;
135 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
)
136 if (dev
->caps
.port_type
[i
] == MLX4_PORT_TYPE_IB
)
137 dev
->caps
.port_mask
|= 1 << (i
- 1);
139 static int mlx4_dev_cap(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
)
144 err
= mlx4_QUERY_DEV_CAP(dev
, dev_cap
);
146 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
150 if (dev_cap
->min_page_sz
> PAGE_SIZE
) {
151 mlx4_err(dev
, "HCA minimum page size of %d bigger than "
152 "kernel PAGE_SIZE of %ld, aborting.\n",
153 dev_cap
->min_page_sz
, PAGE_SIZE
);
156 if (dev_cap
->num_ports
> MLX4_MAX_PORTS
) {
157 mlx4_err(dev
, "HCA has %d ports, but we only support %d, "
159 dev_cap
->num_ports
, MLX4_MAX_PORTS
);
163 if (dev_cap
->uar_size
> pci_resource_len(dev
->pdev
, 2)) {
164 mlx4_err(dev
, "HCA reported UAR size of 0x%x bigger than "
165 "PCI resource 2 size of 0x%llx, aborting.\n",
167 (unsigned long long) pci_resource_len(dev
->pdev
, 2));
171 dev
->caps
.num_ports
= dev_cap
->num_ports
;
172 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
173 dev
->caps
.vl_cap
[i
] = dev_cap
->max_vl
[i
];
174 dev
->caps
.ib_mtu_cap
[i
] = dev_cap
->ib_mtu
[i
];
175 dev
->caps
.gid_table_len
[i
] = dev_cap
->max_gids
[i
];
176 dev
->caps
.pkey_table_len
[i
] = dev_cap
->max_pkeys
[i
];
177 dev
->caps
.port_width_cap
[i
] = dev_cap
->max_port_width
[i
];
178 dev
->caps
.eth_mtu_cap
[i
] = dev_cap
->eth_mtu
[i
];
179 dev
->caps
.def_mac
[i
] = dev_cap
->def_mac
[i
];
180 dev
->caps
.supported_type
[i
] = dev_cap
->supported_port_types
[i
];
183 dev
->caps
.num_uars
= dev_cap
->uar_size
/ PAGE_SIZE
;
184 dev
->caps
.local_ca_ack_delay
= dev_cap
->local_ca_ack_delay
;
185 dev
->caps
.bf_reg_size
= dev_cap
->bf_reg_size
;
186 dev
->caps
.bf_regs_per_page
= dev_cap
->bf_regs_per_page
;
187 dev
->caps
.max_sq_sg
= dev_cap
->max_sq_sg
;
188 dev
->caps
.max_rq_sg
= dev_cap
->max_rq_sg
;
189 dev
->caps
.max_wqes
= dev_cap
->max_qp_sz
;
190 dev
->caps
.max_qp_init_rdma
= dev_cap
->max_requester_per_qp
;
191 dev
->caps
.max_srq_wqes
= dev_cap
->max_srq_sz
;
192 dev
->caps
.max_srq_sge
= dev_cap
->max_rq_sg
- 1;
193 dev
->caps
.reserved_srqs
= dev_cap
->reserved_srqs
;
194 dev
->caps
.max_sq_desc_sz
= dev_cap
->max_sq_desc_sz
;
195 dev
->caps
.max_rq_desc_sz
= dev_cap
->max_rq_desc_sz
;
196 dev
->caps
.num_qp_per_mgm
= MLX4_QP_PER_MGM
;
198 * Subtract 1 from the limit because we need to allocate a
199 * spare CQE so the HCA HW can tell the difference between an
200 * empty CQ and a full CQ.
202 dev
->caps
.max_cqes
= dev_cap
->max_cq_sz
- 1;
203 dev
->caps
.reserved_cqs
= dev_cap
->reserved_cqs
;
204 dev
->caps
.reserved_eqs
= dev_cap
->reserved_eqs
;
205 dev
->caps
.reserved_mtts
= DIV_ROUND_UP(dev_cap
->reserved_mtts
,
206 MLX4_MTT_ENTRY_PER_SEG
);
207 dev
->caps
.reserved_mrws
= dev_cap
->reserved_mrws
;
208 dev
->caps
.reserved_uars
= dev_cap
->reserved_uars
;
209 dev
->caps
.reserved_pds
= dev_cap
->reserved_pds
;
210 dev
->caps
.mtt_entry_sz
= MLX4_MTT_ENTRY_PER_SEG
* dev_cap
->mtt_entry_sz
;
211 dev
->caps
.max_msg_sz
= dev_cap
->max_msg_sz
;
212 dev
->caps
.page_size_cap
= ~(u32
) (dev_cap
->min_page_sz
- 1);
213 dev
->caps
.flags
= dev_cap
->flags
;
214 dev
->caps
.bmme_flags
= dev_cap
->bmme_flags
;
215 dev
->caps
.reserved_lkey
= dev_cap
->reserved_lkey
;
216 dev
->caps
.stat_rate_support
= dev_cap
->stat_rate_support
;
217 dev
->caps
.max_gso_sz
= dev_cap
->max_gso_sz
;
219 dev
->caps
.log_num_macs
= log_num_mac
;
220 dev
->caps
.log_num_vlans
= log_num_vlan
;
221 dev
->caps
.log_num_prios
= use_prio
? 3 : 0;
223 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
224 if (dev
->caps
.supported_type
[i
] != MLX4_PORT_TYPE_ETH
)
225 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_IB
;
227 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_ETH
;
229 if (dev
->caps
.log_num_macs
> dev_cap
->log_max_macs
[i
]) {
230 dev
->caps
.log_num_macs
= dev_cap
->log_max_macs
[i
];
231 mlx4_warn(dev
, "Requested number of MACs is too much "
232 "for port %d, reducing to %d.\n",
233 i
, 1 << dev
->caps
.log_num_macs
);
235 if (dev
->caps
.log_num_vlans
> dev_cap
->log_max_vlans
[i
]) {
236 dev
->caps
.log_num_vlans
= dev_cap
->log_max_vlans
[i
];
237 mlx4_warn(dev
, "Requested number of VLANs is too much "
238 "for port %d, reducing to %d.\n",
239 i
, 1 << dev
->caps
.log_num_vlans
);
243 mlx4_set_port_mask(dev
);
245 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] = dev_cap
->reserved_qps
;
246 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] =
247 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] =
248 (1 << dev
->caps
.log_num_macs
) *
249 (1 << dev
->caps
.log_num_vlans
) *
250 (1 << dev
->caps
.log_num_prios
) *
252 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
] = MLX4_NUM_FEXCH
;
254 dev
->caps
.reserved_qps
= dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] +
255 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] +
256 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] +
257 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
];
263 * Change the port configuration of the device.
264 * Every user of this function must hold the port mutex.
266 static int mlx4_change_port_types(struct mlx4_dev
*dev
,
267 enum mlx4_port_type
*port_types
)
273 for (port
= 0; port
< dev
->caps
.num_ports
; port
++) {
274 if (port_types
[port
] != dev
->caps
.port_type
[port
+ 1]) {
276 dev
->caps
.port_type
[port
+ 1] = port_types
[port
];
280 mlx4_unregister_device(dev
);
281 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
282 mlx4_CLOSE_PORT(dev
, port
);
283 err
= mlx4_SET_PORT(dev
, port
);
285 mlx4_err(dev
, "Failed to set port %d, "
290 mlx4_set_port_mask(dev
);
291 err
= mlx4_register_device(dev
);
298 static ssize_t
show_port_type(struct device
*dev
,
299 struct device_attribute
*attr
,
302 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
304 struct mlx4_dev
*mdev
= info
->dev
;
306 return sprintf(buf
, "%s\n",
307 mdev
->caps
.port_type
[info
->port
] == MLX4_PORT_TYPE_IB
?
311 static ssize_t
set_port_type(struct device
*dev
,
312 struct device_attribute
*attr
,
313 const char *buf
, size_t count
)
315 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
317 struct mlx4_dev
*mdev
= info
->dev
;
318 struct mlx4_priv
*priv
= mlx4_priv(mdev
);
319 enum mlx4_port_type types
[MLX4_MAX_PORTS
];
323 if (!strcmp(buf
, "ib\n"))
324 info
->tmp_type
= MLX4_PORT_TYPE_IB
;
325 else if (!strcmp(buf
, "eth\n"))
326 info
->tmp_type
= MLX4_PORT_TYPE_ETH
;
328 mlx4_err(mdev
, "%s is not supported port type\n", buf
);
332 mutex_lock(&priv
->port_mutex
);
333 for (i
= 0; i
< mdev
->caps
.num_ports
; i
++)
334 types
[i
] = priv
->port
[i
+1].tmp_type
? priv
->port
[i
+1].tmp_type
:
335 mdev
->caps
.port_type
[i
+1];
337 err
= mlx4_check_port_params(mdev
, types
);
341 for (i
= 1; i
<= mdev
->caps
.num_ports
; i
++)
342 priv
->port
[i
].tmp_type
= 0;
344 err
= mlx4_change_port_types(mdev
, types
);
347 mutex_unlock(&priv
->port_mutex
);
348 return err
? err
: count
;
351 static int mlx4_load_fw(struct mlx4_dev
*dev
)
353 struct mlx4_priv
*priv
= mlx4_priv(dev
);
356 priv
->fw
.fw_icm
= mlx4_alloc_icm(dev
, priv
->fw
.fw_pages
,
357 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
358 if (!priv
->fw
.fw_icm
) {
359 mlx4_err(dev
, "Couldn't allocate FW area, aborting.\n");
363 err
= mlx4_MAP_FA(dev
, priv
->fw
.fw_icm
);
365 mlx4_err(dev
, "MAP_FA command failed, aborting.\n");
369 err
= mlx4_RUN_FW(dev
);
371 mlx4_err(dev
, "RUN_FW command failed, aborting.\n");
381 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
385 static int mlx4_init_cmpt_table(struct mlx4_dev
*dev
, u64 cmpt_base
,
388 struct mlx4_priv
*priv
= mlx4_priv(dev
);
391 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.cmpt_table
,
393 ((u64
) (MLX4_CMPT_TYPE_QP
*
394 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
395 cmpt_entry_sz
, dev
->caps
.num_qps
,
396 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
401 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.cmpt_table
,
403 ((u64
) (MLX4_CMPT_TYPE_SRQ
*
404 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
405 cmpt_entry_sz
, dev
->caps
.num_srqs
,
406 dev
->caps
.reserved_srqs
, 0, 0);
410 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.cmpt_table
,
412 ((u64
) (MLX4_CMPT_TYPE_CQ
*
413 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
414 cmpt_entry_sz
, dev
->caps
.num_cqs
,
415 dev
->caps
.reserved_cqs
, 0, 0);
419 err
= mlx4_init_icm_table(dev
, &priv
->eq_table
.cmpt_table
,
421 ((u64
) (MLX4_CMPT_TYPE_EQ
*
422 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
424 roundup_pow_of_two(MLX4_NUM_EQ
+
425 dev
->caps
.reserved_eqs
),
426 MLX4_NUM_EQ
+ dev
->caps
.reserved_eqs
, 0, 0);
433 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
436 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
439 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
445 static int mlx4_init_icm(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
,
446 struct mlx4_init_hca_param
*init_hca
, u64 icm_size
)
448 struct mlx4_priv
*priv
= mlx4_priv(dev
);
452 err
= mlx4_SET_ICM_SIZE(dev
, icm_size
, &aux_pages
);
454 mlx4_err(dev
, "SET_ICM_SIZE command failed, aborting.\n");
458 mlx4_dbg(dev
, "%lld KB of HCA context requires %lld KB aux memory.\n",
459 (unsigned long long) icm_size
>> 10,
460 (unsigned long long) aux_pages
<< 2);
462 priv
->fw
.aux_icm
= mlx4_alloc_icm(dev
, aux_pages
,
463 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
464 if (!priv
->fw
.aux_icm
) {
465 mlx4_err(dev
, "Couldn't allocate aux memory, aborting.\n");
469 err
= mlx4_MAP_ICM_AUX(dev
, priv
->fw
.aux_icm
);
471 mlx4_err(dev
, "MAP_ICM_AUX command failed, aborting.\n");
475 err
= mlx4_init_cmpt_table(dev
, init_hca
->cmpt_base
, dev_cap
->cmpt_entry_sz
);
477 mlx4_err(dev
, "Failed to map cMPT context memory, aborting.\n");
481 err
= mlx4_map_eq_icm(dev
, init_hca
->eqc_base
);
483 mlx4_err(dev
, "Failed to map EQ context memory, aborting.\n");
488 * Reserved MTT entries must be aligned up to a cacheline
489 * boundary, since the FW will write to them, while the driver
490 * writes to all other MTT entries. (The variable
491 * dev->caps.mtt_entry_sz below is really the MTT segment
492 * size, not the raw entry size)
494 dev
->caps
.reserved_mtts
=
495 ALIGN(dev
->caps
.reserved_mtts
* dev
->caps
.mtt_entry_sz
,
496 dma_get_cache_alignment()) / dev
->caps
.mtt_entry_sz
;
498 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.mtt_table
,
500 dev
->caps
.mtt_entry_sz
,
501 dev
->caps
.num_mtt_segs
,
502 dev
->caps
.reserved_mtts
, 1, 0);
504 mlx4_err(dev
, "Failed to map MTT context memory, aborting.\n");
508 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.dmpt_table
,
510 dev_cap
->dmpt_entry_sz
,
512 dev
->caps
.reserved_mrws
, 1, 1);
514 mlx4_err(dev
, "Failed to map dMPT context memory, aborting.\n");
518 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.qp_table
,
520 dev_cap
->qpc_entry_sz
,
522 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
525 mlx4_err(dev
, "Failed to map QP context memory, aborting.\n");
529 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.auxc_table
,
531 dev_cap
->aux_entry_sz
,
533 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
536 mlx4_err(dev
, "Failed to map AUXC context memory, aborting.\n");
540 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.altc_table
,
542 dev_cap
->altc_entry_sz
,
544 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
547 mlx4_err(dev
, "Failed to map ALTC context memory, aborting.\n");
551 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.rdmarc_table
,
552 init_hca
->rdmarc_base
,
553 dev_cap
->rdmarc_entry_sz
<< priv
->qp_table
.rdmarc_shift
,
555 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
558 mlx4_err(dev
, "Failed to map RDMARC context memory, aborting\n");
562 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.table
,
564 dev_cap
->cqc_entry_sz
,
566 dev
->caps
.reserved_cqs
, 0, 0);
568 mlx4_err(dev
, "Failed to map CQ context memory, aborting.\n");
569 goto err_unmap_rdmarc
;
572 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.table
,
574 dev_cap
->srq_entry_sz
,
576 dev
->caps
.reserved_srqs
, 0, 0);
578 mlx4_err(dev
, "Failed to map SRQ context memory, aborting.\n");
583 * It's not strictly required, but for simplicity just map the
584 * whole multicast group table now. The table isn't very big
585 * and it's a lot easier than trying to track ref counts.
587 err
= mlx4_init_icm_table(dev
, &priv
->mcg_table
.table
,
588 init_hca
->mc_base
, MLX4_MGM_ENTRY_SIZE
,
589 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
590 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
593 mlx4_err(dev
, "Failed to map MCG context memory, aborting.\n");
600 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
603 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
606 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
609 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
612 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
615 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
618 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
621 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
624 mlx4_unmap_eq_icm(dev
);
627 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
628 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
629 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
630 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
633 mlx4_UNMAP_ICM_AUX(dev
);
636 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
641 static void mlx4_free_icms(struct mlx4_dev
*dev
)
643 struct mlx4_priv
*priv
= mlx4_priv(dev
);
645 mlx4_cleanup_icm_table(dev
, &priv
->mcg_table
.table
);
646 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
647 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
648 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
649 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
650 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
651 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
652 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
653 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
654 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
655 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
656 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
657 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
658 mlx4_unmap_eq_icm(dev
);
660 mlx4_UNMAP_ICM_AUX(dev
);
661 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
664 static void mlx4_close_hca(struct mlx4_dev
*dev
)
666 mlx4_CLOSE_HCA(dev
, 0);
669 mlx4_free_icm(dev
, mlx4_priv(dev
)->fw
.fw_icm
, 0);
672 static int mlx4_init_hca(struct mlx4_dev
*dev
)
674 struct mlx4_priv
*priv
= mlx4_priv(dev
);
675 struct mlx4_adapter adapter
;
676 struct mlx4_dev_cap dev_cap
;
677 struct mlx4_mod_stat_cfg mlx4_cfg
;
678 struct mlx4_profile profile
;
679 struct mlx4_init_hca_param init_hca
;
683 err
= mlx4_QUERY_FW(dev
);
685 mlx4_err(dev
, "QUERY_FW command failed, aborting.\n");
689 err
= mlx4_load_fw(dev
);
691 mlx4_err(dev
, "Failed to start FW, aborting.\n");
695 mlx4_cfg
.log_pg_sz_m
= 1;
696 mlx4_cfg
.log_pg_sz
= 0;
697 err
= mlx4_MOD_STAT_CFG(dev
, &mlx4_cfg
);
699 mlx4_warn(dev
, "Failed to override log_pg_sz parameter\n");
701 err
= mlx4_dev_cap(dev
, &dev_cap
);
703 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
707 profile
= default_profile
;
709 icm_size
= mlx4_make_profile(dev
, &profile
, &dev_cap
, &init_hca
);
710 if ((long long) icm_size
< 0) {
715 init_hca
.log_uar_sz
= ilog2(dev
->caps
.num_uars
);
717 err
= mlx4_init_icm(dev
, &dev_cap
, &init_hca
, icm_size
);
721 err
= mlx4_INIT_HCA(dev
, &init_hca
);
723 mlx4_err(dev
, "INIT_HCA command failed, aborting.\n");
727 err
= mlx4_QUERY_ADAPTER(dev
, &adapter
);
729 mlx4_err(dev
, "QUERY_ADAPTER command failed, aborting.\n");
733 priv
->eq_table
.inta_pin
= adapter
.inta_pin
;
734 memcpy(dev
->board_id
, adapter
.board_id
, sizeof dev
->board_id
);
746 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
751 static int mlx4_setup_hca(struct mlx4_dev
*dev
)
753 struct mlx4_priv
*priv
= mlx4_priv(dev
);
757 err
= mlx4_init_uar_table(dev
);
759 mlx4_err(dev
, "Failed to initialize "
760 "user access region table, aborting.\n");
764 err
= mlx4_uar_alloc(dev
, &priv
->driver_uar
);
766 mlx4_err(dev
, "Failed to allocate driver access region, "
768 goto err_uar_table_free
;
771 priv
->kar
= ioremap(priv
->driver_uar
.pfn
<< PAGE_SHIFT
, PAGE_SIZE
);
773 mlx4_err(dev
, "Couldn't map kernel access region, "
779 err
= mlx4_init_pd_table(dev
);
781 mlx4_err(dev
, "Failed to initialize "
782 "protection domain table, aborting.\n");
786 err
= mlx4_init_mr_table(dev
);
788 mlx4_err(dev
, "Failed to initialize "
789 "memory region table, aborting.\n");
790 goto err_pd_table_free
;
793 err
= mlx4_init_eq_table(dev
);
795 mlx4_err(dev
, "Failed to initialize "
796 "event queue table, aborting.\n");
797 goto err_mr_table_free
;
800 err
= mlx4_cmd_use_events(dev
);
802 mlx4_err(dev
, "Failed to switch to event-driven "
803 "firmware commands, aborting.\n");
804 goto err_eq_table_free
;
809 if (dev
->flags
& MLX4_FLAG_MSI_X
) {
810 mlx4_warn(dev
, "NOP command failed to generate MSI-X "
811 "interrupt IRQ %d).\n",
812 priv
->eq_table
.eq
[MLX4_EQ_ASYNC
].irq
);
813 mlx4_warn(dev
, "Trying again without MSI-X.\n");
815 mlx4_err(dev
, "NOP command failed to generate interrupt "
816 "(IRQ %d), aborting.\n",
817 priv
->eq_table
.eq
[MLX4_EQ_ASYNC
].irq
);
818 mlx4_err(dev
, "BIOS or ACPI interrupt routing problem?\n");
824 mlx4_dbg(dev
, "NOP command IRQ test passed\n");
826 err
= mlx4_init_cq_table(dev
);
828 mlx4_err(dev
, "Failed to initialize "
829 "completion queue table, aborting.\n");
833 err
= mlx4_init_srq_table(dev
);
835 mlx4_err(dev
, "Failed to initialize "
836 "shared receive queue table, aborting.\n");
837 goto err_cq_table_free
;
840 err
= mlx4_init_qp_table(dev
);
842 mlx4_err(dev
, "Failed to initialize "
843 "queue pair table, aborting.\n");
844 goto err_srq_table_free
;
847 err
= mlx4_init_mcg_table(dev
);
849 mlx4_err(dev
, "Failed to initialize "
850 "multicast group table, aborting.\n");
851 goto err_qp_table_free
;
854 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
855 err
= mlx4_SET_PORT(dev
, port
);
857 mlx4_err(dev
, "Failed to set port %d, aborting\n",
859 goto err_mcg_table_free
;
866 mlx4_cleanup_mcg_table(dev
);
869 mlx4_cleanup_qp_table(dev
);
872 mlx4_cleanup_srq_table(dev
);
875 mlx4_cleanup_cq_table(dev
);
878 mlx4_cmd_use_polling(dev
);
881 mlx4_cleanup_eq_table(dev
);
884 mlx4_cleanup_mr_table(dev
);
887 mlx4_cleanup_pd_table(dev
);
893 mlx4_uar_free(dev
, &priv
->driver_uar
);
896 mlx4_cleanup_uar_table(dev
);
900 static void mlx4_enable_msi_x(struct mlx4_dev
*dev
)
902 struct mlx4_priv
*priv
= mlx4_priv(dev
);
903 struct msix_entry entries
[MLX4_NUM_EQ
];
908 for (i
= 0; i
< MLX4_NUM_EQ
; ++i
)
909 entries
[i
].entry
= i
;
911 err
= pci_enable_msix(dev
->pdev
, entries
, ARRAY_SIZE(entries
));
914 mlx4_info(dev
, "Only %d MSI-X vectors available, "
915 "not using MSI-X\n", err
);
919 for (i
= 0; i
< MLX4_NUM_EQ
; ++i
)
920 priv
->eq_table
.eq
[i
].irq
= entries
[i
].vector
;
922 dev
->flags
|= MLX4_FLAG_MSI_X
;
927 for (i
= 0; i
< MLX4_NUM_EQ
; ++i
)
928 priv
->eq_table
.eq
[i
].irq
= dev
->pdev
->irq
;
931 static int mlx4_init_port_info(struct mlx4_dev
*dev
, int port
)
933 struct mlx4_port_info
*info
= &mlx4_priv(dev
)->port
[port
];
938 mlx4_init_mac_table(dev
, &info
->mac_table
);
939 mlx4_init_vlan_table(dev
, &info
->vlan_table
);
941 sprintf(info
->dev_name
, "mlx4_port%d", port
);
942 info
->port_attr
.attr
.name
= info
->dev_name
;
943 info
->port_attr
.attr
.mode
= S_IRUGO
| S_IWUSR
;
944 info
->port_attr
.show
= show_port_type
;
945 info
->port_attr
.store
= set_port_type
;
947 err
= device_create_file(&dev
->pdev
->dev
, &info
->port_attr
);
949 mlx4_err(dev
, "Failed to create file for port %d\n", port
);
956 static void mlx4_cleanup_port_info(struct mlx4_port_info
*info
)
961 device_remove_file(&info
->dev
->pdev
->dev
, &info
->port_attr
);
964 static int __mlx4_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
966 struct mlx4_priv
*priv
;
967 struct mlx4_dev
*dev
;
971 printk(KERN_INFO PFX
"Initializing %s\n",
974 err
= pci_enable_device(pdev
);
976 dev_err(&pdev
->dev
, "Cannot enable PCI device, "
982 * Check for BARs. We expect 0: 1MB
984 if (!(pci_resource_flags(pdev
, 0) & IORESOURCE_MEM
) ||
985 pci_resource_len(pdev
, 0) != 1 << 20) {
986 dev_err(&pdev
->dev
, "Missing DCS, aborting.\n");
988 goto err_disable_pdev
;
990 if (!(pci_resource_flags(pdev
, 2) & IORESOURCE_MEM
)) {
991 dev_err(&pdev
->dev
, "Missing UAR, aborting.\n");
993 goto err_disable_pdev
;
996 err
= pci_request_region(pdev
, 0, DRV_NAME
);
998 dev_err(&pdev
->dev
, "Cannot request control region, aborting.\n");
999 goto err_disable_pdev
;
1002 err
= pci_request_region(pdev
, 2, DRV_NAME
);
1004 dev_err(&pdev
->dev
, "Cannot request UAR region, aborting.\n");
1005 goto err_release_bar0
;
1008 pci_set_master(pdev
);
1010 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1012 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1013 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1015 dev_err(&pdev
->dev
, "Can't set PCI DMA mask, aborting.\n");
1016 goto err_release_bar2
;
1019 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1021 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit "
1022 "consistent PCI DMA mask.\n");
1023 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1025 dev_err(&pdev
->dev
, "Can't set consistent PCI DMA mask, "
1027 goto err_release_bar2
;
1031 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
1033 dev_err(&pdev
->dev
, "Device struct alloc failed, "
1036 goto err_release_bar2
;
1041 INIT_LIST_HEAD(&priv
->ctx_list
);
1042 spin_lock_init(&priv
->ctx_lock
);
1044 mutex_init(&priv
->port_mutex
);
1046 INIT_LIST_HEAD(&priv
->pgdir_list
);
1047 mutex_init(&priv
->pgdir_mutex
);
1050 * Now reset the HCA before we touch the PCI capabilities or
1051 * attempt a firmware command, since a boot ROM may have left
1052 * the HCA in an undefined state.
1054 err
= mlx4_reset(dev
);
1056 mlx4_err(dev
, "Failed to reset HCA, aborting.\n");
1060 if (mlx4_cmd_init(dev
)) {
1061 mlx4_err(dev
, "Failed to init command interface, aborting.\n");
1065 err
= mlx4_init_hca(dev
);
1069 mlx4_enable_msi_x(dev
);
1071 err
= mlx4_setup_hca(dev
);
1072 if (err
== -EBUSY
&& (dev
->flags
& MLX4_FLAG_MSI_X
)) {
1073 dev
->flags
&= ~MLX4_FLAG_MSI_X
;
1074 pci_disable_msix(pdev
);
1075 err
= mlx4_setup_hca(dev
);
1081 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
1082 err
= mlx4_init_port_info(dev
, port
);
1087 err
= mlx4_register_device(dev
);
1091 pci_set_drvdata(pdev
, dev
);
1096 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++)
1097 mlx4_cleanup_port_info(&priv
->port
[port
]);
1099 mlx4_cleanup_mcg_table(dev
);
1100 mlx4_cleanup_qp_table(dev
);
1101 mlx4_cleanup_srq_table(dev
);
1102 mlx4_cleanup_cq_table(dev
);
1103 mlx4_cmd_use_polling(dev
);
1104 mlx4_cleanup_eq_table(dev
);
1105 mlx4_cleanup_mr_table(dev
);
1106 mlx4_cleanup_pd_table(dev
);
1107 mlx4_cleanup_uar_table(dev
);
1110 if (dev
->flags
& MLX4_FLAG_MSI_X
)
1111 pci_disable_msix(pdev
);
1113 mlx4_close_hca(dev
);
1116 mlx4_cmd_cleanup(dev
);
1122 pci_release_region(pdev
, 2);
1125 pci_release_region(pdev
, 0);
1128 pci_disable_device(pdev
);
1129 pci_set_drvdata(pdev
, NULL
);
1133 static int __devinit
mlx4_init_one(struct pci_dev
*pdev
,
1134 const struct pci_device_id
*id
)
1136 static int mlx4_version_printed
;
1138 if (!mlx4_version_printed
) {
1139 printk(KERN_INFO
"%s", mlx4_version
);
1140 ++mlx4_version_printed
;
1143 return __mlx4_init_one(pdev
, id
);
1146 static void mlx4_remove_one(struct pci_dev
*pdev
)
1148 struct mlx4_dev
*dev
= pci_get_drvdata(pdev
);
1149 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1153 mlx4_unregister_device(dev
);
1155 for (p
= 1; p
<= dev
->caps
.num_ports
; p
++) {
1156 mlx4_cleanup_port_info(&priv
->port
[p
]);
1157 mlx4_CLOSE_PORT(dev
, p
);
1160 mlx4_cleanup_mcg_table(dev
);
1161 mlx4_cleanup_qp_table(dev
);
1162 mlx4_cleanup_srq_table(dev
);
1163 mlx4_cleanup_cq_table(dev
);
1164 mlx4_cmd_use_polling(dev
);
1165 mlx4_cleanup_eq_table(dev
);
1166 mlx4_cleanup_mr_table(dev
);
1167 mlx4_cleanup_pd_table(dev
);
1170 mlx4_uar_free(dev
, &priv
->driver_uar
);
1171 mlx4_cleanup_uar_table(dev
);
1172 mlx4_close_hca(dev
);
1173 mlx4_cmd_cleanup(dev
);
1175 if (dev
->flags
& MLX4_FLAG_MSI_X
)
1176 pci_disable_msix(pdev
);
1179 pci_release_region(pdev
, 2);
1180 pci_release_region(pdev
, 0);
1181 pci_disable_device(pdev
);
1182 pci_set_drvdata(pdev
, NULL
);
1186 int mlx4_restart_one(struct pci_dev
*pdev
)
1188 mlx4_remove_one(pdev
);
1189 return __mlx4_init_one(pdev
, NULL
);
1192 static struct pci_device_id mlx4_pci_table
[] = {
1193 { PCI_VDEVICE(MELLANOX
, 0x6340) }, /* MT25408 "Hermon" SDR */
1194 { PCI_VDEVICE(MELLANOX
, 0x634a) }, /* MT25408 "Hermon" DDR */
1195 { PCI_VDEVICE(MELLANOX
, 0x6354) }, /* MT25408 "Hermon" QDR */
1196 { PCI_VDEVICE(MELLANOX
, 0x6732) }, /* MT25408 "Hermon" DDR PCIe gen2 */
1197 { PCI_VDEVICE(MELLANOX
, 0x673c) }, /* MT25408 "Hermon" QDR PCIe gen2 */
1198 { PCI_VDEVICE(MELLANOX
, 0x6368) }, /* MT25408 "Hermon" EN 10GigE */
1199 { PCI_VDEVICE(MELLANOX
, 0x6750) }, /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
1203 MODULE_DEVICE_TABLE(pci
, mlx4_pci_table
);
1205 static struct pci_driver mlx4_driver
= {
1207 .id_table
= mlx4_pci_table
,
1208 .probe
= mlx4_init_one
,
1209 .remove
= __devexit_p(mlx4_remove_one
)
1212 static int __init
mlx4_verify_params(void)
1214 if ((log_num_mac
< 0) || (log_num_mac
> 7)) {
1215 printk(KERN_WARNING
"mlx4_core: bad num_mac: %d\n", log_num_mac
);
1219 if ((log_num_vlan
< 0) || (log_num_vlan
> 7)) {
1220 printk(KERN_WARNING
"mlx4_core: bad num_vlan: %d\n", log_num_vlan
);
1227 static int __init
mlx4_init(void)
1231 if (mlx4_verify_params())
1234 ret
= mlx4_catas_init();
1238 ret
= pci_register_driver(&mlx4_driver
);
1239 return ret
< 0 ? ret
: 0;
1242 static void __exit
mlx4_cleanup(void)
1244 pci_unregister_driver(&mlx4_driver
);
1245 mlx4_catas_cleanup();
1248 module_init(mlx4_init
);
1249 module_exit(mlx4_cleanup
);