2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/errno.h>
39 #include <linux/pci.h>
40 #include <linux/dma-mapping.h>
42 #include <linux/mlx4/device.h>
43 #include <linux/mlx4/doorbell.h>
49 MODULE_AUTHOR("Roland Dreier");
50 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
51 MODULE_LICENSE("Dual BSD/GPL");
52 MODULE_VERSION(DRV_VERSION
);
54 #ifdef CONFIG_MLX4_DEBUG
56 int mlx4_debug_level
= 0;
57 module_param_named(debug_level
, mlx4_debug_level
, int, 0644);
58 MODULE_PARM_DESC(debug_level
, "Enable debug tracing if > 0");
60 #endif /* CONFIG_MLX4_DEBUG */
65 module_param(msi_x
, int, 0444);
66 MODULE_PARM_DESC(msi_x
, "attempt to use MSI-X if nonzero");
68 #else /* CONFIG_PCI_MSI */
72 #endif /* CONFIG_PCI_MSI */
74 static char mlx4_version
[] __devinitdata
=
75 DRV_NAME
": Mellanox ConnectX core driver v"
76 DRV_VERSION
" (" DRV_RELDATE
")\n";
78 static struct mlx4_profile default_profile
= {
81 .rdmarc_per_qp
= 1 << 4,
88 static int mlx4_dev_cap(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
)
93 err
= mlx4_QUERY_DEV_CAP(dev
, dev_cap
);
95 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
99 if (dev_cap
->min_page_sz
> PAGE_SIZE
) {
100 mlx4_err(dev
, "HCA minimum page size of %d bigger than "
101 "kernel PAGE_SIZE of %ld, aborting.\n",
102 dev_cap
->min_page_sz
, PAGE_SIZE
);
105 if (dev_cap
->num_ports
> MLX4_MAX_PORTS
) {
106 mlx4_err(dev
, "HCA has %d ports, but we only support %d, "
108 dev_cap
->num_ports
, MLX4_MAX_PORTS
);
112 if (dev_cap
->uar_size
> pci_resource_len(dev
->pdev
, 2)) {
113 mlx4_err(dev
, "HCA reported UAR size of 0x%x bigger than "
114 "PCI resource 2 size of 0x%llx, aborting.\n",
116 (unsigned long long) pci_resource_len(dev
->pdev
, 2));
120 dev
->caps
.num_ports
= dev_cap
->num_ports
;
121 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
122 dev
->caps
.vl_cap
[i
] = dev_cap
->max_vl
[i
];
123 dev
->caps
.mtu_cap
[i
] = dev_cap
->max_mtu
[i
];
124 dev
->caps
.gid_table_len
[i
] = dev_cap
->max_gids
[i
];
125 dev
->caps
.pkey_table_len
[i
] = dev_cap
->max_pkeys
[i
];
126 dev
->caps
.port_width_cap
[i
] = dev_cap
->max_port_width
[i
];
129 dev
->caps
.num_uars
= dev_cap
->uar_size
/ PAGE_SIZE
;
130 dev
->caps
.local_ca_ack_delay
= dev_cap
->local_ca_ack_delay
;
131 dev
->caps
.bf_reg_size
= dev_cap
->bf_reg_size
;
132 dev
->caps
.bf_regs_per_page
= dev_cap
->bf_regs_per_page
;
133 dev
->caps
.max_sq_sg
= dev_cap
->max_sq_sg
;
134 dev
->caps
.max_rq_sg
= dev_cap
->max_rq_sg
;
135 dev
->caps
.max_wqes
= dev_cap
->max_qp_sz
;
136 dev
->caps
.max_qp_init_rdma
= dev_cap
->max_requester_per_qp
;
137 dev
->caps
.reserved_qps
= dev_cap
->reserved_qps
;
138 dev
->caps
.max_srq_wqes
= dev_cap
->max_srq_sz
;
139 dev
->caps
.max_srq_sge
= dev_cap
->max_rq_sg
- 1;
140 dev
->caps
.reserved_srqs
= dev_cap
->reserved_srqs
;
141 dev
->caps
.max_sq_desc_sz
= dev_cap
->max_sq_desc_sz
;
142 dev
->caps
.max_rq_desc_sz
= dev_cap
->max_rq_desc_sz
;
143 dev
->caps
.num_qp_per_mgm
= MLX4_QP_PER_MGM
;
145 * Subtract 1 from the limit because we need to allocate a
146 * spare CQE so the HCA HW can tell the difference between an
147 * empty CQ and a full CQ.
149 dev
->caps
.max_cqes
= dev_cap
->max_cq_sz
- 1;
150 dev
->caps
.reserved_cqs
= dev_cap
->reserved_cqs
;
151 dev
->caps
.reserved_eqs
= dev_cap
->reserved_eqs
;
152 dev
->caps
.reserved_mtts
= DIV_ROUND_UP(dev_cap
->reserved_mtts
,
153 MLX4_MTT_ENTRY_PER_SEG
);
154 dev
->caps
.reserved_mrws
= dev_cap
->reserved_mrws
;
155 dev
->caps
.reserved_uars
= dev_cap
->reserved_uars
;
156 dev
->caps
.reserved_pds
= dev_cap
->reserved_pds
;
157 dev
->caps
.mtt_entry_sz
= MLX4_MTT_ENTRY_PER_SEG
* dev_cap
->mtt_entry_sz
;
158 dev
->caps
.max_msg_sz
= dev_cap
->max_msg_sz
;
159 dev
->caps
.page_size_cap
= ~(u32
) (dev_cap
->min_page_sz
- 1);
160 dev
->caps
.flags
= dev_cap
->flags
;
161 dev
->caps
.bmme_flags
= dev_cap
->bmme_flags
;
162 dev
->caps
.reserved_lkey
= dev_cap
->reserved_lkey
;
163 dev
->caps
.stat_rate_support
= dev_cap
->stat_rate_support
;
164 dev
->caps
.max_gso_sz
= dev_cap
->max_gso_sz
;
169 static int mlx4_load_fw(struct mlx4_dev
*dev
)
171 struct mlx4_priv
*priv
= mlx4_priv(dev
);
174 priv
->fw
.fw_icm
= mlx4_alloc_icm(dev
, priv
->fw
.fw_pages
,
175 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
176 if (!priv
->fw
.fw_icm
) {
177 mlx4_err(dev
, "Couldn't allocate FW area, aborting.\n");
181 err
= mlx4_MAP_FA(dev
, priv
->fw
.fw_icm
);
183 mlx4_err(dev
, "MAP_FA command failed, aborting.\n");
187 err
= mlx4_RUN_FW(dev
);
189 mlx4_err(dev
, "RUN_FW command failed, aborting.\n");
199 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
203 static int mlx4_init_cmpt_table(struct mlx4_dev
*dev
, u64 cmpt_base
,
206 struct mlx4_priv
*priv
= mlx4_priv(dev
);
209 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.cmpt_table
,
211 ((u64
) (MLX4_CMPT_TYPE_QP
*
212 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
213 cmpt_entry_sz
, dev
->caps
.num_qps
,
214 dev
->caps
.reserved_qps
, 0, 0);
218 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.cmpt_table
,
220 ((u64
) (MLX4_CMPT_TYPE_SRQ
*
221 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
222 cmpt_entry_sz
, dev
->caps
.num_srqs
,
223 dev
->caps
.reserved_srqs
, 0, 0);
227 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.cmpt_table
,
229 ((u64
) (MLX4_CMPT_TYPE_CQ
*
230 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
231 cmpt_entry_sz
, dev
->caps
.num_cqs
,
232 dev
->caps
.reserved_cqs
, 0, 0);
236 err
= mlx4_init_icm_table(dev
, &priv
->eq_table
.cmpt_table
,
238 ((u64
) (MLX4_CMPT_TYPE_EQ
*
239 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
241 roundup_pow_of_two(MLX4_NUM_EQ
+
242 dev
->caps
.reserved_eqs
),
243 MLX4_NUM_EQ
+ dev
->caps
.reserved_eqs
, 0, 0);
250 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
253 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
256 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
262 static int mlx4_init_icm(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
,
263 struct mlx4_init_hca_param
*init_hca
, u64 icm_size
)
265 struct mlx4_priv
*priv
= mlx4_priv(dev
);
269 err
= mlx4_SET_ICM_SIZE(dev
, icm_size
, &aux_pages
);
271 mlx4_err(dev
, "SET_ICM_SIZE command failed, aborting.\n");
275 mlx4_dbg(dev
, "%lld KB of HCA context requires %lld KB aux memory.\n",
276 (unsigned long long) icm_size
>> 10,
277 (unsigned long long) aux_pages
<< 2);
279 priv
->fw
.aux_icm
= mlx4_alloc_icm(dev
, aux_pages
,
280 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
281 if (!priv
->fw
.aux_icm
) {
282 mlx4_err(dev
, "Couldn't allocate aux memory, aborting.\n");
286 err
= mlx4_MAP_ICM_AUX(dev
, priv
->fw
.aux_icm
);
288 mlx4_err(dev
, "MAP_ICM_AUX command failed, aborting.\n");
292 err
= mlx4_init_cmpt_table(dev
, init_hca
->cmpt_base
, dev_cap
->cmpt_entry_sz
);
294 mlx4_err(dev
, "Failed to map cMPT context memory, aborting.\n");
298 err
= mlx4_map_eq_icm(dev
, init_hca
->eqc_base
);
300 mlx4_err(dev
, "Failed to map EQ context memory, aborting.\n");
305 * Reserved MTT entries must be aligned up to a cacheline
306 * boundary, since the FW will write to them, while the driver
307 * writes to all other MTT entries. (The variable
308 * dev->caps.mtt_entry_sz below is really the MTT segment
309 * size, not the raw entry size)
311 dev
->caps
.reserved_mtts
=
312 ALIGN(dev
->caps
.reserved_mtts
* dev
->caps
.mtt_entry_sz
,
313 dma_get_cache_alignment()) / dev
->caps
.mtt_entry_sz
;
315 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.mtt_table
,
317 dev
->caps
.mtt_entry_sz
,
318 dev
->caps
.num_mtt_segs
,
319 dev
->caps
.reserved_mtts
, 1, 0);
321 mlx4_err(dev
, "Failed to map MTT context memory, aborting.\n");
325 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.dmpt_table
,
327 dev_cap
->dmpt_entry_sz
,
329 dev
->caps
.reserved_mrws
, 1, 1);
331 mlx4_err(dev
, "Failed to map dMPT context memory, aborting.\n");
335 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.qp_table
,
337 dev_cap
->qpc_entry_sz
,
339 dev
->caps
.reserved_qps
, 0, 0);
341 mlx4_err(dev
, "Failed to map QP context memory, aborting.\n");
345 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.auxc_table
,
347 dev_cap
->aux_entry_sz
,
349 dev
->caps
.reserved_qps
, 0, 0);
351 mlx4_err(dev
, "Failed to map AUXC context memory, aborting.\n");
355 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.altc_table
,
357 dev_cap
->altc_entry_sz
,
359 dev
->caps
.reserved_qps
, 0, 0);
361 mlx4_err(dev
, "Failed to map ALTC context memory, aborting.\n");
365 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.rdmarc_table
,
366 init_hca
->rdmarc_base
,
367 dev_cap
->rdmarc_entry_sz
<< priv
->qp_table
.rdmarc_shift
,
369 dev
->caps
.reserved_qps
, 0, 0);
371 mlx4_err(dev
, "Failed to map RDMARC context memory, aborting\n");
375 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.table
,
377 dev_cap
->cqc_entry_sz
,
379 dev
->caps
.reserved_cqs
, 0, 0);
381 mlx4_err(dev
, "Failed to map CQ context memory, aborting.\n");
382 goto err_unmap_rdmarc
;
385 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.table
,
387 dev_cap
->srq_entry_sz
,
389 dev
->caps
.reserved_srqs
, 0, 0);
391 mlx4_err(dev
, "Failed to map SRQ context memory, aborting.\n");
396 * It's not strictly required, but for simplicity just map the
397 * whole multicast group table now. The table isn't very big
398 * and it's a lot easier than trying to track ref counts.
400 err
= mlx4_init_icm_table(dev
, &priv
->mcg_table
.table
,
401 init_hca
->mc_base
, MLX4_MGM_ENTRY_SIZE
,
402 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
403 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
406 mlx4_err(dev
, "Failed to map MCG context memory, aborting.\n");
413 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
416 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
419 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
422 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
425 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
428 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
431 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
434 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
437 mlx4_unmap_eq_icm(dev
);
440 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
441 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
442 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
443 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
446 mlx4_UNMAP_ICM_AUX(dev
);
449 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
454 static void mlx4_free_icms(struct mlx4_dev
*dev
)
456 struct mlx4_priv
*priv
= mlx4_priv(dev
);
458 mlx4_cleanup_icm_table(dev
, &priv
->mcg_table
.table
);
459 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
460 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
461 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
462 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
463 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
464 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
465 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
466 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
467 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
468 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
469 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
470 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
471 mlx4_unmap_eq_icm(dev
);
473 mlx4_UNMAP_ICM_AUX(dev
);
474 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
477 static void mlx4_close_hca(struct mlx4_dev
*dev
)
479 mlx4_CLOSE_HCA(dev
, 0);
482 mlx4_free_icm(dev
, mlx4_priv(dev
)->fw
.fw_icm
, 0);
485 static int mlx4_init_hca(struct mlx4_dev
*dev
)
487 struct mlx4_priv
*priv
= mlx4_priv(dev
);
488 struct mlx4_adapter adapter
;
489 struct mlx4_dev_cap dev_cap
;
490 struct mlx4_mod_stat_cfg mlx4_cfg
;
491 struct mlx4_profile profile
;
492 struct mlx4_init_hca_param init_hca
;
496 err
= mlx4_QUERY_FW(dev
);
498 mlx4_err(dev
, "QUERY_FW command failed, aborting.\n");
502 err
= mlx4_load_fw(dev
);
504 mlx4_err(dev
, "Failed to start FW, aborting.\n");
508 mlx4_cfg
.log_pg_sz_m
= 1;
509 mlx4_cfg
.log_pg_sz
= 0;
510 err
= mlx4_MOD_STAT_CFG(dev
, &mlx4_cfg
);
512 mlx4_warn(dev
, "Failed to override log_pg_sz parameter\n");
514 err
= mlx4_dev_cap(dev
, &dev_cap
);
516 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
520 profile
= default_profile
;
522 icm_size
= mlx4_make_profile(dev
, &profile
, &dev_cap
, &init_hca
);
523 if ((long long) icm_size
< 0) {
528 init_hca
.log_uar_sz
= ilog2(dev
->caps
.num_uars
);
530 err
= mlx4_init_icm(dev
, &dev_cap
, &init_hca
, icm_size
);
534 err
= mlx4_INIT_HCA(dev
, &init_hca
);
536 mlx4_err(dev
, "INIT_HCA command failed, aborting.\n");
540 err
= mlx4_QUERY_ADAPTER(dev
, &adapter
);
542 mlx4_err(dev
, "QUERY_ADAPTER command failed, aborting.\n");
546 priv
->eq_table
.inta_pin
= adapter
.inta_pin
;
547 memcpy(dev
->board_id
, adapter
.board_id
, sizeof dev
->board_id
);
559 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
564 static int mlx4_setup_hca(struct mlx4_dev
*dev
)
566 struct mlx4_priv
*priv
= mlx4_priv(dev
);
569 err
= mlx4_init_uar_table(dev
);
571 mlx4_err(dev
, "Failed to initialize "
572 "user access region table, aborting.\n");
576 err
= mlx4_uar_alloc(dev
, &priv
->driver_uar
);
578 mlx4_err(dev
, "Failed to allocate driver access region, "
580 goto err_uar_table_free
;
583 priv
->kar
= ioremap(priv
->driver_uar
.pfn
<< PAGE_SHIFT
, PAGE_SIZE
);
585 mlx4_err(dev
, "Couldn't map kernel access region, "
591 err
= mlx4_init_pd_table(dev
);
593 mlx4_err(dev
, "Failed to initialize "
594 "protection domain table, aborting.\n");
598 err
= mlx4_init_mr_table(dev
);
600 mlx4_err(dev
, "Failed to initialize "
601 "memory region table, aborting.\n");
602 goto err_pd_table_free
;
605 err
= mlx4_init_eq_table(dev
);
607 mlx4_err(dev
, "Failed to initialize "
608 "event queue table, aborting.\n");
609 goto err_mr_table_free
;
612 err
= mlx4_cmd_use_events(dev
);
614 mlx4_err(dev
, "Failed to switch to event-driven "
615 "firmware commands, aborting.\n");
616 goto err_eq_table_free
;
621 if (dev
->flags
& MLX4_FLAG_MSI_X
) {
622 mlx4_warn(dev
, "NOP command failed to generate MSI-X "
623 "interrupt IRQ %d).\n",
624 priv
->eq_table
.eq
[MLX4_EQ_ASYNC
].irq
);
625 mlx4_warn(dev
, "Trying again without MSI-X.\n");
627 mlx4_err(dev
, "NOP command failed to generate interrupt "
628 "(IRQ %d), aborting.\n",
629 priv
->eq_table
.eq
[MLX4_EQ_ASYNC
].irq
);
630 mlx4_err(dev
, "BIOS or ACPI interrupt routing problem?\n");
636 mlx4_dbg(dev
, "NOP command IRQ test passed\n");
638 err
= mlx4_init_cq_table(dev
);
640 mlx4_err(dev
, "Failed to initialize "
641 "completion queue table, aborting.\n");
645 err
= mlx4_init_srq_table(dev
);
647 mlx4_err(dev
, "Failed to initialize "
648 "shared receive queue table, aborting.\n");
649 goto err_cq_table_free
;
652 err
= mlx4_init_qp_table(dev
);
654 mlx4_err(dev
, "Failed to initialize "
655 "queue pair table, aborting.\n");
656 goto err_srq_table_free
;
659 err
= mlx4_init_mcg_table(dev
);
661 mlx4_err(dev
, "Failed to initialize "
662 "multicast group table, aborting.\n");
663 goto err_qp_table_free
;
669 mlx4_cleanup_qp_table(dev
);
672 mlx4_cleanup_srq_table(dev
);
675 mlx4_cleanup_cq_table(dev
);
678 mlx4_cmd_use_polling(dev
);
681 mlx4_cleanup_eq_table(dev
);
684 mlx4_cleanup_mr_table(dev
);
687 mlx4_cleanup_pd_table(dev
);
693 mlx4_uar_free(dev
, &priv
->driver_uar
);
696 mlx4_cleanup_uar_table(dev
);
700 static void mlx4_enable_msi_x(struct mlx4_dev
*dev
)
702 struct mlx4_priv
*priv
= mlx4_priv(dev
);
703 struct msix_entry entries
[MLX4_NUM_EQ
];
708 for (i
= 0; i
< MLX4_NUM_EQ
; ++i
)
709 entries
[i
].entry
= i
;
711 err
= pci_enable_msix(dev
->pdev
, entries
, ARRAY_SIZE(entries
));
714 mlx4_info(dev
, "Only %d MSI-X vectors available, "
715 "not using MSI-X\n", err
);
719 for (i
= 0; i
< MLX4_NUM_EQ
; ++i
)
720 priv
->eq_table
.eq
[i
].irq
= entries
[i
].vector
;
722 dev
->flags
|= MLX4_FLAG_MSI_X
;
727 for (i
= 0; i
< MLX4_NUM_EQ
; ++i
)
728 priv
->eq_table
.eq
[i
].irq
= dev
->pdev
->irq
;
731 static int __mlx4_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
733 struct mlx4_priv
*priv
;
734 struct mlx4_dev
*dev
;
737 printk(KERN_INFO PFX
"Initializing %s\n",
740 err
= pci_enable_device(pdev
);
742 dev_err(&pdev
->dev
, "Cannot enable PCI device, "
748 * Check for BARs. We expect 0: 1MB
750 if (!(pci_resource_flags(pdev
, 0) & IORESOURCE_MEM
) ||
751 pci_resource_len(pdev
, 0) != 1 << 20) {
752 dev_err(&pdev
->dev
, "Missing DCS, aborting.\n");
754 goto err_disable_pdev
;
756 if (!(pci_resource_flags(pdev
, 2) & IORESOURCE_MEM
)) {
757 dev_err(&pdev
->dev
, "Missing UAR, aborting.\n");
759 goto err_disable_pdev
;
762 err
= pci_request_region(pdev
, 0, DRV_NAME
);
764 dev_err(&pdev
->dev
, "Cannot request control region, aborting.\n");
765 goto err_disable_pdev
;
768 err
= pci_request_region(pdev
, 2, DRV_NAME
);
770 dev_err(&pdev
->dev
, "Cannot request UAR region, aborting.\n");
771 goto err_release_bar0
;
774 pci_set_master(pdev
);
776 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
778 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit PCI DMA mask.\n");
779 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
781 dev_err(&pdev
->dev
, "Can't set PCI DMA mask, aborting.\n");
782 goto err_release_bar2
;
785 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
787 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit "
788 "consistent PCI DMA mask.\n");
789 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
791 dev_err(&pdev
->dev
, "Can't set consistent PCI DMA mask, "
793 goto err_release_bar2
;
797 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
799 dev_err(&pdev
->dev
, "Device struct alloc failed, "
802 goto err_release_bar2
;
807 INIT_LIST_HEAD(&priv
->ctx_list
);
808 spin_lock_init(&priv
->ctx_lock
);
810 INIT_LIST_HEAD(&priv
->pgdir_list
);
811 mutex_init(&priv
->pgdir_mutex
);
814 * Now reset the HCA before we touch the PCI capabilities or
815 * attempt a firmware command, since a boot ROM may have left
816 * the HCA in an undefined state.
818 err
= mlx4_reset(dev
);
820 mlx4_err(dev
, "Failed to reset HCA, aborting.\n");
824 if (mlx4_cmd_init(dev
)) {
825 mlx4_err(dev
, "Failed to init command interface, aborting.\n");
829 err
= mlx4_init_hca(dev
);
833 mlx4_enable_msi_x(dev
);
835 err
= mlx4_setup_hca(dev
);
836 if (err
== -EBUSY
&& (dev
->flags
& MLX4_FLAG_MSI_X
)) {
837 dev
->flags
&= ~MLX4_FLAG_MSI_X
;
838 pci_disable_msix(pdev
);
839 err
= mlx4_setup_hca(dev
);
845 err
= mlx4_register_device(dev
);
849 pci_set_drvdata(pdev
, dev
);
854 mlx4_cleanup_mcg_table(dev
);
855 mlx4_cleanup_qp_table(dev
);
856 mlx4_cleanup_srq_table(dev
);
857 mlx4_cleanup_cq_table(dev
);
858 mlx4_cmd_use_polling(dev
);
859 mlx4_cleanup_eq_table(dev
);
860 mlx4_cleanup_mr_table(dev
);
861 mlx4_cleanup_pd_table(dev
);
862 mlx4_cleanup_uar_table(dev
);
865 if (dev
->flags
& MLX4_FLAG_MSI_X
)
866 pci_disable_msix(pdev
);
871 mlx4_cmd_cleanup(dev
);
877 pci_release_region(pdev
, 2);
880 pci_release_region(pdev
, 0);
883 pci_disable_device(pdev
);
884 pci_set_drvdata(pdev
, NULL
);
888 static int __devinit
mlx4_init_one(struct pci_dev
*pdev
,
889 const struct pci_device_id
*id
)
891 static int mlx4_version_printed
;
893 if (!mlx4_version_printed
) {
894 printk(KERN_INFO
"%s", mlx4_version
);
895 ++mlx4_version_printed
;
898 return __mlx4_init_one(pdev
, id
);
901 static void mlx4_remove_one(struct pci_dev
*pdev
)
903 struct mlx4_dev
*dev
= pci_get_drvdata(pdev
);
904 struct mlx4_priv
*priv
= mlx4_priv(dev
);
908 mlx4_unregister_device(dev
);
910 for (p
= 1; p
<= dev
->caps
.num_ports
; ++p
)
911 mlx4_CLOSE_PORT(dev
, p
);
913 mlx4_cleanup_mcg_table(dev
);
914 mlx4_cleanup_qp_table(dev
);
915 mlx4_cleanup_srq_table(dev
);
916 mlx4_cleanup_cq_table(dev
);
917 mlx4_cmd_use_polling(dev
);
918 mlx4_cleanup_eq_table(dev
);
919 mlx4_cleanup_mr_table(dev
);
920 mlx4_cleanup_pd_table(dev
);
923 mlx4_uar_free(dev
, &priv
->driver_uar
);
924 mlx4_cleanup_uar_table(dev
);
926 mlx4_cmd_cleanup(dev
);
928 if (dev
->flags
& MLX4_FLAG_MSI_X
)
929 pci_disable_msix(pdev
);
932 pci_release_region(pdev
, 2);
933 pci_release_region(pdev
, 0);
934 pci_disable_device(pdev
);
935 pci_set_drvdata(pdev
, NULL
);
939 int mlx4_restart_one(struct pci_dev
*pdev
)
941 mlx4_remove_one(pdev
);
942 return __mlx4_init_one(pdev
, NULL
);
945 static struct pci_device_id mlx4_pci_table
[] = {
946 { PCI_VDEVICE(MELLANOX
, 0x6340) }, /* MT25408 "Hermon" SDR */
947 { PCI_VDEVICE(MELLANOX
, 0x634a) }, /* MT25408 "Hermon" DDR */
948 { PCI_VDEVICE(MELLANOX
, 0x6354) }, /* MT25408 "Hermon" QDR */
949 { PCI_VDEVICE(MELLANOX
, 0x6732) }, /* MT25408 "Hermon" DDR PCIe gen2 */
950 { PCI_VDEVICE(MELLANOX
, 0x673c) }, /* MT25408 "Hermon" QDR PCIe gen2 */
954 MODULE_DEVICE_TABLE(pci
, mlx4_pci_table
);
956 static struct pci_driver mlx4_driver
= {
958 .id_table
= mlx4_pci_table
,
959 .probe
= mlx4_init_one
,
960 .remove
= __devexit_p(mlx4_remove_one
)
963 static int __init
mlx4_init(void)
967 ret
= mlx4_catas_init();
971 ret
= pci_register_driver(&mlx4_driver
);
972 return ret
< 0 ? ret
: 0;
975 static void __exit
mlx4_cleanup(void)
977 pci_unregister_driver(&mlx4_driver
);
978 mlx4_catas_cleanup();
981 module_init(mlx4_init
);
982 module_exit(mlx4_cleanup
);