drivers/net/mlx4/mlx4.h

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007 Cisco Systems.  All rights reserved.
   5  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   6  * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
   7  *
   8  * This software is available to you under a choice of one of two
   9  * licenses.  You may choose to be licensed under the terms of the GNU
  10  * General Public License (GPL) Version 2, available from the file
  11  * COPYING in the main directory of this source tree, or the
  12  * OpenIB.org BSD license below:
  13  *
  14  *     Redistribution and use in source and binary forms, with or
  15  *     without modification, are permitted provided that the following
  16  *     conditions are met:
  17  *
  18  *      - Redistributions of source code must retain the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer.
  21  *
  22  *      - Redistributions in binary form must reproduce the above
  23  *        copyright notice, this list of conditions and the following
  24  *        disclaimer in the documentation and/or other materials
  25  *        provided with the distribution.
  26  *
  27  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34  * SOFTWARE.
  35  */
  36
  37 #ifndef MLX4_H
  38 #define MLX4_H
  39
  40 #include <linux/mutex.h>
  41 #include <linux/radix-tree.h>
  42 #include <linux/timer.h>
  43
  44 #include <linux/mlx4/device.h>
  45 #include <linux/mlx4/driver.h>
  46 #include <linux/mlx4/doorbell.h>
  47
  48 #define DRV_NAME        "mlx4_core"
  49 #define PFX             DRV_NAME ": "
  50 #define DRV_VERSION     "0.01"
  51 #define DRV_RELDATE     "May 1, 2007"
  52
  53 enum {
  54         MLX4_HCR_BASE           = 0x80680,
  55         MLX4_HCR_SIZE           = 0x0001c,
  56         MLX4_CLR_INT_SIZE       = 0x00008
  57 };
  58
  59 enum {
  60         MLX4_MGM_ENTRY_SIZE     =  0x100,
  61         MLX4_QP_PER_MGM         = 4 * (MLX4_MGM_ENTRY_SIZE / 16 - 2),
  62         MLX4_MTT_ENTRY_PER_SEG  = 8
  63 };
  64
  65 enum {
  66         MLX4_EQ_ASYNC,
  67         MLX4_EQ_COMP,
  68         MLX4_NUM_EQ
  69 };
  70
  71 enum {
  72         MLX4_NUM_PDS            = 1 << 15
  73 };
  74
  75 enum {
  76         MLX4_CMPT_TYPE_QP       = 0,
  77         MLX4_CMPT_TYPE_SRQ      = 1,
  78         MLX4_CMPT_TYPE_CQ       = 2,
  79         MLX4_CMPT_TYPE_EQ       = 3,
  80         MLX4_CMPT_NUM_TYPE
  81 };
  82
  83 enum {
  84         MLX4_CMPT_SHIFT         = 24,
  85         MLX4_NUM_CMPTS          = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT
  86 };
  87
  88 #ifdef CONFIG_MLX4_DEBUG
  89 extern int mlx4_debug_level;
  90 #else /* CONFIG_MLX4_DEBUG */
  91 #define mlx4_debug_level        (0)
  92 #endif /* CONFIG_MLX4_DEBUG */
  93
  94 #define mlx4_dbg(mdev, format, arg...)                                  \
  95         do {                                                            \
  96                 if (mlx4_debug_level)                                   \
  97                         dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
  98         } while (0)
  99
 100 #define mlx4_err(mdev, format, arg...) \
 101         dev_err(&mdev->pdev->dev, format, ## arg)
 102 #define mlx4_info(mdev, format, arg...) \
 103         dev_info(&mdev->pdev->dev, format, ## arg)
 104 #define mlx4_warn(mdev, format, arg...) \
 105         dev_warn(&mdev->pdev->dev, format, ## arg)
 106
 107 struct mlx4_bitmap {
 108         u32                     last;
 109         u32                     top;
 110         u32                     max;
 111         u32                     reserved_top;
 112         u32                     mask;
 113         spinlock_t              lock;
 114         unsigned long          *table;
 115 };
 116
 117 struct mlx4_buddy {
 118         unsigned long         **bits;
 119         unsigned int           *num_free;
 120         int                     max_order;
 121         spinlock_t              lock;
 122 };
 123
 124 struct mlx4_icm;
 125
 126 struct mlx4_icm_table {
 127         u64                     virt;
 128         int                     num_icm;
 129         int                     num_obj;
 130         int                     obj_size;
 131         int                     lowmem;
 132         int                     coherent;
 133         struct mutex            mutex;
 134         struct mlx4_icm       **icm;
 135 };
 136
 137 struct mlx4_eq {
 138         struct mlx4_dev        *dev;
 139         void __iomem           *doorbell;
 140         int                     eqn;
 141         u32                     cons_index;
 142         u16                     irq;
 143         u16                     have_irq;
 144         int                     nent;
 145         struct mlx4_buf_list   *page_list;
 146         struct mlx4_mtt         mtt;
 147 };
 148
 149 struct mlx4_profile {
 150         int                     num_qp;
 151         int                     rdmarc_per_qp;
 152         int                     num_srq;
 153         int                     num_cq;
 154         int                     num_mcg;
 155         int                     num_mpt;
 156         int                     num_mtt;
 157 };
 158
 159 struct mlx4_fw {
 160         u64                     clr_int_base;
 161         u64                     catas_offset;
 162         struct mlx4_icm        *fw_icm;
 163         struct mlx4_icm        *aux_icm;
 164         u32                     catas_size;
 165         u16                     fw_pages;
 166         u8                      clr_int_bar;
 167         u8                      catas_bar;
 168 };
 169
 170 struct mlx4_cmd {
 171         struct pci_pool        *pool;
 172         void __iomem           *hcr;
 173         struct mutex            hcr_mutex;
 174         struct semaphore        poll_sem;
 175         struct semaphore        event_sem;
 176         int                     max_cmds;
 177         spinlock_t              context_lock;
 178         int                     free_head;
 179         struct mlx4_cmd_context *context;
 180         u16                     token_mask;
 181         u8                      use_events;
 182         u8                      toggle;
 183 };
 184
 185 struct mlx4_uar_table {
 186         struct mlx4_bitmap      bitmap;
 187 };
 188
 189 struct mlx4_mr_table {
 190         struct mlx4_bitmap      mpt_bitmap;
 191         struct mlx4_buddy       mtt_buddy;
 192         u64                     mtt_base;
 193         u64                     mpt_base;
 194         struct mlx4_icm_table   mtt_table;
 195         struct mlx4_icm_table   dmpt_table;
 196 };
 197
 198 struct mlx4_cq_table {
 199         struct mlx4_bitmap      bitmap;
 200         spinlock_t              lock;
 201         struct radix_tree_root  tree;
 202         struct mlx4_icm_table   table;
 203         struct mlx4_icm_table   cmpt_table;
 204 };
 205
 206 struct mlx4_eq_table {
 207         struct mlx4_bitmap      bitmap;
 208         void __iomem           *clr_int;
 209         void __iomem           *uar_map[(MLX4_NUM_EQ + 6) / 4];
 210         u32                     clr_mask;
 211         struct mlx4_eq          eq[MLX4_NUM_EQ];
 212         u64                     icm_virt;
 213         struct page            *icm_page;
 214         dma_addr_t              icm_dma;
 215         struct mlx4_icm_table   cmpt_table;
 216         int                     have_irq;
 217         u8                      inta_pin;
 218 };
 219
 220 struct mlx4_srq_table {
 221         struct mlx4_bitmap      bitmap;
 222         spinlock_t              lock;
 223         struct radix_tree_root  tree;
 224         struct mlx4_icm_table   table;
 225         struct mlx4_icm_table   cmpt_table;
 226 };
 227
 228 struct mlx4_qp_table {
 229         struct mlx4_bitmap      bitmap;
 230         u32                     rdmarc_base;
 231         int                     rdmarc_shift;
 232         spinlock_t              lock;
 233         struct mlx4_icm_table   qp_table;
 234         struct mlx4_icm_table   auxc_table;
 235         struct mlx4_icm_table   altc_table;
 236         struct mlx4_icm_table   rdmarc_table;
 237         struct mlx4_icm_table   cmpt_table;
 238 };
 239
 240 struct mlx4_mcg_table {
 241         struct mutex            mutex;
 242         struct mlx4_bitmap      bitmap;
 243         struct mlx4_icm_table   table;
 244 };
 245
 246 struct mlx4_catas_err {
 247         u32 __iomem            *map;
 248         struct timer_list       timer;
 249         struct list_head        list;
 250 };
 251
 252 #define MLX4_MAX_MAC_NUM        128
 253 #define MLX4_MAC_TABLE_SIZE     (MLX4_MAX_MAC_NUM << 3)
 254
 255 struct mlx4_mac_table {
 256         __be64                  entries[MLX4_MAX_MAC_NUM];
 257         int                     refs[MLX4_MAX_MAC_NUM];
 258         struct mutex            mutex;
 259         int                     total;
 260         int                     max;
 261 };
 262
 263 #define MLX4_MAX_VLAN_NUM       128
 264 #define MLX4_VLAN_TABLE_SIZE    (MLX4_MAX_VLAN_NUM << 2)
 265
 266 struct mlx4_vlan_table {
 267         __be32                  entries[MLX4_MAX_VLAN_NUM];
 268         int                     refs[MLX4_MAX_VLAN_NUM];
 269         struct mutex            mutex;
 270         int                     total;
 271         int                     max;
 272 };
 273
 274 struct mlx4_port_info {
 275         struct mlx4_dev        *dev;
 276         int                     port;
 277         char                    dev_name[16];
 278         struct device_attribute port_attr;
 279         enum mlx4_port_type     tmp_type;
 280         struct mlx4_mac_table   mac_table;
 281         struct mlx4_vlan_table  vlan_table;
 282 };
 283
 284 struct mlx4_priv {
 285         struct mlx4_dev         dev;
 286
 287         struct list_head        dev_list;
 288         struct list_head        ctx_list;
 289         spinlock_t              ctx_lock;
 290
 291         struct list_head        pgdir_list;
 292         struct mutex            pgdir_mutex;
 293
 294         struct mlx4_fw          fw;
 295         struct mlx4_cmd         cmd;
 296
 297         struct mlx4_bitmap      pd_bitmap;
 298         struct mlx4_uar_table   uar_table;
 299         struct mlx4_mr_table    mr_table;
 300         struct mlx4_cq_table    cq_table;
 301         struct mlx4_eq_table    eq_table;
 302         struct mlx4_srq_table   srq_table;
 303         struct mlx4_qp_table    qp_table;
 304         struct mlx4_mcg_table   mcg_table;
 305
 306         struct mlx4_catas_err   catas_err;
 307
 308         void __iomem           *clr_base;
 309
 310         struct mlx4_uar         driver_uar;
 311         void __iomem           *kar;
 312         struct mlx4_port_info   port[MLX4_MAX_PORTS + 1];
 313         struct mutex            port_mutex;
 314 };
 315
 316 static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)
 317 {
 318         return container_of(dev, struct mlx4_priv, dev);
 319 }
 320
 321 u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);
 322 void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj);
 323 u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align);
 324 void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt);
 325 int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask,
 326                      u32 reserved_bot, u32 resetrved_top);
 327 void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap);
 328
 329 int mlx4_reset(struct mlx4_dev *dev);
 330
 331 int mlx4_init_pd_table(struct mlx4_dev *dev);
 332 int mlx4_init_uar_table(struct mlx4_dev *dev);
 333 int mlx4_init_mr_table(struct mlx4_dev *dev);
 334 int mlx4_init_eq_table(struct mlx4_dev *dev);
 335 int mlx4_init_cq_table(struct mlx4_dev *dev);
 336 int mlx4_init_qp_table(struct mlx4_dev *dev);
 337 int mlx4_init_srq_table(struct mlx4_dev *dev);
 338 int mlx4_init_mcg_table(struct mlx4_dev *dev);
 339
 340 void mlx4_cleanup_pd_table(struct mlx4_dev *dev);
 341 void mlx4_cleanup_uar_table(struct mlx4_dev *dev);
 342 void mlx4_cleanup_mr_table(struct mlx4_dev *dev);
 343 void mlx4_cleanup_eq_table(struct mlx4_dev *dev);
 344 void mlx4_cleanup_cq_table(struct mlx4_dev *dev);
 345 void mlx4_cleanup_qp_table(struct mlx4_dev *dev);
 346 void mlx4_cleanup_srq_table(struct mlx4_dev *dev);
 347 void mlx4_cleanup_mcg_table(struct mlx4_dev *dev);
 348
 349 void mlx4_start_catas_poll(struct mlx4_dev *dev);
 350 void mlx4_stop_catas_poll(struct mlx4_dev *dev);
 351 int mlx4_catas_init(void);
 352 void mlx4_catas_cleanup(void);
 353 int mlx4_restart_one(struct pci_dev *pdev);
 354 int mlx4_register_device(struct mlx4_dev *dev);
 355 void mlx4_unregister_device(struct mlx4_dev *dev);
 356 void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port);
 357
 358 struct mlx4_dev_cap;
 359 struct mlx4_init_hca_param;
 360
 361 u64 mlx4_make_profile(struct mlx4_dev *dev,
 362                       struct mlx4_profile *request,
 363                       struct mlx4_dev_cap *dev_cap,
 364                       struct mlx4_init_hca_param *init_hca);
 365
 366 int mlx4_map_eq_icm(struct mlx4_dev *dev, u64 icm_virt);
 367 void mlx4_unmap_eq_icm(struct mlx4_dev *dev);
 368
 369 int mlx4_cmd_init(struct mlx4_dev *dev);
 370 void mlx4_cmd_cleanup(struct mlx4_dev *dev);
 371 void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param);
 372 int mlx4_cmd_use_events(struct mlx4_dev *dev);
 373 void mlx4_cmd_use_polling(struct mlx4_dev *dev);
 374
 375 void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
 376 void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
 377
 378 void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type);
 379
 380 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
 381
 382 void mlx4_handle_catas_err(struct mlx4_dev *dev);
 383
 384 void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table);
 385 void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table);
 386
 387 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port);
 388 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps);
 389
 390 #endif /* MLX4_H */