drivers/net/mlx4/mr.c

   1 /*
   2  * Copyright (c) 2004 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   4  * Copyright (c) 2006, 2007 Cisco Systems, Inc.  All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34
  35 #include <linux/init.h>
  36 #include <linux/errno.h>
  37
  38 #include <linux/mlx4/cmd.h>
  39
  40 #include "mlx4.h"
  41 #include "icm.h"
  42
  43 /*
  44  * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
  45  */
  46 struct mlx4_mpt_entry {
  47         __be32 flags;
  48         __be32 qpn;
  49         __be32 key;
  50         __be32 pd_flags;
  51         __be64 start;
  52         __be64 length;
  53         __be32 lkey;
  54         __be32 win_cnt;
  55         u8      reserved1[3];
  56         u8      mtt_rep;
  57         __be64 mtt_seg;
  58         __be32 mtt_sz;
  59         __be32 entity_size;
  60         __be32 first_byte_offset;
  61 } __attribute__((packed));
  62
  63 #define MLX4_MPT_FLAG_SW_OWNS       (0xfUL << 28)
  64 #define MLX4_MPT_FLAG_FREE          (0x3UL << 28)
  65 #define MLX4_MPT_FLAG_MIO           (1 << 17)
  66 #define MLX4_MPT_FLAG_BIND_ENABLE   (1 << 15)
  67 #define MLX4_MPT_FLAG_PHYSICAL      (1 <<  9)
  68 #define MLX4_MPT_FLAG_REGION        (1 <<  8)
  69
  70 #define MLX4_MPT_PD_FLAG_FAST_REG   (1 << 26)
  71 #define MLX4_MPT_PD_FLAG_EN_INV     (3 << 24)
  72
  73 #define MLX4_MTT_FLAG_PRESENT           1
  74
  75 #define MLX4_MPT_STATUS_SW              0xF0
  76 #define MLX4_MPT_STATUS_HW              0x00
  77
  78 static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order)
  79 {
  80         int o;
  81         int m;
  82         u32 seg;
  83
  84         spin_lock(&buddy->lock);
  85
  86         for (o = order; o <= buddy->max_order; ++o)
  87                 if (buddy->num_free[o]) {
  88                         m = 1 << (buddy->max_order - o);
  89                         seg = find_first_bit(buddy->bits[o], m);
  90                         if (seg < m)
  91                                 goto found;
  92                 }
  93
  94         spin_unlock(&buddy->lock);
  95         return -1;
  96
  97  found:
  98         clear_bit(seg, buddy->bits[o]);
  99         --buddy->num_free[o];
 100
 101         while (o > order) {
 102                 --o;
 103                 seg <<= 1;
 104                 set_bit(seg ^ 1, buddy->bits[o]);
 105                 ++buddy->num_free[o];
 106         }
 107
 108         spin_unlock(&buddy->lock);
 109
 110         seg <<= order;
 111
 112         return seg;
 113 }
 114
 115 static void mlx4_buddy_free(struct mlx4_buddy *buddy, u32 seg, int order)
 116 {
 117         seg >>= order;
 118
 119         spin_lock(&buddy->lock);
 120
 121         while (test_bit(seg ^ 1, buddy->bits[order])) {
 122                 clear_bit(seg ^ 1, buddy->bits[order]);
 123                 --buddy->num_free[order];
 124                 seg >>= 1;
 125                 ++order;
 126         }
 127
 128         set_bit(seg, buddy->bits[order]);
 129         ++buddy->num_free[order];
 130
 131         spin_unlock(&buddy->lock);
 132 }
 133
 134 static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order)
 135 {
 136         int i, s;
 137
 138         buddy->max_order = max_order;
 139         spin_lock_init(&buddy->lock);
 140
 141         buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
 142                               GFP_KERNEL);
 143         buddy->num_free = kzalloc((buddy->max_order + 1) * sizeof (int *),
 144                                   GFP_KERNEL);
 145         if (!buddy->bits || !buddy->num_free)
 146                 goto err_out;
 147
 148         for (i = 0; i <= buddy->max_order; ++i) {
 149                 s = BITS_TO_LONGS(1 << (buddy->max_order - i));
 150                 buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
 151                 if (!buddy->bits[i])
 152                         goto err_out_free;
 153                 bitmap_zero(buddy->bits[i], 1 << (buddy->max_order - i));
 154         }
 155
 156         set_bit(0, buddy->bits[buddy->max_order]);
 157         buddy->num_free[buddy->max_order] = 1;
 158
 159         return 0;
 160
 161 err_out_free:
 162         for (i = 0; i <= buddy->max_order; ++i)
 163                 kfree(buddy->bits[i]);
 164
 165 err_out:
 166         kfree(buddy->bits);
 167         kfree(buddy->num_free);
 168
 169         return -ENOMEM;
 170 }
 171
 172 static void mlx4_buddy_cleanup(struct mlx4_buddy *buddy)
 173 {
 174         int i;
 175
 176         for (i = 0; i <= buddy->max_order; ++i)
 177                 kfree(buddy->bits[i]);
 178
 179         kfree(buddy->bits);
 180         kfree(buddy->num_free);
 181 }
 182
 183 static u32 mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order)
 184 {
 185         struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
 186         u32 seg;
 187
 188         seg = mlx4_buddy_alloc(&mr_table->mtt_buddy, order);
 189         if (seg == -1)
 190                 return -1;
 191
 192         if (mlx4_table_get_range(dev, &mr_table->mtt_table, seg,
 193                                  seg + (1 << order) - 1)) {
 194                 mlx4_buddy_free(&mr_table->mtt_buddy, seg, order);
 195                 return -1;
 196         }
 197
 198         return seg;
 199 }
 200
 201 int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift,
 202                   struct mlx4_mtt *mtt)
 203 {
 204         int i;
 205
 206         if (!npages) {
 207                 mtt->order      = -1;
 208                 mtt->page_shift = MLX4_ICM_PAGE_SHIFT;
 209                 return 0;
 210         } else
 211                 mtt->page_shift = page_shift;
 212
 213         for (mtt->order = 0, i = MLX4_MTT_ENTRY_PER_SEG; i < npages; i <<= 1)
 214                 ++mtt->order;
 215
 216         mtt->first_seg = mlx4_alloc_mtt_range(dev, mtt->order);
 217         if (mtt->first_seg == -1)
 218                 return -ENOMEM;
 219
 220         return 0;
 221 }
 222 EXPORT_SYMBOL_GPL(mlx4_mtt_init);
 223
 224 void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt)
 225 {
 226         struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
 227
 228         if (mtt->order < 0)
 229                 return;
 230
 231         mlx4_buddy_free(&mr_table->mtt_buddy, mtt->first_seg, mtt->order);
 232         mlx4_table_put_range(dev, &mr_table->mtt_table, mtt->first_seg,
 233                              mtt->first_seg + (1 << mtt->order) - 1);
 234 }
 235 EXPORT_SYMBOL_GPL(mlx4_mtt_cleanup);
 236
 237 u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt)
 238 {
 239         return (u64) mtt->first_seg * dev->caps.mtt_entry_sz;
 240 }
 241 EXPORT_SYMBOL_GPL(mlx4_mtt_addr);
 242
 243 static u32 hw_index_to_key(u32 ind)
 244 {
 245         return (ind >> 24) | (ind << 8);
 246 }
 247
 248 static u32 key_to_hw_index(u32 key)
 249 {
 250         return (key << 24) | (key >> 8);
 251 }
 252
 253 static int mlx4_SW2HW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
 254                           int mpt_index)
 255 {
 256         return mlx4_cmd(dev, mailbox->dma, mpt_index, 0, MLX4_CMD_SW2HW_MPT,
 257                         MLX4_CMD_TIME_CLASS_B);
 258 }
 259
 260 static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
 261                           int mpt_index)
 262 {
 263         return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index,
 264                             !mailbox, MLX4_CMD_HW2SW_MPT, MLX4_CMD_TIME_CLASS_B);
 265 }
 266
 267 int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access,
 268                   int npages, int page_shift, struct mlx4_mr *mr)
 269 {
 270         struct mlx4_priv *priv = mlx4_priv(dev);
 271         u32 index;
 272         int err;
 273
 274         index = mlx4_bitmap_alloc(&priv->mr_table.mpt_bitmap);
 275         if (index == -1)
 276                 return -ENOMEM;
 277
 278         mr->iova       = iova;
 279         mr->size       = size;
 280         mr->pd         = pd;
 281         mr->access     = access;
 282         mr->enabled    = 0;
 283         mr->key        = hw_index_to_key(index);
 284
 285         err = mlx4_mtt_init(dev, npages, page_shift, &mr->mtt);
 286         if (err)
 287                 mlx4_bitmap_free(&priv->mr_table.mpt_bitmap, index);
 288
 289         return err;
 290 }
 291 EXPORT_SYMBOL_GPL(mlx4_mr_alloc);
 292
 293 void mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr)
 294 {
 295         struct mlx4_priv *priv = mlx4_priv(dev);
 296         int err;
 297
 298         if (mr->enabled) {
 299                 err = mlx4_HW2SW_MPT(dev, NULL,
 300                                      key_to_hw_index(mr->key) &
 301                                      (dev->caps.num_mpts - 1));
 302                 if (err)
 303                         mlx4_warn(dev, "HW2SW_MPT failed (%d)\n", err);
 304         }
 305
 306         mlx4_mtt_cleanup(dev, &mr->mtt);
 307         mlx4_bitmap_free(&priv->mr_table.mpt_bitmap, key_to_hw_index(mr->key));
 308 }
 309 EXPORT_SYMBOL_GPL(mlx4_mr_free);
 310
 311 int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr)
 312 {
 313         struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
 314         struct mlx4_cmd_mailbox *mailbox;
 315         struct mlx4_mpt_entry *mpt_entry;
 316         int err;
 317
 318         err = mlx4_table_get(dev, &mr_table->dmpt_table, key_to_hw_index(mr->key));
 319         if (err)
 320                 return err;
 321
 322         mailbox = mlx4_alloc_cmd_mailbox(dev);
 323         if (IS_ERR(mailbox)) {
 324                 err = PTR_ERR(mailbox);
 325                 goto err_table;
 326         }
 327         mpt_entry = mailbox->buf;
 328
 329         memset(mpt_entry, 0, sizeof *mpt_entry);
 330
 331         mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO         |
 332                                        MLX4_MPT_FLAG_REGION      |
 333                                        mr->access);
 334
 335         mpt_entry->key         = cpu_to_be32(key_to_hw_index(mr->key));
 336         mpt_entry->pd_flags    = cpu_to_be32(mr->pd | MLX4_MPT_PD_FLAG_EN_INV);
 337         mpt_entry->start       = cpu_to_be64(mr->iova);
 338         mpt_entry->length      = cpu_to_be64(mr->size);
 339         mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift);
 340
 341         if (mr->mtt.order < 0) {
 342                 mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL);
 343                 mpt_entry->mtt_seg = 0;
 344         } else {
 345                 mpt_entry->mtt_seg = cpu_to_be64(mlx4_mtt_addr(dev, &mr->mtt));
 346         }
 347
 348         if (mr->mtt.order >= 0 && mr->mtt.page_shift == 0) {
 349                 /* fast register MR in free state */
 350                 mpt_entry->flags    |= cpu_to_be32(MLX4_MPT_FLAG_FREE);
 351                 mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG);
 352         } else {
 353                 mpt_entry->flags    |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS);
 354         }
 355
 356         err = mlx4_SW2HW_MPT(dev, mailbox,
 357                              key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1));
 358         if (err) {
 359                 mlx4_warn(dev, "SW2HW_MPT failed (%d)\n", err);
 360                 goto err_cmd;
 361         }
 362
 363         mr->enabled = 1;
 364
 365         mlx4_free_cmd_mailbox(dev, mailbox);
 366
 367         return 0;
 368
 369 err_cmd:
 370         mlx4_free_cmd_mailbox(dev, mailbox);
 371
 372 err_table:
 373         mlx4_table_put(dev, &mr_table->dmpt_table, key_to_hw_index(mr->key));
 374         return err;
 375 }
 376 EXPORT_SYMBOL_GPL(mlx4_mr_enable);
 377
 378 static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
 379                                 int start_index, int npages, u64 *page_list)
 380 {
 381         struct mlx4_priv *priv = mlx4_priv(dev);
 382         __be64 *mtts;
 383         dma_addr_t dma_handle;
 384         int i;
 385         int s = start_index * sizeof (u64);
 386
 387         /* All MTTs must fit in the same page */
 388         if (start_index / (PAGE_SIZE / sizeof (u64)) !=
 389             (start_index + npages - 1) / (PAGE_SIZE / sizeof (u64)))
 390                 return -EINVAL;
 391
 392         if (start_index & (MLX4_MTT_ENTRY_PER_SEG - 1))
 393                 return -EINVAL;
 394
 395         mtts = mlx4_table_find(&priv->mr_table.mtt_table, mtt->first_seg +
 396                                 s / dev->caps.mtt_entry_sz, &dma_handle);
 397         if (!mtts)
 398                 return -ENOMEM;
 399
 400         for (i = 0; i < npages; ++i)
 401                 mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT);
 402
 403         dma_sync_single(&dev->pdev->dev, dma_handle, npages * sizeof (u64), DMA_TO_DEVICE);
 404
 405         return 0;
 406 }
 407
 408 int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
 409                    int start_index, int npages, u64 *page_list)
 410 {
 411         int chunk;
 412         int err;
 413
 414         if (mtt->order < 0)
 415                 return -EINVAL;
 416
 417         while (npages > 0) {
 418                 chunk = min_t(int, PAGE_SIZE / sizeof(u64), npages);
 419                 err = mlx4_write_mtt_chunk(dev, mtt, start_index, chunk, page_list);
 420                 if (err)
 421                         return err;
 422
 423                 npages      -= chunk;
 424                 start_index += chunk;
 425                 page_list   += chunk;
 426         }
 427
 428         return 0;
 429 }
 430 EXPORT_SYMBOL_GPL(mlx4_write_mtt);
 431
 432 int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
 433                        struct mlx4_buf *buf)
 434 {
 435         u64 *page_list;
 436         int err;
 437         int i;
 438
 439         page_list = kmalloc(buf->npages * sizeof *page_list, GFP_KERNEL);
 440         if (!page_list)
 441                 return -ENOMEM;
 442
 443         for (i = 0; i < buf->npages; ++i)
 444                 if (buf->nbufs == 1)
 445                         page_list[i] = buf->direct.map + (i << buf->page_shift);
 446                 else
 447                         page_list[i] = buf->page_list[i].map;
 448
 449         err = mlx4_write_mtt(dev, mtt, 0, buf->npages, page_list);
 450
 451         kfree(page_list);
 452         return err;
 453 }
 454 EXPORT_SYMBOL_GPL(mlx4_buf_write_mtt);
 455
 456 int mlx4_init_mr_table(struct mlx4_dev *dev)
 457 {
 458         struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
 459         int err;
 460
 461         err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts,
 462                                ~0, dev->caps.reserved_mrws);
 463         if (err)
 464                 return err;
 465
 466         err = mlx4_buddy_init(&mr_table->mtt_buddy,
 467                               ilog2(dev->caps.num_mtt_segs));
 468         if (err)
 469                 goto err_buddy;
 470
 471         if (dev->caps.reserved_mtts) {
 472                 if (mlx4_alloc_mtt_range(dev, fls(dev->caps.reserved_mtts - 1)) == -1) {
 473                         mlx4_warn(dev, "MTT table of order %d is too small.\n",
 474                                   mr_table->mtt_buddy.max_order);
 475                         err = -ENOMEM;
 476                         goto err_reserve_mtts;
 477                 }
 478         }
 479
 480         return 0;
 481
 482 err_reserve_mtts:
 483         mlx4_buddy_cleanup(&mr_table->mtt_buddy);
 484
 485 err_buddy:
 486         mlx4_bitmap_cleanup(&mr_table->mpt_bitmap);
 487
 488         return err;
 489 }
 490
 491 void mlx4_cleanup_mr_table(struct mlx4_dev *dev)
 492 {
 493         struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;
 494
 495         mlx4_buddy_cleanup(&mr_table->mtt_buddy);
 496         mlx4_bitmap_cleanup(&mr_table->mpt_bitmap);
 497 }
 498
 499 static inline int mlx4_check_fmr(struct mlx4_fmr *fmr, u64 *page_list,
 500                                   int npages, u64 iova)
 501 {
 502         int i, page_mask;
 503
 504         if (npages > fmr->max_pages)
 505                 return -EINVAL;
 506
 507         page_mask = (1 << fmr->page_shift) - 1;
 508
 509         /* We are getting page lists, so va must be page aligned. */
 510         if (iova & page_mask)
 511                 return -EINVAL;
 512
 513         /* Trust the user not to pass misaligned data in page_list */
 514         if (0)
 515                 for (i = 0; i < npages; ++i) {
 516                         if (page_list[i] & ~page_mask)
 517                                 return -EINVAL;
 518                 }
 519
 520         if (fmr->maps >= fmr->max_maps)
 521                 return -EINVAL;
 522
 523         return 0;
 524 }
 525
 526 int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
 527                       int npages, u64 iova, u32 *lkey, u32 *rkey)
 528 {
 529         u32 key;
 530         int i, err;
 531
 532         err = mlx4_check_fmr(fmr, page_list, npages, iova);
 533         if (err)
 534                 return err;
 535
 536         ++fmr->maps;
 537
 538         key = key_to_hw_index(fmr->mr.key);
 539         key += dev->caps.num_mpts;
 540         *lkey = *rkey = fmr->mr.key = hw_index_to_key(key);
 541
 542         *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW;
 543
 544         /* Make sure MPT status is visible before writing MTT entries */
 545         wmb();
 546
 547         for (i = 0; i < npages; ++i)
 548                 fmr->mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT);
 549
 550         dma_sync_single(&dev->pdev->dev, fmr->dma_handle,
 551                         npages * sizeof(u64), DMA_TO_DEVICE);
 552
 553         fmr->mpt->key    = cpu_to_be32(key);
 554         fmr->mpt->lkey   = cpu_to_be32(key);
 555         fmr->mpt->length = cpu_to_be64(npages * (1ull << fmr->page_shift));
 556         fmr->mpt->start  = cpu_to_be64(iova);
 557
 558         /* Make MTT entries are visible before setting MPT status */
 559         wmb();
 560
 561         *(u8 *) fmr->mpt = MLX4_MPT_STATUS_HW;
 562
 563         /* Make sure MPT status is visible before consumer can use FMR */
 564         wmb();
 565
 566         return 0;
 567 }
 568 EXPORT_SYMBOL_GPL(mlx4_map_phys_fmr);
 569
 570 int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
 571                    int max_maps, u8 page_shift, struct mlx4_fmr *fmr)
 572 {
 573         struct mlx4_priv *priv = mlx4_priv(dev);
 574         u64 mtt_seg;
 575         int err = -ENOMEM;
 576
 577         if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32)
 578                 return -EINVAL;
 579
 580         /* All MTTs must fit in the same page */
 581         if (max_pages * sizeof *fmr->mtts > PAGE_SIZE)
 582                 return -EINVAL;
 583
 584         fmr->page_shift = page_shift;
 585         fmr->max_pages  = max_pages;
 586         fmr->max_maps   = max_maps;
 587         fmr->maps = 0;
 588
 589         err = mlx4_mr_alloc(dev, pd, 0, 0, access, max_pages,
 590                             page_shift, &fmr->mr);
 591         if (err)
 592                 return err;
 593
 594         mtt_seg = fmr->mr.mtt.first_seg * dev->caps.mtt_entry_sz;
 595
 596         fmr->mtts = mlx4_table_find(&priv->mr_table.mtt_table,
 597                                     fmr->mr.mtt.first_seg,
 598                                     &fmr->dma_handle);
 599         if (!fmr->mtts) {
 600                 err = -ENOMEM;
 601                 goto err_free;
 602         }
 603
 604         return 0;
 605
 606 err_free:
 607         mlx4_mr_free(dev, &fmr->mr);
 608         return err;
 609 }
 610 EXPORT_SYMBOL_GPL(mlx4_fmr_alloc);
 611
 612 int mlx4_fmr_enable(struct mlx4_dev *dev, struct mlx4_fmr *fmr)
 613 {
 614         struct mlx4_priv *priv = mlx4_priv(dev);
 615         int err;
 616
 617         err = mlx4_mr_enable(dev, &fmr->mr);
 618         if (err)
 619                 return err;
 620
 621         fmr->mpt = mlx4_table_find(&priv->mr_table.dmpt_table,
 622                                     key_to_hw_index(fmr->mr.key), NULL);
 623         if (!fmr->mpt)
 624                 return -ENOMEM;
 625
 626         return 0;
 627 }
 628 EXPORT_SYMBOL_GPL(mlx4_fmr_enable);
 629
 630 void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr,
 631                     u32 *lkey, u32 *rkey)
 632 {
 633         if (!fmr->maps)
 634                 return;
 635
 636         fmr->maps = 0;
 637
 638         *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW;
 639 }
 640 EXPORT_SYMBOL_GPL(mlx4_fmr_unmap);
 641
 642 int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr)
 643 {
 644         if (fmr->maps)
 645                 return -EBUSY;
 646
 647         fmr->mr.enabled = 0;
 648         mlx4_mr_free(dev, &fmr->mr);
 649
 650         return 0;
 651 }
 652 EXPORT_SYMBOL_GPL(mlx4_fmr_free);
 653
 654 int mlx4_SYNC_TPT(struct mlx4_dev *dev)
 655 {
 656         return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_SYNC_TPT, 1000);
 657 }
 658 EXPORT_SYMBOL_GPL(mlx4_SYNC_TPT);