1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005, 2006 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.0.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR
);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 #define MYRI10GE_ALLOC_ORDER 0
96 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
97 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
99 struct myri10ge_rx_buffer_state
{
103 DECLARE_PCI_UNMAP_ADDR(bus
)
104 DECLARE_PCI_UNMAP_LEN(len
)
107 struct myri10ge_tx_buffer_state
{
110 DECLARE_PCI_UNMAP_ADDR(bus
)
111 DECLARE_PCI_UNMAP_LEN(len
)
114 struct myri10ge_cmd
{
120 struct myri10ge_rx_buf
{
121 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
122 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
123 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
124 struct myri10ge_rx_buffer_state
*info
;
131 int mask
; /* number of rx slots -1 */
135 struct myri10ge_tx_buf
{
136 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
137 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
138 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
140 struct myri10ge_tx_buffer_state
*info
;
141 int mask
; /* number of transmit slots -1 */
142 int boundary
; /* boundary transmits cannot cross */
143 int req ____cacheline_aligned
; /* transmit slots submitted */
144 int pkt_start
; /* packets started */
145 int done ____cacheline_aligned
; /* transmit slots completed */
146 int pkt_done
; /* packets completed */
149 struct myri10ge_rx_done
{
150 struct mcp_slot
*entry
;
156 struct myri10ge_priv
{
157 int running
; /* running? */
158 int csum_flag
; /* rx_csums? */
159 struct myri10ge_tx_buf tx
; /* transmit ring */
160 struct myri10ge_rx_buf rx_small
;
161 struct myri10ge_rx_buf rx_big
;
162 struct myri10ge_rx_done rx_done
;
165 struct net_device
*dev
;
166 struct net_device_stats stats
;
169 unsigned long board_span
;
170 unsigned long iomem_base
;
171 __be32 __iomem
*irq_claim
;
172 __be32 __iomem
*irq_deassert
;
173 char *mac_addr_string
;
174 struct mcp_cmd_response
*cmd
;
176 struct mcp_irq_data
*fw_stats
;
177 dma_addr_t fw_stats_bus
;
178 struct pci_dev
*pdev
;
181 unsigned int rdma_tags_available
;
183 __be32 __iomem
*intr_coal_delay_ptr
;
188 wait_queue_head_t down_wq
;
189 struct work_struct watchdog_work
;
190 struct timer_list watchdog_timer
;
191 int watchdog_tx_done
;
197 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
198 char fw_version
[128];
199 u8 mac_addr
[6]; /* eeprom mac address */
200 unsigned long serial_number
;
201 int vendor_specific_offset
;
202 int fw_multicast_support
;
212 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
213 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
215 static char *myri10ge_fw_name
= NULL
;
216 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
217 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
219 static int myri10ge_ecrc_enable
= 1;
220 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
221 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
223 static int myri10ge_max_intr_slots
= 1024;
224 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
225 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
227 static int myri10ge_small_bytes
= -1; /* -1 == auto */
228 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
229 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
231 static int myri10ge_msi
= 1; /* enable msi by default */
232 module_param(myri10ge_msi
, int, S_IRUGO
);
233 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
235 static int myri10ge_intr_coal_delay
= 25;
236 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
237 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
239 static int myri10ge_flow_control
= 1;
240 module_param(myri10ge_flow_control
, int, S_IRUGO
);
241 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
243 static int myri10ge_deassert_wait
= 1;
244 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
245 MODULE_PARM_DESC(myri10ge_deassert_wait
,
246 "Wait when deasserting legacy interrupts\n");
248 static int myri10ge_force_firmware
= 0;
249 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
250 MODULE_PARM_DESC(myri10ge_force_firmware
,
251 "Force firmware to assume aligned completions\n");
253 static int myri10ge_skb_cross_4k
= 0;
254 module_param(myri10ge_skb_cross_4k
, int, S_IRUGO
| S_IWUSR
);
255 MODULE_PARM_DESC(myri10ge_skb_cross_4k
,
256 "Can a small skb cross a 4KB boundary?\n");
258 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
259 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
260 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
262 static int myri10ge_napi_weight
= 64;
263 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
264 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
266 static int myri10ge_watchdog_timeout
= 1;
267 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
268 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
270 static int myri10ge_max_irq_loops
= 1048576;
271 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
272 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
273 "Set stuck legacy IRQ detection threshold\n");
275 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
277 static int myri10ge_debug
= -1; /* defaults above */
278 module_param(myri10ge_debug
, int, 0);
279 MODULE_PARM_DESC(myri10ge_debug
, "Debug level (0=none,...,16=all)");
281 static int myri10ge_fill_thresh
= 256;
282 module_param(myri10ge_fill_thresh
, int, S_IRUGO
| S_IWUSR
);
283 MODULE_PARM_DESC(myri10ge_fill_thresh
, "Number of empty rx slots allowed\n");
285 #define MYRI10GE_FW_OFFSET 1024*1024
286 #define MYRI10GE_HIGHPART_TO_U32(X) \
287 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
288 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
290 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
292 static inline void put_be32(__be32 val
, __be32 __iomem
* p
)
294 __raw_writel((__force __u32
) val
, (__force
void __iomem
*)p
);
298 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
299 struct myri10ge_cmd
*data
, int atomic
)
302 char buf_bytes
[sizeof(*buf
) + 8];
303 struct mcp_cmd_response
*response
= mgp
->cmd
;
304 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_ETH_CMD
;
305 u32 dma_low
, dma_high
, result
, value
;
308 /* ensure buf is aligned to 8 bytes */
309 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
311 buf
->data0
= htonl(data
->data0
);
312 buf
->data1
= htonl(data
->data1
);
313 buf
->data2
= htonl(data
->data2
);
314 buf
->cmd
= htonl(cmd
);
315 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
316 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
318 buf
->response_addr
.low
= htonl(dma_low
);
319 buf
->response_addr
.high
= htonl(dma_high
);
320 response
->result
= htonl(MYRI10GE_NO_RESPONSE_RESULT
);
322 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
324 /* wait up to 15ms. Longest command is the DMA benchmark,
325 * which is capped at 5ms, but runs from a timeout handler
326 * that runs every 7.8ms. So a 15ms timeout leaves us with
330 /* if atomic is set, do not sleep,
331 * and try to get the completion quickly
332 * (1ms will be enough for those commands) */
333 for (sleep_total
= 0;
335 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
339 /* use msleep for most command */
340 for (sleep_total
= 0;
342 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
347 result
= ntohl(response
->result
);
348 value
= ntohl(response
->data
);
349 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
353 } else if (result
== MXGEFW_CMD_UNKNOWN
) {
356 dev_err(&mgp
->pdev
->dev
,
357 "command %d failed, result = %d\n",
363 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
369 * The eeprom strings on the lanaiX have the format
372 * PT:ddd mmm xx xx:xx:xx xx\0
373 * PV:ddd mmm xx xx:xx:xx xx\0
375 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
380 ptr
= mgp
->eeprom_strings
;
381 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
383 while (*ptr
!= '\0' && ptr
< limit
) {
384 if (memcmp(ptr
, "MAC=", 4) == 0) {
386 mgp
->mac_addr_string
= ptr
;
387 for (i
= 0; i
< 6; i
++) {
388 if ((ptr
+ 2) > limit
)
391 simple_strtoul(ptr
, &ptr
, 16);
395 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
397 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
399 while (ptr
< limit
&& *ptr
++) ;
405 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
410 * Enable or disable periodic RDMAs from the host to make certain
411 * chipsets resend dropped PCIe messages
414 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
416 char __iomem
*submit
;
418 u32 dma_low
, dma_high
;
421 /* clear confirmation addr */
425 /* send a rdma command to the PCIe engine, and wait for the
426 * response in the confirmation address. The firmware should
427 * write a -1 there to indicate it is alive and well
429 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
430 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
432 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
433 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
434 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
435 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
436 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
437 buf
[5] = htonl(enable
); /* enable? */
439 submit
= mgp
->sram
+ MXGEFW_BOOT_DUMMY_RDMA
;
441 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
442 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
444 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
445 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
446 (enable
? "enable" : "disable"));
450 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
451 struct mcp_gen_header
*hdr
)
453 struct device
*dev
= &mgp
->pdev
->dev
;
456 /* check firmware type */
457 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
458 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
462 /* save firmware version for ethtool */
463 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
465 sscanf(mgp
->fw_version
, "%d.%d", &major
, &minor
);
467 if (!(major
== MXGEFW_VERSION_MAJOR
&& minor
== MXGEFW_VERSION_MINOR
)) {
468 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
469 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
470 MXGEFW_VERSION_MINOR
);
476 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
478 unsigned crc
, reread_crc
;
479 const struct firmware
*fw
;
480 struct device
*dev
= &mgp
->pdev
->dev
;
481 struct mcp_gen_header
*hdr
;
486 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
487 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
490 goto abort_with_nothing
;
495 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
496 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
497 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
503 hdr_offset
= ntohl(*(__be32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
504 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
505 dev_err(dev
, "Bad firmware file\n");
509 hdr
= (void *)(fw
->data
+ hdr_offset
);
511 status
= myri10ge_validate_firmware(mgp
, hdr
);
515 crc
= crc32(~0, fw
->data
, fw
->size
);
516 for (i
= 0; i
< fw
->size
; i
+= 256) {
517 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
519 min(256U, (unsigned)(fw
->size
- i
)));
523 /* corruption checking is good for parity recovery and buggy chipset */
524 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
525 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
526 if (crc
!= reread_crc
) {
527 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
528 (unsigned)fw
->size
, reread_crc
, crc
);
532 *size
= (u32
) fw
->size
;
535 release_firmware(fw
);
541 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
543 struct mcp_gen_header
*hdr
;
544 struct device
*dev
= &mgp
->pdev
->dev
;
545 const size_t bytes
= sizeof(struct mcp_gen_header
);
549 /* find running firmware header */
550 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
552 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
553 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
558 /* copy header of running firmware from SRAM to host memory to
559 * validate firmware */
560 hdr
= kmalloc(bytes
, GFP_KERNEL
);
562 dev_err(dev
, "could not malloc firmware hdr\n");
565 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
566 status
= myri10ge_validate_firmware(mgp
, hdr
);
571 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
573 char __iomem
*submit
;
575 u32 dma_low
, dma_high
, size
;
579 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
581 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
583 /* Do not attempt to adopt firmware if there
588 status
= myri10ge_adopt_running_firmware(mgp
);
590 dev_err(&mgp
->pdev
->dev
,
591 "failed to adopt running firmware\n");
594 dev_info(&mgp
->pdev
->dev
,
595 "Successfully adopted running firmware\n");
596 if (mgp
->tx
.boundary
== 4096) {
597 dev_warn(&mgp
->pdev
->dev
,
598 "Using firmware currently running on NIC"
600 dev_warn(&mgp
->pdev
->dev
,
601 "performance consider loading optimized "
603 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
606 mgp
->fw_name
= "adopted";
607 mgp
->tx
.boundary
= 2048;
611 /* clear confirmation addr */
615 /* send a reload command to the bootstrap MCP, and wait for the
616 * response in the confirmation address. The firmware should
617 * write a -1 there to indicate it is alive and well
619 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
620 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
622 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
623 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
624 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
626 /* FIX: All newest firmware should un-protect the bottom of
627 * the sram before handoff. However, the very first interfaces
628 * do not. Therefore the handoff copy must skip the first 8 bytes
630 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
631 buf
[4] = htonl(size
- 8); /* length of code */
632 buf
[5] = htonl(8); /* where to copy to */
633 buf
[6] = htonl(0); /* where to jump to */
635 submit
= mgp
->sram
+ MXGEFW_BOOT_HANDOFF
;
637 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
642 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
646 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
647 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
650 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
651 myri10ge_dummy_rdma(mgp
, 1);
656 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
658 struct myri10ge_cmd cmd
;
661 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
662 | (addr
[2] << 8) | addr
[3]);
664 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
666 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
670 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
672 struct myri10ge_cmd cmd
;
675 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
676 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
680 "myri10ge: %s: Failed to set flow control mode\n",
689 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
691 struct myri10ge_cmd cmd
;
694 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
695 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
697 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
701 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
703 struct myri10ge_cmd cmd
;
708 /* try to send a reset command to the card to see if it
710 memset(&cmd
, 0, sizeof(cmd
));
711 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
713 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
717 /* Now exchange information about interrupts */
719 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
720 memset(mgp
->rx_done
.entry
, 0, bytes
);
721 cmd
.data0
= (u32
) bytes
;
722 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
723 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
724 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
725 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
728 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
729 mgp
->irq_claim
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
730 if (!mgp
->msi_enabled
) {
731 status
|= myri10ge_send_cmd
732 (mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
, &cmd
, 0);
733 mgp
->irq_deassert
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
736 status
|= myri10ge_send_cmd
737 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
738 mgp
->intr_coal_delay_ptr
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
740 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
743 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
745 /* Run a small DMA test.
746 * The magic multipliers to the length tell the firmware
747 * to do DMA read, write, or read+write tests. The
748 * results are returned in cmd.data0. The upper 16
749 * bits or the return is the number of transfers completed.
750 * The lower 16 bits is the time in 0.5us ticks that the
751 * transfers took to complete.
754 len
= mgp
->tx
.boundary
;
756 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
757 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
758 cmd
.data2
= len
* 0x10000;
759 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
761 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) /
762 (cmd
.data0
& 0xffff);
764 dev_warn(&mgp
->pdev
->dev
, "DMA read benchmark failed: %d\n",
766 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
767 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
768 cmd
.data2
= len
* 0x1;
769 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
771 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) /
772 (cmd
.data0
& 0xffff);
774 dev_warn(&mgp
->pdev
->dev
, "DMA write benchmark failed: %d\n",
777 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
778 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
779 cmd
.data2
= len
* 0x10001;
780 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
782 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
783 (cmd
.data0
& 0xffff);
785 dev_warn(&mgp
->pdev
->dev
,
786 "DMA read/write benchmark failed: %d\n", status
);
788 memset(mgp
->rx_done
.entry
, 0, bytes
);
790 /* reset mcp/driver shared state back to 0 */
793 mgp
->tx
.pkt_start
= 0;
794 mgp
->tx
.pkt_done
= 0;
796 mgp
->rx_small
.cnt
= 0;
797 mgp
->rx_done
.idx
= 0;
798 mgp
->rx_done
.cnt
= 0;
799 mgp
->link_changes
= 0;
800 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
801 myri10ge_change_promisc(mgp
, 0, 0);
802 myri10ge_change_pause(mgp
, mgp
->pause
);
807 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
808 struct mcp_kreq_ether_recv
*src
)
813 src
->addr_low
= htonl(DMA_32BIT_MASK
);
814 myri10ge_pio_copy(dst
, src
, 4 * sizeof(*src
));
816 myri10ge_pio_copy(dst
+ 4, src
+ 4, 4 * sizeof(*src
));
819 put_be32(low
, &dst
->addr_low
);
824 * Set of routines to get a new receive buffer. Any buffer which
825 * crosses a 4KB boundary must start on a 4KB boundary due to PCIe
826 * wdma restrictions. We also try to align any smaller allocation to
827 * at least a 16 byte boundary for efficiency. We assume the linux
828 * memory allocator works by powers of 2, and will not return memory
829 * smaller than 2KB which crosses a 4KB boundary. If it does, we fall
830 * back to allocating 2x as much space as required.
832 * We intend to replace large (>4KB) skb allocations by using
833 * pages directly and building a fraglist in the near future.
836 static inline struct sk_buff
*myri10ge_alloc_big(struct net_device
*dev
,
840 unsigned long data
, roundup
;
842 skb
= netdev_alloc_skb(dev
, bytes
+ 4096 + MXGEFW_PAD
);
846 /* Correct skb->truesize so that socket buffer
847 * accounting is not confused the rounding we must
848 * do to satisfy alignment constraints.
850 skb
->truesize
-= 4096;
852 data
= (unsigned long)(skb
->data
);
853 roundup
= (-data
) & (4095);
854 skb_reserve(skb
, roundup
);
858 /* Allocate 2x as much space as required and use whichever portion
859 * does not cross a 4KB boundary */
860 static inline struct sk_buff
*myri10ge_alloc_small_safe(struct net_device
*dev
,
864 unsigned long data
, boundary
;
866 skb
= netdev_alloc_skb(dev
, 2 * (bytes
+ MXGEFW_PAD
) - 1);
867 if (unlikely(skb
== NULL
))
870 /* Correct skb->truesize so that socket buffer
871 * accounting is not confused the rounding we must
872 * do to satisfy alignment constraints.
874 skb
->truesize
-= bytes
+ MXGEFW_PAD
;
876 data
= (unsigned long)(skb
->data
);
877 boundary
= (data
+ 4095UL) & ~4095UL;
878 if ((boundary
- data
) >= (bytes
+ MXGEFW_PAD
))
881 skb_reserve(skb
, boundary
- data
);
885 /* Allocate just enough space, and verify that the allocated
886 * space does not cross a 4KB boundary */
887 static inline struct sk_buff
*myri10ge_alloc_small(struct net_device
*dev
,
891 unsigned long roundup
, data
, end
;
893 skb
= netdev_alloc_skb(dev
, bytes
+ 16 + MXGEFW_PAD
);
894 if (unlikely(skb
== NULL
))
897 /* Round allocated buffer to 16 byte boundary */
898 data
= (unsigned long)(skb
->data
);
899 roundup
= (-data
) & 15UL;
900 skb_reserve(skb
, roundup
);
901 /* Verify that the data buffer does not cross a page boundary */
902 data
= (unsigned long)(skb
->data
);
903 end
= data
+ bytes
+ MXGEFW_PAD
- 1;
904 if (unlikely(((end
>> 12) != (data
>> 12)) && (data
& 4095UL))) {
906 "myri10ge_alloc_small: small skb crossed 4KB boundary\n");
907 myri10ge_skb_cross_4k
= 1;
908 dev_kfree_skb_any(skb
);
909 skb
= myri10ge_alloc_small_safe(dev
, bytes
);
915 myri10ge_getbuf(struct myri10ge_rx_buf
*rx
, struct myri10ge_priv
*mgp
,
918 struct net_device
*dev
= mgp
->dev
;
919 struct pci_dev
*pdev
= mgp
->pdev
;
924 bytes
+= VLAN_HLEN
; /* account for 802.1q vlan tag */
926 if ((bytes
+ MXGEFW_PAD
) > (4096 - 16) /* linux overhead */ )
927 skb
= myri10ge_alloc_big(dev
, bytes
);
928 else if (myri10ge_skb_cross_4k
)
929 skb
= myri10ge_alloc_small_safe(dev
, bytes
);
931 skb
= myri10ge_alloc_small(dev
, bytes
);
933 if (unlikely(skb
== NULL
)) {
939 /* set len so that it only covers the area we
940 * need mapped for DMA */
941 len
= bytes
+ MXGEFW_PAD
;
943 bus
= pci_map_single(pdev
, skb
->data
, len
, PCI_DMA_FROMDEVICE
);
944 rx
->info
[idx
].skb
= skb
;
945 pci_unmap_addr_set(&rx
->info
[idx
], bus
, bus
);
946 pci_unmap_len_set(&rx
->info
[idx
], len
, len
);
947 rx
->shadow
[idx
].addr_low
= htonl(MYRI10GE_LOWPART_TO_U32(bus
));
948 rx
->shadow
[idx
].addr_high
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
951 /* copy 8 descriptors (64-bytes) to the mcp at a time */
952 if ((idx
& 7) == 7) {
953 if (rx
->wc_fifo
== NULL
)
954 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
955 &rx
->shadow
[idx
- 7]);
958 myri10ge_pio_copy(rx
->wc_fifo
,
959 &rx
->shadow
[idx
- 7], 64);
965 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, __wsum hw_csum
)
967 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
969 if ((skb
->protocol
== htons(ETH_P_8021Q
)) &&
970 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
971 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
973 skb
->ip_summed
= CHECKSUM_COMPLETE
;
978 myri10ge_rx_skb_build(struct sk_buff
*skb
, u8
* va
,
979 struct skb_frag_struct
*rx_frags
, int len
, int hlen
)
981 struct skb_frag_struct
*skb_frags
;
983 skb
->len
= skb
->data_len
= len
;
984 skb
->truesize
= len
+ sizeof(struct sk_buff
);
985 /* attach the page(s) */
987 skb_frags
= skb_shinfo(skb
)->frags
;
989 memcpy(skb_frags
, rx_frags
, sizeof(*skb_frags
));
990 len
-= rx_frags
->size
;
993 skb_shinfo(skb
)->nr_frags
++;
996 /* pskb_may_pull is not available in irq context, but
997 * skb_pull() (for ether_pad and eth_type_trans()) requires
998 * the beginning of the packet in skb_headlen(), move it
1000 memcpy(skb
->data
, va
, hlen
);
1001 skb_shinfo(skb
)->frags
[0].page_offset
+= hlen
;
1002 skb_shinfo(skb
)->frags
[0].size
-= hlen
;
1003 skb
->data_len
-= hlen
;
1005 skb_pull(skb
, MXGEFW_PAD
);
1009 myri10ge_alloc_rx_pages(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
1010 int bytes
, int watchdog
)
1015 if (unlikely(rx
->watchdog_needed
&& !watchdog
))
1018 /* try to refill entire ring */
1019 while (rx
->fill_cnt
!= (rx
->cnt
+ rx
->mask
+ 1)) {
1020 idx
= rx
->fill_cnt
& rx
->mask
;
1022 if ((bytes
< MYRI10GE_ALLOC_SIZE
/ 2) &&
1023 (rx
->page_offset
+ bytes
<= MYRI10GE_ALLOC_SIZE
)) {
1024 /* we can use part of previous page */
1027 /* we need a new page */
1029 alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
1030 MYRI10GE_ALLOC_ORDER
);
1031 if (unlikely(page
== NULL
)) {
1032 if (rx
->fill_cnt
- rx
->cnt
< 16)
1033 rx
->watchdog_needed
= 1;
1037 rx
->page_offset
= 0;
1038 rx
->bus
= pci_map_page(mgp
->pdev
, page
, 0,
1039 MYRI10GE_ALLOC_SIZE
,
1040 PCI_DMA_FROMDEVICE
);
1042 rx
->info
[idx
].page
= rx
->page
;
1043 rx
->info
[idx
].page_offset
= rx
->page_offset
;
1044 /* note that this is the address of the start of the
1046 pci_unmap_addr_set(&rx
->info
[idx
], bus
, rx
->bus
);
1047 rx
->shadow
[idx
].addr_low
=
1048 htonl(MYRI10GE_LOWPART_TO_U32(rx
->bus
) + rx
->page_offset
);
1049 rx
->shadow
[idx
].addr_high
=
1050 htonl(MYRI10GE_HIGHPART_TO_U32(rx
->bus
));
1052 /* start next packet on a cacheline boundary */
1053 rx
->page_offset
+= SKB_DATA_ALIGN(bytes
);
1056 /* copy 8 descriptors to the firmware at a time */
1057 if ((idx
& 7) == 7) {
1058 if (rx
->wc_fifo
== NULL
)
1059 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
1060 &rx
->shadow
[idx
- 7]);
1063 myri10ge_pio_copy(rx
->wc_fifo
,
1064 &rx
->shadow
[idx
- 7], 64);
1071 myri10ge_unmap_rx_page(struct pci_dev
*pdev
,
1072 struct myri10ge_rx_buffer_state
*info
, int bytes
)
1074 /* unmap the recvd page if we're the only or last user of it */
1075 if (bytes
>= MYRI10GE_ALLOC_SIZE
/ 2 ||
1076 (info
->page_offset
+ 2 * bytes
) > MYRI10GE_ALLOC_SIZE
) {
1077 pci_unmap_page(pdev
, (pci_unmap_addr(info
, bus
)
1078 & ~(MYRI10GE_ALLOC_SIZE
- 1)),
1079 MYRI10GE_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
1083 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
1084 * page into an skb */
1087 myri10ge_page_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
1088 int bytes
, int len
, __wsum csum
)
1090 struct sk_buff
*skb
;
1091 struct skb_frag_struct rx_frags
[MYRI10GE_MAX_FRAGS_PER_FRAME
];
1092 int i
, idx
, hlen
, remainder
;
1093 struct pci_dev
*pdev
= mgp
->pdev
;
1094 struct net_device
*dev
= mgp
->dev
;
1098 idx
= rx
->cnt
& rx
->mask
;
1099 va
= page_address(rx
->info
[idx
].page
) + rx
->info
[idx
].page_offset
;
1101 /* Fill skb_frag_struct(s) with data from our receive */
1102 for (i
= 0, remainder
= len
; remainder
> 0; i
++) {
1103 myri10ge_unmap_rx_page(pdev
, &rx
->info
[idx
], bytes
);
1104 rx_frags
[i
].page
= rx
->info
[idx
].page
;
1105 rx_frags
[i
].page_offset
= rx
->info
[idx
].page_offset
;
1106 if (remainder
< MYRI10GE_ALLOC_SIZE
)
1107 rx_frags
[i
].size
= remainder
;
1109 rx_frags
[i
].size
= MYRI10GE_ALLOC_SIZE
;
1111 idx
= rx
->cnt
& rx
->mask
;
1112 remainder
-= MYRI10GE_ALLOC_SIZE
;
1115 hlen
= MYRI10GE_HLEN
> len
? len
: MYRI10GE_HLEN
;
1117 /* allocate an skb to attach the page(s) to. */
1119 skb
= netdev_alloc_skb(dev
, MYRI10GE_HLEN
+ 16);
1120 if (unlikely(skb
== NULL
)) {
1121 mgp
->stats
.rx_dropped
++;
1124 put_page(rx_frags
[i
].page
);
1129 /* Attach the pages to the skb, and trim off any padding */
1130 myri10ge_rx_skb_build(skb
, va
, rx_frags
, len
, hlen
);
1131 if (skb_shinfo(skb
)->frags
[0].size
<= 0) {
1132 put_page(skb_shinfo(skb
)->frags
[0].page
);
1133 skb_shinfo(skb
)->nr_frags
= 0;
1135 skb
->protocol
= eth_type_trans(skb
, dev
);
1138 if (mgp
->csum_flag
) {
1139 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
1140 (skb
->protocol
== htons(ETH_P_IPV6
))) {
1142 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1144 myri10ge_vlan_ip_csum(skb
, csum
);
1146 netif_receive_skb(skb
);
1147 dev
->last_rx
= jiffies
;
1151 static inline unsigned long
1152 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
1153 int bytes
, int len
, __wsum csum
)
1156 struct sk_buff
*skb
;
1159 idx
= rx
->cnt
& rx
->mask
;
1162 /* save a pointer to the received skb */
1163 skb
= rx
->info
[idx
].skb
;
1164 bus
= pci_unmap_addr(&rx
->info
[idx
], bus
);
1165 unmap_len
= pci_unmap_len(&rx
->info
[idx
], len
);
1167 /* try to replace the received skb */
1168 if (myri10ge_getbuf(rx
, mgp
, bytes
, idx
)) {
1169 /* drop the frame -- the old skbuf is re-cycled */
1170 mgp
->stats
.rx_dropped
+= 1;
1174 /* unmap the recvd skb */
1175 pci_unmap_single(mgp
->pdev
, bus
, unmap_len
, PCI_DMA_FROMDEVICE
);
1177 /* mcp implicitly skips 1st bytes so that packet is properly
1179 skb_reserve(skb
, MXGEFW_PAD
);
1181 /* set the length of the frame */
1184 skb
->protocol
= eth_type_trans(skb
, mgp
->dev
);
1185 if (mgp
->csum_flag
) {
1186 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
1187 (skb
->protocol
== htons(ETH_P_IPV6
))) {
1189 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1191 myri10ge_vlan_ip_csum(skb
, csum
);
1194 netif_receive_skb(skb
);
1195 mgp
->dev
->last_rx
= jiffies
;
1199 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
1201 struct pci_dev
*pdev
= mgp
->pdev
;
1202 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1203 struct sk_buff
*skb
;
1207 while (tx
->pkt_done
!= mcp_index
) {
1208 idx
= tx
->done
& tx
->mask
;
1209 skb
= tx
->info
[idx
].skb
;
1212 tx
->info
[idx
].skb
= NULL
;
1213 if (tx
->info
[idx
].last
) {
1215 tx
->info
[idx
].last
= 0;
1218 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1219 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1221 mgp
->stats
.tx_bytes
+= skb
->len
;
1222 mgp
->stats
.tx_packets
++;
1223 dev_kfree_skb_irq(skb
);
1225 pci_unmap_single(pdev
,
1226 pci_unmap_addr(&tx
->info
[idx
],
1231 pci_unmap_page(pdev
,
1232 pci_unmap_addr(&tx
->info
[idx
],
1237 /* limit potential for livelock by only handling
1238 * 2 full tx rings per call */
1239 if (unlikely(++limit
> 2 * tx
->mask
))
1242 /* start the queue if we've stopped it */
1243 if (netif_queue_stopped(mgp
->dev
)
1244 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1246 netif_wake_queue(mgp
->dev
);
1250 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1252 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1253 unsigned long rx_bytes
= 0;
1254 unsigned long rx_packets
= 0;
1255 unsigned long rx_ok
;
1257 int idx
= rx_done
->idx
;
1258 int cnt
= rx_done
->cnt
;
1262 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1263 length
= ntohs(rx_done
->entry
[idx
].length
);
1264 rx_done
->entry
[idx
].length
= 0;
1265 checksum
= csum_unfold(rx_done
->entry
[idx
].checksum
);
1266 if (length
<= mgp
->small_bytes
)
1267 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1271 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1272 mgp
->dev
->mtu
+ ETH_HLEN
,
1274 rx_packets
+= rx_ok
;
1275 rx_bytes
+= rx_ok
* (unsigned long)length
;
1277 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1279 /* limit potential for livelock by only handling a
1280 * limited number of frames. */
1285 mgp
->stats
.rx_packets
+= rx_packets
;
1286 mgp
->stats
.rx_bytes
+= rx_bytes
;
1289 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1291 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1293 if (unlikely(stats
->stats_updated
)) {
1294 if (mgp
->link_state
!= stats
->link_up
) {
1295 mgp
->link_state
= stats
->link_up
;
1296 if (mgp
->link_state
) {
1297 if (netif_msg_link(mgp
))
1299 "myri10ge: %s: link up\n",
1301 netif_carrier_on(mgp
->dev
);
1302 mgp
->link_changes
++;
1304 if (netif_msg_link(mgp
))
1306 "myri10ge: %s: link down\n",
1308 netif_carrier_off(mgp
->dev
);
1309 mgp
->link_changes
++;
1312 if (mgp
->rdma_tags_available
!=
1313 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1314 mgp
->rdma_tags_available
=
1315 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1316 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1317 "%d tags left\n", mgp
->dev
->name
,
1318 mgp
->rdma_tags_available
);
1320 mgp
->down_cnt
+= stats
->link_down
;
1321 if (stats
->link_down
)
1322 wake_up(&mgp
->down_wq
);
1326 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1328 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1329 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1330 int limit
, orig_limit
, work_done
;
1332 /* process as many rx events as NAPI will allow */
1333 limit
= min(*budget
, netdev
->quota
);
1335 myri10ge_clean_rx_done(mgp
, &limit
);
1336 work_done
= orig_limit
- limit
;
1337 *budget
-= work_done
;
1338 netdev
->quota
-= work_done
;
1340 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1341 netif_rx_complete(netdev
);
1342 put_be32(htonl(3), mgp
->irq_claim
);
1348 static irqreturn_t
myri10ge_intr(int irq
, void *arg
)
1350 struct myri10ge_priv
*mgp
= arg
;
1351 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1352 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1353 u32 send_done_count
;
1356 /* make sure it is our IRQ, and that the DMA has finished */
1357 if (unlikely(!stats
->valid
))
1360 /* low bit indicates receives are present, so schedule
1361 * napi poll handler */
1362 if (stats
->valid
& 1)
1363 netif_rx_schedule(mgp
->dev
);
1365 if (!mgp
->msi_enabled
) {
1366 put_be32(0, mgp
->irq_deassert
);
1367 if (!myri10ge_deassert_wait
)
1373 /* Wait for IRQ line to go low, if using INTx */
1377 /* check for transmit completes and receives */
1378 send_done_count
= ntohl(stats
->send_done_count
);
1379 if (send_done_count
!= tx
->pkt_done
)
1380 myri10ge_tx_done(mgp
, (int)send_done_count
);
1381 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1382 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1385 schedule_work(&mgp
->watchdog_work
);
1387 if (likely(stats
->valid
== 0))
1393 myri10ge_check_statblock(mgp
);
1395 put_be32(htonl(3), mgp
->irq_claim
+ 1);
1396 return (IRQ_HANDLED
);
1400 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1402 cmd
->autoneg
= AUTONEG_DISABLE
;
1403 cmd
->speed
= SPEED_10000
;
1404 cmd
->duplex
= DUPLEX_FULL
;
1409 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1411 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1413 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1414 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1415 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1416 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1420 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1422 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1423 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1428 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1430 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1432 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1433 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1438 myri10ge_get_pauseparam(struct net_device
*netdev
,
1439 struct ethtool_pauseparam
*pause
)
1441 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1444 pause
->rx_pause
= mgp
->pause
;
1445 pause
->tx_pause
= mgp
->pause
;
1449 myri10ge_set_pauseparam(struct net_device
*netdev
,
1450 struct ethtool_pauseparam
*pause
)
1452 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1454 if (pause
->tx_pause
!= mgp
->pause
)
1455 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1456 if (pause
->rx_pause
!= mgp
->pause
)
1457 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1458 if (pause
->autoneg
!= 0)
1464 myri10ge_get_ringparam(struct net_device
*netdev
,
1465 struct ethtool_ringparam
*ring
)
1467 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1469 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1470 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1471 ring
->rx_jumbo_max_pending
= 0;
1472 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1473 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1474 ring
->rx_pending
= ring
->rx_max_pending
;
1475 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1476 ring
->tx_pending
= ring
->tx_max_pending
;
1479 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1481 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1488 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1490 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1492 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1498 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1499 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1500 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1501 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1502 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1503 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1504 "tx_heartbeat_errors", "tx_window_errors",
1505 /* device-specific stats */
1506 "tx_boundary", "WC", "irq", "MSI",
1507 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1508 "serial_number", "tx_pkt_start", "tx_pkt_done",
1509 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1510 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1511 "link_changes", "link_up", "dropped_link_overflow",
1512 "dropped_link_error_or_filtered", "dropped_multicast_filtered",
1513 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1514 "dropped_no_big_buffer"
1517 #define MYRI10GE_NET_STATS_LEN 21
1518 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1521 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1523 switch (stringset
) {
1525 memcpy(data
, *myri10ge_gstrings_stats
,
1526 sizeof(myri10ge_gstrings_stats
));
1531 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1533 return MYRI10GE_STATS_LEN
;
1537 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1538 struct ethtool_stats
*stats
, u64
* data
)
1540 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1543 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1544 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1546 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1547 data
[i
++] = (unsigned int)(mgp
->mtrr
>= 0);
1548 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1549 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1550 data
[i
++] = (unsigned int)mgp
->read_dma
;
1551 data
[i
++] = (unsigned int)mgp
->write_dma
;
1552 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1553 data
[i
++] = (unsigned int)mgp
->serial_number
;
1554 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1555 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1556 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1557 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1558 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1559 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1560 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1561 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1562 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1563 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1564 data
[i
++] = (unsigned int)mgp
->link_changes
;
1565 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1566 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1568 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1570 (unsigned int)ntohl(mgp
->fw_stats
->dropped_multicast_filtered
);
1571 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1572 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1573 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1574 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1577 static void myri10ge_set_msglevel(struct net_device
*netdev
, u32 value
)
1579 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1580 mgp
->msg_enable
= value
;
1583 static u32
myri10ge_get_msglevel(struct net_device
*netdev
)
1585 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1586 return mgp
->msg_enable
;
1589 static const struct ethtool_ops myri10ge_ethtool_ops
= {
1590 .get_settings
= myri10ge_get_settings
,
1591 .get_drvinfo
= myri10ge_get_drvinfo
,
1592 .get_coalesce
= myri10ge_get_coalesce
,
1593 .set_coalesce
= myri10ge_set_coalesce
,
1594 .get_pauseparam
= myri10ge_get_pauseparam
,
1595 .set_pauseparam
= myri10ge_set_pauseparam
,
1596 .get_ringparam
= myri10ge_get_ringparam
,
1597 .get_rx_csum
= myri10ge_get_rx_csum
,
1598 .set_rx_csum
= myri10ge_set_rx_csum
,
1599 .get_tx_csum
= ethtool_op_get_tx_csum
,
1600 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1601 .get_sg
= ethtool_op_get_sg
,
1602 .set_sg
= ethtool_op_set_sg
,
1604 .get_tso
= ethtool_op_get_tso
,
1605 .set_tso
= ethtool_op_set_tso
,
1607 .get_strings
= myri10ge_get_strings
,
1608 .get_stats_count
= myri10ge_get_stats_count
,
1609 .get_ethtool_stats
= myri10ge_get_ethtool_stats
,
1610 .set_msglevel
= myri10ge_set_msglevel
,
1611 .get_msglevel
= myri10ge_get_msglevel
1614 static int myri10ge_allocate_rings(struct net_device
*dev
)
1616 struct myri10ge_priv
*mgp
;
1617 struct myri10ge_cmd cmd
;
1618 int tx_ring_size
, rx_ring_size
;
1619 int tx_ring_entries
, rx_ring_entries
;
1623 mgp
= netdev_priv(dev
);
1625 /* get ring sizes */
1627 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1628 tx_ring_size
= cmd
.data0
;
1629 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1630 rx_ring_size
= cmd
.data0
;
1632 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1633 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1634 mgp
->tx
.mask
= tx_ring_entries
- 1;
1635 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1637 /* allocate the host shadow rings */
1639 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1640 * sizeof(*mgp
->tx
.req_list
);
1641 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1642 if (mgp
->tx
.req_bytes
== NULL
)
1643 goto abort_with_nothing
;
1645 /* ensure req_list entries are aligned to 8 bytes */
1646 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1647 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1649 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1650 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1651 if (mgp
->rx_small
.shadow
== NULL
)
1652 goto abort_with_tx_req_bytes
;
1654 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1655 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1656 if (mgp
->rx_big
.shadow
== NULL
)
1657 goto abort_with_rx_small_shadow
;
1659 /* allocate the host info rings */
1661 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1662 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1663 if (mgp
->tx
.info
== NULL
)
1664 goto abort_with_rx_big_shadow
;
1666 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1667 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1668 if (mgp
->rx_small
.info
== NULL
)
1669 goto abort_with_tx_info
;
1671 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1672 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1673 if (mgp
->rx_big
.info
== NULL
)
1674 goto abort_with_rx_small_info
;
1676 /* Fill the receive rings */
1678 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1679 status
= myri10ge_getbuf(&mgp
->rx_small
, mgp
,
1680 mgp
->small_bytes
, i
);
1683 "myri10ge: %s: alloced only %d small bufs\n",
1685 goto abort_with_rx_small_ring
;
1689 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1691 myri10ge_getbuf(&mgp
->rx_big
, mgp
, dev
->mtu
+ ETH_HLEN
, i
);
1694 "myri10ge: %s: alloced only %d big bufs\n",
1696 goto abort_with_rx_big_ring
;
1702 abort_with_rx_big_ring
:
1703 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1704 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1705 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1706 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1707 pci_unmap_single(mgp
->pdev
,
1708 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1710 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1712 PCI_DMA_FROMDEVICE
);
1715 abort_with_rx_small_ring
:
1716 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1717 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1718 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1719 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1720 pci_unmap_single(mgp
->pdev
,
1721 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1723 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1725 PCI_DMA_FROMDEVICE
);
1727 kfree(mgp
->rx_big
.info
);
1729 abort_with_rx_small_info
:
1730 kfree(mgp
->rx_small
.info
);
1733 kfree(mgp
->tx
.info
);
1735 abort_with_rx_big_shadow
:
1736 kfree(mgp
->rx_big
.shadow
);
1738 abort_with_rx_small_shadow
:
1739 kfree(mgp
->rx_small
.shadow
);
1741 abort_with_tx_req_bytes
:
1742 kfree(mgp
->tx
.req_bytes
);
1743 mgp
->tx
.req_bytes
= NULL
;
1744 mgp
->tx
.req_list
= NULL
;
1750 static void myri10ge_free_rings(struct net_device
*dev
)
1752 struct myri10ge_priv
*mgp
;
1753 struct sk_buff
*skb
;
1754 struct myri10ge_tx_buf
*tx
;
1757 mgp
= netdev_priv(dev
);
1759 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1760 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1761 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1762 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1763 pci_unmap_single(mgp
->pdev
,
1764 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1766 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1768 PCI_DMA_FROMDEVICE
);
1771 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1772 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1773 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1774 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1775 pci_unmap_single(mgp
->pdev
,
1776 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1778 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1780 PCI_DMA_FROMDEVICE
);
1784 while (tx
->done
!= tx
->req
) {
1785 idx
= tx
->done
& tx
->mask
;
1786 skb
= tx
->info
[idx
].skb
;
1789 tx
->info
[idx
].skb
= NULL
;
1791 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1792 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1794 mgp
->stats
.tx_dropped
++;
1795 dev_kfree_skb_any(skb
);
1797 pci_unmap_single(mgp
->pdev
,
1798 pci_unmap_addr(&tx
->info
[idx
],
1803 pci_unmap_page(mgp
->pdev
,
1804 pci_unmap_addr(&tx
->info
[idx
],
1809 kfree(mgp
->rx_big
.info
);
1811 kfree(mgp
->rx_small
.info
);
1813 kfree(mgp
->tx
.info
);
1815 kfree(mgp
->rx_big
.shadow
);
1817 kfree(mgp
->rx_small
.shadow
);
1819 kfree(mgp
->tx
.req_bytes
);
1820 mgp
->tx
.req_bytes
= NULL
;
1821 mgp
->tx
.req_list
= NULL
;
1824 static int myri10ge_open(struct net_device
*dev
)
1826 struct myri10ge_priv
*mgp
;
1827 struct myri10ge_cmd cmd
;
1828 int status
, big_pow2
;
1830 mgp
= netdev_priv(dev
);
1832 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1835 mgp
->running
= MYRI10GE_ETH_STARTING
;
1836 status
= myri10ge_reset(mgp
);
1838 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1839 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1843 /* decide what small buffer size to use. For good TCP rx
1844 * performance, it is important to not receive 1514 byte
1845 * frames into jumbo buffers, as it confuses the socket buffer
1846 * accounting code, leading to drops and erratic performance.
1849 if (dev
->mtu
<= ETH_DATA_LEN
)
1850 mgp
->small_bytes
= 128; /* enough for a TCP header */
1852 mgp
->small_bytes
= ETH_FRAME_LEN
; /* enough for an ETH_DATA_LEN frame */
1854 /* Override the small buffer size? */
1855 if (myri10ge_small_bytes
> 0)
1856 mgp
->small_bytes
= myri10ge_small_bytes
;
1858 /* If the user sets an obscenely small MTU, adjust the small
1859 * bytes down to nearly nothing */
1860 if (mgp
->small_bytes
>= (dev
->mtu
+ ETH_HLEN
))
1861 mgp
->small_bytes
= 64;
1863 /* get the lanai pointers to the send and receive rings */
1865 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1867 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1870 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1871 mgp
->rx_small
.lanai
=
1872 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1874 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1876 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1880 "myri10ge: %s: failed to get ring sizes or locations\n",
1882 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1886 if (mgp
->mtrr
>= 0) {
1887 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_SEND_4
;
1888 mgp
->rx_small
.wc_fifo
=
1889 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_SMALL
;
1890 mgp
->rx_big
.wc_fifo
=
1891 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_BIG
;
1893 mgp
->tx
.wc_fifo
= NULL
;
1894 mgp
->rx_small
.wc_fifo
= NULL
;
1895 mgp
->rx_big
.wc_fifo
= NULL
;
1898 status
= myri10ge_allocate_rings(dev
);
1900 goto abort_with_nothing
;
1902 /* Firmware needs the big buff size as a power of 2. Lie and
1903 * tell him the buffer is larger, because we only use 1
1904 * buffer/pkt, and the mtu will prevent overruns.
1906 big_pow2
= dev
->mtu
+ ETH_HLEN
+ MXGEFW_PAD
;
1907 while ((big_pow2
& (big_pow2
- 1)) != 0)
1910 /* now give firmware buffers sizes, and MTU */
1911 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1912 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1913 cmd
.data0
= mgp
->small_bytes
;
1915 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1916 cmd
.data0
= big_pow2
;
1918 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1920 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1922 goto abort_with_rings
;
1925 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1926 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1927 cmd
.data2
= sizeof(struct mcp_irq_data
);
1928 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA_V2
, &cmd
, 0);
1929 if (status
== -ENOSYS
) {
1930 dma_addr_t bus
= mgp
->fw_stats_bus
;
1931 bus
+= offsetof(struct mcp_irq_data
, send_done_count
);
1932 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(bus
);
1933 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(bus
);
1934 status
= myri10ge_send_cmd(mgp
,
1935 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE
,
1937 /* Firmware cannot support multicast without STATS_DMA_V2 */
1938 mgp
->fw_multicast_support
= 0;
1940 mgp
->fw_multicast_support
= 1;
1943 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1945 goto abort_with_rings
;
1948 mgp
->link_state
= htonl(~0U);
1949 mgp
->rdma_tags_available
= 15;
1951 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1953 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1955 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1957 goto abort_with_rings
;
1960 mgp
->wake_queue
= 0;
1961 mgp
->stop_queue
= 0;
1962 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1963 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1964 add_timer(&mgp
->watchdog_timer
);
1965 netif_wake_queue(dev
);
1969 myri10ge_free_rings(dev
);
1972 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1976 static int myri10ge_close(struct net_device
*dev
)
1978 struct myri10ge_priv
*mgp
;
1979 struct myri10ge_cmd cmd
;
1980 int status
, old_down_cnt
;
1982 mgp
= netdev_priv(dev
);
1984 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1987 if (mgp
->tx
.req_bytes
== NULL
)
1990 del_timer_sync(&mgp
->watchdog_timer
);
1991 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1992 netif_poll_disable(mgp
->dev
);
1993 netif_carrier_off(dev
);
1994 netif_stop_queue(dev
);
1995 old_down_cnt
= mgp
->down_cnt
;
1997 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1999 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
2002 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
2003 if (old_down_cnt
== mgp
->down_cnt
)
2004 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
2006 netif_tx_disable(dev
);
2008 myri10ge_free_rings(dev
);
2010 mgp
->running
= MYRI10GE_ETH_STOPPED
;
2014 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2015 * backwards one at a time and handle ring wraps */
2018 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
2019 struct mcp_kreq_ether_send
*src
, int cnt
)
2021 int idx
, starting_slot
;
2022 starting_slot
= tx
->req
;
2025 idx
= (starting_slot
+ cnt
) & tx
->mask
;
2026 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
2032 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2033 * at most 32 bytes at a time, so as to avoid involving the software
2034 * pio handler in the nic. We re-write the first segment's flags
2035 * to mark them valid only after writing the entire chain.
2039 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
2043 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
2044 struct mcp_kreq_ether_send
*srcp
;
2047 idx
= tx
->req
& tx
->mask
;
2049 last_flags
= src
->flags
;
2052 dst
= dstp
= &tx
->lanai
[idx
];
2055 if ((idx
+ cnt
) < tx
->mask
) {
2056 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
2057 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
2058 mb(); /* force write every 32 bytes */
2063 /* submit all but the first request, and ensure
2064 * that it is submitted below */
2065 myri10ge_submit_req_backwards(tx
, src
, cnt
);
2069 /* submit the first request */
2070 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
2071 mb(); /* barrier before setting valid flag */
2074 /* re-write the last 32-bits with the valid flags */
2075 src
->flags
= last_flags
;
2076 put_be32(*((__be32
*) src
+ 3), (__be32 __iomem
*) dst
+ 3);
2082 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
2083 struct mcp_kreq_ether_send
*src
, int cnt
)
2088 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
2094 /* pad it to 64 bytes. The src is 64 bytes bigger than it
2095 * needs to be so that we don't overrun it */
2096 myri10ge_pio_copy(tx
->wc_fifo
+ MXGEFW_ETH_SEND_OFFSET(cnt
),
2103 * Transmit a packet. We need to split the packet so that a single
2104 * segment does not cross myri10ge->tx.boundary, so this makes segment
2105 * counting tricky. So rather than try to count segments up front, we
2106 * just give up if there are too few segments to hold a reasonably
2107 * fragmented packet currently available. If we run
2108 * out of segments while preparing a packet for DMA, we just linearize
2112 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2114 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2115 struct mcp_kreq_ether_send
*req
;
2116 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
2117 struct skb_frag_struct
*frag
;
2120 __be32 high_swapped
;
2122 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
2123 u16 pseudo_hdr_offset
, cksum_offset
;
2124 int cum_len
, seglen
, boundary
, rdma_count
;
2129 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
2132 max_segments
= MXGEFW_MAX_SEND_DESC
;
2135 if (skb
->len
> (dev
->mtu
+ ETH_HLEN
)) {
2136 mss
= skb_shinfo(skb
)->gso_size
;
2138 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
2140 #endif /*NETIF_F_TSO */
2142 if ((unlikely(avail
< max_segments
))) {
2143 /* we are out of transmit resources */
2145 netif_stop_queue(dev
);
2149 /* Setup checksum offloading, if needed */
2151 pseudo_hdr_offset
= 0;
2153 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
2154 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2155 cksum_offset
= (skb
->h
.raw
- skb
->data
);
2156 pseudo_hdr_offset
= cksum_offset
+ skb
->csum_offset
;
2157 /* If the headers are excessively large, then we must
2158 * fall back to a software checksum */
2159 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
2160 if (skb_checksum_help(skb
))
2163 pseudo_hdr_offset
= 0;
2165 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
2166 flags
|= MXGEFW_FLAGS_CKSUM
;
2173 if (mss
) { /* TSO */
2174 /* this removes any CKSUM flag from before */
2175 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
2177 /* negative cum_len signifies to the
2178 * send loop that we are still in the
2179 * header portion of the TSO packet.
2180 * TSO header must be at most 134 bytes long */
2181 cum_len
= -((skb
->h
.raw
- skb
->data
) + (skb
->h
.th
->doff
<< 2));
2183 /* for TSO, pseudo_hdr_offset holds mss.
2184 * The firmware figures out where to put
2185 * the checksum by parsing the header. */
2186 pseudo_hdr_offset
= mss
;
2188 #endif /*NETIF_F_TSO */
2189 /* Mark small packets, and pad out tiny packets */
2190 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
2191 flags
|= MXGEFW_FLAGS_SMALL
;
2193 /* pad frames to at least ETH_ZLEN bytes */
2194 if (unlikely(skb
->len
< ETH_ZLEN
)) {
2195 if (skb_padto(skb
, ETH_ZLEN
)) {
2196 /* The packet is gone, so we must
2198 mgp
->stats
.tx_dropped
+= 1;
2201 /* adjust the len to account for the zero pad
2202 * so that the nic can know how long it is */
2203 skb
->len
= ETH_ZLEN
;
2207 /* map the skb for DMA */
2208 len
= skb
->len
- skb
->data_len
;
2209 idx
= tx
->req
& tx
->mask
;
2210 tx
->info
[idx
].skb
= skb
;
2211 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2212 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2213 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2215 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
2220 /* "rdma_count" is the number of RDMAs belonging to the
2221 * current packet BEFORE the current send request. For
2222 * non-TSO packets, this is equal to "count".
2223 * For TSO packets, rdma_count needs to be reset
2224 * to 0 after a segment cut.
2226 * The rdma_count field of the send request is
2227 * the number of RDMAs of the packet starting at
2228 * that request. For TSO send requests with one ore more cuts
2229 * in the middle, this is the number of RDMAs starting
2230 * after the last cut in the request. All previous
2231 * segments before the last cut implicitly have 1 RDMA.
2233 * Since the number of RDMAs is not known beforehand,
2234 * it must be filled-in retroactively - after each
2235 * segmentation cut or at the end of the entire packet.
2239 /* Break the SKB or Fragment up into pieces which
2240 * do not cross mgp->tx.boundary */
2241 low
= MYRI10GE_LOWPART_TO_U32(bus
);
2242 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
2247 if (unlikely(count
== max_segments
))
2248 goto abort_linearize
;
2250 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2251 seglen
= boundary
- low
;
2254 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2255 cum_len_next
= cum_len
+ seglen
;
2257 if (mss
) { /* TSO */
2258 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2260 if (likely(cum_len
>= 0)) { /* payload */
2261 int next_is_first
, chop
;
2263 chop
= (cum_len_next
> mss
);
2264 cum_len_next
= cum_len_next
% mss
;
2265 next_is_first
= (cum_len_next
== 0);
2266 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2267 flags_next
|= next_is_first
*
2269 rdma_count
|= -(chop
| next_is_first
);
2270 rdma_count
+= chop
& !next_is_first
;
2271 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2277 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2278 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2279 MXGEFW_FLAGS_FIRST
|
2280 (small
* MXGEFW_FLAGS_SMALL
);
2283 #endif /* NETIF_F_TSO */
2284 req
->addr_high
= high_swapped
;
2285 req
->addr_low
= htonl(low
);
2286 req
->pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
2287 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2288 req
->rdma_count
= 1;
2289 req
->length
= htons(seglen
);
2290 req
->cksum_offset
= cksum_offset
;
2291 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2295 cum_len
= cum_len_next
;
2300 if (unlikely(cksum_offset
> seglen
))
2301 cksum_offset
-= seglen
;
2305 if (frag_idx
== frag_cnt
)
2308 /* map next fragment for DMA */
2309 idx
= (count
+ tx
->req
) & tx
->mask
;
2310 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2313 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2314 len
, PCI_DMA_TODEVICE
);
2315 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2316 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2319 (req
- rdma_count
)->rdma_count
= rdma_count
;
2324 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2325 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2326 MXGEFW_FLAGS_FIRST
)));
2328 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2329 tx
->info
[idx
].last
= 1;
2330 if (tx
->wc_fifo
== NULL
)
2331 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2333 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2335 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2337 netif_stop_queue(dev
);
2339 dev
->trans_start
= jiffies
;
2343 /* Free any DMA resources we've alloced and clear out the skb
2344 * slot so as to not trip up assertions, and to avoid a
2345 * double-free if linearizing fails */
2347 last_idx
= (idx
+ 1) & tx
->mask
;
2348 idx
= tx
->req
& tx
->mask
;
2349 tx
->info
[idx
].skb
= NULL
;
2351 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2353 if (tx
->info
[idx
].skb
!= NULL
)
2354 pci_unmap_single(mgp
->pdev
,
2355 pci_unmap_addr(&tx
->info
[idx
],
2359 pci_unmap_page(mgp
->pdev
,
2360 pci_unmap_addr(&tx
->info
[idx
],
2363 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2364 tx
->info
[idx
].skb
= NULL
;
2366 idx
= (idx
+ 1) & tx
->mask
;
2367 } while (idx
!= last_idx
);
2368 if (skb_is_gso(skb
)) {
2370 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2375 if (skb_linearize(skb
))
2378 mgp
->tx_linearized
++;
2382 dev_kfree_skb_any(skb
);
2383 mgp
->stats
.tx_dropped
+= 1;
2388 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2390 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2394 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2396 struct myri10ge_cmd cmd
;
2397 struct myri10ge_priv
*mgp
;
2398 struct dev_mc_list
*mc_list
;
2399 __be32 data
[2] = { 0, 0 };
2402 mgp
= netdev_priv(dev
);
2403 /* can be called from atomic contexts,
2404 * pass 1 to force atomicity in myri10ge_send_cmd() */
2405 myri10ge_change_promisc(mgp
, dev
->flags
& IFF_PROMISC
, 1);
2407 /* This firmware is known to not support multicast */
2408 if (!mgp
->fw_multicast_support
)
2411 /* Disable multicast filtering */
2413 err
= myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
2415 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2416 " error status: %d\n", dev
->name
, err
);
2420 if (dev
->flags
& IFF_ALLMULTI
) {
2421 /* request to disable multicast filtering, so quit here */
2425 /* Flush the filters */
2427 err
= myri10ge_send_cmd(mgp
, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS
,
2431 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2432 ", error status: %d\n", dev
->name
, err
);
2436 /* Walk the multicast list, and add each address */
2437 for (mc_list
= dev
->mc_list
; mc_list
!= NULL
; mc_list
= mc_list
->next
) {
2438 memcpy(data
, &mc_list
->dmi_addr
, 6);
2439 cmd
.data0
= ntohl(data
[0]);
2440 cmd
.data1
= ntohl(data
[1]);
2441 err
= myri10ge_send_cmd(mgp
, MXGEFW_JOIN_MULTICAST_GROUP
,
2445 printk(KERN_ERR
"myri10ge: %s: Failed "
2446 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2447 "%d\t", dev
->name
, err
);
2448 printk(KERN_ERR
"MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2449 ((unsigned char *)&mc_list
->dmi_addr
)[0],
2450 ((unsigned char *)&mc_list
->dmi_addr
)[1],
2451 ((unsigned char *)&mc_list
->dmi_addr
)[2],
2452 ((unsigned char *)&mc_list
->dmi_addr
)[3],
2453 ((unsigned char *)&mc_list
->dmi_addr
)[4],
2454 ((unsigned char *)&mc_list
->dmi_addr
)[5]
2459 /* Enable multicast filtering */
2460 err
= myri10ge_send_cmd(mgp
, MXGEFW_DISABLE_ALLMULTI
, &cmd
, 1);
2462 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2463 "error status: %d\n", dev
->name
, err
);
2473 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2475 struct sockaddr
*sa
= addr
;
2476 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2479 if (!is_valid_ether_addr(sa
->sa_data
))
2480 return -EADDRNOTAVAIL
;
2482 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2485 "myri10ge: %s: changing mac address failed with %d\n",
2490 /* change the dev structure */
2491 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2495 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2497 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2500 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2501 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2502 dev
->name
, new_mtu
);
2505 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2506 dev
->name
, dev
->mtu
, new_mtu
);
2508 /* if we change the mtu on an active device, we must
2509 * reset the device so the firmware sees the change */
2510 myri10ge_close(dev
);
2520 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2521 * Only do it if the bridge is a root port since we don't want to disturb
2522 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2525 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2527 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2528 struct device
*dev
= &mgp
->pdev
->dev
;
2535 if (!myri10ge_ecrc_enable
|| !bridge
)
2538 /* check that the bridge is a root port */
2539 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2540 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2541 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2542 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2543 if (myri10ge_ecrc_enable
> 1) {
2544 struct pci_dev
*old_bridge
= bridge
;
2546 /* Walk the hierarchy up to the root port
2547 * where ECRC has to be enabled */
2549 bridge
= bridge
->bus
->self
;
2552 "Failed to find root port"
2553 " to force ECRC\n");
2557 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2558 pci_read_config_word(bridge
,
2559 cap
+ PCI_CAP_FLAGS
, &val
);
2560 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2561 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2564 "Forcing ECRC on non-root port %s"
2565 " (enabling on root port %s)\n",
2566 pci_name(old_bridge
), pci_name(bridge
));
2569 "Not enabling ECRC on non-root port %s\n",
2575 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2579 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2581 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2583 dev_err(dev
, "\t pci=nommconf in use? "
2584 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2587 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2590 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2591 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2592 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2593 mgp
->tx
.boundary
= 4096;
2594 mgp
->fw_name
= myri10ge_fw_aligned
;
2598 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2599 * when the PCI-E Completion packets are aligned on an 8-byte
2600 * boundary. Some PCI-E chip sets always align Completion packets; on
2601 * the ones that do not, the alignment can be enforced by enabling
2602 * ECRC generation (if supported).
2604 * When PCI-E Completion packets are not aligned, it is actually more
2605 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2607 * If the driver can neither enable ECRC nor verify that it has
2608 * already been enabled, then it must use a firmware image which works
2609 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2610 * should also ensure that it never gives the device a Read-DMA which is
2611 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2612 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2613 * firmware image, and set tx.boundary to 4KB.
2616 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2617 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2619 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2621 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2623 mgp
->tx
.boundary
= 2048;
2624 mgp
->fw_name
= myri10ge_fw_unaligned
;
2626 if (myri10ge_force_firmware
== 0) {
2627 int link_width
, exp_cap
;
2630 exp_cap
= pci_find_capability(mgp
->pdev
, PCI_CAP_ID_EXP
);
2631 pci_read_config_word(mgp
->pdev
, exp_cap
+ PCI_EXP_LNKSTA
, &lnk
);
2632 link_width
= (lnk
>> 4) & 0x3f;
2634 myri10ge_enable_ecrc(mgp
);
2636 /* Check to see if Link is less than 8 or if the
2637 * upstream bridge is known to provide aligned
2639 if (link_width
< 8) {
2640 dev_info(&mgp
->pdev
->dev
, "PCIE x%d Link\n",
2642 mgp
->tx
.boundary
= 4096;
2643 mgp
->fw_name
= myri10ge_fw_aligned
;
2644 } else if (bridge
&&
2645 /* ServerWorks HT2000/HT1000 */
2646 ((bridge
->vendor
== PCI_VENDOR_ID_SERVERWORKS
2647 && bridge
->device
==
2648 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE
)
2649 /* All Intel E5000 PCIE ports */
2650 || (bridge
->vendor
== PCI_VENDOR_ID_INTEL
2651 && bridge
->device
>=
2652 PCI_DEVICE_ID_INTEL_E5000_PCIE23
2653 && bridge
->device
<=
2654 PCI_DEVICE_ID_INTEL_E5000_PCIE47
))) {
2655 dev_info(&mgp
->pdev
->dev
,
2656 "Assuming aligned completions (0x%x:0x%x)\n",
2657 bridge
->vendor
, bridge
->device
);
2658 mgp
->tx
.boundary
= 4096;
2659 mgp
->fw_name
= myri10ge_fw_aligned
;
2662 if (myri10ge_force_firmware
== 1) {
2663 dev_info(&mgp
->pdev
->dev
,
2664 "Assuming aligned completions (forced)\n");
2665 mgp
->tx
.boundary
= 4096;
2666 mgp
->fw_name
= myri10ge_fw_aligned
;
2668 dev_info(&mgp
->pdev
->dev
,
2669 "Assuming unaligned completions (forced)\n");
2670 mgp
->tx
.boundary
= 2048;
2671 mgp
->fw_name
= myri10ge_fw_unaligned
;
2674 if (myri10ge_fw_name
!= NULL
) {
2675 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2677 mgp
->fw_name
= myri10ge_fw_name
;
2681 static void myri10ge_save_state(struct myri10ge_priv
*mgp
)
2683 struct pci_dev
*pdev
= mgp
->pdev
;
2686 pci_save_state(pdev
);
2687 /* now save PCIe and MSI state that Linux will not
2689 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2690 pci_read_config_dword(pdev
, cap
+ PCI_EXP_DEVCTL
, &mgp
->devctl
);
2691 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2692 pci_read_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, &mgp
->msi_flags
);
2695 static void myri10ge_restore_state(struct myri10ge_priv
*mgp
)
2697 struct pci_dev
*pdev
= mgp
->pdev
;
2700 /* restore PCIe and MSI state that linux will not */
2701 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2702 pci_write_config_dword(pdev
, cap
+ PCI_CAP_ID_EXP
, mgp
->devctl
);
2703 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2704 pci_write_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, mgp
->msi_flags
);
2706 pci_restore_state(pdev
);
2711 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2713 struct myri10ge_priv
*mgp
;
2714 struct net_device
*netdev
;
2716 mgp
= pci_get_drvdata(pdev
);
2721 netif_device_detach(netdev
);
2722 if (netif_running(netdev
)) {
2723 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2725 myri10ge_close(netdev
);
2728 myri10ge_dummy_rdma(mgp
, 0);
2729 free_irq(pdev
->irq
, mgp
);
2730 myri10ge_save_state(mgp
);
2731 pci_disable_device(pdev
);
2732 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2736 static int myri10ge_resume(struct pci_dev
*pdev
)
2738 struct myri10ge_priv
*mgp
;
2739 struct net_device
*netdev
;
2743 mgp
= pci_get_drvdata(pdev
);
2747 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2748 msleep(5); /* give card time to respond */
2749 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2750 if (vendor
== 0xffff) {
2751 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2755 myri10ge_restore_state(mgp
);
2757 status
= pci_enable_device(pdev
);
2759 dev_err(&pdev
->dev
, "failed to enable device\n");
2763 pci_set_master(pdev
);
2765 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
2768 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
2769 goto abort_with_enabled
;
2772 myri10ge_reset(mgp
);
2773 myri10ge_dummy_rdma(mgp
, 1);
2775 /* Save configuration space to be restored if the
2776 * nic resets due to a parity error */
2777 myri10ge_save_state(mgp
);
2779 if (netif_running(netdev
)) {
2781 myri10ge_open(netdev
);
2784 netif_device_attach(netdev
);
2789 pci_disable_device(pdev
);
2794 #endif /* CONFIG_PM */
2796 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2798 struct pci_dev
*pdev
= mgp
->pdev
;
2799 int vs
= mgp
->vendor_specific_offset
;
2802 /*enter read32 mode */
2803 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2805 /*read REBOOT_STATUS (0xfffffff0) */
2806 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2807 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2812 * This watchdog is used to check whether the board has suffered
2813 * from a parity error and needs to be recovered.
2815 static void myri10ge_watchdog(struct work_struct
*work
)
2817 struct myri10ge_priv
*mgp
=
2818 container_of(work
, struct myri10ge_priv
, watchdog_work
);
2823 mgp
->watchdog_resets
++;
2824 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2825 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2826 /* Bus master DMA disabled? Check to see
2827 * if the card rebooted due to a parity error
2828 * For now, just report it */
2829 reboot
= myri10ge_read_reboot(mgp
);
2831 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2832 mgp
->dev
->name
, reboot
);
2834 * A rebooted nic will come back with config space as
2835 * it was after power was applied to PCIe bus.
2836 * Attempt to restore config space which was saved
2837 * when the driver was loaded, or the last time the
2838 * nic was resumed from power saving mode.
2840 myri10ge_restore_state(mgp
);
2842 /* if we get back -1's from our slot, perhaps somebody
2843 * powered off our card. Don't try to reset it in
2845 if (cmd
== 0xffff) {
2846 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2847 if (vendor
== 0xffff) {
2849 "myri10ge: %s: device disappeared!\n",
2854 /* Perhaps it is a software error. Try to reset */
2856 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2858 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2859 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2860 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2861 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2863 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2864 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2865 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2866 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2869 myri10ge_close(mgp
->dev
);
2870 status
= myri10ge_load_firmware(mgp
);
2872 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2875 myri10ge_open(mgp
->dev
);
2880 * We use our own timer routine rather than relying upon
2881 * netdev->tx_timeout because we have a very large hardware transmit
2882 * queue. Due to the large queue, the netdev->tx_timeout function
2883 * cannot detect a NIC with a parity error in a timely fashion if the
2884 * NIC is lightly loaded.
2886 static void myri10ge_watchdog_timer(unsigned long arg
)
2888 struct myri10ge_priv
*mgp
;
2890 mgp
= (struct myri10ge_priv
*)arg
;
2891 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2892 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
2893 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
)
2894 /* nic seems like it might be stuck.. */
2895 schedule_work(&mgp
->watchdog_work
);
2898 mod_timer(&mgp
->watchdog_timer
,
2899 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2901 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2902 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
2905 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2907 struct net_device
*netdev
;
2908 struct myri10ge_priv
*mgp
;
2909 struct device
*dev
= &pdev
->dev
;
2912 int status
= -ENXIO
;
2917 netdev
= alloc_etherdev(sizeof(*mgp
));
2918 if (netdev
== NULL
) {
2919 dev_err(dev
, "Could not allocate ethernet device\n");
2923 mgp
= netdev_priv(netdev
);
2924 memset(mgp
, 0, sizeof(*mgp
));
2927 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2928 mgp
->pause
= myri10ge_flow_control
;
2929 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2930 mgp
->msg_enable
= netif_msg_init(myri10ge_debug
, MYRI10GE_MSG_DEFAULT
);
2931 init_waitqueue_head(&mgp
->down_wq
);
2933 if (pci_enable_device(pdev
)) {
2934 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2936 goto abort_with_netdev
;
2938 myri10ge_select_firmware(mgp
);
2940 /* Find the vendor-specific cap so we can check
2941 * the reboot register later on */
2942 mgp
->vendor_specific_offset
2943 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2945 /* Set our max read request to 4KB */
2946 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2948 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2949 goto abort_with_netdev
;
2951 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2953 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2955 goto abort_with_netdev
;
2957 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2958 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2960 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2962 goto abort_with_netdev
;
2965 pci_set_master(pdev
);
2967 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2971 "64-bit pci address mask was refused, trying 32-bit");
2972 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2975 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2976 goto abort_with_netdev
;
2978 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2979 &mgp
->cmd_bus
, GFP_KERNEL
);
2980 if (mgp
->cmd
== NULL
)
2981 goto abort_with_netdev
;
2983 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2984 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2985 if (mgp
->fw_stats
== NULL
)
2986 goto abort_with_cmd
;
2988 mgp
->board_span
= pci_resource_len(pdev
, 0);
2989 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2992 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2993 MTRR_TYPE_WRCOMB
, 1);
2995 /* Hack. need to get rid of these magic numbers */
2997 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2998 if (mgp
->sram_size
> mgp
->board_span
) {
2999 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
3003 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
3004 if (mgp
->sram
== NULL
) {
3005 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
3006 mgp
->board_span
, mgp
->iomem_base
);
3010 memcpy_fromio(mgp
->eeprom_strings
,
3011 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
3012 MYRI10GE_EEPROM_STRINGS_SIZE
);
3013 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
3014 status
= myri10ge_read_mac_addr(mgp
);
3016 goto abort_with_ioremap
;
3018 for (i
= 0; i
< ETH_ALEN
; i
++)
3019 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
3021 /* allocate rx done ring */
3022 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3023 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
3024 &mgp
->rx_done
.bus
, GFP_KERNEL
);
3025 if (mgp
->rx_done
.entry
== NULL
)
3026 goto abort_with_ioremap
;
3027 memset(mgp
->rx_done
.entry
, 0, bytes
);
3029 status
= myri10ge_load_firmware(mgp
);
3031 dev_err(&pdev
->dev
, "failed to load firmware\n");
3032 goto abort_with_rx_done
;
3035 status
= myri10ge_reset(mgp
);
3037 dev_err(&pdev
->dev
, "failed reset\n");
3038 goto abort_with_firmware
;
3042 status
= pci_enable_msi(pdev
);
3045 "Error %d setting up MSI; falling back to xPIC\n",
3048 mgp
->msi_enabled
= 1;
3051 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
3054 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
3055 goto abort_with_firmware
;
3058 pci_set_drvdata(pdev
, mgp
);
3059 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
3060 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
3061 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
3062 myri10ge_initial_mtu
= 68;
3063 netdev
->mtu
= myri10ge_initial_mtu
;
3064 netdev
->open
= myri10ge_open
;
3065 netdev
->stop
= myri10ge_close
;
3066 netdev
->hard_start_xmit
= myri10ge_xmit
;
3067 netdev
->get_stats
= myri10ge_get_stats
;
3068 netdev
->base_addr
= mgp
->iomem_base
;
3069 netdev
->irq
= pdev
->irq
;
3070 netdev
->change_mtu
= myri10ge_change_mtu
;
3071 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
3072 netdev
->set_mac_address
= myri10ge_set_mac_address
;
3073 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
3075 netdev
->features
|= NETIF_F_HIGHDMA
;
3076 netdev
->poll
= myri10ge_poll
;
3077 netdev
->weight
= myri10ge_napi_weight
;
3079 /* Save configuration space to be restored if the
3080 * nic resets due to a parity error */
3081 myri10ge_save_state(mgp
);
3083 /* Setup the watchdog timer */
3084 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
3085 (unsigned long)mgp
);
3087 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
3088 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
);
3089 status
= register_netdev(netdev
);
3091 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
3092 goto abort_with_irq
;
3094 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3095 (mgp
->msi_enabled
? "MSI" : "xPIC"),
3096 pdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
3097 (mgp
->mtrr
>= 0 ? "Enabled" : "Disabled"));
3102 free_irq(pdev
->irq
, mgp
);
3103 if (mgp
->msi_enabled
)
3104 pci_disable_msi(pdev
);
3106 abort_with_firmware
:
3107 myri10ge_dummy_rdma(mgp
, 0);
3110 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3111 dma_free_coherent(&pdev
->dev
, bytes
,
3112 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3120 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3122 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3123 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3126 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3127 mgp
->cmd
, mgp
->cmd_bus
);
3131 free_netdev(netdev
);
3138 * Does what is necessary to shutdown one Myrinet device. Called
3139 * once for each Myrinet card by the kernel when a module is
3142 static void myri10ge_remove(struct pci_dev
*pdev
)
3144 struct myri10ge_priv
*mgp
;
3145 struct net_device
*netdev
;
3148 mgp
= pci_get_drvdata(pdev
);
3152 flush_scheduled_work();
3154 unregister_netdev(netdev
);
3155 free_irq(pdev
->irq
, mgp
);
3156 if (mgp
->msi_enabled
)
3157 pci_disable_msi(pdev
);
3159 myri10ge_dummy_rdma(mgp
, 0);
3161 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3162 dma_free_coherent(&pdev
->dev
, bytes
,
3163 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3169 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3171 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3172 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3174 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3175 mgp
->cmd
, mgp
->cmd_bus
);
3177 free_netdev(netdev
);
3178 pci_set_drvdata(pdev
, NULL
);
3181 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3183 static struct pci_device_id myri10ge_pci_tbl
[] = {
3184 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
3188 static struct pci_driver myri10ge_driver
= {
3190 .probe
= myri10ge_probe
,
3191 .remove
= myri10ge_remove
,
3192 .id_table
= myri10ge_pci_tbl
,
3194 .suspend
= myri10ge_suspend
,
3195 .resume
= myri10ge_resume
,
3199 static __init
int myri10ge_init_module(void)
3201 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
3202 MYRI10GE_VERSION_STR
);
3203 return pci_register_driver(&myri10ge_driver
);
3206 module_init(myri10ge_init_module
);
3208 static __exit
void myri10ge_cleanup_module(void)
3210 pci_unregister_driver(&myri10ge_driver
);
3213 module_exit(myri10ge_cleanup_module
);