1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2007 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <linux/log2.h>
64 #include <net/checksum.h>
65 #include <asm/byteorder.h>
67 #include <asm/processor.h>
72 #include "myri10ge_mcp.h"
73 #include "myri10ge_mcp_gen_header.h"
75 #define MYRI10GE_VERSION_STR "1.3.1-1.248"
77 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
78 MODULE_AUTHOR("Maintainer: help@myri.com");
79 MODULE_VERSION(MYRI10GE_VERSION_STR
);
80 MODULE_LICENSE("Dual BSD/GPL");
82 #define MYRI10GE_MAX_ETHER_MTU 9014
84 #define MYRI10GE_ETH_STOPPED 0
85 #define MYRI10GE_ETH_STOPPING 1
86 #define MYRI10GE_ETH_STARTING 2
87 #define MYRI10GE_ETH_RUNNING 3
88 #define MYRI10GE_ETH_OPEN_FAILED 4
90 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
91 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
93 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
94 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
96 #define MYRI10GE_ALLOC_ORDER 0
97 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
98 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
100 struct myri10ge_rx_buffer_state
{
103 DECLARE_PCI_UNMAP_ADDR(bus
)
104 DECLARE_PCI_UNMAP_LEN(len
)
107 struct myri10ge_tx_buffer_state
{
110 DECLARE_PCI_UNMAP_ADDR(bus
)
111 DECLARE_PCI_UNMAP_LEN(len
)
114 struct myri10ge_cmd
{
120 struct myri10ge_rx_buf
{
121 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
122 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
123 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
124 struct myri10ge_rx_buffer_state
*info
;
131 int mask
; /* number of rx slots -1 */
135 struct myri10ge_tx_buf
{
136 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
137 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
138 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
140 struct myri10ge_tx_buffer_state
*info
;
141 int mask
; /* number of transmit slots -1 */
142 int boundary
; /* boundary transmits cannot cross */
143 int req ____cacheline_aligned
; /* transmit slots submitted */
144 int pkt_start
; /* packets started */
145 int done ____cacheline_aligned
; /* transmit slots completed */
146 int pkt_done
; /* packets completed */
149 struct myri10ge_rx_done
{
150 struct mcp_slot
*entry
;
156 struct myri10ge_priv
{
157 int running
; /* running? */
158 int csum_flag
; /* rx_csums? */
159 struct myri10ge_tx_buf tx
; /* transmit ring */
160 struct myri10ge_rx_buf rx_small
;
161 struct myri10ge_rx_buf rx_big
;
162 struct myri10ge_rx_done rx_done
;
165 struct net_device
*dev
;
166 struct net_device_stats stats
;
169 unsigned long board_span
;
170 unsigned long iomem_base
;
171 __be32 __iomem
*irq_claim
;
172 __be32 __iomem
*irq_deassert
;
173 char *mac_addr_string
;
174 struct mcp_cmd_response
*cmd
;
176 struct mcp_irq_data
*fw_stats
;
177 dma_addr_t fw_stats_bus
;
178 struct pci_dev
*pdev
;
181 unsigned int rdma_tags_available
;
183 __be32 __iomem
*intr_coal_delay_ptr
;
189 wait_queue_head_t down_wq
;
190 struct work_struct watchdog_work
;
191 struct timer_list watchdog_timer
;
192 int watchdog_tx_done
;
198 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
199 char fw_version
[128];
203 int adopted_rx_filter_bug
;
204 u8 mac_addr
[6]; /* eeprom mac address */
205 unsigned long serial_number
;
206 int vendor_specific_offset
;
207 int fw_multicast_support
;
215 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
216 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
218 static char *myri10ge_fw_name
= NULL
;
219 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
220 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
222 static int myri10ge_ecrc_enable
= 1;
223 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
224 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
226 static int myri10ge_max_intr_slots
= 1024;
227 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
228 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
230 static int myri10ge_small_bytes
= -1; /* -1 == auto */
231 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
232 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
234 static int myri10ge_msi
= 1; /* enable msi by default */
235 module_param(myri10ge_msi
, int, S_IRUGO
| S_IWUSR
);
236 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
238 static int myri10ge_intr_coal_delay
= 75;
239 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
240 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
242 static int myri10ge_flow_control
= 1;
243 module_param(myri10ge_flow_control
, int, S_IRUGO
);
244 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
246 static int myri10ge_deassert_wait
= 1;
247 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
248 MODULE_PARM_DESC(myri10ge_deassert_wait
,
249 "Wait when deasserting legacy interrupts\n");
251 static int myri10ge_force_firmware
= 0;
252 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
253 MODULE_PARM_DESC(myri10ge_force_firmware
,
254 "Force firmware to assume aligned completions\n");
256 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
257 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
258 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
260 static int myri10ge_napi_weight
= 64;
261 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
262 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
264 static int myri10ge_watchdog_timeout
= 1;
265 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
266 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
268 static int myri10ge_max_irq_loops
= 1048576;
269 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
270 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
271 "Set stuck legacy IRQ detection threshold\n");
273 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
275 static int myri10ge_debug
= -1; /* defaults above */
276 module_param(myri10ge_debug
, int, 0);
277 MODULE_PARM_DESC(myri10ge_debug
, "Debug level (0=none,...,16=all)");
279 static int myri10ge_fill_thresh
= 256;
280 module_param(myri10ge_fill_thresh
, int, S_IRUGO
| S_IWUSR
);
281 MODULE_PARM_DESC(myri10ge_fill_thresh
, "Number of empty rx slots allowed\n");
283 static int myri10ge_reset_recover
= 1;
285 static int myri10ge_wcfifo
= 0;
286 module_param(myri10ge_wcfifo
, int, S_IRUGO
);
287 MODULE_PARM_DESC(myri10ge_wcfifo
, "Enable WC Fifo when WC is enabled\n");
289 #define MYRI10GE_FW_OFFSET 1024*1024
290 #define MYRI10GE_HIGHPART_TO_U32(X) \
291 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
292 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
294 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
296 static void myri10ge_set_multicast_list(struct net_device
*dev
);
298 static inline void put_be32(__be32 val
, __be32 __iomem
* p
)
300 __raw_writel((__force __u32
) val
, (__force
void __iomem
*)p
);
304 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
305 struct myri10ge_cmd
*data
, int atomic
)
308 char buf_bytes
[sizeof(*buf
) + 8];
309 struct mcp_cmd_response
*response
= mgp
->cmd
;
310 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_ETH_CMD
;
311 u32 dma_low
, dma_high
, result
, value
;
314 /* ensure buf is aligned to 8 bytes */
315 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
317 buf
->data0
= htonl(data
->data0
);
318 buf
->data1
= htonl(data
->data1
);
319 buf
->data2
= htonl(data
->data2
);
320 buf
->cmd
= htonl(cmd
);
321 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
322 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
324 buf
->response_addr
.low
= htonl(dma_low
);
325 buf
->response_addr
.high
= htonl(dma_high
);
326 response
->result
= htonl(MYRI10GE_NO_RESPONSE_RESULT
);
328 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
330 /* wait up to 15ms. Longest command is the DMA benchmark,
331 * which is capped at 5ms, but runs from a timeout handler
332 * that runs every 7.8ms. So a 15ms timeout leaves us with
336 /* if atomic is set, do not sleep,
337 * and try to get the completion quickly
338 * (1ms will be enough for those commands) */
339 for (sleep_total
= 0;
341 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
345 /* use msleep for most command */
346 for (sleep_total
= 0;
348 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
353 result
= ntohl(response
->result
);
354 value
= ntohl(response
->data
);
355 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
359 } else if (result
== MXGEFW_CMD_UNKNOWN
) {
361 } else if (result
== MXGEFW_CMD_ERROR_UNALIGNED
) {
364 dev_err(&mgp
->pdev
->dev
,
365 "command %d failed, result = %d\n",
371 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
377 * The eeprom strings on the lanaiX have the format
380 * PT:ddd mmm xx xx:xx:xx xx\0
381 * PV:ddd mmm xx xx:xx:xx xx\0
383 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
388 ptr
= mgp
->eeprom_strings
;
389 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
391 while (*ptr
!= '\0' && ptr
< limit
) {
392 if (memcmp(ptr
, "MAC=", 4) == 0) {
394 mgp
->mac_addr_string
= ptr
;
395 for (i
= 0; i
< 6; i
++) {
396 if ((ptr
+ 2) > limit
)
399 simple_strtoul(ptr
, &ptr
, 16);
403 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
405 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
407 while (ptr
< limit
&& *ptr
++) ;
413 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
418 * Enable or disable periodic RDMAs from the host to make certain
419 * chipsets resend dropped PCIe messages
422 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
424 char __iomem
*submit
;
426 u32 dma_low
, dma_high
;
429 /* clear confirmation addr */
433 /* send a rdma command to the PCIe engine, and wait for the
434 * response in the confirmation address. The firmware should
435 * write a -1 there to indicate it is alive and well
437 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
438 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
440 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
441 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
442 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
443 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
444 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
445 buf
[5] = htonl(enable
); /* enable? */
447 submit
= mgp
->sram
+ MXGEFW_BOOT_DUMMY_RDMA
;
449 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
450 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
452 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
453 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
454 (enable
? "enable" : "disable"));
458 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
459 struct mcp_gen_header
*hdr
)
461 struct device
*dev
= &mgp
->pdev
->dev
;
463 /* check firmware type */
464 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
465 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
469 /* save firmware version for ethtool */
470 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
472 sscanf(mgp
->fw_version
, "%d.%d.%d", &mgp
->fw_ver_major
,
473 &mgp
->fw_ver_minor
, &mgp
->fw_ver_tiny
);
475 if (!(mgp
->fw_ver_major
== MXGEFW_VERSION_MAJOR
476 && mgp
->fw_ver_minor
== MXGEFW_VERSION_MINOR
)) {
477 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
478 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
479 MXGEFW_VERSION_MINOR
);
485 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
487 unsigned crc
, reread_crc
;
488 const struct firmware
*fw
;
489 struct device
*dev
= &mgp
->pdev
->dev
;
490 struct mcp_gen_header
*hdr
;
495 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
496 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
499 goto abort_with_nothing
;
504 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
505 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
506 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
512 hdr_offset
= ntohl(*(__be32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
513 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
514 dev_err(dev
, "Bad firmware file\n");
518 hdr
= (void *)(fw
->data
+ hdr_offset
);
520 status
= myri10ge_validate_firmware(mgp
, hdr
);
524 crc
= crc32(~0, fw
->data
, fw
->size
);
525 for (i
= 0; i
< fw
->size
; i
+= 256) {
526 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
528 min(256U, (unsigned)(fw
->size
- i
)));
532 /* corruption checking is good for parity recovery and buggy chipset */
533 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
534 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
535 if (crc
!= reread_crc
) {
536 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
537 (unsigned)fw
->size
, reread_crc
, crc
);
541 *size
= (u32
) fw
->size
;
544 release_firmware(fw
);
550 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
552 struct mcp_gen_header
*hdr
;
553 struct device
*dev
= &mgp
->pdev
->dev
;
554 const size_t bytes
= sizeof(struct mcp_gen_header
);
558 /* find running firmware header */
559 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
561 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
562 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
567 /* copy header of running firmware from SRAM to host memory to
568 * validate firmware */
569 hdr
= kmalloc(bytes
, GFP_KERNEL
);
571 dev_err(dev
, "could not malloc firmware hdr\n");
574 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
575 status
= myri10ge_validate_firmware(mgp
, hdr
);
578 /* check to see if adopted firmware has bug where adopting
579 * it will cause broadcasts to be filtered unless the NIC
580 * is kept in ALLMULTI mode */
581 if (mgp
->fw_ver_major
== 1 && mgp
->fw_ver_minor
== 4 &&
582 mgp
->fw_ver_tiny
>= 4 && mgp
->fw_ver_tiny
<= 11) {
583 mgp
->adopted_rx_filter_bug
= 1;
584 dev_warn(dev
, "Adopting fw %d.%d.%d: "
585 "working around rx filter bug\n",
586 mgp
->fw_ver_major
, mgp
->fw_ver_minor
,
592 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
594 char __iomem
*submit
;
596 u32 dma_low
, dma_high
, size
;
600 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
602 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
604 /* Do not attempt to adopt firmware if there
609 status
= myri10ge_adopt_running_firmware(mgp
);
611 dev_err(&mgp
->pdev
->dev
,
612 "failed to adopt running firmware\n");
615 dev_info(&mgp
->pdev
->dev
,
616 "Successfully adopted running firmware\n");
617 if (mgp
->tx
.boundary
== 4096) {
618 dev_warn(&mgp
->pdev
->dev
,
619 "Using firmware currently running on NIC"
621 dev_warn(&mgp
->pdev
->dev
,
622 "performance consider loading optimized "
624 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
627 mgp
->fw_name
= "adopted";
628 mgp
->tx
.boundary
= 2048;
632 /* clear confirmation addr */
636 /* send a reload command to the bootstrap MCP, and wait for the
637 * response in the confirmation address. The firmware should
638 * write a -1 there to indicate it is alive and well
640 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
641 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
643 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
644 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
645 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
647 /* FIX: All newest firmware should un-protect the bottom of
648 * the sram before handoff. However, the very first interfaces
649 * do not. Therefore the handoff copy must skip the first 8 bytes
651 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
652 buf
[4] = htonl(size
- 8); /* length of code */
653 buf
[5] = htonl(8); /* where to copy to */
654 buf
[6] = htonl(0); /* where to jump to */
656 submit
= mgp
->sram
+ MXGEFW_BOOT_HANDOFF
;
658 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
663 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
667 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
668 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
671 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
672 myri10ge_dummy_rdma(mgp
, 1);
677 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
679 struct myri10ge_cmd cmd
;
682 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
683 | (addr
[2] << 8) | addr
[3]);
685 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
687 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
691 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
693 struct myri10ge_cmd cmd
;
696 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
697 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
701 "myri10ge: %s: Failed to set flow control mode\n",
710 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
712 struct myri10ge_cmd cmd
;
715 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
716 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
718 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
722 static int myri10ge_dma_test(struct myri10ge_priv
*mgp
, int test_type
)
724 struct myri10ge_cmd cmd
;
727 struct page
*dmatest_page
;
728 dma_addr_t dmatest_bus
;
731 dmatest_page
= alloc_page(GFP_KERNEL
);
734 dmatest_bus
= pci_map_page(mgp
->pdev
, dmatest_page
, 0, PAGE_SIZE
,
737 /* Run a small DMA test.
738 * The magic multipliers to the length tell the firmware
739 * to do DMA read, write, or read+write tests. The
740 * results are returned in cmd.data0. The upper 16
741 * bits or the return is the number of transfers completed.
742 * The lower 16 bits is the time in 0.5us ticks that the
743 * transfers took to complete.
746 len
= mgp
->tx
.boundary
;
748 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
749 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
750 cmd
.data2
= len
* 0x10000;
751 status
= myri10ge_send_cmd(mgp
, test_type
, &cmd
, 0);
756 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) / (cmd
.data0
& 0xffff);
757 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
758 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
759 cmd
.data2
= len
* 0x1;
760 status
= myri10ge_send_cmd(mgp
, test_type
, &cmd
, 0);
765 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) / (cmd
.data0
& 0xffff);
767 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
768 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
769 cmd
.data2
= len
* 0x10001;
770 status
= myri10ge_send_cmd(mgp
, test_type
, &cmd
, 0);
775 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
776 (cmd
.data0
& 0xffff);
779 pci_unmap_page(mgp
->pdev
, dmatest_bus
, PAGE_SIZE
, DMA_BIDIRECTIONAL
);
780 put_page(dmatest_page
);
782 if (status
!= 0 && test_type
!= MXGEFW_CMD_UNALIGNED_TEST
)
783 dev_warn(&mgp
->pdev
->dev
, "DMA %s benchmark failed: %d\n",
789 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
791 struct myri10ge_cmd cmd
;
795 /* try to send a reset command to the card to see if it
797 memset(&cmd
, 0, sizeof(cmd
));
798 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
800 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
804 (void)myri10ge_dma_test(mgp
, MXGEFW_DMA_TEST
);
806 /* Now exchange information about interrupts */
808 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
809 memset(mgp
->rx_done
.entry
, 0, bytes
);
810 cmd
.data0
= (u32
) bytes
;
811 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
812 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
813 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
814 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
817 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
818 mgp
->irq_claim
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
819 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
,
821 mgp
->irq_deassert
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
823 status
|= myri10ge_send_cmd
824 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
825 mgp
->intr_coal_delay_ptr
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
827 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
830 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
832 memset(mgp
->rx_done
.entry
, 0, bytes
);
834 /* reset mcp/driver shared state back to 0 */
837 mgp
->tx
.pkt_start
= 0;
838 mgp
->tx
.pkt_done
= 0;
840 mgp
->rx_small
.cnt
= 0;
841 mgp
->rx_done
.idx
= 0;
842 mgp
->rx_done
.cnt
= 0;
843 mgp
->link_changes
= 0;
844 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
845 myri10ge_change_pause(mgp
, mgp
->pause
);
846 myri10ge_set_multicast_list(mgp
->dev
);
851 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
852 struct mcp_kreq_ether_recv
*src
)
857 src
->addr_low
= htonl(DMA_32BIT_MASK
);
858 myri10ge_pio_copy(dst
, src
, 4 * sizeof(*src
));
860 myri10ge_pio_copy(dst
+ 4, src
+ 4, 4 * sizeof(*src
));
863 put_be32(low
, &dst
->addr_low
);
867 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, __wsum hw_csum
)
869 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
871 if ((skb
->protocol
== htons(ETH_P_8021Q
)) &&
872 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
873 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
875 skb
->ip_summed
= CHECKSUM_COMPLETE
;
880 myri10ge_rx_skb_build(struct sk_buff
*skb
, u8
* va
,
881 struct skb_frag_struct
*rx_frags
, int len
, int hlen
)
883 struct skb_frag_struct
*skb_frags
;
885 skb
->len
= skb
->data_len
= len
;
886 skb
->truesize
= len
+ sizeof(struct sk_buff
);
887 /* attach the page(s) */
889 skb_frags
= skb_shinfo(skb
)->frags
;
891 memcpy(skb_frags
, rx_frags
, sizeof(*skb_frags
));
892 len
-= rx_frags
->size
;
895 skb_shinfo(skb
)->nr_frags
++;
898 /* pskb_may_pull is not available in irq context, but
899 * skb_pull() (for ether_pad and eth_type_trans()) requires
900 * the beginning of the packet in skb_headlen(), move it
902 skb_copy_to_linear_data(skb
, va
, hlen
);
903 skb_shinfo(skb
)->frags
[0].page_offset
+= hlen
;
904 skb_shinfo(skb
)->frags
[0].size
-= hlen
;
905 skb
->data_len
-= hlen
;
907 skb_pull(skb
, MXGEFW_PAD
);
911 myri10ge_alloc_rx_pages(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
912 int bytes
, int watchdog
)
917 if (unlikely(rx
->watchdog_needed
&& !watchdog
))
920 /* try to refill entire ring */
921 while (rx
->fill_cnt
!= (rx
->cnt
+ rx
->mask
+ 1)) {
922 idx
= rx
->fill_cnt
& rx
->mask
;
923 if (rx
->page_offset
+ bytes
<= MYRI10GE_ALLOC_SIZE
) {
924 /* we can use part of previous page */
927 /* we need a new page */
929 alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
930 MYRI10GE_ALLOC_ORDER
);
931 if (unlikely(page
== NULL
)) {
932 if (rx
->fill_cnt
- rx
->cnt
< 16)
933 rx
->watchdog_needed
= 1;
938 rx
->bus
= pci_map_page(mgp
->pdev
, page
, 0,
942 rx
->info
[idx
].page
= rx
->page
;
943 rx
->info
[idx
].page_offset
= rx
->page_offset
;
944 /* note that this is the address of the start of the
946 pci_unmap_addr_set(&rx
->info
[idx
], bus
, rx
->bus
);
947 rx
->shadow
[idx
].addr_low
=
948 htonl(MYRI10GE_LOWPART_TO_U32(rx
->bus
) + rx
->page_offset
);
949 rx
->shadow
[idx
].addr_high
=
950 htonl(MYRI10GE_HIGHPART_TO_U32(rx
->bus
));
952 /* start next packet on a cacheline boundary */
953 rx
->page_offset
+= SKB_DATA_ALIGN(bytes
);
955 #if MYRI10GE_ALLOC_SIZE > 4096
956 /* don't cross a 4KB boundary */
957 if ((rx
->page_offset
>> 12) !=
958 ((rx
->page_offset
+ bytes
- 1) >> 12))
959 rx
->page_offset
= (rx
->page_offset
+ 4096) & ~4095;
963 /* copy 8 descriptors to the firmware at a time */
964 if ((idx
& 7) == 7) {
965 if (rx
->wc_fifo
== NULL
)
966 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
967 &rx
->shadow
[idx
- 7]);
970 myri10ge_pio_copy(rx
->wc_fifo
,
971 &rx
->shadow
[idx
- 7], 64);
978 myri10ge_unmap_rx_page(struct pci_dev
*pdev
,
979 struct myri10ge_rx_buffer_state
*info
, int bytes
)
981 /* unmap the recvd page if we're the only or last user of it */
982 if (bytes
>= MYRI10GE_ALLOC_SIZE
/ 2 ||
983 (info
->page_offset
+ 2 * bytes
) > MYRI10GE_ALLOC_SIZE
) {
984 pci_unmap_page(pdev
, (pci_unmap_addr(info
, bus
)
985 & ~(MYRI10GE_ALLOC_SIZE
- 1)),
986 MYRI10GE_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
990 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
991 * page into an skb */
994 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
995 int bytes
, int len
, __wsum csum
)
998 struct skb_frag_struct rx_frags
[MYRI10GE_MAX_FRAGS_PER_FRAME
];
999 int i
, idx
, hlen
, remainder
;
1000 struct pci_dev
*pdev
= mgp
->pdev
;
1001 struct net_device
*dev
= mgp
->dev
;
1005 idx
= rx
->cnt
& rx
->mask
;
1006 va
= page_address(rx
->info
[idx
].page
) + rx
->info
[idx
].page_offset
;
1008 /* Fill skb_frag_struct(s) with data from our receive */
1009 for (i
= 0, remainder
= len
; remainder
> 0; i
++) {
1010 myri10ge_unmap_rx_page(pdev
, &rx
->info
[idx
], bytes
);
1011 rx_frags
[i
].page
= rx
->info
[idx
].page
;
1012 rx_frags
[i
].page_offset
= rx
->info
[idx
].page_offset
;
1013 if (remainder
< MYRI10GE_ALLOC_SIZE
)
1014 rx_frags
[i
].size
= remainder
;
1016 rx_frags
[i
].size
= MYRI10GE_ALLOC_SIZE
;
1018 idx
= rx
->cnt
& rx
->mask
;
1019 remainder
-= MYRI10GE_ALLOC_SIZE
;
1022 hlen
= MYRI10GE_HLEN
> len
? len
: MYRI10GE_HLEN
;
1024 /* allocate an skb to attach the page(s) to. */
1026 skb
= netdev_alloc_skb(dev
, MYRI10GE_HLEN
+ 16);
1027 if (unlikely(skb
== NULL
)) {
1028 mgp
->stats
.rx_dropped
++;
1031 put_page(rx_frags
[i
].page
);
1036 /* Attach the pages to the skb, and trim off any padding */
1037 myri10ge_rx_skb_build(skb
, va
, rx_frags
, len
, hlen
);
1038 if (skb_shinfo(skb
)->frags
[0].size
<= 0) {
1039 put_page(skb_shinfo(skb
)->frags
[0].page
);
1040 skb_shinfo(skb
)->nr_frags
= 0;
1042 skb
->protocol
= eth_type_trans(skb
, dev
);
1044 if (mgp
->csum_flag
) {
1045 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
1046 (skb
->protocol
== htons(ETH_P_IPV6
))) {
1048 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1050 myri10ge_vlan_ip_csum(skb
, csum
);
1052 netif_receive_skb(skb
);
1053 dev
->last_rx
= jiffies
;
1057 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
1059 struct pci_dev
*pdev
= mgp
->pdev
;
1060 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1061 struct sk_buff
*skb
;
1064 while (tx
->pkt_done
!= mcp_index
) {
1065 idx
= tx
->done
& tx
->mask
;
1066 skb
= tx
->info
[idx
].skb
;
1069 tx
->info
[idx
].skb
= NULL
;
1070 if (tx
->info
[idx
].last
) {
1072 tx
->info
[idx
].last
= 0;
1075 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1076 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1078 mgp
->stats
.tx_bytes
+= skb
->len
;
1079 mgp
->stats
.tx_packets
++;
1080 dev_kfree_skb_irq(skb
);
1082 pci_unmap_single(pdev
,
1083 pci_unmap_addr(&tx
->info
[idx
],
1088 pci_unmap_page(pdev
,
1089 pci_unmap_addr(&tx
->info
[idx
],
1094 /* start the queue if we've stopped it */
1095 if (netif_queue_stopped(mgp
->dev
)
1096 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1098 netif_wake_queue(mgp
->dev
);
1102 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1104 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1105 unsigned long rx_bytes
= 0;
1106 unsigned long rx_packets
= 0;
1107 unsigned long rx_ok
;
1109 int idx
= rx_done
->idx
;
1110 int cnt
= rx_done
->cnt
;
1114 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1115 length
= ntohs(rx_done
->entry
[idx
].length
);
1116 rx_done
->entry
[idx
].length
= 0;
1117 checksum
= csum_unfold(rx_done
->entry
[idx
].checksum
);
1118 if (length
<= mgp
->small_bytes
)
1119 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1123 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1126 rx_packets
+= rx_ok
;
1127 rx_bytes
+= rx_ok
* (unsigned long)length
;
1129 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1131 /* limit potential for livelock by only handling a
1132 * limited number of frames. */
1137 mgp
->stats
.rx_packets
+= rx_packets
;
1138 mgp
->stats
.rx_bytes
+= rx_bytes
;
1140 /* restock receive rings if needed */
1141 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
< myri10ge_fill_thresh
)
1142 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1143 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1144 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
< myri10ge_fill_thresh
)
1145 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1149 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1151 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1153 if (unlikely(stats
->stats_updated
)) {
1154 unsigned link_up
= ntohl(stats
->link_up
);
1155 if (mgp
->link_state
!= link_up
) {
1156 mgp
->link_state
= link_up
;
1158 if (mgp
->link_state
== MXGEFW_LINK_UP
) {
1159 if (netif_msg_link(mgp
))
1161 "myri10ge: %s: link up\n",
1163 netif_carrier_on(mgp
->dev
);
1164 mgp
->link_changes
++;
1166 if (netif_msg_link(mgp
))
1168 "myri10ge: %s: link %s\n",
1170 (link_up
== MXGEFW_LINK_MYRINET
?
1171 "mismatch (Myrinet detected)" :
1173 netif_carrier_off(mgp
->dev
);
1174 mgp
->link_changes
++;
1177 if (mgp
->rdma_tags_available
!=
1178 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1179 mgp
->rdma_tags_available
=
1180 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1181 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1182 "%d tags left\n", mgp
->dev
->name
,
1183 mgp
->rdma_tags_available
);
1185 mgp
->down_cnt
+= stats
->link_down
;
1186 if (stats
->link_down
)
1187 wake_up(&mgp
->down_wq
);
1191 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1193 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1194 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1195 int limit
, orig_limit
, work_done
;
1197 /* process as many rx events as NAPI will allow */
1198 limit
= min(*budget
, netdev
->quota
);
1200 myri10ge_clean_rx_done(mgp
, &limit
);
1201 work_done
= orig_limit
- limit
;
1202 *budget
-= work_done
;
1203 netdev
->quota
-= work_done
;
1205 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1206 netif_rx_complete(netdev
);
1207 put_be32(htonl(3), mgp
->irq_claim
);
1213 static irqreturn_t
myri10ge_intr(int irq
, void *arg
)
1215 struct myri10ge_priv
*mgp
= arg
;
1216 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1217 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1218 u32 send_done_count
;
1221 /* make sure it is our IRQ, and that the DMA has finished */
1222 if (unlikely(!stats
->valid
))
1225 /* low bit indicates receives are present, so schedule
1226 * napi poll handler */
1227 if (stats
->valid
& 1)
1228 netif_rx_schedule(mgp
->dev
);
1230 if (!mgp
->msi_enabled
) {
1231 put_be32(0, mgp
->irq_deassert
);
1232 if (!myri10ge_deassert_wait
)
1238 /* Wait for IRQ line to go low, if using INTx */
1242 /* check for transmit completes and receives */
1243 send_done_count
= ntohl(stats
->send_done_count
);
1244 if (send_done_count
!= tx
->pkt_done
)
1245 myri10ge_tx_done(mgp
, (int)send_done_count
);
1246 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1247 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1250 schedule_work(&mgp
->watchdog_work
);
1252 if (likely(stats
->valid
== 0))
1258 myri10ge_check_statblock(mgp
);
1260 put_be32(htonl(3), mgp
->irq_claim
+ 1);
1261 return (IRQ_HANDLED
);
1265 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1267 cmd
->autoneg
= AUTONEG_DISABLE
;
1268 cmd
->speed
= SPEED_10000
;
1269 cmd
->duplex
= DUPLEX_FULL
;
1274 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1276 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1278 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1279 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1280 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1281 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1285 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1287 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1288 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1293 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1295 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1297 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1298 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1303 myri10ge_get_pauseparam(struct net_device
*netdev
,
1304 struct ethtool_pauseparam
*pause
)
1306 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1309 pause
->rx_pause
= mgp
->pause
;
1310 pause
->tx_pause
= mgp
->pause
;
1314 myri10ge_set_pauseparam(struct net_device
*netdev
,
1315 struct ethtool_pauseparam
*pause
)
1317 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1319 if (pause
->tx_pause
!= mgp
->pause
)
1320 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1321 if (pause
->rx_pause
!= mgp
->pause
)
1322 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1323 if (pause
->autoneg
!= 0)
1329 myri10ge_get_ringparam(struct net_device
*netdev
,
1330 struct ethtool_ringparam
*ring
)
1332 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1334 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1335 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1336 ring
->rx_jumbo_max_pending
= 0;
1337 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1338 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1339 ring
->rx_pending
= ring
->rx_max_pending
;
1340 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1341 ring
->tx_pending
= ring
->tx_max_pending
;
1344 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1346 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1353 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1355 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1357 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1363 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1364 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1365 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1366 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1367 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1368 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1369 "tx_heartbeat_errors", "tx_window_errors",
1370 /* device-specific stats */
1371 "tx_boundary", "WC", "irq", "MSI",
1372 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1373 "serial_number", "tx_pkt_start", "tx_pkt_done",
1374 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1375 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1376 "link_changes", "link_up", "dropped_link_overflow",
1377 "dropped_link_error_or_filtered",
1378 "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1379 "dropped_unicast_filtered", "dropped_multicast_filtered",
1380 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1381 "dropped_no_big_buffer"
1384 #define MYRI10GE_NET_STATS_LEN 21
1385 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1388 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1390 switch (stringset
) {
1392 memcpy(data
, *myri10ge_gstrings_stats
,
1393 sizeof(myri10ge_gstrings_stats
));
1398 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1400 return MYRI10GE_STATS_LEN
;
1404 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1405 struct ethtool_stats
*stats
, u64
* data
)
1407 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1410 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1411 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1413 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1414 data
[i
++] = (unsigned int)mgp
->wc_enabled
;
1415 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1416 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1417 data
[i
++] = (unsigned int)mgp
->read_dma
;
1418 data
[i
++] = (unsigned int)mgp
->write_dma
;
1419 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1420 data
[i
++] = (unsigned int)mgp
->serial_number
;
1421 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1422 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1423 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1424 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1425 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1426 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1427 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1428 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1429 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1430 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1431 data
[i
++] = (unsigned int)mgp
->link_changes
;
1432 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1433 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1435 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1436 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_pause
);
1437 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_bad_phy
);
1438 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_bad_crc32
);
1440 (unsigned int)ntohl(mgp
->fw_stats
->dropped_unicast_filtered
);
1442 (unsigned int)ntohl(mgp
->fw_stats
->dropped_multicast_filtered
);
1443 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1444 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1445 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1446 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1449 static void myri10ge_set_msglevel(struct net_device
*netdev
, u32 value
)
1451 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1452 mgp
->msg_enable
= value
;
1455 static u32
myri10ge_get_msglevel(struct net_device
*netdev
)
1457 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1458 return mgp
->msg_enable
;
1461 static const struct ethtool_ops myri10ge_ethtool_ops
= {
1462 .get_settings
= myri10ge_get_settings
,
1463 .get_drvinfo
= myri10ge_get_drvinfo
,
1464 .get_coalesce
= myri10ge_get_coalesce
,
1465 .set_coalesce
= myri10ge_set_coalesce
,
1466 .get_pauseparam
= myri10ge_get_pauseparam
,
1467 .set_pauseparam
= myri10ge_set_pauseparam
,
1468 .get_ringparam
= myri10ge_get_ringparam
,
1469 .get_rx_csum
= myri10ge_get_rx_csum
,
1470 .set_rx_csum
= myri10ge_set_rx_csum
,
1471 .get_tx_csum
= ethtool_op_get_tx_csum
,
1472 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1473 .get_sg
= ethtool_op_get_sg
,
1474 .set_sg
= ethtool_op_set_sg
,
1475 .get_tso
= ethtool_op_get_tso
,
1476 .set_tso
= ethtool_op_set_tso
,
1477 .get_link
= ethtool_op_get_link
,
1478 .get_strings
= myri10ge_get_strings
,
1479 .get_stats_count
= myri10ge_get_stats_count
,
1480 .get_ethtool_stats
= myri10ge_get_ethtool_stats
,
1481 .set_msglevel
= myri10ge_set_msglevel
,
1482 .get_msglevel
= myri10ge_get_msglevel
1485 static int myri10ge_allocate_rings(struct net_device
*dev
)
1487 struct myri10ge_priv
*mgp
;
1488 struct myri10ge_cmd cmd
;
1489 int tx_ring_size
, rx_ring_size
;
1490 int tx_ring_entries
, rx_ring_entries
;
1494 mgp
= netdev_priv(dev
);
1496 /* get ring sizes */
1498 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1499 tx_ring_size
= cmd
.data0
;
1500 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1503 rx_ring_size
= cmd
.data0
;
1505 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1506 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1507 mgp
->tx
.mask
= tx_ring_entries
- 1;
1508 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1512 /* allocate the host shadow rings */
1514 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1515 * sizeof(*mgp
->tx
.req_list
);
1516 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1517 if (mgp
->tx
.req_bytes
== NULL
)
1518 goto abort_with_nothing
;
1520 /* ensure req_list entries are aligned to 8 bytes */
1521 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1522 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1524 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1525 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1526 if (mgp
->rx_small
.shadow
== NULL
)
1527 goto abort_with_tx_req_bytes
;
1529 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1530 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1531 if (mgp
->rx_big
.shadow
== NULL
)
1532 goto abort_with_rx_small_shadow
;
1534 /* allocate the host info rings */
1536 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1537 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1538 if (mgp
->tx
.info
== NULL
)
1539 goto abort_with_rx_big_shadow
;
1541 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1542 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1543 if (mgp
->rx_small
.info
== NULL
)
1544 goto abort_with_tx_info
;
1546 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1547 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1548 if (mgp
->rx_big
.info
== NULL
)
1549 goto abort_with_rx_small_info
;
1551 /* Fill the receive rings */
1552 mgp
->rx_big
.cnt
= 0;
1553 mgp
->rx_small
.cnt
= 0;
1554 mgp
->rx_big
.fill_cnt
= 0;
1555 mgp
->rx_small
.fill_cnt
= 0;
1556 mgp
->rx_small
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1557 mgp
->rx_big
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1558 mgp
->rx_small
.watchdog_needed
= 0;
1559 mgp
->rx_big
.watchdog_needed
= 0;
1560 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1561 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1563 if (mgp
->rx_small
.fill_cnt
< mgp
->rx_small
.mask
+ 1) {
1564 printk(KERN_ERR
"myri10ge: %s: alloced only %d small bufs\n",
1565 dev
->name
, mgp
->rx_small
.fill_cnt
);
1566 goto abort_with_rx_small_ring
;
1569 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1570 if (mgp
->rx_big
.fill_cnt
< mgp
->rx_big
.mask
+ 1) {
1571 printk(KERN_ERR
"myri10ge: %s: alloced only %d big bufs\n",
1572 dev
->name
, mgp
->rx_big
.fill_cnt
);
1573 goto abort_with_rx_big_ring
;
1578 abort_with_rx_big_ring
:
1579 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1580 int idx
= i
& mgp
->rx_big
.mask
;
1581 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1583 put_page(mgp
->rx_big
.info
[idx
].page
);
1586 abort_with_rx_small_ring
:
1587 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1588 int idx
= i
& mgp
->rx_small
.mask
;
1589 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1590 mgp
->small_bytes
+ MXGEFW_PAD
);
1591 put_page(mgp
->rx_small
.info
[idx
].page
);
1594 kfree(mgp
->rx_big
.info
);
1596 abort_with_rx_small_info
:
1597 kfree(mgp
->rx_small
.info
);
1600 kfree(mgp
->tx
.info
);
1602 abort_with_rx_big_shadow
:
1603 kfree(mgp
->rx_big
.shadow
);
1605 abort_with_rx_small_shadow
:
1606 kfree(mgp
->rx_small
.shadow
);
1608 abort_with_tx_req_bytes
:
1609 kfree(mgp
->tx
.req_bytes
);
1610 mgp
->tx
.req_bytes
= NULL
;
1611 mgp
->tx
.req_list
= NULL
;
1617 static void myri10ge_free_rings(struct net_device
*dev
)
1619 struct myri10ge_priv
*mgp
;
1620 struct sk_buff
*skb
;
1621 struct myri10ge_tx_buf
*tx
;
1624 mgp
= netdev_priv(dev
);
1626 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1627 idx
= i
& mgp
->rx_big
.mask
;
1628 if (i
== mgp
->rx_big
.fill_cnt
- 1)
1629 mgp
->rx_big
.info
[idx
].page_offset
= MYRI10GE_ALLOC_SIZE
;
1630 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1632 put_page(mgp
->rx_big
.info
[idx
].page
);
1635 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1636 idx
= i
& mgp
->rx_small
.mask
;
1637 if (i
== mgp
->rx_small
.fill_cnt
- 1)
1638 mgp
->rx_small
.info
[idx
].page_offset
=
1639 MYRI10GE_ALLOC_SIZE
;
1640 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1641 mgp
->small_bytes
+ MXGEFW_PAD
);
1642 put_page(mgp
->rx_small
.info
[idx
].page
);
1645 while (tx
->done
!= tx
->req
) {
1646 idx
= tx
->done
& tx
->mask
;
1647 skb
= tx
->info
[idx
].skb
;
1650 tx
->info
[idx
].skb
= NULL
;
1652 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1653 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1655 mgp
->stats
.tx_dropped
++;
1656 dev_kfree_skb_any(skb
);
1658 pci_unmap_single(mgp
->pdev
,
1659 pci_unmap_addr(&tx
->info
[idx
],
1664 pci_unmap_page(mgp
->pdev
,
1665 pci_unmap_addr(&tx
->info
[idx
],
1670 kfree(mgp
->rx_big
.info
);
1672 kfree(mgp
->rx_small
.info
);
1674 kfree(mgp
->tx
.info
);
1676 kfree(mgp
->rx_big
.shadow
);
1678 kfree(mgp
->rx_small
.shadow
);
1680 kfree(mgp
->tx
.req_bytes
);
1681 mgp
->tx
.req_bytes
= NULL
;
1682 mgp
->tx
.req_list
= NULL
;
1685 static int myri10ge_request_irq(struct myri10ge_priv
*mgp
)
1687 struct pci_dev
*pdev
= mgp
->pdev
;
1691 status
= pci_enable_msi(pdev
);
1694 "Error %d setting up MSI; falling back to xPIC\n",
1697 mgp
->msi_enabled
= 1;
1699 mgp
->msi_enabled
= 0;
1701 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
1702 mgp
->dev
->name
, mgp
);
1704 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
1705 if (mgp
->msi_enabled
)
1706 pci_disable_msi(pdev
);
1711 static void myri10ge_free_irq(struct myri10ge_priv
*mgp
)
1713 struct pci_dev
*pdev
= mgp
->pdev
;
1715 free_irq(pdev
->irq
, mgp
);
1716 if (mgp
->msi_enabled
)
1717 pci_disable_msi(pdev
);
1720 static int myri10ge_open(struct net_device
*dev
)
1722 struct myri10ge_priv
*mgp
;
1723 struct myri10ge_cmd cmd
;
1724 int status
, big_pow2
;
1726 mgp
= netdev_priv(dev
);
1728 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1731 mgp
->running
= MYRI10GE_ETH_STARTING
;
1732 status
= myri10ge_reset(mgp
);
1734 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1735 goto abort_with_nothing
;
1738 status
= myri10ge_request_irq(mgp
);
1740 goto abort_with_nothing
;
1742 /* decide what small buffer size to use. For good TCP rx
1743 * performance, it is important to not receive 1514 byte
1744 * frames into jumbo buffers, as it confuses the socket buffer
1745 * accounting code, leading to drops and erratic performance.
1748 if (dev
->mtu
<= ETH_DATA_LEN
)
1749 /* enough for a TCP header */
1750 mgp
->small_bytes
= (128 > SMP_CACHE_BYTES
)
1751 ? (128 - MXGEFW_PAD
)
1752 : (SMP_CACHE_BYTES
- MXGEFW_PAD
);
1754 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1755 mgp
->small_bytes
= VLAN_ETH_FRAME_LEN
;
1757 /* Override the small buffer size? */
1758 if (myri10ge_small_bytes
> 0)
1759 mgp
->small_bytes
= myri10ge_small_bytes
;
1761 /* get the lanai pointers to the send and receive rings */
1763 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1765 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1768 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1769 mgp
->rx_small
.lanai
=
1770 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1772 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1774 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1778 "myri10ge: %s: failed to get ring sizes or locations\n",
1780 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1781 goto abort_with_irq
;
1784 if (myri10ge_wcfifo
&& mgp
->wc_enabled
) {
1785 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_SEND_4
;
1786 mgp
->rx_small
.wc_fifo
=
1787 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_SMALL
;
1788 mgp
->rx_big
.wc_fifo
=
1789 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_BIG
;
1791 mgp
->tx
.wc_fifo
= NULL
;
1792 mgp
->rx_small
.wc_fifo
= NULL
;
1793 mgp
->rx_big
.wc_fifo
= NULL
;
1796 /* Firmware needs the big buff size as a power of 2. Lie and
1797 * tell him the buffer is larger, because we only use 1
1798 * buffer/pkt, and the mtu will prevent overruns.
1800 big_pow2
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1801 if (big_pow2
< MYRI10GE_ALLOC_SIZE
/ 2) {
1802 while (!is_power_of_2(big_pow2
))
1804 mgp
->big_bytes
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1806 big_pow2
= MYRI10GE_ALLOC_SIZE
;
1807 mgp
->big_bytes
= big_pow2
;
1810 status
= myri10ge_allocate_rings(dev
);
1812 goto abort_with_irq
;
1814 /* now give firmware buffers sizes, and MTU */
1815 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1816 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1817 cmd
.data0
= mgp
->small_bytes
;
1819 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1820 cmd
.data0
= big_pow2
;
1822 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1824 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1826 goto abort_with_rings
;
1829 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1830 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1831 cmd
.data2
= sizeof(struct mcp_irq_data
);
1832 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA_V2
, &cmd
, 0);
1833 if (status
== -ENOSYS
) {
1834 dma_addr_t bus
= mgp
->fw_stats_bus
;
1835 bus
+= offsetof(struct mcp_irq_data
, send_done_count
);
1836 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(bus
);
1837 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(bus
);
1838 status
= myri10ge_send_cmd(mgp
,
1839 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE
,
1841 /* Firmware cannot support multicast without STATS_DMA_V2 */
1842 mgp
->fw_multicast_support
= 0;
1844 mgp
->fw_multicast_support
= 1;
1847 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1849 goto abort_with_rings
;
1852 mgp
->link_state
= htonl(~0U);
1853 mgp
->rdma_tags_available
= 15;
1855 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1857 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1859 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1861 goto abort_with_rings
;
1864 mgp
->wake_queue
= 0;
1865 mgp
->stop_queue
= 0;
1866 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1867 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1868 add_timer(&mgp
->watchdog_timer
);
1869 netif_wake_queue(dev
);
1873 myri10ge_free_rings(dev
);
1876 myri10ge_free_irq(mgp
);
1879 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1883 static int myri10ge_close(struct net_device
*dev
)
1885 struct myri10ge_priv
*mgp
;
1886 struct myri10ge_cmd cmd
;
1887 int status
, old_down_cnt
;
1889 mgp
= netdev_priv(dev
);
1891 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1894 if (mgp
->tx
.req_bytes
== NULL
)
1897 del_timer_sync(&mgp
->watchdog_timer
);
1898 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1899 netif_poll_disable(mgp
->dev
);
1900 netif_carrier_off(dev
);
1901 netif_stop_queue(dev
);
1902 old_down_cnt
= mgp
->down_cnt
;
1904 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1906 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
1909 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
1910 if (old_down_cnt
== mgp
->down_cnt
)
1911 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
1913 netif_tx_disable(dev
);
1914 myri10ge_free_irq(mgp
);
1915 myri10ge_free_rings(dev
);
1917 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1921 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1922 * backwards one at a time and handle ring wraps */
1925 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
1926 struct mcp_kreq_ether_send
*src
, int cnt
)
1928 int idx
, starting_slot
;
1929 starting_slot
= tx
->req
;
1932 idx
= (starting_slot
+ cnt
) & tx
->mask
;
1933 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
1939 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1940 * at most 32 bytes at a time, so as to avoid involving the software
1941 * pio handler in the nic. We re-write the first segment's flags
1942 * to mark them valid only after writing the entire chain.
1946 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
1950 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
1951 struct mcp_kreq_ether_send
*srcp
;
1954 idx
= tx
->req
& tx
->mask
;
1956 last_flags
= src
->flags
;
1959 dst
= dstp
= &tx
->lanai
[idx
];
1962 if ((idx
+ cnt
) < tx
->mask
) {
1963 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
1964 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
1965 mb(); /* force write every 32 bytes */
1970 /* submit all but the first request, and ensure
1971 * that it is submitted below */
1972 myri10ge_submit_req_backwards(tx
, src
, cnt
);
1976 /* submit the first request */
1977 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
1978 mb(); /* barrier before setting valid flag */
1981 /* re-write the last 32-bits with the valid flags */
1982 src
->flags
= last_flags
;
1983 put_be32(*((__be32
*) src
+ 3), (__be32 __iomem
*) dst
+ 3);
1989 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
1990 struct mcp_kreq_ether_send
*src
, int cnt
)
1995 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
2001 /* pad it to 64 bytes. The src is 64 bytes bigger than it
2002 * needs to be so that we don't overrun it */
2003 myri10ge_pio_copy(tx
->wc_fifo
+ MXGEFW_ETH_SEND_OFFSET(cnt
),
2010 * Transmit a packet. We need to split the packet so that a single
2011 * segment does not cross myri10ge->tx.boundary, so this makes segment
2012 * counting tricky. So rather than try to count segments up front, we
2013 * just give up if there are too few segments to hold a reasonably
2014 * fragmented packet currently available. If we run
2015 * out of segments while preparing a packet for DMA, we just linearize
2019 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2021 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2022 struct mcp_kreq_ether_send
*req
;
2023 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
2024 struct skb_frag_struct
*frag
;
2027 __be32 high_swapped
;
2029 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
2030 u16 pseudo_hdr_offset
, cksum_offset
;
2031 int cum_len
, seglen
, boundary
, rdma_count
;
2036 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
2039 max_segments
= MXGEFW_MAX_SEND_DESC
;
2041 if (skb_is_gso(skb
)) {
2042 mss
= skb_shinfo(skb
)->gso_size
;
2043 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
2046 if ((unlikely(avail
< max_segments
))) {
2047 /* we are out of transmit resources */
2049 netif_stop_queue(dev
);
2053 /* Setup checksum offloading, if needed */
2055 pseudo_hdr_offset
= 0;
2057 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
2058 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2059 cksum_offset
= skb_transport_offset(skb
);
2060 pseudo_hdr_offset
= cksum_offset
+ skb
->csum_offset
;
2061 /* If the headers are excessively large, then we must
2062 * fall back to a software checksum */
2063 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
2064 if (skb_checksum_help(skb
))
2067 pseudo_hdr_offset
= 0;
2069 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
2070 flags
|= MXGEFW_FLAGS_CKSUM
;
2076 if (mss
) { /* TSO */
2077 /* this removes any CKSUM flag from before */
2078 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
2080 /* negative cum_len signifies to the
2081 * send loop that we are still in the
2082 * header portion of the TSO packet.
2083 * TSO header must be at most 134 bytes long */
2084 cum_len
= -(skb_transport_offset(skb
) + tcp_hdrlen(skb
));
2086 /* for TSO, pseudo_hdr_offset holds mss.
2087 * The firmware figures out where to put
2088 * the checksum by parsing the header. */
2089 pseudo_hdr_offset
= mss
;
2091 /* Mark small packets, and pad out tiny packets */
2092 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
2093 flags
|= MXGEFW_FLAGS_SMALL
;
2095 /* pad frames to at least ETH_ZLEN bytes */
2096 if (unlikely(skb
->len
< ETH_ZLEN
)) {
2097 if (skb_padto(skb
, ETH_ZLEN
)) {
2098 /* The packet is gone, so we must
2100 mgp
->stats
.tx_dropped
+= 1;
2103 /* adjust the len to account for the zero pad
2104 * so that the nic can know how long it is */
2105 skb
->len
= ETH_ZLEN
;
2109 /* map the skb for DMA */
2110 len
= skb
->len
- skb
->data_len
;
2111 idx
= tx
->req
& tx
->mask
;
2112 tx
->info
[idx
].skb
= skb
;
2113 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2114 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2115 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2117 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
2122 /* "rdma_count" is the number of RDMAs belonging to the
2123 * current packet BEFORE the current send request. For
2124 * non-TSO packets, this is equal to "count".
2125 * For TSO packets, rdma_count needs to be reset
2126 * to 0 after a segment cut.
2128 * The rdma_count field of the send request is
2129 * the number of RDMAs of the packet starting at
2130 * that request. For TSO send requests with one ore more cuts
2131 * in the middle, this is the number of RDMAs starting
2132 * after the last cut in the request. All previous
2133 * segments before the last cut implicitly have 1 RDMA.
2135 * Since the number of RDMAs is not known beforehand,
2136 * it must be filled-in retroactively - after each
2137 * segmentation cut or at the end of the entire packet.
2141 /* Break the SKB or Fragment up into pieces which
2142 * do not cross mgp->tx.boundary */
2143 low
= MYRI10GE_LOWPART_TO_U32(bus
);
2144 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
2149 if (unlikely(count
== max_segments
))
2150 goto abort_linearize
;
2152 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2153 seglen
= boundary
- low
;
2156 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2157 cum_len_next
= cum_len
+ seglen
;
2158 if (mss
) { /* TSO */
2159 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2161 if (likely(cum_len
>= 0)) { /* payload */
2162 int next_is_first
, chop
;
2164 chop
= (cum_len_next
> mss
);
2165 cum_len_next
= cum_len_next
% mss
;
2166 next_is_first
= (cum_len_next
== 0);
2167 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2168 flags_next
|= next_is_first
*
2170 rdma_count
|= -(chop
| next_is_first
);
2171 rdma_count
+= chop
& !next_is_first
;
2172 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2178 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2179 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2180 MXGEFW_FLAGS_FIRST
|
2181 (small
* MXGEFW_FLAGS_SMALL
);
2184 req
->addr_high
= high_swapped
;
2185 req
->addr_low
= htonl(low
);
2186 req
->pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
2187 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2188 req
->rdma_count
= 1;
2189 req
->length
= htons(seglen
);
2190 req
->cksum_offset
= cksum_offset
;
2191 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2195 cum_len
= cum_len_next
;
2200 if (unlikely(cksum_offset
> seglen
))
2201 cksum_offset
-= seglen
;
2205 if (frag_idx
== frag_cnt
)
2208 /* map next fragment for DMA */
2209 idx
= (count
+ tx
->req
) & tx
->mask
;
2210 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2213 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2214 len
, PCI_DMA_TODEVICE
);
2215 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2216 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2219 (req
- rdma_count
)->rdma_count
= rdma_count
;
2223 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2224 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2225 MXGEFW_FLAGS_FIRST
)));
2226 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2227 tx
->info
[idx
].last
= 1;
2228 if (tx
->wc_fifo
== NULL
)
2229 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2231 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2233 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2235 netif_stop_queue(dev
);
2237 dev
->trans_start
= jiffies
;
2241 /* Free any DMA resources we've alloced and clear out the skb
2242 * slot so as to not trip up assertions, and to avoid a
2243 * double-free if linearizing fails */
2245 last_idx
= (idx
+ 1) & tx
->mask
;
2246 idx
= tx
->req
& tx
->mask
;
2247 tx
->info
[idx
].skb
= NULL
;
2249 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2251 if (tx
->info
[idx
].skb
!= NULL
)
2252 pci_unmap_single(mgp
->pdev
,
2253 pci_unmap_addr(&tx
->info
[idx
],
2257 pci_unmap_page(mgp
->pdev
,
2258 pci_unmap_addr(&tx
->info
[idx
],
2261 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2262 tx
->info
[idx
].skb
= NULL
;
2264 idx
= (idx
+ 1) & tx
->mask
;
2265 } while (idx
!= last_idx
);
2266 if (skb_is_gso(skb
)) {
2268 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2273 if (skb_linearize(skb
))
2276 mgp
->tx_linearized
++;
2280 dev_kfree_skb_any(skb
);
2281 mgp
->stats
.tx_dropped
+= 1;
2286 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2288 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2292 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2294 struct myri10ge_cmd cmd
;
2295 struct myri10ge_priv
*mgp
;
2296 struct dev_mc_list
*mc_list
;
2297 __be32 data
[2] = { 0, 0 };
2300 mgp
= netdev_priv(dev
);
2301 /* can be called from atomic contexts,
2302 * pass 1 to force atomicity in myri10ge_send_cmd() */
2303 myri10ge_change_promisc(mgp
, dev
->flags
& IFF_PROMISC
, 1);
2305 /* This firmware is known to not support multicast */
2306 if (!mgp
->fw_multicast_support
)
2309 /* Disable multicast filtering */
2311 err
= myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
2313 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2314 " error status: %d\n", dev
->name
, err
);
2318 if ((dev
->flags
& IFF_ALLMULTI
) || mgp
->adopted_rx_filter_bug
) {
2319 /* request to disable multicast filtering, so quit here */
2323 /* Flush the filters */
2325 err
= myri10ge_send_cmd(mgp
, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS
,
2329 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2330 ", error status: %d\n", dev
->name
, err
);
2334 /* Walk the multicast list, and add each address */
2335 for (mc_list
= dev
->mc_list
; mc_list
!= NULL
; mc_list
= mc_list
->next
) {
2336 memcpy(data
, &mc_list
->dmi_addr
, 6);
2337 cmd
.data0
= ntohl(data
[0]);
2338 cmd
.data1
= ntohl(data
[1]);
2339 err
= myri10ge_send_cmd(mgp
, MXGEFW_JOIN_MULTICAST_GROUP
,
2343 printk(KERN_ERR
"myri10ge: %s: Failed "
2344 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2345 "%d\t", dev
->name
, err
);
2346 printk(KERN_ERR
"MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2347 ((unsigned char *)&mc_list
->dmi_addr
)[0],
2348 ((unsigned char *)&mc_list
->dmi_addr
)[1],
2349 ((unsigned char *)&mc_list
->dmi_addr
)[2],
2350 ((unsigned char *)&mc_list
->dmi_addr
)[3],
2351 ((unsigned char *)&mc_list
->dmi_addr
)[4],
2352 ((unsigned char *)&mc_list
->dmi_addr
)[5]
2357 /* Enable multicast filtering */
2358 err
= myri10ge_send_cmd(mgp
, MXGEFW_DISABLE_ALLMULTI
, &cmd
, 1);
2360 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2361 "error status: %d\n", dev
->name
, err
);
2371 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2373 struct sockaddr
*sa
= addr
;
2374 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2377 if (!is_valid_ether_addr(sa
->sa_data
))
2378 return -EADDRNOTAVAIL
;
2380 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2383 "myri10ge: %s: changing mac address failed with %d\n",
2388 /* change the dev structure */
2389 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2393 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2395 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2398 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2399 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2400 dev
->name
, new_mtu
);
2403 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2404 dev
->name
, dev
->mtu
, new_mtu
);
2406 /* if we change the mtu on an active device, we must
2407 * reset the device so the firmware sees the change */
2408 myri10ge_close(dev
);
2418 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2419 * Only do it if the bridge is a root port since we don't want to disturb
2420 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2423 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2425 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2426 struct device
*dev
= &mgp
->pdev
->dev
;
2433 if (!myri10ge_ecrc_enable
|| !bridge
)
2436 /* check that the bridge is a root port */
2437 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2438 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2439 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2440 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2441 if (myri10ge_ecrc_enable
> 1) {
2442 struct pci_dev
*old_bridge
= bridge
;
2444 /* Walk the hierarchy up to the root port
2445 * where ECRC has to be enabled */
2447 bridge
= bridge
->bus
->self
;
2450 "Failed to find root port"
2451 " to force ECRC\n");
2455 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2456 pci_read_config_word(bridge
,
2457 cap
+ PCI_CAP_FLAGS
, &val
);
2458 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2459 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2462 "Forcing ECRC on non-root port %s"
2463 " (enabling on root port %s)\n",
2464 pci_name(old_bridge
), pci_name(bridge
));
2467 "Not enabling ECRC on non-root port %s\n",
2473 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2477 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2479 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2481 dev_err(dev
, "\t pci=nommconf in use? "
2482 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2485 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2488 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2489 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2490 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2494 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2495 * when the PCI-E Completion packets are aligned on an 8-byte
2496 * boundary. Some PCI-E chip sets always align Completion packets; on
2497 * the ones that do not, the alignment can be enforced by enabling
2498 * ECRC generation (if supported).
2500 * When PCI-E Completion packets are not aligned, it is actually more
2501 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2503 * If the driver can neither enable ECRC nor verify that it has
2504 * already been enabled, then it must use a firmware image which works
2505 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2506 * should also ensure that it never gives the device a Read-DMA which is
2507 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2508 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2509 * firmware image, and set tx.boundary to 4KB.
2512 static void myri10ge_firmware_probe(struct myri10ge_priv
*mgp
)
2514 struct pci_dev
*pdev
= mgp
->pdev
;
2515 struct device
*dev
= &pdev
->dev
;
2519 mgp
->tx
.boundary
= 4096;
2521 * Verify the max read request size was set to 4KB
2522 * before trying the test with 4KB.
2524 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2526 dev_err(dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2529 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2531 dev_err(dev
, "Couldn't read max read req size: %d\n", status
);
2534 if ((val
& (5 << 12)) != (5 << 12)) {
2535 dev_warn(dev
, "Max Read Request size != 4096 (0x%x)\n", val
);
2536 mgp
->tx
.boundary
= 2048;
2539 * load the optimized firmware (which assumes aligned PCIe
2540 * completions) in order to see if it works on this host.
2542 mgp
->fw_name
= myri10ge_fw_aligned
;
2543 status
= myri10ge_load_firmware(mgp
);
2549 * Enable ECRC if possible
2551 myri10ge_enable_ecrc(mgp
);
2554 * Run a DMA test which watches for unaligned completions and
2555 * aborts on the first one seen.
2558 status
= myri10ge_dma_test(mgp
, MXGEFW_CMD_UNALIGNED_TEST
);
2560 return; /* keep the aligned firmware */
2562 if (status
!= -E2BIG
)
2563 dev_warn(dev
, "DMA test failed: %d\n", status
);
2564 if (status
== -ENOSYS
)
2565 dev_warn(dev
, "Falling back to ethp! "
2566 "Please install up to date fw\n");
2568 /* fall back to using the unaligned firmware */
2569 mgp
->tx
.boundary
= 2048;
2570 mgp
->fw_name
= myri10ge_fw_unaligned
;
2574 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2576 if (myri10ge_force_firmware
== 0) {
2577 int link_width
, exp_cap
;
2580 exp_cap
= pci_find_capability(mgp
->pdev
, PCI_CAP_ID_EXP
);
2581 pci_read_config_word(mgp
->pdev
, exp_cap
+ PCI_EXP_LNKSTA
, &lnk
);
2582 link_width
= (lnk
>> 4) & 0x3f;
2584 /* Check to see if Link is less than 8 or if the
2585 * upstream bridge is known to provide aligned
2587 if (link_width
< 8) {
2588 dev_info(&mgp
->pdev
->dev
, "PCIE x%d Link\n",
2590 mgp
->tx
.boundary
= 4096;
2591 mgp
->fw_name
= myri10ge_fw_aligned
;
2593 myri10ge_firmware_probe(mgp
);
2596 if (myri10ge_force_firmware
== 1) {
2597 dev_info(&mgp
->pdev
->dev
,
2598 "Assuming aligned completions (forced)\n");
2599 mgp
->tx
.boundary
= 4096;
2600 mgp
->fw_name
= myri10ge_fw_aligned
;
2602 dev_info(&mgp
->pdev
->dev
,
2603 "Assuming unaligned completions (forced)\n");
2604 mgp
->tx
.boundary
= 2048;
2605 mgp
->fw_name
= myri10ge_fw_unaligned
;
2608 if (myri10ge_fw_name
!= NULL
) {
2609 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2611 mgp
->fw_name
= myri10ge_fw_name
;
2617 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2619 struct myri10ge_priv
*mgp
;
2620 struct net_device
*netdev
;
2622 mgp
= pci_get_drvdata(pdev
);
2627 netif_device_detach(netdev
);
2628 if (netif_running(netdev
)) {
2629 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2631 myri10ge_close(netdev
);
2634 myri10ge_dummy_rdma(mgp
, 0);
2635 pci_save_state(pdev
);
2636 pci_disable_device(pdev
);
2638 return pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2641 static int myri10ge_resume(struct pci_dev
*pdev
)
2643 struct myri10ge_priv
*mgp
;
2644 struct net_device
*netdev
;
2648 mgp
= pci_get_drvdata(pdev
);
2652 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2653 msleep(5); /* give card time to respond */
2654 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2655 if (vendor
== 0xffff) {
2656 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2661 status
= pci_restore_state(pdev
);
2665 status
= pci_enable_device(pdev
);
2667 dev_err(&pdev
->dev
, "failed to enable device\n");
2671 pci_set_master(pdev
);
2673 myri10ge_reset(mgp
);
2674 myri10ge_dummy_rdma(mgp
, 1);
2676 /* Save configuration space to be restored if the
2677 * nic resets due to a parity error */
2678 pci_save_state(pdev
);
2680 if (netif_running(netdev
)) {
2682 status
= myri10ge_open(netdev
);
2685 goto abort_with_enabled
;
2688 netif_device_attach(netdev
);
2693 pci_disable_device(pdev
);
2698 #endif /* CONFIG_PM */
2700 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2702 struct pci_dev
*pdev
= mgp
->pdev
;
2703 int vs
= mgp
->vendor_specific_offset
;
2706 /*enter read32 mode */
2707 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2709 /*read REBOOT_STATUS (0xfffffff0) */
2710 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2711 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2716 * This watchdog is used to check whether the board has suffered
2717 * from a parity error and needs to be recovered.
2719 static void myri10ge_watchdog(struct work_struct
*work
)
2721 struct myri10ge_priv
*mgp
=
2722 container_of(work
, struct myri10ge_priv
, watchdog_work
);
2727 mgp
->watchdog_resets
++;
2728 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2729 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2730 /* Bus master DMA disabled? Check to see
2731 * if the card rebooted due to a parity error
2732 * For now, just report it */
2733 reboot
= myri10ge_read_reboot(mgp
);
2735 "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
2736 mgp
->dev
->name
, reboot
,
2737 myri10ge_reset_recover
? " " : " not");
2738 if (myri10ge_reset_recover
== 0)
2741 myri10ge_reset_recover
--;
2744 * A rebooted nic will come back with config space as
2745 * it was after power was applied to PCIe bus.
2746 * Attempt to restore config space which was saved
2747 * when the driver was loaded, or the last time the
2748 * nic was resumed from power saving mode.
2750 pci_restore_state(mgp
->pdev
);
2752 /* save state again for accounting reasons */
2753 pci_save_state(mgp
->pdev
);
2756 /* if we get back -1's from our slot, perhaps somebody
2757 * powered off our card. Don't try to reset it in
2759 if (cmd
== 0xffff) {
2760 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2761 if (vendor
== 0xffff) {
2763 "myri10ge: %s: device disappeared!\n",
2768 /* Perhaps it is a software error. Try to reset */
2770 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2772 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2773 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2774 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2775 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2777 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2778 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2779 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2780 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2783 myri10ge_close(mgp
->dev
);
2784 status
= myri10ge_load_firmware(mgp
);
2786 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2789 myri10ge_open(mgp
->dev
);
2794 * We use our own timer routine rather than relying upon
2795 * netdev->tx_timeout because we have a very large hardware transmit
2796 * queue. Due to the large queue, the netdev->tx_timeout function
2797 * cannot detect a NIC with a parity error in a timely fashion if the
2798 * NIC is lightly loaded.
2800 static void myri10ge_watchdog_timer(unsigned long arg
)
2802 struct myri10ge_priv
*mgp
;
2804 mgp
= (struct myri10ge_priv
*)arg
;
2806 if (mgp
->rx_small
.watchdog_needed
) {
2807 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
2808 mgp
->small_bytes
+ MXGEFW_PAD
, 1);
2809 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
>=
2810 myri10ge_fill_thresh
)
2811 mgp
->rx_small
.watchdog_needed
= 0;
2813 if (mgp
->rx_big
.watchdog_needed
) {
2814 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 1);
2815 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
>=
2816 myri10ge_fill_thresh
)
2817 mgp
->rx_big
.watchdog_needed
= 0;
2820 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2821 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
2822 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
)
2823 /* nic seems like it might be stuck.. */
2824 schedule_work(&mgp
->watchdog_work
);
2827 mod_timer(&mgp
->watchdog_timer
,
2828 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2830 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2831 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
2834 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2836 struct net_device
*netdev
;
2837 struct myri10ge_priv
*mgp
;
2838 struct device
*dev
= &pdev
->dev
;
2841 int status
= -ENXIO
;
2846 netdev
= alloc_etherdev(sizeof(*mgp
));
2847 if (netdev
== NULL
) {
2848 dev_err(dev
, "Could not allocate ethernet device\n");
2852 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2854 mgp
= netdev_priv(netdev
);
2855 memset(mgp
, 0, sizeof(*mgp
));
2858 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2859 mgp
->pause
= myri10ge_flow_control
;
2860 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2861 mgp
->msg_enable
= netif_msg_init(myri10ge_debug
, MYRI10GE_MSG_DEFAULT
);
2862 init_waitqueue_head(&mgp
->down_wq
);
2864 if (pci_enable_device(pdev
)) {
2865 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2867 goto abort_with_netdev
;
2870 /* Find the vendor-specific cap so we can check
2871 * the reboot register later on */
2872 mgp
->vendor_specific_offset
2873 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2875 /* Set our max read request to 4KB */
2876 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2878 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2879 goto abort_with_netdev
;
2881 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2883 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2885 goto abort_with_netdev
;
2887 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2888 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2890 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2892 goto abort_with_netdev
;
2895 pci_set_master(pdev
);
2897 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2901 "64-bit pci address mask was refused, trying 32-bit");
2902 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2905 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2906 goto abort_with_netdev
;
2908 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2909 &mgp
->cmd_bus
, GFP_KERNEL
);
2910 if (mgp
->cmd
== NULL
)
2911 goto abort_with_netdev
;
2913 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2914 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2915 if (mgp
->fw_stats
== NULL
)
2916 goto abort_with_cmd
;
2918 mgp
->board_span
= pci_resource_len(pdev
, 0);
2919 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2921 mgp
->wc_enabled
= 0;
2923 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2924 MTRR_TYPE_WRCOMB
, 1);
2926 mgp
->wc_enabled
= 1;
2928 /* Hack. need to get rid of these magic numbers */
2930 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2931 if (mgp
->sram_size
> mgp
->board_span
) {
2932 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
2936 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
2937 if (mgp
->sram
== NULL
) {
2938 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
2939 mgp
->board_span
, mgp
->iomem_base
);
2943 memcpy_fromio(mgp
->eeprom_strings
,
2944 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
2945 MYRI10GE_EEPROM_STRINGS_SIZE
);
2946 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
2947 status
= myri10ge_read_mac_addr(mgp
);
2949 goto abort_with_ioremap
;
2951 for (i
= 0; i
< ETH_ALEN
; i
++)
2952 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
2954 /* allocate rx done ring */
2955 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2956 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
2957 &mgp
->rx_done
.bus
, GFP_KERNEL
);
2958 if (mgp
->rx_done
.entry
== NULL
)
2959 goto abort_with_ioremap
;
2960 memset(mgp
->rx_done
.entry
, 0, bytes
);
2962 myri10ge_select_firmware(mgp
);
2964 status
= myri10ge_load_firmware(mgp
);
2966 dev_err(&pdev
->dev
, "failed to load firmware\n");
2967 goto abort_with_rx_done
;
2970 status
= myri10ge_reset(mgp
);
2972 dev_err(&pdev
->dev
, "failed reset\n");
2973 goto abort_with_firmware
;
2976 pci_set_drvdata(pdev
, mgp
);
2977 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
2978 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
2979 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
2980 myri10ge_initial_mtu
= 68;
2981 netdev
->mtu
= myri10ge_initial_mtu
;
2982 netdev
->open
= myri10ge_open
;
2983 netdev
->stop
= myri10ge_close
;
2984 netdev
->hard_start_xmit
= myri10ge_xmit
;
2985 netdev
->get_stats
= myri10ge_get_stats
;
2986 netdev
->base_addr
= mgp
->iomem_base
;
2987 netdev
->change_mtu
= myri10ge_change_mtu
;
2988 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
2989 netdev
->set_mac_address
= myri10ge_set_mac_address
;
2990 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
2992 netdev
->features
|= NETIF_F_HIGHDMA
;
2993 netdev
->poll
= myri10ge_poll
;
2994 netdev
->weight
= myri10ge_napi_weight
;
2996 /* make sure we can get an irq, and that MSI can be
2997 * setup (if available). Also ensure netdev->irq
2998 * is set to correct value if MSI is enabled */
2999 status
= myri10ge_request_irq(mgp
);
3001 goto abort_with_firmware
;
3002 netdev
->irq
= pdev
->irq
;
3003 myri10ge_free_irq(mgp
);
3005 /* Save configuration space to be restored if the
3006 * nic resets due to a parity error */
3007 pci_save_state(pdev
);
3009 /* Setup the watchdog timer */
3010 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
3011 (unsigned long)mgp
);
3013 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
3014 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
);
3015 status
= register_netdev(netdev
);
3017 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
3018 goto abort_with_state
;
3020 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3021 (mgp
->msi_enabled
? "MSI" : "xPIC"),
3022 netdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
3023 (mgp
->wc_enabled
? "Enabled" : "Disabled"));
3028 pci_restore_state(pdev
);
3030 abort_with_firmware
:
3031 myri10ge_dummy_rdma(mgp
, 0);
3034 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3035 dma_free_coherent(&pdev
->dev
, bytes
,
3036 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3044 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3046 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3047 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3050 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3051 mgp
->cmd
, mgp
->cmd_bus
);
3055 free_netdev(netdev
);
3062 * Does what is necessary to shutdown one Myrinet device. Called
3063 * once for each Myrinet card by the kernel when a module is
3066 static void myri10ge_remove(struct pci_dev
*pdev
)
3068 struct myri10ge_priv
*mgp
;
3069 struct net_device
*netdev
;
3072 mgp
= pci_get_drvdata(pdev
);
3076 flush_scheduled_work();
3078 unregister_netdev(netdev
);
3080 myri10ge_dummy_rdma(mgp
, 0);
3082 /* avoid a memory leak */
3083 pci_restore_state(pdev
);
3085 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3086 dma_free_coherent(&pdev
->dev
, bytes
,
3087 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3093 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3095 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3096 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3098 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3099 mgp
->cmd
, mgp
->cmd_bus
);
3101 free_netdev(netdev
);
3102 pci_set_drvdata(pdev
, NULL
);
3105 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3107 static struct pci_device_id myri10ge_pci_tbl
[] = {
3108 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
3112 static struct pci_driver myri10ge_driver
= {
3114 .probe
= myri10ge_probe
,
3115 .remove
= myri10ge_remove
,
3116 .id_table
= myri10ge_pci_tbl
,
3118 .suspend
= myri10ge_suspend
,
3119 .resume
= myri10ge_resume
,
3123 static __init
int myri10ge_init_module(void)
3125 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
3126 MYRI10GE_VERSION_STR
);
3127 return pci_register_driver(&myri10ge_driver
);
3130 module_init(myri10ge_init_module
);
3132 static __exit
void myri10ge_cleanup_module(void)
3134 pci_unregister_driver(&myri10ge_driver
);
3137 module_exit(myri10ge_cleanup_module
);