1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2007 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.2.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR
);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 #define MYRI10GE_ALLOC_ORDER 0
96 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
97 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
99 struct myri10ge_rx_buffer_state
{
102 DECLARE_PCI_UNMAP_ADDR(bus
)
103 DECLARE_PCI_UNMAP_LEN(len
)
106 struct myri10ge_tx_buffer_state
{
109 DECLARE_PCI_UNMAP_ADDR(bus
)
110 DECLARE_PCI_UNMAP_LEN(len
)
113 struct myri10ge_cmd
{
119 struct myri10ge_rx_buf
{
120 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
121 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
122 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
123 struct myri10ge_rx_buffer_state
*info
;
130 int mask
; /* number of rx slots -1 */
134 struct myri10ge_tx_buf
{
135 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
136 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
137 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
139 struct myri10ge_tx_buffer_state
*info
;
140 int mask
; /* number of transmit slots -1 */
141 int boundary
; /* boundary transmits cannot cross */
142 int req ____cacheline_aligned
; /* transmit slots submitted */
143 int pkt_start
; /* packets started */
144 int done ____cacheline_aligned
; /* transmit slots completed */
145 int pkt_done
; /* packets completed */
148 struct myri10ge_rx_done
{
149 struct mcp_slot
*entry
;
155 struct myri10ge_priv
{
156 int running
; /* running? */
157 int csum_flag
; /* rx_csums? */
158 struct myri10ge_tx_buf tx
; /* transmit ring */
159 struct myri10ge_rx_buf rx_small
;
160 struct myri10ge_rx_buf rx_big
;
161 struct myri10ge_rx_done rx_done
;
164 struct net_device
*dev
;
165 struct net_device_stats stats
;
168 unsigned long board_span
;
169 unsigned long iomem_base
;
170 __be32 __iomem
*irq_claim
;
171 __be32 __iomem
*irq_deassert
;
172 char *mac_addr_string
;
173 struct mcp_cmd_response
*cmd
;
175 struct mcp_irq_data
*fw_stats
;
176 dma_addr_t fw_stats_bus
;
177 struct pci_dev
*pdev
;
180 unsigned int rdma_tags_available
;
182 __be32 __iomem
*intr_coal_delay_ptr
;
188 wait_queue_head_t down_wq
;
189 struct work_struct watchdog_work
;
190 struct timer_list watchdog_timer
;
191 int watchdog_tx_done
;
197 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
198 char fw_version
[128];
202 int adopted_rx_filter_bug
;
203 u8 mac_addr
[6]; /* eeprom mac address */
204 unsigned long serial_number
;
205 int vendor_specific_offset
;
206 int fw_multicast_support
;
214 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
215 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
217 static char *myri10ge_fw_name
= NULL
;
218 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
219 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
221 static int myri10ge_ecrc_enable
= 1;
222 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
223 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
225 static int myri10ge_max_intr_slots
= 1024;
226 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
227 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
229 static int myri10ge_small_bytes
= -1; /* -1 == auto */
230 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
231 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
233 static int myri10ge_msi
= 1; /* enable msi by default */
234 module_param(myri10ge_msi
, int, S_IRUGO
| S_IWUSR
);
235 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
237 static int myri10ge_intr_coal_delay
= 25;
238 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
239 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
241 static int myri10ge_flow_control
= 1;
242 module_param(myri10ge_flow_control
, int, S_IRUGO
);
243 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
245 static int myri10ge_deassert_wait
= 1;
246 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
247 MODULE_PARM_DESC(myri10ge_deassert_wait
,
248 "Wait when deasserting legacy interrupts\n");
250 static int myri10ge_force_firmware
= 0;
251 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
252 MODULE_PARM_DESC(myri10ge_force_firmware
,
253 "Force firmware to assume aligned completions\n");
255 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
256 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
257 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
259 static int myri10ge_napi_weight
= 64;
260 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
261 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
263 static int myri10ge_watchdog_timeout
= 1;
264 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
265 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
267 static int myri10ge_max_irq_loops
= 1048576;
268 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
269 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
270 "Set stuck legacy IRQ detection threshold\n");
272 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
274 static int myri10ge_debug
= -1; /* defaults above */
275 module_param(myri10ge_debug
, int, 0);
276 MODULE_PARM_DESC(myri10ge_debug
, "Debug level (0=none,...,16=all)");
278 static int myri10ge_fill_thresh
= 256;
279 module_param(myri10ge_fill_thresh
, int, S_IRUGO
| S_IWUSR
);
280 MODULE_PARM_DESC(myri10ge_fill_thresh
, "Number of empty rx slots allowed\n");
282 static int myri10ge_wcfifo
= 1;
283 module_param(myri10ge_wcfifo
, int, S_IRUGO
);
284 MODULE_PARM_DESC(myri10ge_wcfifo
, "Enable WC Fifo when WC is enabled\n");
286 #define MYRI10GE_FW_OFFSET 1024*1024
287 #define MYRI10GE_HIGHPART_TO_U32(X) \
288 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
289 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
291 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
293 static inline void put_be32(__be32 val
, __be32 __iomem
* p
)
295 __raw_writel((__force __u32
) val
, (__force
void __iomem
*)p
);
299 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
300 struct myri10ge_cmd
*data
, int atomic
)
303 char buf_bytes
[sizeof(*buf
) + 8];
304 struct mcp_cmd_response
*response
= mgp
->cmd
;
305 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_ETH_CMD
;
306 u32 dma_low
, dma_high
, result
, value
;
309 /* ensure buf is aligned to 8 bytes */
310 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
312 buf
->data0
= htonl(data
->data0
);
313 buf
->data1
= htonl(data
->data1
);
314 buf
->data2
= htonl(data
->data2
);
315 buf
->cmd
= htonl(cmd
);
316 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
317 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
319 buf
->response_addr
.low
= htonl(dma_low
);
320 buf
->response_addr
.high
= htonl(dma_high
);
321 response
->result
= htonl(MYRI10GE_NO_RESPONSE_RESULT
);
323 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
325 /* wait up to 15ms. Longest command is the DMA benchmark,
326 * which is capped at 5ms, but runs from a timeout handler
327 * that runs every 7.8ms. So a 15ms timeout leaves us with
331 /* if atomic is set, do not sleep,
332 * and try to get the completion quickly
333 * (1ms will be enough for those commands) */
334 for (sleep_total
= 0;
336 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
340 /* use msleep for most command */
341 for (sleep_total
= 0;
343 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
348 result
= ntohl(response
->result
);
349 value
= ntohl(response
->data
);
350 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
354 } else if (result
== MXGEFW_CMD_UNKNOWN
) {
357 dev_err(&mgp
->pdev
->dev
,
358 "command %d failed, result = %d\n",
364 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
370 * The eeprom strings on the lanaiX have the format
373 * PT:ddd mmm xx xx:xx:xx xx\0
374 * PV:ddd mmm xx xx:xx:xx xx\0
376 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
381 ptr
= mgp
->eeprom_strings
;
382 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
384 while (*ptr
!= '\0' && ptr
< limit
) {
385 if (memcmp(ptr
, "MAC=", 4) == 0) {
387 mgp
->mac_addr_string
= ptr
;
388 for (i
= 0; i
< 6; i
++) {
389 if ((ptr
+ 2) > limit
)
392 simple_strtoul(ptr
, &ptr
, 16);
396 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
398 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
400 while (ptr
< limit
&& *ptr
++) ;
406 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
411 * Enable or disable periodic RDMAs from the host to make certain
412 * chipsets resend dropped PCIe messages
415 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
417 char __iomem
*submit
;
419 u32 dma_low
, dma_high
;
422 /* clear confirmation addr */
426 /* send a rdma command to the PCIe engine, and wait for the
427 * response in the confirmation address. The firmware should
428 * write a -1 there to indicate it is alive and well
430 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
431 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
433 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
434 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
435 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
436 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
437 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
438 buf
[5] = htonl(enable
); /* enable? */
440 submit
= mgp
->sram
+ MXGEFW_BOOT_DUMMY_RDMA
;
442 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
443 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
445 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
446 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
447 (enable
? "enable" : "disable"));
451 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
452 struct mcp_gen_header
*hdr
)
454 struct device
*dev
= &mgp
->pdev
->dev
;
456 /* check firmware type */
457 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
458 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
462 /* save firmware version for ethtool */
463 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
465 sscanf(mgp
->fw_version
, "%d.%d.%d", &mgp
->fw_ver_major
,
466 &mgp
->fw_ver_minor
, &mgp
->fw_ver_tiny
);
468 if (!(mgp
->fw_ver_major
== MXGEFW_VERSION_MAJOR
469 && mgp
->fw_ver_minor
== MXGEFW_VERSION_MINOR
)) {
470 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
471 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
472 MXGEFW_VERSION_MINOR
);
478 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
480 unsigned crc
, reread_crc
;
481 const struct firmware
*fw
;
482 struct device
*dev
= &mgp
->pdev
->dev
;
483 struct mcp_gen_header
*hdr
;
488 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
489 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
492 goto abort_with_nothing
;
497 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
498 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
499 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
505 hdr_offset
= ntohl(*(__be32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
506 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
507 dev_err(dev
, "Bad firmware file\n");
511 hdr
= (void *)(fw
->data
+ hdr_offset
);
513 status
= myri10ge_validate_firmware(mgp
, hdr
);
517 crc
= crc32(~0, fw
->data
, fw
->size
);
518 for (i
= 0; i
< fw
->size
; i
+= 256) {
519 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
521 min(256U, (unsigned)(fw
->size
- i
)));
525 /* corruption checking is good for parity recovery and buggy chipset */
526 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
527 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
528 if (crc
!= reread_crc
) {
529 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
530 (unsigned)fw
->size
, reread_crc
, crc
);
534 *size
= (u32
) fw
->size
;
537 release_firmware(fw
);
543 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
545 struct mcp_gen_header
*hdr
;
546 struct device
*dev
= &mgp
->pdev
->dev
;
547 const size_t bytes
= sizeof(struct mcp_gen_header
);
551 /* find running firmware header */
552 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
554 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
555 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
560 /* copy header of running firmware from SRAM to host memory to
561 * validate firmware */
562 hdr
= kmalloc(bytes
, GFP_KERNEL
);
564 dev_err(dev
, "could not malloc firmware hdr\n");
567 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
568 status
= myri10ge_validate_firmware(mgp
, hdr
);
571 /* check to see if adopted firmware has bug where adopting
572 * it will cause broadcasts to be filtered unless the NIC
573 * is kept in ALLMULTI mode */
574 if (mgp
->fw_ver_major
== 1 && mgp
->fw_ver_minor
== 4 &&
575 mgp
->fw_ver_tiny
>= 4 && mgp
->fw_ver_tiny
<= 11) {
576 mgp
->adopted_rx_filter_bug
= 1;
577 dev_warn(dev
, "Adopting fw %d.%d.%d: "
578 "working around rx filter bug\n",
579 mgp
->fw_ver_major
, mgp
->fw_ver_minor
,
585 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
587 char __iomem
*submit
;
589 u32 dma_low
, dma_high
, size
;
593 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
595 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
597 /* Do not attempt to adopt firmware if there
602 status
= myri10ge_adopt_running_firmware(mgp
);
604 dev_err(&mgp
->pdev
->dev
,
605 "failed to adopt running firmware\n");
608 dev_info(&mgp
->pdev
->dev
,
609 "Successfully adopted running firmware\n");
610 if (mgp
->tx
.boundary
== 4096) {
611 dev_warn(&mgp
->pdev
->dev
,
612 "Using firmware currently running on NIC"
614 dev_warn(&mgp
->pdev
->dev
,
615 "performance consider loading optimized "
617 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
620 mgp
->fw_name
= "adopted";
621 mgp
->tx
.boundary
= 2048;
625 /* clear confirmation addr */
629 /* send a reload command to the bootstrap MCP, and wait for the
630 * response in the confirmation address. The firmware should
631 * write a -1 there to indicate it is alive and well
633 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
634 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
636 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
637 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
638 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
640 /* FIX: All newest firmware should un-protect the bottom of
641 * the sram before handoff. However, the very first interfaces
642 * do not. Therefore the handoff copy must skip the first 8 bytes
644 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
645 buf
[4] = htonl(size
- 8); /* length of code */
646 buf
[5] = htonl(8); /* where to copy to */
647 buf
[6] = htonl(0); /* where to jump to */
649 submit
= mgp
->sram
+ MXGEFW_BOOT_HANDOFF
;
651 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
656 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
660 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
661 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
664 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
665 myri10ge_dummy_rdma(mgp
, 1);
670 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
672 struct myri10ge_cmd cmd
;
675 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
676 | (addr
[2] << 8) | addr
[3]);
678 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
680 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
684 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
686 struct myri10ge_cmd cmd
;
689 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
690 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
694 "myri10ge: %s: Failed to set flow control mode\n",
703 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
705 struct myri10ge_cmd cmd
;
708 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
709 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
711 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
715 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
717 struct myri10ge_cmd cmd
;
721 struct page
*dmatest_page
;
722 dma_addr_t dmatest_bus
;
724 /* try to send a reset command to the card to see if it
726 memset(&cmd
, 0, sizeof(cmd
));
727 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
729 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
732 dmatest_page
= alloc_page(GFP_KERNEL
);
735 dmatest_bus
= pci_map_page(mgp
->pdev
, dmatest_page
, 0, PAGE_SIZE
,
738 /* Now exchange information about interrupts */
740 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
741 memset(mgp
->rx_done
.entry
, 0, bytes
);
742 cmd
.data0
= (u32
) bytes
;
743 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
744 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
745 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
746 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
749 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
750 mgp
->irq_claim
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
751 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
,
753 mgp
->irq_deassert
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
755 status
|= myri10ge_send_cmd
756 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
757 mgp
->intr_coal_delay_ptr
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
759 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
762 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
764 /* Run a small DMA test.
765 * The magic multipliers to the length tell the firmware
766 * to do DMA read, write, or read+write tests. The
767 * results are returned in cmd.data0. The upper 16
768 * bits or the return is the number of transfers completed.
769 * The lower 16 bits is the time in 0.5us ticks that the
770 * transfers took to complete.
773 len
= mgp
->tx
.boundary
;
775 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
776 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
777 cmd
.data2
= len
* 0x10000;
778 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
780 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) /
781 (cmd
.data0
& 0xffff);
783 dev_warn(&mgp
->pdev
->dev
, "DMA read benchmark failed: %d\n",
785 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
786 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
787 cmd
.data2
= len
* 0x1;
788 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
790 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) /
791 (cmd
.data0
& 0xffff);
793 dev_warn(&mgp
->pdev
->dev
, "DMA write benchmark failed: %d\n",
796 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
797 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
798 cmd
.data2
= len
* 0x10001;
799 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
801 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
802 (cmd
.data0
& 0xffff);
804 dev_warn(&mgp
->pdev
->dev
,
805 "DMA read/write benchmark failed: %d\n", status
);
807 pci_unmap_page(mgp
->pdev
, dmatest_bus
, PAGE_SIZE
, DMA_BIDIRECTIONAL
);
808 put_page(dmatest_page
);
810 memset(mgp
->rx_done
.entry
, 0, bytes
);
812 /* reset mcp/driver shared state back to 0 */
815 mgp
->tx
.pkt_start
= 0;
816 mgp
->tx
.pkt_done
= 0;
818 mgp
->rx_small
.cnt
= 0;
819 mgp
->rx_done
.idx
= 0;
820 mgp
->rx_done
.cnt
= 0;
821 mgp
->link_changes
= 0;
822 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
823 myri10ge_change_promisc(mgp
, 0, 0);
824 myri10ge_change_pause(mgp
, mgp
->pause
);
825 if (mgp
->adopted_rx_filter_bug
)
826 (void)myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
831 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
832 struct mcp_kreq_ether_recv
*src
)
837 src
->addr_low
= htonl(DMA_32BIT_MASK
);
838 myri10ge_pio_copy(dst
, src
, 4 * sizeof(*src
));
840 myri10ge_pio_copy(dst
+ 4, src
+ 4, 4 * sizeof(*src
));
843 put_be32(low
, &dst
->addr_low
);
847 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, __wsum hw_csum
)
849 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
851 if ((skb
->protocol
== htons(ETH_P_8021Q
)) &&
852 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
853 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
855 skb
->ip_summed
= CHECKSUM_COMPLETE
;
860 myri10ge_rx_skb_build(struct sk_buff
*skb
, u8
* va
,
861 struct skb_frag_struct
*rx_frags
, int len
, int hlen
)
863 struct skb_frag_struct
*skb_frags
;
865 skb
->len
= skb
->data_len
= len
;
866 skb
->truesize
= len
+ sizeof(struct sk_buff
);
867 /* attach the page(s) */
869 skb_frags
= skb_shinfo(skb
)->frags
;
871 memcpy(skb_frags
, rx_frags
, sizeof(*skb_frags
));
872 len
-= rx_frags
->size
;
875 skb_shinfo(skb
)->nr_frags
++;
878 /* pskb_may_pull is not available in irq context, but
879 * skb_pull() (for ether_pad and eth_type_trans()) requires
880 * the beginning of the packet in skb_headlen(), move it
882 memcpy(skb
->data
, va
, hlen
);
883 skb_shinfo(skb
)->frags
[0].page_offset
+= hlen
;
884 skb_shinfo(skb
)->frags
[0].size
-= hlen
;
885 skb
->data_len
-= hlen
;
887 skb_pull(skb
, MXGEFW_PAD
);
891 myri10ge_alloc_rx_pages(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
892 int bytes
, int watchdog
)
897 if (unlikely(rx
->watchdog_needed
&& !watchdog
))
900 /* try to refill entire ring */
901 while (rx
->fill_cnt
!= (rx
->cnt
+ rx
->mask
+ 1)) {
902 idx
= rx
->fill_cnt
& rx
->mask
;
904 if ((bytes
< MYRI10GE_ALLOC_SIZE
/ 2) &&
905 (rx
->page_offset
+ bytes
<= MYRI10GE_ALLOC_SIZE
)) {
906 /* we can use part of previous page */
909 /* we need a new page */
911 alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
912 MYRI10GE_ALLOC_ORDER
);
913 if (unlikely(page
== NULL
)) {
914 if (rx
->fill_cnt
- rx
->cnt
< 16)
915 rx
->watchdog_needed
= 1;
920 rx
->bus
= pci_map_page(mgp
->pdev
, page
, 0,
924 rx
->info
[idx
].page
= rx
->page
;
925 rx
->info
[idx
].page_offset
= rx
->page_offset
;
926 /* note that this is the address of the start of the
928 pci_unmap_addr_set(&rx
->info
[idx
], bus
, rx
->bus
);
929 rx
->shadow
[idx
].addr_low
=
930 htonl(MYRI10GE_LOWPART_TO_U32(rx
->bus
) + rx
->page_offset
);
931 rx
->shadow
[idx
].addr_high
=
932 htonl(MYRI10GE_HIGHPART_TO_U32(rx
->bus
));
934 /* start next packet on a cacheline boundary */
935 rx
->page_offset
+= SKB_DATA_ALIGN(bytes
);
938 /* copy 8 descriptors to the firmware at a time */
939 if ((idx
& 7) == 7) {
940 if (rx
->wc_fifo
== NULL
)
941 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
942 &rx
->shadow
[idx
- 7]);
945 myri10ge_pio_copy(rx
->wc_fifo
,
946 &rx
->shadow
[idx
- 7], 64);
953 myri10ge_unmap_rx_page(struct pci_dev
*pdev
,
954 struct myri10ge_rx_buffer_state
*info
, int bytes
)
956 /* unmap the recvd page if we're the only or last user of it */
957 if (bytes
>= MYRI10GE_ALLOC_SIZE
/ 2 ||
958 (info
->page_offset
+ 2 * bytes
) > MYRI10GE_ALLOC_SIZE
) {
959 pci_unmap_page(pdev
, (pci_unmap_addr(info
, bus
)
960 & ~(MYRI10GE_ALLOC_SIZE
- 1)),
961 MYRI10GE_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
965 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
966 * page into an skb */
969 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
970 int bytes
, int len
, __wsum csum
)
973 struct skb_frag_struct rx_frags
[MYRI10GE_MAX_FRAGS_PER_FRAME
];
974 int i
, idx
, hlen
, remainder
;
975 struct pci_dev
*pdev
= mgp
->pdev
;
976 struct net_device
*dev
= mgp
->dev
;
980 idx
= rx
->cnt
& rx
->mask
;
981 va
= page_address(rx
->info
[idx
].page
) + rx
->info
[idx
].page_offset
;
983 /* Fill skb_frag_struct(s) with data from our receive */
984 for (i
= 0, remainder
= len
; remainder
> 0; i
++) {
985 myri10ge_unmap_rx_page(pdev
, &rx
->info
[idx
], bytes
);
986 rx_frags
[i
].page
= rx
->info
[idx
].page
;
987 rx_frags
[i
].page_offset
= rx
->info
[idx
].page_offset
;
988 if (remainder
< MYRI10GE_ALLOC_SIZE
)
989 rx_frags
[i
].size
= remainder
;
991 rx_frags
[i
].size
= MYRI10GE_ALLOC_SIZE
;
993 idx
= rx
->cnt
& rx
->mask
;
994 remainder
-= MYRI10GE_ALLOC_SIZE
;
997 hlen
= MYRI10GE_HLEN
> len
? len
: MYRI10GE_HLEN
;
999 /* allocate an skb to attach the page(s) to. */
1001 skb
= netdev_alloc_skb(dev
, MYRI10GE_HLEN
+ 16);
1002 if (unlikely(skb
== NULL
)) {
1003 mgp
->stats
.rx_dropped
++;
1006 put_page(rx_frags
[i
].page
);
1011 /* Attach the pages to the skb, and trim off any padding */
1012 myri10ge_rx_skb_build(skb
, va
, rx_frags
, len
, hlen
);
1013 if (skb_shinfo(skb
)->frags
[0].size
<= 0) {
1014 put_page(skb_shinfo(skb
)->frags
[0].page
);
1015 skb_shinfo(skb
)->nr_frags
= 0;
1017 skb
->protocol
= eth_type_trans(skb
, dev
);
1020 if (mgp
->csum_flag
) {
1021 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
1022 (skb
->protocol
== htons(ETH_P_IPV6
))) {
1024 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1026 myri10ge_vlan_ip_csum(skb
, csum
);
1028 netif_receive_skb(skb
);
1029 dev
->last_rx
= jiffies
;
1033 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
1035 struct pci_dev
*pdev
= mgp
->pdev
;
1036 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1037 struct sk_buff
*skb
;
1041 while (tx
->pkt_done
!= mcp_index
) {
1042 idx
= tx
->done
& tx
->mask
;
1043 skb
= tx
->info
[idx
].skb
;
1046 tx
->info
[idx
].skb
= NULL
;
1047 if (tx
->info
[idx
].last
) {
1049 tx
->info
[idx
].last
= 0;
1052 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1053 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1055 mgp
->stats
.tx_bytes
+= skb
->len
;
1056 mgp
->stats
.tx_packets
++;
1057 dev_kfree_skb_irq(skb
);
1059 pci_unmap_single(pdev
,
1060 pci_unmap_addr(&tx
->info
[idx
],
1065 pci_unmap_page(pdev
,
1066 pci_unmap_addr(&tx
->info
[idx
],
1071 /* limit potential for livelock by only handling
1072 * 2 full tx rings per call */
1073 if (unlikely(++limit
> 2 * tx
->mask
))
1076 /* start the queue if we've stopped it */
1077 if (netif_queue_stopped(mgp
->dev
)
1078 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1080 netif_wake_queue(mgp
->dev
);
1084 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1086 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1087 unsigned long rx_bytes
= 0;
1088 unsigned long rx_packets
= 0;
1089 unsigned long rx_ok
;
1091 int idx
= rx_done
->idx
;
1092 int cnt
= rx_done
->cnt
;
1096 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1097 length
= ntohs(rx_done
->entry
[idx
].length
);
1098 rx_done
->entry
[idx
].length
= 0;
1099 checksum
= csum_unfold(rx_done
->entry
[idx
].checksum
);
1100 if (length
<= mgp
->small_bytes
)
1101 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1105 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1108 rx_packets
+= rx_ok
;
1109 rx_bytes
+= rx_ok
* (unsigned long)length
;
1111 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1113 /* limit potential for livelock by only handling a
1114 * limited number of frames. */
1119 mgp
->stats
.rx_packets
+= rx_packets
;
1120 mgp
->stats
.rx_bytes
+= rx_bytes
;
1122 /* restock receive rings if needed */
1123 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
< myri10ge_fill_thresh
)
1124 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1125 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1126 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
< myri10ge_fill_thresh
)
1127 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1131 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1133 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1135 if (unlikely(stats
->stats_updated
)) {
1136 if (mgp
->link_state
!= stats
->link_up
) {
1137 mgp
->link_state
= stats
->link_up
;
1138 if (mgp
->link_state
) {
1139 if (netif_msg_link(mgp
))
1141 "myri10ge: %s: link up\n",
1143 netif_carrier_on(mgp
->dev
);
1144 mgp
->link_changes
++;
1146 if (netif_msg_link(mgp
))
1148 "myri10ge: %s: link down\n",
1150 netif_carrier_off(mgp
->dev
);
1151 mgp
->link_changes
++;
1154 if (mgp
->rdma_tags_available
!=
1155 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1156 mgp
->rdma_tags_available
=
1157 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1158 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1159 "%d tags left\n", mgp
->dev
->name
,
1160 mgp
->rdma_tags_available
);
1162 mgp
->down_cnt
+= stats
->link_down
;
1163 if (stats
->link_down
)
1164 wake_up(&mgp
->down_wq
);
1168 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1170 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1171 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1172 int limit
, orig_limit
, work_done
;
1174 /* process as many rx events as NAPI will allow */
1175 limit
= min(*budget
, netdev
->quota
);
1177 myri10ge_clean_rx_done(mgp
, &limit
);
1178 work_done
= orig_limit
- limit
;
1179 *budget
-= work_done
;
1180 netdev
->quota
-= work_done
;
1182 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1183 netif_rx_complete(netdev
);
1184 put_be32(htonl(3), mgp
->irq_claim
);
1190 static irqreturn_t
myri10ge_intr(int irq
, void *arg
)
1192 struct myri10ge_priv
*mgp
= arg
;
1193 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1194 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1195 u32 send_done_count
;
1198 /* make sure it is our IRQ, and that the DMA has finished */
1199 if (unlikely(!stats
->valid
))
1202 /* low bit indicates receives are present, so schedule
1203 * napi poll handler */
1204 if (stats
->valid
& 1)
1205 netif_rx_schedule(mgp
->dev
);
1207 if (!mgp
->msi_enabled
) {
1208 put_be32(0, mgp
->irq_deassert
);
1209 if (!myri10ge_deassert_wait
)
1215 /* Wait for IRQ line to go low, if using INTx */
1219 /* check for transmit completes and receives */
1220 send_done_count
= ntohl(stats
->send_done_count
);
1221 if (send_done_count
!= tx
->pkt_done
)
1222 myri10ge_tx_done(mgp
, (int)send_done_count
);
1223 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1224 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1227 schedule_work(&mgp
->watchdog_work
);
1229 if (likely(stats
->valid
== 0))
1235 myri10ge_check_statblock(mgp
);
1237 put_be32(htonl(3), mgp
->irq_claim
+ 1);
1238 return (IRQ_HANDLED
);
1242 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1244 cmd
->autoneg
= AUTONEG_DISABLE
;
1245 cmd
->speed
= SPEED_10000
;
1246 cmd
->duplex
= DUPLEX_FULL
;
1251 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1253 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1255 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1256 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1257 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1258 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1262 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1264 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1265 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1270 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1272 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1274 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1275 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1280 myri10ge_get_pauseparam(struct net_device
*netdev
,
1281 struct ethtool_pauseparam
*pause
)
1283 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1286 pause
->rx_pause
= mgp
->pause
;
1287 pause
->tx_pause
= mgp
->pause
;
1291 myri10ge_set_pauseparam(struct net_device
*netdev
,
1292 struct ethtool_pauseparam
*pause
)
1294 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1296 if (pause
->tx_pause
!= mgp
->pause
)
1297 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1298 if (pause
->rx_pause
!= mgp
->pause
)
1299 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1300 if (pause
->autoneg
!= 0)
1306 myri10ge_get_ringparam(struct net_device
*netdev
,
1307 struct ethtool_ringparam
*ring
)
1309 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1311 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1312 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1313 ring
->rx_jumbo_max_pending
= 0;
1314 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1315 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1316 ring
->rx_pending
= ring
->rx_max_pending
;
1317 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1318 ring
->tx_pending
= ring
->tx_max_pending
;
1321 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1323 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1330 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1332 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1334 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1340 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1341 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1342 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1343 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1344 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1345 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1346 "tx_heartbeat_errors", "tx_window_errors",
1347 /* device-specific stats */
1348 "tx_boundary", "WC", "irq", "MSI",
1349 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1350 "serial_number", "tx_pkt_start", "tx_pkt_done",
1351 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1352 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1353 "link_changes", "link_up", "dropped_link_overflow",
1354 "dropped_link_error_or_filtered", "dropped_multicast_filtered",
1355 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1356 "dropped_no_big_buffer"
1359 #define MYRI10GE_NET_STATS_LEN 21
1360 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1363 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1365 switch (stringset
) {
1367 memcpy(data
, *myri10ge_gstrings_stats
,
1368 sizeof(myri10ge_gstrings_stats
));
1373 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1375 return MYRI10GE_STATS_LEN
;
1379 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1380 struct ethtool_stats
*stats
, u64
* data
)
1382 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1385 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1386 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1388 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1389 data
[i
++] = (unsigned int)mgp
->wc_enabled
;
1390 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1391 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1392 data
[i
++] = (unsigned int)mgp
->read_dma
;
1393 data
[i
++] = (unsigned int)mgp
->write_dma
;
1394 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1395 data
[i
++] = (unsigned int)mgp
->serial_number
;
1396 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1397 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1398 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1399 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1400 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1401 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1402 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1403 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1404 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1405 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1406 data
[i
++] = (unsigned int)mgp
->link_changes
;
1407 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1408 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1410 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1412 (unsigned int)ntohl(mgp
->fw_stats
->dropped_multicast_filtered
);
1413 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1414 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1415 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1416 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1419 static void myri10ge_set_msglevel(struct net_device
*netdev
, u32 value
)
1421 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1422 mgp
->msg_enable
= value
;
1425 static u32
myri10ge_get_msglevel(struct net_device
*netdev
)
1427 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1428 return mgp
->msg_enable
;
1431 static const struct ethtool_ops myri10ge_ethtool_ops
= {
1432 .get_settings
= myri10ge_get_settings
,
1433 .get_drvinfo
= myri10ge_get_drvinfo
,
1434 .get_coalesce
= myri10ge_get_coalesce
,
1435 .set_coalesce
= myri10ge_set_coalesce
,
1436 .get_pauseparam
= myri10ge_get_pauseparam
,
1437 .set_pauseparam
= myri10ge_set_pauseparam
,
1438 .get_ringparam
= myri10ge_get_ringparam
,
1439 .get_rx_csum
= myri10ge_get_rx_csum
,
1440 .set_rx_csum
= myri10ge_set_rx_csum
,
1441 .get_tx_csum
= ethtool_op_get_tx_csum
,
1442 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1443 .get_sg
= ethtool_op_get_sg
,
1444 .set_sg
= ethtool_op_set_sg
,
1445 .get_tso
= ethtool_op_get_tso
,
1446 .set_tso
= ethtool_op_set_tso
,
1447 .get_strings
= myri10ge_get_strings
,
1448 .get_stats_count
= myri10ge_get_stats_count
,
1449 .get_ethtool_stats
= myri10ge_get_ethtool_stats
,
1450 .set_msglevel
= myri10ge_set_msglevel
,
1451 .get_msglevel
= myri10ge_get_msglevel
1454 static int myri10ge_allocate_rings(struct net_device
*dev
)
1456 struct myri10ge_priv
*mgp
;
1457 struct myri10ge_cmd cmd
;
1458 int tx_ring_size
, rx_ring_size
;
1459 int tx_ring_entries
, rx_ring_entries
;
1463 mgp
= netdev_priv(dev
);
1465 /* get ring sizes */
1467 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1468 tx_ring_size
= cmd
.data0
;
1469 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1472 rx_ring_size
= cmd
.data0
;
1474 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1475 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1476 mgp
->tx
.mask
= tx_ring_entries
- 1;
1477 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1481 /* allocate the host shadow rings */
1483 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1484 * sizeof(*mgp
->tx
.req_list
);
1485 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1486 if (mgp
->tx
.req_bytes
== NULL
)
1487 goto abort_with_nothing
;
1489 /* ensure req_list entries are aligned to 8 bytes */
1490 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1491 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1493 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1494 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1495 if (mgp
->rx_small
.shadow
== NULL
)
1496 goto abort_with_tx_req_bytes
;
1498 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1499 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1500 if (mgp
->rx_big
.shadow
== NULL
)
1501 goto abort_with_rx_small_shadow
;
1503 /* allocate the host info rings */
1505 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1506 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1507 if (mgp
->tx
.info
== NULL
)
1508 goto abort_with_rx_big_shadow
;
1510 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1511 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1512 if (mgp
->rx_small
.info
== NULL
)
1513 goto abort_with_tx_info
;
1515 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1516 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1517 if (mgp
->rx_big
.info
== NULL
)
1518 goto abort_with_rx_small_info
;
1520 /* Fill the receive rings */
1521 mgp
->rx_big
.cnt
= 0;
1522 mgp
->rx_small
.cnt
= 0;
1523 mgp
->rx_big
.fill_cnt
= 0;
1524 mgp
->rx_small
.fill_cnt
= 0;
1525 mgp
->rx_small
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1526 mgp
->rx_big
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1527 mgp
->rx_small
.watchdog_needed
= 0;
1528 mgp
->rx_big
.watchdog_needed
= 0;
1529 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1530 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1532 if (mgp
->rx_small
.fill_cnt
< mgp
->rx_small
.mask
+ 1) {
1533 printk(KERN_ERR
"myri10ge: %s: alloced only %d small bufs\n",
1534 dev
->name
, mgp
->rx_small
.fill_cnt
);
1535 goto abort_with_rx_small_ring
;
1538 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1539 if (mgp
->rx_big
.fill_cnt
< mgp
->rx_big
.mask
+ 1) {
1540 printk(KERN_ERR
"myri10ge: %s: alloced only %d big bufs\n",
1541 dev
->name
, mgp
->rx_big
.fill_cnt
);
1542 goto abort_with_rx_big_ring
;
1547 abort_with_rx_big_ring
:
1548 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1549 int idx
= i
& mgp
->rx_big
.mask
;
1550 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1552 put_page(mgp
->rx_big
.info
[idx
].page
);
1555 abort_with_rx_small_ring
:
1556 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1557 int idx
= i
& mgp
->rx_small
.mask
;
1558 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1559 mgp
->small_bytes
+ MXGEFW_PAD
);
1560 put_page(mgp
->rx_small
.info
[idx
].page
);
1563 kfree(mgp
->rx_big
.info
);
1565 abort_with_rx_small_info
:
1566 kfree(mgp
->rx_small
.info
);
1569 kfree(mgp
->tx
.info
);
1571 abort_with_rx_big_shadow
:
1572 kfree(mgp
->rx_big
.shadow
);
1574 abort_with_rx_small_shadow
:
1575 kfree(mgp
->rx_small
.shadow
);
1577 abort_with_tx_req_bytes
:
1578 kfree(mgp
->tx
.req_bytes
);
1579 mgp
->tx
.req_bytes
= NULL
;
1580 mgp
->tx
.req_list
= NULL
;
1586 static void myri10ge_free_rings(struct net_device
*dev
)
1588 struct myri10ge_priv
*mgp
;
1589 struct sk_buff
*skb
;
1590 struct myri10ge_tx_buf
*tx
;
1593 mgp
= netdev_priv(dev
);
1595 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1596 idx
= i
& mgp
->rx_big
.mask
;
1597 if (i
== mgp
->rx_big
.fill_cnt
- 1)
1598 mgp
->rx_big
.info
[idx
].page_offset
= MYRI10GE_ALLOC_SIZE
;
1599 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1601 put_page(mgp
->rx_big
.info
[idx
].page
);
1604 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1605 idx
= i
& mgp
->rx_small
.mask
;
1606 if (i
== mgp
->rx_small
.fill_cnt
- 1)
1607 mgp
->rx_small
.info
[idx
].page_offset
=
1608 MYRI10GE_ALLOC_SIZE
;
1609 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1610 mgp
->small_bytes
+ MXGEFW_PAD
);
1611 put_page(mgp
->rx_small
.info
[idx
].page
);
1614 while (tx
->done
!= tx
->req
) {
1615 idx
= tx
->done
& tx
->mask
;
1616 skb
= tx
->info
[idx
].skb
;
1619 tx
->info
[idx
].skb
= NULL
;
1621 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1622 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1624 mgp
->stats
.tx_dropped
++;
1625 dev_kfree_skb_any(skb
);
1627 pci_unmap_single(mgp
->pdev
,
1628 pci_unmap_addr(&tx
->info
[idx
],
1633 pci_unmap_page(mgp
->pdev
,
1634 pci_unmap_addr(&tx
->info
[idx
],
1639 kfree(mgp
->rx_big
.info
);
1641 kfree(mgp
->rx_small
.info
);
1643 kfree(mgp
->tx
.info
);
1645 kfree(mgp
->rx_big
.shadow
);
1647 kfree(mgp
->rx_small
.shadow
);
1649 kfree(mgp
->tx
.req_bytes
);
1650 mgp
->tx
.req_bytes
= NULL
;
1651 mgp
->tx
.req_list
= NULL
;
1654 static int myri10ge_request_irq(struct myri10ge_priv
*mgp
)
1656 struct pci_dev
*pdev
= mgp
->pdev
;
1660 status
= pci_enable_msi(pdev
);
1663 "Error %d setting up MSI; falling back to xPIC\n",
1666 mgp
->msi_enabled
= 1;
1668 mgp
->msi_enabled
= 0;
1670 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
1671 mgp
->dev
->name
, mgp
);
1673 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
1674 if (mgp
->msi_enabled
)
1675 pci_disable_msi(pdev
);
1680 static void myri10ge_free_irq(struct myri10ge_priv
*mgp
)
1682 struct pci_dev
*pdev
= mgp
->pdev
;
1684 free_irq(pdev
->irq
, mgp
);
1685 if (mgp
->msi_enabled
)
1686 pci_disable_msi(pdev
);
1689 static int myri10ge_open(struct net_device
*dev
)
1691 struct myri10ge_priv
*mgp
;
1692 struct myri10ge_cmd cmd
;
1693 int status
, big_pow2
;
1695 mgp
= netdev_priv(dev
);
1697 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1700 mgp
->running
= MYRI10GE_ETH_STARTING
;
1701 status
= myri10ge_reset(mgp
);
1703 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1704 goto abort_with_nothing
;
1707 status
= myri10ge_request_irq(mgp
);
1709 goto abort_with_nothing
;
1711 /* decide what small buffer size to use. For good TCP rx
1712 * performance, it is important to not receive 1514 byte
1713 * frames into jumbo buffers, as it confuses the socket buffer
1714 * accounting code, leading to drops and erratic performance.
1717 if (dev
->mtu
<= ETH_DATA_LEN
)
1718 /* enough for a TCP header */
1719 mgp
->small_bytes
= (128 > SMP_CACHE_BYTES
)
1720 ? (128 - MXGEFW_PAD
)
1721 : (SMP_CACHE_BYTES
- MXGEFW_PAD
);
1723 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1724 mgp
->small_bytes
= VLAN_ETH_FRAME_LEN
;
1726 /* Override the small buffer size? */
1727 if (myri10ge_small_bytes
> 0)
1728 mgp
->small_bytes
= myri10ge_small_bytes
;
1730 /* get the lanai pointers to the send and receive rings */
1732 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1734 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1737 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1738 mgp
->rx_small
.lanai
=
1739 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1741 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1743 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1747 "myri10ge: %s: failed to get ring sizes or locations\n",
1749 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1750 goto abort_with_irq
;
1753 if (myri10ge_wcfifo
&& mgp
->wc_enabled
) {
1754 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_SEND_4
;
1755 mgp
->rx_small
.wc_fifo
=
1756 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_SMALL
;
1757 mgp
->rx_big
.wc_fifo
=
1758 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_BIG
;
1760 mgp
->tx
.wc_fifo
= NULL
;
1761 mgp
->rx_small
.wc_fifo
= NULL
;
1762 mgp
->rx_big
.wc_fifo
= NULL
;
1765 /* Firmware needs the big buff size as a power of 2. Lie and
1766 * tell him the buffer is larger, because we only use 1
1767 * buffer/pkt, and the mtu will prevent overruns.
1769 big_pow2
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1770 if (big_pow2
< MYRI10GE_ALLOC_SIZE
/ 2) {
1771 while ((big_pow2
& (big_pow2
- 1)) != 0)
1773 mgp
->big_bytes
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1775 big_pow2
= MYRI10GE_ALLOC_SIZE
;
1776 mgp
->big_bytes
= big_pow2
;
1779 status
= myri10ge_allocate_rings(dev
);
1781 goto abort_with_irq
;
1783 /* now give firmware buffers sizes, and MTU */
1784 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1785 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1786 cmd
.data0
= mgp
->small_bytes
;
1788 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1789 cmd
.data0
= big_pow2
;
1791 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1793 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1795 goto abort_with_rings
;
1798 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1799 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1800 cmd
.data2
= sizeof(struct mcp_irq_data
);
1801 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA_V2
, &cmd
, 0);
1802 if (status
== -ENOSYS
) {
1803 dma_addr_t bus
= mgp
->fw_stats_bus
;
1804 bus
+= offsetof(struct mcp_irq_data
, send_done_count
);
1805 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(bus
);
1806 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(bus
);
1807 status
= myri10ge_send_cmd(mgp
,
1808 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE
,
1810 /* Firmware cannot support multicast without STATS_DMA_V2 */
1811 mgp
->fw_multicast_support
= 0;
1813 mgp
->fw_multicast_support
= 1;
1816 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1818 goto abort_with_rings
;
1821 mgp
->link_state
= htonl(~0U);
1822 mgp
->rdma_tags_available
= 15;
1824 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1826 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1828 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1830 goto abort_with_rings
;
1833 mgp
->wake_queue
= 0;
1834 mgp
->stop_queue
= 0;
1835 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1836 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1837 add_timer(&mgp
->watchdog_timer
);
1838 netif_wake_queue(dev
);
1842 myri10ge_free_rings(dev
);
1845 myri10ge_free_irq(mgp
);
1848 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1852 static int myri10ge_close(struct net_device
*dev
)
1854 struct myri10ge_priv
*mgp
;
1855 struct myri10ge_cmd cmd
;
1856 int status
, old_down_cnt
;
1858 mgp
= netdev_priv(dev
);
1860 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1863 if (mgp
->tx
.req_bytes
== NULL
)
1866 del_timer_sync(&mgp
->watchdog_timer
);
1867 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1868 netif_poll_disable(mgp
->dev
);
1869 netif_carrier_off(dev
);
1870 netif_stop_queue(dev
);
1871 old_down_cnt
= mgp
->down_cnt
;
1873 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1875 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
1878 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
1879 if (old_down_cnt
== mgp
->down_cnt
)
1880 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
1882 netif_tx_disable(dev
);
1883 myri10ge_free_irq(mgp
);
1884 myri10ge_free_rings(dev
);
1886 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1890 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1891 * backwards one at a time and handle ring wraps */
1894 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
1895 struct mcp_kreq_ether_send
*src
, int cnt
)
1897 int idx
, starting_slot
;
1898 starting_slot
= tx
->req
;
1901 idx
= (starting_slot
+ cnt
) & tx
->mask
;
1902 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
1908 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1909 * at most 32 bytes at a time, so as to avoid involving the software
1910 * pio handler in the nic. We re-write the first segment's flags
1911 * to mark them valid only after writing the entire chain.
1915 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
1919 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
1920 struct mcp_kreq_ether_send
*srcp
;
1923 idx
= tx
->req
& tx
->mask
;
1925 last_flags
= src
->flags
;
1928 dst
= dstp
= &tx
->lanai
[idx
];
1931 if ((idx
+ cnt
) < tx
->mask
) {
1932 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
1933 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
1934 mb(); /* force write every 32 bytes */
1939 /* submit all but the first request, and ensure
1940 * that it is submitted below */
1941 myri10ge_submit_req_backwards(tx
, src
, cnt
);
1945 /* submit the first request */
1946 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
1947 mb(); /* barrier before setting valid flag */
1950 /* re-write the last 32-bits with the valid flags */
1951 src
->flags
= last_flags
;
1952 put_be32(*((__be32
*) src
+ 3), (__be32 __iomem
*) dst
+ 3);
1958 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
1959 struct mcp_kreq_ether_send
*src
, int cnt
)
1964 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
1970 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1971 * needs to be so that we don't overrun it */
1972 myri10ge_pio_copy(tx
->wc_fifo
+ MXGEFW_ETH_SEND_OFFSET(cnt
),
1979 * Transmit a packet. We need to split the packet so that a single
1980 * segment does not cross myri10ge->tx.boundary, so this makes segment
1981 * counting tricky. So rather than try to count segments up front, we
1982 * just give up if there are too few segments to hold a reasonably
1983 * fragmented packet currently available. If we run
1984 * out of segments while preparing a packet for DMA, we just linearize
1988 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1990 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
1991 struct mcp_kreq_ether_send
*req
;
1992 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1993 struct skb_frag_struct
*frag
;
1996 __be32 high_swapped
;
1998 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
1999 u16 pseudo_hdr_offset
, cksum_offset
;
2000 int cum_len
, seglen
, boundary
, rdma_count
;
2005 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
2008 max_segments
= MXGEFW_MAX_SEND_DESC
;
2010 if (skb
->len
> (dev
->mtu
+ ETH_HLEN
)) {
2011 mss
= skb_shinfo(skb
)->gso_size
;
2013 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
2016 if ((unlikely(avail
< max_segments
))) {
2017 /* we are out of transmit resources */
2019 netif_stop_queue(dev
);
2023 /* Setup checksum offloading, if needed */
2025 pseudo_hdr_offset
= 0;
2027 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
2028 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2029 cksum_offset
= (skb
->h
.raw
- skb
->data
);
2030 pseudo_hdr_offset
= cksum_offset
+ skb
->csum_offset
;
2031 /* If the headers are excessively large, then we must
2032 * fall back to a software checksum */
2033 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
2034 if (skb_checksum_help(skb
))
2037 pseudo_hdr_offset
= 0;
2039 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
2040 flags
|= MXGEFW_FLAGS_CKSUM
;
2046 if (mss
) { /* TSO */
2047 /* this removes any CKSUM flag from before */
2048 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
2050 /* negative cum_len signifies to the
2051 * send loop that we are still in the
2052 * header portion of the TSO packet.
2053 * TSO header must be at most 134 bytes long */
2054 cum_len
= -((skb
->h
.raw
- skb
->data
) + (skb
->h
.th
->doff
<< 2));
2056 /* for TSO, pseudo_hdr_offset holds mss.
2057 * The firmware figures out where to put
2058 * the checksum by parsing the header. */
2059 pseudo_hdr_offset
= mss
;
2061 /* Mark small packets, and pad out tiny packets */
2062 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
2063 flags
|= MXGEFW_FLAGS_SMALL
;
2065 /* pad frames to at least ETH_ZLEN bytes */
2066 if (unlikely(skb
->len
< ETH_ZLEN
)) {
2067 if (skb_padto(skb
, ETH_ZLEN
)) {
2068 /* The packet is gone, so we must
2070 mgp
->stats
.tx_dropped
+= 1;
2073 /* adjust the len to account for the zero pad
2074 * so that the nic can know how long it is */
2075 skb
->len
= ETH_ZLEN
;
2079 /* map the skb for DMA */
2080 len
= skb
->len
- skb
->data_len
;
2081 idx
= tx
->req
& tx
->mask
;
2082 tx
->info
[idx
].skb
= skb
;
2083 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2084 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2085 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2087 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
2092 /* "rdma_count" is the number of RDMAs belonging to the
2093 * current packet BEFORE the current send request. For
2094 * non-TSO packets, this is equal to "count".
2095 * For TSO packets, rdma_count needs to be reset
2096 * to 0 after a segment cut.
2098 * The rdma_count field of the send request is
2099 * the number of RDMAs of the packet starting at
2100 * that request. For TSO send requests with one ore more cuts
2101 * in the middle, this is the number of RDMAs starting
2102 * after the last cut in the request. All previous
2103 * segments before the last cut implicitly have 1 RDMA.
2105 * Since the number of RDMAs is not known beforehand,
2106 * it must be filled-in retroactively - after each
2107 * segmentation cut or at the end of the entire packet.
2111 /* Break the SKB or Fragment up into pieces which
2112 * do not cross mgp->tx.boundary */
2113 low
= MYRI10GE_LOWPART_TO_U32(bus
);
2114 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
2119 if (unlikely(count
== max_segments
))
2120 goto abort_linearize
;
2122 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2123 seglen
= boundary
- low
;
2126 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2127 cum_len_next
= cum_len
+ seglen
;
2128 if (mss
) { /* TSO */
2129 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2131 if (likely(cum_len
>= 0)) { /* payload */
2132 int next_is_first
, chop
;
2134 chop
= (cum_len_next
> mss
);
2135 cum_len_next
= cum_len_next
% mss
;
2136 next_is_first
= (cum_len_next
== 0);
2137 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2138 flags_next
|= next_is_first
*
2140 rdma_count
|= -(chop
| next_is_first
);
2141 rdma_count
+= chop
& !next_is_first
;
2142 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2148 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2149 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2150 MXGEFW_FLAGS_FIRST
|
2151 (small
* MXGEFW_FLAGS_SMALL
);
2154 req
->addr_high
= high_swapped
;
2155 req
->addr_low
= htonl(low
);
2156 req
->pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
2157 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2158 req
->rdma_count
= 1;
2159 req
->length
= htons(seglen
);
2160 req
->cksum_offset
= cksum_offset
;
2161 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2165 cum_len
= cum_len_next
;
2170 if (unlikely(cksum_offset
> seglen
))
2171 cksum_offset
-= seglen
;
2175 if (frag_idx
== frag_cnt
)
2178 /* map next fragment for DMA */
2179 idx
= (count
+ tx
->req
) & tx
->mask
;
2180 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2183 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2184 len
, PCI_DMA_TODEVICE
);
2185 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2186 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2189 (req
- rdma_count
)->rdma_count
= rdma_count
;
2193 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2194 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2195 MXGEFW_FLAGS_FIRST
)));
2196 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2197 tx
->info
[idx
].last
= 1;
2198 if (tx
->wc_fifo
== NULL
)
2199 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2201 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2203 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2205 netif_stop_queue(dev
);
2207 dev
->trans_start
= jiffies
;
2211 /* Free any DMA resources we've alloced and clear out the skb
2212 * slot so as to not trip up assertions, and to avoid a
2213 * double-free if linearizing fails */
2215 last_idx
= (idx
+ 1) & tx
->mask
;
2216 idx
= tx
->req
& tx
->mask
;
2217 tx
->info
[idx
].skb
= NULL
;
2219 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2221 if (tx
->info
[idx
].skb
!= NULL
)
2222 pci_unmap_single(mgp
->pdev
,
2223 pci_unmap_addr(&tx
->info
[idx
],
2227 pci_unmap_page(mgp
->pdev
,
2228 pci_unmap_addr(&tx
->info
[idx
],
2231 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2232 tx
->info
[idx
].skb
= NULL
;
2234 idx
= (idx
+ 1) & tx
->mask
;
2235 } while (idx
!= last_idx
);
2236 if (skb_is_gso(skb
)) {
2238 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2243 if (skb_linearize(skb
))
2246 mgp
->tx_linearized
++;
2250 dev_kfree_skb_any(skb
);
2251 mgp
->stats
.tx_dropped
+= 1;
2256 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2258 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2262 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2264 struct myri10ge_cmd cmd
;
2265 struct myri10ge_priv
*mgp
;
2266 struct dev_mc_list
*mc_list
;
2267 __be32 data
[2] = { 0, 0 };
2270 mgp
= netdev_priv(dev
);
2271 /* can be called from atomic contexts,
2272 * pass 1 to force atomicity in myri10ge_send_cmd() */
2273 myri10ge_change_promisc(mgp
, dev
->flags
& IFF_PROMISC
, 1);
2275 /* This firmware is known to not support multicast */
2276 if (!mgp
->fw_multicast_support
|| mgp
->adopted_rx_filter_bug
)
2279 /* Disable multicast filtering */
2281 err
= myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
2283 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2284 " error status: %d\n", dev
->name
, err
);
2288 if (dev
->flags
& IFF_ALLMULTI
) {
2289 /* request to disable multicast filtering, so quit here */
2293 /* Flush the filters */
2295 err
= myri10ge_send_cmd(mgp
, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS
,
2299 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2300 ", error status: %d\n", dev
->name
, err
);
2304 /* Walk the multicast list, and add each address */
2305 for (mc_list
= dev
->mc_list
; mc_list
!= NULL
; mc_list
= mc_list
->next
) {
2306 memcpy(data
, &mc_list
->dmi_addr
, 6);
2307 cmd
.data0
= ntohl(data
[0]);
2308 cmd
.data1
= ntohl(data
[1]);
2309 err
= myri10ge_send_cmd(mgp
, MXGEFW_JOIN_MULTICAST_GROUP
,
2313 printk(KERN_ERR
"myri10ge: %s: Failed "
2314 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2315 "%d\t", dev
->name
, err
);
2316 printk(KERN_ERR
"MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2317 ((unsigned char *)&mc_list
->dmi_addr
)[0],
2318 ((unsigned char *)&mc_list
->dmi_addr
)[1],
2319 ((unsigned char *)&mc_list
->dmi_addr
)[2],
2320 ((unsigned char *)&mc_list
->dmi_addr
)[3],
2321 ((unsigned char *)&mc_list
->dmi_addr
)[4],
2322 ((unsigned char *)&mc_list
->dmi_addr
)[5]
2327 /* Enable multicast filtering */
2328 err
= myri10ge_send_cmd(mgp
, MXGEFW_DISABLE_ALLMULTI
, &cmd
, 1);
2330 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2331 "error status: %d\n", dev
->name
, err
);
2341 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2343 struct sockaddr
*sa
= addr
;
2344 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2347 if (!is_valid_ether_addr(sa
->sa_data
))
2348 return -EADDRNOTAVAIL
;
2350 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2353 "myri10ge: %s: changing mac address failed with %d\n",
2358 /* change the dev structure */
2359 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2363 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2365 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2368 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2369 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2370 dev
->name
, new_mtu
);
2373 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2374 dev
->name
, dev
->mtu
, new_mtu
);
2376 /* if we change the mtu on an active device, we must
2377 * reset the device so the firmware sees the change */
2378 myri10ge_close(dev
);
2388 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2389 * Only do it if the bridge is a root port since we don't want to disturb
2390 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2393 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2395 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2396 struct device
*dev
= &mgp
->pdev
->dev
;
2403 if (!myri10ge_ecrc_enable
|| !bridge
)
2406 /* check that the bridge is a root port */
2407 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2408 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2409 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2410 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2411 if (myri10ge_ecrc_enable
> 1) {
2412 struct pci_dev
*old_bridge
= bridge
;
2414 /* Walk the hierarchy up to the root port
2415 * where ECRC has to be enabled */
2417 bridge
= bridge
->bus
->self
;
2420 "Failed to find root port"
2421 " to force ECRC\n");
2425 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2426 pci_read_config_word(bridge
,
2427 cap
+ PCI_CAP_FLAGS
, &val
);
2428 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2429 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2432 "Forcing ECRC on non-root port %s"
2433 " (enabling on root port %s)\n",
2434 pci_name(old_bridge
), pci_name(bridge
));
2437 "Not enabling ECRC on non-root port %s\n",
2443 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2447 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2449 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2451 dev_err(dev
, "\t pci=nommconf in use? "
2452 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2455 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2458 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2459 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2460 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2461 mgp
->tx
.boundary
= 4096;
2462 mgp
->fw_name
= myri10ge_fw_aligned
;
2466 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2467 * when the PCI-E Completion packets are aligned on an 8-byte
2468 * boundary. Some PCI-E chip sets always align Completion packets; on
2469 * the ones that do not, the alignment can be enforced by enabling
2470 * ECRC generation (if supported).
2472 * When PCI-E Completion packets are not aligned, it is actually more
2473 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2475 * If the driver can neither enable ECRC nor verify that it has
2476 * already been enabled, then it must use a firmware image which works
2477 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2478 * should also ensure that it never gives the device a Read-DMA which is
2479 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2480 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2481 * firmware image, and set tx.boundary to 4KB.
2484 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2485 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2487 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2489 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2491 mgp
->tx
.boundary
= 2048;
2492 mgp
->fw_name
= myri10ge_fw_unaligned
;
2494 if (myri10ge_force_firmware
== 0) {
2495 int link_width
, exp_cap
;
2498 exp_cap
= pci_find_capability(mgp
->pdev
, PCI_CAP_ID_EXP
);
2499 pci_read_config_word(mgp
->pdev
, exp_cap
+ PCI_EXP_LNKSTA
, &lnk
);
2500 link_width
= (lnk
>> 4) & 0x3f;
2502 myri10ge_enable_ecrc(mgp
);
2504 /* Check to see if Link is less than 8 or if the
2505 * upstream bridge is known to provide aligned
2507 if (link_width
< 8) {
2508 dev_info(&mgp
->pdev
->dev
, "PCIE x%d Link\n",
2510 mgp
->tx
.boundary
= 4096;
2511 mgp
->fw_name
= myri10ge_fw_aligned
;
2512 } else if (bridge
&&
2513 /* ServerWorks HT2000/HT1000 */
2514 ((bridge
->vendor
== PCI_VENDOR_ID_SERVERWORKS
2515 && bridge
->device
==
2516 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE
)
2517 /* All Intel E5000 PCIE ports */
2518 || (bridge
->vendor
== PCI_VENDOR_ID_INTEL
2519 && bridge
->device
>=
2520 PCI_DEVICE_ID_INTEL_E5000_PCIE23
2521 && bridge
->device
<=
2522 PCI_DEVICE_ID_INTEL_E5000_PCIE47
))) {
2523 dev_info(&mgp
->pdev
->dev
,
2524 "Assuming aligned completions (0x%x:0x%x)\n",
2525 bridge
->vendor
, bridge
->device
);
2526 mgp
->tx
.boundary
= 4096;
2527 mgp
->fw_name
= myri10ge_fw_aligned
;
2528 } else if (bridge
&&
2529 bridge
->vendor
== PCI_VENDOR_ID_SGI
&&
2530 bridge
->device
== 0x4002 /* TIOCE pcie-port */ ) {
2531 /* this pcie bridge does not support 4K rdma request */
2532 mgp
->tx
.boundary
= 2048;
2533 mgp
->fw_name
= myri10ge_fw_aligned
;
2536 if (myri10ge_force_firmware
== 1) {
2537 dev_info(&mgp
->pdev
->dev
,
2538 "Assuming aligned completions (forced)\n");
2539 mgp
->tx
.boundary
= 4096;
2540 mgp
->fw_name
= myri10ge_fw_aligned
;
2542 dev_info(&mgp
->pdev
->dev
,
2543 "Assuming unaligned completions (forced)\n");
2544 mgp
->tx
.boundary
= 2048;
2545 mgp
->fw_name
= myri10ge_fw_unaligned
;
2548 if (myri10ge_fw_name
!= NULL
) {
2549 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2551 mgp
->fw_name
= myri10ge_fw_name
;
2557 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2559 struct myri10ge_priv
*mgp
;
2560 struct net_device
*netdev
;
2562 mgp
= pci_get_drvdata(pdev
);
2567 netif_device_detach(netdev
);
2568 if (netif_running(netdev
)) {
2569 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2571 myri10ge_close(netdev
);
2574 myri10ge_dummy_rdma(mgp
, 0);
2575 pci_save_state(pdev
);
2576 pci_disable_device(pdev
);
2578 return pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2581 static int myri10ge_resume(struct pci_dev
*pdev
)
2583 struct myri10ge_priv
*mgp
;
2584 struct net_device
*netdev
;
2588 mgp
= pci_get_drvdata(pdev
);
2592 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2593 msleep(5); /* give card time to respond */
2594 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2595 if (vendor
== 0xffff) {
2596 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2601 status
= pci_restore_state(pdev
);
2605 status
= pci_enable_device(pdev
);
2607 dev_err(&pdev
->dev
, "failed to enable device\n");
2611 pci_set_master(pdev
);
2613 myri10ge_reset(mgp
);
2614 myri10ge_dummy_rdma(mgp
, 1);
2616 /* Save configuration space to be restored if the
2617 * nic resets due to a parity error */
2618 pci_save_state(pdev
);
2620 if (netif_running(netdev
)) {
2622 status
= myri10ge_open(netdev
);
2625 goto abort_with_enabled
;
2628 netif_device_attach(netdev
);
2633 pci_disable_device(pdev
);
2638 #endif /* CONFIG_PM */
2640 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2642 struct pci_dev
*pdev
= mgp
->pdev
;
2643 int vs
= mgp
->vendor_specific_offset
;
2646 /*enter read32 mode */
2647 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2649 /*read REBOOT_STATUS (0xfffffff0) */
2650 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2651 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2656 * This watchdog is used to check whether the board has suffered
2657 * from a parity error and needs to be recovered.
2659 static void myri10ge_watchdog(struct work_struct
*work
)
2661 struct myri10ge_priv
*mgp
=
2662 container_of(work
, struct myri10ge_priv
, watchdog_work
);
2667 mgp
->watchdog_resets
++;
2668 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2669 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2670 /* Bus master DMA disabled? Check to see
2671 * if the card rebooted due to a parity error
2672 * For now, just report it */
2673 reboot
= myri10ge_read_reboot(mgp
);
2675 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2676 mgp
->dev
->name
, reboot
);
2678 * A rebooted nic will come back with config space as
2679 * it was after power was applied to PCIe bus.
2680 * Attempt to restore config space which was saved
2681 * when the driver was loaded, or the last time the
2682 * nic was resumed from power saving mode.
2684 pci_restore_state(mgp
->pdev
);
2686 /* save state again for accounting reasons */
2687 pci_save_state(mgp
->pdev
);
2690 /* if we get back -1's from our slot, perhaps somebody
2691 * powered off our card. Don't try to reset it in
2693 if (cmd
== 0xffff) {
2694 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2695 if (vendor
== 0xffff) {
2697 "myri10ge: %s: device disappeared!\n",
2702 /* Perhaps it is a software error. Try to reset */
2704 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2706 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2707 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2708 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2709 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2711 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2712 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2713 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2714 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2717 myri10ge_close(mgp
->dev
);
2718 status
= myri10ge_load_firmware(mgp
);
2720 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2723 myri10ge_open(mgp
->dev
);
2728 * We use our own timer routine rather than relying upon
2729 * netdev->tx_timeout because we have a very large hardware transmit
2730 * queue. Due to the large queue, the netdev->tx_timeout function
2731 * cannot detect a NIC with a parity error in a timely fashion if the
2732 * NIC is lightly loaded.
2734 static void myri10ge_watchdog_timer(unsigned long arg
)
2736 struct myri10ge_priv
*mgp
;
2738 mgp
= (struct myri10ge_priv
*)arg
;
2740 if (mgp
->rx_small
.watchdog_needed
) {
2741 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
2742 mgp
->small_bytes
+ MXGEFW_PAD
, 1);
2743 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
>=
2744 myri10ge_fill_thresh
)
2745 mgp
->rx_small
.watchdog_needed
= 0;
2747 if (mgp
->rx_big
.watchdog_needed
) {
2748 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 1);
2749 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
>=
2750 myri10ge_fill_thresh
)
2751 mgp
->rx_big
.watchdog_needed
= 0;
2754 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2755 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
2756 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
)
2757 /* nic seems like it might be stuck.. */
2758 schedule_work(&mgp
->watchdog_work
);
2761 mod_timer(&mgp
->watchdog_timer
,
2762 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2764 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2765 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
2768 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2770 struct net_device
*netdev
;
2771 struct myri10ge_priv
*mgp
;
2772 struct device
*dev
= &pdev
->dev
;
2775 int status
= -ENXIO
;
2780 netdev
= alloc_etherdev(sizeof(*mgp
));
2781 if (netdev
== NULL
) {
2782 dev_err(dev
, "Could not allocate ethernet device\n");
2786 mgp
= netdev_priv(netdev
);
2787 memset(mgp
, 0, sizeof(*mgp
));
2790 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2791 mgp
->pause
= myri10ge_flow_control
;
2792 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2793 mgp
->msg_enable
= netif_msg_init(myri10ge_debug
, MYRI10GE_MSG_DEFAULT
);
2794 init_waitqueue_head(&mgp
->down_wq
);
2796 if (pci_enable_device(pdev
)) {
2797 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2799 goto abort_with_netdev
;
2801 myri10ge_select_firmware(mgp
);
2803 /* Find the vendor-specific cap so we can check
2804 * the reboot register later on */
2805 mgp
->vendor_specific_offset
2806 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2808 /* Set our max read request to 4KB */
2809 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2811 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2812 goto abort_with_netdev
;
2814 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2816 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2818 goto abort_with_netdev
;
2820 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2821 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2823 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2825 goto abort_with_netdev
;
2828 pci_set_master(pdev
);
2830 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2834 "64-bit pci address mask was refused, trying 32-bit");
2835 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2838 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2839 goto abort_with_netdev
;
2841 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2842 &mgp
->cmd_bus
, GFP_KERNEL
);
2843 if (mgp
->cmd
== NULL
)
2844 goto abort_with_netdev
;
2846 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2847 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2848 if (mgp
->fw_stats
== NULL
)
2849 goto abort_with_cmd
;
2851 mgp
->board_span
= pci_resource_len(pdev
, 0);
2852 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2854 mgp
->wc_enabled
= 0;
2856 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2857 MTRR_TYPE_WRCOMB
, 1);
2859 mgp
->wc_enabled
= 1;
2861 /* Hack. need to get rid of these magic numbers */
2863 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2864 if (mgp
->sram_size
> mgp
->board_span
) {
2865 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
2869 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
2870 if (mgp
->sram
== NULL
) {
2871 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
2872 mgp
->board_span
, mgp
->iomem_base
);
2876 memcpy_fromio(mgp
->eeprom_strings
,
2877 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
2878 MYRI10GE_EEPROM_STRINGS_SIZE
);
2879 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
2880 status
= myri10ge_read_mac_addr(mgp
);
2882 goto abort_with_ioremap
;
2884 for (i
= 0; i
< ETH_ALEN
; i
++)
2885 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
2887 /* allocate rx done ring */
2888 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2889 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
2890 &mgp
->rx_done
.bus
, GFP_KERNEL
);
2891 if (mgp
->rx_done
.entry
== NULL
)
2892 goto abort_with_ioremap
;
2893 memset(mgp
->rx_done
.entry
, 0, bytes
);
2895 status
= myri10ge_load_firmware(mgp
);
2897 dev_err(&pdev
->dev
, "failed to load firmware\n");
2898 goto abort_with_rx_done
;
2901 status
= myri10ge_reset(mgp
);
2903 dev_err(&pdev
->dev
, "failed reset\n");
2904 goto abort_with_firmware
;
2907 pci_set_drvdata(pdev
, mgp
);
2908 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
2909 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
2910 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
2911 myri10ge_initial_mtu
= 68;
2912 netdev
->mtu
= myri10ge_initial_mtu
;
2913 netdev
->open
= myri10ge_open
;
2914 netdev
->stop
= myri10ge_close
;
2915 netdev
->hard_start_xmit
= myri10ge_xmit
;
2916 netdev
->get_stats
= myri10ge_get_stats
;
2917 netdev
->base_addr
= mgp
->iomem_base
;
2918 netdev
->change_mtu
= myri10ge_change_mtu
;
2919 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
2920 netdev
->set_mac_address
= myri10ge_set_mac_address
;
2921 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
2923 netdev
->features
|= NETIF_F_HIGHDMA
;
2924 netdev
->poll
= myri10ge_poll
;
2925 netdev
->weight
= myri10ge_napi_weight
;
2927 /* make sure we can get an irq, and that MSI can be
2928 * setup (if available). Also ensure netdev->irq
2929 * is set to correct value if MSI is enabled */
2930 status
= myri10ge_request_irq(mgp
);
2932 goto abort_with_firmware
;
2933 netdev
->irq
= pdev
->irq
;
2934 myri10ge_free_irq(mgp
);
2936 /* Save configuration space to be restored if the
2937 * nic resets due to a parity error */
2938 pci_save_state(pdev
);
2940 /* Setup the watchdog timer */
2941 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
2942 (unsigned long)mgp
);
2944 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
2945 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
);
2946 status
= register_netdev(netdev
);
2948 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
2949 goto abort_with_state
;
2951 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2952 (mgp
->msi_enabled
? "MSI" : "xPIC"),
2953 netdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
2954 (mgp
->wc_enabled
? "Enabled" : "Disabled"));
2959 pci_restore_state(pdev
);
2961 abort_with_firmware
:
2962 myri10ge_dummy_rdma(mgp
, 0);
2965 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2966 dma_free_coherent(&pdev
->dev
, bytes
,
2967 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2975 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2977 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2978 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2981 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2982 mgp
->cmd
, mgp
->cmd_bus
);
2986 free_netdev(netdev
);
2993 * Does what is necessary to shutdown one Myrinet device. Called
2994 * once for each Myrinet card by the kernel when a module is
2997 static void myri10ge_remove(struct pci_dev
*pdev
)
2999 struct myri10ge_priv
*mgp
;
3000 struct net_device
*netdev
;
3003 mgp
= pci_get_drvdata(pdev
);
3007 flush_scheduled_work();
3009 unregister_netdev(netdev
);
3011 myri10ge_dummy_rdma(mgp
, 0);
3013 /* avoid a memory leak */
3014 pci_restore_state(pdev
);
3016 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3017 dma_free_coherent(&pdev
->dev
, bytes
,
3018 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3024 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3026 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3027 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3029 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3030 mgp
->cmd
, mgp
->cmd_bus
);
3032 free_netdev(netdev
);
3033 pci_set_drvdata(pdev
, NULL
);
3036 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3038 static struct pci_device_id myri10ge_pci_tbl
[] = {
3039 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
3043 static struct pci_driver myri10ge_driver
= {
3045 .probe
= myri10ge_probe
,
3046 .remove
= myri10ge_remove
,
3047 .id_table
= myri10ge_pci_tbl
,
3049 .suspend
= myri10ge_suspend
,
3050 .resume
= myri10ge_resume
,
3054 static __init
int myri10ge_init_module(void)
3056 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
3057 MYRI10GE_VERSION_STR
);
3058 return pci_register_driver(&myri10ge_driver
);
3061 module_init(myri10ge_init_module
);
3063 static __exit
void myri10ge_cleanup_module(void)
3065 pci_unregister_driver(&myri10ge_driver
);
3068 module_exit(myri10ge_cleanup_module
);