1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005, 2006 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.2.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR
);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 #define MYRI10GE_ALLOC_ORDER 0
96 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
97 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
99 struct myri10ge_rx_buffer_state
{
102 DECLARE_PCI_UNMAP_ADDR(bus
)
103 DECLARE_PCI_UNMAP_LEN(len
)
106 struct myri10ge_tx_buffer_state
{
109 DECLARE_PCI_UNMAP_ADDR(bus
)
110 DECLARE_PCI_UNMAP_LEN(len
)
113 struct myri10ge_cmd
{
119 struct myri10ge_rx_buf
{
120 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
121 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
122 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
123 struct myri10ge_rx_buffer_state
*info
;
130 int mask
; /* number of rx slots -1 */
134 struct myri10ge_tx_buf
{
135 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
136 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
137 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
139 struct myri10ge_tx_buffer_state
*info
;
140 int mask
; /* number of transmit slots -1 */
141 int boundary
; /* boundary transmits cannot cross */
142 int req ____cacheline_aligned
; /* transmit slots submitted */
143 int pkt_start
; /* packets started */
144 int done ____cacheline_aligned
; /* transmit slots completed */
145 int pkt_done
; /* packets completed */
148 struct myri10ge_rx_done
{
149 struct mcp_slot
*entry
;
155 struct myri10ge_priv
{
156 int running
; /* running? */
157 int csum_flag
; /* rx_csums? */
158 struct myri10ge_tx_buf tx
; /* transmit ring */
159 struct myri10ge_rx_buf rx_small
;
160 struct myri10ge_rx_buf rx_big
;
161 struct myri10ge_rx_done rx_done
;
164 struct net_device
*dev
;
165 struct net_device_stats stats
;
168 unsigned long board_span
;
169 unsigned long iomem_base
;
170 __be32 __iomem
*irq_claim
;
171 __be32 __iomem
*irq_deassert
;
172 char *mac_addr_string
;
173 struct mcp_cmd_response
*cmd
;
175 struct mcp_irq_data
*fw_stats
;
176 dma_addr_t fw_stats_bus
;
177 struct pci_dev
*pdev
;
180 unsigned int rdma_tags_available
;
182 __be32 __iomem
*intr_coal_delay_ptr
;
187 wait_queue_head_t down_wq
;
188 struct work_struct watchdog_work
;
189 struct timer_list watchdog_timer
;
190 int watchdog_tx_done
;
196 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
197 char fw_version
[128];
198 u8 mac_addr
[6]; /* eeprom mac address */
199 unsigned long serial_number
;
200 int vendor_specific_offset
;
201 int fw_multicast_support
;
209 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
210 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
212 static char *myri10ge_fw_name
= NULL
;
213 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
214 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
216 static int myri10ge_ecrc_enable
= 1;
217 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
218 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
220 static int myri10ge_max_intr_slots
= 1024;
221 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
222 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
224 static int myri10ge_small_bytes
= -1; /* -1 == auto */
225 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
226 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
228 static int myri10ge_msi
= 1; /* enable msi by default */
229 module_param(myri10ge_msi
, int, S_IRUGO
| S_IWUSR
);
230 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
232 static int myri10ge_intr_coal_delay
= 25;
233 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
234 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
236 static int myri10ge_flow_control
= 1;
237 module_param(myri10ge_flow_control
, int, S_IRUGO
);
238 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
240 static int myri10ge_deassert_wait
= 1;
241 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
242 MODULE_PARM_DESC(myri10ge_deassert_wait
,
243 "Wait when deasserting legacy interrupts\n");
245 static int myri10ge_force_firmware
= 0;
246 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
247 MODULE_PARM_DESC(myri10ge_force_firmware
,
248 "Force firmware to assume aligned completions\n");
250 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
251 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
252 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
254 static int myri10ge_napi_weight
= 64;
255 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
256 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
258 static int myri10ge_watchdog_timeout
= 1;
259 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
260 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
262 static int myri10ge_max_irq_loops
= 1048576;
263 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
264 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
265 "Set stuck legacy IRQ detection threshold\n");
267 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
269 static int myri10ge_debug
= -1; /* defaults above */
270 module_param(myri10ge_debug
, int, 0);
271 MODULE_PARM_DESC(myri10ge_debug
, "Debug level (0=none,...,16=all)");
273 static int myri10ge_fill_thresh
= 256;
274 module_param(myri10ge_fill_thresh
, int, S_IRUGO
| S_IWUSR
);
275 MODULE_PARM_DESC(myri10ge_fill_thresh
, "Number of empty rx slots allowed\n");
277 static int myri10ge_wcfifo
= 1;
278 module_param(myri10ge_wcfifo
, int, S_IRUGO
);
279 MODULE_PARM_DESC(myri10ge_wcfifo
, "Enable WC Fifo when WC is enabled\n");
281 #define MYRI10GE_FW_OFFSET 1024*1024
282 #define MYRI10GE_HIGHPART_TO_U32(X) \
283 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
284 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
286 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
288 static inline void put_be32(__be32 val
, __be32 __iomem
* p
)
290 __raw_writel((__force __u32
) val
, (__force
void __iomem
*)p
);
294 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
295 struct myri10ge_cmd
*data
, int atomic
)
298 char buf_bytes
[sizeof(*buf
) + 8];
299 struct mcp_cmd_response
*response
= mgp
->cmd
;
300 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_ETH_CMD
;
301 u32 dma_low
, dma_high
, result
, value
;
304 /* ensure buf is aligned to 8 bytes */
305 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
307 buf
->data0
= htonl(data
->data0
);
308 buf
->data1
= htonl(data
->data1
);
309 buf
->data2
= htonl(data
->data2
);
310 buf
->cmd
= htonl(cmd
);
311 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
312 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
314 buf
->response_addr
.low
= htonl(dma_low
);
315 buf
->response_addr
.high
= htonl(dma_high
);
316 response
->result
= htonl(MYRI10GE_NO_RESPONSE_RESULT
);
318 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
320 /* wait up to 15ms. Longest command is the DMA benchmark,
321 * which is capped at 5ms, but runs from a timeout handler
322 * that runs every 7.8ms. So a 15ms timeout leaves us with
326 /* if atomic is set, do not sleep,
327 * and try to get the completion quickly
328 * (1ms will be enough for those commands) */
329 for (sleep_total
= 0;
331 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
335 /* use msleep for most command */
336 for (sleep_total
= 0;
338 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
343 result
= ntohl(response
->result
);
344 value
= ntohl(response
->data
);
345 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
349 } else if (result
== MXGEFW_CMD_UNKNOWN
) {
352 dev_err(&mgp
->pdev
->dev
,
353 "command %d failed, result = %d\n",
359 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
365 * The eeprom strings on the lanaiX have the format
368 * PT:ddd mmm xx xx:xx:xx xx\0
369 * PV:ddd mmm xx xx:xx:xx xx\0
371 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
376 ptr
= mgp
->eeprom_strings
;
377 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
379 while (*ptr
!= '\0' && ptr
< limit
) {
380 if (memcmp(ptr
, "MAC=", 4) == 0) {
382 mgp
->mac_addr_string
= ptr
;
383 for (i
= 0; i
< 6; i
++) {
384 if ((ptr
+ 2) > limit
)
387 simple_strtoul(ptr
, &ptr
, 16);
391 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
393 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
395 while (ptr
< limit
&& *ptr
++) ;
401 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
406 * Enable or disable periodic RDMAs from the host to make certain
407 * chipsets resend dropped PCIe messages
410 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
412 char __iomem
*submit
;
414 u32 dma_low
, dma_high
;
417 /* clear confirmation addr */
421 /* send a rdma command to the PCIe engine, and wait for the
422 * response in the confirmation address. The firmware should
423 * write a -1 there to indicate it is alive and well
425 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
426 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
428 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
429 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
430 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
431 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
432 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
433 buf
[5] = htonl(enable
); /* enable? */
435 submit
= mgp
->sram
+ MXGEFW_BOOT_DUMMY_RDMA
;
437 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
438 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
440 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
441 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
442 (enable
? "enable" : "disable"));
446 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
447 struct mcp_gen_header
*hdr
)
449 struct device
*dev
= &mgp
->pdev
->dev
;
452 /* check firmware type */
453 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
454 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
458 /* save firmware version for ethtool */
459 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
461 sscanf(mgp
->fw_version
, "%d.%d", &major
, &minor
);
463 if (!(major
== MXGEFW_VERSION_MAJOR
&& minor
== MXGEFW_VERSION_MINOR
)) {
464 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
465 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
466 MXGEFW_VERSION_MINOR
);
472 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
474 unsigned crc
, reread_crc
;
475 const struct firmware
*fw
;
476 struct device
*dev
= &mgp
->pdev
->dev
;
477 struct mcp_gen_header
*hdr
;
482 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
483 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
486 goto abort_with_nothing
;
491 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
492 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
493 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
499 hdr_offset
= ntohl(*(__be32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
500 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
501 dev_err(dev
, "Bad firmware file\n");
505 hdr
= (void *)(fw
->data
+ hdr_offset
);
507 status
= myri10ge_validate_firmware(mgp
, hdr
);
511 crc
= crc32(~0, fw
->data
, fw
->size
);
512 for (i
= 0; i
< fw
->size
; i
+= 256) {
513 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
515 min(256U, (unsigned)(fw
->size
- i
)));
519 /* corruption checking is good for parity recovery and buggy chipset */
520 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
521 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
522 if (crc
!= reread_crc
) {
523 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
524 (unsigned)fw
->size
, reread_crc
, crc
);
528 *size
= (u32
) fw
->size
;
531 release_firmware(fw
);
537 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
539 struct mcp_gen_header
*hdr
;
540 struct device
*dev
= &mgp
->pdev
->dev
;
541 const size_t bytes
= sizeof(struct mcp_gen_header
);
545 /* find running firmware header */
546 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
548 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
549 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
554 /* copy header of running firmware from SRAM to host memory to
555 * validate firmware */
556 hdr
= kmalloc(bytes
, GFP_KERNEL
);
558 dev_err(dev
, "could not malloc firmware hdr\n");
561 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
562 status
= myri10ge_validate_firmware(mgp
, hdr
);
567 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
569 char __iomem
*submit
;
571 u32 dma_low
, dma_high
, size
;
575 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
577 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
579 /* Do not attempt to adopt firmware if there
584 status
= myri10ge_adopt_running_firmware(mgp
);
586 dev_err(&mgp
->pdev
->dev
,
587 "failed to adopt running firmware\n");
590 dev_info(&mgp
->pdev
->dev
,
591 "Successfully adopted running firmware\n");
592 if (mgp
->tx
.boundary
== 4096) {
593 dev_warn(&mgp
->pdev
->dev
,
594 "Using firmware currently running on NIC"
596 dev_warn(&mgp
->pdev
->dev
,
597 "performance consider loading optimized "
599 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
602 mgp
->fw_name
= "adopted";
603 mgp
->tx
.boundary
= 2048;
607 /* clear confirmation addr */
611 /* send a reload command to the bootstrap MCP, and wait for the
612 * response in the confirmation address. The firmware should
613 * write a -1 there to indicate it is alive and well
615 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
616 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
618 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
619 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
620 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
622 /* FIX: All newest firmware should un-protect the bottom of
623 * the sram before handoff. However, the very first interfaces
624 * do not. Therefore the handoff copy must skip the first 8 bytes
626 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
627 buf
[4] = htonl(size
- 8); /* length of code */
628 buf
[5] = htonl(8); /* where to copy to */
629 buf
[6] = htonl(0); /* where to jump to */
631 submit
= mgp
->sram
+ MXGEFW_BOOT_HANDOFF
;
633 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
638 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
642 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
643 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
646 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
647 myri10ge_dummy_rdma(mgp
, 1);
652 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
654 struct myri10ge_cmd cmd
;
657 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
658 | (addr
[2] << 8) | addr
[3]);
660 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
662 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
666 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
668 struct myri10ge_cmd cmd
;
671 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
672 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
676 "myri10ge: %s: Failed to set flow control mode\n",
685 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
687 struct myri10ge_cmd cmd
;
690 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
691 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
693 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
697 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
699 struct myri10ge_cmd cmd
;
704 /* try to send a reset command to the card to see if it
706 memset(&cmd
, 0, sizeof(cmd
));
707 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
709 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
713 /* Now exchange information about interrupts */
715 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
716 memset(mgp
->rx_done
.entry
, 0, bytes
);
717 cmd
.data0
= (u32
) bytes
;
718 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
719 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
720 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
721 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
724 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
725 mgp
->irq_claim
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
726 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
,
728 mgp
->irq_deassert
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
730 status
|= myri10ge_send_cmd
731 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
732 mgp
->intr_coal_delay_ptr
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
734 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
737 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
739 /* Run a small DMA test.
740 * The magic multipliers to the length tell the firmware
741 * to do DMA read, write, or read+write tests. The
742 * results are returned in cmd.data0. The upper 16
743 * bits or the return is the number of transfers completed.
744 * The lower 16 bits is the time in 0.5us ticks that the
745 * transfers took to complete.
748 len
= mgp
->tx
.boundary
;
750 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
751 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
752 cmd
.data2
= len
* 0x10000;
753 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
755 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) /
756 (cmd
.data0
& 0xffff);
758 dev_warn(&mgp
->pdev
->dev
, "DMA read benchmark failed: %d\n",
760 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
761 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
762 cmd
.data2
= len
* 0x1;
763 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
765 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) /
766 (cmd
.data0
& 0xffff);
768 dev_warn(&mgp
->pdev
->dev
, "DMA write benchmark failed: %d\n",
771 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
772 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
773 cmd
.data2
= len
* 0x10001;
774 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
776 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
777 (cmd
.data0
& 0xffff);
779 dev_warn(&mgp
->pdev
->dev
,
780 "DMA read/write benchmark failed: %d\n", status
);
782 memset(mgp
->rx_done
.entry
, 0, bytes
);
784 /* reset mcp/driver shared state back to 0 */
787 mgp
->tx
.pkt_start
= 0;
788 mgp
->tx
.pkt_done
= 0;
790 mgp
->rx_small
.cnt
= 0;
791 mgp
->rx_done
.idx
= 0;
792 mgp
->rx_done
.cnt
= 0;
793 mgp
->link_changes
= 0;
794 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
795 myri10ge_change_promisc(mgp
, 0, 0);
796 myri10ge_change_pause(mgp
, mgp
->pause
);
801 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
802 struct mcp_kreq_ether_recv
*src
)
807 src
->addr_low
= htonl(DMA_32BIT_MASK
);
808 myri10ge_pio_copy(dst
, src
, 4 * sizeof(*src
));
810 myri10ge_pio_copy(dst
+ 4, src
+ 4, 4 * sizeof(*src
));
813 put_be32(low
, &dst
->addr_low
);
817 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, __wsum hw_csum
)
819 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
821 if ((skb
->protocol
== htons(ETH_P_8021Q
)) &&
822 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
823 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
825 skb
->ip_summed
= CHECKSUM_COMPLETE
;
830 myri10ge_rx_skb_build(struct sk_buff
*skb
, u8
* va
,
831 struct skb_frag_struct
*rx_frags
, int len
, int hlen
)
833 struct skb_frag_struct
*skb_frags
;
835 skb
->len
= skb
->data_len
= len
;
836 skb
->truesize
= len
+ sizeof(struct sk_buff
);
837 /* attach the page(s) */
839 skb_frags
= skb_shinfo(skb
)->frags
;
841 memcpy(skb_frags
, rx_frags
, sizeof(*skb_frags
));
842 len
-= rx_frags
->size
;
845 skb_shinfo(skb
)->nr_frags
++;
848 /* pskb_may_pull is not available in irq context, but
849 * skb_pull() (for ether_pad and eth_type_trans()) requires
850 * the beginning of the packet in skb_headlen(), move it
852 memcpy(skb
->data
, va
, hlen
);
853 skb_shinfo(skb
)->frags
[0].page_offset
+= hlen
;
854 skb_shinfo(skb
)->frags
[0].size
-= hlen
;
855 skb
->data_len
-= hlen
;
857 skb_pull(skb
, MXGEFW_PAD
);
861 myri10ge_alloc_rx_pages(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
862 int bytes
, int watchdog
)
867 if (unlikely(rx
->watchdog_needed
&& !watchdog
))
870 /* try to refill entire ring */
871 while (rx
->fill_cnt
!= (rx
->cnt
+ rx
->mask
+ 1)) {
872 idx
= rx
->fill_cnt
& rx
->mask
;
874 if ((bytes
< MYRI10GE_ALLOC_SIZE
/ 2) &&
875 (rx
->page_offset
+ bytes
<= MYRI10GE_ALLOC_SIZE
)) {
876 /* we can use part of previous page */
879 /* we need a new page */
881 alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
882 MYRI10GE_ALLOC_ORDER
);
883 if (unlikely(page
== NULL
)) {
884 if (rx
->fill_cnt
- rx
->cnt
< 16)
885 rx
->watchdog_needed
= 1;
890 rx
->bus
= pci_map_page(mgp
->pdev
, page
, 0,
894 rx
->info
[idx
].page
= rx
->page
;
895 rx
->info
[idx
].page_offset
= rx
->page_offset
;
896 /* note that this is the address of the start of the
898 pci_unmap_addr_set(&rx
->info
[idx
], bus
, rx
->bus
);
899 rx
->shadow
[idx
].addr_low
=
900 htonl(MYRI10GE_LOWPART_TO_U32(rx
->bus
) + rx
->page_offset
);
901 rx
->shadow
[idx
].addr_high
=
902 htonl(MYRI10GE_HIGHPART_TO_U32(rx
->bus
));
904 /* start next packet on a cacheline boundary */
905 rx
->page_offset
+= SKB_DATA_ALIGN(bytes
);
908 /* copy 8 descriptors to the firmware at a time */
909 if ((idx
& 7) == 7) {
910 if (rx
->wc_fifo
== NULL
)
911 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
912 &rx
->shadow
[idx
- 7]);
915 myri10ge_pio_copy(rx
->wc_fifo
,
916 &rx
->shadow
[idx
- 7], 64);
923 myri10ge_unmap_rx_page(struct pci_dev
*pdev
,
924 struct myri10ge_rx_buffer_state
*info
, int bytes
)
926 /* unmap the recvd page if we're the only or last user of it */
927 if (bytes
>= MYRI10GE_ALLOC_SIZE
/ 2 ||
928 (info
->page_offset
+ 2 * bytes
) > MYRI10GE_ALLOC_SIZE
) {
929 pci_unmap_page(pdev
, (pci_unmap_addr(info
, bus
)
930 & ~(MYRI10GE_ALLOC_SIZE
- 1)),
931 MYRI10GE_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
935 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
936 * page into an skb */
939 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
940 int bytes
, int len
, __wsum csum
)
943 struct skb_frag_struct rx_frags
[MYRI10GE_MAX_FRAGS_PER_FRAME
];
944 int i
, idx
, hlen
, remainder
;
945 struct pci_dev
*pdev
= mgp
->pdev
;
946 struct net_device
*dev
= mgp
->dev
;
950 idx
= rx
->cnt
& rx
->mask
;
951 va
= page_address(rx
->info
[idx
].page
) + rx
->info
[idx
].page_offset
;
953 /* Fill skb_frag_struct(s) with data from our receive */
954 for (i
= 0, remainder
= len
; remainder
> 0; i
++) {
955 myri10ge_unmap_rx_page(pdev
, &rx
->info
[idx
], bytes
);
956 rx_frags
[i
].page
= rx
->info
[idx
].page
;
957 rx_frags
[i
].page_offset
= rx
->info
[idx
].page_offset
;
958 if (remainder
< MYRI10GE_ALLOC_SIZE
)
959 rx_frags
[i
].size
= remainder
;
961 rx_frags
[i
].size
= MYRI10GE_ALLOC_SIZE
;
963 idx
= rx
->cnt
& rx
->mask
;
964 remainder
-= MYRI10GE_ALLOC_SIZE
;
967 hlen
= MYRI10GE_HLEN
> len
? len
: MYRI10GE_HLEN
;
969 /* allocate an skb to attach the page(s) to. */
971 skb
= netdev_alloc_skb(dev
, MYRI10GE_HLEN
+ 16);
972 if (unlikely(skb
== NULL
)) {
973 mgp
->stats
.rx_dropped
++;
976 put_page(rx_frags
[i
].page
);
981 /* Attach the pages to the skb, and trim off any padding */
982 myri10ge_rx_skb_build(skb
, va
, rx_frags
, len
, hlen
);
983 if (skb_shinfo(skb
)->frags
[0].size
<= 0) {
984 put_page(skb_shinfo(skb
)->frags
[0].page
);
985 skb_shinfo(skb
)->nr_frags
= 0;
987 skb
->protocol
= eth_type_trans(skb
, dev
);
990 if (mgp
->csum_flag
) {
991 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
992 (skb
->protocol
== htons(ETH_P_IPV6
))) {
994 skb
->ip_summed
= CHECKSUM_COMPLETE
;
996 myri10ge_vlan_ip_csum(skb
, csum
);
998 netif_receive_skb(skb
);
999 dev
->last_rx
= jiffies
;
1003 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
1005 struct pci_dev
*pdev
= mgp
->pdev
;
1006 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1007 struct sk_buff
*skb
;
1011 while (tx
->pkt_done
!= mcp_index
) {
1012 idx
= tx
->done
& tx
->mask
;
1013 skb
= tx
->info
[idx
].skb
;
1016 tx
->info
[idx
].skb
= NULL
;
1017 if (tx
->info
[idx
].last
) {
1019 tx
->info
[idx
].last
= 0;
1022 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1023 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1025 mgp
->stats
.tx_bytes
+= skb
->len
;
1026 mgp
->stats
.tx_packets
++;
1027 dev_kfree_skb_irq(skb
);
1029 pci_unmap_single(pdev
,
1030 pci_unmap_addr(&tx
->info
[idx
],
1035 pci_unmap_page(pdev
,
1036 pci_unmap_addr(&tx
->info
[idx
],
1041 /* limit potential for livelock by only handling
1042 * 2 full tx rings per call */
1043 if (unlikely(++limit
> 2 * tx
->mask
))
1046 /* start the queue if we've stopped it */
1047 if (netif_queue_stopped(mgp
->dev
)
1048 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1050 netif_wake_queue(mgp
->dev
);
1054 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1056 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1057 unsigned long rx_bytes
= 0;
1058 unsigned long rx_packets
= 0;
1059 unsigned long rx_ok
;
1061 int idx
= rx_done
->idx
;
1062 int cnt
= rx_done
->cnt
;
1066 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1067 length
= ntohs(rx_done
->entry
[idx
].length
);
1068 rx_done
->entry
[idx
].length
= 0;
1069 checksum
= csum_unfold(rx_done
->entry
[idx
].checksum
);
1070 if (length
<= mgp
->small_bytes
)
1071 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1075 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1078 rx_packets
+= rx_ok
;
1079 rx_bytes
+= rx_ok
* (unsigned long)length
;
1081 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1083 /* limit potential for livelock by only handling a
1084 * limited number of frames. */
1089 mgp
->stats
.rx_packets
+= rx_packets
;
1090 mgp
->stats
.rx_bytes
+= rx_bytes
;
1092 /* restock receive rings if needed */
1093 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
< myri10ge_fill_thresh
)
1094 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1095 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1096 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
< myri10ge_fill_thresh
)
1097 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1101 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1103 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1105 if (unlikely(stats
->stats_updated
)) {
1106 if (mgp
->link_state
!= stats
->link_up
) {
1107 mgp
->link_state
= stats
->link_up
;
1108 if (mgp
->link_state
) {
1109 if (netif_msg_link(mgp
))
1111 "myri10ge: %s: link up\n",
1113 netif_carrier_on(mgp
->dev
);
1114 mgp
->link_changes
++;
1116 if (netif_msg_link(mgp
))
1118 "myri10ge: %s: link down\n",
1120 netif_carrier_off(mgp
->dev
);
1121 mgp
->link_changes
++;
1124 if (mgp
->rdma_tags_available
!=
1125 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1126 mgp
->rdma_tags_available
=
1127 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1128 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1129 "%d tags left\n", mgp
->dev
->name
,
1130 mgp
->rdma_tags_available
);
1132 mgp
->down_cnt
+= stats
->link_down
;
1133 if (stats
->link_down
)
1134 wake_up(&mgp
->down_wq
);
1138 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1140 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1141 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1142 int limit
, orig_limit
, work_done
;
1144 /* process as many rx events as NAPI will allow */
1145 limit
= min(*budget
, netdev
->quota
);
1147 myri10ge_clean_rx_done(mgp
, &limit
);
1148 work_done
= orig_limit
- limit
;
1149 *budget
-= work_done
;
1150 netdev
->quota
-= work_done
;
1152 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1153 netif_rx_complete(netdev
);
1154 put_be32(htonl(3), mgp
->irq_claim
);
1160 static irqreturn_t
myri10ge_intr(int irq
, void *arg
)
1162 struct myri10ge_priv
*mgp
= arg
;
1163 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1164 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1165 u32 send_done_count
;
1168 /* make sure it is our IRQ, and that the DMA has finished */
1169 if (unlikely(!stats
->valid
))
1172 /* low bit indicates receives are present, so schedule
1173 * napi poll handler */
1174 if (stats
->valid
& 1)
1175 netif_rx_schedule(mgp
->dev
);
1177 if (!mgp
->msi_enabled
) {
1178 put_be32(0, mgp
->irq_deassert
);
1179 if (!myri10ge_deassert_wait
)
1185 /* Wait for IRQ line to go low, if using INTx */
1189 /* check for transmit completes and receives */
1190 send_done_count
= ntohl(stats
->send_done_count
);
1191 if (send_done_count
!= tx
->pkt_done
)
1192 myri10ge_tx_done(mgp
, (int)send_done_count
);
1193 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1194 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1197 schedule_work(&mgp
->watchdog_work
);
1199 if (likely(stats
->valid
== 0))
1205 myri10ge_check_statblock(mgp
);
1207 put_be32(htonl(3), mgp
->irq_claim
+ 1);
1208 return (IRQ_HANDLED
);
1212 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1214 cmd
->autoneg
= AUTONEG_DISABLE
;
1215 cmd
->speed
= SPEED_10000
;
1216 cmd
->duplex
= DUPLEX_FULL
;
1221 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1223 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1225 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1226 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1227 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1228 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1232 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1234 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1235 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1240 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1242 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1244 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1245 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1250 myri10ge_get_pauseparam(struct net_device
*netdev
,
1251 struct ethtool_pauseparam
*pause
)
1253 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1256 pause
->rx_pause
= mgp
->pause
;
1257 pause
->tx_pause
= mgp
->pause
;
1261 myri10ge_set_pauseparam(struct net_device
*netdev
,
1262 struct ethtool_pauseparam
*pause
)
1264 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1266 if (pause
->tx_pause
!= mgp
->pause
)
1267 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1268 if (pause
->rx_pause
!= mgp
->pause
)
1269 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1270 if (pause
->autoneg
!= 0)
1276 myri10ge_get_ringparam(struct net_device
*netdev
,
1277 struct ethtool_ringparam
*ring
)
1279 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1281 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1282 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1283 ring
->rx_jumbo_max_pending
= 0;
1284 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1285 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1286 ring
->rx_pending
= ring
->rx_max_pending
;
1287 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1288 ring
->tx_pending
= ring
->tx_max_pending
;
1291 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1293 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1300 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1302 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1304 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1310 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1311 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1312 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1313 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1314 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1315 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1316 "tx_heartbeat_errors", "tx_window_errors",
1317 /* device-specific stats */
1318 "tx_boundary", "WC", "irq", "MSI",
1319 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1320 "serial_number", "tx_pkt_start", "tx_pkt_done",
1321 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1322 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1323 "link_changes", "link_up", "dropped_link_overflow",
1324 "dropped_link_error_or_filtered", "dropped_multicast_filtered",
1325 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1326 "dropped_no_big_buffer"
1329 #define MYRI10GE_NET_STATS_LEN 21
1330 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1333 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1335 switch (stringset
) {
1337 memcpy(data
, *myri10ge_gstrings_stats
,
1338 sizeof(myri10ge_gstrings_stats
));
1343 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1345 return MYRI10GE_STATS_LEN
;
1349 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1350 struct ethtool_stats
*stats
, u64
* data
)
1352 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1355 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1356 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1358 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1359 data
[i
++] = (unsigned int)(mgp
->mtrr
>= 0);
1360 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1361 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1362 data
[i
++] = (unsigned int)mgp
->read_dma
;
1363 data
[i
++] = (unsigned int)mgp
->write_dma
;
1364 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1365 data
[i
++] = (unsigned int)mgp
->serial_number
;
1366 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1367 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1368 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1369 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1370 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1371 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1372 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1373 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1374 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1375 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1376 data
[i
++] = (unsigned int)mgp
->link_changes
;
1377 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1378 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1380 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1382 (unsigned int)ntohl(mgp
->fw_stats
->dropped_multicast_filtered
);
1383 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1384 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1385 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1386 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1389 static void myri10ge_set_msglevel(struct net_device
*netdev
, u32 value
)
1391 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1392 mgp
->msg_enable
= value
;
1395 static u32
myri10ge_get_msglevel(struct net_device
*netdev
)
1397 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1398 return mgp
->msg_enable
;
1401 static const struct ethtool_ops myri10ge_ethtool_ops
= {
1402 .get_settings
= myri10ge_get_settings
,
1403 .get_drvinfo
= myri10ge_get_drvinfo
,
1404 .get_coalesce
= myri10ge_get_coalesce
,
1405 .set_coalesce
= myri10ge_set_coalesce
,
1406 .get_pauseparam
= myri10ge_get_pauseparam
,
1407 .set_pauseparam
= myri10ge_set_pauseparam
,
1408 .get_ringparam
= myri10ge_get_ringparam
,
1409 .get_rx_csum
= myri10ge_get_rx_csum
,
1410 .set_rx_csum
= myri10ge_set_rx_csum
,
1411 .get_tx_csum
= ethtool_op_get_tx_csum
,
1412 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1413 .get_sg
= ethtool_op_get_sg
,
1414 .set_sg
= ethtool_op_set_sg
,
1416 .get_tso
= ethtool_op_get_tso
,
1417 .set_tso
= ethtool_op_set_tso
,
1419 .get_strings
= myri10ge_get_strings
,
1420 .get_stats_count
= myri10ge_get_stats_count
,
1421 .get_ethtool_stats
= myri10ge_get_ethtool_stats
,
1422 .set_msglevel
= myri10ge_set_msglevel
,
1423 .get_msglevel
= myri10ge_get_msglevel
1426 static int myri10ge_allocate_rings(struct net_device
*dev
)
1428 struct myri10ge_priv
*mgp
;
1429 struct myri10ge_cmd cmd
;
1430 int tx_ring_size
, rx_ring_size
;
1431 int tx_ring_entries
, rx_ring_entries
;
1435 mgp
= netdev_priv(dev
);
1437 /* get ring sizes */
1439 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1440 tx_ring_size
= cmd
.data0
;
1441 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1442 rx_ring_size
= cmd
.data0
;
1444 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1445 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1446 mgp
->tx
.mask
= tx_ring_entries
- 1;
1447 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1449 /* allocate the host shadow rings */
1451 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1452 * sizeof(*mgp
->tx
.req_list
);
1453 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1454 if (mgp
->tx
.req_bytes
== NULL
)
1455 goto abort_with_nothing
;
1457 /* ensure req_list entries are aligned to 8 bytes */
1458 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1459 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1461 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1462 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1463 if (mgp
->rx_small
.shadow
== NULL
)
1464 goto abort_with_tx_req_bytes
;
1466 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1467 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1468 if (mgp
->rx_big
.shadow
== NULL
)
1469 goto abort_with_rx_small_shadow
;
1471 /* allocate the host info rings */
1473 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1474 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1475 if (mgp
->tx
.info
== NULL
)
1476 goto abort_with_rx_big_shadow
;
1478 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1479 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1480 if (mgp
->rx_small
.info
== NULL
)
1481 goto abort_with_tx_info
;
1483 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1484 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1485 if (mgp
->rx_big
.info
== NULL
)
1486 goto abort_with_rx_small_info
;
1488 /* Fill the receive rings */
1489 mgp
->rx_big
.cnt
= 0;
1490 mgp
->rx_small
.cnt
= 0;
1491 mgp
->rx_big
.fill_cnt
= 0;
1492 mgp
->rx_small
.fill_cnt
= 0;
1493 mgp
->rx_small
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1494 mgp
->rx_big
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1495 mgp
->rx_small
.watchdog_needed
= 0;
1496 mgp
->rx_big
.watchdog_needed
= 0;
1497 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1498 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1500 if (mgp
->rx_small
.fill_cnt
< mgp
->rx_small
.mask
+ 1) {
1501 printk(KERN_ERR
"myri10ge: %s: alloced only %d small bufs\n",
1502 dev
->name
, mgp
->rx_small
.fill_cnt
);
1503 goto abort_with_rx_small_ring
;
1506 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1507 if (mgp
->rx_big
.fill_cnt
< mgp
->rx_big
.mask
+ 1) {
1508 printk(KERN_ERR
"myri10ge: %s: alloced only %d big bufs\n",
1509 dev
->name
, mgp
->rx_big
.fill_cnt
);
1510 goto abort_with_rx_big_ring
;
1515 abort_with_rx_big_ring
:
1516 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1517 int idx
= i
& mgp
->rx_big
.mask
;
1518 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1520 put_page(mgp
->rx_big
.info
[idx
].page
);
1523 abort_with_rx_small_ring
:
1524 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1525 int idx
= i
& mgp
->rx_small
.mask
;
1526 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1527 mgp
->small_bytes
+ MXGEFW_PAD
);
1528 put_page(mgp
->rx_small
.info
[idx
].page
);
1531 kfree(mgp
->rx_big
.info
);
1533 abort_with_rx_small_info
:
1534 kfree(mgp
->rx_small
.info
);
1537 kfree(mgp
->tx
.info
);
1539 abort_with_rx_big_shadow
:
1540 kfree(mgp
->rx_big
.shadow
);
1542 abort_with_rx_small_shadow
:
1543 kfree(mgp
->rx_small
.shadow
);
1545 abort_with_tx_req_bytes
:
1546 kfree(mgp
->tx
.req_bytes
);
1547 mgp
->tx
.req_bytes
= NULL
;
1548 mgp
->tx
.req_list
= NULL
;
1554 static void myri10ge_free_rings(struct net_device
*dev
)
1556 struct myri10ge_priv
*mgp
;
1557 struct sk_buff
*skb
;
1558 struct myri10ge_tx_buf
*tx
;
1561 mgp
= netdev_priv(dev
);
1563 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1564 idx
= i
& mgp
->rx_big
.mask
;
1565 if (i
== mgp
->rx_big
.fill_cnt
- 1)
1566 mgp
->rx_big
.info
[idx
].page_offset
= MYRI10GE_ALLOC_SIZE
;
1567 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1569 put_page(mgp
->rx_big
.info
[idx
].page
);
1572 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1573 idx
= i
& mgp
->rx_small
.mask
;
1574 if (i
== mgp
->rx_small
.fill_cnt
- 1)
1575 mgp
->rx_small
.info
[idx
].page_offset
=
1576 MYRI10GE_ALLOC_SIZE
;
1577 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1578 mgp
->small_bytes
+ MXGEFW_PAD
);
1579 put_page(mgp
->rx_small
.info
[idx
].page
);
1582 while (tx
->done
!= tx
->req
) {
1583 idx
= tx
->done
& tx
->mask
;
1584 skb
= tx
->info
[idx
].skb
;
1587 tx
->info
[idx
].skb
= NULL
;
1589 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1590 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1592 mgp
->stats
.tx_dropped
++;
1593 dev_kfree_skb_any(skb
);
1595 pci_unmap_single(mgp
->pdev
,
1596 pci_unmap_addr(&tx
->info
[idx
],
1601 pci_unmap_page(mgp
->pdev
,
1602 pci_unmap_addr(&tx
->info
[idx
],
1607 kfree(mgp
->rx_big
.info
);
1609 kfree(mgp
->rx_small
.info
);
1611 kfree(mgp
->tx
.info
);
1613 kfree(mgp
->rx_big
.shadow
);
1615 kfree(mgp
->rx_small
.shadow
);
1617 kfree(mgp
->tx
.req_bytes
);
1618 mgp
->tx
.req_bytes
= NULL
;
1619 mgp
->tx
.req_list
= NULL
;
1622 static int myri10ge_request_irq(struct myri10ge_priv
*mgp
)
1624 struct pci_dev
*pdev
= mgp
->pdev
;
1628 status
= pci_enable_msi(pdev
);
1631 "Error %d setting up MSI; falling back to xPIC\n",
1634 mgp
->msi_enabled
= 1;
1636 mgp
->msi_enabled
= 0;
1638 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
1639 mgp
->dev
->name
, mgp
);
1641 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
1642 if (mgp
->msi_enabled
)
1643 pci_disable_msi(pdev
);
1648 static void myri10ge_free_irq(struct myri10ge_priv
*mgp
)
1650 struct pci_dev
*pdev
= mgp
->pdev
;
1652 free_irq(pdev
->irq
, mgp
);
1653 if (mgp
->msi_enabled
)
1654 pci_disable_msi(pdev
);
1657 static int myri10ge_open(struct net_device
*dev
)
1659 struct myri10ge_priv
*mgp
;
1660 struct myri10ge_cmd cmd
;
1661 int status
, big_pow2
;
1663 mgp
= netdev_priv(dev
);
1665 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1668 mgp
->running
= MYRI10GE_ETH_STARTING
;
1669 status
= myri10ge_reset(mgp
);
1671 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1672 goto abort_with_nothing
;
1675 status
= myri10ge_request_irq(mgp
);
1677 goto abort_with_nothing
;
1679 /* decide what small buffer size to use. For good TCP rx
1680 * performance, it is important to not receive 1514 byte
1681 * frames into jumbo buffers, as it confuses the socket buffer
1682 * accounting code, leading to drops and erratic performance.
1685 if (dev
->mtu
<= ETH_DATA_LEN
)
1686 /* enough for a TCP header */
1687 mgp
->small_bytes
= (128 > SMP_CACHE_BYTES
)
1688 ? (128 - MXGEFW_PAD
)
1689 : (SMP_CACHE_BYTES
- MXGEFW_PAD
);
1691 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1692 mgp
->small_bytes
= VLAN_ETH_FRAME_LEN
;
1694 /* Override the small buffer size? */
1695 if (myri10ge_small_bytes
> 0)
1696 mgp
->small_bytes
= myri10ge_small_bytes
;
1698 /* get the lanai pointers to the send and receive rings */
1700 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1702 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1705 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1706 mgp
->rx_small
.lanai
=
1707 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1709 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1711 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1715 "myri10ge: %s: failed to get ring sizes or locations\n",
1717 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1718 goto abort_with_irq
;
1721 if (myri10ge_wcfifo
&& mgp
->mtrr
>= 0) {
1722 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_SEND_4
;
1723 mgp
->rx_small
.wc_fifo
=
1724 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_SMALL
;
1725 mgp
->rx_big
.wc_fifo
=
1726 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_BIG
;
1728 mgp
->tx
.wc_fifo
= NULL
;
1729 mgp
->rx_small
.wc_fifo
= NULL
;
1730 mgp
->rx_big
.wc_fifo
= NULL
;
1733 /* Firmware needs the big buff size as a power of 2. Lie and
1734 * tell him the buffer is larger, because we only use 1
1735 * buffer/pkt, and the mtu will prevent overruns.
1737 big_pow2
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1738 if (big_pow2
< MYRI10GE_ALLOC_SIZE
/ 2) {
1739 while ((big_pow2
& (big_pow2
- 1)) != 0)
1741 mgp
->big_bytes
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1743 big_pow2
= MYRI10GE_ALLOC_SIZE
;
1744 mgp
->big_bytes
= big_pow2
;
1747 status
= myri10ge_allocate_rings(dev
);
1749 goto abort_with_irq
;
1751 /* now give firmware buffers sizes, and MTU */
1752 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1753 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1754 cmd
.data0
= mgp
->small_bytes
;
1756 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1757 cmd
.data0
= big_pow2
;
1759 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1761 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1763 goto abort_with_rings
;
1766 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1767 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1768 cmd
.data2
= sizeof(struct mcp_irq_data
);
1769 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA_V2
, &cmd
, 0);
1770 if (status
== -ENOSYS
) {
1771 dma_addr_t bus
= mgp
->fw_stats_bus
;
1772 bus
+= offsetof(struct mcp_irq_data
, send_done_count
);
1773 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(bus
);
1774 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(bus
);
1775 status
= myri10ge_send_cmd(mgp
,
1776 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE
,
1778 /* Firmware cannot support multicast without STATS_DMA_V2 */
1779 mgp
->fw_multicast_support
= 0;
1781 mgp
->fw_multicast_support
= 1;
1784 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1786 goto abort_with_rings
;
1789 mgp
->link_state
= htonl(~0U);
1790 mgp
->rdma_tags_available
= 15;
1792 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1794 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1796 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1798 goto abort_with_rings
;
1801 mgp
->wake_queue
= 0;
1802 mgp
->stop_queue
= 0;
1803 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1804 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1805 add_timer(&mgp
->watchdog_timer
);
1806 netif_wake_queue(dev
);
1810 myri10ge_free_rings(dev
);
1813 myri10ge_free_irq(mgp
);
1816 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1820 static int myri10ge_close(struct net_device
*dev
)
1822 struct myri10ge_priv
*mgp
;
1823 struct myri10ge_cmd cmd
;
1824 int status
, old_down_cnt
;
1826 mgp
= netdev_priv(dev
);
1828 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1831 if (mgp
->tx
.req_bytes
== NULL
)
1834 del_timer_sync(&mgp
->watchdog_timer
);
1835 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1836 netif_poll_disable(mgp
->dev
);
1837 netif_carrier_off(dev
);
1838 netif_stop_queue(dev
);
1839 old_down_cnt
= mgp
->down_cnt
;
1841 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1843 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
1846 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
1847 if (old_down_cnt
== mgp
->down_cnt
)
1848 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
1850 netif_tx_disable(dev
);
1851 myri10ge_free_irq(mgp
);
1852 myri10ge_free_rings(dev
);
1854 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1858 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1859 * backwards one at a time and handle ring wraps */
1862 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
1863 struct mcp_kreq_ether_send
*src
, int cnt
)
1865 int idx
, starting_slot
;
1866 starting_slot
= tx
->req
;
1869 idx
= (starting_slot
+ cnt
) & tx
->mask
;
1870 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
1876 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1877 * at most 32 bytes at a time, so as to avoid involving the software
1878 * pio handler in the nic. We re-write the first segment's flags
1879 * to mark them valid only after writing the entire chain.
1883 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
1887 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
1888 struct mcp_kreq_ether_send
*srcp
;
1891 idx
= tx
->req
& tx
->mask
;
1893 last_flags
= src
->flags
;
1896 dst
= dstp
= &tx
->lanai
[idx
];
1899 if ((idx
+ cnt
) < tx
->mask
) {
1900 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
1901 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
1902 mb(); /* force write every 32 bytes */
1907 /* submit all but the first request, and ensure
1908 * that it is submitted below */
1909 myri10ge_submit_req_backwards(tx
, src
, cnt
);
1913 /* submit the first request */
1914 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
1915 mb(); /* barrier before setting valid flag */
1918 /* re-write the last 32-bits with the valid flags */
1919 src
->flags
= last_flags
;
1920 put_be32(*((__be32
*) src
+ 3), (__be32 __iomem
*) dst
+ 3);
1926 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
1927 struct mcp_kreq_ether_send
*src
, int cnt
)
1932 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
1938 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1939 * needs to be so that we don't overrun it */
1940 myri10ge_pio_copy(tx
->wc_fifo
+ MXGEFW_ETH_SEND_OFFSET(cnt
),
1947 * Transmit a packet. We need to split the packet so that a single
1948 * segment does not cross myri10ge->tx.boundary, so this makes segment
1949 * counting tricky. So rather than try to count segments up front, we
1950 * just give up if there are too few segments to hold a reasonably
1951 * fragmented packet currently available. If we run
1952 * out of segments while preparing a packet for DMA, we just linearize
1956 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1958 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
1959 struct mcp_kreq_ether_send
*req
;
1960 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1961 struct skb_frag_struct
*frag
;
1964 __be32 high_swapped
;
1966 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
1967 u16 pseudo_hdr_offset
, cksum_offset
;
1968 int cum_len
, seglen
, boundary
, rdma_count
;
1973 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
1976 max_segments
= MXGEFW_MAX_SEND_DESC
;
1979 if (skb
->len
> (dev
->mtu
+ ETH_HLEN
)) {
1980 mss
= skb_shinfo(skb
)->gso_size
;
1982 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
1984 #endif /*NETIF_F_TSO */
1986 if ((unlikely(avail
< max_segments
))) {
1987 /* we are out of transmit resources */
1989 netif_stop_queue(dev
);
1993 /* Setup checksum offloading, if needed */
1995 pseudo_hdr_offset
= 0;
1997 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
1998 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
1999 cksum_offset
= (skb
->h
.raw
- skb
->data
);
2000 pseudo_hdr_offset
= cksum_offset
+ skb
->csum_offset
;
2001 /* If the headers are excessively large, then we must
2002 * fall back to a software checksum */
2003 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
2004 if (skb_checksum_help(skb
))
2007 pseudo_hdr_offset
= 0;
2009 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
2010 flags
|= MXGEFW_FLAGS_CKSUM
;
2017 if (mss
) { /* TSO */
2018 /* this removes any CKSUM flag from before */
2019 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
2021 /* negative cum_len signifies to the
2022 * send loop that we are still in the
2023 * header portion of the TSO packet.
2024 * TSO header must be at most 134 bytes long */
2025 cum_len
= -((skb
->h
.raw
- skb
->data
) + (skb
->h
.th
->doff
<< 2));
2027 /* for TSO, pseudo_hdr_offset holds mss.
2028 * The firmware figures out where to put
2029 * the checksum by parsing the header. */
2030 pseudo_hdr_offset
= mss
;
2032 #endif /*NETIF_F_TSO */
2033 /* Mark small packets, and pad out tiny packets */
2034 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
2035 flags
|= MXGEFW_FLAGS_SMALL
;
2037 /* pad frames to at least ETH_ZLEN bytes */
2038 if (unlikely(skb
->len
< ETH_ZLEN
)) {
2039 if (skb_padto(skb
, ETH_ZLEN
)) {
2040 /* The packet is gone, so we must
2042 mgp
->stats
.tx_dropped
+= 1;
2045 /* adjust the len to account for the zero pad
2046 * so that the nic can know how long it is */
2047 skb
->len
= ETH_ZLEN
;
2051 /* map the skb for DMA */
2052 len
= skb
->len
- skb
->data_len
;
2053 idx
= tx
->req
& tx
->mask
;
2054 tx
->info
[idx
].skb
= skb
;
2055 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2056 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2057 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2059 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
2064 /* "rdma_count" is the number of RDMAs belonging to the
2065 * current packet BEFORE the current send request. For
2066 * non-TSO packets, this is equal to "count".
2067 * For TSO packets, rdma_count needs to be reset
2068 * to 0 after a segment cut.
2070 * The rdma_count field of the send request is
2071 * the number of RDMAs of the packet starting at
2072 * that request. For TSO send requests with one ore more cuts
2073 * in the middle, this is the number of RDMAs starting
2074 * after the last cut in the request. All previous
2075 * segments before the last cut implicitly have 1 RDMA.
2077 * Since the number of RDMAs is not known beforehand,
2078 * it must be filled-in retroactively - after each
2079 * segmentation cut or at the end of the entire packet.
2083 /* Break the SKB or Fragment up into pieces which
2084 * do not cross mgp->tx.boundary */
2085 low
= MYRI10GE_LOWPART_TO_U32(bus
);
2086 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
2091 if (unlikely(count
== max_segments
))
2092 goto abort_linearize
;
2094 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2095 seglen
= boundary
- low
;
2098 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2099 cum_len_next
= cum_len
+ seglen
;
2101 if (mss
) { /* TSO */
2102 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2104 if (likely(cum_len
>= 0)) { /* payload */
2105 int next_is_first
, chop
;
2107 chop
= (cum_len_next
> mss
);
2108 cum_len_next
= cum_len_next
% mss
;
2109 next_is_first
= (cum_len_next
== 0);
2110 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2111 flags_next
|= next_is_first
*
2113 rdma_count
|= -(chop
| next_is_first
);
2114 rdma_count
+= chop
& !next_is_first
;
2115 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2121 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2122 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2123 MXGEFW_FLAGS_FIRST
|
2124 (small
* MXGEFW_FLAGS_SMALL
);
2127 #endif /* NETIF_F_TSO */
2128 req
->addr_high
= high_swapped
;
2129 req
->addr_low
= htonl(low
);
2130 req
->pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
2131 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2132 req
->rdma_count
= 1;
2133 req
->length
= htons(seglen
);
2134 req
->cksum_offset
= cksum_offset
;
2135 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2139 cum_len
= cum_len_next
;
2144 if (unlikely(cksum_offset
> seglen
))
2145 cksum_offset
-= seglen
;
2149 if (frag_idx
== frag_cnt
)
2152 /* map next fragment for DMA */
2153 idx
= (count
+ tx
->req
) & tx
->mask
;
2154 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2157 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2158 len
, PCI_DMA_TODEVICE
);
2159 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2160 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2163 (req
- rdma_count
)->rdma_count
= rdma_count
;
2168 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2169 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2170 MXGEFW_FLAGS_FIRST
)));
2172 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2173 tx
->info
[idx
].last
= 1;
2174 if (tx
->wc_fifo
== NULL
)
2175 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2177 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2179 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2181 netif_stop_queue(dev
);
2183 dev
->trans_start
= jiffies
;
2187 /* Free any DMA resources we've alloced and clear out the skb
2188 * slot so as to not trip up assertions, and to avoid a
2189 * double-free if linearizing fails */
2191 last_idx
= (idx
+ 1) & tx
->mask
;
2192 idx
= tx
->req
& tx
->mask
;
2193 tx
->info
[idx
].skb
= NULL
;
2195 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2197 if (tx
->info
[idx
].skb
!= NULL
)
2198 pci_unmap_single(mgp
->pdev
,
2199 pci_unmap_addr(&tx
->info
[idx
],
2203 pci_unmap_page(mgp
->pdev
,
2204 pci_unmap_addr(&tx
->info
[idx
],
2207 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2208 tx
->info
[idx
].skb
= NULL
;
2210 idx
= (idx
+ 1) & tx
->mask
;
2211 } while (idx
!= last_idx
);
2212 if (skb_is_gso(skb
)) {
2214 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2219 if (skb_linearize(skb
))
2222 mgp
->tx_linearized
++;
2226 dev_kfree_skb_any(skb
);
2227 mgp
->stats
.tx_dropped
+= 1;
2232 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2234 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2238 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2240 struct myri10ge_cmd cmd
;
2241 struct myri10ge_priv
*mgp
;
2242 struct dev_mc_list
*mc_list
;
2243 __be32 data
[2] = { 0, 0 };
2246 mgp
= netdev_priv(dev
);
2247 /* can be called from atomic contexts,
2248 * pass 1 to force atomicity in myri10ge_send_cmd() */
2249 myri10ge_change_promisc(mgp
, dev
->flags
& IFF_PROMISC
, 1);
2251 /* This firmware is known to not support multicast */
2252 if (!mgp
->fw_multicast_support
)
2255 /* Disable multicast filtering */
2257 err
= myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
2259 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2260 " error status: %d\n", dev
->name
, err
);
2264 if (dev
->flags
& IFF_ALLMULTI
) {
2265 /* request to disable multicast filtering, so quit here */
2269 /* Flush the filters */
2271 err
= myri10ge_send_cmd(mgp
, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS
,
2275 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2276 ", error status: %d\n", dev
->name
, err
);
2280 /* Walk the multicast list, and add each address */
2281 for (mc_list
= dev
->mc_list
; mc_list
!= NULL
; mc_list
= mc_list
->next
) {
2282 memcpy(data
, &mc_list
->dmi_addr
, 6);
2283 cmd
.data0
= ntohl(data
[0]);
2284 cmd
.data1
= ntohl(data
[1]);
2285 err
= myri10ge_send_cmd(mgp
, MXGEFW_JOIN_MULTICAST_GROUP
,
2289 printk(KERN_ERR
"myri10ge: %s: Failed "
2290 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2291 "%d\t", dev
->name
, err
);
2292 printk(KERN_ERR
"MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2293 ((unsigned char *)&mc_list
->dmi_addr
)[0],
2294 ((unsigned char *)&mc_list
->dmi_addr
)[1],
2295 ((unsigned char *)&mc_list
->dmi_addr
)[2],
2296 ((unsigned char *)&mc_list
->dmi_addr
)[3],
2297 ((unsigned char *)&mc_list
->dmi_addr
)[4],
2298 ((unsigned char *)&mc_list
->dmi_addr
)[5]
2303 /* Enable multicast filtering */
2304 err
= myri10ge_send_cmd(mgp
, MXGEFW_DISABLE_ALLMULTI
, &cmd
, 1);
2306 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2307 "error status: %d\n", dev
->name
, err
);
2317 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2319 struct sockaddr
*sa
= addr
;
2320 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2323 if (!is_valid_ether_addr(sa
->sa_data
))
2324 return -EADDRNOTAVAIL
;
2326 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2329 "myri10ge: %s: changing mac address failed with %d\n",
2334 /* change the dev structure */
2335 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2339 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2341 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2344 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2345 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2346 dev
->name
, new_mtu
);
2349 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2350 dev
->name
, dev
->mtu
, new_mtu
);
2352 /* if we change the mtu on an active device, we must
2353 * reset the device so the firmware sees the change */
2354 myri10ge_close(dev
);
2364 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2365 * Only do it if the bridge is a root port since we don't want to disturb
2366 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2369 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2371 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2372 struct device
*dev
= &mgp
->pdev
->dev
;
2379 if (!myri10ge_ecrc_enable
|| !bridge
)
2382 /* check that the bridge is a root port */
2383 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2384 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2385 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2386 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2387 if (myri10ge_ecrc_enable
> 1) {
2388 struct pci_dev
*old_bridge
= bridge
;
2390 /* Walk the hierarchy up to the root port
2391 * where ECRC has to be enabled */
2393 bridge
= bridge
->bus
->self
;
2396 "Failed to find root port"
2397 " to force ECRC\n");
2401 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2402 pci_read_config_word(bridge
,
2403 cap
+ PCI_CAP_FLAGS
, &val
);
2404 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2405 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2408 "Forcing ECRC on non-root port %s"
2409 " (enabling on root port %s)\n",
2410 pci_name(old_bridge
), pci_name(bridge
));
2413 "Not enabling ECRC on non-root port %s\n",
2419 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2423 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2425 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2427 dev_err(dev
, "\t pci=nommconf in use? "
2428 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2431 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2434 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2435 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2436 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2437 mgp
->tx
.boundary
= 4096;
2438 mgp
->fw_name
= myri10ge_fw_aligned
;
2442 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2443 * when the PCI-E Completion packets are aligned on an 8-byte
2444 * boundary. Some PCI-E chip sets always align Completion packets; on
2445 * the ones that do not, the alignment can be enforced by enabling
2446 * ECRC generation (if supported).
2448 * When PCI-E Completion packets are not aligned, it is actually more
2449 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2451 * If the driver can neither enable ECRC nor verify that it has
2452 * already been enabled, then it must use a firmware image which works
2453 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2454 * should also ensure that it never gives the device a Read-DMA which is
2455 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2456 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2457 * firmware image, and set tx.boundary to 4KB.
2460 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2461 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2463 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2465 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2467 mgp
->tx
.boundary
= 2048;
2468 mgp
->fw_name
= myri10ge_fw_unaligned
;
2470 if (myri10ge_force_firmware
== 0) {
2471 int link_width
, exp_cap
;
2474 exp_cap
= pci_find_capability(mgp
->pdev
, PCI_CAP_ID_EXP
);
2475 pci_read_config_word(mgp
->pdev
, exp_cap
+ PCI_EXP_LNKSTA
, &lnk
);
2476 link_width
= (lnk
>> 4) & 0x3f;
2478 myri10ge_enable_ecrc(mgp
);
2480 /* Check to see if Link is less than 8 or if the
2481 * upstream bridge is known to provide aligned
2483 if (link_width
< 8) {
2484 dev_info(&mgp
->pdev
->dev
, "PCIE x%d Link\n",
2486 mgp
->tx
.boundary
= 4096;
2487 mgp
->fw_name
= myri10ge_fw_aligned
;
2488 } else if (bridge
&&
2489 /* ServerWorks HT2000/HT1000 */
2490 ((bridge
->vendor
== PCI_VENDOR_ID_SERVERWORKS
2491 && bridge
->device
==
2492 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE
)
2493 /* All Intel E5000 PCIE ports */
2494 || (bridge
->vendor
== PCI_VENDOR_ID_INTEL
2495 && bridge
->device
>=
2496 PCI_DEVICE_ID_INTEL_E5000_PCIE23
2497 && bridge
->device
<=
2498 PCI_DEVICE_ID_INTEL_E5000_PCIE47
))) {
2499 dev_info(&mgp
->pdev
->dev
,
2500 "Assuming aligned completions (0x%x:0x%x)\n",
2501 bridge
->vendor
, bridge
->device
);
2502 mgp
->tx
.boundary
= 4096;
2503 mgp
->fw_name
= myri10ge_fw_aligned
;
2506 if (myri10ge_force_firmware
== 1) {
2507 dev_info(&mgp
->pdev
->dev
,
2508 "Assuming aligned completions (forced)\n");
2509 mgp
->tx
.boundary
= 4096;
2510 mgp
->fw_name
= myri10ge_fw_aligned
;
2512 dev_info(&mgp
->pdev
->dev
,
2513 "Assuming unaligned completions (forced)\n");
2514 mgp
->tx
.boundary
= 2048;
2515 mgp
->fw_name
= myri10ge_fw_unaligned
;
2518 if (myri10ge_fw_name
!= NULL
) {
2519 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2521 mgp
->fw_name
= myri10ge_fw_name
;
2527 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2529 struct myri10ge_priv
*mgp
;
2530 struct net_device
*netdev
;
2532 mgp
= pci_get_drvdata(pdev
);
2537 netif_device_detach(netdev
);
2538 if (netif_running(netdev
)) {
2539 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2541 myri10ge_close(netdev
);
2544 myri10ge_dummy_rdma(mgp
, 0);
2545 pci_save_state(pdev
);
2546 pci_disable_device(pdev
);
2548 return pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2551 static int myri10ge_resume(struct pci_dev
*pdev
)
2553 struct myri10ge_priv
*mgp
;
2554 struct net_device
*netdev
;
2558 mgp
= pci_get_drvdata(pdev
);
2562 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2563 msleep(5); /* give card time to respond */
2564 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2565 if (vendor
== 0xffff) {
2566 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2571 status
= pci_restore_state(pdev
);
2575 status
= pci_enable_device(pdev
);
2577 dev_err(&pdev
->dev
, "failed to enable device\n");
2581 pci_set_master(pdev
);
2583 myri10ge_reset(mgp
);
2584 myri10ge_dummy_rdma(mgp
, 1);
2586 /* Save configuration space to be restored if the
2587 * nic resets due to a parity error */
2588 pci_save_state(pdev
);
2590 if (netif_running(netdev
)) {
2592 status
= myri10ge_open(netdev
);
2595 goto abort_with_enabled
;
2598 netif_device_attach(netdev
);
2603 pci_disable_device(pdev
);
2608 #endif /* CONFIG_PM */
2610 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2612 struct pci_dev
*pdev
= mgp
->pdev
;
2613 int vs
= mgp
->vendor_specific_offset
;
2616 /*enter read32 mode */
2617 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2619 /*read REBOOT_STATUS (0xfffffff0) */
2620 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2621 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2626 * This watchdog is used to check whether the board has suffered
2627 * from a parity error and needs to be recovered.
2629 static void myri10ge_watchdog(struct work_struct
*work
)
2631 struct myri10ge_priv
*mgp
=
2632 container_of(work
, struct myri10ge_priv
, watchdog_work
);
2637 mgp
->watchdog_resets
++;
2638 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2639 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2640 /* Bus master DMA disabled? Check to see
2641 * if the card rebooted due to a parity error
2642 * For now, just report it */
2643 reboot
= myri10ge_read_reboot(mgp
);
2645 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2646 mgp
->dev
->name
, reboot
);
2648 * A rebooted nic will come back with config space as
2649 * it was after power was applied to PCIe bus.
2650 * Attempt to restore config space which was saved
2651 * when the driver was loaded, or the last time the
2652 * nic was resumed from power saving mode.
2654 pci_restore_state(mgp
->pdev
);
2656 /* save state again for accounting reasons */
2657 pci_save_state(mgp
->pdev
);
2660 /* if we get back -1's from our slot, perhaps somebody
2661 * powered off our card. Don't try to reset it in
2663 if (cmd
== 0xffff) {
2664 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2665 if (vendor
== 0xffff) {
2667 "myri10ge: %s: device disappeared!\n",
2672 /* Perhaps it is a software error. Try to reset */
2674 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2676 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2677 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2678 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2679 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2681 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2682 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2683 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2684 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2687 myri10ge_close(mgp
->dev
);
2688 status
= myri10ge_load_firmware(mgp
);
2690 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2693 myri10ge_open(mgp
->dev
);
2698 * We use our own timer routine rather than relying upon
2699 * netdev->tx_timeout because we have a very large hardware transmit
2700 * queue. Due to the large queue, the netdev->tx_timeout function
2701 * cannot detect a NIC with a parity error in a timely fashion if the
2702 * NIC is lightly loaded.
2704 static void myri10ge_watchdog_timer(unsigned long arg
)
2706 struct myri10ge_priv
*mgp
;
2708 mgp
= (struct myri10ge_priv
*)arg
;
2710 if (mgp
->rx_small
.watchdog_needed
) {
2711 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
2712 mgp
->small_bytes
+ MXGEFW_PAD
, 1);
2713 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
>=
2714 myri10ge_fill_thresh
)
2715 mgp
->rx_small
.watchdog_needed
= 0;
2717 if (mgp
->rx_big
.watchdog_needed
) {
2718 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 1);
2719 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
>=
2720 myri10ge_fill_thresh
)
2721 mgp
->rx_big
.watchdog_needed
= 0;
2724 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2725 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
2726 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
)
2727 /* nic seems like it might be stuck.. */
2728 schedule_work(&mgp
->watchdog_work
);
2731 mod_timer(&mgp
->watchdog_timer
,
2732 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2734 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2735 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
2738 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2740 struct net_device
*netdev
;
2741 struct myri10ge_priv
*mgp
;
2742 struct device
*dev
= &pdev
->dev
;
2745 int status
= -ENXIO
;
2750 netdev
= alloc_etherdev(sizeof(*mgp
));
2751 if (netdev
== NULL
) {
2752 dev_err(dev
, "Could not allocate ethernet device\n");
2756 mgp
= netdev_priv(netdev
);
2757 memset(mgp
, 0, sizeof(*mgp
));
2760 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2761 mgp
->pause
= myri10ge_flow_control
;
2762 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2763 mgp
->msg_enable
= netif_msg_init(myri10ge_debug
, MYRI10GE_MSG_DEFAULT
);
2764 init_waitqueue_head(&mgp
->down_wq
);
2766 if (pci_enable_device(pdev
)) {
2767 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2769 goto abort_with_netdev
;
2771 myri10ge_select_firmware(mgp
);
2773 /* Find the vendor-specific cap so we can check
2774 * the reboot register later on */
2775 mgp
->vendor_specific_offset
2776 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2778 /* Set our max read request to 4KB */
2779 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2781 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2782 goto abort_with_netdev
;
2784 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2786 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2788 goto abort_with_netdev
;
2790 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2791 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2793 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2795 goto abort_with_netdev
;
2798 pci_set_master(pdev
);
2800 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2804 "64-bit pci address mask was refused, trying 32-bit");
2805 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2808 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2809 goto abort_with_netdev
;
2811 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2812 &mgp
->cmd_bus
, GFP_KERNEL
);
2813 if (mgp
->cmd
== NULL
)
2814 goto abort_with_netdev
;
2816 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2817 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2818 if (mgp
->fw_stats
== NULL
)
2819 goto abort_with_cmd
;
2821 mgp
->board_span
= pci_resource_len(pdev
, 0);
2822 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2825 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2826 MTRR_TYPE_WRCOMB
, 1);
2828 /* Hack. need to get rid of these magic numbers */
2830 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2831 if (mgp
->sram_size
> mgp
->board_span
) {
2832 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
2836 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
2837 if (mgp
->sram
== NULL
) {
2838 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
2839 mgp
->board_span
, mgp
->iomem_base
);
2843 memcpy_fromio(mgp
->eeprom_strings
,
2844 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
2845 MYRI10GE_EEPROM_STRINGS_SIZE
);
2846 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
2847 status
= myri10ge_read_mac_addr(mgp
);
2849 goto abort_with_ioremap
;
2851 for (i
= 0; i
< ETH_ALEN
; i
++)
2852 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
2854 /* allocate rx done ring */
2855 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2856 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
2857 &mgp
->rx_done
.bus
, GFP_KERNEL
);
2858 if (mgp
->rx_done
.entry
== NULL
)
2859 goto abort_with_ioremap
;
2860 memset(mgp
->rx_done
.entry
, 0, bytes
);
2862 status
= myri10ge_load_firmware(mgp
);
2864 dev_err(&pdev
->dev
, "failed to load firmware\n");
2865 goto abort_with_rx_done
;
2868 status
= myri10ge_reset(mgp
);
2870 dev_err(&pdev
->dev
, "failed reset\n");
2871 goto abort_with_firmware
;
2874 pci_set_drvdata(pdev
, mgp
);
2875 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
2876 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
2877 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
2878 myri10ge_initial_mtu
= 68;
2879 netdev
->mtu
= myri10ge_initial_mtu
;
2880 netdev
->open
= myri10ge_open
;
2881 netdev
->stop
= myri10ge_close
;
2882 netdev
->hard_start_xmit
= myri10ge_xmit
;
2883 netdev
->get_stats
= myri10ge_get_stats
;
2884 netdev
->base_addr
= mgp
->iomem_base
;
2885 netdev
->change_mtu
= myri10ge_change_mtu
;
2886 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
2887 netdev
->set_mac_address
= myri10ge_set_mac_address
;
2888 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
2890 netdev
->features
|= NETIF_F_HIGHDMA
;
2891 netdev
->poll
= myri10ge_poll
;
2892 netdev
->weight
= myri10ge_napi_weight
;
2894 /* make sure we can get an irq, and that MSI can be
2895 * setup (if available). Also ensure netdev->irq
2896 * is set to correct value if MSI is enabled */
2897 status
= myri10ge_request_irq(mgp
);
2899 goto abort_with_firmware
;
2900 netdev
->irq
= pdev
->irq
;
2901 myri10ge_free_irq(mgp
);
2903 /* Save configuration space to be restored if the
2904 * nic resets due to a parity error */
2905 pci_save_state(pdev
);
2907 /* Setup the watchdog timer */
2908 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
2909 (unsigned long)mgp
);
2911 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
2912 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
);
2913 status
= register_netdev(netdev
);
2915 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
2916 goto abort_with_state
;
2918 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2919 (mgp
->msi_enabled
? "MSI" : "xPIC"),
2920 netdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
2921 (mgp
->mtrr
>= 0 ? "Enabled" : "Disabled"));
2926 pci_restore_state(pdev
);
2928 abort_with_firmware
:
2929 myri10ge_dummy_rdma(mgp
, 0);
2932 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2933 dma_free_coherent(&pdev
->dev
, bytes
,
2934 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2942 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2944 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2945 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2948 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2949 mgp
->cmd
, mgp
->cmd_bus
);
2953 free_netdev(netdev
);
2960 * Does what is necessary to shutdown one Myrinet device. Called
2961 * once for each Myrinet card by the kernel when a module is
2964 static void myri10ge_remove(struct pci_dev
*pdev
)
2966 struct myri10ge_priv
*mgp
;
2967 struct net_device
*netdev
;
2970 mgp
= pci_get_drvdata(pdev
);
2974 flush_scheduled_work();
2976 unregister_netdev(netdev
);
2978 myri10ge_dummy_rdma(mgp
, 0);
2980 /* avoid a memory leak */
2981 pci_restore_state(pdev
);
2983 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2984 dma_free_coherent(&pdev
->dev
, bytes
,
2985 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2991 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2993 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2994 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2996 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2997 mgp
->cmd
, mgp
->cmd_bus
);
2999 free_netdev(netdev
);
3000 pci_set_drvdata(pdev
, NULL
);
3003 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3005 static struct pci_device_id myri10ge_pci_tbl
[] = {
3006 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
3010 static struct pci_driver myri10ge_driver
= {
3012 .probe
= myri10ge_probe
,
3013 .remove
= myri10ge_remove
,
3014 .id_table
= myri10ge_pci_tbl
,
3016 .suspend
= myri10ge_suspend
,
3017 .resume
= myri10ge_resume
,
3021 static __init
int myri10ge_init_module(void)
3023 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
3024 MYRI10GE_VERSION_STR
);
3025 return pci_register_driver(&myri10ge_driver
);
3028 module_init(myri10ge_init_module
);
3030 static __exit
void myri10ge_cleanup_module(void)
3032 pci_unregister_driver(&myri10ge_driver
);
3035 module_exit(myri10ge_cleanup_module
);