drivers/net/netxen/netxen_nic_hw.h

   1 /*
   2  * Copyright (C) 2003 - 2009 NetXen, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18  * MA  02111-1307, USA.
  19  *
  20  * The full GNU General Public License is included in this distribution
  21  * in the file called LICENSE.
  22  *
  23  * Contact Information:
  24  *    info@netxen.com
  25  * NetXen Inc,
  26  * 18922 Forge Drive
  27  * Cupertino, CA 95014-0701
  28  *
  29  */
  30
  31 #ifndef __NETXEN_NIC_HW_H_
  32 #define __NETXEN_NIC_HW_H_
  33
  34 #include "netxen_nic_hdr.h"
  35
  36 /* Hardware memory size of 128 meg */
  37 #define NETXEN_MEMADDR_MAX (128 * 1024 * 1024)
  38
  39 #ifndef readq
  40 static inline u64 readq(void __iomem * addr)
  41 {
  42         return readl(addr) | (((u64) readl(addr + 4)) << 32LL);
  43 }
  44 #endif
  45
  46 #ifndef writeq
  47 static inline void writeq(u64 val, void __iomem * addr)
  48 {
  49         writel(((u32) (val)), (addr));
  50         writel(((u32) (val >> 32)), (addr + 4));
  51 }
  52 #endif
  53
  54 struct netxen_adapter;
  55
  56 #define NETXEN_PCI_MAPSIZE_BYTES  (NETXEN_PCI_MAPSIZE << 20)
  57
  58 struct netxen_port;
  59 void netxen_nic_set_link_parameters(struct netxen_adapter *adapter);
  60
  61 typedef u8 netxen_ethernet_macaddr_t[6];
  62
  63 /* Nibble or Byte mode for phy interface (GbE mode only) */
  64 typedef enum {
  65         NETXEN_NIU_10_100_MB = 0,
  66         NETXEN_NIU_1000_MB
  67 } netxen_niu_gbe_ifmode_t;
  68
  69 #define _netxen_crb_get_bit(var, bit)  ((var >> bit) & 0x1)
  70
  71 /*
  72  * NIU GB MAC Config Register 0 (applies to GB0, GB1, GB2, GB3)
  73  *
  74  *      Bit 0 : enable_tx => 1:enable frame xmit, 0:disable
  75  *      Bit 1 : tx_synced => R/O: xmit enable synched to xmit stream
  76  *      Bit 2 : enable_rx => 1:enable frame recv, 0:disable
  77  *      Bit 3 : rx_synced => R/O: recv enable synched to recv stream
  78  *      Bit 4 : tx_flowctl => 1:enable pause frame generation, 0:disable
  79  *      Bit 5 : rx_flowctl => 1:act on recv'd pause frames, 0:ignore
  80  *      Bit 8 : loopback => 1:loop MAC xmits to MAC recvs, 0:normal
  81  *      Bit 16: tx_reset_pb => 1:reset frame xmit protocol blk, 0:no-op
  82  *      Bit 17: rx_reset_pb => 1:reset frame recv protocol blk, 0:no-op
  83  *      Bit 18: tx_reset_mac => 1:reset data/ctl multiplexer blk, 0:no-op
  84  *      Bit 19: rx_reset_mac => 1:reset ctl frames & timers blk, 0:no-op
  85  *      Bit 31: soft_reset => 1:reset the MAC and the SERDES, 0:no-op
  86  */
  87
  88 #define netxen_gb_enable_tx(config_word)        \
  89         ((config_word) |= 1 << 0)
  90 #define netxen_gb_enable_rx(config_word)        \
  91         ((config_word) |= 1 << 2)
  92 #define netxen_gb_tx_flowctl(config_word)       \
  93         ((config_word) |= 1 << 4)
  94 #define netxen_gb_rx_flowctl(config_word)       \
  95         ((config_word) |= 1 << 5)
  96 #define netxen_gb_tx_reset_pb(config_word)      \
  97         ((config_word) |= 1 << 16)
  98 #define netxen_gb_rx_reset_pb(config_word)      \
  99         ((config_word) |= 1 << 17)
 100 #define netxen_gb_tx_reset_mac(config_word)     \
 101         ((config_word) |= 1 << 18)
 102 #define netxen_gb_rx_reset_mac(config_word)     \
 103         ((config_word) |= 1 << 19)
 104 #define netxen_gb_soft_reset(config_word)       \
 105         ((config_word) |= 1 << 31)
 106
 107 #define netxen_gb_unset_tx_flowctl(config_word) \
 108         ((config_word) &= ~(1 << 4))
 109 #define netxen_gb_unset_rx_flowctl(config_word) \
 110         ((config_word) &= ~(1 << 5))
 111
 112 #define netxen_gb_get_tx_synced(config_word)    \
 113                 _netxen_crb_get_bit((config_word), 1)
 114 #define netxen_gb_get_rx_synced(config_word)    \
 115                 _netxen_crb_get_bit((config_word), 3)
 116 #define netxen_gb_get_tx_flowctl(config_word)   \
 117                 _netxen_crb_get_bit((config_word), 4)
 118 #define netxen_gb_get_rx_flowctl(config_word)   \
 119                 _netxen_crb_get_bit((config_word), 5)
 120 #define netxen_gb_get_soft_reset(config_word)   \
 121                 _netxen_crb_get_bit((config_word), 31)
 122
 123 #define netxen_gb_get_stationaddress_low(config_word) ((config_word) >> 16)
 124
 125 #define netxen_gb_set_mii_mgmt_clockselect(config_word, val)    \
 126                 ((config_word) |= ((val) & 0x07))
 127 #define netxen_gb_mii_mgmt_reset(config_word)   \
 128                 ((config_word) |= 1 << 31)
 129 #define netxen_gb_mii_mgmt_unset(config_word)   \
 130                 ((config_word) &= ~(1 << 31))
 131
 132 /*
 133  * NIU GB MII Mgmt Command Register (applies to GB0, GB1, GB2, GB3)
 134  * Bit 0 : read_cycle => 1:perform single read cycle, 0:no-op
 135  * Bit 1 : scan_cycle => 1:perform continuous read cycles, 0:no-op
 136  */
 137
 138 #define netxen_gb_mii_mgmt_set_read_cycle(config_word)  \
 139                 ((config_word) |= 1 << 0)
 140 #define netxen_gb_mii_mgmt_reg_addr(config_word, val)   \
 141                 ((config_word) |= ((val) & 0x1F))
 142 #define netxen_gb_mii_mgmt_phy_addr(config_word, val)   \
 143                 ((config_word) |= (((val) & 0x1F) << 8))
 144
 145 /*
 146  * NIU GB MII Mgmt Indicators Register (applies to GB0, GB1, GB2, GB3)
 147  * Read-only register.
 148  * Bit 0 : busy => 1:performing an MII mgmt cycle, 0:idle
 149  * Bit 1 : scanning => 1:scan operation in progress, 0:idle
 150  * Bit 2 : notvalid => :mgmt result data not yet valid, 0:idle
 151  */
 152 #define netxen_get_gb_mii_mgmt_busy(config_word)        \
 153                 _netxen_crb_get_bit(config_word, 0)
 154 #define netxen_get_gb_mii_mgmt_scanning(config_word)    \
 155                 _netxen_crb_get_bit(config_word, 1)
 156 #define netxen_get_gb_mii_mgmt_notvalid(config_word)    \
 157                 _netxen_crb_get_bit(config_word, 2)
 158 /*
 159  * NIU XG Pause Ctl Register
 160  *
 161  *      Bit 0       : xg0_mask => 1:disable tx pause frames
 162  *      Bit 1       : xg0_request => 1:request single pause frame
 163  *      Bit 2       : xg0_on_off => 1:request is pause on, 0:off
 164  *      Bit 3       : xg1_mask => 1:disable tx pause frames
 165  *      Bit 4       : xg1_request => 1:request single pause frame
 166  *      Bit 5       : xg1_on_off => 1:request is pause on, 0:off
 167  */
 168
 169 #define netxen_xg_set_xg0_mask(config_word)    \
 170         ((config_word) |= 1 << 0)
 171 #define netxen_xg_set_xg1_mask(config_word)    \
 172         ((config_word) |= 1 << 3)
 173
 174 #define netxen_xg_get_xg0_mask(config_word)    \
 175         _netxen_crb_get_bit((config_word), 0)
 176 #define netxen_xg_get_xg1_mask(config_word)    \
 177         _netxen_crb_get_bit((config_word), 3)
 178
 179 #define netxen_xg_unset_xg0_mask(config_word)  \
 180         ((config_word) &= ~(1 << 0))
 181 #define netxen_xg_unset_xg1_mask(config_word)  \
 182         ((config_word) &= ~(1 << 3))
 183
 184 /*
 185  * NIU XG Pause Ctl Register
 186  *
 187  *      Bit 0       : xg0_mask => 1:disable tx pause frames
 188  *      Bit 1       : xg0_request => 1:request single pause frame
 189  *      Bit 2       : xg0_on_off => 1:request is pause on, 0:off
 190  *      Bit 3       : xg1_mask => 1:disable tx pause frames
 191  *      Bit 4       : xg1_request => 1:request single pause frame
 192  *      Bit 5       : xg1_on_off => 1:request is pause on, 0:off
 193  */
 194 #define netxen_gb_set_gb0_mask(config_word)    \
 195         ((config_word) |= 1 << 0)
 196 #define netxen_gb_set_gb1_mask(config_word)    \
 197         ((config_word) |= 1 << 2)
 198 #define netxen_gb_set_gb2_mask(config_word)    \
 199         ((config_word) |= 1 << 4)
 200 #define netxen_gb_set_gb3_mask(config_word)    \
 201         ((config_word) |= 1 << 6)
 202
 203 #define netxen_gb_get_gb0_mask(config_word)    \
 204         _netxen_crb_get_bit((config_word), 0)
 205 #define netxen_gb_get_gb1_mask(config_word)    \
 206         _netxen_crb_get_bit((config_word), 2)
 207 #define netxen_gb_get_gb2_mask(config_word)    \
 208         _netxen_crb_get_bit((config_word), 4)
 209 #define netxen_gb_get_gb3_mask(config_word)    \
 210         _netxen_crb_get_bit((config_word), 6)
 211
 212 #define netxen_gb_unset_gb0_mask(config_word)  \
 213         ((config_word) &= ~(1 << 0))
 214 #define netxen_gb_unset_gb1_mask(config_word)  \
 215         ((config_word) &= ~(1 << 2))
 216 #define netxen_gb_unset_gb2_mask(config_word)  \
 217         ((config_word) &= ~(1 << 4))
 218 #define netxen_gb_unset_gb3_mask(config_word)  \
 219         ((config_word) &= ~(1 << 6))
 220
 221
 222 /*
 223  * PHY-Specific MII control/status registers.
 224  */
 225 typedef enum {
 226         NETXEN_NIU_GB_MII_MGMT_ADDR_CONTROL = 0,
 227         NETXEN_NIU_GB_MII_MGMT_ADDR_STATUS = 1,
 228         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_0 = 2,
 229         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_1 = 3,
 230         NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG = 4,
 231         NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART = 5,
 232         NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG_MORE = 6,
 233         NETXEN_NIU_GB_MII_MGMT_ADDR_NEXTPAGE_XMIT = 7,
 234         NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART_NEXTPAGE = 8,
 235         NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_CONTROL = 9,
 236         NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_STATUS = 10,
 237         NETXEN_NIU_GB_MII_MGMT_ADDR_EXTENDED_STATUS = 15,
 238         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL = 16,
 239         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS = 17,
 240         NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE = 18,
 241         NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS = 19,
 242         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE = 20,
 243         NETXEN_NIU_GB_MII_MGMT_ADDR_RECV_ERROR_COUNT = 21,
 244         NETXEN_NIU_GB_MII_MGMT_ADDR_LED_CONTROL = 24,
 245         NETXEN_NIU_GB_MII_MGMT_ADDR_LED_OVERRIDE = 25,
 246         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE_YET = 26,
 247         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS_MORE = 27
 248 } netxen_niu_phy_register_t;
 249
 250 /*
 251  * PHY-Specific Status Register (reg 17).
 252  *
 253  * Bit 0      : jabber => 1:jabber detected, 0:not
 254  * Bit 1      : polarity => 1:polarity reversed, 0:normal
 255  * Bit 2      : recvpause => 1:receive pause enabled, 0:disabled
 256  * Bit 3      : xmitpause => 1:transmit pause enabled, 0:disabled
 257  * Bit 4      : energydetect => 1:sleep, 0:active
 258  * Bit 5      : downshift => 1:downshift, 0:no downshift
 259  * Bit 6      : crossover => 1:MDIX (crossover), 0:MDI (no crossover)
 260  * Bits 7-9   : cablelen => not valid in 10Mb/s mode
 261  *                      0:<50m, 1:50-80m, 2:80-110m, 3:110-140m, 4:>140m
 262  * Bit 10     : link => 1:link up, 0:link down
 263  * Bit 11     : resolved => 1:speed and duplex resolved, 0:not yet
 264  * Bit 12     : pagercvd => 1:page received, 0:page not received
 265  * Bit 13     : duplex => 1:full duplex, 0:half duplex
 266  * Bits 14-15 : speed => 0:10Mb/s, 1:100Mb/s, 2:1000Mb/s, 3:rsvd
 267  */
 268
 269 #define netxen_get_phy_cablelen(config_word) (((config_word) >> 7) & 0x07)
 270 #define netxen_get_phy_speed(config_word) (((config_word) >> 14) & 0x03)
 271
 272 #define netxen_set_phy_speed(config_word, val)  \
 273                 ((config_word) |= ((val & 0x03) << 14))
 274 #define netxen_set_phy_duplex(config_word)      \
 275                 ((config_word) |= 1 << 13)
 276 #define netxen_clear_phy_duplex(config_word)    \
 277                 ((config_word) &= ~(1 << 13))
 278
 279 #define netxen_get_phy_jabber(config_word)      \
 280                 _netxen_crb_get_bit(config_word, 0)
 281 #define netxen_get_phy_polarity(config_word)    \
 282                 _netxen_crb_get_bit(config_word, 1)
 283 #define netxen_get_phy_recvpause(config_word)   \
 284                 _netxen_crb_get_bit(config_word, 2)
 285 #define netxen_get_phy_xmitpause(config_word)   \
 286                 _netxen_crb_get_bit(config_word, 3)
 287 #define netxen_get_phy_energydetect(config_word) \
 288                 _netxen_crb_get_bit(config_word, 4)
 289 #define netxen_get_phy_downshift(config_word)   \
 290                 _netxen_crb_get_bit(config_word, 5)
 291 #define netxen_get_phy_crossover(config_word)   \
 292                 _netxen_crb_get_bit(config_word, 6)
 293 #define netxen_get_phy_link(config_word)        \
 294                 _netxen_crb_get_bit(config_word, 10)
 295 #define netxen_get_phy_resolved(config_word)    \
 296                 _netxen_crb_get_bit(config_word, 11)
 297 #define netxen_get_phy_pagercvd(config_word)    \
 298                 _netxen_crb_get_bit(config_word, 12)
 299 #define netxen_get_phy_duplex(config_word)      \
 300                 _netxen_crb_get_bit(config_word, 13)
 301
 302 /*
 303  * Interrupt Register definition
 304  * This definition applies to registers 18 and 19 (int enable and int status).
 305  * Bit 0 : jabber
 306  * Bit 1 : polarity_changed
 307  * Bit 4 : energy_detect
 308  * Bit 5 : downshift
 309  * Bit 6 : mdi_xover_changed
 310  * Bit 7 : fifo_over_underflow
 311  * Bit 8 : false_carrier
 312  * Bit 9 : symbol_error
 313  * Bit 10: link_status_changed
 314  * Bit 11: autoneg_completed
 315  * Bit 12: page_received
 316  * Bit 13: duplex_changed
 317  * Bit 14: speed_changed
 318  * Bit 15: autoneg_error
 319  */
 320
 321 #define netxen_get_phy_int_jabber(config_word)  \
 322                 _netxen_crb_get_bit(config_word, 0)
 323 #define netxen_get_phy_int_polarity_changed(config_word)        \
 324                 _netxen_crb_get_bit(config_word, 1)
 325 #define netxen_get_phy_int_energy_detect(config_word)   \
 326                 _netxen_crb_get_bit(config_word, 4)
 327 #define netxen_get_phy_int_downshift(config_word)       \
 328                 _netxen_crb_get_bit(config_word, 5)
 329 #define netxen_get_phy_int_mdi_xover_changed(config_word)       \
 330                 _netxen_crb_get_bit(config_word, 6)
 331 #define netxen_get_phy_int_fifo_over_underflow(config_word)     \
 332                 _netxen_crb_get_bit(config_word, 7)
 333 #define netxen_get_phy_int_false_carrier(config_word)   \
 334                 _netxen_crb_get_bit(config_word, 8)
 335 #define netxen_get_phy_int_symbol_error(config_word)    \
 336                 _netxen_crb_get_bit(config_word, 9)
 337 #define netxen_get_phy_int_link_status_changed(config_word)     \
 338                 _netxen_crb_get_bit(config_word, 10)
 339 #define netxen_get_phy_int_autoneg_completed(config_word)       \
 340                 _netxen_crb_get_bit(config_word, 11)
 341 #define netxen_get_phy_int_page_received(config_word)   \
 342                 _netxen_crb_get_bit(config_word, 12)
 343 #define netxen_get_phy_int_duplex_changed(config_word)  \
 344                 _netxen_crb_get_bit(config_word, 13)
 345 #define netxen_get_phy_int_speed_changed(config_word)   \
 346                 _netxen_crb_get_bit(config_word, 14)
 347 #define netxen_get_phy_int_autoneg_error(config_word)   \
 348                 _netxen_crb_get_bit(config_word, 15)
 349
 350 #define netxen_set_phy_int_link_status_changed(config_word)     \
 351                 ((config_word) |= 1 << 10)
 352 #define netxen_set_phy_int_autoneg_completed(config_word)       \
 353                 ((config_word) |= 1 << 11)
 354 #define netxen_set_phy_int_speed_changed(config_word)   \
 355                 ((config_word) |= 1 << 14)
 356
 357 /*
 358  * NIU Mode Register.
 359  * Bit 0 : enable FibreChannel
 360  * Bit 1 : enable 10/100/1000 Ethernet
 361  * Bit 2 : enable 10Gb Ethernet
 362  */
 363
 364 #define netxen_get_niu_enable_ge(config_word)   \
 365                 _netxen_crb_get_bit(config_word, 1)
 366
 367 #define NETXEN_NIU_NON_PROMISC_MODE     0
 368 #define NETXEN_NIU_PROMISC_MODE         1
 369 #define NETXEN_NIU_ALLMULTI_MODE        2
 370
 371 /*
 372  * NIU GB Drop CRC Register
 373  *
 374  * Bit 0 : drop_gb0 => 1:drop pkts with bad CRCs, 0:pass them on
 375  * Bit 1 : drop_gb1 => 1:drop pkts with bad CRCs, 0:pass them on
 376  * Bit 2 : drop_gb2 => 1:drop pkts with bad CRCs, 0:pass them on
 377  * Bit 3 : drop_gb3 => 1:drop pkts with bad CRCs, 0:pass them on
 378  */
 379
 380 #define netxen_set_gb_drop_gb0(config_word)     \
 381                 ((config_word) |= 1 << 0)
 382 #define netxen_set_gb_drop_gb1(config_word)     \
 383                 ((config_word) |= 1 << 1)
 384 #define netxen_set_gb_drop_gb2(config_word)     \
 385                 ((config_word) |= 1 << 2)
 386 #define netxen_set_gb_drop_gb3(config_word)     \
 387                 ((config_word) |= 1 << 3)
 388
 389 #define netxen_clear_gb_drop_gb0(config_word)   \
 390                 ((config_word) &= ~(1 << 0))
 391 #define netxen_clear_gb_drop_gb1(config_word)   \
 392                 ((config_word) &= ~(1 << 1))
 393 #define netxen_clear_gb_drop_gb2(config_word)   \
 394                 ((config_word) &= ~(1 << 2))
 395 #define netxen_clear_gb_drop_gb3(config_word)   \
 396                 ((config_word) &= ~(1 << 3))
 397
 398 /*
 399  * NIU XG MAC Config Register
 400  *
 401  * Bit 0 : tx_enable => 1:enable frame xmit, 0:disable
 402  * Bit 2 : rx_enable => 1:enable frame recv, 0:disable
 403  * Bit 4 : soft_reset => 1:reset the MAC , 0:no-op
 404  * Bit 27: xaui_framer_reset
 405  * Bit 28: xaui_rx_reset
 406  * Bit 29: xaui_tx_reset
 407  * Bit 30: xg_ingress_afifo_reset
 408  * Bit 31: xg_egress_afifo_reset
 409  */
 410
 411 #define netxen_xg_soft_reset(config_word)       \
 412                 ((config_word) |= 1 << 4)
 413
 414 /* Set promiscuous mode for a GbE interface */
 415 int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
 416                                     u32 mode);
 417 int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
 418                                        u32 mode);
 419
 420 /* set the MAC address for a given MAC */
 421 int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
 422                            netxen_ethernet_macaddr_t addr);
 423
 424 /* XG version */
 425 int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
 426                               netxen_ethernet_macaddr_t addr);
 427
 428 /* Generic enable for GbE ports. Will detect the speed of the link. */
 429 int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port);
 430
 431 int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port);
 432
 433 /* Disable a GbE interface */
 434 int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter);
 435
 436 int netxen_niu_disable_xg_port(struct netxen_adapter *adapter);
 437
 438 typedef struct {
 439         unsigned valid;
 440         unsigned start_128M;
 441         unsigned end_128M;
 442         unsigned start_2M;
 443 } crb_128M_2M_sub_block_map_t;
 444
 445 typedef struct {
 446         crb_128M_2M_sub_block_map_t sub_block[16];
 447 } crb_128M_2M_block_map_t;
 448
 449 #endif                          /* __NETXEN_NIC_HW_H_ */