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Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelv...
[deliverable/linux.git] / drivers / net / netxen / netxen_nic_init.c
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
28 *
29 */
30
31 #include <linux/netdevice.h>
32 #include <linux/delay.h>
33 #include "netxen_nic.h"
34 #include "netxen_nic_hw.h"
35 #include "netxen_nic_phan_reg.h"
36
37 struct crb_addr_pair {
38 u32 addr;
39 u32 data;
40 };
41
42 #define NETXEN_MAX_CRB_XFORM 60
43 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
44 #define NETXEN_ADDR_ERROR (0xffffffff)
45
46 #define crb_addr_transform(name) \
47 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
48 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
49
50 #define NETXEN_NIC_XDMA_RESET 0x8000ff
51
52 static void
53 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
54 struct nx_host_rds_ring *rds_ring);
55
56 static void crb_addr_transform_setup(void)
57 {
58 crb_addr_transform(XDMA);
59 crb_addr_transform(TIMR);
60 crb_addr_transform(SRE);
61 crb_addr_transform(SQN3);
62 crb_addr_transform(SQN2);
63 crb_addr_transform(SQN1);
64 crb_addr_transform(SQN0);
65 crb_addr_transform(SQS3);
66 crb_addr_transform(SQS2);
67 crb_addr_transform(SQS1);
68 crb_addr_transform(SQS0);
69 crb_addr_transform(RPMX7);
70 crb_addr_transform(RPMX6);
71 crb_addr_transform(RPMX5);
72 crb_addr_transform(RPMX4);
73 crb_addr_transform(RPMX3);
74 crb_addr_transform(RPMX2);
75 crb_addr_transform(RPMX1);
76 crb_addr_transform(RPMX0);
77 crb_addr_transform(ROMUSB);
78 crb_addr_transform(SN);
79 crb_addr_transform(QMN);
80 crb_addr_transform(QMS);
81 crb_addr_transform(PGNI);
82 crb_addr_transform(PGND);
83 crb_addr_transform(PGN3);
84 crb_addr_transform(PGN2);
85 crb_addr_transform(PGN1);
86 crb_addr_transform(PGN0);
87 crb_addr_transform(PGSI);
88 crb_addr_transform(PGSD);
89 crb_addr_transform(PGS3);
90 crb_addr_transform(PGS2);
91 crb_addr_transform(PGS1);
92 crb_addr_transform(PGS0);
93 crb_addr_transform(PS);
94 crb_addr_transform(PH);
95 crb_addr_transform(NIU);
96 crb_addr_transform(I2Q);
97 crb_addr_transform(EG);
98 crb_addr_transform(MN);
99 crb_addr_transform(MS);
100 crb_addr_transform(CAS2);
101 crb_addr_transform(CAS1);
102 crb_addr_transform(CAS0);
103 crb_addr_transform(CAM);
104 crb_addr_transform(C2C1);
105 crb_addr_transform(C2C0);
106 crb_addr_transform(SMB);
107 crb_addr_transform(OCM0);
108 crb_addr_transform(I2C0);
109 }
110
111 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
112 {
113 struct netxen_recv_context *recv_ctx;
114 struct nx_host_rds_ring *rds_ring;
115 struct netxen_rx_buffer *rx_buf;
116 int i, ring;
117
118 recv_ctx = &adapter->recv_ctx;
119 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
120 rds_ring = &recv_ctx->rds_rings[ring];
121 for (i = 0; i < rds_ring->num_desc; ++i) {
122 rx_buf = &(rds_ring->rx_buf_arr[i]);
123 if (rx_buf->state == NETXEN_BUFFER_FREE)
124 continue;
125 pci_unmap_single(adapter->pdev,
126 rx_buf->dma,
127 rds_ring->dma_size,
128 PCI_DMA_FROMDEVICE);
129 if (rx_buf->skb != NULL)
130 dev_kfree_skb_any(rx_buf->skb);
131 }
132 }
133 }
134
135 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
136 {
137 struct netxen_cmd_buffer *cmd_buf;
138 struct netxen_skb_frag *buffrag;
139 int i, j;
140 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
141
142 cmd_buf = tx_ring->cmd_buf_arr;
143 for (i = 0; i < tx_ring->num_desc; i++) {
144 buffrag = cmd_buf->frag_array;
145 if (buffrag->dma) {
146 pci_unmap_single(adapter->pdev, buffrag->dma,
147 buffrag->length, PCI_DMA_TODEVICE);
148 buffrag->dma = 0ULL;
149 }
150 for (j = 0; j < cmd_buf->frag_count; j++) {
151 buffrag++;
152 if (buffrag->dma) {
153 pci_unmap_page(adapter->pdev, buffrag->dma,
154 buffrag->length,
155 PCI_DMA_TODEVICE);
156 buffrag->dma = 0ULL;
157 }
158 }
159 if (cmd_buf->skb) {
160 dev_kfree_skb_any(cmd_buf->skb);
161 cmd_buf->skb = NULL;
162 }
163 cmd_buf++;
164 }
165 }
166
167 void netxen_free_sw_resources(struct netxen_adapter *adapter)
168 {
169 struct netxen_recv_context *recv_ctx;
170 struct nx_host_rds_ring *rds_ring;
171 struct nx_host_tx_ring *tx_ring;
172 int ring;
173
174 recv_ctx = &adapter->recv_ctx;
175
176 if (recv_ctx->rds_rings == NULL)
177 goto skip_rds;
178
179 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
180 rds_ring = &recv_ctx->rds_rings[ring];
181 vfree(rds_ring->rx_buf_arr);
182 rds_ring->rx_buf_arr = NULL;
183 }
184 kfree(recv_ctx->rds_rings);
185
186 skip_rds:
187 if (adapter->tx_ring == NULL)
188 return;
189
190 tx_ring = adapter->tx_ring;
191 vfree(tx_ring->cmd_buf_arr);
192 }
193
194 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
195 {
196 struct netxen_recv_context *recv_ctx;
197 struct nx_host_rds_ring *rds_ring;
198 struct nx_host_sds_ring *sds_ring;
199 struct nx_host_tx_ring *tx_ring;
200 struct netxen_rx_buffer *rx_buf;
201 int ring, i, size;
202
203 struct netxen_cmd_buffer *cmd_buf_arr;
204 struct net_device *netdev = adapter->netdev;
205 struct pci_dev *pdev = adapter->pdev;
206
207 size = sizeof(struct nx_host_tx_ring);
208 tx_ring = kzalloc(size, GFP_KERNEL);
209 if (tx_ring == NULL) {
210 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
211 netdev->name);
212 return -ENOMEM;
213 }
214 adapter->tx_ring = tx_ring;
215
216 tx_ring->num_desc = adapter->num_txd;
217
218 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
219 if (cmd_buf_arr == NULL) {
220 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
221 netdev->name);
222 return -ENOMEM;
223 }
224 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
225 tx_ring->cmd_buf_arr = cmd_buf_arr;
226
227 recv_ctx = &adapter->recv_ctx;
228
229 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
230 rds_ring = kzalloc(size, GFP_KERNEL);
231 if (rds_ring == NULL) {
232 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
233 netdev->name);
234 return -ENOMEM;
235 }
236 recv_ctx->rds_rings = rds_ring;
237
238 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
239 rds_ring = &recv_ctx->rds_rings[ring];
240 switch (ring) {
241 case RCV_RING_NORMAL:
242 rds_ring->num_desc = adapter->num_rxd;
243 if (adapter->ahw.cut_through) {
244 rds_ring->dma_size =
245 NX_CT_DEFAULT_RX_BUF_LEN;
246 rds_ring->skb_size =
247 NX_CT_DEFAULT_RX_BUF_LEN;
248 } else {
249 rds_ring->dma_size = RX_DMA_MAP_LEN;
250 rds_ring->skb_size =
251 MAX_RX_BUFFER_LENGTH;
252 }
253 break;
254
255 case RCV_RING_JUMBO:
256 rds_ring->num_desc = adapter->num_jumbo_rxd;
257 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
258 rds_ring->dma_size =
259 NX_P3_RX_JUMBO_BUF_MAX_LEN;
260 else
261 rds_ring->dma_size =
262 NX_P2_RX_JUMBO_BUF_MAX_LEN;
263 rds_ring->skb_size =
264 rds_ring->dma_size + NET_IP_ALIGN;
265 break;
266
267 case RCV_RING_LRO:
268 rds_ring->num_desc = adapter->num_lro_rxd;
269 rds_ring->dma_size = RX_LRO_DMA_MAP_LEN;
270 rds_ring->skb_size = MAX_RX_LRO_BUFFER_LENGTH;
271 break;
272
273 }
274 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
275 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
276 if (rds_ring->rx_buf_arr == NULL) {
277 printk(KERN_ERR "%s: Failed to allocate "
278 "rx buffer ring %d\n",
279 netdev->name, ring);
280 /* free whatever was already allocated */
281 goto err_out;
282 }
283 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
284 INIT_LIST_HEAD(&rds_ring->free_list);
285 /*
286 * Now go through all of them, set reference handles
287 * and put them in the queues.
288 */
289 rx_buf = rds_ring->rx_buf_arr;
290 for (i = 0; i < rds_ring->num_desc; i++) {
291 list_add_tail(&rx_buf->list,
292 &rds_ring->free_list);
293 rx_buf->ref_handle = i;
294 rx_buf->state = NETXEN_BUFFER_FREE;
295 rx_buf++;
296 }
297 spin_lock_init(&rds_ring->lock);
298 }
299
300 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
301 sds_ring = &recv_ctx->sds_rings[ring];
302 sds_ring->irq = adapter->msix_entries[ring].vector;
303 sds_ring->adapter = adapter;
304 sds_ring->num_desc = adapter->num_rxd;
305
306 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
307 INIT_LIST_HEAD(&sds_ring->free_list[i]);
308 }
309
310 return 0;
311
312 err_out:
313 netxen_free_sw_resources(adapter);
314 return -ENOMEM;
315 }
316
317 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
318 {
319 adapter->macaddr_set = netxen_p2_nic_set_mac_addr;
320 adapter->set_multi = netxen_p2_nic_set_multi;
321
322 switch (adapter->ahw.port_type) {
323 case NETXEN_NIC_GBE:
324 adapter->enable_phy_interrupts =
325 netxen_niu_gbe_enable_phy_interrupts;
326 adapter->disable_phy_interrupts =
327 netxen_niu_gbe_disable_phy_interrupts;
328 adapter->set_mtu = netxen_nic_set_mtu_gb;
329 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
330 adapter->phy_read = netxen_niu_gbe_phy_read;
331 adapter->phy_write = netxen_niu_gbe_phy_write;
332 adapter->init_port = netxen_niu_gbe_init_port;
333 adapter->stop_port = netxen_niu_disable_gbe_port;
334 break;
335
336 case NETXEN_NIC_XGBE:
337 adapter->enable_phy_interrupts =
338 netxen_niu_xgbe_enable_phy_interrupts;
339 adapter->disable_phy_interrupts =
340 netxen_niu_xgbe_disable_phy_interrupts;
341 adapter->set_mtu = netxen_nic_set_mtu_xgb;
342 adapter->init_port = netxen_niu_xg_init_port;
343 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
344 adapter->stop_port = netxen_niu_disable_xg_port;
345 break;
346
347 default:
348 break;
349 }
350
351 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
352 adapter->set_mtu = nx_fw_cmd_set_mtu;
353 adapter->set_promisc = netxen_p3_nic_set_promisc;
354 adapter->macaddr_set = netxen_p3_nic_set_mac_addr;
355 adapter->set_multi = netxen_p3_nic_set_multi;
356 }
357 }
358
359 /*
360 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
361 * address to external PCI CRB address.
362 */
363 static u32 netxen_decode_crb_addr(u32 addr)
364 {
365 int i;
366 u32 base_addr, offset, pci_base;
367
368 crb_addr_transform_setup();
369
370 pci_base = NETXEN_ADDR_ERROR;
371 base_addr = addr & 0xfff00000;
372 offset = addr & 0x000fffff;
373
374 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
375 if (crb_addr_xform[i] == base_addr) {
376 pci_base = i << 20;
377 break;
378 }
379 }
380 if (pci_base == NETXEN_ADDR_ERROR)
381 return pci_base;
382 else
383 return (pci_base + offset);
384 }
385
386 static long rom_max_timeout = 100;
387 static long rom_lock_timeout = 10000;
388
389 static int rom_lock(struct netxen_adapter *adapter)
390 {
391 int iter;
392 u32 done = 0;
393 int timeout = 0;
394
395 while (!done) {
396 /* acquire semaphore2 from PCI HW block */
397 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK));
398 if (done == 1)
399 break;
400 if (timeout >= rom_lock_timeout)
401 return -EIO;
402
403 timeout++;
404 /*
405 * Yield CPU
406 */
407 if (!in_atomic())
408 schedule();
409 else {
410 for (iter = 0; iter < 20; iter++)
411 cpu_relax(); /*This a nop instr on i386 */
412 }
413 }
414 NXWR32(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
415 return 0;
416 }
417
418 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
419 {
420 long timeout = 0;
421 long done = 0;
422
423 cond_resched();
424
425 while (done == 0) {
426 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
427 done &= 2;
428 timeout++;
429 if (timeout >= rom_max_timeout) {
430 printk("Timeout reached waiting for rom done");
431 return -EIO;
432 }
433 }
434 return 0;
435 }
436
437 static void netxen_rom_unlock(struct netxen_adapter *adapter)
438 {
439 /* release semaphore2 */
440 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK));
441
442 }
443
444 static int do_rom_fast_read(struct netxen_adapter *adapter,
445 int addr, int *valp)
446 {
447 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
448 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
449 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
450 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
451 if (netxen_wait_rom_done(adapter)) {
452 printk("Error waiting for rom done\n");
453 return -EIO;
454 }
455 /* reset abyte_cnt and dummy_byte_cnt */
456 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
457 udelay(10);
458 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
459
460 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
461 return 0;
462 }
463
464 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
465 u8 *bytes, size_t size)
466 {
467 int addridx;
468 int ret = 0;
469
470 for (addridx = addr; addridx < (addr + size); addridx += 4) {
471 int v;
472 ret = do_rom_fast_read(adapter, addridx, &v);
473 if (ret != 0)
474 break;
475 *(__le32 *)bytes = cpu_to_le32(v);
476 bytes += 4;
477 }
478
479 return ret;
480 }
481
482 int
483 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
484 u8 *bytes, size_t size)
485 {
486 int ret;
487
488 ret = rom_lock(adapter);
489 if (ret < 0)
490 return ret;
491
492 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
493
494 netxen_rom_unlock(adapter);
495 return ret;
496 }
497
498 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
499 {
500 int ret;
501
502 if (rom_lock(adapter) != 0)
503 return -EIO;
504
505 ret = do_rom_fast_read(adapter, addr, valp);
506 netxen_rom_unlock(adapter);
507 return ret;
508 }
509
510 #define NETXEN_BOARDTYPE 0x4008
511 #define NETXEN_BOARDNUM 0x400c
512 #define NETXEN_CHIPNUM 0x4010
513
514 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
515 {
516 int addr, val;
517 int i, n, init_delay = 0;
518 struct crb_addr_pair *buf;
519 unsigned offset;
520 u32 off;
521
522 /* resetall */
523 rom_lock(adapter);
524 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
525 netxen_rom_unlock(adapter);
526
527 if (verbose) {
528 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
529 printk("P2 ROM board type: 0x%08x\n", val);
530 else
531 printk("Could not read board type\n");
532 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
533 printk("P2 ROM board num: 0x%08x\n", val);
534 else
535 printk("Could not read board number\n");
536 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
537 printk("P2 ROM chip num: 0x%08x\n", val);
538 else
539 printk("Could not read chip number\n");
540 }
541
542 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
543 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
544 (n != 0xcafecafe) ||
545 netxen_rom_fast_read(adapter, 4, &n) != 0) {
546 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
547 "n: %08x\n", netxen_nic_driver_name, n);
548 return -EIO;
549 }
550 offset = n & 0xffffU;
551 n = (n >> 16) & 0xffffU;
552 } else {
553 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
554 !(n & 0x80000000)) {
555 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
556 "n: %08x\n", netxen_nic_driver_name, n);
557 return -EIO;
558 }
559 offset = 1;
560 n &= ~0x80000000;
561 }
562
563 if (n < 1024) {
564 if (verbose)
565 printk(KERN_DEBUG "%s: %d CRB init values found"
566 " in ROM.\n", netxen_nic_driver_name, n);
567 } else {
568 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
569 " initialized.\n", __func__, n);
570 return -EIO;
571 }
572
573 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
574 if (buf == NULL) {
575 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
576 netxen_nic_driver_name);
577 return -ENOMEM;
578 }
579 for (i = 0; i < n; i++) {
580 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
581 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
582 kfree(buf);
583 return -EIO;
584 }
585
586 buf[i].addr = addr;
587 buf[i].data = val;
588
589 if (verbose)
590 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
591 netxen_nic_driver_name,
592 (u32)netxen_decode_crb_addr(addr), val);
593 }
594 for (i = 0; i < n; i++) {
595
596 off = netxen_decode_crb_addr(buf[i].addr);
597 if (off == NETXEN_ADDR_ERROR) {
598 printk(KERN_ERR"CRB init value out of range %x\n",
599 buf[i].addr);
600 continue;
601 }
602 off += NETXEN_PCI_CRBSPACE;
603 /* skipping cold reboot MAGIC */
604 if (off == NETXEN_CAM_RAM(0x1fc))
605 continue;
606
607 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
608 /* do not reset PCI */
609 if (off == (ROMUSB_GLB + 0xbc))
610 continue;
611 if (off == (ROMUSB_GLB + 0xa8))
612 continue;
613 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
614 continue;
615 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
616 continue;
617 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
618 continue;
619 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
620 buf[i].data = 0x1020;
621 /* skip the function enable register */
622 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
623 continue;
624 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
625 continue;
626 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
627 continue;
628 }
629
630 if (off == NETXEN_ADDR_ERROR) {
631 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
632 netxen_nic_driver_name, buf[i].addr);
633 continue;
634 }
635
636 init_delay = 1;
637 /* After writing this register, HW needs time for CRB */
638 /* to quiet down (else crb_window returns 0xffffffff) */
639 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
640 init_delay = 1000;
641 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
642 /* hold xdma in reset also */
643 buf[i].data = NETXEN_NIC_XDMA_RESET;
644 buf[i].data = 0x8000ff;
645 }
646 }
647
648 NXWR32(adapter, off, buf[i].data);
649
650 msleep(init_delay);
651 }
652 kfree(buf);
653
654 /* disable_peg_cache_all */
655
656 /* unreset_net_cache */
657 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
658 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
659 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
660 }
661
662 /* p2dn replyCount */
663 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
664 /* disable_peg_cache 0 */
665 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
666 /* disable_peg_cache 1 */
667 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
668
669 /* peg_clr_all */
670
671 /* peg_clr 0 */
672 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
673 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
674 /* peg_clr 1 */
675 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
676 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
677 /* peg_clr 2 */
678 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
679 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
680 /* peg_clr 3 */
681 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
682 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
683 return 0;
684 }
685
686 int
687 netxen_load_firmware(struct netxen_adapter *adapter)
688 {
689 u64 *ptr64;
690 u32 i, flashaddr, size;
691 const struct firmware *fw = adapter->fw;
692
693 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
694 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
695
696 if (fw) {
697 __le64 data;
698
699 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
700
701 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
702 flashaddr = NETXEN_BOOTLD_START;
703
704 for (i = 0; i < size; i++) {
705 data = cpu_to_le64(ptr64[i]);
706 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
707 flashaddr += 8;
708 }
709
710 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
711 size = (__force u32)cpu_to_le32(size) / 8;
712
713 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
714 flashaddr = NETXEN_IMAGE_START;
715
716 for (i = 0; i < size; i++) {
717 data = cpu_to_le64(ptr64[i]);
718
719 if (adapter->pci_mem_write(adapter,
720 flashaddr, &data, 8))
721 return -EIO;
722
723 flashaddr += 8;
724 }
725 } else {
726 u32 data;
727
728 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 4;
729 flashaddr = NETXEN_BOOTLD_START;
730
731 for (i = 0; i < size; i++) {
732 if (netxen_rom_fast_read(adapter,
733 flashaddr, (int *)&data) != 0)
734 return -EIO;
735
736 if (adapter->pci_mem_write(adapter,
737 flashaddr, &data, 4))
738 return -EIO;
739
740 flashaddr += 4;
741 }
742 }
743 msleep(1);
744
745 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
746 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
747 else {
748 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
749 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
750 }
751
752 return 0;
753 }
754
755 static int
756 netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
757 {
758 __le32 val;
759 u32 major, minor, build, ver, min_ver, bios;
760 struct pci_dev *pdev = adapter->pdev;
761 const struct firmware *fw = adapter->fw;
762
763 if (fw->size < NX_FW_MIN_SIZE)
764 return -EINVAL;
765
766 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
767 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
768 return -EINVAL;
769
770 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
771 major = (__force u32)val & 0xff;
772 minor = ((__force u32)val >> 8) & 0xff;
773 build = (__force u32)val >> 16;
774
775 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
776 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
777 else
778 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
779
780 ver = NETXEN_VERSION_CODE(major, minor, build);
781
782 if ((major > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
783 dev_err(&pdev->dev,
784 "%s: firmware version %d.%d.%d unsupported\n",
785 fwname, major, minor, build);
786 return -EINVAL;
787 }
788
789 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
790 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
791 if ((__force u32)val != bios) {
792 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
793 fwname);
794 return -EINVAL;
795 }
796
797 /* check if flashed firmware is newer */
798 if (netxen_rom_fast_read(adapter,
799 NX_FW_VERSION_OFFSET, (int *)&val))
800 return -EIO;
801 major = (__force u32)val & 0xff;
802 minor = ((__force u32)val >> 8) & 0xff;
803 build = (__force u32)val >> 16;
804 if (NETXEN_VERSION_CODE(major, minor, build) > ver)
805 return -EINVAL;
806
807 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
808 return 0;
809 }
810
811 static char *fw_name[] = { "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin" };
812
813 void netxen_request_firmware(struct netxen_adapter *adapter)
814 {
815 u32 capability, flashed_ver;
816 int fw_type;
817 struct pci_dev *pdev = adapter->pdev;
818 int rc = 0;
819
820 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
821 fw_type = NX_P2_MN_ROMIMAGE;
822 goto request_fw;
823 } else {
824 fw_type = NX_P3_CT_ROMIMAGE;
825 goto request_fw;
826 }
827
828 request_mn:
829 capability = 0;
830
831 netxen_rom_fast_read(adapter,
832 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
833 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
834 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
835 if (capability & NX_PEG_TUNE_MN_PRESENT) {
836 fw_type = NX_P3_MN_ROMIMAGE;
837 goto request_fw;
838 }
839 }
840
841 request_fw:
842 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
843 if (rc != 0) {
844 if (fw_type == NX_P3_CT_ROMIMAGE) {
845 msleep(1);
846 goto request_mn;
847 }
848
849 adapter->fw = NULL;
850 goto done;
851 }
852
853 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
854 if (rc != 0) {
855 release_firmware(adapter->fw);
856
857 if (fw_type == NX_P3_CT_ROMIMAGE) {
858 msleep(1);
859 goto request_mn;
860 }
861
862 adapter->fw = NULL;
863 goto done;
864 }
865
866 done:
867 if (adapter->fw)
868 dev_info(&pdev->dev, "loading firmware from file %s\n",
869 fw_name[fw_type]);
870 else
871 dev_info(&pdev->dev, "loading firmware from flash\n");
872 }
873
874
875 void
876 netxen_release_firmware(struct netxen_adapter *adapter)
877 {
878 if (adapter->fw)
879 release_firmware(adapter->fw);
880 }
881
882 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
883 {
884 uint64_t addr;
885 uint32_t hi;
886 uint32_t lo;
887
888 adapter->dummy_dma.addr =
889 pci_alloc_consistent(adapter->pdev,
890 NETXEN_HOST_DUMMY_DMA_SIZE,
891 &adapter->dummy_dma.phys_addr);
892 if (adapter->dummy_dma.addr == NULL) {
893 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
894 __func__);
895 return -ENOMEM;
896 }
897
898 addr = (uint64_t) adapter->dummy_dma.phys_addr;
899 hi = (addr >> 32) & 0xffffffff;
900 lo = addr & 0xffffffff;
901
902 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
903 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
904
905 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
906 uint32_t temp = 0;
907 NXWR32(adapter, CRB_HOST_DUMMY_BUF, temp);
908 }
909
910 return 0;
911 }
912
913 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
914 {
915 int i = 100;
916
917 if (!adapter->dummy_dma.addr)
918 return;
919
920 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
921 do {
922 if (dma_watchdog_shutdown_request(adapter) == 1)
923 break;
924 msleep(50);
925 if (dma_watchdog_shutdown_poll_result(adapter) == 1)
926 break;
927 } while (--i);
928 }
929
930 if (i) {
931 pci_free_consistent(adapter->pdev,
932 NETXEN_HOST_DUMMY_DMA_SIZE,
933 adapter->dummy_dma.addr,
934 adapter->dummy_dma.phys_addr);
935 adapter->dummy_dma.addr = NULL;
936 } else {
937 printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
938 adapter->netdev->name);
939 }
940 }
941
942 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
943 {
944 u32 val = 0;
945 int retries = 60;
946
947 if (!pegtune_val) {
948 do {
949 val = NXRD32(adapter, CRB_CMDPEG_STATE);
950
951 if (val == PHAN_INITIALIZE_COMPLETE ||
952 val == PHAN_INITIALIZE_ACK)
953 return 0;
954
955 msleep(500);
956
957 } while (--retries);
958
959 if (!retries) {
960 pegtune_val = NXRD32(adapter,
961 NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
962 printk(KERN_WARNING "netxen_phantom_init: init failed, "
963 "pegtune_val=%x\n", pegtune_val);
964 return -1;
965 }
966 }
967
968 return 0;
969 }
970
971 static int
972 netxen_receive_peg_ready(struct netxen_adapter *adapter)
973 {
974 u32 val = 0;
975 int retries = 2000;
976
977 do {
978 val = NXRD32(adapter, CRB_RCVPEG_STATE);
979
980 if (val == PHAN_PEG_RCV_INITIALIZED)
981 return 0;
982
983 msleep(10);
984
985 } while (--retries);
986
987 if (!retries) {
988 printk(KERN_ERR "Receive Peg initialization not "
989 "complete, state: 0x%x.\n", val);
990 return -EIO;
991 }
992
993 return 0;
994 }
995
996 int netxen_init_firmware(struct netxen_adapter *adapter)
997 {
998 int err;
999
1000 err = netxen_receive_peg_ready(adapter);
1001 if (err)
1002 return err;
1003
1004 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1005 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1006 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1007 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1008
1009 if (adapter->fw_version >= NETXEN_VERSION_CODE(4, 0, 222)) {
1010 adapter->capabilities = NXRD32(adapter, CRB_FW_CAPABILITIES_1);
1011 }
1012
1013 return err;
1014 }
1015
1016 static void
1017 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1018 {
1019 u32 cable_OUI;
1020 u16 cable_len;
1021 u16 link_speed;
1022 u8 link_status, module, duplex, autoneg;
1023 struct net_device *netdev = adapter->netdev;
1024
1025 adapter->has_link_events = 1;
1026
1027 cable_OUI = msg->body[1] & 0xffffffff;
1028 cable_len = (msg->body[1] >> 32) & 0xffff;
1029 link_speed = (msg->body[1] >> 48) & 0xffff;
1030
1031 link_status = msg->body[2] & 0xff;
1032 duplex = (msg->body[2] >> 16) & 0xff;
1033 autoneg = (msg->body[2] >> 24) & 0xff;
1034
1035 module = (msg->body[2] >> 8) & 0xff;
1036 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1037 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1038 netdev->name, cable_OUI, cable_len);
1039 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1040 printk(KERN_INFO "%s: unsupported cable length %d\n",
1041 netdev->name, cable_len);
1042 }
1043
1044 netxen_advert_link_change(adapter, link_status);
1045
1046 /* update link parameters */
1047 if (duplex == LINKEVENT_FULL_DUPLEX)
1048 adapter->link_duplex = DUPLEX_FULL;
1049 else
1050 adapter->link_duplex = DUPLEX_HALF;
1051 adapter->module_type = module;
1052 adapter->link_autoneg = autoneg;
1053 adapter->link_speed = link_speed;
1054 }
1055
1056 static void
1057 netxen_handle_fw_message(int desc_cnt, int index,
1058 struct nx_host_sds_ring *sds_ring)
1059 {
1060 nx_fw_msg_t msg;
1061 struct status_desc *desc;
1062 int i = 0, opcode;
1063
1064 while (desc_cnt > 0 && i < 8) {
1065 desc = &sds_ring->desc_head[index];
1066 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1067 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1068
1069 index = get_next_index(index, sds_ring->num_desc);
1070 desc_cnt--;
1071 }
1072
1073 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1074 switch (opcode) {
1075 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1076 netxen_handle_linkevent(sds_ring->adapter, &msg);
1077 break;
1078 default:
1079 break;
1080 }
1081 }
1082
1083 static int
1084 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1085 struct nx_host_rds_ring *rds_ring,
1086 struct netxen_rx_buffer *buffer)
1087 {
1088 struct sk_buff *skb;
1089 dma_addr_t dma;
1090 struct pci_dev *pdev = adapter->pdev;
1091
1092 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1093 if (!buffer->skb)
1094 return 1;
1095
1096 skb = buffer->skb;
1097
1098 if (!adapter->ahw.cut_through)
1099 skb_reserve(skb, 2);
1100
1101 dma = pci_map_single(pdev, skb->data,
1102 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1103
1104 if (pci_dma_mapping_error(pdev, dma)) {
1105 dev_kfree_skb_any(skb);
1106 buffer->skb = NULL;
1107 return 1;
1108 }
1109
1110 buffer->skb = skb;
1111 buffer->dma = dma;
1112 buffer->state = NETXEN_BUFFER_BUSY;
1113
1114 return 0;
1115 }
1116
1117 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1118 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1119 {
1120 struct netxen_rx_buffer *buffer;
1121 struct sk_buff *skb;
1122
1123 buffer = &rds_ring->rx_buf_arr[index];
1124
1125 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1126 PCI_DMA_FROMDEVICE);
1127
1128 skb = buffer->skb;
1129 if (!skb)
1130 goto no_skb;
1131
1132 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1133 adapter->stats.csummed++;
1134 skb->ip_summed = CHECKSUM_UNNECESSARY;
1135 } else
1136 skb->ip_summed = CHECKSUM_NONE;
1137
1138 skb->dev = adapter->netdev;
1139
1140 buffer->skb = NULL;
1141 no_skb:
1142 buffer->state = NETXEN_BUFFER_FREE;
1143 return skb;
1144 }
1145
1146 static struct netxen_rx_buffer *
1147 netxen_process_rcv(struct netxen_adapter *adapter,
1148 int ring, int index, int length, int cksum, int pkt_offset,
1149 struct nx_host_sds_ring *sds_ring)
1150 {
1151 struct net_device *netdev = adapter->netdev;
1152 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1153 struct netxen_rx_buffer *buffer;
1154 struct sk_buff *skb;
1155 struct nx_host_rds_ring *rds_ring = &recv_ctx->rds_rings[ring];
1156
1157 if (unlikely(index > rds_ring->num_desc))
1158 return NULL;
1159
1160 buffer = &rds_ring->rx_buf_arr[index];
1161
1162 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1163 if (!skb)
1164 return buffer;
1165
1166 if (length > rds_ring->skb_size)
1167 skb_put(skb, rds_ring->skb_size);
1168 else
1169 skb_put(skb, length);
1170
1171
1172 if (pkt_offset)
1173 skb_pull(skb, pkt_offset);
1174
1175 skb->protocol = eth_type_trans(skb, netdev);
1176
1177 napi_gro_receive(&sds_ring->napi, skb);
1178
1179 adapter->stats.no_rcv++;
1180 adapter->stats.rxbytes += length;
1181
1182 return buffer;
1183 }
1184
1185 #define netxen_merge_rx_buffers(list, head) \
1186 do { list_splice_tail_init(list, head); } while (0);
1187
1188 int
1189 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1190 {
1191 struct netxen_adapter *adapter = sds_ring->adapter;
1192
1193 struct list_head *cur;
1194
1195 struct status_desc *desc;
1196 struct netxen_rx_buffer *rxbuf;
1197
1198 u32 consumer = sds_ring->consumer;
1199
1200 int count = 0;
1201 u64 sts_data;
1202 int opcode, ring, index, length, cksum, pkt_offset, desc_cnt;
1203
1204 while (count < max) {
1205 desc = &sds_ring->desc_head[consumer];
1206 sts_data = le64_to_cpu(desc->status_desc_data[0]);
1207
1208 if (!(sts_data & STATUS_OWNER_HOST))
1209 break;
1210
1211 desc_cnt = netxen_get_sts_desc_cnt(sts_data);
1212 ring = netxen_get_sts_type(sts_data);
1213
1214 if (ring > RCV_RING_JUMBO)
1215 goto skip;
1216
1217 opcode = netxen_get_sts_opcode(sts_data);
1218
1219 switch (opcode) {
1220 case NETXEN_NIC_RXPKT_DESC:
1221 case NETXEN_OLD_RXPKT_DESC:
1222 break;
1223 case NETXEN_NIC_RESPONSE_DESC:
1224 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1225 default:
1226 goto skip;
1227 }
1228
1229 WARN_ON(desc_cnt > 1);
1230
1231 index = netxen_get_sts_refhandle(sts_data);
1232 length = netxen_get_sts_totallength(sts_data);
1233 cksum = netxen_get_sts_status(sts_data);
1234 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
1235
1236 rxbuf = netxen_process_rcv(adapter, ring, index,
1237 length, cksum, pkt_offset, sds_ring);
1238
1239 if (rxbuf)
1240 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1241
1242 skip:
1243 for (; desc_cnt > 0; desc_cnt--) {
1244 desc = &sds_ring->desc_head[consumer];
1245 desc->status_desc_data[0] =
1246 cpu_to_le64(STATUS_OWNER_PHANTOM);
1247 consumer = get_next_index(consumer, sds_ring->num_desc);
1248 }
1249 count++;
1250 }
1251
1252 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1253 struct nx_host_rds_ring *rds_ring =
1254 &adapter->recv_ctx.rds_rings[ring];
1255
1256 if (!list_empty(&sds_ring->free_list[ring])) {
1257 list_for_each(cur, &sds_ring->free_list[ring]) {
1258 rxbuf = list_entry(cur,
1259 struct netxen_rx_buffer, list);
1260 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1261 }
1262 spin_lock(&rds_ring->lock);
1263 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1264 &rds_ring->free_list);
1265 spin_unlock(&rds_ring->lock);
1266 }
1267
1268 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1269 }
1270
1271 if (count) {
1272 sds_ring->consumer = consumer;
1273 NXWR32(adapter, sds_ring->crb_sts_consumer, consumer);
1274 }
1275
1276 return count;
1277 }
1278
1279 /* Process Command status ring */
1280 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1281 {
1282 u32 sw_consumer, hw_consumer;
1283 int count = 0, i;
1284 struct netxen_cmd_buffer *buffer;
1285 struct pci_dev *pdev = adapter->pdev;
1286 struct net_device *netdev = adapter->netdev;
1287 struct netxen_skb_frag *frag;
1288 int done = 0;
1289 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1290
1291 if (!spin_trylock(&adapter->tx_clean_lock))
1292 return 1;
1293
1294 sw_consumer = tx_ring->sw_consumer;
1295 barrier(); /* hw_consumer can change underneath */
1296 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1297
1298 while (sw_consumer != hw_consumer) {
1299 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1300 if (buffer->skb) {
1301 frag = &buffer->frag_array[0];
1302 pci_unmap_single(pdev, frag->dma, frag->length,
1303 PCI_DMA_TODEVICE);
1304 frag->dma = 0ULL;
1305 for (i = 1; i < buffer->frag_count; i++) {
1306 frag++; /* Get the next frag */
1307 pci_unmap_page(pdev, frag->dma, frag->length,
1308 PCI_DMA_TODEVICE);
1309 frag->dma = 0ULL;
1310 }
1311
1312 adapter->stats.xmitfinished++;
1313 dev_kfree_skb_any(buffer->skb);
1314 buffer->skb = NULL;
1315 }
1316
1317 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1318 if (++count >= MAX_STATUS_HANDLE)
1319 break;
1320 }
1321
1322 tx_ring->sw_consumer = sw_consumer;
1323
1324 if (count && netif_running(netdev)) {
1325 smp_mb();
1326 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1327 netif_tx_lock(netdev);
1328 netif_wake_queue(netdev);
1329 smp_mb();
1330 netif_tx_unlock(netdev);
1331 }
1332 }
1333 /*
1334 * If everything is freed up to consumer then check if the ring is full
1335 * If the ring is full then check if more needs to be freed and
1336 * schedule the call back again.
1337 *
1338 * This happens when there are 2 CPUs. One could be freeing and the
1339 * other filling it. If the ring is full when we get out of here and
1340 * the card has already interrupted the host then the host can miss the
1341 * interrupt.
1342 *
1343 * There is still a possible race condition and the host could miss an
1344 * interrupt. The card has to take care of this.
1345 */
1346 barrier(); /* hw_consumer can change underneath */
1347 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1348 done = (sw_consumer == hw_consumer);
1349 spin_unlock(&adapter->tx_clean_lock);
1350
1351 return (done);
1352 }
1353
1354 void
1355 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1356 struct nx_host_rds_ring *rds_ring)
1357 {
1358 struct rcv_desc *pdesc;
1359 struct netxen_rx_buffer *buffer;
1360 int producer, count = 0;
1361 netxen_ctx_msg msg = 0;
1362 struct list_head *head;
1363
1364 producer = rds_ring->producer;
1365
1366 spin_lock(&rds_ring->lock);
1367 head = &rds_ring->free_list;
1368 while (!list_empty(head)) {
1369
1370 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1371
1372 if (!buffer->skb) {
1373 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1374 break;
1375 }
1376
1377 count++;
1378 list_del(&buffer->list);
1379
1380 /* make a rcv descriptor */
1381 pdesc = &rds_ring->desc_head[producer];
1382 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1383 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1384 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1385
1386 producer = get_next_index(producer, rds_ring->num_desc);
1387 }
1388 spin_unlock(&rds_ring->lock);
1389
1390 if (count) {
1391 rds_ring->producer = producer;
1392 NXWR32(adapter, rds_ring->crb_rcv_producer,
1393 (producer-1) & (rds_ring->num_desc-1));
1394
1395 if (adapter->fw_major < 4) {
1396 /*
1397 * Write a doorbell msg to tell phanmon of change in
1398 * receive ring producer
1399 * Only for firmware version < 4.0.0
1400 */
1401 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1402 netxen_set_msg_privid(msg);
1403 netxen_set_msg_count(msg,
1404 ((producer - 1) &
1405 (rds_ring->num_desc - 1)));
1406 netxen_set_msg_ctxid(msg, adapter->portnum);
1407 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1408 writel(msg,
1409 DB_NORMALIZE(adapter,
1410 NETXEN_RCV_PRODUCER_OFFSET));
1411 }
1412 }
1413 }
1414
1415 static void
1416 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1417 struct nx_host_rds_ring *rds_ring)
1418 {
1419 struct rcv_desc *pdesc;
1420 struct netxen_rx_buffer *buffer;
1421 int producer, count = 0;
1422 struct list_head *head;
1423
1424 producer = rds_ring->producer;
1425 if (!spin_trylock(&rds_ring->lock))
1426 return;
1427
1428 head = &rds_ring->free_list;
1429 while (!list_empty(head)) {
1430
1431 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1432
1433 if (!buffer->skb) {
1434 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1435 break;
1436 }
1437
1438 count++;
1439 list_del(&buffer->list);
1440
1441 /* make a rcv descriptor */
1442 pdesc = &rds_ring->desc_head[producer];
1443 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1444 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1445 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1446
1447 producer = get_next_index(producer, rds_ring->num_desc);
1448 }
1449
1450 if (count) {
1451 rds_ring->producer = producer;
1452 NXWR32(adapter, rds_ring->crb_rcv_producer,
1453 (producer - 1) & (rds_ring->num_desc - 1));
1454 }
1455 spin_unlock(&rds_ring->lock);
1456 }
1457
1458 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1459 {
1460 memset(&adapter->stats, 0, sizeof(adapter->stats));
1461 return;
1462 }
1463
Linux kernel - Deliverables
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