2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
38 #include "pasemi_mac.h"
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
48 * - Other performance improvements
52 /* Must be a power of two */
53 #define RX_RING_SIZE 512
54 #define TX_RING_SIZE 512
56 #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
57 #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
58 #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
59 #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
60 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
62 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
64 /* XXXOJN these should come out of the device tree some day */
65 #define PAS_DMA_CAP_BASE 0xe00d0040
66 #define PAS_DMA_CAP_SIZE 0x100
67 #define PAS_DMA_COM_BASE 0xe00d0100
68 #define PAS_DMA_COM_SIZE 0x100
70 static struct pasdma_status
*dma_status
;
72 static int pasemi_get_mac_addr(struct pasemi_mac
*mac
)
74 struct pci_dev
*pdev
= mac
->pdev
;
75 struct device_node
*dn
= pci_device_to_OF_node(pdev
);
81 "No device node for mac, not configuring\n");
85 maddr
= get_property(dn
, "mac-address", NULL
);
88 "no mac address in device tree, not configuring\n");
92 if (sscanf(maddr
, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr
[0],
93 &addr
[1], &addr
[2], &addr
[3], &addr
[4], &addr
[5]) != 6) {
95 "can't parse mac address, not configuring\n");
99 memcpy(mac
->mac_addr
, addr
, sizeof(addr
));
103 static int pasemi_mac_setup_rx_resources(struct net_device
*dev
)
105 struct pasemi_mac_rxring
*ring
;
106 struct pasemi_mac
*mac
= netdev_priv(dev
);
107 int chan_id
= mac
->dma_rxch
;
109 ring
= kzalloc(sizeof(*ring
), GFP_KERNEL
);
114 spin_lock_init(&ring
->lock
);
116 ring
->desc_info
= kzalloc(sizeof(struct pasemi_mac_buffer
) *
117 RX_RING_SIZE
, GFP_KERNEL
);
119 if (!ring
->desc_info
)
122 /* Allocate descriptors */
123 ring
->desc
= dma_alloc_coherent(&mac
->dma_pdev
->dev
,
125 sizeof(struct pas_dma_xct_descr
),
126 &ring
->dma
, GFP_KERNEL
);
131 memset(ring
->desc
, 0, RX_RING_SIZE
* sizeof(struct pas_dma_xct_descr
));
133 ring
->buffers
= dma_alloc_coherent(&mac
->dma_pdev
->dev
,
134 RX_RING_SIZE
* sizeof(u64
),
135 &ring
->buf_dma
, GFP_KERNEL
);
139 memset(ring
->buffers
, 0, RX_RING_SIZE
* sizeof(u64
));
141 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_RXCHAN_BASEL(chan_id
),
142 PAS_DMA_RXCHAN_BASEL_BRBL(ring
->dma
));
144 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_RXCHAN_BASEU(chan_id
),
145 PAS_DMA_RXCHAN_BASEU_BRBH(ring
->dma
>> 32) |
146 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE
>> 2));
148 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_RXCHAN_CFG(chan_id
),
149 PAS_DMA_RXCHAN_CFG_HBU(1));
151 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_RXINT_BASEL(mac
->dma_if
),
152 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring
->buffers
)));
154 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_RXINT_BASEU(mac
->dma_if
),
155 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring
->buffers
) >> 32) |
156 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE
>> 3));
158 ring
->next_to_fill
= 0;
159 ring
->next_to_clean
= 0;
161 snprintf(ring
->irq_name
, sizeof(ring
->irq_name
),
168 dma_free_coherent(&mac
->dma_pdev
->dev
,
169 RX_RING_SIZE
* sizeof(struct pas_dma_xct_descr
),
170 mac
->rx
->desc
, mac
->rx
->dma
);
172 kfree(ring
->desc_info
);
180 static int pasemi_mac_setup_tx_resources(struct net_device
*dev
)
182 struct pasemi_mac
*mac
= netdev_priv(dev
);
184 int chan_id
= mac
->dma_txch
;
185 struct pasemi_mac_txring
*ring
;
187 ring
= kzalloc(sizeof(*ring
), GFP_KERNEL
);
191 spin_lock_init(&ring
->lock
);
193 ring
->desc_info
= kzalloc(sizeof(struct pasemi_mac_buffer
) *
194 TX_RING_SIZE
, GFP_KERNEL
);
195 if (!ring
->desc_info
)
198 /* Allocate descriptors */
199 ring
->desc
= dma_alloc_coherent(&mac
->dma_pdev
->dev
,
201 sizeof(struct pas_dma_xct_descr
),
202 &ring
->dma
, GFP_KERNEL
);
206 memset(ring
->desc
, 0, TX_RING_SIZE
* sizeof(struct pas_dma_xct_descr
));
208 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_TXCHAN_BASEL(chan_id
),
209 PAS_DMA_TXCHAN_BASEL_BRBL(ring
->dma
));
210 val
= PAS_DMA_TXCHAN_BASEU_BRBH(ring
->dma
>> 32);
211 val
|= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE
>> 2);
213 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_TXCHAN_BASEU(chan_id
), val
);
215 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_TXCHAN_CFG(chan_id
),
216 PAS_DMA_TXCHAN_CFG_TY_IFACE
|
217 PAS_DMA_TXCHAN_CFG_TATTR(mac
->dma_if
) |
218 PAS_DMA_TXCHAN_CFG_UP
|
219 PAS_DMA_TXCHAN_CFG_WT(2));
221 ring
->next_to_use
= 0;
222 ring
->next_to_clean
= 0;
224 snprintf(ring
->irq_name
, sizeof(ring
->irq_name
),
231 kfree(ring
->desc_info
);
238 static void pasemi_mac_free_tx_resources(struct net_device
*dev
)
240 struct pasemi_mac
*mac
= netdev_priv(dev
);
242 struct pasemi_mac_buffer
*info
;
243 struct pas_dma_xct_descr
*dp
;
245 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
246 info
= &TX_DESC_INFO(mac
, i
);
247 dp
= &TX_DESC(mac
, i
);
250 pci_unmap_single(mac
->dma_pdev
,
254 dev_kfree_skb_any(info
->skb
);
263 dma_free_coherent(&mac
->dma_pdev
->dev
,
264 TX_RING_SIZE
* sizeof(struct pas_dma_xct_descr
),
265 mac
->tx
->desc
, mac
->tx
->dma
);
267 kfree(mac
->tx
->desc_info
);
272 static void pasemi_mac_free_rx_resources(struct net_device
*dev
)
274 struct pasemi_mac
*mac
= netdev_priv(dev
);
276 struct pasemi_mac_buffer
*info
;
277 struct pas_dma_xct_descr
*dp
;
279 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
280 info
= &RX_DESC_INFO(mac
, i
);
281 dp
= &RX_DESC(mac
, i
);
284 pci_unmap_single(mac
->dma_pdev
,
288 dev_kfree_skb_any(info
->skb
);
297 dma_free_coherent(&mac
->dma_pdev
->dev
,
298 RX_RING_SIZE
* sizeof(struct pas_dma_xct_descr
),
299 mac
->rx
->desc
, mac
->rx
->dma
);
301 dma_free_coherent(&mac
->dma_pdev
->dev
, RX_RING_SIZE
* sizeof(u64
),
302 mac
->rx
->buffers
, mac
->rx
->buf_dma
);
304 kfree(mac
->rx
->desc_info
);
309 static void pasemi_mac_replenish_rx_ring(struct net_device
*dev
)
311 struct pasemi_mac
*mac
= netdev_priv(dev
);
313 int start
= mac
->rx
->next_to_fill
;
316 count
= (mac
->rx
->next_to_clean
+ RX_RING_SIZE
-
317 mac
->rx
->next_to_fill
) & (RX_RING_SIZE
- 1);
319 /* Check to see if we're doing first-time setup */
320 if (unlikely(mac
->rx
->next_to_clean
== 0 && mac
->rx
->next_to_fill
== 0))
321 count
= RX_RING_SIZE
;
326 for (i
= start
; i
< start
+ count
; i
++) {
327 struct pasemi_mac_buffer
*info
= &RX_DESC_INFO(mac
, i
);
328 u64
*buff
= &RX_BUFF(mac
, i
);
332 skb
= dev_alloc_skb(BUF_SIZE
);
339 dma
= pci_map_single(mac
->dma_pdev
, skb
->data
, skb
->len
,
342 if (dma_mapping_error(dma
)) {
343 dev_kfree_skb_irq(info
->skb
);
350 *buff
= XCT_RXB_LEN(BUF_SIZE
) | XCT_RXB_ADDR(dma
);
355 pci_write_config_dword(mac
->dma_pdev
,
356 PAS_DMA_RXCHAN_INCR(mac
->dma_rxch
),
358 pci_write_config_dword(mac
->dma_pdev
,
359 PAS_DMA_RXINT_INCR(mac
->dma_if
),
362 mac
->rx
->next_to_fill
+= count
;
365 static int pasemi_mac_clean_rx(struct pasemi_mac
*mac
, int limit
)
370 spin_lock(&mac
->rx
->lock
);
372 start
= mac
->rx
->next_to_clean
;
375 for (i
= start
; i
< (start
+ RX_RING_SIZE
) && count
< limit
; i
++) {
376 struct pas_dma_xct_descr
*dp
;
377 struct pasemi_mac_buffer
*info
;
384 dp
= &RX_DESC(mac
, i
);
386 if (!(dp
->macrx
& XCT_MACRX_O
))
393 /* We have to scan for our skb since there's no way
394 * to back-map them from the descriptor, and if we
395 * have several receive channels then they might not
396 * show up in the same order as they were put on the
400 dma
= (dp
->ptr
& XCT_PTR_ADDR_M
);
401 for (j
= start
; j
< (start
+ RX_RING_SIZE
); j
++) {
402 info
= &RX_DESC_INFO(mac
, j
);
403 if (info
->dma
== dma
)
408 BUG_ON(info
->dma
!= dma
);
410 pci_unmap_single(mac
->dma_pdev
, info
->dma
, info
->skb
->len
,
415 len
= (dp
->macrx
& XCT_MACRX_LLEN_M
) >> XCT_MACRX_LLEN_S
;
419 skb
->protocol
= eth_type_trans(skb
, mac
->netdev
);
421 if ((dp
->macrx
& XCT_MACRX_HTY_M
) == XCT_MACRX_HTY_IPV4_OK
) {
422 skb
->ip_summed
= CHECKSUM_COMPLETE
;
423 skb
->csum
= (dp
->macrx
& XCT_MACRX_CSUM_M
) >>
426 skb
->ip_summed
= CHECKSUM_NONE
;
428 mac
->stats
.rx_bytes
+= len
;
429 mac
->stats
.rx_packets
++;
431 netif_receive_skb(skb
);
439 mac
->rx
->next_to_clean
+= count
;
440 pasemi_mac_replenish_rx_ring(mac
->netdev
);
442 spin_unlock(&mac
->rx
->lock
);
447 static int pasemi_mac_clean_tx(struct pasemi_mac
*mac
)
450 struct pasemi_mac_buffer
*info
;
451 struct pas_dma_xct_descr
*dp
;
455 spin_lock_irqsave(&mac
->tx
->lock
, flags
);
457 start
= mac
->tx
->next_to_clean
;
460 for (i
= start
; i
< mac
->tx
->next_to_use
; i
++) {
461 dp
= &TX_DESC(mac
, i
);
462 if (!dp
|| (dp
->mactx
& XCT_MACTX_O
))
467 info
= &TX_DESC_INFO(mac
, i
);
469 pci_unmap_single(mac
->dma_pdev
, info
->dma
,
470 info
->skb
->len
, PCI_DMA_TODEVICE
);
471 dev_kfree_skb_irq(info
->skb
);
478 mac
->tx
->next_to_clean
+= count
;
479 spin_unlock_irqrestore(&mac
->tx
->lock
, flags
);
481 netif_wake_queue(mac
->netdev
);
487 static irqreturn_t
pasemi_mac_rx_intr(int irq
, void *data
)
489 struct net_device
*dev
= data
;
490 struct pasemi_mac
*mac
= netdev_priv(dev
);
493 if (!(*mac
->rx_status
& PAS_STATUS_INT
))
496 netif_rx_schedule(dev
);
497 pci_write_config_dword(mac
->iob_pdev
, PAS_IOB_DMA_COM_TIMEOUTCFG
,
498 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0));
500 reg
= PAS_IOB_DMA_RXCH_RESET_PINTC
| PAS_IOB_DMA_RXCH_RESET_SINTC
|
501 PAS_IOB_DMA_RXCH_RESET_DINTC
;
502 if (*mac
->rx_status
& PAS_STATUS_TIMER
)
503 reg
|= PAS_IOB_DMA_RXCH_RESET_TINTC
;
505 pci_write_config_dword(mac
->iob_pdev
,
506 PAS_IOB_DMA_RXCH_RESET(mac
->dma_rxch
), reg
);
512 static irqreturn_t
pasemi_mac_tx_intr(int irq
, void *data
)
514 struct net_device
*dev
= data
;
515 struct pasemi_mac
*mac
= netdev_priv(dev
);
518 if (!(*mac
->tx_status
& PAS_STATUS_INT
))
521 pasemi_mac_clean_tx(mac
);
523 reg
= PAS_IOB_DMA_TXCH_RESET_PINTC
| PAS_IOB_DMA_TXCH_RESET_SINTC
;
524 if (*mac
->tx_status
& PAS_STATUS_TIMER
)
525 reg
|= PAS_IOB_DMA_TXCH_RESET_TINTC
;
527 pci_write_config_dword(mac
->iob_pdev
, PAS_IOB_DMA_TXCH_RESET(mac
->dma_txch
),
533 static int pasemi_mac_open(struct net_device
*dev
)
535 struct pasemi_mac
*mac
= netdev_priv(dev
);
540 /* enable rx section */
541 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_COM_RXCMD
,
542 PAS_DMA_COM_RXCMD_EN
);
544 /* enable tx section */
545 pci_write_config_dword(mac
->dma_pdev
, PAS_DMA_COM_TXCMD
,
546 PAS_DMA_COM_TXCMD_EN
);
548 flags
= PAS_MAC_CFG_TXP_FCE
| PAS_MAC_CFG_TXP_FPC(3) |
549 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
550 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
552 pci_write_config_dword(mac
->pdev
, PAS_MAC_CFG_TXP
, flags
);
554 flags
= PAS_MAC_CFG_PCFG_S1
| PAS_MAC_CFG_PCFG_PE
|
555 PAS_MAC_CFG_PCFG_PR
| PAS_MAC_CFG_PCFG_CE
;
557 flags
|= PAS_MAC_CFG_PCFG_TSR_1G
| PAS_MAC_CFG_PCFG_SPD_1G
;
559 pci_write_config_dword(mac
->iob_pdev
, PAS_IOB_DMA_RXCH_CFG(mac
->dma_rxch
),
560 PAS_IOB_DMA_RXCH_CFG_CNTTH(30));
562 pci_write_config_dword(mac
->iob_pdev
, PAS_IOB_DMA_COM_TIMEOUTCFG
,
563 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
565 pci_write_config_dword(mac
->pdev
, PAS_MAC_CFG_PCFG
, flags
);
567 ret
= pasemi_mac_setup_rx_resources(dev
);
569 goto out_rx_resources
;
571 ret
= pasemi_mac_setup_tx_resources(dev
);
573 goto out_tx_resources
;
575 pci_write_config_dword(mac
->pdev
, PAS_MAC_IPC_CHNL
,
576 PAS_MAC_IPC_CHNL_DCHNO(mac
->dma_rxch
) |
577 PAS_MAC_IPC_CHNL_BCH(mac
->dma_rxch
));
580 pci_write_config_dword(mac
->dma_pdev
,
581 PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
),
582 PAS_DMA_RXINT_RCMDSTA_EN
);
584 /* enable rx channel */
585 pci_write_config_dword(mac
->dma_pdev
,
586 PAS_DMA_RXCHAN_CCMDSTA(mac
->dma_rxch
),
587 PAS_DMA_RXCHAN_CCMDSTA_EN
|
588 PAS_DMA_RXCHAN_CCMDSTA_DU
);
590 /* enable tx channel */
591 pci_write_config_dword(mac
->dma_pdev
,
592 PAS_DMA_TXCHAN_TCMDSTA(mac
->dma_txch
),
593 PAS_DMA_TXCHAN_TCMDSTA_EN
);
595 pasemi_mac_replenish_rx_ring(dev
);
597 netif_start_queue(dev
);
598 netif_poll_enable(dev
);
600 /* Interrupts are a bit different for our DMA controller: While
601 * it's got one a regular PCI device header, the interrupt there
602 * is really the base of the range it's using. Each tx and rx
603 * channel has it's own interrupt source.
606 base_irq
= virq_to_hw(mac
->dma_pdev
->irq
);
608 mac
->tx_irq
= irq_create_mapping(NULL
, base_irq
+ mac
->dma_txch
);
609 mac
->rx_irq
= irq_create_mapping(NULL
, base_irq
+ 20 + mac
->dma_txch
);
611 ret
= request_irq(mac
->tx_irq
, &pasemi_mac_tx_intr
, IRQF_DISABLED
,
612 mac
->tx
->irq_name
, dev
);
614 dev_err(&mac
->pdev
->dev
, "request_irq of irq %d failed: %d\n",
615 base_irq
+ mac
->dma_txch
, ret
);
619 ret
= request_irq(mac
->rx_irq
, &pasemi_mac_rx_intr
, IRQF_DISABLED
,
620 mac
->rx
->irq_name
, dev
);
622 dev_err(&mac
->pdev
->dev
, "request_irq of irq %d failed: %d\n",
623 base_irq
+ 20 + mac
->dma_rxch
, ret
);
630 free_irq(mac
->tx_irq
, dev
);
632 netif_poll_disable(dev
);
633 netif_stop_queue(dev
);
634 pasemi_mac_free_tx_resources(dev
);
636 pasemi_mac_free_rx_resources(dev
);
642 #define MAX_RETRIES 5000
644 static int pasemi_mac_close(struct net_device
*dev
)
646 struct pasemi_mac
*mac
= netdev_priv(dev
);
650 netif_stop_queue(dev
);
652 /* Clean out any pending buffers */
653 pasemi_mac_clean_tx(mac
);
654 pasemi_mac_clean_rx(mac
, RX_RING_SIZE
);
656 /* Disable interface */
657 pci_write_config_dword(mac
->dma_pdev
,
658 PAS_DMA_TXCHAN_TCMDSTA(mac
->dma_txch
),
659 PAS_DMA_TXCHAN_TCMDSTA_ST
);
660 pci_write_config_dword(mac
->dma_pdev
,
661 PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
),
662 PAS_DMA_RXINT_RCMDSTA_ST
);
663 pci_write_config_dword(mac
->dma_pdev
,
664 PAS_DMA_RXCHAN_CCMDSTA(mac
->dma_rxch
),
665 PAS_DMA_RXCHAN_CCMDSTA_ST
);
667 for (retries
= 0; retries
< MAX_RETRIES
; retries
++) {
668 pci_read_config_dword(mac
->dma_pdev
,
669 PAS_DMA_TXCHAN_TCMDSTA(mac
->dma_txch
),
671 if (!(stat
& PAS_DMA_TXCHAN_TCMDSTA_ACT
))
676 if (stat
& PAS_DMA_TXCHAN_TCMDSTA_ACT
)
677 dev_err(&mac
->dma_pdev
->dev
, "Failed to stop tx channel\n");
679 for (retries
= 0; retries
< MAX_RETRIES
; retries
++) {
680 pci_read_config_dword(mac
->dma_pdev
,
681 PAS_DMA_RXCHAN_CCMDSTA(mac
->dma_rxch
),
683 if (!(stat
& PAS_DMA_RXCHAN_CCMDSTA_ACT
))
688 if (stat
& PAS_DMA_RXCHAN_CCMDSTA_ACT
)
689 dev_err(&mac
->dma_pdev
->dev
, "Failed to stop rx channel\n");
691 for (retries
= 0; retries
< MAX_RETRIES
; retries
++) {
692 pci_read_config_dword(mac
->dma_pdev
,
693 PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
),
695 if (!(stat
& PAS_DMA_RXINT_RCMDSTA_ACT
))
700 if (stat
& PAS_DMA_RXINT_RCMDSTA_ACT
)
701 dev_err(&mac
->dma_pdev
->dev
, "Failed to stop rx interface\n");
703 /* Then, disable the channel. This must be done separately from
704 * stopping, since you can't disable when active.
707 pci_write_config_dword(mac
->dma_pdev
,
708 PAS_DMA_TXCHAN_TCMDSTA(mac
->dma_txch
), 0);
709 pci_write_config_dword(mac
->dma_pdev
,
710 PAS_DMA_RXCHAN_CCMDSTA(mac
->dma_rxch
), 0);
711 pci_write_config_dword(mac
->dma_pdev
,
712 PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
), 0);
714 free_irq(mac
->tx_irq
, dev
);
715 free_irq(mac
->rx_irq
, dev
);
718 pasemi_mac_free_rx_resources(dev
);
719 pasemi_mac_free_tx_resources(dev
);
724 static int pasemi_mac_start_tx(struct sk_buff
*skb
, struct net_device
*dev
)
726 struct pasemi_mac
*mac
= netdev_priv(dev
);
727 struct pasemi_mac_txring
*txring
;
728 struct pasemi_mac_buffer
*info
;
729 struct pas_dma_xct_descr
*dp
;
734 dflags
= XCT_MACTX_O
| XCT_MACTX_ST
| XCT_MACTX_SS
| XCT_MACTX_CRC_PAD
;
736 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
737 const unsigned char *nh
= skb_network_header(skb
);
739 switch (ip_hdr(skb
)->protocol
) {
741 dflags
|= XCT_MACTX_CSUM_TCP
;
742 dflags
|= XCT_MACTX_IPH(skb_network_header_len(skb
) >> 2);
743 dflags
|= XCT_MACTX_IPO(nh
- skb
->data
);
746 dflags
|= XCT_MACTX_CSUM_UDP
;
747 dflags
|= XCT_MACTX_IPH(skb_network_header_len(skb
) >> 2);
748 dflags
|= XCT_MACTX_IPO(nh
- skb
->data
);
753 map
= pci_map_single(mac
->dma_pdev
, skb
->data
, skb
->len
, PCI_DMA_TODEVICE
);
755 if (dma_mapping_error(map
))
756 return NETDEV_TX_BUSY
;
760 spin_lock_irqsave(&txring
->lock
, flags
);
762 if (txring
->next_to_clean
- txring
->next_to_use
== TX_RING_SIZE
) {
763 spin_unlock_irqrestore(&txring
->lock
, flags
);
764 pasemi_mac_clean_tx(mac
);
765 spin_lock_irqsave(&txring
->lock
, flags
);
767 if (txring
->next_to_clean
- txring
->next_to_use
==
769 /* Still no room -- stop the queue and wait for tx
770 * intr when there's room.
772 netif_stop_queue(dev
);
778 dp
= &TX_DESC(mac
, txring
->next_to_use
);
779 info
= &TX_DESC_INFO(mac
, txring
->next_to_use
);
781 dp
->mactx
= dflags
| XCT_MACTX_LLEN(skb
->len
);
782 dp
->ptr
= XCT_PTR_LEN(skb
->len
) | XCT_PTR_ADDR(map
);
786 txring
->next_to_use
++;
787 mac
->stats
.tx_packets
++;
788 mac
->stats
.tx_bytes
+= skb
->len
;
790 spin_unlock_irqrestore(&txring
->lock
, flags
);
792 pci_write_config_dword(mac
->dma_pdev
,
793 PAS_DMA_TXCHAN_INCR(mac
->dma_txch
), 1);
798 spin_unlock_irqrestore(&txring
->lock
, flags
);
799 pci_unmap_single(mac
->dma_pdev
, map
, skb
->len
, PCI_DMA_TODEVICE
);
800 return NETDEV_TX_BUSY
;
803 static struct net_device_stats
*pasemi_mac_get_stats(struct net_device
*dev
)
805 struct pasemi_mac
*mac
= netdev_priv(dev
);
810 static void pasemi_mac_set_rx_mode(struct net_device
*dev
)
812 struct pasemi_mac
*mac
= netdev_priv(dev
);
815 pci_read_config_dword(mac
->pdev
, PAS_MAC_CFG_PCFG
, &flags
);
817 /* Set promiscuous */
818 if (dev
->flags
& IFF_PROMISC
)
819 flags
|= PAS_MAC_CFG_PCFG_PR
;
821 flags
&= ~PAS_MAC_CFG_PCFG_PR
;
823 pci_write_config_dword(mac
->pdev
, PAS_MAC_CFG_PCFG
, flags
);
827 static int pasemi_mac_poll(struct net_device
*dev
, int *budget
)
829 int pkts
, limit
= min(*budget
, dev
->quota
);
830 struct pasemi_mac
*mac
= netdev_priv(dev
);
832 pkts
= pasemi_mac_clean_rx(mac
, limit
);
835 /* all done, no more packets present */
836 netif_rx_complete(dev
);
838 /* re-enable receive interrupts */
839 pci_write_config_dword(mac
->iob_pdev
, PAS_IOB_DMA_COM_TIMEOUTCFG
,
840 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
843 /* used up our quantum, so reschedule */
851 pasemi_mac_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
853 static int index
= 0;
854 struct net_device
*dev
;
855 struct pasemi_mac
*mac
;
858 err
= pci_enable_device(pdev
);
862 dev
= alloc_etherdev(sizeof(struct pasemi_mac
));
865 "pasemi_mac: Could not allocate ethernet device.\n");
867 goto out_disable_device
;
870 SET_MODULE_OWNER(dev
);
871 pci_set_drvdata(pdev
, dev
);
872 SET_NETDEV_DEV(dev
, &pdev
->dev
);
874 mac
= netdev_priv(dev
);
878 mac
->dma_pdev
= pci_get_device(PCI_VENDOR_ID_PASEMI
, 0xa007, NULL
);
880 if (!mac
->dma_pdev
) {
881 dev_err(&pdev
->dev
, "Can't find DMA Controller\n");
883 goto out_free_netdev
;
886 mac
->iob_pdev
= pci_get_device(PCI_VENDOR_ID_PASEMI
, 0xa001, NULL
);
888 if (!mac
->iob_pdev
) {
889 dev_err(&pdev
->dev
, "Can't find I/O Bridge\n");
891 goto out_put_dma_pdev
;
894 /* These should come out of the device tree eventually */
895 mac
->dma_txch
= index
;
896 mac
->dma_rxch
= index
;
898 /* We probe GMAC before XAUI, but the DMA interfaces are
899 * in XAUI, GMAC order.
902 mac
->dma_if
= index
+ 2;
904 mac
->dma_if
= index
- 4;
907 switch (pdev
->device
) {
909 mac
->type
= MAC_TYPE_GMAC
;
912 mac
->type
= MAC_TYPE_XAUI
;
919 /* get mac addr from device tree */
920 if (pasemi_get_mac_addr(mac
) || !is_valid_ether_addr(mac
->mac_addr
)) {
924 memcpy(dev
->dev_addr
, mac
->mac_addr
, sizeof(mac
->mac_addr
));
926 dev
->open
= pasemi_mac_open
;
927 dev
->stop
= pasemi_mac_close
;
928 dev
->hard_start_xmit
= pasemi_mac_start_tx
;
929 dev
->get_stats
= pasemi_mac_get_stats
;
930 dev
->set_multicast_list
= pasemi_mac_set_rx_mode
;
932 dev
->poll
= pasemi_mac_poll
;
933 dev
->features
= NETIF_F_HW_CSUM
;
935 /* The dma status structure is located in the I/O bridge, and
939 /* XXXOJN This should come from the device tree */
940 dma_status
= __ioremap(0xfd800000, 0x1000, 0);
942 mac
->rx_status
= &dma_status
->rx_sta
[mac
->dma_rxch
];
943 mac
->tx_status
= &dma_status
->tx_sta
[mac
->dma_txch
];
945 err
= register_netdev(dev
);
948 dev_err(&mac
->pdev
->dev
, "register_netdev failed with error %d\n",
952 printk(KERN_INFO
"%s: PA Semi %s: intf %d, txch %d, rxch %d, "
953 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
954 dev
->name
, mac
->type
== MAC_TYPE_GMAC
? "GMAC" : "XAUI",
955 mac
->dma_if
, mac
->dma_txch
, mac
->dma_rxch
,
956 dev
->dev_addr
[0], dev
->dev_addr
[1], dev
->dev_addr
[2],
957 dev
->dev_addr
[3], dev
->dev_addr
[4], dev
->dev_addr
[5]);
962 pci_dev_put(mac
->iob_pdev
);
964 pci_dev_put(mac
->dma_pdev
);
968 pci_disable_device(pdev
);
973 static void __devexit
pasemi_mac_remove(struct pci_dev
*pdev
)
975 struct net_device
*netdev
= pci_get_drvdata(pdev
);
976 struct pasemi_mac
*mac
;
981 mac
= netdev_priv(netdev
);
983 unregister_netdev(netdev
);
985 pci_disable_device(pdev
);
986 pci_dev_put(mac
->dma_pdev
);
987 pci_dev_put(mac
->iob_pdev
);
989 pci_set_drvdata(pdev
, NULL
);
993 static struct pci_device_id pasemi_mac_pci_tbl
[] = {
994 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI
, 0xa005) },
995 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI
, 0xa006) },
998 MODULE_DEVICE_TABLE(pci
, pasemi_mac_pci_tbl
);
1000 static struct pci_driver pasemi_mac_driver
= {
1001 .name
= "pasemi_mac",
1002 .id_table
= pasemi_mac_pci_tbl
,
1003 .probe
= pasemi_mac_probe
,
1004 .remove
= __devexit_p(pasemi_mac_remove
),
1007 static void __exit
pasemi_mac_cleanup_module(void)
1009 pci_unregister_driver(&pasemi_mac_driver
);
1010 __iounmap(dma_status
);
1014 int pasemi_mac_init_module(void)
1016 return pci_register_driver(&pasemi_mac_driver
);
1019 MODULE_LICENSE("GPL");
1020 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
1021 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
1023 module_init(pasemi_mac_init_module
);
1024 module_exit(pasemi_mac_cleanup_module
);