2 * Copyright (C) 1999 - 2010 Intel Corporation.
3 * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
5 * This code was derived from the Intel e1000e Linux driver.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
22 #include "pch_gbe_api.h"
24 #define DRV_VERSION "1.00"
25 const char pch_driver_version
[] = DRV_VERSION
;
27 #define PCI_DEVICE_ID_INTEL_IOH1_GBE 0x8802 /* Pci device ID */
28 #define PCH_GBE_MAR_ENTRIES 16
29 #define PCH_GBE_SHORT_PKT 64
30 #define DSC_INIT16 0xC000
31 #define PCH_GBE_DMA_ALIGN 0
32 #define PCH_GBE_WATCHDOG_PERIOD (1 * HZ) /* watchdog time */
33 #define PCH_GBE_COPYBREAK_DEFAULT 256
34 #define PCH_GBE_PCI_BAR 1
36 #define PCH_GBE_TX_WEIGHT 64
37 #define PCH_GBE_RX_WEIGHT 64
38 #define PCH_GBE_RX_BUFFER_WRITE 16
40 /* Initialize the wake-on-LAN settings */
41 #define PCH_GBE_WL_INIT_SETTING (PCH_GBE_WLC_MP)
43 #define PCH_GBE_MAC_RGMII_CTRL_SETTING ( \
44 PCH_GBE_CHIP_TYPE_INTERNAL | \
45 PCH_GBE_RGMII_MODE_RGMII | \
49 /* Ethertype field values */
50 #define PCH_GBE_MAX_JUMBO_FRAME_SIZE 10318
51 #define PCH_GBE_FRAME_SIZE_2048 2048
52 #define PCH_GBE_FRAME_SIZE_4096 4096
53 #define PCH_GBE_FRAME_SIZE_8192 8192
55 #define PCH_GBE_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
56 #define PCH_GBE_RX_DESC(R, i) PCH_GBE_GET_DESC(R, i, pch_gbe_rx_desc)
57 #define PCH_GBE_TX_DESC(R, i) PCH_GBE_GET_DESC(R, i, pch_gbe_tx_desc)
58 #define PCH_GBE_DESC_UNUSED(R) \
59 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
60 (R)->next_to_clean - (R)->next_to_use - 1)
62 /* Pause packet value */
63 #define PCH_GBE_PAUSE_PKT1_VALUE 0x00C28001
64 #define PCH_GBE_PAUSE_PKT2_VALUE 0x00000100
65 #define PCH_GBE_PAUSE_PKT4_VALUE 0x01000888
66 #define PCH_GBE_PAUSE_PKT5_VALUE 0x0000FFFF
68 #define PCH_GBE_ETH_ALEN 6
70 /* This defines the bits that are set in the Interrupt Mask
71 * Set/Read Register. Each bit is documented below:
72 * o RXT0 = Receiver Timer Interrupt (ring 0)
73 * o TXDW = Transmit Descriptor Written Back
74 * o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
75 * o RXSEQ = Receive Sequence Error
76 * o LSC = Link Status Change
78 #define PCH_GBE_INT_ENABLE_MASK ( \
79 PCH_GBE_INT_RX_DMA_CMPLT | \
80 PCH_GBE_INT_RX_DSC_EMP | \
81 PCH_GBE_INT_WOL_DET | \
82 PCH_GBE_INT_TX_CMPLT \
86 static unsigned int copybreak __read_mostly
= PCH_GBE_COPYBREAK_DEFAULT
;
89 * pch_gbe_mac_read_mac_addr - Read MAC address
90 * @hw: Pointer to the HW structure
94 s32
pch_gbe_mac_read_mac_addr(struct pch_gbe_hw
*hw
)
98 adr1a
= ioread32(&hw
->reg
->mac_adr
[0].high
);
99 adr1b
= ioread32(&hw
->reg
->mac_adr
[0].low
);
101 hw
->mac
.addr
[0] = (u8
)(adr1a
& 0xFF);
102 hw
->mac
.addr
[1] = (u8
)((adr1a
>> 8) & 0xFF);
103 hw
->mac
.addr
[2] = (u8
)((adr1a
>> 16) & 0xFF);
104 hw
->mac
.addr
[3] = (u8
)((adr1a
>> 24) & 0xFF);
105 hw
->mac
.addr
[4] = (u8
)(adr1b
& 0xFF);
106 hw
->mac
.addr
[5] = (u8
)((adr1b
>> 8) & 0xFF);
108 pr_debug("hw->mac.addr : %pM\n", hw
->mac
.addr
);
113 * pch_gbe_wait_clr_bit - Wait to clear a bit
114 * @reg: Pointer of register
117 void pch_gbe_wait_clr_bit(void *reg
, u32 bit
)
122 while ((ioread32(reg
) & bit
) && --tmp
)
125 pr_err("Error: busy bit is not cleared\n");
128 * pch_gbe_mac_mar_set - Set MAC address register
129 * @hw: Pointer to the HW structure
130 * @addr: Pointer to the MAC address
131 * @index: MAC address array register
133 void pch_gbe_mac_mar_set(struct pch_gbe_hw
*hw
, u8
* addr
, u32 index
)
135 u32 mar_low
, mar_high
, adrmask
;
137 pr_debug("index : 0x%x\n", index
);
140 * HW expects these in little endian so we reverse the byte order
141 * from network order (big endian) to little endian
143 mar_high
= ((u32
) addr
[0] | ((u32
) addr
[1] << 8) |
144 ((u32
) addr
[2] << 16) | ((u32
) addr
[3] << 24));
145 mar_low
= ((u32
) addr
[4] | ((u32
) addr
[5] << 8));
146 /* Stop the MAC Address of index. */
147 adrmask
= ioread32(&hw
->reg
->ADDR_MASK
);
148 iowrite32((adrmask
| (0x0001 << index
)), &hw
->reg
->ADDR_MASK
);
150 pch_gbe_wait_clr_bit(&hw
->reg
->ADDR_MASK
, PCH_GBE_BUSY
);
151 /* Set the MAC address to the MAC address 1A/1B register */
152 iowrite32(mar_high
, &hw
->reg
->mac_adr
[index
].high
);
153 iowrite32(mar_low
, &hw
->reg
->mac_adr
[index
].low
);
154 /* Start the MAC address of index */
155 iowrite32((adrmask
& ~(0x0001 << index
)), &hw
->reg
->ADDR_MASK
);
157 pch_gbe_wait_clr_bit(&hw
->reg
->ADDR_MASK
, PCH_GBE_BUSY
);
161 * pch_gbe_mac_reset_hw - Reset hardware
162 * @hw: Pointer to the HW structure
164 void pch_gbe_mac_reset_hw(struct pch_gbe_hw
*hw
)
166 /* Read the MAC address. and store to the private data */
167 pch_gbe_mac_read_mac_addr(hw
);
168 iowrite32(PCH_GBE_ALL_RST
, &hw
->reg
->RESET
);
169 #ifdef PCH_GBE_MAC_IFOP_RGMII
170 iowrite32(PCH_GBE_MODE_GMII_ETHER
, &hw
->reg
->MODE
);
172 pch_gbe_wait_clr_bit(&hw
->reg
->RESET
, PCH_GBE_ALL_RST
);
173 /* Setup the receive address */
174 pch_gbe_mac_mar_set(hw
, hw
->mac
.addr
, 0);
179 * pch_gbe_mac_init_rx_addrs - Initialize receive address's
180 * @hw: Pointer to the HW structure
181 * @mar_count: Receive address registers
183 void pch_gbe_mac_init_rx_addrs(struct pch_gbe_hw
*hw
, u16 mar_count
)
187 /* Setup the receive address */
188 pch_gbe_mac_mar_set(hw
, hw
->mac
.addr
, 0);
190 /* Zero out the other receive addresses */
191 for (i
= 1; i
< mar_count
; i
++) {
192 iowrite32(0, &hw
->reg
->mac_adr
[i
].high
);
193 iowrite32(0, &hw
->reg
->mac_adr
[i
].low
);
195 iowrite32(0xFFFE, &hw
->reg
->ADDR_MASK
);
197 pch_gbe_wait_clr_bit(&hw
->reg
->ADDR_MASK
, PCH_GBE_BUSY
);
202 * pch_gbe_mac_mc_addr_list_update - Update Multicast addresses
203 * @hw: Pointer to the HW structure
204 * @mc_addr_list: Array of multicast addresses to program
205 * @mc_addr_count: Number of multicast addresses to program
206 * @mar_used_count: The first MAC Address register free to program
207 * @mar_total_num: Total number of supported MAC Address Registers
209 void pch_gbe_mac_mc_addr_list_update(struct pch_gbe_hw
*hw
,
210 u8
*mc_addr_list
, u32 mc_addr_count
,
211 u32 mar_used_count
, u32 mar_total_num
)
215 /* Load the first set of multicast addresses into the exact
216 * filters (RAR). If there are not enough to fill the RAR
217 * array, clear the filters.
219 for (i
= mar_used_count
; i
< mar_total_num
; i
++) {
221 pch_gbe_mac_mar_set(hw
, mc_addr_list
, i
);
223 mc_addr_list
+= PCH_GBE_ETH_ALEN
;
225 /* Clear MAC address mask */
226 adrmask
= ioread32(&hw
->reg
->ADDR_MASK
);
227 iowrite32((adrmask
| (0x0001 << i
)),
228 &hw
->reg
->ADDR_MASK
);
230 pch_gbe_wait_clr_bit(&hw
->reg
->ADDR_MASK
, PCH_GBE_BUSY
);
231 /* Clear MAC address */
232 iowrite32(0, &hw
->reg
->mac_adr
[i
].high
);
233 iowrite32(0, &hw
->reg
->mac_adr
[i
].low
);
239 * pch_gbe_mac_force_mac_fc - Force the MAC's flow control settings
240 * @hw: Pointer to the HW structure
243 * Negative value: Failed.
245 s32
pch_gbe_mac_force_mac_fc(struct pch_gbe_hw
*hw
)
247 struct pch_gbe_mac_info
*mac
= &hw
->mac
;
250 pr_debug("mac->fc = %u\n", mac
->fc
);
252 rx_fctrl
= ioread32(&hw
->reg
->RX_FCTRL
);
255 case PCH_GBE_FC_NONE
:
256 rx_fctrl
&= ~PCH_GBE_FL_CTRL_EN
;
257 mac
->tx_fc_enable
= false;
259 case PCH_GBE_FC_RX_PAUSE
:
260 rx_fctrl
|= PCH_GBE_FL_CTRL_EN
;
261 mac
->tx_fc_enable
= false;
263 case PCH_GBE_FC_TX_PAUSE
:
264 rx_fctrl
&= ~PCH_GBE_FL_CTRL_EN
;
265 mac
->tx_fc_enable
= true;
267 case PCH_GBE_FC_FULL
:
268 rx_fctrl
|= PCH_GBE_FL_CTRL_EN
;
269 mac
->tx_fc_enable
= true;
272 pr_err("Flow control param set incorrectly\n");
275 if (mac
->link_duplex
== DUPLEX_HALF
)
276 rx_fctrl
&= ~PCH_GBE_FL_CTRL_EN
;
277 iowrite32(rx_fctrl
, &hw
->reg
->RX_FCTRL
);
278 pr_debug("RX_FCTRL reg : 0x%08x mac->tx_fc_enable : %d\n",
279 ioread32(&hw
->reg
->RX_FCTRL
), mac
->tx_fc_enable
);
284 * pch_gbe_mac_set_wol_event - Set wake-on-lan event
285 * @hw: Pointer to the HW structure
286 * @wu_evt: Wake up event
288 void pch_gbe_mac_set_wol_event(struct pch_gbe_hw
*hw
, u32 wu_evt
)
292 pr_debug("wu_evt : 0x%08x ADDR_MASK reg : 0x%08x\n",
293 wu_evt
, ioread32(&hw
->reg
->ADDR_MASK
));
296 /* Set Wake-On-Lan address mask */
297 addr_mask
= ioread32(&hw
->reg
->ADDR_MASK
);
298 iowrite32(addr_mask
, &hw
->reg
->WOL_ADDR_MASK
);
300 pch_gbe_wait_clr_bit(&hw
->reg
->WOL_ADDR_MASK
, PCH_GBE_WLA_BUSY
);
301 iowrite32(0, &hw
->reg
->WOL_ST
);
302 iowrite32((wu_evt
| PCH_GBE_WLC_WOL_MODE
), &hw
->reg
->WOL_CTRL
);
303 iowrite32(0x02, &hw
->reg
->TCPIP_ACC
);
304 iowrite32(PCH_GBE_INT_ENABLE_MASK
, &hw
->reg
->INT_EN
);
306 iowrite32(0, &hw
->reg
->WOL_CTRL
);
307 iowrite32(0, &hw
->reg
->WOL_ST
);
313 * pch_gbe_mac_ctrl_miim - Control MIIM interface
314 * @hw: Pointer to the HW structure
315 * @addr: Address of PHY
316 * @dir: Operetion. (Write or Read)
317 * @reg: Access register of PHY
320 * Returns: Read date.
322 u16
pch_gbe_mac_ctrl_miim(struct pch_gbe_hw
*hw
, u32 addr
, u32 dir
, u32 reg
,
329 spin_lock_irqsave(&hw
->miim_lock
, flags
);
331 for (i
= 100; i
; --i
) {
332 if ((ioread32(&hw
->reg
->MIIM
) & PCH_GBE_MIIM_OPER_READY
))
337 pr_err("pch-gbe.miim won't go Ready\n");
338 spin_unlock_irqrestore(&hw
->miim_lock
, flags
);
339 return 0; /* No way to indicate timeout error */
341 iowrite32(((reg
<< PCH_GBE_MIIM_REG_ADDR_SHIFT
) |
342 (addr
<< PCH_GBE_MIIM_PHY_ADDR_SHIFT
) |
343 dir
| data
), &hw
->reg
->MIIM
);
344 for (i
= 0; i
< 100; i
++) {
346 data_out
= ioread32(&hw
->reg
->MIIM
);
347 if ((data_out
& PCH_GBE_MIIM_OPER_READY
))
350 spin_unlock_irqrestore(&hw
->miim_lock
, flags
);
352 pr_debug("PHY %s: reg=%d, data=0x%04X\n",
353 dir
== PCH_GBE_MIIM_OPER_READ
? "READ" : "WRITE", reg
,
354 dir
== PCH_GBE_MIIM_OPER_READ
? data_out
: data
);
355 return (u16
) data_out
;
359 * pch_gbe_mac_set_pause_packet - Set pause packet
360 * @hw: Pointer to the HW structure
362 void pch_gbe_mac_set_pause_packet(struct pch_gbe_hw
*hw
)
364 unsigned long tmp2
, tmp3
;
366 /* Set Pause packet */
367 tmp2
= hw
->mac
.addr
[1];
368 tmp2
= (tmp2
<< 8) | hw
->mac
.addr
[0];
369 tmp2
= PCH_GBE_PAUSE_PKT2_VALUE
| (tmp2
<< 16);
371 tmp3
= hw
->mac
.addr
[5];
372 tmp3
= (tmp3
<< 8) | hw
->mac
.addr
[4];
373 tmp3
= (tmp3
<< 8) | hw
->mac
.addr
[3];
374 tmp3
= (tmp3
<< 8) | hw
->mac
.addr
[2];
376 iowrite32(PCH_GBE_PAUSE_PKT1_VALUE
, &hw
->reg
->PAUSE_PKT1
);
377 iowrite32(tmp2
, &hw
->reg
->PAUSE_PKT2
);
378 iowrite32(tmp3
, &hw
->reg
->PAUSE_PKT3
);
379 iowrite32(PCH_GBE_PAUSE_PKT4_VALUE
, &hw
->reg
->PAUSE_PKT4
);
380 iowrite32(PCH_GBE_PAUSE_PKT5_VALUE
, &hw
->reg
->PAUSE_PKT5
);
382 /* Transmit Pause Packet */
383 iowrite32(PCH_GBE_PS_PKT_RQ
, &hw
->reg
->PAUSE_REQ
);
385 pr_debug("PAUSE_PKT1-5 reg : 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
386 ioread32(&hw
->reg
->PAUSE_PKT1
), ioread32(&hw
->reg
->PAUSE_PKT2
),
387 ioread32(&hw
->reg
->PAUSE_PKT3
), ioread32(&hw
->reg
->PAUSE_PKT4
),
388 ioread32(&hw
->reg
->PAUSE_PKT5
));
395 * pch_gbe_alloc_queues - Allocate memory for all rings
396 * @adapter: Board private structure to initialize
399 * Negative value: Failed
401 static int pch_gbe_alloc_queues(struct pch_gbe_adapter
*adapter
)
405 size
= (int)sizeof(struct pch_gbe_tx_ring
);
406 adapter
->tx_ring
= kzalloc(size
, GFP_KERNEL
);
407 if (!adapter
->tx_ring
)
409 size
= (int)sizeof(struct pch_gbe_rx_ring
);
410 adapter
->rx_ring
= kzalloc(size
, GFP_KERNEL
);
411 if (!adapter
->rx_ring
) {
412 kfree(adapter
->tx_ring
);
419 * pch_gbe_init_stats - Initialize status
420 * @adapter: Board private structure to initialize
422 static void pch_gbe_init_stats(struct pch_gbe_adapter
*adapter
)
424 memset(&adapter
->stats
, 0, sizeof(adapter
->stats
));
429 * pch_gbe_init_phy - Initialize PHY
430 * @adapter: Board private structure to initialize
433 * Negative value: Failed
435 static int pch_gbe_init_phy(struct pch_gbe_adapter
*adapter
)
437 struct net_device
*netdev
= adapter
->netdev
;
441 /* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
442 for (addr
= 0; addr
< PCH_GBE_PHY_REGS_LEN
; addr
++) {
443 adapter
->mii
.phy_id
= (addr
== 0) ? 1 : (addr
== 1) ? 0 : addr
;
444 bmcr
= pch_gbe_mdio_read(netdev
, adapter
->mii
.phy_id
, MII_BMCR
);
445 stat
= pch_gbe_mdio_read(netdev
, adapter
->mii
.phy_id
, MII_BMSR
);
446 stat
= pch_gbe_mdio_read(netdev
, adapter
->mii
.phy_id
, MII_BMSR
);
447 if (!((bmcr
== 0xFFFF) || ((stat
== 0) && (bmcr
== 0))))
450 adapter
->hw
.phy
.addr
= adapter
->mii
.phy_id
;
451 pr_debug("phy_addr = %d\n", adapter
->mii
.phy_id
);
454 /* Selected the phy and isolate the rest */
455 for (addr
= 0; addr
< PCH_GBE_PHY_REGS_LEN
; addr
++) {
456 if (addr
!= adapter
->mii
.phy_id
) {
457 pch_gbe_mdio_write(netdev
, addr
, MII_BMCR
,
460 bmcr
= pch_gbe_mdio_read(netdev
, addr
, MII_BMCR
);
461 pch_gbe_mdio_write(netdev
, addr
, MII_BMCR
,
462 bmcr
& ~BMCR_ISOLATE
);
467 adapter
->mii
.phy_id_mask
= 0x1F;
468 adapter
->mii
.reg_num_mask
= 0x1F;
469 adapter
->mii
.dev
= adapter
->netdev
;
470 adapter
->mii
.mdio_read
= pch_gbe_mdio_read
;
471 adapter
->mii
.mdio_write
= pch_gbe_mdio_write
;
472 adapter
->mii
.supports_gmii
= mii_check_gmii_support(&adapter
->mii
);
477 * pch_gbe_mdio_read - The read function for mii
478 * @netdev: Network interface device structure
480 * @reg: Access location
483 * Negative value: Failed
485 int pch_gbe_mdio_read(struct net_device
*netdev
, int addr
, int reg
)
487 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
488 struct pch_gbe_hw
*hw
= &adapter
->hw
;
490 return pch_gbe_mac_ctrl_miim(hw
, addr
, PCH_GBE_HAL_MIIM_READ
, reg
,
495 * pch_gbe_mdio_write - The write function for mii
496 * @netdev: Network interface device structure
497 * @addr: Phy ID (not used)
498 * @reg: Access location
501 void pch_gbe_mdio_write(struct net_device
*netdev
, int addr
, int reg
, int data
)
503 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
504 struct pch_gbe_hw
*hw
= &adapter
->hw
;
506 pch_gbe_mac_ctrl_miim(hw
, addr
, PCH_GBE_HAL_MIIM_WRITE
, reg
, data
);
510 * pch_gbe_reset_task - Reset processing at the time of transmission timeout
511 * @work: Pointer of board private structure
513 static void pch_gbe_reset_task(struct work_struct
*work
)
515 struct pch_gbe_adapter
*adapter
;
516 adapter
= container_of(work
, struct pch_gbe_adapter
, reset_task
);
518 pch_gbe_reinit_locked(adapter
);
522 * pch_gbe_reinit_locked- Re-initialization
523 * @adapter: Board private structure
525 void pch_gbe_reinit_locked(struct pch_gbe_adapter
*adapter
)
527 struct net_device
*netdev
= adapter
->netdev
;
530 if (netif_running(netdev
)) {
531 pch_gbe_down(adapter
);
538 * pch_gbe_reset - Reset GbE
539 * @adapter: Board private structure
541 void pch_gbe_reset(struct pch_gbe_adapter
*adapter
)
543 pch_gbe_mac_reset_hw(&adapter
->hw
);
544 /* Setup the receive address. */
545 pch_gbe_mac_init_rx_addrs(&adapter
->hw
, PCH_GBE_MAR_ENTRIES
);
546 if (pch_gbe_hal_init_hw(&adapter
->hw
))
547 pr_err("Hardware Error\n");
551 * pch_gbe_free_irq - Free an interrupt
552 * @adapter: Board private structure
554 static void pch_gbe_free_irq(struct pch_gbe_adapter
*adapter
)
556 struct net_device
*netdev
= adapter
->netdev
;
558 free_irq(adapter
->pdev
->irq
, netdev
);
559 if (adapter
->have_msi
) {
560 pci_disable_msi(adapter
->pdev
);
561 pr_debug("call pci_disable_msi\n");
566 * pch_gbe_irq_disable - Mask off interrupt generation on the NIC
567 * @adapter: Board private structure
569 static void pch_gbe_irq_disable(struct pch_gbe_adapter
*adapter
)
571 struct pch_gbe_hw
*hw
= &adapter
->hw
;
573 atomic_inc(&adapter
->irq_sem
);
574 iowrite32(0, &hw
->reg
->INT_EN
);
575 ioread32(&hw
->reg
->INT_ST
);
576 synchronize_irq(adapter
->pdev
->irq
);
578 pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw
->reg
->INT_EN
));
582 * pch_gbe_irq_enable - Enable default interrupt generation settings
583 * @adapter: Board private structure
585 static void pch_gbe_irq_enable(struct pch_gbe_adapter
*adapter
)
587 struct pch_gbe_hw
*hw
= &adapter
->hw
;
589 if (likely(atomic_dec_and_test(&adapter
->irq_sem
)))
590 iowrite32(PCH_GBE_INT_ENABLE_MASK
, &hw
->reg
->INT_EN
);
591 ioread32(&hw
->reg
->INT_ST
);
592 pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw
->reg
->INT_EN
));
598 * pch_gbe_setup_tctl - configure the Transmit control registers
599 * @adapter: Board private structure
601 static void pch_gbe_setup_tctl(struct pch_gbe_adapter
*adapter
)
603 struct pch_gbe_hw
*hw
= &adapter
->hw
;
606 tx_mode
= PCH_GBE_TM_LONG_PKT
|
607 PCH_GBE_TM_ST_AND_FD
|
608 PCH_GBE_TM_SHORT_PKT
|
609 PCH_GBE_TM_TH_TX_STRT_8
|
610 PCH_GBE_TM_TH_ALM_EMP_4
| PCH_GBE_TM_TH_ALM_FULL_8
;
612 iowrite32(tx_mode
, &hw
->reg
->TX_MODE
);
614 tcpip
= ioread32(&hw
->reg
->TCPIP_ACC
);
615 tcpip
|= PCH_GBE_TX_TCPIPACC_EN
;
616 iowrite32(tcpip
, &hw
->reg
->TCPIP_ACC
);
621 * pch_gbe_configure_tx - Configure Transmit Unit after Reset
622 * @adapter: Board private structure
624 static void pch_gbe_configure_tx(struct pch_gbe_adapter
*adapter
)
626 struct pch_gbe_hw
*hw
= &adapter
->hw
;
627 u32 tdba
, tdlen
, dctrl
;
629 pr_debug("dma addr = 0x%08llx size = 0x%08x\n",
630 (unsigned long long)adapter
->tx_ring
->dma
,
631 adapter
->tx_ring
->size
);
633 /* Setup the HW Tx Head and Tail descriptor pointers */
634 tdba
= adapter
->tx_ring
->dma
;
635 tdlen
= adapter
->tx_ring
->size
- 0x10;
636 iowrite32(tdba
, &hw
->reg
->TX_DSC_BASE
);
637 iowrite32(tdlen
, &hw
->reg
->TX_DSC_SIZE
);
638 iowrite32(tdba
, &hw
->reg
->TX_DSC_SW_P
);
640 /* Enables Transmission DMA */
641 dctrl
= ioread32(&hw
->reg
->DMA_CTRL
);
642 dctrl
|= PCH_GBE_TX_DMA_EN
;
643 iowrite32(dctrl
, &hw
->reg
->DMA_CTRL
);
647 * pch_gbe_setup_rctl - Configure the receive control registers
648 * @adapter: Board private structure
650 static void pch_gbe_setup_rctl(struct pch_gbe_adapter
*adapter
)
652 struct pch_gbe_hw
*hw
= &adapter
->hw
;
655 rx_mode
= PCH_GBE_ADD_FIL_EN
| PCH_GBE_MLT_FIL_EN
|
656 PCH_GBE_RH_ALM_EMP_4
| PCH_GBE_RH_ALM_FULL_4
| PCH_GBE_RH_RD_TRG_8
;
658 iowrite32(rx_mode
, &hw
->reg
->RX_MODE
);
660 tcpip
= ioread32(&hw
->reg
->TCPIP_ACC
);
662 if (adapter
->rx_csum
) {
663 tcpip
&= ~PCH_GBE_RX_TCPIPACC_OFF
;
664 tcpip
|= PCH_GBE_RX_TCPIPACC_EN
;
666 tcpip
|= PCH_GBE_RX_TCPIPACC_OFF
;
667 tcpip
&= ~PCH_GBE_RX_TCPIPACC_EN
;
669 iowrite32(tcpip
, &hw
->reg
->TCPIP_ACC
);
674 * pch_gbe_configure_rx - Configure Receive Unit after Reset
675 * @adapter: Board private structure
677 static void pch_gbe_configure_rx(struct pch_gbe_adapter
*adapter
)
679 struct pch_gbe_hw
*hw
= &adapter
->hw
;
680 u32 rdba
, rdlen
, rctl
, rxdma
;
682 pr_debug("dma adr = 0x%08llx size = 0x%08x\n",
683 (unsigned long long)adapter
->rx_ring
->dma
,
684 adapter
->rx_ring
->size
);
686 pch_gbe_mac_force_mac_fc(hw
);
688 /* Disables Receive MAC */
689 rctl
= ioread32(&hw
->reg
->MAC_RX_EN
);
690 iowrite32((rctl
& ~PCH_GBE_MRE_MAC_RX_EN
), &hw
->reg
->MAC_RX_EN
);
692 /* Disables Receive DMA */
693 rxdma
= ioread32(&hw
->reg
->DMA_CTRL
);
694 rxdma
&= ~PCH_GBE_RX_DMA_EN
;
695 iowrite32(rxdma
, &hw
->reg
->DMA_CTRL
);
697 pr_debug("MAC_RX_EN reg = 0x%08x DMA_CTRL reg = 0x%08x\n",
698 ioread32(&hw
->reg
->MAC_RX_EN
),
699 ioread32(&hw
->reg
->DMA_CTRL
));
701 /* Setup the HW Rx Head and Tail Descriptor Pointers and
702 * the Base and Length of the Rx Descriptor Ring */
703 rdba
= adapter
->rx_ring
->dma
;
704 rdlen
= adapter
->rx_ring
->size
- 0x10;
705 iowrite32(rdba
, &hw
->reg
->RX_DSC_BASE
);
706 iowrite32(rdlen
, &hw
->reg
->RX_DSC_SIZE
);
707 iowrite32((rdba
+ rdlen
), &hw
->reg
->RX_DSC_SW_P
);
709 /* Enables Receive DMA */
710 rxdma
= ioread32(&hw
->reg
->DMA_CTRL
);
711 rxdma
|= PCH_GBE_RX_DMA_EN
;
712 iowrite32(rxdma
, &hw
->reg
->DMA_CTRL
);
713 /* Enables Receive */
714 iowrite32(PCH_GBE_MRE_MAC_RX_EN
, &hw
->reg
->MAC_RX_EN
);
718 * pch_gbe_unmap_and_free_tx_resource - Unmap and free tx socket buffer
719 * @adapter: Board private structure
720 * @buffer_info: Buffer information structure
722 static void pch_gbe_unmap_and_free_tx_resource(
723 struct pch_gbe_adapter
*adapter
, struct pch_gbe_buffer
*buffer_info
)
725 if (buffer_info
->mapped
) {
726 dma_unmap_single(&adapter
->pdev
->dev
, buffer_info
->dma
,
727 buffer_info
->length
, DMA_TO_DEVICE
);
728 buffer_info
->mapped
= false;
730 if (buffer_info
->skb
) {
731 dev_kfree_skb_any(buffer_info
->skb
);
732 buffer_info
->skb
= NULL
;
737 * pch_gbe_unmap_and_free_rx_resource - Unmap and free rx socket buffer
738 * @adapter: Board private structure
739 * @buffer_info: Buffer information structure
741 static void pch_gbe_unmap_and_free_rx_resource(
742 struct pch_gbe_adapter
*adapter
,
743 struct pch_gbe_buffer
*buffer_info
)
745 if (buffer_info
->mapped
) {
746 dma_unmap_single(&adapter
->pdev
->dev
, buffer_info
->dma
,
747 buffer_info
->length
, DMA_FROM_DEVICE
);
748 buffer_info
->mapped
= false;
750 if (buffer_info
->skb
) {
751 dev_kfree_skb_any(buffer_info
->skb
);
752 buffer_info
->skb
= NULL
;
757 * pch_gbe_clean_tx_ring - Free Tx Buffers
758 * @adapter: Board private structure
759 * @tx_ring: Ring to be cleaned
761 static void pch_gbe_clean_tx_ring(struct pch_gbe_adapter
*adapter
,
762 struct pch_gbe_tx_ring
*tx_ring
)
764 struct pch_gbe_hw
*hw
= &adapter
->hw
;
765 struct pch_gbe_buffer
*buffer_info
;
769 /* Free all the Tx ring sk_buffs */
770 for (i
= 0; i
< tx_ring
->count
; i
++) {
771 buffer_info
= &tx_ring
->buffer_info
[i
];
772 pch_gbe_unmap_and_free_tx_resource(adapter
, buffer_info
);
774 pr_debug("call pch_gbe_unmap_and_free_tx_resource() %d count\n", i
);
776 size
= (unsigned long)sizeof(struct pch_gbe_buffer
) * tx_ring
->count
;
777 memset(tx_ring
->buffer_info
, 0, size
);
779 /* Zero out the descriptor ring */
780 memset(tx_ring
->desc
, 0, tx_ring
->size
);
781 tx_ring
->next_to_use
= 0;
782 tx_ring
->next_to_clean
= 0;
783 iowrite32(tx_ring
->dma
, &hw
->reg
->TX_DSC_HW_P
);
784 iowrite32((tx_ring
->size
- 0x10), &hw
->reg
->TX_DSC_SIZE
);
788 * pch_gbe_clean_rx_ring - Free Rx Buffers
789 * @adapter: Board private structure
790 * @rx_ring: Ring to free buffers from
793 pch_gbe_clean_rx_ring(struct pch_gbe_adapter
*adapter
,
794 struct pch_gbe_rx_ring
*rx_ring
)
796 struct pch_gbe_hw
*hw
= &adapter
->hw
;
797 struct pch_gbe_buffer
*buffer_info
;
801 /* Free all the Rx ring sk_buffs */
802 for (i
= 0; i
< rx_ring
->count
; i
++) {
803 buffer_info
= &rx_ring
->buffer_info
[i
];
804 pch_gbe_unmap_and_free_rx_resource(adapter
, buffer_info
);
806 pr_debug("call pch_gbe_unmap_and_free_rx_resource() %d count\n", i
);
807 size
= (unsigned long)sizeof(struct pch_gbe_buffer
) * rx_ring
->count
;
808 memset(rx_ring
->buffer_info
, 0, size
);
810 /* Zero out the descriptor ring */
811 memset(rx_ring
->desc
, 0, rx_ring
->size
);
812 rx_ring
->next_to_clean
= 0;
813 rx_ring
->next_to_use
= 0;
814 iowrite32(rx_ring
->dma
, &hw
->reg
->RX_DSC_HW_P
);
815 iowrite32((rx_ring
->size
- 0x10), &hw
->reg
->RX_DSC_SIZE
);
818 static void pch_gbe_set_rgmii_ctrl(struct pch_gbe_adapter
*adapter
, u16 speed
,
821 struct pch_gbe_hw
*hw
= &adapter
->hw
;
822 unsigned long rgmii
= 0;
824 /* Set the RGMII control. */
825 #ifdef PCH_GBE_MAC_IFOP_RGMII
828 rgmii
= (PCH_GBE_RGMII_RATE_2_5M
|
829 PCH_GBE_MAC_RGMII_CTRL_SETTING
);
832 rgmii
= (PCH_GBE_RGMII_RATE_25M
|
833 PCH_GBE_MAC_RGMII_CTRL_SETTING
);
836 rgmii
= (PCH_GBE_RGMII_RATE_125M
|
837 PCH_GBE_MAC_RGMII_CTRL_SETTING
);
840 iowrite32(rgmii
, &hw
->reg
->RGMII_CTRL
);
843 iowrite32(rgmii
, &hw
->reg
->RGMII_CTRL
);
846 static void pch_gbe_set_mode(struct pch_gbe_adapter
*adapter
, u16 speed
,
849 struct net_device
*netdev
= adapter
->netdev
;
850 struct pch_gbe_hw
*hw
= &adapter
->hw
;
851 unsigned long mode
= 0;
853 /* Set the communication mode */
856 mode
= PCH_GBE_MODE_MII_ETHER
;
857 netdev
->tx_queue_len
= 10;
860 mode
= PCH_GBE_MODE_MII_ETHER
;
861 netdev
->tx_queue_len
= 100;
864 mode
= PCH_GBE_MODE_GMII_ETHER
;
867 if (duplex
== DUPLEX_FULL
)
868 mode
|= PCH_GBE_MODE_FULL_DUPLEX
;
870 mode
|= PCH_GBE_MODE_HALF_DUPLEX
;
871 iowrite32(mode
, &hw
->reg
->MODE
);
875 * pch_gbe_watchdog - Watchdog process
876 * @data: Board private structure
878 static void pch_gbe_watchdog(unsigned long data
)
880 struct pch_gbe_adapter
*adapter
= (struct pch_gbe_adapter
*)data
;
881 struct net_device
*netdev
= adapter
->netdev
;
882 struct pch_gbe_hw
*hw
= &adapter
->hw
;
883 struct ethtool_cmd cmd
;
885 pr_debug("right now = %ld\n", jiffies
);
887 pch_gbe_update_stats(adapter
);
888 if ((mii_link_ok(&adapter
->mii
)) && (!netif_carrier_ok(netdev
))) {
889 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
890 /* mii library handles link maintenance tasks */
891 if (mii_ethtool_gset(&adapter
->mii
, &cmd
)) {
892 pr_err("ethtool get setting Error\n");
893 mod_timer(&adapter
->watchdog_timer
,
894 round_jiffies(jiffies
+
895 PCH_GBE_WATCHDOG_PERIOD
));
898 hw
->mac
.link_speed
= cmd
.speed
;
899 hw
->mac
.link_duplex
= cmd
.duplex
;
900 /* Set the RGMII control. */
901 pch_gbe_set_rgmii_ctrl(adapter
, hw
->mac
.link_speed
,
902 hw
->mac
.link_duplex
);
903 /* Set the communication mode */
904 pch_gbe_set_mode(adapter
, hw
->mac
.link_speed
,
905 hw
->mac
.link_duplex
);
907 "Link is Up %d Mbps %s-Duplex\n",
909 cmd
.duplex
== DUPLEX_FULL
? "Full" : "Half");
910 netif_carrier_on(netdev
);
911 netif_wake_queue(netdev
);
912 } else if ((!mii_link_ok(&adapter
->mii
)) &&
913 (netif_carrier_ok(netdev
))) {
914 netdev_dbg(netdev
, "NIC Link is Down\n");
915 hw
->mac
.link_speed
= SPEED_10
;
916 hw
->mac
.link_duplex
= DUPLEX_HALF
;
917 netif_carrier_off(netdev
);
918 netif_stop_queue(netdev
);
920 mod_timer(&adapter
->watchdog_timer
,
921 round_jiffies(jiffies
+ PCH_GBE_WATCHDOG_PERIOD
));
925 * pch_gbe_tx_queue - Carry out queuing of the transmission data
926 * @adapter: Board private structure
927 * @tx_ring: Tx descriptor ring structure
928 * @skb: Sockt buffer structure
930 static void pch_gbe_tx_queue(struct pch_gbe_adapter
*adapter
,
931 struct pch_gbe_tx_ring
*tx_ring
,
934 struct pch_gbe_hw
*hw
= &adapter
->hw
;
935 struct pch_gbe_tx_desc
*tx_desc
;
936 struct pch_gbe_buffer
*buffer_info
;
937 struct sk_buff
*tmp_skb
;
938 unsigned int frame_ctrl
;
939 unsigned int ring_num
;
942 /*-- Set frame control --*/
944 if (unlikely(skb
->len
< PCH_GBE_SHORT_PKT
))
945 frame_ctrl
|= PCH_GBE_TXD_CTRL_APAD
;
946 if (unlikely(!adapter
->tx_csum
))
947 frame_ctrl
|= PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF
;
949 /* Performs checksum processing */
951 * It is because the hardware accelerator does not support a checksum,
952 * when the received data size is less than 64 bytes.
954 if ((skb
->len
< PCH_GBE_SHORT_PKT
) && (adapter
->tx_csum
)) {
955 frame_ctrl
|= PCH_GBE_TXD_CTRL_APAD
|
956 PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF
;
957 if (skb
->protocol
== htons(ETH_P_IP
)) {
958 struct iphdr
*iph
= ip_hdr(skb
);
961 iph
->check
= ip_fast_csum((u8
*) iph
, iph
->ihl
);
962 offset
= skb_transport_offset(skb
);
963 if (iph
->protocol
== IPPROTO_TCP
) {
965 tcp_hdr(skb
)->check
= 0;
966 skb
->csum
= skb_checksum(skb
, offset
,
967 skb
->len
- offset
, 0);
968 tcp_hdr(skb
)->check
=
969 csum_tcpudp_magic(iph
->saddr
,
974 } else if (iph
->protocol
== IPPROTO_UDP
) {
976 udp_hdr(skb
)->check
= 0;
978 skb_checksum(skb
, offset
,
979 skb
->len
- offset
, 0);
980 udp_hdr(skb
)->check
=
981 csum_tcpudp_magic(iph
->saddr
,
989 spin_lock_irqsave(&tx_ring
->tx_lock
, flags
);
990 ring_num
= tx_ring
->next_to_use
;
991 if (unlikely((ring_num
+ 1) == tx_ring
->count
))
992 tx_ring
->next_to_use
= 0;
994 tx_ring
->next_to_use
= ring_num
+ 1;
996 spin_unlock_irqrestore(&tx_ring
->tx_lock
, flags
);
997 buffer_info
= &tx_ring
->buffer_info
[ring_num
];
998 tmp_skb
= buffer_info
->skb
;
1000 /* [Header:14][payload] ---> [Header:14][paddong:2][payload] */
1001 memcpy(tmp_skb
->data
, skb
->data
, ETH_HLEN
);
1002 tmp_skb
->data
[ETH_HLEN
] = 0x00;
1003 tmp_skb
->data
[ETH_HLEN
+ 1] = 0x00;
1004 tmp_skb
->len
= skb
->len
;
1005 memcpy(&tmp_skb
->data
[ETH_HLEN
+ 2], &skb
->data
[ETH_HLEN
],
1006 (skb
->len
- ETH_HLEN
));
1007 /*-- Set Buffer infomation --*/
1008 buffer_info
->length
= tmp_skb
->len
;
1009 buffer_info
->dma
= dma_map_single(&adapter
->pdev
->dev
, tmp_skb
->data
,
1010 buffer_info
->length
,
1012 if (dma_mapping_error(&adapter
->pdev
->dev
, buffer_info
->dma
)) {
1013 pr_err("TX DMA map failed\n");
1014 buffer_info
->dma
= 0;
1015 buffer_info
->time_stamp
= 0;
1016 tx_ring
->next_to_use
= ring_num
;
1019 buffer_info
->mapped
= true;
1020 buffer_info
->time_stamp
= jiffies
;
1022 /*-- Set Tx descriptor --*/
1023 tx_desc
= PCH_GBE_TX_DESC(*tx_ring
, ring_num
);
1024 tx_desc
->buffer_addr
= (buffer_info
->dma
);
1025 tx_desc
->length
= (tmp_skb
->len
);
1026 tx_desc
->tx_words_eob
= ((tmp_skb
->len
+ 3));
1027 tx_desc
->tx_frame_ctrl
= (frame_ctrl
);
1028 tx_desc
->gbec_status
= (DSC_INIT16
);
1030 if (unlikely(++ring_num
== tx_ring
->count
))
1033 /* Update software pointer of TX descriptor */
1034 iowrite32(tx_ring
->dma
+
1035 (int)sizeof(struct pch_gbe_tx_desc
) * ring_num
,
1036 &hw
->reg
->TX_DSC_SW_P
);
1037 dev_kfree_skb_any(skb
);
1041 * pch_gbe_update_stats - Update the board statistics counters
1042 * @adapter: Board private structure
1044 void pch_gbe_update_stats(struct pch_gbe_adapter
*adapter
)
1046 struct net_device
*netdev
= adapter
->netdev
;
1047 struct pci_dev
*pdev
= adapter
->pdev
;
1048 struct pch_gbe_hw_stats
*stats
= &adapter
->stats
;
1049 unsigned long flags
;
1052 * Prevent stats update while adapter is being reset, or if the pci
1053 * connection is down.
1055 if ((pdev
->error_state
) && (pdev
->error_state
!= pci_channel_io_normal
))
1058 spin_lock_irqsave(&adapter
->stats_lock
, flags
);
1060 /* Update device status "adapter->stats" */
1061 stats
->rx_errors
= stats
->rx_crc_errors
+ stats
->rx_frame_errors
;
1062 stats
->tx_errors
= stats
->tx_length_errors
+
1063 stats
->tx_aborted_errors
+
1064 stats
->tx_carrier_errors
+ stats
->tx_timeout_count
;
1066 /* Update network device status "adapter->net_stats" */
1067 netdev
->stats
.rx_packets
= stats
->rx_packets
;
1068 netdev
->stats
.rx_bytes
= stats
->rx_bytes
;
1069 netdev
->stats
.rx_dropped
= stats
->rx_dropped
;
1070 netdev
->stats
.tx_packets
= stats
->tx_packets
;
1071 netdev
->stats
.tx_bytes
= stats
->tx_bytes
;
1072 netdev
->stats
.tx_dropped
= stats
->tx_dropped
;
1073 /* Fill out the OS statistics structure */
1074 netdev
->stats
.multicast
= stats
->multicast
;
1075 netdev
->stats
.collisions
= stats
->collisions
;
1077 netdev
->stats
.rx_errors
= stats
->rx_errors
;
1078 netdev
->stats
.rx_crc_errors
= stats
->rx_crc_errors
;
1079 netdev
->stats
.rx_frame_errors
= stats
->rx_frame_errors
;
1081 netdev
->stats
.tx_errors
= stats
->tx_errors
;
1082 netdev
->stats
.tx_aborted_errors
= stats
->tx_aborted_errors
;
1083 netdev
->stats
.tx_carrier_errors
= stats
->tx_carrier_errors
;
1085 spin_unlock_irqrestore(&adapter
->stats_lock
, flags
);
1089 * pch_gbe_intr - Interrupt Handler
1090 * @irq: Interrupt number
1091 * @data: Pointer to a network interface device structure
1093 * - IRQ_HANDLED: Our interrupt
1094 * - IRQ_NONE: Not our interrupt
1096 static irqreturn_t
pch_gbe_intr(int irq
, void *data
)
1098 struct net_device
*netdev
= data
;
1099 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
1100 struct pch_gbe_hw
*hw
= &adapter
->hw
;
1104 /* Check request status */
1105 int_st
= ioread32(&hw
->reg
->INT_ST
);
1106 int_st
= int_st
& ioread32(&hw
->reg
->INT_EN
);
1107 /* When request status is no interruption factor */
1108 if (unlikely(!int_st
))
1109 return IRQ_NONE
; /* Not our interrupt. End processing. */
1110 pr_debug("%s occur int_st = 0x%08x\n", __func__
, int_st
);
1111 if (int_st
& PCH_GBE_INT_RX_FRAME_ERR
)
1112 adapter
->stats
.intr_rx_frame_err_count
++;
1113 if (int_st
& PCH_GBE_INT_RX_FIFO_ERR
)
1114 adapter
->stats
.intr_rx_fifo_err_count
++;
1115 if (int_st
& PCH_GBE_INT_RX_DMA_ERR
)
1116 adapter
->stats
.intr_rx_dma_err_count
++;
1117 if (int_st
& PCH_GBE_INT_TX_FIFO_ERR
)
1118 adapter
->stats
.intr_tx_fifo_err_count
++;
1119 if (int_st
& PCH_GBE_INT_TX_DMA_ERR
)
1120 adapter
->stats
.intr_tx_dma_err_count
++;
1121 if (int_st
& PCH_GBE_INT_TCPIP_ERR
)
1122 adapter
->stats
.intr_tcpip_err_count
++;
1123 /* When Rx descriptor is empty */
1124 if ((int_st
& PCH_GBE_INT_RX_DSC_EMP
)) {
1125 adapter
->stats
.intr_rx_dsc_empty_count
++;
1126 pr_err("Rx descriptor is empty\n");
1127 int_en
= ioread32(&hw
->reg
->INT_EN
);
1128 iowrite32((int_en
& ~PCH_GBE_INT_RX_DSC_EMP
), &hw
->reg
->INT_EN
);
1129 if (hw
->mac
.tx_fc_enable
) {
1130 /* Set Pause packet */
1131 pch_gbe_mac_set_pause_packet(hw
);
1133 if ((int_en
& (PCH_GBE_INT_RX_DMA_CMPLT
| PCH_GBE_INT_TX_CMPLT
))
1139 /* When request status is Receive interruption */
1140 if ((int_st
& (PCH_GBE_INT_RX_DMA_CMPLT
| PCH_GBE_INT_TX_CMPLT
))) {
1141 if (likely(napi_schedule_prep(&adapter
->napi
))) {
1142 /* Enable only Rx Descriptor empty */
1143 atomic_inc(&adapter
->irq_sem
);
1144 int_en
= ioread32(&hw
->reg
->INT_EN
);
1146 ~(PCH_GBE_INT_RX_DMA_CMPLT
| PCH_GBE_INT_TX_CMPLT
);
1147 iowrite32(int_en
, &hw
->reg
->INT_EN
);
1148 /* Start polling for NAPI */
1149 __napi_schedule(&adapter
->napi
);
1152 pr_debug("return = 0x%08x INT_EN reg = 0x%08x\n",
1153 IRQ_HANDLED
, ioread32(&hw
->reg
->INT_EN
));
1158 * pch_gbe_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1159 * @adapter: Board private structure
1160 * @rx_ring: Rx descriptor ring
1161 * @cleaned_count: Cleaned count
1164 pch_gbe_alloc_rx_buffers(struct pch_gbe_adapter
*adapter
,
1165 struct pch_gbe_rx_ring
*rx_ring
, int cleaned_count
)
1167 struct net_device
*netdev
= adapter
->netdev
;
1168 struct pci_dev
*pdev
= adapter
->pdev
;
1169 struct pch_gbe_hw
*hw
= &adapter
->hw
;
1170 struct pch_gbe_rx_desc
*rx_desc
;
1171 struct pch_gbe_buffer
*buffer_info
;
1172 struct sk_buff
*skb
;
1176 bufsz
= adapter
->rx_buffer_len
+ PCH_GBE_DMA_ALIGN
;
1177 i
= rx_ring
->next_to_use
;
1179 while ((cleaned_count
--)) {
1180 buffer_info
= &rx_ring
->buffer_info
[i
];
1181 skb
= buffer_info
->skb
;
1185 skb
= netdev_alloc_skb(netdev
, bufsz
);
1186 if (unlikely(!skb
)) {
1187 /* Better luck next round */
1188 adapter
->stats
.rx_alloc_buff_failed
++;
1192 skb_reserve(skb
, PCH_GBE_DMA_ALIGN
);
1194 buffer_info
->skb
= skb
;
1195 buffer_info
->length
= adapter
->rx_buffer_len
;
1197 buffer_info
->dma
= dma_map_single(&pdev
->dev
,
1199 buffer_info
->length
,
1201 if (dma_mapping_error(&adapter
->pdev
->dev
, buffer_info
->dma
)) {
1203 buffer_info
->skb
= NULL
;
1204 buffer_info
->dma
= 0;
1205 adapter
->stats
.rx_alloc_buff_failed
++;
1206 break; /* while !buffer_info->skb */
1208 buffer_info
->mapped
= true;
1209 rx_desc
= PCH_GBE_RX_DESC(*rx_ring
, i
);
1210 rx_desc
->buffer_addr
= (buffer_info
->dma
);
1211 rx_desc
->gbec_status
= DSC_INIT16
;
1213 pr_debug("i = %d buffer_info->dma = 0x08%llx buffer_info->length = 0x%x\n",
1214 i
, (unsigned long long)buffer_info
->dma
,
1215 buffer_info
->length
);
1217 if (unlikely(++i
== rx_ring
->count
))
1220 if (likely(rx_ring
->next_to_use
!= i
)) {
1221 rx_ring
->next_to_use
= i
;
1222 if (unlikely(i
-- == 0))
1223 i
= (rx_ring
->count
- 1);
1224 iowrite32(rx_ring
->dma
+
1225 (int)sizeof(struct pch_gbe_rx_desc
) * i
,
1226 &hw
->reg
->RX_DSC_SW_P
);
1232 * pch_gbe_alloc_tx_buffers - Allocate transmit buffers
1233 * @adapter: Board private structure
1234 * @tx_ring: Tx descriptor ring
1236 static void pch_gbe_alloc_tx_buffers(struct pch_gbe_adapter
*adapter
,
1237 struct pch_gbe_tx_ring
*tx_ring
)
1239 struct pch_gbe_buffer
*buffer_info
;
1240 struct sk_buff
*skb
;
1243 struct pch_gbe_tx_desc
*tx_desc
;
1246 adapter
->hw
.mac
.max_frame_size
+ PCH_GBE_DMA_ALIGN
+ NET_IP_ALIGN
;
1248 for (i
= 0; i
< tx_ring
->count
; i
++) {
1249 buffer_info
= &tx_ring
->buffer_info
[i
];
1250 skb
= netdev_alloc_skb(adapter
->netdev
, bufsz
);
1251 skb_reserve(skb
, PCH_GBE_DMA_ALIGN
);
1252 buffer_info
->skb
= skb
;
1253 tx_desc
= PCH_GBE_TX_DESC(*tx_ring
, i
);
1254 tx_desc
->gbec_status
= (DSC_INIT16
);
1260 * pch_gbe_clean_tx - Reclaim resources after transmit completes
1261 * @adapter: Board private structure
1262 * @tx_ring: Tx descriptor ring
1264 * true: Cleaned the descriptor
1265 * false: Not cleaned the descriptor
1268 pch_gbe_clean_tx(struct pch_gbe_adapter
*adapter
,
1269 struct pch_gbe_tx_ring
*tx_ring
)
1271 struct pch_gbe_tx_desc
*tx_desc
;
1272 struct pch_gbe_buffer
*buffer_info
;
1273 struct sk_buff
*skb
;
1275 unsigned int cleaned_count
= 0;
1276 bool cleaned
= false;
1278 pr_debug("next_to_clean : %d\n", tx_ring
->next_to_clean
);
1280 i
= tx_ring
->next_to_clean
;
1281 tx_desc
= PCH_GBE_TX_DESC(*tx_ring
, i
);
1282 pr_debug("gbec_status:0x%04x dma_status:0x%04x\n",
1283 tx_desc
->gbec_status
, tx_desc
->dma_status
);
1285 while ((tx_desc
->gbec_status
& DSC_INIT16
) == 0x0000) {
1286 pr_debug("gbec_status:0x%04x\n", tx_desc
->gbec_status
);
1288 buffer_info
= &tx_ring
->buffer_info
[i
];
1289 skb
= buffer_info
->skb
;
1291 if ((tx_desc
->gbec_status
& PCH_GBE_TXD_GMAC_STAT_ABT
)) {
1292 adapter
->stats
.tx_aborted_errors
++;
1293 pr_err("Transfer Abort Error\n");
1294 } else if ((tx_desc
->gbec_status
& PCH_GBE_TXD_GMAC_STAT_CRSER
)
1296 adapter
->stats
.tx_carrier_errors
++;
1297 pr_err("Transfer Carrier Sense Error\n");
1298 } else if ((tx_desc
->gbec_status
& PCH_GBE_TXD_GMAC_STAT_EXCOL
)
1300 adapter
->stats
.tx_aborted_errors
++;
1301 pr_err("Transfer Collision Abort Error\n");
1302 } else if ((tx_desc
->gbec_status
&
1303 (PCH_GBE_TXD_GMAC_STAT_SNGCOL
|
1304 PCH_GBE_TXD_GMAC_STAT_MLTCOL
))) {
1305 adapter
->stats
.collisions
++;
1306 adapter
->stats
.tx_packets
++;
1307 adapter
->stats
.tx_bytes
+= skb
->len
;
1308 pr_debug("Transfer Collision\n");
1309 } else if ((tx_desc
->gbec_status
& PCH_GBE_TXD_GMAC_STAT_CMPLT
)
1311 adapter
->stats
.tx_packets
++;
1312 adapter
->stats
.tx_bytes
+= skb
->len
;
1314 if (buffer_info
->mapped
) {
1315 pr_debug("unmap buffer_info->dma : %d\n", i
);
1316 dma_unmap_single(&adapter
->pdev
->dev
, buffer_info
->dma
,
1317 buffer_info
->length
, DMA_TO_DEVICE
);
1318 buffer_info
->mapped
= false;
1320 if (buffer_info
->skb
) {
1321 pr_debug("trim buffer_info->skb : %d\n", i
);
1322 skb_trim(buffer_info
->skb
, 0);
1324 tx_desc
->gbec_status
= DSC_INIT16
;
1325 if (unlikely(++i
== tx_ring
->count
))
1327 tx_desc
= PCH_GBE_TX_DESC(*tx_ring
, i
);
1329 /* weight of a sort for tx, to avoid endless transmit cleanup */
1330 if (cleaned_count
++ == PCH_GBE_TX_WEIGHT
)
1333 pr_debug("called pch_gbe_unmap_and_free_tx_resource() %d count\n",
1335 /* Recover from running out of Tx resources in xmit_frame */
1336 if (unlikely(cleaned
&& (netif_queue_stopped(adapter
->netdev
)))) {
1337 netif_wake_queue(adapter
->netdev
);
1338 adapter
->stats
.tx_restart_count
++;
1339 pr_debug("Tx wake queue\n");
1341 spin_lock(&adapter
->tx_queue_lock
);
1342 tx_ring
->next_to_clean
= i
;
1343 spin_unlock(&adapter
->tx_queue_lock
);
1344 pr_debug("next_to_clean : %d\n", tx_ring
->next_to_clean
);
1349 * pch_gbe_clean_rx - Send received data up the network stack; legacy
1350 * @adapter: Board private structure
1351 * @rx_ring: Rx descriptor ring
1352 * @work_done: Completed count
1353 * @work_to_do: Request count
1355 * true: Cleaned the descriptor
1356 * false: Not cleaned the descriptor
1359 pch_gbe_clean_rx(struct pch_gbe_adapter
*adapter
,
1360 struct pch_gbe_rx_ring
*rx_ring
,
1361 int *work_done
, int work_to_do
)
1363 struct net_device
*netdev
= adapter
->netdev
;
1364 struct pci_dev
*pdev
= adapter
->pdev
;
1365 struct pch_gbe_buffer
*buffer_info
;
1366 struct pch_gbe_rx_desc
*rx_desc
;
1368 unsigned char tmp_packet
[ETH_HLEN
];
1370 unsigned int cleaned_count
= 0;
1371 bool cleaned
= false;
1372 struct sk_buff
*skb
;
1376 u8 skb_copy_flag
= 0;
1377 u8 skb_padding_flag
= 0;
1379 i
= rx_ring
->next_to_clean
;
1381 while (*work_done
< work_to_do
) {
1382 /* Check Rx descriptor status */
1383 rx_desc
= PCH_GBE_RX_DESC(*rx_ring
, i
);
1384 if (rx_desc
->gbec_status
== DSC_INIT16
)
1389 dma_status
= rx_desc
->dma_status
;
1390 gbec_status
= rx_desc
->gbec_status
;
1391 tcp_ip_status
= rx_desc
->tcp_ip_status
;
1392 rx_desc
->gbec_status
= DSC_INIT16
;
1393 buffer_info
= &rx_ring
->buffer_info
[i
];
1394 skb
= buffer_info
->skb
;
1397 dma_unmap_single(&pdev
->dev
, buffer_info
->dma
,
1398 buffer_info
->length
, DMA_FROM_DEVICE
);
1399 buffer_info
->mapped
= false;
1400 /* Prefetch the packet */
1401 prefetch(skb
->data
);
1403 pr_debug("RxDecNo = 0x%04x Status[DMA:0x%02x GBE:0x%04x "
1404 "TCP:0x%08x] BufInf = 0x%p\n",
1405 i
, dma_status
, gbec_status
, tcp_ip_status
,
1408 if (unlikely(gbec_status
& PCH_GBE_RXD_GMAC_STAT_NOTOCTAL
)) {
1409 adapter
->stats
.rx_frame_errors
++;
1410 pr_err("Receive Not Octal Error\n");
1411 } else if (unlikely(gbec_status
&
1412 PCH_GBE_RXD_GMAC_STAT_NBLERR
)) {
1413 adapter
->stats
.rx_frame_errors
++;
1414 pr_err("Receive Nibble Error\n");
1415 } else if (unlikely(gbec_status
&
1416 PCH_GBE_RXD_GMAC_STAT_CRCERR
)) {
1417 adapter
->stats
.rx_crc_errors
++;
1418 pr_err("Receive CRC Error\n");
1420 /* get receive length */
1421 /* length convert[-3], padding[-2] */
1422 length
= (rx_desc
->rx_words_eob
) - 3 - 2;
1424 /* Decide the data conversion method */
1425 if (!adapter
->rx_csum
) {
1426 /* [Header:14][payload] */
1427 skb_padding_flag
= 0;
1430 /* [Header:14][padding:2][payload] */
1431 skb_padding_flag
= 1;
1432 if (length
< copybreak
)
1438 /* Data conversion */
1439 if (skb_copy_flag
) { /* recycle skb */
1440 struct sk_buff
*new_skb
;
1442 netdev_alloc_skb(netdev
,
1443 length
+ NET_IP_ALIGN
);
1445 if (!skb_padding_flag
) {
1446 skb_reserve(new_skb
,
1449 memcpy(new_skb
->data
, skb
->data
,
1452 * in buffer_info as good */
1454 } else if (!skb_padding_flag
) {
1456 pr_err("New skb allocation Error\n");
1460 buffer_info
->skb
= NULL
;
1462 if (skb_padding_flag
) {
1463 memcpy(&tmp_packet
[0], &skb
->data
[0], ETH_HLEN
);
1464 memcpy(&skb
->data
[NET_IP_ALIGN
], &tmp_packet
[0],
1466 skb_reserve(skb
, NET_IP_ALIGN
);
1470 /* update status of driver */
1471 adapter
->stats
.rx_bytes
+= length
;
1472 adapter
->stats
.rx_packets
++;
1473 if ((gbec_status
& PCH_GBE_RXD_GMAC_STAT_MARMLT
))
1474 adapter
->stats
.multicast
++;
1475 /* Write meta date of skb */
1476 skb_put(skb
, length
);
1477 skb
->protocol
= eth_type_trans(skb
, netdev
);
1478 if ((tcp_ip_status
& PCH_GBE_RXD_ACC_STAT_TCPIPOK
) ==
1479 PCH_GBE_RXD_ACC_STAT_TCPIPOK
) {
1480 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1482 skb
->ip_summed
= CHECKSUM_NONE
;
1484 napi_gro_receive(&adapter
->napi
, skb
);
1486 pr_debug("Receive skb->ip_summed: %d length: %d\n",
1487 skb
->ip_summed
, length
);
1490 /* return some buffers to hardware, one at a time is too slow */
1491 if (unlikely(cleaned_count
>= PCH_GBE_RX_BUFFER_WRITE
)) {
1492 pch_gbe_alloc_rx_buffers(adapter
, rx_ring
,
1496 if (++i
== rx_ring
->count
)
1499 rx_ring
->next_to_clean
= i
;
1501 pch_gbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
1506 * pch_gbe_setup_tx_resources - Allocate Tx resources (Descriptors)
1507 * @adapter: Board private structure
1508 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
1511 * Negative value: Failed
1513 int pch_gbe_setup_tx_resources(struct pch_gbe_adapter
*adapter
,
1514 struct pch_gbe_tx_ring
*tx_ring
)
1516 struct pci_dev
*pdev
= adapter
->pdev
;
1517 struct pch_gbe_tx_desc
*tx_desc
;
1521 size
= (int)sizeof(struct pch_gbe_buffer
) * tx_ring
->count
;
1522 tx_ring
->buffer_info
= vmalloc(size
);
1523 if (!tx_ring
->buffer_info
) {
1524 pr_err("Unable to allocate memory for the buffer infomation\n");
1527 memset(tx_ring
->buffer_info
, 0, size
);
1529 tx_ring
->size
= tx_ring
->count
* (int)sizeof(struct pch_gbe_tx_desc
);
1531 tx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, tx_ring
->size
,
1532 &tx_ring
->dma
, GFP_KERNEL
);
1533 if (!tx_ring
->desc
) {
1534 vfree(tx_ring
->buffer_info
);
1535 pr_err("Unable to allocate memory for the transmit descriptor ring\n");
1538 memset(tx_ring
->desc
, 0, tx_ring
->size
);
1540 tx_ring
->next_to_use
= 0;
1541 tx_ring
->next_to_clean
= 0;
1542 spin_lock_init(&tx_ring
->tx_lock
);
1544 for (desNo
= 0; desNo
< tx_ring
->count
; desNo
++) {
1545 tx_desc
= PCH_GBE_TX_DESC(*tx_ring
, desNo
);
1546 tx_desc
->gbec_status
= DSC_INIT16
;
1548 pr_debug("tx_ring->desc = 0x%p tx_ring->dma = 0x%08llx\n"
1549 "next_to_clean = 0x%08x next_to_use = 0x%08x\n",
1550 tx_ring
->desc
, (unsigned long long)tx_ring
->dma
,
1551 tx_ring
->next_to_clean
, tx_ring
->next_to_use
);
1556 * pch_gbe_setup_rx_resources - Allocate Rx resources (Descriptors)
1557 * @adapter: Board private structure
1558 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
1561 * Negative value: Failed
1563 int pch_gbe_setup_rx_resources(struct pch_gbe_adapter
*adapter
,
1564 struct pch_gbe_rx_ring
*rx_ring
)
1566 struct pci_dev
*pdev
= adapter
->pdev
;
1567 struct pch_gbe_rx_desc
*rx_desc
;
1571 size
= (int)sizeof(struct pch_gbe_buffer
) * rx_ring
->count
;
1572 rx_ring
->buffer_info
= vmalloc(size
);
1573 if (!rx_ring
->buffer_info
) {
1574 pr_err("Unable to allocate memory for the receive descriptor ring\n");
1577 memset(rx_ring
->buffer_info
, 0, size
);
1578 rx_ring
->size
= rx_ring
->count
* (int)sizeof(struct pch_gbe_rx_desc
);
1579 rx_ring
->desc
= dma_alloc_coherent(&pdev
->dev
, rx_ring
->size
,
1580 &rx_ring
->dma
, GFP_KERNEL
);
1582 if (!rx_ring
->desc
) {
1583 pr_err("Unable to allocate memory for the receive descriptor ring\n");
1584 vfree(rx_ring
->buffer_info
);
1587 memset(rx_ring
->desc
, 0, rx_ring
->size
);
1588 rx_ring
->next_to_clean
= 0;
1589 rx_ring
->next_to_use
= 0;
1590 for (desNo
= 0; desNo
< rx_ring
->count
; desNo
++) {
1591 rx_desc
= PCH_GBE_RX_DESC(*rx_ring
, desNo
);
1592 rx_desc
->gbec_status
= DSC_INIT16
;
1594 pr_debug("rx_ring->desc = 0x%p rx_ring->dma = 0x%08llx "
1595 "next_to_clean = 0x%08x next_to_use = 0x%08x\n",
1596 rx_ring
->desc
, (unsigned long long)rx_ring
->dma
,
1597 rx_ring
->next_to_clean
, rx_ring
->next_to_use
);
1602 * pch_gbe_free_tx_resources - Free Tx Resources
1603 * @adapter: Board private structure
1604 * @tx_ring: Tx descriptor ring for a specific queue
1606 void pch_gbe_free_tx_resources(struct pch_gbe_adapter
*adapter
,
1607 struct pch_gbe_tx_ring
*tx_ring
)
1609 struct pci_dev
*pdev
= adapter
->pdev
;
1611 pch_gbe_clean_tx_ring(adapter
, tx_ring
);
1612 vfree(tx_ring
->buffer_info
);
1613 tx_ring
->buffer_info
= NULL
;
1614 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
1615 tx_ring
->desc
= NULL
;
1619 * pch_gbe_free_rx_resources - Free Rx Resources
1620 * @adapter: Board private structure
1621 * @rx_ring: Ring to clean the resources from
1623 void pch_gbe_free_rx_resources(struct pch_gbe_adapter
*adapter
,
1624 struct pch_gbe_rx_ring
*rx_ring
)
1626 struct pci_dev
*pdev
= adapter
->pdev
;
1628 pch_gbe_clean_rx_ring(adapter
, rx_ring
);
1629 vfree(rx_ring
->buffer_info
);
1630 rx_ring
->buffer_info
= NULL
;
1631 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
1632 rx_ring
->desc
= NULL
;
1636 * pch_gbe_request_irq - Allocate an interrupt line
1637 * @adapter: Board private structure
1640 * Negative value: Failed
1642 static int pch_gbe_request_irq(struct pch_gbe_adapter
*adapter
)
1644 struct net_device
*netdev
= adapter
->netdev
;
1648 flags
= IRQF_SHARED
;
1649 adapter
->have_msi
= false;
1650 err
= pci_enable_msi(adapter
->pdev
);
1651 pr_debug("call pci_enable_msi\n");
1653 pr_debug("call pci_enable_msi - Error: %d\n", err
);
1656 adapter
->have_msi
= true;
1658 err
= request_irq(adapter
->pdev
->irq
, &pch_gbe_intr
,
1659 flags
, netdev
->name
, netdev
);
1661 pr_err("Unable to allocate interrupt Error: %d\n", err
);
1662 pr_debug("adapter->have_msi : %d flags : 0x%04x return : 0x%04x\n",
1663 adapter
->have_msi
, flags
, err
);
1668 static void pch_gbe_set_multi(struct net_device
*netdev
);
1670 * pch_gbe_up - Up GbE network device
1671 * @adapter: Board private structure
1674 * Negative value: Failed
1676 int pch_gbe_up(struct pch_gbe_adapter
*adapter
)
1678 struct net_device
*netdev
= adapter
->netdev
;
1679 struct pch_gbe_tx_ring
*tx_ring
= adapter
->tx_ring
;
1680 struct pch_gbe_rx_ring
*rx_ring
= adapter
->rx_ring
;
1683 /* hardware has been reset, we need to reload some things */
1684 pch_gbe_set_multi(netdev
);
1686 pch_gbe_setup_tctl(adapter
);
1687 pch_gbe_configure_tx(adapter
);
1688 pch_gbe_setup_rctl(adapter
);
1689 pch_gbe_configure_rx(adapter
);
1691 err
= pch_gbe_request_irq(adapter
);
1693 pr_err("Error: can't bring device up\n");
1696 pch_gbe_alloc_tx_buffers(adapter
, tx_ring
);
1697 pch_gbe_alloc_rx_buffers(adapter
, rx_ring
, rx_ring
->count
);
1698 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
1700 mod_timer(&adapter
->watchdog_timer
, jiffies
);
1702 napi_enable(&adapter
->napi
);
1703 pch_gbe_irq_enable(adapter
);
1704 netif_start_queue(adapter
->netdev
);
1710 * pch_gbe_down - Down GbE network device
1711 * @adapter: Board private structure
1713 void pch_gbe_down(struct pch_gbe_adapter
*adapter
)
1715 struct net_device
*netdev
= adapter
->netdev
;
1717 /* signal that we're down so the interrupt handler does not
1718 * reschedule our watchdog timer */
1719 napi_disable(&adapter
->napi
);
1720 atomic_set(&adapter
->irq_sem
, 0);
1722 pch_gbe_irq_disable(adapter
);
1723 pch_gbe_free_irq(adapter
);
1725 del_timer_sync(&adapter
->watchdog_timer
);
1727 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
1728 netif_carrier_off(netdev
);
1729 netif_stop_queue(netdev
);
1731 pch_gbe_reset(adapter
);
1732 pch_gbe_clean_tx_ring(adapter
, adapter
->tx_ring
);
1733 pch_gbe_clean_rx_ring(adapter
, adapter
->rx_ring
);
1737 * pch_gbe_sw_init - Initialize general software structures (struct pch_gbe_adapter)
1738 * @adapter: Board private structure to initialize
1741 * Negative value: Failed
1743 static int pch_gbe_sw_init(struct pch_gbe_adapter
*adapter
)
1745 struct pch_gbe_hw
*hw
= &adapter
->hw
;
1746 struct net_device
*netdev
= adapter
->netdev
;
1748 adapter
->rx_buffer_len
= PCH_GBE_FRAME_SIZE_2048
;
1749 hw
->mac
.max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1750 hw
->mac
.min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1752 /* Initialize the hardware-specific values */
1753 if (pch_gbe_hal_setup_init_funcs(hw
)) {
1754 pr_err("Hardware Initialization Failure\n");
1757 if (pch_gbe_alloc_queues(adapter
)) {
1758 pr_err("Unable to allocate memory for queues\n");
1761 spin_lock_init(&adapter
->hw
.miim_lock
);
1762 spin_lock_init(&adapter
->tx_queue_lock
);
1763 spin_lock_init(&adapter
->stats_lock
);
1764 spin_lock_init(&adapter
->ethtool_lock
);
1765 atomic_set(&adapter
->irq_sem
, 0);
1766 pch_gbe_irq_disable(adapter
);
1768 pch_gbe_init_stats(adapter
);
1770 pr_debug("rx_buffer_len : %d mac.min_frame_size : %d mac.max_frame_size : %d\n",
1771 (u32
) adapter
->rx_buffer_len
,
1772 hw
->mac
.min_frame_size
, hw
->mac
.max_frame_size
);
1777 * pch_gbe_open - Called when a network interface is made active
1778 * @netdev: Network interface device structure
1781 * Negative value: Failed
1783 static int pch_gbe_open(struct net_device
*netdev
)
1785 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
1786 struct pch_gbe_hw
*hw
= &adapter
->hw
;
1789 /* allocate transmit descriptors */
1790 err
= pch_gbe_setup_tx_resources(adapter
, adapter
->tx_ring
);
1793 /* allocate receive descriptors */
1794 err
= pch_gbe_setup_rx_resources(adapter
, adapter
->rx_ring
);
1797 pch_gbe_hal_power_up_phy(hw
);
1798 err
= pch_gbe_up(adapter
);
1801 pr_debug("Success End\n");
1805 if (!adapter
->wake_up_evt
)
1806 pch_gbe_hal_power_down_phy(hw
);
1807 pch_gbe_free_rx_resources(adapter
, adapter
->rx_ring
);
1809 pch_gbe_free_tx_resources(adapter
, adapter
->tx_ring
);
1811 pch_gbe_reset(adapter
);
1812 pr_err("Error End\n");
1817 * pch_gbe_stop - Disables a network interface
1818 * @netdev: Network interface device structure
1822 static int pch_gbe_stop(struct net_device
*netdev
)
1824 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
1825 struct pch_gbe_hw
*hw
= &adapter
->hw
;
1827 pch_gbe_down(adapter
);
1828 if (!adapter
->wake_up_evt
)
1829 pch_gbe_hal_power_down_phy(hw
);
1830 pch_gbe_free_tx_resources(adapter
, adapter
->tx_ring
);
1831 pch_gbe_free_rx_resources(adapter
, adapter
->rx_ring
);
1836 * pch_gbe_xmit_frame - Packet transmitting start
1837 * @skb: Socket buffer structure
1838 * @netdev: Network interface device structure
1840 * - NETDEV_TX_OK: Normal end
1841 * - NETDEV_TX_BUSY: Error end
1843 static int pch_gbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
1845 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
1846 struct pch_gbe_tx_ring
*tx_ring
= adapter
->tx_ring
;
1847 unsigned long flags
;
1849 if (unlikely(skb
->len
> (adapter
->hw
.mac
.max_frame_size
- 4))) {
1850 dev_kfree_skb_any(skb
);
1851 pr_err("Transfer length Error: skb len: %d > max: %d\n",
1852 skb
->len
, adapter
->hw
.mac
.max_frame_size
);
1853 adapter
->stats
.tx_length_errors
++;
1854 return NETDEV_TX_OK
;
1856 if (!spin_trylock_irqsave(&tx_ring
->tx_lock
, flags
)) {
1857 /* Collision - tell upper layer to requeue */
1858 return NETDEV_TX_LOCKED
;
1860 if (unlikely(!PCH_GBE_DESC_UNUSED(tx_ring
))) {
1861 netif_stop_queue(netdev
);
1862 spin_unlock_irqrestore(&tx_ring
->tx_lock
, flags
);
1863 pr_debug("Return : BUSY next_to use : 0x%08x next_to clean : 0x%08x\n",
1864 tx_ring
->next_to_use
, tx_ring
->next_to_clean
);
1865 return NETDEV_TX_BUSY
;
1867 spin_unlock_irqrestore(&tx_ring
->tx_lock
, flags
);
1869 /* CRC,ITAG no support */
1870 pch_gbe_tx_queue(adapter
, tx_ring
, skb
);
1871 return NETDEV_TX_OK
;
1875 * pch_gbe_get_stats - Get System Network Statistics
1876 * @netdev: Network interface device structure
1877 * Returns: The current stats
1879 static struct net_device_stats
*pch_gbe_get_stats(struct net_device
*netdev
)
1881 /* only return the current stats */
1882 return &netdev
->stats
;
1886 * pch_gbe_set_multi - Multicast and Promiscuous mode set
1887 * @netdev: Network interface device structure
1889 static void pch_gbe_set_multi(struct net_device
*netdev
)
1891 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
1892 struct pch_gbe_hw
*hw
= &adapter
->hw
;
1893 struct netdev_hw_addr
*ha
;
1899 pr_debug("netdev->flags : 0x%08x\n", netdev
->flags
);
1901 /* Check for Promiscuous and All Multicast modes */
1902 rctl
= ioread32(&hw
->reg
->RX_MODE
);
1903 mc_count
= netdev_mc_count(netdev
);
1904 if ((netdev
->flags
& IFF_PROMISC
)) {
1905 rctl
&= ~PCH_GBE_ADD_FIL_EN
;
1906 rctl
&= ~PCH_GBE_MLT_FIL_EN
;
1907 } else if ((netdev
->flags
& IFF_ALLMULTI
)) {
1908 /* all the multicasting receive permissions */
1909 rctl
|= PCH_GBE_ADD_FIL_EN
;
1910 rctl
&= ~PCH_GBE_MLT_FIL_EN
;
1912 if (mc_count
>= PCH_GBE_MAR_ENTRIES
) {
1913 /* all the multicasting receive permissions */
1914 rctl
|= PCH_GBE_ADD_FIL_EN
;
1915 rctl
&= ~PCH_GBE_MLT_FIL_EN
;
1917 rctl
|= (PCH_GBE_ADD_FIL_EN
| PCH_GBE_MLT_FIL_EN
);
1920 iowrite32(rctl
, &hw
->reg
->RX_MODE
);
1922 if (mc_count
>= PCH_GBE_MAR_ENTRIES
)
1924 mta_list
= kmalloc(mc_count
* ETH_ALEN
, GFP_ATOMIC
);
1928 /* The shared function expects a packed array of only addresses. */
1930 netdev_for_each_mc_addr(ha
, netdev
) {
1933 memcpy(mta_list
+ (i
++ * ETH_ALEN
), &ha
->addr
, ETH_ALEN
);
1935 pch_gbe_mac_mc_addr_list_update(hw
, mta_list
, i
, 1,
1936 PCH_GBE_MAR_ENTRIES
);
1939 pr_debug("RX_MODE reg(check bit31,30 ADD,MLT) : 0x%08x netdev->mc_count : 0x%08x\n",
1940 ioread32(&hw
->reg
->RX_MODE
), mc_count
);
1944 * pch_gbe_set_mac - Change the Ethernet Address of the NIC
1945 * @netdev: Network interface device structure
1946 * @addr: Pointer to an address structure
1949 * -EADDRNOTAVAIL: Failed
1951 static int pch_gbe_set_mac(struct net_device
*netdev
, void *addr
)
1953 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
1954 struct sockaddr
*skaddr
= addr
;
1957 if (!is_valid_ether_addr(skaddr
->sa_data
)) {
1958 ret_val
= -EADDRNOTAVAIL
;
1960 memcpy(netdev
->dev_addr
, skaddr
->sa_data
, netdev
->addr_len
);
1961 memcpy(adapter
->hw
.mac
.addr
, skaddr
->sa_data
, netdev
->addr_len
);
1962 pch_gbe_mac_mar_set(&adapter
->hw
, adapter
->hw
.mac
.addr
, 0);
1965 pr_debug("ret_val : 0x%08x\n", ret_val
);
1966 pr_debug("dev_addr : %pM\n", netdev
->dev_addr
);
1967 pr_debug("mac_addr : %pM\n", adapter
->hw
.mac
.addr
);
1968 pr_debug("MAC_ADR1AB reg : 0x%08x 0x%08x\n",
1969 ioread32(&adapter
->hw
.reg
->mac_adr
[0].high
),
1970 ioread32(&adapter
->hw
.reg
->mac_adr
[0].low
));
1975 * pch_gbe_change_mtu - Change the Maximum Transfer Unit
1976 * @netdev: Network interface device structure
1977 * @new_mtu: New value for maximum frame size
1982 static int pch_gbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
1984 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
1987 max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1988 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
1989 (max_frame
> PCH_GBE_MAX_JUMBO_FRAME_SIZE
)) {
1990 pr_err("Invalid MTU setting\n");
1993 if (max_frame
<= PCH_GBE_FRAME_SIZE_2048
)
1994 adapter
->rx_buffer_len
= PCH_GBE_FRAME_SIZE_2048
;
1995 else if (max_frame
<= PCH_GBE_FRAME_SIZE_4096
)
1996 adapter
->rx_buffer_len
= PCH_GBE_FRAME_SIZE_4096
;
1997 else if (max_frame
<= PCH_GBE_FRAME_SIZE_8192
)
1998 adapter
->rx_buffer_len
= PCH_GBE_FRAME_SIZE_8192
;
2000 adapter
->rx_buffer_len
= PCH_GBE_MAX_JUMBO_FRAME_SIZE
;
2001 netdev
->mtu
= new_mtu
;
2002 adapter
->hw
.mac
.max_frame_size
= max_frame
;
2004 if (netif_running(netdev
))
2005 pch_gbe_reinit_locked(adapter
);
2007 pch_gbe_reset(adapter
);
2009 pr_debug("max_frame : %d rx_buffer_len : %d mtu : %d max_frame_size : %d\n",
2010 max_frame
, (u32
) adapter
->rx_buffer_len
, netdev
->mtu
,
2011 adapter
->hw
.mac
.max_frame_size
);
2016 * pch_gbe_ioctl - Controls register through a MII interface
2017 * @netdev: Network interface device structure
2018 * @ifr: Pointer to ifr structure
2019 * @cmd: Control command
2022 * Negative value: Failed
2024 static int pch_gbe_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
2026 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2028 pr_debug("cmd : 0x%04x\n", cmd
);
2030 return generic_mii_ioctl(&adapter
->mii
, if_mii(ifr
), cmd
, NULL
);
2034 * pch_gbe_tx_timeout - Respond to a Tx Hang
2035 * @netdev: Network interface device structure
2037 static void pch_gbe_tx_timeout(struct net_device
*netdev
)
2039 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2041 /* Do the reset outside of interrupt context */
2042 adapter
->stats
.tx_timeout_count
++;
2043 schedule_work(&adapter
->reset_task
);
2047 * pch_gbe_napi_poll - NAPI receive and transfer polling callback
2048 * @napi: Pointer of polling device struct
2049 * @budget: The maximum number of a packet
2051 * false: Exit the polling mode
2052 * true: Continue the polling mode
2054 static int pch_gbe_napi_poll(struct napi_struct
*napi
, int budget
)
2056 struct pch_gbe_adapter
*adapter
=
2057 container_of(napi
, struct pch_gbe_adapter
, napi
);
2058 struct net_device
*netdev
= adapter
->netdev
;
2060 bool poll_end_flag
= false;
2061 bool cleaned
= false;
2063 pr_debug("budget : %d\n", budget
);
2065 /* Keep link state information with original netdev */
2066 if (!netif_carrier_ok(netdev
)) {
2067 poll_end_flag
= true;
2069 cleaned
= pch_gbe_clean_tx(adapter
, adapter
->tx_ring
);
2070 pch_gbe_clean_rx(adapter
, adapter
->rx_ring
, &work_done
, budget
);
2074 /* If no Tx and not enough Rx work done,
2075 * exit the polling mode
2077 if ((work_done
< budget
) || !netif_running(netdev
))
2078 poll_end_flag
= true;
2081 if (poll_end_flag
) {
2082 napi_complete(napi
);
2083 pch_gbe_irq_enable(adapter
);
2086 pr_debug("poll_end_flag : %d work_done : %d budget : %d\n",
2087 poll_end_flag
, work_done
, budget
);
2092 #ifdef CONFIG_NET_POLL_CONTROLLER
2094 * pch_gbe_netpoll - Used by things like netconsole to send skbs
2095 * @netdev: Network interface device structure
2097 static void pch_gbe_netpoll(struct net_device
*netdev
)
2099 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2101 disable_irq(adapter
->pdev
->irq
);
2102 pch_gbe_intr(adapter
->pdev
->irq
, netdev
);
2103 enable_irq(adapter
->pdev
->irq
);
2107 static const struct net_device_ops pch_gbe_netdev_ops
= {
2108 .ndo_open
= pch_gbe_open
,
2109 .ndo_stop
= pch_gbe_stop
,
2110 .ndo_start_xmit
= pch_gbe_xmit_frame
,
2111 .ndo_get_stats
= pch_gbe_get_stats
,
2112 .ndo_set_mac_address
= pch_gbe_set_mac
,
2113 .ndo_tx_timeout
= pch_gbe_tx_timeout
,
2114 .ndo_change_mtu
= pch_gbe_change_mtu
,
2115 .ndo_do_ioctl
= pch_gbe_ioctl
,
2116 .ndo_set_multicast_list
= &pch_gbe_set_multi
,
2117 #ifdef CONFIG_NET_POLL_CONTROLLER
2118 .ndo_poll_controller
= pch_gbe_netpoll
,
2122 static pci_ers_result_t
pch_gbe_io_error_detected(struct pci_dev
*pdev
,
2123 pci_channel_state_t state
)
2125 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2126 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2128 netif_device_detach(netdev
);
2129 if (netif_running(netdev
))
2130 pch_gbe_down(adapter
);
2131 pci_disable_device(pdev
);
2132 /* Request a slot slot reset. */
2133 return PCI_ERS_RESULT_NEED_RESET
;
2136 static pci_ers_result_t
pch_gbe_io_slot_reset(struct pci_dev
*pdev
)
2138 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2139 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2140 struct pch_gbe_hw
*hw
= &adapter
->hw
;
2142 if (pci_enable_device(pdev
)) {
2143 pr_err("Cannot re-enable PCI device after reset\n");
2144 return PCI_ERS_RESULT_DISCONNECT
;
2146 pci_set_master(pdev
);
2147 pci_enable_wake(pdev
, PCI_D0
, 0);
2148 pch_gbe_hal_power_up_phy(hw
);
2149 pch_gbe_reset(adapter
);
2150 /* Clear wake up status */
2151 pch_gbe_mac_set_wol_event(hw
, 0);
2153 return PCI_ERS_RESULT_RECOVERED
;
2156 static void pch_gbe_io_resume(struct pci_dev
*pdev
)
2158 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2159 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2161 if (netif_running(netdev
)) {
2162 if (pch_gbe_up(adapter
)) {
2163 pr_debug("can't bring device back up after reset\n");
2167 netif_device_attach(netdev
);
2170 static int __pch_gbe_suspend(struct pci_dev
*pdev
)
2172 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2173 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2174 struct pch_gbe_hw
*hw
= &adapter
->hw
;
2175 u32 wufc
= adapter
->wake_up_evt
;
2178 netif_device_detach(netdev
);
2179 if (netif_running(netdev
))
2180 pch_gbe_down(adapter
);
2182 pch_gbe_set_multi(netdev
);
2183 pch_gbe_setup_rctl(adapter
);
2184 pch_gbe_configure_rx(adapter
);
2185 pch_gbe_set_rgmii_ctrl(adapter
, hw
->mac
.link_speed
,
2186 hw
->mac
.link_duplex
);
2187 pch_gbe_set_mode(adapter
, hw
->mac
.link_speed
,
2188 hw
->mac
.link_duplex
);
2189 pch_gbe_mac_set_wol_event(hw
, wufc
);
2190 pci_disable_device(pdev
);
2192 pch_gbe_hal_power_down_phy(hw
);
2193 pch_gbe_mac_set_wol_event(hw
, wufc
);
2194 pci_disable_device(pdev
);
2200 static int pch_gbe_suspend(struct device
*device
)
2202 struct pci_dev
*pdev
= to_pci_dev(device
);
2204 return __pch_gbe_suspend(pdev
);
2207 static int pch_gbe_resume(struct device
*device
)
2209 struct pci_dev
*pdev
= to_pci_dev(device
);
2210 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2211 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2212 struct pch_gbe_hw
*hw
= &adapter
->hw
;
2215 err
= pci_enable_device(pdev
);
2217 pr_err("Cannot enable PCI device from suspend\n");
2220 pci_set_master(pdev
);
2221 pch_gbe_hal_power_up_phy(hw
);
2222 pch_gbe_reset(adapter
);
2223 /* Clear wake on lan control and status */
2224 pch_gbe_mac_set_wol_event(hw
, 0);
2226 if (netif_running(netdev
))
2227 pch_gbe_up(adapter
);
2228 netif_device_attach(netdev
);
2232 #endif /* CONFIG_PM */
2234 static void pch_gbe_shutdown(struct pci_dev
*pdev
)
2236 __pch_gbe_suspend(pdev
);
2237 if (system_state
== SYSTEM_POWER_OFF
) {
2238 pci_wake_from_d3(pdev
, true);
2239 pci_set_power_state(pdev
, PCI_D3hot
);
2243 static void pch_gbe_remove(struct pci_dev
*pdev
)
2245 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2246 struct pch_gbe_adapter
*adapter
= netdev_priv(netdev
);
2248 flush_scheduled_work();
2249 unregister_netdev(netdev
);
2251 pch_gbe_hal_phy_hw_reset(&adapter
->hw
);
2253 kfree(adapter
->tx_ring
);
2254 kfree(adapter
->rx_ring
);
2256 iounmap(adapter
->hw
.reg
);
2257 pci_release_regions(pdev
);
2258 free_netdev(netdev
);
2259 pci_disable_device(pdev
);
2262 static int pch_gbe_probe(struct pci_dev
*pdev
,
2263 const struct pci_device_id
*pci_id
)
2265 struct net_device
*netdev
;
2266 struct pch_gbe_adapter
*adapter
;
2269 ret
= pci_enable_device(pdev
);
2273 if (pci_set_dma_mask(pdev
, DMA_BIT_MASK(64))
2274 || pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64))) {
2275 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
2277 ret
= pci_set_consistent_dma_mask(pdev
,
2280 dev_err(&pdev
->dev
, "ERR: No usable DMA "
2281 "configuration, aborting\n");
2282 goto err_disable_device
;
2287 ret
= pci_request_regions(pdev
, KBUILD_MODNAME
);
2290 "ERR: Can't reserve PCI I/O and memory resources\n");
2291 goto err_disable_device
;
2293 pci_set_master(pdev
);
2295 netdev
= alloc_etherdev((int)sizeof(struct pch_gbe_adapter
));
2299 "ERR: Can't allocate and set up an Ethernet device\n");
2300 goto err_release_pci
;
2302 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2304 pci_set_drvdata(pdev
, netdev
);
2305 adapter
= netdev_priv(netdev
);
2306 adapter
->netdev
= netdev
;
2307 adapter
->pdev
= pdev
;
2308 adapter
->hw
.back
= adapter
;
2309 adapter
->hw
.reg
= pci_iomap(pdev
, PCH_GBE_PCI_BAR
, 0);
2310 if (!adapter
->hw
.reg
) {
2312 dev_err(&pdev
->dev
, "Can't ioremap\n");
2313 goto err_free_netdev
;
2316 netdev
->netdev_ops
= &pch_gbe_netdev_ops
;
2317 netdev
->watchdog_timeo
= PCH_GBE_WATCHDOG_PERIOD
;
2318 netif_napi_add(netdev
, &adapter
->napi
,
2319 pch_gbe_napi_poll
, PCH_GBE_RX_WEIGHT
);
2320 netdev
->features
= NETIF_F_HW_CSUM
| NETIF_F_GRO
;
2321 pch_gbe_set_ethtool_ops(netdev
);
2323 pch_gbe_mac_reset_hw(&adapter
->hw
);
2325 /* setup the private structure */
2326 ret
= pch_gbe_sw_init(adapter
);
2330 /* Initialize PHY */
2331 ret
= pch_gbe_init_phy(adapter
);
2333 dev_err(&pdev
->dev
, "PHY initialize error\n");
2334 goto err_free_adapter
;
2336 pch_gbe_hal_get_bus_info(&adapter
->hw
);
2338 /* Read the MAC address. and store to the private data */
2339 ret
= pch_gbe_hal_read_mac_addr(&adapter
->hw
);
2341 dev_err(&pdev
->dev
, "MAC address Read Error\n");
2342 goto err_free_adapter
;
2345 memcpy(netdev
->dev_addr
, adapter
->hw
.mac
.addr
, netdev
->addr_len
);
2346 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2347 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2349 goto err_free_adapter
;
2351 setup_timer(&adapter
->watchdog_timer
, pch_gbe_watchdog
,
2352 (unsigned long)adapter
);
2354 INIT_WORK(&adapter
->reset_task
, pch_gbe_reset_task
);
2356 pch_gbe_check_options(adapter
);
2358 if (adapter
->tx_csum
)
2359 netdev
->features
|= NETIF_F_HW_CSUM
;
2361 netdev
->features
&= ~NETIF_F_HW_CSUM
;
2363 /* initialize the wol settings based on the eeprom settings */
2364 adapter
->wake_up_evt
= PCH_GBE_WL_INIT_SETTING
;
2365 dev_info(&pdev
->dev
, "MAC address : %pM\n", netdev
->dev_addr
);
2367 /* reset the hardware with the new settings */
2368 pch_gbe_reset(adapter
);
2370 ret
= register_netdev(netdev
);
2372 goto err_free_adapter
;
2373 /* tell the stack to leave us alone until pch_gbe_open() is called */
2374 netif_carrier_off(netdev
);
2375 netif_stop_queue(netdev
);
2377 dev_dbg(&pdev
->dev
, "OKIsemi(R) PCH Network Connection\n");
2379 device_set_wakeup_enable(&pdev
->dev
, 1);
2383 pch_gbe_hal_phy_hw_reset(&adapter
->hw
);
2384 kfree(adapter
->tx_ring
);
2385 kfree(adapter
->rx_ring
);
2387 iounmap(adapter
->hw
.reg
);
2389 free_netdev(netdev
);
2391 pci_release_regions(pdev
);
2393 pci_disable_device(pdev
);
2397 static const struct pci_device_id pch_gbe_pcidev_id
[] = {
2398 {.vendor
= PCI_VENDOR_ID_INTEL
,
2399 .device
= PCI_DEVICE_ID_INTEL_IOH1_GBE
,
2400 .subvendor
= PCI_ANY_ID
,
2401 .subdevice
= PCI_ANY_ID
,
2402 .class = (PCI_CLASS_NETWORK_ETHERNET
<< 8),
2403 .class_mask
= (0xFFFF00)
2405 /* required last entry */
2410 static const struct dev_pm_ops pch_gbe_pm_ops
= {
2411 .suspend
= pch_gbe_suspend
,
2412 .resume
= pch_gbe_resume
,
2413 .freeze
= pch_gbe_suspend
,
2414 .thaw
= pch_gbe_resume
,
2415 .poweroff
= pch_gbe_suspend
,
2416 .restore
= pch_gbe_resume
,
2420 static struct pci_error_handlers pch_gbe_err_handler
= {
2421 .error_detected
= pch_gbe_io_error_detected
,
2422 .slot_reset
= pch_gbe_io_slot_reset
,
2423 .resume
= pch_gbe_io_resume
2426 static struct pci_driver pch_gbe_pcidev
= {
2427 .name
= KBUILD_MODNAME
,
2428 .id_table
= pch_gbe_pcidev_id
,
2429 .probe
= pch_gbe_probe
,
2430 .remove
= pch_gbe_remove
,
2431 #ifdef CONFIG_PM_OPS
2432 .driver
.pm
= &pch_gbe_pm_ops
,
2434 .shutdown
= pch_gbe_shutdown
,
2435 .err_handler
= &pch_gbe_err_handler
2439 static int __init
pch_gbe_init_module(void)
2443 ret
= pci_register_driver(&pch_gbe_pcidev
);
2444 if (copybreak
!= PCH_GBE_COPYBREAK_DEFAULT
) {
2445 if (copybreak
== 0) {
2446 pr_info("copybreak disabled\n");
2448 pr_info("copybreak enabled for packets <= %u bytes\n",
2455 static void __exit
pch_gbe_exit_module(void)
2457 pci_unregister_driver(&pch_gbe_pcidev
);
2460 module_init(pch_gbe_init_module
);
2461 module_exit(pch_gbe_exit_module
);
2463 MODULE_DESCRIPTION("OKI semiconductor PCH Gigabit ethernet Driver");
2464 MODULE_AUTHOR("OKI semiconductor, <masa-korg@dsn.okisemi.com>");
2465 MODULE_LICENSE("GPL");
2466 MODULE_VERSION(DRV_VERSION
);
2467 MODULE_DEVICE_TABLE(pci
, pch_gbe_pcidev_id
);
2469 module_param(copybreak
, uint
, 0644);
2470 MODULE_PARM_DESC(copybreak
,
2471 "Maximum size of packet that is copied to a new buffer on receive");
2473 /* pch_gbe_main.c */