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[PATCH] pcmcia: remove unneeded Vcc pseudo setting
[deliverable/linux.git] / drivers / net / pcmcia / nmclan_cs.c
1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
4
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
8
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
12
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
15
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
18
19 References
20
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
26
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
33
34 The Linux client driver is based on the 3c589_cs.c client driver by
35 David Hinds.
36
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
39 by Donald Becker.
40
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
43
44 Special thanks for testing and help in debugging this driver goes
45 to Ken Lesniak.
46
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
50
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
54
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
59
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
61 before extraction.
62
63 4. There is a bad slow-down problem in this driver.
64
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
67
68 -------------------------------------------------------------------------------
69 History
70 -------------------------------------------------------------------------------
71 Log: nmclan_cs.c,v
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
75 *
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
78 *
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
81 *
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
86 *
87 * Revision 0.13 1995/05/18 05:56:34 rpao
88 * Statistics changes.
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
91 *
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
94 *
95
96 95/05/13 rpao V0.10a
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
100 95/05/11 rpao V0.10
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
104 *Released
105 95/05/10 rpao V0.08
106 Bug fix: Make all non-exported functions private by using
107 static keyword.
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
111
112 ---------------------------------------------------------------------------- */
113
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
116
117
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
121
122 #define MULTI_TX 0
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
126
127 /* ----------------------------------------------------------------------------
128 Include Files
129 ---------------------------------------------------------------------------- */
130
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
148
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
154
155 #include <asm/uaccess.h>
156 #include <asm/io.h>
157 #include <asm/system.h>
158
159 /* ----------------------------------------------------------------------------
160 Defines
161 ---------------------------------------------------------------------------- */
162
163 #define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165 #define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
167
168 /* Loop Control Defines */
169 #define MACE_MAX_IR_ITERATIONS 10
170 #define MACE_MAX_RX_ITERATIONS 12
171 /*
172 TBD: Dean brought this up, and I assumed the hardware would
173 handle it:
174
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
178 */
179
180 /*
181 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182 which manages the interface between the MACE and the PCMCIA bus. It
183 also includes buffer management for the 32K x 8 SRAM to control up to
184 four transmit and 12 receive frames at a time.
185 */
186 #define AM2150_MAX_TX_FRAMES 4
187 #define AM2150_MAX_RX_FRAMES 12
188
189 /* Am2150 Ethernet Card I/O Mapping */
190 #define AM2150_RCV 0x00
191 #define AM2150_XMT 0x04
192 #define AM2150_XMT_SKIP 0x09
193 #define AM2150_RCV_NEXT 0x0A
194 #define AM2150_RCV_FRAME_COUNT 0x0B
195 #define AM2150_MACE_BANK 0x0C
196 #define AM2150_MACE_BASE 0x10
197
198 /* MACE Registers */
199 #define MACE_RCVFIFO 0
200 #define MACE_XMTFIFO 1
201 #define MACE_XMTFC 2
202 #define MACE_XMTFS 3
203 #define MACE_XMTRC 4
204 #define MACE_RCVFC 5
205 #define MACE_RCVFS 6
206 #define MACE_FIFOFC 7
207 #define MACE_IR 8
208 #define MACE_IMR 9
209 #define MACE_PR 10
210 #define MACE_BIUCC 11
211 #define MACE_FIFOCC 12
212 #define MACE_MACCC 13
213 #define MACE_PLSCC 14
214 #define MACE_PHYCC 15
215 #define MACE_CHIPIDL 16
216 #define MACE_CHIPIDH 17
217 #define MACE_IAC 18
218 /* Reserved */
219 #define MACE_LADRF 20
220 #define MACE_PADR 21
221 /* Reserved */
222 /* Reserved */
223 #define MACE_MPC 24
224 /* Reserved */
225 #define MACE_RNTPC 26
226 #define MACE_RCVCC 27
227 /* Reserved */
228 #define MACE_UTR 29
229 #define MACE_RTR1 30
230 #define MACE_RTR2 31
231
232 /* MACE Bit Masks */
233 #define MACE_XMTRC_EXDEF 0x80
234 #define MACE_XMTRC_XMTRC 0x0F
235
236 #define MACE_XMTFS_XMTSV 0x80
237 #define MACE_XMTFS_UFLO 0x40
238 #define MACE_XMTFS_LCOL 0x20
239 #define MACE_XMTFS_MORE 0x10
240 #define MACE_XMTFS_ONE 0x08
241 #define MACE_XMTFS_DEFER 0x04
242 #define MACE_XMTFS_LCAR 0x02
243 #define MACE_XMTFS_RTRY 0x01
244
245 #define MACE_RCVFS_RCVSTS 0xF000
246 #define MACE_RCVFS_OFLO 0x8000
247 #define MACE_RCVFS_CLSN 0x4000
248 #define MACE_RCVFS_FRAM 0x2000
249 #define MACE_RCVFS_FCS 0x1000
250
251 #define MACE_FIFOFC_RCVFC 0xF0
252 #define MACE_FIFOFC_XMTFC 0x0F
253
254 #define MACE_IR_JAB 0x80
255 #define MACE_IR_BABL 0x40
256 #define MACE_IR_CERR 0x20
257 #define MACE_IR_RCVCCO 0x10
258 #define MACE_IR_RNTPCO 0x08
259 #define MACE_IR_MPCO 0x04
260 #define MACE_IR_RCVINT 0x02
261 #define MACE_IR_XMTINT 0x01
262
263 #define MACE_MACCC_PROM 0x80
264 #define MACE_MACCC_DXMT2PD 0x40
265 #define MACE_MACCC_EMBA 0x20
266 #define MACE_MACCC_RESERVED 0x10
267 #define MACE_MACCC_DRCVPA 0x08
268 #define MACE_MACCC_DRCVBC 0x04
269 #define MACE_MACCC_ENXMT 0x02
270 #define MACE_MACCC_ENRCV 0x01
271
272 #define MACE_PHYCC_LNKFL 0x80
273 #define MACE_PHYCC_DLNKTST 0x40
274 #define MACE_PHYCC_REVPOL 0x20
275 #define MACE_PHYCC_DAPC 0x10
276 #define MACE_PHYCC_LRT 0x08
277 #define MACE_PHYCC_ASEL 0x04
278 #define MACE_PHYCC_RWAKE 0x02
279 #define MACE_PHYCC_AWAKE 0x01
280
281 #define MACE_IAC_ADDRCHG 0x80
282 #define MACE_IAC_PHYADDR 0x04
283 #define MACE_IAC_LOGADDR 0x02
284
285 #define MACE_UTR_RTRE 0x80
286 #define MACE_UTR_RTRD 0x40
287 #define MACE_UTR_RPA 0x20
288 #define MACE_UTR_FCOLL 0x10
289 #define MACE_UTR_RCVFCSE 0x08
290 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
291 #define MACE_UTR_LOOP_NO_MENDEC 0x04
292 #define MACE_UTR_LOOP_EXTERNAL 0x02
293 #define MACE_UTR_LOOP_NONE 0x00
294 #define MACE_UTR_RESERVED 0x01
295
296 /* Switch MACE register bank (only 0 and 1 are valid) */
297 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
298
299 #define MACE_IMR_DEFAULT \
300 (0xFF - \
301 ( \
302 MACE_IR_CERR | \
303 MACE_IR_RCVCCO | \
304 MACE_IR_RNTPCO | \
305 MACE_IR_MPCO | \
306 MACE_IR_RCVINT | \
307 MACE_IR_XMTINT \
308 ) \
309 )
310 #undef MACE_IMR_DEFAULT
311 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
312
313 #define TX_TIMEOUT ((400*HZ)/1000)
314
315 /* ----------------------------------------------------------------------------
316 Type Definitions
317 ---------------------------------------------------------------------------- */
318
319 typedef struct _mace_statistics {
320 /* MACE_XMTFS */
321 int xmtsv;
322 int uflo;
323 int lcol;
324 int more;
325 int one;
326 int defer;
327 int lcar;
328 int rtry;
329
330 /* MACE_XMTRC */
331 int exdef;
332 int xmtrc;
333
334 /* RFS1--Receive Status (RCVSTS) */
335 int oflo;
336 int clsn;
337 int fram;
338 int fcs;
339
340 /* RFS2--Runt Packet Count (RNTPC) */
341 int rfs_rntpc;
342
343 /* RFS3--Receive Collision Count (RCVCC) */
344 int rfs_rcvcc;
345
346 /* MACE_IR */
347 int jab;
348 int babl;
349 int cerr;
350 int rcvcco;
351 int rntpco;
352 int mpco;
353
354 /* MACE_MPC */
355 int mpc;
356
357 /* MACE_RNTPC */
358 int rntpc;
359
360 /* MACE_RCVCC */
361 int rcvcc;
362 } mace_statistics;
363
364 typedef struct _mace_private {
365 dev_link_t link;
366 dev_node_t node;
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
369
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
373
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
376
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
378 } mace_private;
379
380 /* ----------------------------------------------------------------------------
381 Private Global Variables
382 ---------------------------------------------------------------------------- */
383
384 #ifdef PCMCIA_DEBUG
385 static char rcsid[] =
386 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387 static char *version =
388 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
389 #endif
390
391 static const char *if_names[]={
392 "Auto", "10baseT", "BNC",
393 };
394
395 /* ----------------------------------------------------------------------------
396 Parameters
397 These are the parameters that can be set during loading with
398 'insmod'.
399 ---------------------------------------------------------------------------- */
400
401 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
402 MODULE_LICENSE("GPL");
403
404 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
405
406 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
407 INT_MODULE_PARM(if_port, 0);
408
409 #ifdef PCMCIA_DEBUG
410 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
411 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
412 #else
413 #define DEBUG(n, args...)
414 #endif
415
416 /* ----------------------------------------------------------------------------
417 Function Prototypes
418 ---------------------------------------------------------------------------- */
419
420 static void nmclan_config(dev_link_t *link);
421 static void nmclan_release(dev_link_t *link);
422
423 static void nmclan_reset(struct net_device *dev);
424 static int mace_config(struct net_device *dev, struct ifmap *map);
425 static int mace_open(struct net_device *dev);
426 static int mace_close(struct net_device *dev);
427 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
428 static void mace_tx_timeout(struct net_device *dev);
429 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
430 static struct net_device_stats *mace_get_stats(struct net_device *dev);
431 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
432 static void restore_multicast_list(struct net_device *dev);
433 static void set_multicast_list(struct net_device *dev);
434 static struct ethtool_ops netdev_ethtool_ops;
435
436
437 static void nmclan_detach(struct pcmcia_device *p_dev);
438
439 /* ----------------------------------------------------------------------------
440 nmclan_attach
441 Creates an "instance" of the driver, allocating local data
442 structures for one device. The device is registered with Card
443 Services.
444 ---------------------------------------------------------------------------- */
445
446 static int nmclan_attach(struct pcmcia_device *p_dev)
447 {
448 mace_private *lp;
449 dev_link_t *link;
450 struct net_device *dev;
451
452 DEBUG(0, "nmclan_attach()\n");
453 DEBUG(1, "%s\n", rcsid);
454
455 /* Create new ethernet device */
456 dev = alloc_etherdev(sizeof(mace_private));
457 if (!dev)
458 return -ENOMEM;
459 lp = netdev_priv(dev);
460 link = &lp->link;
461 link->priv = dev;
462
463 spin_lock_init(&lp->bank_lock);
464 link->io.NumPorts1 = 32;
465 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
466 link->io.IOAddrLines = 5;
467 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
468 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
469 link->irq.Handler = &mace_interrupt;
470 link->irq.Instance = dev;
471 link->conf.Attributes = CONF_ENABLE_IRQ;
472 link->conf.IntType = INT_MEMORY_AND_IO;
473 link->conf.ConfigIndex = 1;
474 link->conf.Present = PRESENT_OPTION;
475
476 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
477
478 SET_MODULE_OWNER(dev);
479 dev->hard_start_xmit = &mace_start_xmit;
480 dev->set_config = &mace_config;
481 dev->get_stats = &mace_get_stats;
482 dev->set_multicast_list = &set_multicast_list;
483 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
484 dev->open = &mace_open;
485 dev->stop = &mace_close;
486 #ifdef HAVE_TX_TIMEOUT
487 dev->tx_timeout = mace_tx_timeout;
488 dev->watchdog_timeo = TX_TIMEOUT;
489 #endif
490
491 link->handle = p_dev;
492 p_dev->instance = link;
493
494 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
495 nmclan_config(link);
496
497 return 0;
498 } /* nmclan_attach */
499
500 /* ----------------------------------------------------------------------------
501 nmclan_detach
502 This deletes a driver "instance". The device is de-registered
503 with Card Services. If it has been released, all local data
504 structures are freed. Otherwise, the structures will be freed
505 when the device is released.
506 ---------------------------------------------------------------------------- */
507
508 static void nmclan_detach(struct pcmcia_device *p_dev)
509 {
510 dev_link_t *link = dev_to_instance(p_dev);
511 struct net_device *dev = link->priv;
512
513 DEBUG(0, "nmclan_detach(0x%p)\n", link);
514
515 if (link->dev)
516 unregister_netdev(dev);
517
518 if (link->state & DEV_CONFIG)
519 nmclan_release(link);
520
521 free_netdev(dev);
522 } /* nmclan_detach */
523
524 /* ----------------------------------------------------------------------------
525 mace_read
526 Reads a MACE register. This is bank independent; however, the
527 caller must ensure that this call is not interruptable. We are
528 assuming that during normal operation, the MACE is always in
529 bank 0.
530 ---------------------------------------------------------------------------- */
531 static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
532 {
533 int data = 0xFF;
534 unsigned long flags;
535
536 switch (reg >> 4) {
537 case 0: /* register 0-15 */
538 data = inb(ioaddr + AM2150_MACE_BASE + reg);
539 break;
540 case 1: /* register 16-31 */
541 spin_lock_irqsave(&lp->bank_lock, flags);
542 MACEBANK(1);
543 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
544 MACEBANK(0);
545 spin_unlock_irqrestore(&lp->bank_lock, flags);
546 break;
547 }
548 return (data & 0xFF);
549 } /* mace_read */
550
551 /* ----------------------------------------------------------------------------
552 mace_write
553 Writes to a MACE register. This is bank independent; however,
554 the caller must ensure that this call is not interruptable. We
555 are assuming that during normal operation, the MACE is always in
556 bank 0.
557 ---------------------------------------------------------------------------- */
558 static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
559 {
560 unsigned long flags;
561
562 switch (reg >> 4) {
563 case 0: /* register 0-15 */
564 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
565 break;
566 case 1: /* register 16-31 */
567 spin_lock_irqsave(&lp->bank_lock, flags);
568 MACEBANK(1);
569 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
570 MACEBANK(0);
571 spin_unlock_irqrestore(&lp->bank_lock, flags);
572 break;
573 }
574 } /* mace_write */
575
576 /* ----------------------------------------------------------------------------
577 mace_init
578 Resets the MACE chip.
579 ---------------------------------------------------------------------------- */
580 static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
581 {
582 int i;
583 int ct = 0;
584
585 /* MACE Software reset */
586 mace_write(lp, ioaddr, MACE_BIUCC, 1);
587 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
588 /* Wait for reset bit to be cleared automatically after <= 200ns */;
589 if(++ct > 500)
590 {
591 printk(KERN_ERR "mace: reset failed, card removed ?\n");
592 return -1;
593 }
594 udelay(1);
595 }
596 mace_write(lp, ioaddr, MACE_BIUCC, 0);
597
598 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
599 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
600
601 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
602 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
603
604 /*
605 * Bit 2-1 PORTSEL[1-0] Port Select.
606 * 00 AUI/10Base-2
607 * 01 10Base-T
608 * 10 DAI Port (reserved in Am2150)
609 * 11 GPSI
610 * For this card, only the first two are valid.
611 * So, PLSCC should be set to
612 * 0x00 for 10Base-2
613 * 0x02 for 10Base-T
614 * Or just set ASEL in PHYCC below!
615 */
616 switch (if_port) {
617 case 1:
618 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
619 break;
620 case 2:
621 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
622 break;
623 default:
624 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
625 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
626 and the MACE device will automatically select the operating media
627 interface port. */
628 break;
629 }
630
631 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
632 /* Poll ADDRCHG bit */
633 ct = 0;
634 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
635 {
636 if(++ ct > 500)
637 {
638 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
639 return -1;
640 }
641 }
642 /* Set PADR register */
643 for (i = 0; i < ETHER_ADDR_LEN; i++)
644 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
645
646 /* MAC Configuration Control Register should be written last */
647 /* Let set_multicast_list set this. */
648 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
649 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
650 return 0;
651 } /* mace_init */
652
653 /* ----------------------------------------------------------------------------
654 nmclan_config
655 This routine is scheduled to run after a CARD_INSERTION event
656 is received, to configure the PCMCIA socket, and to make the
657 ethernet device available to the system.
658 ---------------------------------------------------------------------------- */
659
660 #define CS_CHECK(fn, ret) \
661 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
662
663 static void nmclan_config(dev_link_t *link)
664 {
665 client_handle_t handle = link->handle;
666 struct net_device *dev = link->priv;
667 mace_private *lp = netdev_priv(dev);
668 tuple_t tuple;
669 cisparse_t parse;
670 u_char buf[64];
671 int i, last_ret, last_fn;
672 kio_addr_t ioaddr;
673
674 DEBUG(0, "nmclan_config(0x%p)\n", link);
675
676 tuple.Attributes = 0;
677 tuple.TupleData = buf;
678 tuple.TupleDataMax = 64;
679 tuple.TupleOffset = 0;
680 tuple.DesiredTuple = CISTPL_CONFIG;
681 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
682 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
683 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
684 link->conf.ConfigBase = parse.config.base;
685
686 /* Configure card */
687 link->state |= DEV_CONFIG;
688
689 CS_CHECK(RequestIO, pcmcia_request_io(handle, &link->io));
690 CS_CHECK(RequestIRQ, pcmcia_request_irq(handle, &link->irq));
691 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(handle, &link->conf));
692 dev->irq = link->irq.AssignedIRQ;
693 dev->base_addr = link->io.BasePort1;
694
695 ioaddr = dev->base_addr;
696
697 /* Read the ethernet address from the CIS. */
698 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
699 tuple.TupleData = buf;
700 tuple.TupleDataMax = 64;
701 tuple.TupleOffset = 0;
702 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
703 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
704 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
705
706 /* Verify configuration by reading the MACE ID. */
707 {
708 char sig[2];
709
710 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
711 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
712 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
713 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
714 sig[0], sig[1]);
715 } else {
716 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
717 " be 0x40 0x?9\n", sig[0], sig[1]);
718 link->state &= ~DEV_CONFIG_PENDING;
719 return;
720 }
721 }
722
723 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
724 goto failed;
725
726 /* The if_port symbol can be set when the module is loaded */
727 if (if_port <= 2)
728 dev->if_port = if_port;
729 else
730 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
731
732 link->dev = &lp->node;
733 link->state &= ~DEV_CONFIG_PENDING;
734 SET_NETDEV_DEV(dev, &handle_to_dev(handle));
735
736 i = register_netdev(dev);
737 if (i != 0) {
738 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
739 link->dev = NULL;
740 goto failed;
741 }
742
743 strcpy(lp->node.dev_name, dev->name);
744
745 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
746 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
747 for (i = 0; i < 6; i++)
748 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
749 return;
750
751 cs_failed:
752 cs_error(link->handle, last_fn, last_ret);
753 failed:
754 nmclan_release(link);
755 return;
756
757 } /* nmclan_config */
758
759 /* ----------------------------------------------------------------------------
760 nmclan_release
761 After a card is removed, nmclan_release() will unregister the
762 net device, and release the PCMCIA configuration. If the device
763 is still open, this will be postponed until it is closed.
764 ---------------------------------------------------------------------------- */
765 static void nmclan_release(dev_link_t *link)
766 {
767 DEBUG(0, "nmclan_release(0x%p)\n", link);
768 pcmcia_disable_device(link->handle);
769 }
770
771 static int nmclan_suspend(struct pcmcia_device *p_dev)
772 {
773 dev_link_t *link = dev_to_instance(p_dev);
774 struct net_device *dev = link->priv;
775
776 if ((link->state & DEV_CONFIG) && (link->open))
777 netif_device_detach(dev);
778
779 return 0;
780 }
781
782 static int nmclan_resume(struct pcmcia_device *p_dev)
783 {
784 dev_link_t *link = dev_to_instance(p_dev);
785 struct net_device *dev = link->priv;
786
787 if ((link->state & DEV_CONFIG) && (link->open)) {
788 nmclan_reset(dev);
789 netif_device_attach(dev);
790 }
791
792 return 0;
793 }
794
795
796 /* ----------------------------------------------------------------------------
797 nmclan_reset
798 Reset and restore all of the Xilinx and MACE registers.
799 ---------------------------------------------------------------------------- */
800 static void nmclan_reset(struct net_device *dev)
801 {
802 mace_private *lp = netdev_priv(dev);
803
804 #if RESET_XILINX
805 dev_link_t *link = &lp->link;
806 conf_reg_t reg;
807 u_long OrigCorValue;
808
809 /* Save original COR value */
810 reg.Function = 0;
811 reg.Action = CS_READ;
812 reg.Offset = CISREG_COR;
813 reg.Value = 0;
814 pcmcia_access_configuration_register(link->handle, &reg);
815 OrigCorValue = reg.Value;
816
817 /* Reset Xilinx */
818 reg.Action = CS_WRITE;
819 reg.Offset = CISREG_COR;
820 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
821 OrigCorValue);
822 reg.Value = COR_SOFT_RESET;
823 pcmcia_access_configuration_register(link->handle, &reg);
824 /* Need to wait for 20 ms for PCMCIA to finish reset. */
825
826 /* Restore original COR configuration index */
827 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
828 pcmcia_access_configuration_register(link->handle, &reg);
829 /* Xilinx is now completely reset along with the MACE chip. */
830 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
831
832 #endif /* #if RESET_XILINX */
833
834 /* Xilinx is now completely reset along with the MACE chip. */
835 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
836
837 /* Reinitialize the MACE chip for operation. */
838 mace_init(lp, dev->base_addr, dev->dev_addr);
839 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
840
841 /* Restore the multicast list and enable TX and RX. */
842 restore_multicast_list(dev);
843 } /* nmclan_reset */
844
845 /* ----------------------------------------------------------------------------
846 mace_config
847 [Someone tell me what this is supposed to do? Is if_port a defined
848 standard? If so, there should be defines to indicate 1=10Base-T,
849 2=10Base-2, etc. including limited automatic detection.]
850 ---------------------------------------------------------------------------- */
851 static int mace_config(struct net_device *dev, struct ifmap *map)
852 {
853 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
854 if (map->port <= 2) {
855 dev->if_port = map->port;
856 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
857 if_names[dev->if_port]);
858 } else
859 return -EINVAL;
860 }
861 return 0;
862 } /* mace_config */
863
864 /* ----------------------------------------------------------------------------
865 mace_open
866 Open device driver.
867 ---------------------------------------------------------------------------- */
868 static int mace_open(struct net_device *dev)
869 {
870 kio_addr_t ioaddr = dev->base_addr;
871 mace_private *lp = netdev_priv(dev);
872 dev_link_t *link = &lp->link;
873
874 if (!DEV_OK(link))
875 return -ENODEV;
876
877 link->open++;
878
879 MACEBANK(0);
880
881 netif_start_queue(dev);
882 nmclan_reset(dev);
883
884 return 0; /* Always succeed */
885 } /* mace_open */
886
887 /* ----------------------------------------------------------------------------
888 mace_close
889 Closes device driver.
890 ---------------------------------------------------------------------------- */
891 static int mace_close(struct net_device *dev)
892 {
893 kio_addr_t ioaddr = dev->base_addr;
894 mace_private *lp = netdev_priv(dev);
895 dev_link_t *link = &lp->link;
896
897 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
898
899 /* Mask off all interrupts from the MACE chip. */
900 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
901
902 link->open--;
903 netif_stop_queue(dev);
904
905 return 0;
906 } /* mace_close */
907
908 static void netdev_get_drvinfo(struct net_device *dev,
909 struct ethtool_drvinfo *info)
910 {
911 strcpy(info->driver, DRV_NAME);
912 strcpy(info->version, DRV_VERSION);
913 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
914 }
915
916 #ifdef PCMCIA_DEBUG
917 static u32 netdev_get_msglevel(struct net_device *dev)
918 {
919 return pc_debug;
920 }
921
922 static void netdev_set_msglevel(struct net_device *dev, u32 level)
923 {
924 pc_debug = level;
925 }
926 #endif /* PCMCIA_DEBUG */
927
928 static struct ethtool_ops netdev_ethtool_ops = {
929 .get_drvinfo = netdev_get_drvinfo,
930 #ifdef PCMCIA_DEBUG
931 .get_msglevel = netdev_get_msglevel,
932 .set_msglevel = netdev_set_msglevel,
933 #endif /* PCMCIA_DEBUG */
934 };
935
936 /* ----------------------------------------------------------------------------
937 mace_start_xmit
938 This routine begins the packet transmit function. When completed,
939 it will generate a transmit interrupt.
940
941 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
942 returns 0, the "packet is now solely the responsibility of the
943 driver." If _start_xmit returns non-zero, the "transmission
944 failed, put skb back into a list."
945 ---------------------------------------------------------------------------- */
946
947 static void mace_tx_timeout(struct net_device *dev)
948 {
949 mace_private *lp = netdev_priv(dev);
950 dev_link_t *link = &lp->link;
951
952 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
953 #if RESET_ON_TIMEOUT
954 printk("resetting card\n");
955 pcmcia_reset_card(link->handle, NULL);
956 #else /* #if RESET_ON_TIMEOUT */
957 printk("NOT resetting card\n");
958 #endif /* #if RESET_ON_TIMEOUT */
959 dev->trans_start = jiffies;
960 netif_wake_queue(dev);
961 }
962
963 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
964 {
965 mace_private *lp = netdev_priv(dev);
966 kio_addr_t ioaddr = dev->base_addr;
967
968 netif_stop_queue(dev);
969
970 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
971 dev->name, (long)skb->len);
972
973 #if (!TX_INTERRUPTABLE)
974 /* Disable MACE TX interrupts. */
975 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
976 ioaddr + AM2150_MACE_BASE + MACE_IMR);
977 lp->tx_irq_disabled=1;
978 #endif /* #if (!TX_INTERRUPTABLE) */
979
980 {
981 /* This block must not be interrupted by another transmit request!
982 mace_tx_timeout will take care of timer-based retransmissions from
983 the upper layers. The interrupt handler is guaranteed never to
984 service a transmit interrupt while we are in here.
985 */
986
987 lp->linux_stats.tx_bytes += skb->len;
988 lp->tx_free_frames--;
989
990 /* WARNING: Write the _exact_ number of bytes written in the header! */
991 /* Put out the word header [must be an outw()] . . . */
992 outw(skb->len, ioaddr + AM2150_XMT);
993 /* . . . and the packet [may be any combination of outw() and outb()] */
994 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
995 if (skb->len & 1) {
996 /* Odd byte transfer */
997 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
998 }
999
1000 dev->trans_start = jiffies;
1001
1002 #if MULTI_TX
1003 if (lp->tx_free_frames > 0)
1004 netif_start_queue(dev);
1005 #endif /* #if MULTI_TX */
1006 }
1007
1008 #if (!TX_INTERRUPTABLE)
1009 /* Re-enable MACE TX interrupts. */
1010 lp->tx_irq_disabled=0;
1011 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1012 #endif /* #if (!TX_INTERRUPTABLE) */
1013
1014 dev_kfree_skb(skb);
1015
1016 return 0;
1017 } /* mace_start_xmit */
1018
1019 /* ----------------------------------------------------------------------------
1020 mace_interrupt
1021 The interrupt handler.
1022 ---------------------------------------------------------------------------- */
1023 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1024 {
1025 struct net_device *dev = (struct net_device *) dev_id;
1026 mace_private *lp = netdev_priv(dev);
1027 kio_addr_t ioaddr = dev->base_addr;
1028 int status;
1029 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1030
1031 if (dev == NULL) {
1032 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1033 irq);
1034 return IRQ_NONE;
1035 }
1036
1037 if (lp->tx_irq_disabled) {
1038 printk(
1039 (lp->tx_irq_disabled?
1040 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1041 "[isr=%02X, imr=%02X]\n":
1042 KERN_NOTICE "%s: Re-entering the interrupt handler "
1043 "[isr=%02X, imr=%02X]\n"),
1044 dev->name,
1045 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1046 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1047 );
1048 /* WARNING: MACE_IR has been read! */
1049 return IRQ_NONE;
1050 }
1051
1052 if (!netif_device_present(dev)) {
1053 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1054 return IRQ_NONE;
1055 }
1056
1057 do {
1058 /* WARNING: MACE_IR is a READ/CLEAR port! */
1059 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1060
1061 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1062
1063 if (status & MACE_IR_RCVINT) {
1064 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1065 }
1066
1067 if (status & MACE_IR_XMTINT) {
1068 unsigned char fifofc;
1069 unsigned char xmtrc;
1070 unsigned char xmtfs;
1071
1072 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1073 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1074 lp->linux_stats.tx_errors++;
1075 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1076 }
1077
1078 /* Transmit Retry Count (XMTRC, reg 4) */
1079 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1080 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1081 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1082
1083 if (
1084 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1085 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1086 ) {
1087 lp->mace_stats.xmtsv++;
1088
1089 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1090 if (xmtfs & MACE_XMTFS_UFLO) {
1091 /* Underflow. Indicates that the Transmit FIFO emptied before
1092 the end of frame was reached. */
1093 lp->mace_stats.uflo++;
1094 }
1095 if (xmtfs & MACE_XMTFS_LCOL) {
1096 /* Late Collision */
1097 lp->mace_stats.lcol++;
1098 }
1099 if (xmtfs & MACE_XMTFS_MORE) {
1100 /* MORE than one retry was needed */
1101 lp->mace_stats.more++;
1102 }
1103 if (xmtfs & MACE_XMTFS_ONE) {
1104 /* Exactly ONE retry occurred */
1105 lp->mace_stats.one++;
1106 }
1107 if (xmtfs & MACE_XMTFS_DEFER) {
1108 /* Transmission was defered */
1109 lp->mace_stats.defer++;
1110 }
1111 if (xmtfs & MACE_XMTFS_LCAR) {
1112 /* Loss of carrier */
1113 lp->mace_stats.lcar++;
1114 }
1115 if (xmtfs & MACE_XMTFS_RTRY) {
1116 /* Retry error: transmit aborted after 16 attempts */
1117 lp->mace_stats.rtry++;
1118 }
1119 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1120
1121 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1122
1123 lp->linux_stats.tx_packets++;
1124 lp->tx_free_frames++;
1125 netif_wake_queue(dev);
1126 } /* if (status & MACE_IR_XMTINT) */
1127
1128 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1129 if (status & MACE_IR_JAB) {
1130 /* Jabber Error. Excessive transmit duration (20-150ms). */
1131 lp->mace_stats.jab++;
1132 }
1133 if (status & MACE_IR_BABL) {
1134 /* Babble Error. >1518 bytes transmitted. */
1135 lp->mace_stats.babl++;
1136 }
1137 if (status & MACE_IR_CERR) {
1138 /* Collision Error. CERR indicates the absence of the
1139 Signal Quality Error Test message after a packet
1140 transmission. */
1141 lp->mace_stats.cerr++;
1142 }
1143 if (status & MACE_IR_RCVCCO) {
1144 /* Receive Collision Count Overflow; */
1145 lp->mace_stats.rcvcco++;
1146 }
1147 if (status & MACE_IR_RNTPCO) {
1148 /* Runt Packet Count Overflow */
1149 lp->mace_stats.rntpco++;
1150 }
1151 if (status & MACE_IR_MPCO) {
1152 /* Missed Packet Count Overflow */
1153 lp->mace_stats.mpco++;
1154 }
1155 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1156
1157 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1158
1159 return IRQ_HANDLED;
1160 } /* mace_interrupt */
1161
1162 /* ----------------------------------------------------------------------------
1163 mace_rx
1164 Receives packets.
1165 ---------------------------------------------------------------------------- */
1166 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1167 {
1168 mace_private *lp = netdev_priv(dev);
1169 kio_addr_t ioaddr = dev->base_addr;
1170 unsigned char rx_framecnt;
1171 unsigned short rx_status;
1172
1173 while (
1174 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1175 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1176 (RxCnt--)
1177 ) {
1178 rx_status = inw(ioaddr + AM2150_RCV);
1179
1180 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1181 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1182
1183 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1184 lp->linux_stats.rx_errors++;
1185 if (rx_status & MACE_RCVFS_OFLO) {
1186 lp->mace_stats.oflo++;
1187 }
1188 if (rx_status & MACE_RCVFS_CLSN) {
1189 lp->mace_stats.clsn++;
1190 }
1191 if (rx_status & MACE_RCVFS_FRAM) {
1192 lp->mace_stats.fram++;
1193 }
1194 if (rx_status & MACE_RCVFS_FCS) {
1195 lp->mace_stats.fcs++;
1196 }
1197 } else {
1198 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1199 /* Auto Strip is off, always subtract 4 */
1200 struct sk_buff *skb;
1201
1202 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1203 /* runt packet count */
1204 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1205 /* rcv collision count */
1206
1207 DEBUG(3, " receiving packet size 0x%X rx_status"
1208 " 0x%X.\n", pkt_len, rx_status);
1209
1210 skb = dev_alloc_skb(pkt_len+2);
1211
1212 if (skb != NULL) {
1213 skb->dev = dev;
1214
1215 skb_reserve(skb, 2);
1216 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1217 if (pkt_len & 1)
1218 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1219 skb->protocol = eth_type_trans(skb, dev);
1220
1221 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1222
1223 dev->last_rx = jiffies;
1224 lp->linux_stats.rx_packets++;
1225 lp->linux_stats.rx_bytes += skb->len;
1226 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1227 continue;
1228 } else {
1229 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1230 " %d.\n", dev->name, pkt_len);
1231 lp->linux_stats.rx_dropped++;
1232 }
1233 }
1234 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1235 } /* while */
1236
1237 return 0;
1238 } /* mace_rx */
1239
1240 /* ----------------------------------------------------------------------------
1241 pr_linux_stats
1242 ---------------------------------------------------------------------------- */
1243 static void pr_linux_stats(struct net_device_stats *pstats)
1244 {
1245 DEBUG(2, "pr_linux_stats\n");
1246 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1247 (long)pstats->rx_packets, (long)pstats->tx_packets);
1248 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1249 (long)pstats->rx_errors, (long)pstats->tx_errors);
1250 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1251 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1252 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1253 (long)pstats->multicast, (long)pstats->collisions);
1254
1255 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1256 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1257 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1258 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1259 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1260 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1261
1262 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1263 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1264 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1265 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1266 DEBUG(2, " tx_window_errors=%ld\n",
1267 (long)pstats->tx_window_errors);
1268 } /* pr_linux_stats */
1269
1270 /* ----------------------------------------------------------------------------
1271 pr_mace_stats
1272 ---------------------------------------------------------------------------- */
1273 static void pr_mace_stats(mace_statistics *pstats)
1274 {
1275 DEBUG(2, "pr_mace_stats\n");
1276
1277 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1278 pstats->xmtsv, pstats->uflo);
1279 DEBUG(2, " lcol=%-7d more=%d\n",
1280 pstats->lcol, pstats->more);
1281 DEBUG(2, " one=%-7d defer=%d\n",
1282 pstats->one, pstats->defer);
1283 DEBUG(2, " lcar=%-7d rtry=%d\n",
1284 pstats->lcar, pstats->rtry);
1285
1286 /* MACE_XMTRC */
1287 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1288 pstats->exdef, pstats->xmtrc);
1289
1290 /* RFS1--Receive Status (RCVSTS) */
1291 DEBUG(2, " oflo=%-7d clsn=%d\n",
1292 pstats->oflo, pstats->clsn);
1293 DEBUG(2, " fram=%-7d fcs=%d\n",
1294 pstats->fram, pstats->fcs);
1295
1296 /* RFS2--Runt Packet Count (RNTPC) */
1297 /* RFS3--Receive Collision Count (RCVCC) */
1298 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1299 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1300
1301 /* MACE_IR */
1302 DEBUG(2, " jab=%-7d babl=%d\n",
1303 pstats->jab, pstats->babl);
1304 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1305 pstats->cerr, pstats->rcvcco);
1306 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1307 pstats->rntpco, pstats->mpco);
1308
1309 /* MACE_MPC */
1310 DEBUG(2, " mpc=%d\n", pstats->mpc);
1311
1312 /* MACE_RNTPC */
1313 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1314
1315 /* MACE_RCVCC */
1316 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1317
1318 } /* pr_mace_stats */
1319
1320 /* ----------------------------------------------------------------------------
1321 update_stats
1322 Update statistics. We change to register window 1, so this
1323 should be run single-threaded if the device is active. This is
1324 expected to be a rare operation, and it's simpler for the rest
1325 of the driver to assume that window 0 is always valid rather
1326 than use a special window-state variable.
1327
1328 oflo & uflo should _never_ occur since it would mean the Xilinx
1329 was not able to transfer data between the MACE FIFO and the
1330 card's SRAM fast enough. If this happens, something is
1331 seriously wrong with the hardware.
1332 ---------------------------------------------------------------------------- */
1333 static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1334 {
1335 mace_private *lp = netdev_priv(dev);
1336
1337 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1338 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1339 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1340 /* At this point, mace_stats is fully updated for this call.
1341 We may now update the linux_stats. */
1342
1343 /* The MACE has no equivalent for linux_stats field which are commented
1344 out. */
1345
1346 /* lp->linux_stats.multicast; */
1347 lp->linux_stats.collisions =
1348 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1349 /* Collision: The MACE may retry sending a packet 15 times
1350 before giving up. The retry count is in XMTRC.
1351 Does each retry constitute a collision?
1352 If so, why doesn't the RCVCC record these collisions? */
1353
1354 /* detailed rx_errors: */
1355 lp->linux_stats.rx_length_errors =
1356 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1357 /* lp->linux_stats.rx_over_errors */
1358 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1359 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1360 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1361 lp->linux_stats.rx_missed_errors =
1362 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1363
1364 /* detailed tx_errors */
1365 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1366 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1367 /* LCAR usually results from bad cabling. */
1368 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1369 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1370 /* lp->linux_stats.tx_window_errors; */
1371
1372 return;
1373 } /* update_stats */
1374
1375 /* ----------------------------------------------------------------------------
1376 mace_get_stats
1377 Gathers ethernet statistics from the MACE chip.
1378 ---------------------------------------------------------------------------- */
1379 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1380 {
1381 mace_private *lp = netdev_priv(dev);
1382
1383 update_stats(dev->base_addr, dev);
1384
1385 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1386 pr_linux_stats(&lp->linux_stats);
1387 pr_mace_stats(&lp->mace_stats);
1388
1389 return &lp->linux_stats;
1390 } /* net_device_stats */
1391
1392 /* ----------------------------------------------------------------------------
1393 updateCRC
1394 Modified from Am79C90 data sheet.
1395 ---------------------------------------------------------------------------- */
1396
1397 #ifdef BROKEN_MULTICAST
1398
1399 static void updateCRC(int *CRC, int bit)
1400 {
1401 int poly[]={
1402 1,1,1,0, 1,1,0,1,
1403 1,0,1,1, 1,0,0,0,
1404 1,0,0,0, 0,0,1,1,
1405 0,0,1,0, 0,0,0,0
1406 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1407 CRC generator polynomial. */
1408
1409 int j;
1410
1411 /* shift CRC and control bit (CRC[32]) */
1412 for (j = 32; j > 0; j--)
1413 CRC[j] = CRC[j-1];
1414 CRC[0] = 0;
1415
1416 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1417 if (bit ^ CRC[32])
1418 for (j = 0; j < 32; j++)
1419 CRC[j] ^= poly[j];
1420 } /* updateCRC */
1421
1422 /* ----------------------------------------------------------------------------
1423 BuildLAF
1424 Build logical address filter.
1425 Modified from Am79C90 data sheet.
1426
1427 Input
1428 ladrf: logical address filter (contents initialized to 0)
1429 adr: ethernet address
1430 ---------------------------------------------------------------------------- */
1431 static void BuildLAF(int *ladrf, int *adr)
1432 {
1433 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1434
1435 int i, byte; /* temporary array indices */
1436 int hashcode; /* the output object */
1437
1438 CRC[32]=0;
1439
1440 for (byte = 0; byte < 6; byte++)
1441 for (i = 0; i < 8; i++)
1442 updateCRC(CRC, (adr[byte] >> i) & 1);
1443
1444 hashcode = 0;
1445 for (i = 0; i < 6; i++)
1446 hashcode = (hashcode << 1) + CRC[i];
1447
1448 byte = hashcode >> 3;
1449 ladrf[byte] |= (1 << (hashcode & 7));
1450
1451 #ifdef PCMCIA_DEBUG
1452 if (pc_debug > 2) {
1453 printk(KERN_DEBUG " adr =");
1454 for (i = 0; i < 6; i++)
1455 printk(" %02X", adr[i]);
1456 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1457 " =", hashcode);
1458 for (i = 0; i < 8; i++)
1459 printk(" %02X", ladrf[i]);
1460 printk("\n");
1461 }
1462 #endif
1463 } /* BuildLAF */
1464
1465 /* ----------------------------------------------------------------------------
1466 restore_multicast_list
1467 Restores the multicast filter for MACE chip to the last
1468 set_multicast_list() call.
1469
1470 Input
1471 multicast_num_addrs
1472 multicast_ladrf[]
1473 ---------------------------------------------------------------------------- */
1474 static void restore_multicast_list(struct net_device *dev)
1475 {
1476 mace_private *lp = netdev_priv(dev);
1477 int num_addrs = lp->multicast_num_addrs;
1478 int *ladrf = lp->multicast_ladrf;
1479 kio_addr_t ioaddr = dev->base_addr;
1480 int i;
1481
1482 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1483 dev->name, num_addrs);
1484
1485 if (num_addrs > 0) {
1486
1487 DEBUG(1, "Attempt to restore multicast list detected.\n");
1488
1489 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1490 /* Poll ADDRCHG bit */
1491 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1492 ;
1493 /* Set LADRF register */
1494 for (i = 0; i < MACE_LADRF_LEN; i++)
1495 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1496
1497 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1498 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1499
1500 } else if (num_addrs < 0) {
1501
1502 /* Promiscuous mode: receive all packets */
1503 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1504 mace_write(lp, ioaddr, MACE_MACCC,
1505 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1506 );
1507
1508 } else {
1509
1510 /* Normal mode */
1511 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1512 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1513
1514 }
1515 } /* restore_multicast_list */
1516
1517 /* ----------------------------------------------------------------------------
1518 set_multicast_list
1519 Set or clear the multicast filter for this adaptor.
1520
1521 Input
1522 num_addrs == -1 Promiscuous mode, receive all packets
1523 num_addrs == 0 Normal mode, clear multicast list
1524 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1525 best-effort filtering.
1526 Output
1527 multicast_num_addrs
1528 multicast_ladrf[]
1529 ---------------------------------------------------------------------------- */
1530
1531 static void set_multicast_list(struct net_device *dev)
1532 {
1533 mace_private *lp = netdev_priv(dev);
1534 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1535 int i;
1536 struct dev_mc_list *dmi = dev->mc_list;
1537
1538 #ifdef PCMCIA_DEBUG
1539 if (pc_debug > 1) {
1540 static int old;
1541 if (dev->mc_count != old) {
1542 old = dev->mc_count;
1543 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1544 dev->name, old);
1545 }
1546 }
1547 #endif
1548
1549 /* Set multicast_num_addrs. */
1550 lp->multicast_num_addrs = dev->mc_count;
1551
1552 /* Set multicast_ladrf. */
1553 if (num_addrs > 0) {
1554 /* Calculate multicast logical address filter */
1555 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1556 for (i = 0; i < dev->mc_count; i++) {
1557 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1558 dmi = dmi->next;
1559 BuildLAF(lp->multicast_ladrf, adr);
1560 }
1561 }
1562
1563 restore_multicast_list(dev);
1564
1565 } /* set_multicast_list */
1566
1567 #endif /* BROKEN_MULTICAST */
1568
1569 static void restore_multicast_list(struct net_device *dev)
1570 {
1571 kio_addr_t ioaddr = dev->base_addr;
1572 mace_private *lp = netdev_priv(dev);
1573
1574 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1575 lp->multicast_num_addrs);
1576
1577 if (dev->flags & IFF_PROMISC) {
1578 /* Promiscuous mode: receive all packets */
1579 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1580 mace_write(lp, ioaddr, MACE_MACCC,
1581 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1582 );
1583 } else {
1584 /* Normal mode */
1585 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1586 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1587 }
1588 } /* restore_multicast_list */
1589
1590 static void set_multicast_list(struct net_device *dev)
1591 {
1592 mace_private *lp = netdev_priv(dev);
1593
1594 #ifdef PCMCIA_DEBUG
1595 if (pc_debug > 1) {
1596 static int old;
1597 if (dev->mc_count != old) {
1598 old = dev->mc_count;
1599 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1600 dev->name, old);
1601 }
1602 }
1603 #endif
1604
1605 lp->multicast_num_addrs = dev->mc_count;
1606 restore_multicast_list(dev);
1607
1608 } /* set_multicast_list */
1609
1610 static struct pcmcia_device_id nmclan_ids[] = {
1611 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1612 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1613 PCMCIA_DEVICE_NULL,
1614 };
1615 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1616
1617 static struct pcmcia_driver nmclan_cs_driver = {
1618 .owner = THIS_MODULE,
1619 .drv = {
1620 .name = "nmclan_cs",
1621 },
1622 .probe = nmclan_attach,
1623 .remove = nmclan_detach,
1624 .id_table = nmclan_ids,
1625 .suspend = nmclan_suspend,
1626 .resume = nmclan_resume,
1627 };
1628
1629 static int __init init_nmclan_cs(void)
1630 {
1631 return pcmcia_register_driver(&nmclan_cs_driver);
1632 }
1633
1634 static void __exit exit_nmclan_cs(void)
1635 {
1636 pcmcia_unregister_driver(&nmclan_cs_driver);
1637 }
1638
1639 module_init(init_nmclan_cs);
1640 module_exit(exit_nmclan_cs);
Linux kernel - Deliverables
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