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Merge branch 'topic/hda-gateway' into topic/hda
[deliverable/linux.git] / drivers / net / pcmcia / nmclan_cs.c
1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
4
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
8
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
12
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
15
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
18
19 References
20
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
26
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
33
34 The Linux client driver is based on the 3c589_cs.c client driver by
35 David Hinds.
36
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
39 by Donald Becker.
40
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
43
44 Special thanks for testing and help in debugging this driver goes
45 to Ken Lesniak.
46
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
50
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
54
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
59
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
61 before extraction.
62
63 4. There is a bad slow-down problem in this driver.
64
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
67
68 -------------------------------------------------------------------------------
69 History
70 -------------------------------------------------------------------------------
71 Log: nmclan_cs.c,v
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@lxorguk.ukuu.org.uk>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
75 *
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
78 *
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
81 *
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
86 *
87 * Revision 0.13 1995/05/18 05:56:34 rpao
88 * Statistics changes.
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
91 *
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
94 *
95
96 95/05/13 rpao V0.10a
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
100 95/05/11 rpao V0.10
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
104 *Released
105 95/05/10 rpao V0.08
106 Bug fix: Make all non-exported functions private by using
107 static keyword.
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
111
112 ---------------------------------------------------------------------------- */
113
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
116
117
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
121
122 #define MULTI_TX 0
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
126
127 /* ----------------------------------------------------------------------------
128 Include Files
129 ---------------------------------------------------------------------------- */
130
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
148
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
154
155 #include <asm/uaccess.h>
156 #include <asm/io.h>
157 #include <asm/system.h>
158
159 /* ----------------------------------------------------------------------------
160 Defines
161 ---------------------------------------------------------------------------- */
162
163 #define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165 #define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
167
168 /* Loop Control Defines */
169 #define MACE_MAX_IR_ITERATIONS 10
170 #define MACE_MAX_RX_ITERATIONS 12
171 /*
172 TBD: Dean brought this up, and I assumed the hardware would
173 handle it:
174
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
178 */
179
180 /*
181 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182 which manages the interface between the MACE and the PCMCIA bus. It
183 also includes buffer management for the 32K x 8 SRAM to control up to
184 four transmit and 12 receive frames at a time.
185 */
186 #define AM2150_MAX_TX_FRAMES 4
187 #define AM2150_MAX_RX_FRAMES 12
188
189 /* Am2150 Ethernet Card I/O Mapping */
190 #define AM2150_RCV 0x00
191 #define AM2150_XMT 0x04
192 #define AM2150_XMT_SKIP 0x09
193 #define AM2150_RCV_NEXT 0x0A
194 #define AM2150_RCV_FRAME_COUNT 0x0B
195 #define AM2150_MACE_BANK 0x0C
196 #define AM2150_MACE_BASE 0x10
197
198 /* MACE Registers */
199 #define MACE_RCVFIFO 0
200 #define MACE_XMTFIFO 1
201 #define MACE_XMTFC 2
202 #define MACE_XMTFS 3
203 #define MACE_XMTRC 4
204 #define MACE_RCVFC 5
205 #define MACE_RCVFS 6
206 #define MACE_FIFOFC 7
207 #define MACE_IR 8
208 #define MACE_IMR 9
209 #define MACE_PR 10
210 #define MACE_BIUCC 11
211 #define MACE_FIFOCC 12
212 #define MACE_MACCC 13
213 #define MACE_PLSCC 14
214 #define MACE_PHYCC 15
215 #define MACE_CHIPIDL 16
216 #define MACE_CHIPIDH 17
217 #define MACE_IAC 18
218 /* Reserved */
219 #define MACE_LADRF 20
220 #define MACE_PADR 21
221 /* Reserved */
222 /* Reserved */
223 #define MACE_MPC 24
224 /* Reserved */
225 #define MACE_RNTPC 26
226 #define MACE_RCVCC 27
227 /* Reserved */
228 #define MACE_UTR 29
229 #define MACE_RTR1 30
230 #define MACE_RTR2 31
231
232 /* MACE Bit Masks */
233 #define MACE_XMTRC_EXDEF 0x80
234 #define MACE_XMTRC_XMTRC 0x0F
235
236 #define MACE_XMTFS_XMTSV 0x80
237 #define MACE_XMTFS_UFLO 0x40
238 #define MACE_XMTFS_LCOL 0x20
239 #define MACE_XMTFS_MORE 0x10
240 #define MACE_XMTFS_ONE 0x08
241 #define MACE_XMTFS_DEFER 0x04
242 #define MACE_XMTFS_LCAR 0x02
243 #define MACE_XMTFS_RTRY 0x01
244
245 #define MACE_RCVFS_RCVSTS 0xF000
246 #define MACE_RCVFS_OFLO 0x8000
247 #define MACE_RCVFS_CLSN 0x4000
248 #define MACE_RCVFS_FRAM 0x2000
249 #define MACE_RCVFS_FCS 0x1000
250
251 #define MACE_FIFOFC_RCVFC 0xF0
252 #define MACE_FIFOFC_XMTFC 0x0F
253
254 #define MACE_IR_JAB 0x80
255 #define MACE_IR_BABL 0x40
256 #define MACE_IR_CERR 0x20
257 #define MACE_IR_RCVCCO 0x10
258 #define MACE_IR_RNTPCO 0x08
259 #define MACE_IR_MPCO 0x04
260 #define MACE_IR_RCVINT 0x02
261 #define MACE_IR_XMTINT 0x01
262
263 #define MACE_MACCC_PROM 0x80
264 #define MACE_MACCC_DXMT2PD 0x40
265 #define MACE_MACCC_EMBA 0x20
266 #define MACE_MACCC_RESERVED 0x10
267 #define MACE_MACCC_DRCVPA 0x08
268 #define MACE_MACCC_DRCVBC 0x04
269 #define MACE_MACCC_ENXMT 0x02
270 #define MACE_MACCC_ENRCV 0x01
271
272 #define MACE_PHYCC_LNKFL 0x80
273 #define MACE_PHYCC_DLNKTST 0x40
274 #define MACE_PHYCC_REVPOL 0x20
275 #define MACE_PHYCC_DAPC 0x10
276 #define MACE_PHYCC_LRT 0x08
277 #define MACE_PHYCC_ASEL 0x04
278 #define MACE_PHYCC_RWAKE 0x02
279 #define MACE_PHYCC_AWAKE 0x01
280
281 #define MACE_IAC_ADDRCHG 0x80
282 #define MACE_IAC_PHYADDR 0x04
283 #define MACE_IAC_LOGADDR 0x02
284
285 #define MACE_UTR_RTRE 0x80
286 #define MACE_UTR_RTRD 0x40
287 #define MACE_UTR_RPA 0x20
288 #define MACE_UTR_FCOLL 0x10
289 #define MACE_UTR_RCVFCSE 0x08
290 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
291 #define MACE_UTR_LOOP_NO_MENDEC 0x04
292 #define MACE_UTR_LOOP_EXTERNAL 0x02
293 #define MACE_UTR_LOOP_NONE 0x00
294 #define MACE_UTR_RESERVED 0x01
295
296 /* Switch MACE register bank (only 0 and 1 are valid) */
297 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
298
299 #define MACE_IMR_DEFAULT \
300 (0xFF - \
301 ( \
302 MACE_IR_CERR | \
303 MACE_IR_RCVCCO | \
304 MACE_IR_RNTPCO | \
305 MACE_IR_MPCO | \
306 MACE_IR_RCVINT | \
307 MACE_IR_XMTINT \
308 ) \
309 )
310 #undef MACE_IMR_DEFAULT
311 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
312
313 #define TX_TIMEOUT ((400*HZ)/1000)
314
315 /* ----------------------------------------------------------------------------
316 Type Definitions
317 ---------------------------------------------------------------------------- */
318
319 typedef struct _mace_statistics {
320 /* MACE_XMTFS */
321 int xmtsv;
322 int uflo;
323 int lcol;
324 int more;
325 int one;
326 int defer;
327 int lcar;
328 int rtry;
329
330 /* MACE_XMTRC */
331 int exdef;
332 int xmtrc;
333
334 /* RFS1--Receive Status (RCVSTS) */
335 int oflo;
336 int clsn;
337 int fram;
338 int fcs;
339
340 /* RFS2--Runt Packet Count (RNTPC) */
341 int rfs_rntpc;
342
343 /* RFS3--Receive Collision Count (RCVCC) */
344 int rfs_rcvcc;
345
346 /* MACE_IR */
347 int jab;
348 int babl;
349 int cerr;
350 int rcvcco;
351 int rntpco;
352 int mpco;
353
354 /* MACE_MPC */
355 int mpc;
356
357 /* MACE_RNTPC */
358 int rntpc;
359
360 /* MACE_RCVCC */
361 int rcvcc;
362 } mace_statistics;
363
364 typedef struct _mace_private {
365 struct pcmcia_device *p_dev;
366 dev_node_t node;
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
369
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
373
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
376
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
378 } mace_private;
379
380 /* ----------------------------------------------------------------------------
381 Private Global Variables
382 ---------------------------------------------------------------------------- */
383
384 #ifdef PCMCIA_DEBUG
385 static char rcsid[] =
386 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387 static char *version =
388 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
389 #endif
390
391 static const char *if_names[]={
392 "Auto", "10baseT", "BNC",
393 };
394
395 /* ----------------------------------------------------------------------------
396 Parameters
397 These are the parameters that can be set during loading with
398 'insmod'.
399 ---------------------------------------------------------------------------- */
400
401 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
402 MODULE_LICENSE("GPL");
403
404 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
405
406 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
407 INT_MODULE_PARM(if_port, 0);
408
409 #ifdef PCMCIA_DEBUG
410 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
411 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
412 #else
413 #define DEBUG(n, args...)
414 #endif
415
416 /* ----------------------------------------------------------------------------
417 Function Prototypes
418 ---------------------------------------------------------------------------- */
419
420 static int nmclan_config(struct pcmcia_device *link);
421 static void nmclan_release(struct pcmcia_device *link);
422
423 static void nmclan_reset(struct net_device *dev);
424 static int mace_config(struct net_device *dev, struct ifmap *map);
425 static int mace_open(struct net_device *dev);
426 static int mace_close(struct net_device *dev);
427 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
428 static void mace_tx_timeout(struct net_device *dev);
429 static irqreturn_t mace_interrupt(int irq, void *dev_id);
430 static struct net_device_stats *mace_get_stats(struct net_device *dev);
431 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
432 static void restore_multicast_list(struct net_device *dev);
433 static void set_multicast_list(struct net_device *dev);
434 static const struct ethtool_ops netdev_ethtool_ops;
435
436
437 static void nmclan_detach(struct pcmcia_device *p_dev);
438
439 /* ----------------------------------------------------------------------------
440 nmclan_attach
441 Creates an "instance" of the driver, allocating local data
442 structures for one device. The device is registered with Card
443 Services.
444 ---------------------------------------------------------------------------- */
445
446 static int nmclan_probe(struct pcmcia_device *link)
447 {
448 mace_private *lp;
449 struct net_device *dev;
450
451 DEBUG(0, "nmclan_attach()\n");
452 DEBUG(1, "%s\n", rcsid);
453
454 /* Create new ethernet device */
455 dev = alloc_etherdev(sizeof(mace_private));
456 if (!dev)
457 return -ENOMEM;
458 lp = netdev_priv(dev);
459 lp->p_dev = link;
460 link->priv = dev;
461
462 spin_lock_init(&lp->bank_lock);
463 link->io.NumPorts1 = 32;
464 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
465 link->io.IOAddrLines = 5;
466 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
467 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
468 link->irq.Handler = &mace_interrupt;
469 link->irq.Instance = dev;
470 link->conf.Attributes = CONF_ENABLE_IRQ;
471 link->conf.IntType = INT_MEMORY_AND_IO;
472 link->conf.ConfigIndex = 1;
473 link->conf.Present = PRESENT_OPTION;
474
475 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
476
477 dev->hard_start_xmit = &mace_start_xmit;
478 dev->set_config = &mace_config;
479 dev->get_stats = &mace_get_stats;
480 dev->set_multicast_list = &set_multicast_list;
481 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
482 dev->open = &mace_open;
483 dev->stop = &mace_close;
484 #ifdef HAVE_TX_TIMEOUT
485 dev->tx_timeout = mace_tx_timeout;
486 dev->watchdog_timeo = TX_TIMEOUT;
487 #endif
488
489 return nmclan_config(link);
490 } /* nmclan_attach */
491
492 /* ----------------------------------------------------------------------------
493 nmclan_detach
494 This deletes a driver "instance". The device is de-registered
495 with Card Services. If it has been released, all local data
496 structures are freed. Otherwise, the structures will be freed
497 when the device is released.
498 ---------------------------------------------------------------------------- */
499
500 static void nmclan_detach(struct pcmcia_device *link)
501 {
502 struct net_device *dev = link->priv;
503
504 DEBUG(0, "nmclan_detach(0x%p)\n", link);
505
506 if (link->dev_node)
507 unregister_netdev(dev);
508
509 nmclan_release(link);
510
511 free_netdev(dev);
512 } /* nmclan_detach */
513
514 /* ----------------------------------------------------------------------------
515 mace_read
516 Reads a MACE register. This is bank independent; however, the
517 caller must ensure that this call is not interruptable. We are
518 assuming that during normal operation, the MACE is always in
519 bank 0.
520 ---------------------------------------------------------------------------- */
521 static int mace_read(mace_private *lp, unsigned int ioaddr, int reg)
522 {
523 int data = 0xFF;
524 unsigned long flags;
525
526 switch (reg >> 4) {
527 case 0: /* register 0-15 */
528 data = inb(ioaddr + AM2150_MACE_BASE + reg);
529 break;
530 case 1: /* register 16-31 */
531 spin_lock_irqsave(&lp->bank_lock, flags);
532 MACEBANK(1);
533 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
534 MACEBANK(0);
535 spin_unlock_irqrestore(&lp->bank_lock, flags);
536 break;
537 }
538 return (data & 0xFF);
539 } /* mace_read */
540
541 /* ----------------------------------------------------------------------------
542 mace_write
543 Writes to a MACE register. This is bank independent; however,
544 the caller must ensure that this call is not interruptable. We
545 are assuming that during normal operation, the MACE is always in
546 bank 0.
547 ---------------------------------------------------------------------------- */
548 static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,
549 int data)
550 {
551 unsigned long flags;
552
553 switch (reg >> 4) {
554 case 0: /* register 0-15 */
555 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
556 break;
557 case 1: /* register 16-31 */
558 spin_lock_irqsave(&lp->bank_lock, flags);
559 MACEBANK(1);
560 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
561 MACEBANK(0);
562 spin_unlock_irqrestore(&lp->bank_lock, flags);
563 break;
564 }
565 } /* mace_write */
566
567 /* ----------------------------------------------------------------------------
568 mace_init
569 Resets the MACE chip.
570 ---------------------------------------------------------------------------- */
571 static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)
572 {
573 int i;
574 int ct = 0;
575
576 /* MACE Software reset */
577 mace_write(lp, ioaddr, MACE_BIUCC, 1);
578 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
579 /* Wait for reset bit to be cleared automatically after <= 200ns */;
580 if(++ct > 500)
581 {
582 printk(KERN_ERR "mace: reset failed, card removed ?\n");
583 return -1;
584 }
585 udelay(1);
586 }
587 mace_write(lp, ioaddr, MACE_BIUCC, 0);
588
589 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
590 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
591
592 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
593 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
594
595 /*
596 * Bit 2-1 PORTSEL[1-0] Port Select.
597 * 00 AUI/10Base-2
598 * 01 10Base-T
599 * 10 DAI Port (reserved in Am2150)
600 * 11 GPSI
601 * For this card, only the first two are valid.
602 * So, PLSCC should be set to
603 * 0x00 for 10Base-2
604 * 0x02 for 10Base-T
605 * Or just set ASEL in PHYCC below!
606 */
607 switch (if_port) {
608 case 1:
609 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
610 break;
611 case 2:
612 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
613 break;
614 default:
615 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
616 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
617 and the MACE device will automatically select the operating media
618 interface port. */
619 break;
620 }
621
622 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
623 /* Poll ADDRCHG bit */
624 ct = 0;
625 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
626 {
627 if(++ ct > 500)
628 {
629 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
630 return -1;
631 }
632 }
633 /* Set PADR register */
634 for (i = 0; i < ETHER_ADDR_LEN; i++)
635 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
636
637 /* MAC Configuration Control Register should be written last */
638 /* Let set_multicast_list set this. */
639 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
640 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
641 return 0;
642 } /* mace_init */
643
644 /* ----------------------------------------------------------------------------
645 nmclan_config
646 This routine is scheduled to run after a CARD_INSERTION event
647 is received, to configure the PCMCIA socket, and to make the
648 ethernet device available to the system.
649 ---------------------------------------------------------------------------- */
650
651 #define CS_CHECK(fn, ret) \
652 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
653
654 static int nmclan_config(struct pcmcia_device *link)
655 {
656 struct net_device *dev = link->priv;
657 mace_private *lp = netdev_priv(dev);
658 tuple_t tuple;
659 u_char buf[64];
660 int i, last_ret, last_fn;
661 unsigned int ioaddr;
662
663 DEBUG(0, "nmclan_config(0x%p)\n", link);
664
665 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
666 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
667 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
668 dev->irq = link->irq.AssignedIRQ;
669 dev->base_addr = link->io.BasePort1;
670
671 ioaddr = dev->base_addr;
672
673 /* Read the ethernet address from the CIS. */
674 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
675 tuple.TupleData = buf;
676 tuple.TupleDataMax = 64;
677 tuple.TupleOffset = 0;
678 tuple.Attributes = 0;
679 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
680 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
681 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
682
683 /* Verify configuration by reading the MACE ID. */
684 {
685 char sig[2];
686
687 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
688 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
689 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
690 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
691 sig[0], sig[1]);
692 } else {
693 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
694 " be 0x40 0x?9\n", sig[0], sig[1]);
695 return -ENODEV;
696 }
697 }
698
699 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
700 goto failed;
701
702 /* The if_port symbol can be set when the module is loaded */
703 if (if_port <= 2)
704 dev->if_port = if_port;
705 else
706 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
707
708 link->dev_node = &lp->node;
709 SET_NETDEV_DEV(dev, &handle_to_dev(link));
710
711 i = register_netdev(dev);
712 if (i != 0) {
713 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
714 link->dev_node = NULL;
715 goto failed;
716 }
717
718 strcpy(lp->node.dev_name, dev->name);
719
720 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port,"
721 " hw_addr %pM\n",
722 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port],
723 dev->dev_addr);
724 return 0;
725
726 cs_failed:
727 cs_error(link, last_fn, last_ret);
728 failed:
729 nmclan_release(link);
730 return -ENODEV;
731 } /* nmclan_config */
732
733 /* ----------------------------------------------------------------------------
734 nmclan_release
735 After a card is removed, nmclan_release() will unregister the
736 net device, and release the PCMCIA configuration. If the device
737 is still open, this will be postponed until it is closed.
738 ---------------------------------------------------------------------------- */
739 static void nmclan_release(struct pcmcia_device *link)
740 {
741 DEBUG(0, "nmclan_release(0x%p)\n", link);
742 pcmcia_disable_device(link);
743 }
744
745 static int nmclan_suspend(struct pcmcia_device *link)
746 {
747 struct net_device *dev = link->priv;
748
749 if (link->open)
750 netif_device_detach(dev);
751
752 return 0;
753 }
754
755 static int nmclan_resume(struct pcmcia_device *link)
756 {
757 struct net_device *dev = link->priv;
758
759 if (link->open) {
760 nmclan_reset(dev);
761 netif_device_attach(dev);
762 }
763
764 return 0;
765 }
766
767
768 /* ----------------------------------------------------------------------------
769 nmclan_reset
770 Reset and restore all of the Xilinx and MACE registers.
771 ---------------------------------------------------------------------------- */
772 static void nmclan_reset(struct net_device *dev)
773 {
774 mace_private *lp = netdev_priv(dev);
775
776 #if RESET_XILINX
777 struct pcmcia_device *link = &lp->link;
778 conf_reg_t reg;
779 u_long OrigCorValue;
780
781 /* Save original COR value */
782 reg.Function = 0;
783 reg.Action = CS_READ;
784 reg.Offset = CISREG_COR;
785 reg.Value = 0;
786 pcmcia_access_configuration_register(link, &reg);
787 OrigCorValue = reg.Value;
788
789 /* Reset Xilinx */
790 reg.Action = CS_WRITE;
791 reg.Offset = CISREG_COR;
792 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
793 OrigCorValue);
794 reg.Value = COR_SOFT_RESET;
795 pcmcia_access_configuration_register(link, &reg);
796 /* Need to wait for 20 ms for PCMCIA to finish reset. */
797
798 /* Restore original COR configuration index */
799 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
800 pcmcia_access_configuration_register(link, &reg);
801 /* Xilinx is now completely reset along with the MACE chip. */
802 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
803
804 #endif /* #if RESET_XILINX */
805
806 /* Xilinx is now completely reset along with the MACE chip. */
807 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
808
809 /* Reinitialize the MACE chip for operation. */
810 mace_init(lp, dev->base_addr, dev->dev_addr);
811 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
812
813 /* Restore the multicast list and enable TX and RX. */
814 restore_multicast_list(dev);
815 } /* nmclan_reset */
816
817 /* ----------------------------------------------------------------------------
818 mace_config
819 [Someone tell me what this is supposed to do? Is if_port a defined
820 standard? If so, there should be defines to indicate 1=10Base-T,
821 2=10Base-2, etc. including limited automatic detection.]
822 ---------------------------------------------------------------------------- */
823 static int mace_config(struct net_device *dev, struct ifmap *map)
824 {
825 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
826 if (map->port <= 2) {
827 dev->if_port = map->port;
828 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
829 if_names[dev->if_port]);
830 } else
831 return -EINVAL;
832 }
833 return 0;
834 } /* mace_config */
835
836 /* ----------------------------------------------------------------------------
837 mace_open
838 Open device driver.
839 ---------------------------------------------------------------------------- */
840 static int mace_open(struct net_device *dev)
841 {
842 unsigned int ioaddr = dev->base_addr;
843 mace_private *lp = netdev_priv(dev);
844 struct pcmcia_device *link = lp->p_dev;
845
846 if (!pcmcia_dev_present(link))
847 return -ENODEV;
848
849 link->open++;
850
851 MACEBANK(0);
852
853 netif_start_queue(dev);
854 nmclan_reset(dev);
855
856 return 0; /* Always succeed */
857 } /* mace_open */
858
859 /* ----------------------------------------------------------------------------
860 mace_close
861 Closes device driver.
862 ---------------------------------------------------------------------------- */
863 static int mace_close(struct net_device *dev)
864 {
865 unsigned int ioaddr = dev->base_addr;
866 mace_private *lp = netdev_priv(dev);
867 struct pcmcia_device *link = lp->p_dev;
868
869 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
870
871 /* Mask off all interrupts from the MACE chip. */
872 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
873
874 link->open--;
875 netif_stop_queue(dev);
876
877 return 0;
878 } /* mace_close */
879
880 static void netdev_get_drvinfo(struct net_device *dev,
881 struct ethtool_drvinfo *info)
882 {
883 strcpy(info->driver, DRV_NAME);
884 strcpy(info->version, DRV_VERSION);
885 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
886 }
887
888 #ifdef PCMCIA_DEBUG
889 static u32 netdev_get_msglevel(struct net_device *dev)
890 {
891 return pc_debug;
892 }
893
894 static void netdev_set_msglevel(struct net_device *dev, u32 level)
895 {
896 pc_debug = level;
897 }
898 #endif /* PCMCIA_DEBUG */
899
900 static const struct ethtool_ops netdev_ethtool_ops = {
901 .get_drvinfo = netdev_get_drvinfo,
902 #ifdef PCMCIA_DEBUG
903 .get_msglevel = netdev_get_msglevel,
904 .set_msglevel = netdev_set_msglevel,
905 #endif /* PCMCIA_DEBUG */
906 };
907
908 /* ----------------------------------------------------------------------------
909 mace_start_xmit
910 This routine begins the packet transmit function. When completed,
911 it will generate a transmit interrupt.
912
913 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
914 returns 0, the "packet is now solely the responsibility of the
915 driver." If _start_xmit returns non-zero, the "transmission
916 failed, put skb back into a list."
917 ---------------------------------------------------------------------------- */
918
919 static void mace_tx_timeout(struct net_device *dev)
920 {
921 mace_private *lp = netdev_priv(dev);
922 struct pcmcia_device *link = lp->p_dev;
923
924 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
925 #if RESET_ON_TIMEOUT
926 printk("resetting card\n");
927 pcmcia_reset_card(link->socket);
928 #else /* #if RESET_ON_TIMEOUT */
929 printk("NOT resetting card\n");
930 #endif /* #if RESET_ON_TIMEOUT */
931 dev->trans_start = jiffies;
932 netif_wake_queue(dev);
933 }
934
935 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
936 {
937 mace_private *lp = netdev_priv(dev);
938 unsigned int ioaddr = dev->base_addr;
939
940 netif_stop_queue(dev);
941
942 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
943 dev->name, (long)skb->len);
944
945 #if (!TX_INTERRUPTABLE)
946 /* Disable MACE TX interrupts. */
947 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
948 ioaddr + AM2150_MACE_BASE + MACE_IMR);
949 lp->tx_irq_disabled=1;
950 #endif /* #if (!TX_INTERRUPTABLE) */
951
952 {
953 /* This block must not be interrupted by another transmit request!
954 mace_tx_timeout will take care of timer-based retransmissions from
955 the upper layers. The interrupt handler is guaranteed never to
956 service a transmit interrupt while we are in here.
957 */
958
959 lp->linux_stats.tx_bytes += skb->len;
960 lp->tx_free_frames--;
961
962 /* WARNING: Write the _exact_ number of bytes written in the header! */
963 /* Put out the word header [must be an outw()] . . . */
964 outw(skb->len, ioaddr + AM2150_XMT);
965 /* . . . and the packet [may be any combination of outw() and outb()] */
966 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
967 if (skb->len & 1) {
968 /* Odd byte transfer */
969 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
970 }
971
972 dev->trans_start = jiffies;
973
974 #if MULTI_TX
975 if (lp->tx_free_frames > 0)
976 netif_start_queue(dev);
977 #endif /* #if MULTI_TX */
978 }
979
980 #if (!TX_INTERRUPTABLE)
981 /* Re-enable MACE TX interrupts. */
982 lp->tx_irq_disabled=0;
983 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
984 #endif /* #if (!TX_INTERRUPTABLE) */
985
986 dev_kfree_skb(skb);
987
988 return 0;
989 } /* mace_start_xmit */
990
991 /* ----------------------------------------------------------------------------
992 mace_interrupt
993 The interrupt handler.
994 ---------------------------------------------------------------------------- */
995 static irqreturn_t mace_interrupt(int irq, void *dev_id)
996 {
997 struct net_device *dev = (struct net_device *) dev_id;
998 mace_private *lp = netdev_priv(dev);
999 unsigned int ioaddr;
1000 int status;
1001 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1002
1003 if (dev == NULL) {
1004 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1005 irq);
1006 return IRQ_NONE;
1007 }
1008
1009 ioaddr = dev->base_addr;
1010
1011 if (lp->tx_irq_disabled) {
1012 printk(
1013 (lp->tx_irq_disabled?
1014 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1015 "[isr=%02X, imr=%02X]\n":
1016 KERN_NOTICE "%s: Re-entering the interrupt handler "
1017 "[isr=%02X, imr=%02X]\n"),
1018 dev->name,
1019 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1020 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1021 );
1022 /* WARNING: MACE_IR has been read! */
1023 return IRQ_NONE;
1024 }
1025
1026 if (!netif_device_present(dev)) {
1027 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1028 return IRQ_NONE;
1029 }
1030
1031 do {
1032 /* WARNING: MACE_IR is a READ/CLEAR port! */
1033 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1034
1035 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1036
1037 if (status & MACE_IR_RCVINT) {
1038 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1039 }
1040
1041 if (status & MACE_IR_XMTINT) {
1042 unsigned char fifofc;
1043 unsigned char xmtrc;
1044 unsigned char xmtfs;
1045
1046 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1047 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1048 lp->linux_stats.tx_errors++;
1049 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1050 }
1051
1052 /* Transmit Retry Count (XMTRC, reg 4) */
1053 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1054 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1055 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1056
1057 if (
1058 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1059 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1060 ) {
1061 lp->mace_stats.xmtsv++;
1062
1063 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1064 if (xmtfs & MACE_XMTFS_UFLO) {
1065 /* Underflow. Indicates that the Transmit FIFO emptied before
1066 the end of frame was reached. */
1067 lp->mace_stats.uflo++;
1068 }
1069 if (xmtfs & MACE_XMTFS_LCOL) {
1070 /* Late Collision */
1071 lp->mace_stats.lcol++;
1072 }
1073 if (xmtfs & MACE_XMTFS_MORE) {
1074 /* MORE than one retry was needed */
1075 lp->mace_stats.more++;
1076 }
1077 if (xmtfs & MACE_XMTFS_ONE) {
1078 /* Exactly ONE retry occurred */
1079 lp->mace_stats.one++;
1080 }
1081 if (xmtfs & MACE_XMTFS_DEFER) {
1082 /* Transmission was defered */
1083 lp->mace_stats.defer++;
1084 }
1085 if (xmtfs & MACE_XMTFS_LCAR) {
1086 /* Loss of carrier */
1087 lp->mace_stats.lcar++;
1088 }
1089 if (xmtfs & MACE_XMTFS_RTRY) {
1090 /* Retry error: transmit aborted after 16 attempts */
1091 lp->mace_stats.rtry++;
1092 }
1093 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1094
1095 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1096
1097 lp->linux_stats.tx_packets++;
1098 lp->tx_free_frames++;
1099 netif_wake_queue(dev);
1100 } /* if (status & MACE_IR_XMTINT) */
1101
1102 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1103 if (status & MACE_IR_JAB) {
1104 /* Jabber Error. Excessive transmit duration (20-150ms). */
1105 lp->mace_stats.jab++;
1106 }
1107 if (status & MACE_IR_BABL) {
1108 /* Babble Error. >1518 bytes transmitted. */
1109 lp->mace_stats.babl++;
1110 }
1111 if (status & MACE_IR_CERR) {
1112 /* Collision Error. CERR indicates the absence of the
1113 Signal Quality Error Test message after a packet
1114 transmission. */
1115 lp->mace_stats.cerr++;
1116 }
1117 if (status & MACE_IR_RCVCCO) {
1118 /* Receive Collision Count Overflow; */
1119 lp->mace_stats.rcvcco++;
1120 }
1121 if (status & MACE_IR_RNTPCO) {
1122 /* Runt Packet Count Overflow */
1123 lp->mace_stats.rntpco++;
1124 }
1125 if (status & MACE_IR_MPCO) {
1126 /* Missed Packet Count Overflow */
1127 lp->mace_stats.mpco++;
1128 }
1129 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1130
1131 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1132
1133 return IRQ_HANDLED;
1134 } /* mace_interrupt */
1135
1136 /* ----------------------------------------------------------------------------
1137 mace_rx
1138 Receives packets.
1139 ---------------------------------------------------------------------------- */
1140 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1141 {
1142 mace_private *lp = netdev_priv(dev);
1143 unsigned int ioaddr = dev->base_addr;
1144 unsigned char rx_framecnt;
1145 unsigned short rx_status;
1146
1147 while (
1148 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1149 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1150 (RxCnt--)
1151 ) {
1152 rx_status = inw(ioaddr + AM2150_RCV);
1153
1154 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1155 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1156
1157 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1158 lp->linux_stats.rx_errors++;
1159 if (rx_status & MACE_RCVFS_OFLO) {
1160 lp->mace_stats.oflo++;
1161 }
1162 if (rx_status & MACE_RCVFS_CLSN) {
1163 lp->mace_stats.clsn++;
1164 }
1165 if (rx_status & MACE_RCVFS_FRAM) {
1166 lp->mace_stats.fram++;
1167 }
1168 if (rx_status & MACE_RCVFS_FCS) {
1169 lp->mace_stats.fcs++;
1170 }
1171 } else {
1172 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1173 /* Auto Strip is off, always subtract 4 */
1174 struct sk_buff *skb;
1175
1176 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1177 /* runt packet count */
1178 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1179 /* rcv collision count */
1180
1181 DEBUG(3, " receiving packet size 0x%X rx_status"
1182 " 0x%X.\n", pkt_len, rx_status);
1183
1184 skb = dev_alloc_skb(pkt_len+2);
1185
1186 if (skb != NULL) {
1187 skb_reserve(skb, 2);
1188 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1189 if (pkt_len & 1)
1190 *(skb_tail_pointer(skb) - 1) = inb(ioaddr + AM2150_RCV);
1191 skb->protocol = eth_type_trans(skb, dev);
1192
1193 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1194
1195 lp->linux_stats.rx_packets++;
1196 lp->linux_stats.rx_bytes += pkt_len;
1197 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1198 continue;
1199 } else {
1200 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1201 " %d.\n", dev->name, pkt_len);
1202 lp->linux_stats.rx_dropped++;
1203 }
1204 }
1205 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1206 } /* while */
1207
1208 return 0;
1209 } /* mace_rx */
1210
1211 /* ----------------------------------------------------------------------------
1212 pr_linux_stats
1213 ---------------------------------------------------------------------------- */
1214 static void pr_linux_stats(struct net_device_stats *pstats)
1215 {
1216 DEBUG(2, "pr_linux_stats\n");
1217 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1218 (long)pstats->rx_packets, (long)pstats->tx_packets);
1219 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1220 (long)pstats->rx_errors, (long)pstats->tx_errors);
1221 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1222 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1223 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1224 (long)pstats->multicast, (long)pstats->collisions);
1225
1226 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1227 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1228 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1229 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1230 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1231 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1232
1233 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1234 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1235 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1236 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1237 DEBUG(2, " tx_window_errors=%ld\n",
1238 (long)pstats->tx_window_errors);
1239 } /* pr_linux_stats */
1240
1241 /* ----------------------------------------------------------------------------
1242 pr_mace_stats
1243 ---------------------------------------------------------------------------- */
1244 static void pr_mace_stats(mace_statistics *pstats)
1245 {
1246 DEBUG(2, "pr_mace_stats\n");
1247
1248 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1249 pstats->xmtsv, pstats->uflo);
1250 DEBUG(2, " lcol=%-7d more=%d\n",
1251 pstats->lcol, pstats->more);
1252 DEBUG(2, " one=%-7d defer=%d\n",
1253 pstats->one, pstats->defer);
1254 DEBUG(2, " lcar=%-7d rtry=%d\n",
1255 pstats->lcar, pstats->rtry);
1256
1257 /* MACE_XMTRC */
1258 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1259 pstats->exdef, pstats->xmtrc);
1260
1261 /* RFS1--Receive Status (RCVSTS) */
1262 DEBUG(2, " oflo=%-7d clsn=%d\n",
1263 pstats->oflo, pstats->clsn);
1264 DEBUG(2, " fram=%-7d fcs=%d\n",
1265 pstats->fram, pstats->fcs);
1266
1267 /* RFS2--Runt Packet Count (RNTPC) */
1268 /* RFS3--Receive Collision Count (RCVCC) */
1269 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1270 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1271
1272 /* MACE_IR */
1273 DEBUG(2, " jab=%-7d babl=%d\n",
1274 pstats->jab, pstats->babl);
1275 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1276 pstats->cerr, pstats->rcvcco);
1277 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1278 pstats->rntpco, pstats->mpco);
1279
1280 /* MACE_MPC */
1281 DEBUG(2, " mpc=%d\n", pstats->mpc);
1282
1283 /* MACE_RNTPC */
1284 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1285
1286 /* MACE_RCVCC */
1287 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1288
1289 } /* pr_mace_stats */
1290
1291 /* ----------------------------------------------------------------------------
1292 update_stats
1293 Update statistics. We change to register window 1, so this
1294 should be run single-threaded if the device is active. This is
1295 expected to be a rare operation, and it's simpler for the rest
1296 of the driver to assume that window 0 is always valid rather
1297 than use a special window-state variable.
1298
1299 oflo & uflo should _never_ occur since it would mean the Xilinx
1300 was not able to transfer data between the MACE FIFO and the
1301 card's SRAM fast enough. If this happens, something is
1302 seriously wrong with the hardware.
1303 ---------------------------------------------------------------------------- */
1304 static void update_stats(unsigned int ioaddr, struct net_device *dev)
1305 {
1306 mace_private *lp = netdev_priv(dev);
1307
1308 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1309 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1310 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1311 /* At this point, mace_stats is fully updated for this call.
1312 We may now update the linux_stats. */
1313
1314 /* The MACE has no equivalent for linux_stats field which are commented
1315 out. */
1316
1317 /* lp->linux_stats.multicast; */
1318 lp->linux_stats.collisions =
1319 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1320 /* Collision: The MACE may retry sending a packet 15 times
1321 before giving up. The retry count is in XMTRC.
1322 Does each retry constitute a collision?
1323 If so, why doesn't the RCVCC record these collisions? */
1324
1325 /* detailed rx_errors: */
1326 lp->linux_stats.rx_length_errors =
1327 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1328 /* lp->linux_stats.rx_over_errors */
1329 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1330 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1331 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1332 lp->linux_stats.rx_missed_errors =
1333 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1334
1335 /* detailed tx_errors */
1336 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1337 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1338 /* LCAR usually results from bad cabling. */
1339 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1340 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1341 /* lp->linux_stats.tx_window_errors; */
1342
1343 return;
1344 } /* update_stats */
1345
1346 /* ----------------------------------------------------------------------------
1347 mace_get_stats
1348 Gathers ethernet statistics from the MACE chip.
1349 ---------------------------------------------------------------------------- */
1350 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1351 {
1352 mace_private *lp = netdev_priv(dev);
1353
1354 update_stats(dev->base_addr, dev);
1355
1356 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1357 pr_linux_stats(&lp->linux_stats);
1358 pr_mace_stats(&lp->mace_stats);
1359
1360 return &lp->linux_stats;
1361 } /* net_device_stats */
1362
1363 /* ----------------------------------------------------------------------------
1364 updateCRC
1365 Modified from Am79C90 data sheet.
1366 ---------------------------------------------------------------------------- */
1367
1368 #ifdef BROKEN_MULTICAST
1369
1370 static void updateCRC(int *CRC, int bit)
1371 {
1372 int poly[]={
1373 1,1,1,0, 1,1,0,1,
1374 1,0,1,1, 1,0,0,0,
1375 1,0,0,0, 0,0,1,1,
1376 0,0,1,0, 0,0,0,0
1377 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1378 CRC generator polynomial. */
1379
1380 int j;
1381
1382 /* shift CRC and control bit (CRC[32]) */
1383 for (j = 32; j > 0; j--)
1384 CRC[j] = CRC[j-1];
1385 CRC[0] = 0;
1386
1387 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1388 if (bit ^ CRC[32])
1389 for (j = 0; j < 32; j++)
1390 CRC[j] ^= poly[j];
1391 } /* updateCRC */
1392
1393 /* ----------------------------------------------------------------------------
1394 BuildLAF
1395 Build logical address filter.
1396 Modified from Am79C90 data sheet.
1397
1398 Input
1399 ladrf: logical address filter (contents initialized to 0)
1400 adr: ethernet address
1401 ---------------------------------------------------------------------------- */
1402 static void BuildLAF(int *ladrf, int *adr)
1403 {
1404 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1405
1406 int i, byte; /* temporary array indices */
1407 int hashcode; /* the output object */
1408
1409 CRC[32]=0;
1410
1411 for (byte = 0; byte < 6; byte++)
1412 for (i = 0; i < 8; i++)
1413 updateCRC(CRC, (adr[byte] >> i) & 1);
1414
1415 hashcode = 0;
1416 for (i = 0; i < 6; i++)
1417 hashcode = (hashcode << 1) + CRC[i];
1418
1419 byte = hashcode >> 3;
1420 ladrf[byte] |= (1 << (hashcode & 7));
1421
1422 #ifdef PCMCIA_DEBUG
1423 if (pc_debug > 2) {
1424 printk(KERN_DEBUG " adr =");
1425 for (i = 0; i < 6; i++)
1426 printk(" %02X", adr[i]);
1427 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1428 " =", hashcode);
1429 for (i = 0; i < 8; i++)
1430 printk(" %02X", ladrf[i]);
1431 printk("\n");
1432 }
1433 #endif
1434 } /* BuildLAF */
1435
1436 /* ----------------------------------------------------------------------------
1437 restore_multicast_list
1438 Restores the multicast filter for MACE chip to the last
1439 set_multicast_list() call.
1440
1441 Input
1442 multicast_num_addrs
1443 multicast_ladrf[]
1444 ---------------------------------------------------------------------------- */
1445 static void restore_multicast_list(struct net_device *dev)
1446 {
1447 mace_private *lp = netdev_priv(dev);
1448 int num_addrs = lp->multicast_num_addrs;
1449 int *ladrf = lp->multicast_ladrf;
1450 unsigned int ioaddr = dev->base_addr;
1451 int i;
1452
1453 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1454 dev->name, num_addrs);
1455
1456 if (num_addrs > 0) {
1457
1458 DEBUG(1, "Attempt to restore multicast list detected.\n");
1459
1460 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1461 /* Poll ADDRCHG bit */
1462 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1463 ;
1464 /* Set LADRF register */
1465 for (i = 0; i < MACE_LADRF_LEN; i++)
1466 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1467
1468 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1469 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1470
1471 } else if (num_addrs < 0) {
1472
1473 /* Promiscuous mode: receive all packets */
1474 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1475 mace_write(lp, ioaddr, MACE_MACCC,
1476 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1477 );
1478
1479 } else {
1480
1481 /* Normal mode */
1482 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1483 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1484
1485 }
1486 } /* restore_multicast_list */
1487
1488 /* ----------------------------------------------------------------------------
1489 set_multicast_list
1490 Set or clear the multicast filter for this adaptor.
1491
1492 Input
1493 num_addrs == -1 Promiscuous mode, receive all packets
1494 num_addrs == 0 Normal mode, clear multicast list
1495 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1496 best-effort filtering.
1497 Output
1498 multicast_num_addrs
1499 multicast_ladrf[]
1500 ---------------------------------------------------------------------------- */
1501
1502 static void set_multicast_list(struct net_device *dev)
1503 {
1504 mace_private *lp = netdev_priv(dev);
1505 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1506 int i;
1507 struct dev_mc_list *dmi = dev->mc_list;
1508
1509 #ifdef PCMCIA_DEBUG
1510 if (pc_debug > 1) {
1511 static int old;
1512 if (dev->mc_count != old) {
1513 old = dev->mc_count;
1514 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1515 dev->name, old);
1516 }
1517 }
1518 #endif
1519
1520 /* Set multicast_num_addrs. */
1521 lp->multicast_num_addrs = dev->mc_count;
1522
1523 /* Set multicast_ladrf. */
1524 if (num_addrs > 0) {
1525 /* Calculate multicast logical address filter */
1526 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1527 for (i = 0; i < dev->mc_count; i++) {
1528 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1529 dmi = dmi->next;
1530 BuildLAF(lp->multicast_ladrf, adr);
1531 }
1532 }
1533
1534 restore_multicast_list(dev);
1535
1536 } /* set_multicast_list */
1537
1538 #endif /* BROKEN_MULTICAST */
1539
1540 static void restore_multicast_list(struct net_device *dev)
1541 {
1542 unsigned int ioaddr = dev->base_addr;
1543 mace_private *lp = netdev_priv(dev);
1544
1545 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1546 lp->multicast_num_addrs);
1547
1548 if (dev->flags & IFF_PROMISC) {
1549 /* Promiscuous mode: receive all packets */
1550 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1551 mace_write(lp, ioaddr, MACE_MACCC,
1552 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1553 );
1554 } else {
1555 /* Normal mode */
1556 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1557 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1558 }
1559 } /* restore_multicast_list */
1560
1561 static void set_multicast_list(struct net_device *dev)
1562 {
1563 mace_private *lp = netdev_priv(dev);
1564
1565 #ifdef PCMCIA_DEBUG
1566 if (pc_debug > 1) {
1567 static int old;
1568 if (dev->mc_count != old) {
1569 old = dev->mc_count;
1570 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1571 dev->name, old);
1572 }
1573 }
1574 #endif
1575
1576 lp->multicast_num_addrs = dev->mc_count;
1577 restore_multicast_list(dev);
1578
1579 } /* set_multicast_list */
1580
1581 static struct pcmcia_device_id nmclan_ids[] = {
1582 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1583 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1584 PCMCIA_DEVICE_NULL,
1585 };
1586 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1587
1588 static struct pcmcia_driver nmclan_cs_driver = {
1589 .owner = THIS_MODULE,
1590 .drv = {
1591 .name = "nmclan_cs",
1592 },
1593 .probe = nmclan_probe,
1594 .remove = nmclan_detach,
1595 .id_table = nmclan_ids,
1596 .suspend = nmclan_suspend,
1597 .resume = nmclan_resume,
1598 };
1599
1600 static int __init init_nmclan_cs(void)
1601 {
1602 return pcmcia_register_driver(&nmclan_cs_driver);
1603 }
1604
1605 static void __exit exit_nmclan_cs(void)
1606 {
1607 pcmcia_unregister_driver(&nmclan_cs_driver);
1608 }
1609
1610 module_init(init_nmclan_cs);
1611 module_exit(exit_nmclan_cs);
Linux kernel - Deliverables
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