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Merge branch 'perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux...
[deliverable/linux.git] / drivers / net / pcmcia / smc91c92_cs.c
1 /*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26 ======================================================================*/
27
28 #include <linux/module.h>
29 #include <linux/kernel.h>
30 #include <linux/init.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
33 #include <linux/timer.h>
34 #include <linux/interrupt.h>
35 #include <linux/delay.h>
36 #include <linux/crc32.h>
37 #include <linux/netdevice.h>
38 #include <linux/etherdevice.h>
39 #include <linux/skbuff.h>
40 #include <linux/if_arp.h>
41 #include <linux/ioport.h>
42 #include <linux/ethtool.h>
43 #include <linux/mii.h>
44 #include <linux/jiffies.h>
45 #include <linux/firmware.h>
46
47 #include <pcmcia/cistpl.h>
48 #include <pcmcia/cisreg.h>
49 #include <pcmcia/ciscode.h>
50 #include <pcmcia/ds.h>
51 #include <pcmcia/ss.h>
52
53 #include <asm/io.h>
54 #include <asm/system.h>
55 #include <asm/uaccess.h>
56
57 /*====================================================================*/
58
59 static const char *if_names[] = { "auto", "10baseT", "10base2"};
60
61 /* Firmware name */
62 #define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
63
64 /* Module parameters */
65
66 MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67 MODULE_LICENSE("GPL");
68 MODULE_FIRMWARE(FIRMWARE_NAME);
69
70 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71
72 /*
73 Transceiver/media type.
74 0 = auto
75 1 = 10baseT (and autoselect if #define AUTOSELECT),
76 2 = AUI/10base2,
77 */
78 INT_MODULE_PARM(if_port, 0);
79
80
81 #define DRV_NAME "smc91c92_cs"
82 #define DRV_VERSION "1.123"
83
84 /*====================================================================*/
85
86 /* Operational parameter that usually are not changed. */
87
88 /* Time in jiffies before concluding Tx hung */
89 #define TX_TIMEOUT ((400*HZ)/1000)
90
91 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92 #define INTR_WORK 4
93
94 /* Times to check the check the chip before concluding that it doesn't
95 currently have room for another Tx packet. */
96 #define MEMORY_WAIT_TIME 8
97
98 struct smc_private {
99 struct pcmcia_device *p_dev;
100 spinlock_t lock;
101 u_short manfid;
102 u_short cardid;
103
104 struct sk_buff *saved_skb;
105 int packets_waiting;
106 void __iomem *base;
107 u_short cfg;
108 struct timer_list media;
109 int watchdog, tx_err;
110 u_short media_status;
111 u_short fast_poll;
112 u_short link_status;
113 struct mii_if_info mii_if;
114 int duplex;
115 int rx_ovrn;
116 };
117
118 /* Special definitions for Megahertz multifunction cards */
119 #define MEGAHERTZ_ISR 0x0380
120
121 /* Special function registers for Motorola Mariner */
122 #define MOT_LAN 0x0000
123 #define MOT_UART 0x0020
124 #define MOT_EEPROM 0x20
125
126 #define MOT_NORMAL \
127 (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
128
129 /* Special function registers for Ositech cards */
130 #define OSITECH_AUI_CTL 0x0c
131 #define OSITECH_PWRDOWN 0x0d
132 #define OSITECH_RESET 0x0e
133 #define OSITECH_ISR 0x0f
134 #define OSITECH_AUI_PWR 0x0c
135 #define OSITECH_RESET_ISR 0x0e
136
137 #define OSI_AUI_PWR 0x40
138 #define OSI_LAN_PWRDOWN 0x02
139 #define OSI_MODEM_PWRDOWN 0x01
140 #define OSI_LAN_RESET 0x02
141 #define OSI_MODEM_RESET 0x01
142
143 /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
144 #define BANK_SELECT 14 /* Window select register. */
145 #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
146
147 /* Bank 0 registers. */
148 #define TCR 0 /* transmit control register */
149 #define TCR_CLEAR 0 /* do NOTHING */
150 #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
151 #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
152 #define TCR_MONCSN 0x0400 /* Monitor Carrier. */
153 #define TCR_FDUPLX 0x0800 /* Full duplex mode. */
154 #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
155
156 #define EPH 2 /* Ethernet Protocol Handler report. */
157 #define EPH_TX_SUC 0x0001
158 #define EPH_SNGLCOL 0x0002
159 #define EPH_MULCOL 0x0004
160 #define EPH_LTX_MULT 0x0008
161 #define EPH_16COL 0x0010
162 #define EPH_SQET 0x0020
163 #define EPH_LTX_BRD 0x0040
164 #define EPH_TX_DEFR 0x0080
165 #define EPH_LAT_COL 0x0200
166 #define EPH_LOST_CAR 0x0400
167 #define EPH_EXC_DEF 0x0800
168 #define EPH_CTR_ROL 0x1000
169 #define EPH_RX_OVRN 0x2000
170 #define EPH_LINK_OK 0x4000
171 #define EPH_TX_UNRN 0x8000
172 #define MEMINFO 8 /* Memory Information Register */
173 #define MEMCFG 10 /* Memory Configuration Register */
174
175 /* Bank 1 registers. */
176 #define CONFIG 0
177 #define CFG_MII_SELECT 0x8000 /* 91C100 only */
178 #define CFG_NO_WAIT 0x1000
179 #define CFG_FULL_STEP 0x0400
180 #define CFG_SET_SQLCH 0x0200
181 #define CFG_AUI_SELECT 0x0100
182 #define CFG_16BIT 0x0080
183 #define CFG_DIS_LINK 0x0040
184 #define CFG_STATIC 0x0030
185 #define CFG_IRQ_SEL_1 0x0004
186 #define CFG_IRQ_SEL_0 0x0002
187 #define BASE_ADDR 2
188 #define ADDR0 4
189 #define GENERAL 10
190 #define CONTROL 12
191 #define CTL_STORE 0x0001
192 #define CTL_RELOAD 0x0002
193 #define CTL_EE_SELECT 0x0004
194 #define CTL_TE_ENABLE 0x0020
195 #define CTL_CR_ENABLE 0x0040
196 #define CTL_LE_ENABLE 0x0080
197 #define CTL_AUTO_RELEASE 0x0800
198 #define CTL_POWERDOWN 0x2000
199
200 /* Bank 2 registers. */
201 #define MMU_CMD 0
202 #define MC_ALLOC 0x20 /* or with number of 256 byte packets */
203 #define MC_RESET 0x40
204 #define MC_RELEASE 0x80 /* remove and release the current rx packet */
205 #define MC_FREEPKT 0xA0 /* Release packet in PNR register */
206 #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
207 #define PNR_ARR 2
208 #define FIFO_PORTS 4
209 #define FP_RXEMPTY 0x8000
210 #define POINTER 6
211 #define PTR_AUTO_INC 0x0040
212 #define PTR_READ 0x2000
213 #define PTR_AUTOINC 0x4000
214 #define PTR_RCV 0x8000
215 #define DATA_1 8
216 #define INTERRUPT 12
217 #define IM_RCV_INT 0x1
218 #define IM_TX_INT 0x2
219 #define IM_TX_EMPTY_INT 0x4
220 #define IM_ALLOC_INT 0x8
221 #define IM_RX_OVRN_INT 0x10
222 #define IM_EPH_INT 0x20
223
224 #define RCR 4
225 enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
226 RxEnable = 0x0100, RxStripCRC = 0x0200};
227 #define RCR_SOFTRESET 0x8000 /* resets the chip */
228 #define RCR_STRIP_CRC 0x200 /* strips CRC */
229 #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
230 #define RCR_ALMUL 0x4 /* receive all multicast packets */
231 #define RCR_PROMISC 0x2 /* enable promiscuous mode */
232
233 /* the normal settings for the RCR register : */
234 #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
235 #define RCR_CLEAR 0x0 /* set it to a base state */
236 #define COUNTER 6
237
238 /* BANK 3 -- not the same values as in smc9194! */
239 #define MULTICAST0 0
240 #define MULTICAST2 2
241 #define MULTICAST4 4
242 #define MULTICAST6 6
243 #define MGMT 8
244 #define REVISION 0x0a
245
246 /* Transmit status bits. */
247 #define TS_SUCCESS 0x0001
248 #define TS_16COL 0x0010
249 #define TS_LATCOL 0x0200
250 #define TS_LOSTCAR 0x0400
251
252 /* Receive status bits. */
253 #define RS_ALGNERR 0x8000
254 #define RS_BADCRC 0x2000
255 #define RS_ODDFRAME 0x1000
256 #define RS_TOOLONG 0x0800
257 #define RS_TOOSHORT 0x0400
258 #define RS_MULTICAST 0x0001
259 #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
260
261 #define set_bits(v, p) outw(inw(p)|(v), (p))
262 #define mask_bits(v, p) outw(inw(p)&(v), (p))
263
264 /*====================================================================*/
265
266 static void smc91c92_detach(struct pcmcia_device *p_dev);
267 static int smc91c92_config(struct pcmcia_device *link);
268 static void smc91c92_release(struct pcmcia_device *link);
269
270 static int smc_open(struct net_device *dev);
271 static int smc_close(struct net_device *dev);
272 static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
273 static void smc_tx_timeout(struct net_device *dev);
274 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
275 struct net_device *dev);
276 static irqreturn_t smc_interrupt(int irq, void *dev_id);
277 static void smc_rx(struct net_device *dev);
278 static void set_rx_mode(struct net_device *dev);
279 static int s9k_config(struct net_device *dev, struct ifmap *map);
280 static void smc_set_xcvr(struct net_device *dev, int if_port);
281 static void smc_reset(struct net_device *dev);
282 static void media_check(u_long arg);
283 static void mdio_sync(unsigned int addr);
284 static int mdio_read(struct net_device *dev, int phy_id, int loc);
285 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
286 static int smc_link_ok(struct net_device *dev);
287 static const struct ethtool_ops ethtool_ops;
288
289 static const struct net_device_ops smc_netdev_ops = {
290 .ndo_open = smc_open,
291 .ndo_stop = smc_close,
292 .ndo_start_xmit = smc_start_xmit,
293 .ndo_tx_timeout = smc_tx_timeout,
294 .ndo_set_config = s9k_config,
295 .ndo_set_multicast_list = set_rx_mode,
296 .ndo_do_ioctl = &smc_ioctl,
297 .ndo_change_mtu = eth_change_mtu,
298 .ndo_set_mac_address = eth_mac_addr,
299 .ndo_validate_addr = eth_validate_addr,
300 };
301
302 static int smc91c92_probe(struct pcmcia_device *link)
303 {
304 struct smc_private *smc;
305 struct net_device *dev;
306
307 dev_dbg(&link->dev, "smc91c92_attach()\n");
308
309 /* Create new ethernet device */
310 dev = alloc_etherdev(sizeof(struct smc_private));
311 if (!dev)
312 return -ENOMEM;
313 smc = netdev_priv(dev);
314 smc->p_dev = link;
315 link->priv = dev;
316
317 spin_lock_init(&smc->lock);
318
319 /* The SMC91c92-specific entries in the device structure. */
320 dev->netdev_ops = &smc_netdev_ops;
321 SET_ETHTOOL_OPS(dev, &ethtool_ops);
322 dev->watchdog_timeo = TX_TIMEOUT;
323
324 smc->mii_if.dev = dev;
325 smc->mii_if.mdio_read = mdio_read;
326 smc->mii_if.mdio_write = mdio_write;
327 smc->mii_if.phy_id_mask = 0x1f;
328 smc->mii_if.reg_num_mask = 0x1f;
329
330 return smc91c92_config(link);
331 } /* smc91c92_attach */
332
333 static void smc91c92_detach(struct pcmcia_device *link)
334 {
335 struct net_device *dev = link->priv;
336
337 dev_dbg(&link->dev, "smc91c92_detach\n");
338
339 unregister_netdev(dev);
340
341 smc91c92_release(link);
342
343 free_netdev(dev);
344 } /* smc91c92_detach */
345
346 /*====================================================================*/
347
348 static int cvt_ascii_address(struct net_device *dev, char *s)
349 {
350 int i, j, da, c;
351
352 if (strlen(s) != 12)
353 return -1;
354 for (i = 0; i < 6; i++) {
355 da = 0;
356 for (j = 0; j < 2; j++) {
357 c = *s++;
358 da <<= 4;
359 da += ((c >= '0') && (c <= '9')) ?
360 (c - '0') : ((c & 0x0f) + 9);
361 }
362 dev->dev_addr[i] = da;
363 }
364 return 0;
365 }
366
367 /*====================================================================
368
369 Configuration stuff for Megahertz cards
370
371 mhz_3288_power() is used to power up a 3288's ethernet chip.
372 mhz_mfc_config() handles socket setup for multifunction (1144
373 and 3288) cards. mhz_setup() gets a card's hardware ethernet
374 address.
375
376 ======================================================================*/
377
378 static int mhz_3288_power(struct pcmcia_device *link)
379 {
380 struct net_device *dev = link->priv;
381 struct smc_private *smc = netdev_priv(dev);
382 u_char tmp;
383
384 /* Read the ISR twice... */
385 readb(smc->base+MEGAHERTZ_ISR);
386 udelay(5);
387 readb(smc->base+MEGAHERTZ_ISR);
388
389 /* Pause 200ms... */
390 mdelay(200);
391
392 /* Now read and write the COR... */
393 tmp = readb(smc->base + link->config_base + CISREG_COR);
394 udelay(5);
395 writeb(tmp, smc->base + link->config_base + CISREG_COR);
396
397 return 0;
398 }
399
400 static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
401 {
402 int k;
403 p_dev->io_lines = 16;
404 p_dev->resource[1]->start = p_dev->resource[0]->start;
405 p_dev->resource[1]->end = 8;
406 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
407 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
408 p_dev->resource[0]->end = 16;
409 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
410 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
411 for (k = 0; k < 0x400; k += 0x10) {
412 if (k & 0x80)
413 continue;
414 p_dev->resource[0]->start = k ^ 0x300;
415 if (!pcmcia_request_io(p_dev))
416 return 0;
417 }
418 return -ENODEV;
419 }
420
421 static int mhz_mfc_config(struct pcmcia_device *link)
422 {
423 struct net_device *dev = link->priv;
424 struct smc_private *smc = netdev_priv(dev);
425 unsigned int offset;
426 int i;
427
428 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
429 CONF_AUTO_SET_IO;
430
431 /* The Megahertz combo cards have modem-like CIS entries, so
432 we have to explicitly try a bunch of port combinations. */
433 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
434 return -ENODEV;
435
436 dev->base_addr = link->resource[0]->start;
437
438 /* Allocate a memory window, for accessing the ISR */
439 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
440 link->resource[2]->start = link->resource[2]->end = 0;
441 i = pcmcia_request_window(link, link->resource[2], 0);
442 if (i != 0)
443 return -ENODEV;
444
445 smc->base = ioremap(link->resource[2]->start,
446 resource_size(link->resource[2]));
447 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
448 i = pcmcia_map_mem_page(link, link->resource[2], offset);
449 if ((i == 0) &&
450 (smc->manfid == MANFID_MEGAHERTZ) &&
451 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
452 mhz_3288_power(link);
453
454 return 0;
455 }
456
457 static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
458 tuple_t *tuple,
459 void *priv)
460 {
461 struct net_device *dev = priv;
462 cisparse_t parse;
463 u8 *buf;
464
465 if (pcmcia_parse_tuple(tuple, &parse))
466 return -EINVAL;
467
468 buf = parse.version_1.str + parse.version_1.ofs[3];
469
470 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
471 return 0;
472
473 return -EINVAL;
474 };
475
476 static int mhz_setup(struct pcmcia_device *link)
477 {
478 struct net_device *dev = link->priv;
479 size_t len;
480 u8 *buf;
481 int rc;
482
483 /* Read the station address from the CIS. It is stored as the last
484 (fourth) string in the Version 1 Version/ID tuple. */
485 if ((link->prod_id[3]) &&
486 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
487 return 0;
488
489 /* Workarounds for broken cards start here. */
490 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
491 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
492 return 0;
493
494 /* Another possibility: for the EM3288, in a special tuple */
495 rc = -1;
496 len = pcmcia_get_tuple(link, 0x81, &buf);
497 if (buf && len >= 13) {
498 buf[12] = '\0';
499 if (cvt_ascii_address(dev, buf) == 0)
500 rc = 0;
501 }
502 kfree(buf);
503
504 return rc;
505 };
506
507 /*======================================================================
508
509 Configuration stuff for the Motorola Mariner
510
511 mot_config() writes directly to the Mariner configuration
512 registers because the CIS is just bogus.
513
514 ======================================================================*/
515
516 static void mot_config(struct pcmcia_device *link)
517 {
518 struct net_device *dev = link->priv;
519 struct smc_private *smc = netdev_priv(dev);
520 unsigned int ioaddr = dev->base_addr;
521 unsigned int iouart = link->resource[1]->start;
522
523 /* Set UART base address and force map with COR bit 1 */
524 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
525 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
526 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
527
528 /* Set SMC base address and force map with COR bit 1 */
529 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
530 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
531 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
532
533 /* Wait for things to settle down */
534 mdelay(100);
535 }
536
537 static int mot_setup(struct pcmcia_device *link)
538 {
539 struct net_device *dev = link->priv;
540 unsigned int ioaddr = dev->base_addr;
541 int i, wait, loop;
542 u_int addr;
543
544 /* Read Ethernet address from Serial EEPROM */
545
546 for (i = 0; i < 3; i++) {
547 SMC_SELECT_BANK(2);
548 outw(MOT_EEPROM + i, ioaddr + POINTER);
549 SMC_SELECT_BANK(1);
550 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
551
552 for (loop = wait = 0; loop < 200; loop++) {
553 udelay(10);
554 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
555 if (wait == 0) break;
556 }
557
558 if (wait)
559 return -1;
560
561 addr = inw(ioaddr + GENERAL);
562 dev->dev_addr[2*i] = addr & 0xff;
563 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
564 }
565
566 return 0;
567 }
568
569 /*====================================================================*/
570
571 static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
572 {
573 p_dev->resource[0]->end = 16;
574 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
575 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
576
577 return pcmcia_request_io(p_dev);
578 }
579
580 static int smc_config(struct pcmcia_device *link)
581 {
582 struct net_device *dev = link->priv;
583 int i;
584
585 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
586
587 i = pcmcia_loop_config(link, smc_configcheck, NULL);
588 if (!i)
589 dev->base_addr = link->resource[0]->start;
590
591 return i;
592 }
593
594
595 static int smc_setup(struct pcmcia_device *link)
596 {
597 struct net_device *dev = link->priv;
598
599 /* Check for a LAN function extension tuple */
600 if (!pcmcia_get_mac_from_cis(link, dev))
601 return 0;
602
603 /* Try the third string in the Version 1 Version/ID tuple. */
604 if (link->prod_id[2]) {
605 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
606 return 0;
607 }
608 return -1;
609 }
610
611 /*====================================================================*/
612
613 static int osi_config(struct pcmcia_device *link)
614 {
615 struct net_device *dev = link->priv;
616 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
617 int i, j;
618
619 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
620 link->resource[0]->end = 64;
621 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
622 link->resource[1]->end = 8;
623
624 /* Enable Hard Decode, LAN, Modem */
625 link->io_lines = 16;
626 link->config_index = 0x23;
627
628 for (i = j = 0; j < 4; j++) {
629 link->resource[1]->start = com[j];
630 i = pcmcia_request_io(link);
631 if (i == 0)
632 break;
633 }
634 if (i != 0) {
635 /* Fallback: turn off hard decode */
636 link->config_index = 0x03;
637 link->resource[1]->end = 0;
638 i = pcmcia_request_io(link);
639 }
640 dev->base_addr = link->resource[0]->start + 0x10;
641 return i;
642 }
643
644 static int osi_load_firmware(struct pcmcia_device *link)
645 {
646 const struct firmware *fw;
647 int i, err;
648
649 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
650 if (err) {
651 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
652 return err;
653 }
654
655 /* Download the Seven of Diamonds firmware */
656 for (i = 0; i < fw->size; i++) {
657 outb(fw->data[i], link->resource[0]->start + 2);
658 udelay(50);
659 }
660 release_firmware(fw);
661 return err;
662 }
663
664 static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
665 tuple_t *tuple,
666 void *priv)
667 {
668 struct net_device *dev = priv;
669 int i;
670
671 if (tuple->TupleDataLen < 8)
672 return -EINVAL;
673 if (tuple->TupleData[0] != 0x04)
674 return -EINVAL;
675 for (i = 0; i < 6; i++)
676 dev->dev_addr[i] = tuple->TupleData[i+2];
677 return 0;
678 };
679
680
681 static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
682 {
683 struct net_device *dev = link->priv;
684 int rc;
685
686 /* Read the station address from tuple 0x90, subtuple 0x04 */
687 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
688 return -1;
689
690 if (((manfid == MANFID_OSITECH) &&
691 (cardid == PRODID_OSITECH_SEVEN)) ||
692 ((manfid == MANFID_PSION) &&
693 (cardid == PRODID_PSION_NET100))) {
694 rc = osi_load_firmware(link);
695 if (rc)
696 return rc;
697 } else if (manfid == MANFID_OSITECH) {
698 /* Make sure both functions are powered up */
699 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
700 /* Now, turn on the interrupt for both card functions */
701 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
702 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
703 inw(link->resource[0]->start + OSITECH_AUI_PWR),
704 inw(link->resource[0]->start + OSITECH_RESET_ISR));
705 }
706 return 0;
707 }
708
709 static int smc91c92_suspend(struct pcmcia_device *link)
710 {
711 struct net_device *dev = link->priv;
712
713 if (link->open)
714 netif_device_detach(dev);
715
716 return 0;
717 }
718
719 static int smc91c92_resume(struct pcmcia_device *link)
720 {
721 struct net_device *dev = link->priv;
722 struct smc_private *smc = netdev_priv(dev);
723 int i;
724
725 if ((smc->manfid == MANFID_MEGAHERTZ) &&
726 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
727 mhz_3288_power(link);
728 if (smc->manfid == MANFID_MOTOROLA)
729 mot_config(link);
730 if ((smc->manfid == MANFID_OSITECH) &&
731 (smc->cardid != PRODID_OSITECH_SEVEN)) {
732 /* Power up the card and enable interrupts */
733 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
734 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
735 }
736 if (((smc->manfid == MANFID_OSITECH) &&
737 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
738 ((smc->manfid == MANFID_PSION) &&
739 (smc->cardid == PRODID_PSION_NET100))) {
740 i = osi_load_firmware(link);
741 if (i) {
742 pr_err("smc91c92_cs: Failed to load firmware\n");
743 return i;
744 }
745 }
746 if (link->open) {
747 smc_reset(dev);
748 netif_device_attach(dev);
749 }
750
751 return 0;
752 }
753
754
755 /*======================================================================
756
757 This verifies that the chip is some SMC91cXX variant, and returns
758 the revision code if successful. Otherwise, it returns -ENODEV.
759
760 ======================================================================*/
761
762 static int check_sig(struct pcmcia_device *link)
763 {
764 struct net_device *dev = link->priv;
765 unsigned int ioaddr = dev->base_addr;
766 int width;
767 u_short s;
768
769 SMC_SELECT_BANK(1);
770 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
771 /* Try powering up the chip */
772 outw(0, ioaddr + CONTROL);
773 mdelay(55);
774 }
775
776 /* Try setting bus width */
777 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
778 s = inb(ioaddr + CONFIG);
779 if (width)
780 s |= CFG_16BIT;
781 else
782 s &= ~CFG_16BIT;
783 outb(s, ioaddr + CONFIG);
784
785 /* Check Base Address Register to make sure bus width is OK */
786 s = inw(ioaddr + BASE_ADDR);
787 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
788 ((s >> 8) != (s & 0xff))) {
789 SMC_SELECT_BANK(3);
790 s = inw(ioaddr + REVISION);
791 return (s & 0xff);
792 }
793
794 if (width) {
795 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
796
797 smc91c92_suspend(link);
798 pcmcia_fixup_iowidth(link);
799 smc91c92_resume(link);
800 return check_sig(link);
801 }
802 return -ENODEV;
803 }
804
805 static int smc91c92_config(struct pcmcia_device *link)
806 {
807 struct net_device *dev = link->priv;
808 struct smc_private *smc = netdev_priv(dev);
809 char *name;
810 int i, j, rev;
811 unsigned int ioaddr;
812 u_long mir;
813
814 dev_dbg(&link->dev, "smc91c92_config\n");
815
816 smc->manfid = link->manf_id;
817 smc->cardid = link->card_id;
818
819 if ((smc->manfid == MANFID_OSITECH) &&
820 (smc->cardid != PRODID_OSITECH_SEVEN)) {
821 i = osi_config(link);
822 } else if ((smc->manfid == MANFID_MOTOROLA) ||
823 ((smc->manfid == MANFID_MEGAHERTZ) &&
824 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
825 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
826 i = mhz_mfc_config(link);
827 } else {
828 i = smc_config(link);
829 }
830 if (i)
831 goto config_failed;
832
833 i = pcmcia_request_irq(link, smc_interrupt);
834 if (i)
835 goto config_failed;
836 i = pcmcia_enable_device(link);
837 if (i)
838 goto config_failed;
839
840 if (smc->manfid == MANFID_MOTOROLA)
841 mot_config(link);
842
843 dev->irq = link->irq;
844
845 if ((if_port >= 0) && (if_port <= 2))
846 dev->if_port = if_port;
847 else
848 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
849
850 switch (smc->manfid) {
851 case MANFID_OSITECH:
852 case MANFID_PSION:
853 i = osi_setup(link, smc->manfid, smc->cardid); break;
854 case MANFID_SMC:
855 case MANFID_NEW_MEDIA:
856 i = smc_setup(link); break;
857 case 0x128: /* For broken Megahertz cards */
858 case MANFID_MEGAHERTZ:
859 i = mhz_setup(link); break;
860 case MANFID_MOTOROLA:
861 default: /* get the hw address from EEPROM */
862 i = mot_setup(link); break;
863 }
864
865 if (i != 0) {
866 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
867 goto config_failed;
868 }
869
870 smc->duplex = 0;
871 smc->rx_ovrn = 0;
872
873 rev = check_sig(link);
874 name = "???";
875 if (rev > 0)
876 switch (rev >> 4) {
877 case 3: name = "92"; break;
878 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
879 case 5: name = "95"; break;
880 case 7: name = "100"; break;
881 case 8: name = "100-FD"; break;
882 case 9: name = "110"; break;
883 }
884
885 ioaddr = dev->base_addr;
886 if (rev > 0) {
887 u_long mcr;
888 SMC_SELECT_BANK(0);
889 mir = inw(ioaddr + MEMINFO) & 0xff;
890 if (mir == 0xff) mir++;
891 /* Get scale factor for memory size */
892 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
893 mir *= 128 * (1<<((mcr >> 9) & 7));
894 SMC_SELECT_BANK(1);
895 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
896 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
897 if (smc->manfid == MANFID_OSITECH)
898 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
899 if ((rev >> 4) >= 7)
900 smc->cfg |= CFG_MII_SELECT;
901 } else
902 mir = 0;
903
904 if (smc->cfg & CFG_MII_SELECT) {
905 SMC_SELECT_BANK(3);
906
907 for (i = 0; i < 32; i++) {
908 j = mdio_read(dev, i, 1);
909 if ((j != 0) && (j != 0xffff)) break;
910 }
911 smc->mii_if.phy_id = (i < 32) ? i : -1;
912
913 SMC_SELECT_BANK(0);
914 }
915
916 SET_NETDEV_DEV(dev, &link->dev);
917
918 if (register_netdev(dev) != 0) {
919 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
920 goto config_undo;
921 }
922
923 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
924 "hw_addr %pM\n",
925 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
926 dev->dev_addr);
927
928 if (rev > 0) {
929 if (mir & 0x3ff)
930 printk(KERN_INFO " %lu byte", mir);
931 else
932 printk(KERN_INFO " %lu kb", mir>>10);
933 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
934 "MII" : if_names[dev->if_port]);
935 }
936
937 if (smc->cfg & CFG_MII_SELECT) {
938 if (smc->mii_if.phy_id != -1) {
939 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
940 smc->mii_if.phy_id, j);
941 } else {
942 printk(KERN_NOTICE " No MII transceivers found!\n");
943 }
944 }
945 return 0;
946
947 config_undo:
948 unregister_netdev(dev);
949 config_failed:
950 smc91c92_release(link);
951 free_netdev(dev);
952 return -ENODEV;
953 } /* smc91c92_config */
954
955 static void smc91c92_release(struct pcmcia_device *link)
956 {
957 dev_dbg(&link->dev, "smc91c92_release\n");
958 if (link->resource[2]->end) {
959 struct net_device *dev = link->priv;
960 struct smc_private *smc = netdev_priv(dev);
961 iounmap(smc->base);
962 }
963 pcmcia_disable_device(link);
964 }
965
966 /*======================================================================
967
968 MII interface support for SMC91cXX based cards
969 ======================================================================*/
970
971 #define MDIO_SHIFT_CLK 0x04
972 #define MDIO_DATA_OUT 0x01
973 #define MDIO_DIR_WRITE 0x08
974 #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
975 #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
976 #define MDIO_DATA_READ 0x02
977
978 static void mdio_sync(unsigned int addr)
979 {
980 int bits;
981 for (bits = 0; bits < 32; bits++) {
982 outb(MDIO_DATA_WRITE1, addr);
983 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
984 }
985 }
986
987 static int mdio_read(struct net_device *dev, int phy_id, int loc)
988 {
989 unsigned int addr = dev->base_addr + MGMT;
990 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
991 int i, retval = 0;
992
993 mdio_sync(addr);
994 for (i = 13; i >= 0; i--) {
995 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
996 outb(dat, addr);
997 outb(dat | MDIO_SHIFT_CLK, addr);
998 }
999 for (i = 19; i > 0; i--) {
1000 outb(0, addr);
1001 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1002 outb(MDIO_SHIFT_CLK, addr);
1003 }
1004 return (retval>>1) & 0xffff;
1005 }
1006
1007 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1008 {
1009 unsigned int addr = dev->base_addr + MGMT;
1010 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1011 int i;
1012
1013 mdio_sync(addr);
1014 for (i = 31; i >= 0; i--) {
1015 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1016 outb(dat, addr);
1017 outb(dat | MDIO_SHIFT_CLK, addr);
1018 }
1019 for (i = 1; i >= 0; i--) {
1020 outb(0, addr);
1021 outb(MDIO_SHIFT_CLK, addr);
1022 }
1023 }
1024
1025 /*======================================================================
1026
1027 The driver core code, most of which should be common with a
1028 non-PCMCIA implementation.
1029
1030 ======================================================================*/
1031
1032 #ifdef PCMCIA_DEBUG
1033 static void smc_dump(struct net_device *dev)
1034 {
1035 unsigned int ioaddr = dev->base_addr;
1036 u_short i, w, save;
1037 save = inw(ioaddr + BANK_SELECT);
1038 for (w = 0; w < 4; w++) {
1039 SMC_SELECT_BANK(w);
1040 printk(KERN_DEBUG "bank %d: ", w);
1041 for (i = 0; i < 14; i += 2)
1042 printk(" %04x", inw(ioaddr + i));
1043 printk("\n");
1044 }
1045 outw(save, ioaddr + BANK_SELECT);
1046 }
1047 #endif
1048
1049 static int smc_open(struct net_device *dev)
1050 {
1051 struct smc_private *smc = netdev_priv(dev);
1052 struct pcmcia_device *link = smc->p_dev;
1053
1054 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1055 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
1056 #ifdef PCMCIA_DEBUG
1057 smc_dump(dev);
1058 #endif
1059
1060 /* Check that the PCMCIA card is still here. */
1061 if (!pcmcia_dev_present(link))
1062 return -ENODEV;
1063 /* Physical device present signature. */
1064 if (check_sig(link) < 0) {
1065 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1066 return -ENODEV;
1067 }
1068 link->open++;
1069
1070 netif_start_queue(dev);
1071 smc->saved_skb = NULL;
1072 smc->packets_waiting = 0;
1073
1074 smc_reset(dev);
1075 init_timer(&smc->media);
1076 smc->media.function = &media_check;
1077 smc->media.data = (u_long) dev;
1078 smc->media.expires = jiffies + HZ;
1079 add_timer(&smc->media);
1080
1081 return 0;
1082 } /* smc_open */
1083
1084 /*====================================================================*/
1085
1086 static int smc_close(struct net_device *dev)
1087 {
1088 struct smc_private *smc = netdev_priv(dev);
1089 struct pcmcia_device *link = smc->p_dev;
1090 unsigned int ioaddr = dev->base_addr;
1091
1092 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1093 dev->name, inw(ioaddr + BANK_SELECT));
1094
1095 netif_stop_queue(dev);
1096
1097 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1098 Don't bother to check for chip present. */
1099 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1100 outw(0, ioaddr + INTERRUPT);
1101 SMC_SELECT_BANK(0);
1102 mask_bits(0xff00, ioaddr + RCR);
1103 mask_bits(0xff00, ioaddr + TCR);
1104
1105 /* Put the chip into power-down mode. */
1106 SMC_SELECT_BANK(1);
1107 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1108
1109 link->open--;
1110 del_timer_sync(&smc->media);
1111
1112 return 0;
1113 } /* smc_close */
1114
1115 /*======================================================================
1116
1117 Transfer a packet to the hardware and trigger the packet send.
1118 This may be called at either from either the Tx queue code
1119 or the interrupt handler.
1120
1121 ======================================================================*/
1122
1123 static void smc_hardware_send_packet(struct net_device * dev)
1124 {
1125 struct smc_private *smc = netdev_priv(dev);
1126 struct sk_buff *skb = smc->saved_skb;
1127 unsigned int ioaddr = dev->base_addr;
1128 u_char packet_no;
1129
1130 if (!skb) {
1131 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1132 return;
1133 }
1134
1135 /* There should be a packet slot waiting. */
1136 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1137 if (packet_no & 0x80) {
1138 /* If not, there is a hardware problem! Likely an ejected card. */
1139 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1140 " failed, status %#2.2x.\n", dev->name, packet_no);
1141 dev_kfree_skb_irq(skb);
1142 smc->saved_skb = NULL;
1143 netif_start_queue(dev);
1144 return;
1145 }
1146
1147 dev->stats.tx_bytes += skb->len;
1148 /* The card should use the just-allocated buffer. */
1149 outw(packet_no, ioaddr + PNR_ARR);
1150 /* point to the beginning of the packet */
1151 outw(PTR_AUTOINC , ioaddr + POINTER);
1152
1153 /* Send the packet length (+6 for status, length and ctl byte)
1154 and the status word (set to zeros). */
1155 {
1156 u_char *buf = skb->data;
1157 u_int length = skb->len; /* The chip will pad to ethernet min. */
1158
1159 pr_debug("%s: Trying to xmit packet of length %d.\n",
1160 dev->name, length);
1161
1162 /* send the packet length: +6 for status word, length, and ctl */
1163 outw(0, ioaddr + DATA_1);
1164 outw(length + 6, ioaddr + DATA_1);
1165 outsw(ioaddr + DATA_1, buf, length >> 1);
1166
1167 /* The odd last byte, if there is one, goes in the control word. */
1168 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1169 }
1170
1171 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1172 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1173 (inw(ioaddr + INTERRUPT) & 0xff00),
1174 ioaddr + INTERRUPT);
1175
1176 /* The chip does the rest of the work. */
1177 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1178
1179 smc->saved_skb = NULL;
1180 dev_kfree_skb_irq(skb);
1181 dev->trans_start = jiffies;
1182 netif_start_queue(dev);
1183 }
1184
1185 /*====================================================================*/
1186
1187 static void smc_tx_timeout(struct net_device *dev)
1188 {
1189 struct smc_private *smc = netdev_priv(dev);
1190 unsigned int ioaddr = dev->base_addr;
1191
1192 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1193 "Tx_status %2.2x status %4.4x.\n",
1194 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
1195 dev->stats.tx_errors++;
1196 smc_reset(dev);
1197 dev->trans_start = jiffies; /* prevent tx timeout */
1198 smc->saved_skb = NULL;
1199 netif_wake_queue(dev);
1200 }
1201
1202 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1203 struct net_device *dev)
1204 {
1205 struct smc_private *smc = netdev_priv(dev);
1206 unsigned int ioaddr = dev->base_addr;
1207 u_short num_pages;
1208 short time_out, ir;
1209 unsigned long flags;
1210
1211 netif_stop_queue(dev);
1212
1213 pr_debug("%s: smc_start_xmit(length = %d) called,"
1214 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1215
1216 if (smc->saved_skb) {
1217 /* THIS SHOULD NEVER HAPPEN. */
1218 dev->stats.tx_aborted_errors++;
1219 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1220 dev->name);
1221 return NETDEV_TX_BUSY;
1222 }
1223 smc->saved_skb = skb;
1224
1225 num_pages = skb->len >> 8;
1226
1227 if (num_pages > 7) {
1228 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1229 dev_kfree_skb (skb);
1230 smc->saved_skb = NULL;
1231 dev->stats.tx_dropped++;
1232 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1233 }
1234 /* A packet is now waiting. */
1235 smc->packets_waiting++;
1236
1237 spin_lock_irqsave(&smc->lock, flags);
1238 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1239
1240 /* need MC_RESET to keep the memory consistent. errata? */
1241 if (smc->rx_ovrn) {
1242 outw(MC_RESET, ioaddr + MMU_CMD);
1243 smc->rx_ovrn = 0;
1244 }
1245
1246 /* Allocate the memory; send the packet now if we win. */
1247 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1248 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1249 ir = inw(ioaddr+INTERRUPT);
1250 if (ir & IM_ALLOC_INT) {
1251 /* Acknowledge the interrupt, send the packet. */
1252 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1253 smc_hardware_send_packet(dev); /* Send the packet now.. */
1254 spin_unlock_irqrestore(&smc->lock, flags);
1255 return NETDEV_TX_OK;
1256 }
1257 }
1258
1259 /* Otherwise defer until the Tx-space-allocated interrupt. */
1260 pr_debug("%s: memory allocation deferred.\n", dev->name);
1261 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
1262 spin_unlock_irqrestore(&smc->lock, flags);
1263
1264 return NETDEV_TX_OK;
1265 }
1266
1267 /*======================================================================
1268
1269 Handle a Tx anomolous event. Entered while in Window 2.
1270
1271 ======================================================================*/
1272
1273 static void smc_tx_err(struct net_device * dev)
1274 {
1275 struct smc_private *smc = netdev_priv(dev);
1276 unsigned int ioaddr = dev->base_addr;
1277 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1278 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1279 int tx_status;
1280
1281 /* select this as the packet to read from */
1282 outw(packet_no, ioaddr + PNR_ARR);
1283
1284 /* read the first word from this packet */
1285 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1286
1287 tx_status = inw(ioaddr + DATA_1);
1288
1289 dev->stats.tx_errors++;
1290 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1291 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1292 if (tx_status & TS_16COL) {
1293 dev->stats.tx_aborted_errors++;
1294 smc->tx_err++;
1295 }
1296
1297 if (tx_status & TS_SUCCESS) {
1298 printk(KERN_NOTICE "%s: Successful packet caused error "
1299 "interrupt?\n", dev->name);
1300 }
1301 /* re-enable transmit */
1302 SMC_SELECT_BANK(0);
1303 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1304 SMC_SELECT_BANK(2);
1305
1306 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1307
1308 /* one less packet waiting for me */
1309 smc->packets_waiting--;
1310
1311 outw(saved_packet, ioaddr + PNR_ARR);
1312 }
1313
1314 /*====================================================================*/
1315
1316 static void smc_eph_irq(struct net_device *dev)
1317 {
1318 struct smc_private *smc = netdev_priv(dev);
1319 unsigned int ioaddr = dev->base_addr;
1320 u_short card_stats, ephs;
1321
1322 SMC_SELECT_BANK(0);
1323 ephs = inw(ioaddr + EPH);
1324 pr_debug("%s: Ethernet protocol handler interrupt, status"
1325 " %4.4x.\n", dev->name, ephs);
1326 /* Could be a counter roll-over warning: update stats. */
1327 card_stats = inw(ioaddr + COUNTER);
1328 /* single collisions */
1329 dev->stats.collisions += card_stats & 0xF;
1330 card_stats >>= 4;
1331 /* multiple collisions */
1332 dev->stats.collisions += card_stats & 0xF;
1333 #if 0 /* These are for when linux supports these statistics */
1334 card_stats >>= 4; /* deferred */
1335 card_stats >>= 4; /* excess deferred */
1336 #endif
1337 /* If we had a transmit error we must re-enable the transmitter. */
1338 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1339
1340 /* Clear a link error interrupt. */
1341 SMC_SELECT_BANK(1);
1342 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1343 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1344 ioaddr + CONTROL);
1345 SMC_SELECT_BANK(2);
1346 }
1347
1348 /*====================================================================*/
1349
1350 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1351 {
1352 struct net_device *dev = dev_id;
1353 struct smc_private *smc = netdev_priv(dev);
1354 unsigned int ioaddr;
1355 u_short saved_bank, saved_pointer, mask, status;
1356 unsigned int handled = 1;
1357 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1358
1359 if (!netif_device_present(dev))
1360 return IRQ_NONE;
1361
1362 ioaddr = dev->base_addr;
1363
1364 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1365 irq, ioaddr);
1366
1367 spin_lock(&smc->lock);
1368 smc->watchdog = 0;
1369 saved_bank = inw(ioaddr + BANK_SELECT);
1370 if ((saved_bank & 0xff00) != 0x3300) {
1371 /* The device does not exist -- the card could be off-line, or
1372 maybe it has been ejected. */
1373 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1374 "/ejected device.\n", dev->name, irq);
1375 handled = 0;
1376 goto irq_done;
1377 }
1378
1379 SMC_SELECT_BANK(2);
1380 saved_pointer = inw(ioaddr + POINTER);
1381 mask = inw(ioaddr + INTERRUPT) >> 8;
1382 /* clear all interrupts */
1383 outw(0, ioaddr + INTERRUPT);
1384
1385 do { /* read the status flag, and mask it */
1386 status = inw(ioaddr + INTERRUPT) & 0xff;
1387 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1388 status, mask);
1389 if ((status & mask) == 0) {
1390 if (bogus_cnt == INTR_WORK)
1391 handled = 0;
1392 break;
1393 }
1394 if (status & IM_RCV_INT) {
1395 /* Got a packet(s). */
1396 smc_rx(dev);
1397 }
1398 if (status & IM_TX_INT) {
1399 smc_tx_err(dev);
1400 outw(IM_TX_INT, ioaddr + INTERRUPT);
1401 }
1402 status &= mask;
1403 if (status & IM_TX_EMPTY_INT) {
1404 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1405 mask &= ~IM_TX_EMPTY_INT;
1406 dev->stats.tx_packets += smc->packets_waiting;
1407 smc->packets_waiting = 0;
1408 }
1409 if (status & IM_ALLOC_INT) {
1410 /* Clear this interrupt so it doesn't happen again */
1411 mask &= ~IM_ALLOC_INT;
1412
1413 smc_hardware_send_packet(dev);
1414
1415 /* enable xmit interrupts based on this */
1416 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1417
1418 /* and let the card send more packets to me */
1419 netif_wake_queue(dev);
1420 }
1421 if (status & IM_RX_OVRN_INT) {
1422 dev->stats.rx_errors++;
1423 dev->stats.rx_fifo_errors++;
1424 if (smc->duplex)
1425 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1426 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1427 }
1428 if (status & IM_EPH_INT)
1429 smc_eph_irq(dev);
1430 } while (--bogus_cnt);
1431
1432 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1433 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1434
1435 /* restore state register */
1436 outw((mask<<8), ioaddr + INTERRUPT);
1437 outw(saved_pointer, ioaddr + POINTER);
1438 SMC_SELECT_BANK(saved_bank);
1439
1440 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1441
1442 irq_done:
1443
1444 if ((smc->manfid == MANFID_OSITECH) &&
1445 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1446 /* Retrigger interrupt if needed */
1447 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1448 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1449 }
1450 if (smc->manfid == MANFID_MOTOROLA) {
1451 u_char cor;
1452 cor = readb(smc->base + MOT_UART + CISREG_COR);
1453 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1454 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1455 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1456 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1457 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1458 }
1459
1460 if ((smc->base != NULL) && /* Megahertz MFC's */
1461 (smc->manfid == MANFID_MEGAHERTZ) &&
1462 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1463
1464 u_char tmp;
1465 tmp = readb(smc->base+MEGAHERTZ_ISR);
1466 tmp = readb(smc->base+MEGAHERTZ_ISR);
1467
1468 /* Retrigger interrupt if needed */
1469 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1470 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1471 }
1472
1473 spin_unlock(&smc->lock);
1474 return IRQ_RETVAL(handled);
1475 }
1476
1477 /*====================================================================*/
1478
1479 static void smc_rx(struct net_device *dev)
1480 {
1481 unsigned int ioaddr = dev->base_addr;
1482 int rx_status;
1483 int packet_length; /* Caution: not frame length, rather words
1484 to transfer from the chip. */
1485
1486 /* Assertion: we are in Window 2. */
1487
1488 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1489 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1490 dev->name);
1491 return;
1492 }
1493
1494 /* Reset the read pointer, and read the status and packet length. */
1495 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1496 rx_status = inw(ioaddr + DATA_1);
1497 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1498
1499 pr_debug("%s: Receive status %4.4x length %d.\n",
1500 dev->name, rx_status, packet_length);
1501
1502 if (!(rx_status & RS_ERRORS)) {
1503 /* do stuff to make a new packet */
1504 struct sk_buff *skb;
1505
1506 /* Note: packet_length adds 5 or 6 extra bytes here! */
1507 skb = dev_alloc_skb(packet_length+2);
1508
1509 if (skb == NULL) {
1510 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
1511 dev->stats.rx_dropped++;
1512 outw(MC_RELEASE, ioaddr + MMU_CMD);
1513 return;
1514 }
1515
1516 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1517 skb_reserve(skb, 2);
1518 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1519 (packet_length+1)>>1);
1520 skb->protocol = eth_type_trans(skb, dev);
1521
1522 netif_rx(skb);
1523 dev->last_rx = jiffies;
1524 dev->stats.rx_packets++;
1525 dev->stats.rx_bytes += packet_length;
1526 if (rx_status & RS_MULTICAST)
1527 dev->stats.multicast++;
1528 } else {
1529 /* error ... */
1530 dev->stats.rx_errors++;
1531
1532 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1533 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
1534 dev->stats.rx_length_errors++;
1535 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1536 }
1537 /* Let the MMU free the memory of this packet. */
1538 outw(MC_RELEASE, ioaddr + MMU_CMD);
1539 }
1540
1541 /*======================================================================
1542
1543 Set the receive mode.
1544
1545 This routine is used by both the protocol level to notify us of
1546 promiscuous/multicast mode changes, and by the open/reset code to
1547 initialize the Rx registers. We always set the multicast list and
1548 leave the receiver running.
1549
1550 ======================================================================*/
1551
1552 static void set_rx_mode(struct net_device *dev)
1553 {
1554 unsigned int ioaddr = dev->base_addr;
1555 struct smc_private *smc = netdev_priv(dev);
1556 unsigned char multicast_table[8];
1557 unsigned long flags;
1558 u_short rx_cfg_setting;
1559 int i;
1560
1561 memset(multicast_table, 0, sizeof(multicast_table));
1562
1563 if (dev->flags & IFF_PROMISC) {
1564 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1565 } else if (dev->flags & IFF_ALLMULTI)
1566 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1567 else {
1568 if (!netdev_mc_empty(dev)) {
1569 struct netdev_hw_addr *ha;
1570
1571 netdev_for_each_mc_addr(ha, dev) {
1572 u_int position = ether_crc(6, ha->addr);
1573 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1574 }
1575 }
1576 rx_cfg_setting = RxStripCRC | RxEnable;
1577 }
1578
1579 /* Load MC table and Rx setting into the chip without interrupts. */
1580 spin_lock_irqsave(&smc->lock, flags);
1581 SMC_SELECT_BANK(3);
1582 for (i = 0; i < 8; i++)
1583 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1584 SMC_SELECT_BANK(0);
1585 outw(rx_cfg_setting, ioaddr + RCR);
1586 SMC_SELECT_BANK(2);
1587 spin_unlock_irqrestore(&smc->lock, flags);
1588 }
1589
1590 /*======================================================================
1591
1592 Senses when a card's config changes. Here, it's coax or TP.
1593
1594 ======================================================================*/
1595
1596 static int s9k_config(struct net_device *dev, struct ifmap *map)
1597 {
1598 struct smc_private *smc = netdev_priv(dev);
1599 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1600 if (smc->cfg & CFG_MII_SELECT)
1601 return -EOPNOTSUPP;
1602 else if (map->port > 2)
1603 return -EINVAL;
1604 dev->if_port = map->port;
1605 printk(KERN_INFO "%s: switched to %s port\n",
1606 dev->name, if_names[dev->if_port]);
1607 smc_reset(dev);
1608 }
1609 return 0;
1610 }
1611
1612 /*======================================================================
1613
1614 Reset the chip, reloading every register that might be corrupted.
1615
1616 ======================================================================*/
1617
1618 /*
1619 Set transceiver type, perhaps to something other than what the user
1620 specified in dev->if_port.
1621 */
1622 static void smc_set_xcvr(struct net_device *dev, int if_port)
1623 {
1624 struct smc_private *smc = netdev_priv(dev);
1625 unsigned int ioaddr = dev->base_addr;
1626 u_short saved_bank;
1627
1628 saved_bank = inw(ioaddr + BANK_SELECT);
1629 SMC_SELECT_BANK(1);
1630 if (if_port == 2) {
1631 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1632 if ((smc->manfid == MANFID_OSITECH) &&
1633 (smc->cardid != PRODID_OSITECH_SEVEN))
1634 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1635 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1636 } else {
1637 outw(smc->cfg, ioaddr + CONFIG);
1638 if ((smc->manfid == MANFID_OSITECH) &&
1639 (smc->cardid != PRODID_OSITECH_SEVEN))
1640 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1641 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1642 }
1643 SMC_SELECT_BANK(saved_bank);
1644 }
1645
1646 static void smc_reset(struct net_device *dev)
1647 {
1648 unsigned int ioaddr = dev->base_addr;
1649 struct smc_private *smc = netdev_priv(dev);
1650 int i;
1651
1652 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1653
1654 /* The first interaction must be a write to bring the chip out
1655 of sleep mode. */
1656 SMC_SELECT_BANK(0);
1657 /* Reset the chip. */
1658 outw(RCR_SOFTRESET, ioaddr + RCR);
1659 udelay(10);
1660
1661 /* Clear the transmit and receive configuration registers. */
1662 outw(RCR_CLEAR, ioaddr + RCR);
1663 outw(TCR_CLEAR, ioaddr + TCR);
1664
1665 /* Set the Window 1 control, configuration and station addr registers.
1666 No point in writing the I/O base register ;-> */
1667 SMC_SELECT_BANK(1);
1668 /* Automatically release successfully transmitted packets,
1669 Accept link errors, counter and Tx error interrupts. */
1670 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1671 ioaddr + CONTROL);
1672 smc_set_xcvr(dev, dev->if_port);
1673 if ((smc->manfid == MANFID_OSITECH) &&
1674 (smc->cardid != PRODID_OSITECH_SEVEN))
1675 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1676 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1677 ioaddr - 0x10 + OSITECH_AUI_PWR);
1678
1679 /* Fill in the physical address. The databook is wrong about the order! */
1680 for (i = 0; i < 6; i += 2)
1681 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1682 ioaddr + ADDR0 + i);
1683
1684 /* Reset the MMU */
1685 SMC_SELECT_BANK(2);
1686 outw(MC_RESET, ioaddr + MMU_CMD);
1687 outw(0, ioaddr + INTERRUPT);
1688
1689 /* Re-enable the chip. */
1690 SMC_SELECT_BANK(0);
1691 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1692 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1693 set_rx_mode(dev);
1694
1695 if (smc->cfg & CFG_MII_SELECT) {
1696 SMC_SELECT_BANK(3);
1697
1698 /* Reset MII */
1699 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1700
1701 /* Advertise 100F, 100H, 10F, 10H */
1702 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1703
1704 /* Restart MII autonegotiation */
1705 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1706 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1707 }
1708
1709 /* Enable interrupts. */
1710 SMC_SELECT_BANK(2);
1711 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1712 ioaddr + INTERRUPT);
1713 }
1714
1715 /*======================================================================
1716
1717 Media selection timer routine
1718
1719 ======================================================================*/
1720
1721 static void media_check(u_long arg)
1722 {
1723 struct net_device *dev = (struct net_device *) arg;
1724 struct smc_private *smc = netdev_priv(dev);
1725 unsigned int ioaddr = dev->base_addr;
1726 u_short i, media, saved_bank;
1727 u_short link;
1728 unsigned long flags;
1729
1730 spin_lock_irqsave(&smc->lock, flags);
1731
1732 saved_bank = inw(ioaddr + BANK_SELECT);
1733
1734 if (!netif_device_present(dev))
1735 goto reschedule;
1736
1737 SMC_SELECT_BANK(2);
1738
1739 /* need MC_RESET to keep the memory consistent. errata? */
1740 if (smc->rx_ovrn) {
1741 outw(MC_RESET, ioaddr + MMU_CMD);
1742 smc->rx_ovrn = 0;
1743 }
1744 i = inw(ioaddr + INTERRUPT);
1745 SMC_SELECT_BANK(0);
1746 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1747 SMC_SELECT_BANK(1);
1748 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1749
1750 SMC_SELECT_BANK(saved_bank);
1751 spin_unlock_irqrestore(&smc->lock, flags);
1752
1753 /* Check for pending interrupt with watchdog flag set: with
1754 this, we can limp along even if the interrupt is blocked */
1755 if (smc->watchdog++ && ((i>>8) & i)) {
1756 if (!smc->fast_poll)
1757 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
1758 local_irq_save(flags);
1759 smc_interrupt(dev->irq, dev);
1760 local_irq_restore(flags);
1761 smc->fast_poll = HZ;
1762 }
1763 if (smc->fast_poll) {
1764 smc->fast_poll--;
1765 smc->media.expires = jiffies + HZ/100;
1766 add_timer(&smc->media);
1767 return;
1768 }
1769
1770 spin_lock_irqsave(&smc->lock, flags);
1771
1772 saved_bank = inw(ioaddr + BANK_SELECT);
1773
1774 if (smc->cfg & CFG_MII_SELECT) {
1775 if (smc->mii_if.phy_id < 0)
1776 goto reschedule;
1777
1778 SMC_SELECT_BANK(3);
1779 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1780 if (!link || (link == 0xffff)) {
1781 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1782 smc->mii_if.phy_id = -1;
1783 goto reschedule;
1784 }
1785
1786 link &= 0x0004;
1787 if (link != smc->link_status) {
1788 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1789 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1790 (link) ? "found" : "lost");
1791 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1792 ? TCR_FDUPLX : 0);
1793 if (link) {
1794 printk(KERN_INFO "%s: autonegotiation complete: "
1795 "%sbaseT-%cD selected\n", dev->name,
1796 ((p & 0x0180) ? "100" : "10"),
1797 (smc->duplex ? 'F' : 'H'));
1798 }
1799 SMC_SELECT_BANK(0);
1800 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1801 smc->link_status = link;
1802 }
1803 goto reschedule;
1804 }
1805
1806 /* Ignore collisions unless we've had no rx's recently */
1807 if (time_after(jiffies, dev->last_rx + HZ)) {
1808 if (smc->tx_err || (smc->media_status & EPH_16COL))
1809 media |= EPH_16COL;
1810 }
1811 smc->tx_err = 0;
1812
1813 if (media != smc->media_status) {
1814 if ((media & smc->media_status & 1) &&
1815 ((smc->media_status ^ media) & EPH_LINK_OK))
1816 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1817 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1818 else if ((media & smc->media_status & 2) &&
1819 ((smc->media_status ^ media) & EPH_16COL))
1820 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1821 (media & EPH_16COL ? "problem" : "ok"));
1822 if (dev->if_port == 0) {
1823 if (media & 1) {
1824 if (media & EPH_LINK_OK)
1825 printk(KERN_INFO "%s: flipped to 10baseT\n",
1826 dev->name);
1827 else
1828 smc_set_xcvr(dev, 2);
1829 } else {
1830 if (media & EPH_16COL)
1831 smc_set_xcvr(dev, 1);
1832 else
1833 printk(KERN_INFO "%s: flipped to 10base2\n",
1834 dev->name);
1835 }
1836 }
1837 smc->media_status = media;
1838 }
1839
1840 reschedule:
1841 smc->media.expires = jiffies + HZ;
1842 add_timer(&smc->media);
1843 SMC_SELECT_BANK(saved_bank);
1844 spin_unlock_irqrestore(&smc->lock, flags);
1845 }
1846
1847 static int smc_link_ok(struct net_device *dev)
1848 {
1849 unsigned int ioaddr = dev->base_addr;
1850 struct smc_private *smc = netdev_priv(dev);
1851
1852 if (smc->cfg & CFG_MII_SELECT) {
1853 return mii_link_ok(&smc->mii_if);
1854 } else {
1855 SMC_SELECT_BANK(0);
1856 return inw(ioaddr + EPH) & EPH_LINK_OK;
1857 }
1858 }
1859
1860 static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1861 {
1862 u16 tmp;
1863 unsigned int ioaddr = dev->base_addr;
1864
1865 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1866 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1867
1868 SMC_SELECT_BANK(1);
1869 tmp = inw(ioaddr + CONFIG);
1870 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1871 ecmd->transceiver = XCVR_INTERNAL;
1872 ecmd->speed = SPEED_10;
1873 ecmd->phy_address = ioaddr + MGMT;
1874
1875 SMC_SELECT_BANK(0);
1876 tmp = inw(ioaddr + TCR);
1877 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1878
1879 return 0;
1880 }
1881
1882 static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1883 {
1884 u16 tmp;
1885 unsigned int ioaddr = dev->base_addr;
1886
1887 if (ecmd->speed != SPEED_10)
1888 return -EINVAL;
1889 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1890 return -EINVAL;
1891 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1892 return -EINVAL;
1893 if (ecmd->transceiver != XCVR_INTERNAL)
1894 return -EINVAL;
1895
1896 if (ecmd->port == PORT_AUI)
1897 smc_set_xcvr(dev, 1);
1898 else
1899 smc_set_xcvr(dev, 0);
1900
1901 SMC_SELECT_BANK(0);
1902 tmp = inw(ioaddr + TCR);
1903 if (ecmd->duplex == DUPLEX_FULL)
1904 tmp |= TCR_FDUPLX;
1905 else
1906 tmp &= ~TCR_FDUPLX;
1907 outw(tmp, ioaddr + TCR);
1908
1909 return 0;
1910 }
1911
1912 static int check_if_running(struct net_device *dev)
1913 {
1914 if (!netif_running(dev))
1915 return -EINVAL;
1916 return 0;
1917 }
1918
1919 static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1920 {
1921 strcpy(info->driver, DRV_NAME);
1922 strcpy(info->version, DRV_VERSION);
1923 }
1924
1925 static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1926 {
1927 struct smc_private *smc = netdev_priv(dev);
1928 unsigned int ioaddr = dev->base_addr;
1929 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1930 int ret;
1931 unsigned long flags;
1932
1933 spin_lock_irqsave(&smc->lock, flags);
1934 SMC_SELECT_BANK(3);
1935 if (smc->cfg & CFG_MII_SELECT)
1936 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1937 else
1938 ret = smc_netdev_get_ecmd(dev, ecmd);
1939 SMC_SELECT_BANK(saved_bank);
1940 spin_unlock_irqrestore(&smc->lock, flags);
1941 return ret;
1942 }
1943
1944 static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1945 {
1946 struct smc_private *smc = netdev_priv(dev);
1947 unsigned int ioaddr = dev->base_addr;
1948 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1949 int ret;
1950 unsigned long flags;
1951
1952 spin_lock_irqsave(&smc->lock, flags);
1953 SMC_SELECT_BANK(3);
1954 if (smc->cfg & CFG_MII_SELECT)
1955 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1956 else
1957 ret = smc_netdev_set_ecmd(dev, ecmd);
1958 SMC_SELECT_BANK(saved_bank);
1959 spin_unlock_irqrestore(&smc->lock, flags);
1960 return ret;
1961 }
1962
1963 static u32 smc_get_link(struct net_device *dev)
1964 {
1965 struct smc_private *smc = netdev_priv(dev);
1966 unsigned int ioaddr = dev->base_addr;
1967 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1968 u32 ret;
1969 unsigned long flags;
1970
1971 spin_lock_irqsave(&smc->lock, flags);
1972 SMC_SELECT_BANK(3);
1973 ret = smc_link_ok(dev);
1974 SMC_SELECT_BANK(saved_bank);
1975 spin_unlock_irqrestore(&smc->lock, flags);
1976 return ret;
1977 }
1978
1979 static int smc_nway_reset(struct net_device *dev)
1980 {
1981 struct smc_private *smc = netdev_priv(dev);
1982 if (smc->cfg & CFG_MII_SELECT) {
1983 unsigned int ioaddr = dev->base_addr;
1984 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1985 int res;
1986
1987 SMC_SELECT_BANK(3);
1988 res = mii_nway_restart(&smc->mii_if);
1989 SMC_SELECT_BANK(saved_bank);
1990
1991 return res;
1992 } else
1993 return -EOPNOTSUPP;
1994 }
1995
1996 static const struct ethtool_ops ethtool_ops = {
1997 .begin = check_if_running,
1998 .get_drvinfo = smc_get_drvinfo,
1999 .get_settings = smc_get_settings,
2000 .set_settings = smc_set_settings,
2001 .get_link = smc_get_link,
2002 .nway_reset = smc_nway_reset,
2003 };
2004
2005 static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2006 {
2007 struct smc_private *smc = netdev_priv(dev);
2008 struct mii_ioctl_data *mii = if_mii(rq);
2009 int rc = 0;
2010 u16 saved_bank;
2011 unsigned int ioaddr = dev->base_addr;
2012 unsigned long flags;
2013
2014 if (!netif_running(dev))
2015 return -EINVAL;
2016
2017 spin_lock_irqsave(&smc->lock, flags);
2018 saved_bank = inw(ioaddr + BANK_SELECT);
2019 SMC_SELECT_BANK(3);
2020 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2021 SMC_SELECT_BANK(saved_bank);
2022 spin_unlock_irqrestore(&smc->lock, flags);
2023 return rc;
2024 }
2025
2026 static struct pcmcia_device_id smc91c92_ids[] = {
2027 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2028 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2029 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2030 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2031 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2032 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2033 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2034 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
2035 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2036 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
2037 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2038 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2039 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2040 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2041 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2042 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2043 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2044 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2045 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
2046 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2047 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
2048 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2049 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2050 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2051 /* These conflict with other cards! */
2052 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2053 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2054 PCMCIA_DEVICE_NULL,
2055 };
2056 MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2057
2058 static struct pcmcia_driver smc91c92_cs_driver = {
2059 .owner = THIS_MODULE,
2060 .name = "smc91c92_cs",
2061 .probe = smc91c92_probe,
2062 .remove = smc91c92_detach,
2063 .id_table = smc91c92_ids,
2064 .suspend = smc91c92_suspend,
2065 .resume = smc91c92_resume,
2066 };
2067
2068 static int __init init_smc91c92_cs(void)
2069 {
2070 return pcmcia_register_driver(&smc91c92_cs_driver);
2071 }
2072
2073 static void __exit exit_smc91c92_cs(void)
2074 {
2075 pcmcia_unregister_driver(&smc91c92_cs_driver);
2076 }
2077
2078 module_init(init_smc91c92_cs);
2079 module_exit(exit_smc91c92_cs);
Linux kernel - Deliverables
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